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@ -169,11 +169,10 @@ int HSM1load(GENmodel *inModel, register CKTcircuit *ckt) |
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double tempv; |
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double tempv; |
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#endif /*NOBYPASS*/ |
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#endif /*NOBYPASS*/ |
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int tmp; |
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int tmp; |
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/* spice3f4 defined NEWCONV by default, looking to niconv.c |
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#ifndef NEWCONV |
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#ifndef NEWCONV |
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double tol, tol2, tol3, tol4; |
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double tol, tol2, tol3, tol4; |
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#endif |
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#endif |
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*/ |
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int ChargeComputationNeeded = |
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int ChargeComputationNeeded = |
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((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || |
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((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || |
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((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) |
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((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) |
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@ -911,7 +910,6 @@ int HSM1load(GENmodel *inModel, register CKTcircuit *ckt) |
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if (Check == 1) { |
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if (Check == 1) { |
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ckt->CKTnoncon++; |
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ckt->CKTnoncon++; |
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isConv = 0; |
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isConv = 0; |
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/* spice3f4 defined NEWCONV by default, looking to niconv.c |
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#ifndef NEWCONV |
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#ifndef NEWCONV |
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} |
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} |
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else { |
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else { |
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@ -951,7 +949,6 @@ int HSM1load(GENmodel *inModel, register CKTcircuit *ckt) |
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} |
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} |
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} |
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} |
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#endif |
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#endif |
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*/ |
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} |
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} |
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} |
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} |
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*(ckt->CKTstate0 + here->HSM1vbs) = vbs; |
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*(ckt->CKTstate0 + here->HSM1vbs) = vbs; |
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