pll: just include one of the two vco available

(avoid a bug which has been removed only recently)

examples/xspice/pll/pll-xspice-fstep.cir

@@ -30,14 +30,14 @@ ainv1 d_d0 d_d1 invd1
 .model invd1 d_inverter(rise_delay = 1e-10 fall_delay = 1e-10)
 
 * vco
-.include vco_sub.cir
-.include vco_sub_new.cir
 * buf: analog out
 * d_digout: digital out
 * cont: analog control voltage
 * dd: analog supply voltage
-xvco buf d_digout cont dd d_osc_vco 
+*.include vco_sub.cir
 *xvco buf d_digout cont dd ro_vco
+.include vco_sub_new.cir
+xvco buf d_digout cont dd d_osc_vco 
 
 * digital divider
 adiv1 d_digout d_divout divider

examples/xspice/pll/pll-xspice.cir

@@ -28,14 +28,14 @@ ainv1 d_d0 d_d1 invd1
 .model invd1 d_inverter(rise_delay = 1e-10 fall_delay = 1e-10)
 
 * vco
-.include vco_sub.cir
-.include vco_sub_new.cir
 * buf: analog out
 * d_digout: digital out
 * cont: analog control voltage
 * dd: analog supply voltage
-xvco buf d_digout cont dd d_osc_vco 
+*.include vco_sub.cir
 *xvco buf d_digout cont dd ro_vco
+.include vco_sub_new.cir
+xvco buf d_digout cont dd d_osc_vco 
 
 * digital divider
 adiv1 d_digout d_divout divider

examples/xspice/pll/test_vco.cir

@@ -7,13 +7,18 @@
 .param vcc=3.3
 .csparam simtime=500n
 
-.include vco_sub.cir
-.include vco_sub_new.cir
-
 vdd dd 0 dc 'vcc'
 vco cont 0 dc 2.5
-*xvco buf digout cont dd ro_vco ; ring oscillator vco
-xvco buf digout cont dd d_osc_vco ; code model d_osc vco
+
+* vco
+* buf: analog out
+* d_digout: digital out
+* cont: analog control voltage
+* dd: analog supply voltage
+*.include vco_sub.cir
+*xvco buf d_digout cont dd ro_vco
+.include vco_sub_new.cir
+xvco buf d_digout cont dd d_osc_vco 
 
 .option noacct