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@ -672,8 +672,8 @@ will be updated every time the device specific code is altered or changed to ref |
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Ver: 4.2.0 - 4.6.5 |
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Class: M |
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Level: 14 & 54, version = 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6 |
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Dir: devices/bsim4 (level 4.6.5) |
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Level: 14 & 54, version = 4.5, 4.6, 4.7, 4.8 |
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Dir: devices/bsim4 (level 4.8.0) |
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Status: o.k. |
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This is the actual BSIM4 model from Berkeley Device Group. |
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@ -689,9 +689,9 @@ will be updated every time the device specific code is altered or changed to ref |
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11.13 HiSIM2 - Hiroshima-university STARC IGFET Model |
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Ver: 2.7.0 |
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Ver: 2.8.0 |
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Class: M |
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Level: 61, 68 |
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Level: 68 |
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Dir: devices/hisim2 |
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Status: TO BE TESTED. |
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@ -700,17 +700,20 @@ will be updated every time the device specific code is altered or changed to ref |
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Web site: http://home.hiroshima-u.ac.jp/usdl/HiSIM.html |
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Enhancements over the original model: |
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- Support for Multi-core processors using OpenMP |
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11.14 HiSIM_HV - Hiroshima-University STARC IGFET High Voltage Model |
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Ver: 1.2.3 |
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Ver: 1.2.4 and 2.2 |
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Class: M |
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Level: 62, 73 |
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Level: 73 |
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Dir: devices/hisimhv |
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Status: TO BE TESTED. |
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This is the HiSIM_HV model available from Hiroshima University |
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(Ultra-Small Device Engineering Laboratory) |
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This is the HiSIM_HV model version 1 and 2 available from |
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Hiroshima University (Ultra-Small Device Engineering Laboratory) |
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Web site: http://home.hiroshima-u.ac.jp/usdl/HiSIM.html |
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@ -787,7 +790,7 @@ will be updated every time the device specific code is altered or changed to ref |
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Ver: 2.6 |
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Class: M |
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Level: 61 |
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Level: 60 |
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Dir: devices/soi3 |
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Status: OBSOLETE |
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