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Fix the source/drain typo for overlap cap's

dwarning 15 years ago
parent
commit
304417112b
  1. 2
      src/spicelib/devices/mos1/mos1ask.c

2
src/spicelib/devices/mos1/mos1ask.c

@ -195,7 +195,7 @@ MOS1ask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
case MOS1_CAPGD:
value->rValue = 2* *(ckt->CKTstate0 + here->MOS1capgd);
/* add overlap capacitance */
value->rValue += (here->sMOS1modPtr->MOS1gateSourceOverlapCapFactor)
value->rValue += (here->sMOS1modPtr->MOS1gateDrainOverlapCapFactor)
* here->MOS1m
* (here->MOS1w);
return(OK);

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