From 4fe7326db7ac2466801dba6e5a02553d836fded1 Mon Sep 17 00:00:00 2001 From: dwarning Date: Sun, 4 Nov 2007 20:00:43 +0000 Subject: [PATCH] BSIM4.2.0/4.3.0/4.5.0 version code added --- configure.in | 3 + src/Makefile.am | 3 + src/spicelib/devices/Makefile.am | 6 + src/spicelib/devices/bsim4v2/B4TERMS_OF_USE | 33 + src/spicelib/devices/bsim4v2/Makefile.am | 35 + src/spicelib/devices/bsim4v2/b4v2.c | 744 +++ src/spicelib/devices/bsim4v2/b4v2acld.c | 670 +++ src/spicelib/devices/bsim4v2/b4v2ask.c | 300 ++ src/spicelib/devices/bsim4v2/b4v2check.c | 564 +++ src/spicelib/devices/bsim4v2/b4v2cvtest.c | 201 + src/spicelib/devices/bsim4v2/b4v2del.c | 41 + src/spicelib/devices/bsim4v2/b4v2dest.c | 38 + src/spicelib/devices/bsim4v2/b4v2geo.c | 382 ++ src/spicelib/devices/bsim4v2/b4v2getic.c | 44 + src/spicelib/devices/bsim4v2/b4v2ld.c | 4492 +++++++++++++++++ src/spicelib/devices/bsim4v2/b4v2mask.c | 1877 ++++++++ src/spicelib/devices/bsim4v2/b4v2mdel.c | 47 + src/spicelib/devices/bsim4v2/b4v2mpar.c | 2532 ++++++++++ src/spicelib/devices/bsim4v2/b4v2noi.c | 474 ++ src/spicelib/devices/bsim4v2/b4v2par.c | 150 + src/spicelib/devices/bsim4v2/b4v2pzld.c | 756 +++ src/spicelib/devices/bsim4v2/b4v2set.c | 1679 +++++++ src/spicelib/devices/bsim4v2/b4v2temp.c | 1497 ++++++ src/spicelib/devices/bsim4v2/b4v2trunc.c | 60 + src/spicelib/devices/bsim4v2/bsim4v2def.h | 2663 +++++++++++ src/spicelib/devices/bsim4v2/bsim4v2ext.h | 54 + src/spicelib/devices/bsim4v2/bsim4v2init.c | 64 + src/spicelib/devices/bsim4v2/bsim4v2init.h | 13 + src/spicelib/devices/bsim4v2/bsim4v2itf.h | 13 + src/spicelib/devices/bsim4v3/B4TERMS_OF_USE | 33 + src/spicelib/devices/bsim4v3/Makefile.am | 35 + src/spicelib/devices/bsim4v3/b4v3.c | 786 +++ src/spicelib/devices/bsim4v3/b4v3acld.c | 668 +++ src/spicelib/devices/bsim4v3/b4v3ask.c | 309 ++ src/spicelib/devices/bsim4v3/b4v3check.c | 663 +++ src/spicelib/devices/bsim4v3/b4v3cvtest.c | 201 + src/spicelib/devices/bsim4v3/b4v3del.c | 41 + src/spicelib/devices/bsim4v3/b4v3dest.c | 38 + src/spicelib/devices/bsim4v3/b4v3geo.c | 382 ++ src/spicelib/devices/bsim4v3/b4v3getic.c | 44 + src/spicelib/devices/bsim4v3/b4v3ld.c | 4612 ++++++++++++++++++ src/spicelib/devices/bsim4v3/b4v3mask.c | 1967 ++++++++ src/spicelib/devices/bsim4v3/b4v3mdel.c | 46 + src/spicelib/devices/bsim4v3/b4v3mpar.c | 2682 +++++++++++ src/spicelib/devices/bsim4v3/b4v3noi.c | 486 ++ src/spicelib/devices/bsim4v3/b4v3par.c | 165 + src/spicelib/devices/bsim4v3/b4v3pzld.c | 755 +++ src/spicelib/devices/bsim4v3/b4v3set.c | 1763 +++++++ src/spicelib/devices/bsim4v3/b4v3temp.c | 1646 +++++++ src/spicelib/devices/bsim4v3/b4v3trunc.c | 60 + src/spicelib/devices/bsim4v3/bsim4v3def.h | 2816 +++++++++++ src/spicelib/devices/bsim4v3/bsim4v3ext.h | 54 + src/spicelib/devices/bsim4v3/bsim4v3init.c | 80 + src/spicelib/devices/bsim4v3/bsim4v3init.h | 13 + src/spicelib/devices/bsim4v3/bsim4v3itf.h | 13 + src/spicelib/devices/bsim4v5/B4TERMS_OF_USE | 33 + src/spicelib/devices/bsim4v5/Makefile.am | 35 + src/spicelib/devices/bsim4v5/b4v5.c | 913 ++++ src/spicelib/devices/bsim4v5/b4v5acld.c | 672 +++ src/spicelib/devices/bsim4v5/b4v5ask.c | 355 ++ src/spicelib/devices/bsim4v5/b4v5check.c | 816 ++++ src/spicelib/devices/bsim4v5/b4v5cvtest.c | 199 + src/spicelib/devices/bsim4v5/b4v5del.c | 41 + src/spicelib/devices/bsim4v5/b4v5dest.c | 38 + src/spicelib/devices/bsim4v5/b4v5geo.c | 385 ++ src/spicelib/devices/bsim4v5/b4v5getic.c | 44 + src/spicelib/devices/bsim4v5/b4v5ld.c | 4783 +++++++++++++++++++ src/spicelib/devices/bsim4v5/b4v5mask.c | 2269 +++++++++ src/spicelib/devices/bsim4v5/b4v5mdel.c | 46 + src/spicelib/devices/bsim4v5/b4v5mpar.c | 3093 ++++++++++++ src/spicelib/devices/bsim4v5/b4v5noi.c | 541 +++ src/spicelib/devices/bsim4v5/b4v5par.c | 198 + src/spicelib/devices/bsim4v5/b4v5pzld.c | 758 +++ src/spicelib/devices/bsim4v5/b4v5set.c | 2084 ++++++++ src/spicelib/devices/bsim4v5/b4v5temp.c | 1834 +++++++ src/spicelib/devices/bsim4v5/b4v5trunc.c | 59 + src/spicelib/devices/bsim4v5/bsim4v5def.h | 3193 +++++++++++++ src/spicelib/devices/bsim4v5/bsim4v5ext.h | 54 + src/spicelib/devices/bsim4v5/bsim4v5init.c | 83 + src/spicelib/devices/bsim4v5/bsim4v5init.h | 13 + src/spicelib/devices/bsim4v5/bsim4v5itf.h | 13 + src/spicelib/devices/dev.c | 128 +- src/spicelib/parser/inp2m.c | 3 + src/spicelib/parser/inpdomod.c | 11 +- src/spicelib/parser/inpgmod.c | 3 +- 85 files changed, 62428 insertions(+), 62 deletions(-) create mode 100644 src/spicelib/devices/bsim4v2/B4TERMS_OF_USE create mode 100644 src/spicelib/devices/bsim4v2/Makefile.am create mode 100644 src/spicelib/devices/bsim4v2/b4v2.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2acld.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2ask.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2check.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2cvtest.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2del.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2dest.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2geo.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2getic.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2ld.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2mask.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2mdel.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2mpar.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2noi.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2par.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2pzld.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2set.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2temp.c create mode 100644 src/spicelib/devices/bsim4v2/b4v2trunc.c create mode 100644 src/spicelib/devices/bsim4v2/bsim4v2def.h create mode 100644 src/spicelib/devices/bsim4v2/bsim4v2ext.h create mode 100644 src/spicelib/devices/bsim4v2/bsim4v2init.c create mode 100644 src/spicelib/devices/bsim4v2/bsim4v2init.h create mode 100644 src/spicelib/devices/bsim4v2/bsim4v2itf.h create mode 100644 src/spicelib/devices/bsim4v3/B4TERMS_OF_USE create mode 100644 src/spicelib/devices/bsim4v3/Makefile.am create mode 100644 src/spicelib/devices/bsim4v3/b4v3.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3acld.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3ask.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3check.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3cvtest.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3del.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3dest.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3geo.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3getic.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3ld.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3mask.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3mdel.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3mpar.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3noi.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3par.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3pzld.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3set.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3temp.c create mode 100644 src/spicelib/devices/bsim4v3/b4v3trunc.c create mode 100644 src/spicelib/devices/bsim4v3/bsim4v3def.h create mode 100644 src/spicelib/devices/bsim4v3/bsim4v3ext.h create mode 100644 src/spicelib/devices/bsim4v3/bsim4v3init.c create mode 100644 src/spicelib/devices/bsim4v3/bsim4v3init.h create mode 100644 src/spicelib/devices/bsim4v3/bsim4v3itf.h create mode 100644 src/spicelib/devices/bsim4v5/B4TERMS_OF_USE create mode 100644 src/spicelib/devices/bsim4v5/Makefile.am create mode 100644 src/spicelib/devices/bsim4v5/b4v5.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5acld.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5ask.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5check.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5cvtest.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5del.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5dest.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5geo.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5getic.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5ld.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5mask.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5mdel.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5mpar.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5noi.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5par.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5pzld.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5set.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5temp.c create mode 100644 src/spicelib/devices/bsim4v5/b4v5trunc.c create mode 100644 src/spicelib/devices/bsim4v5/bsim4v5def.h create mode 100644 src/spicelib/devices/bsim4v5/bsim4v5ext.h create mode 100644 src/spicelib/devices/bsim4v5/bsim4v5init.c create mode 100644 src/spicelib/devices/bsim4v5/bsim4v5init.h create mode 100644 src/spicelib/devices/bsim4v5/bsim4v5itf.h diff --git a/configure.in b/configure.in index 9de578a95..bdfaf3b35 100644 --- a/configure.in +++ b/configure.in @@ -812,7 +812,10 @@ src/spicelib/devices/bsim3v1a/Makefile \ src/spicelib/devices/bsim3v1s/Makefile \ src/spicelib/devices/bsim3/Makefile \ src/spicelib/devices/bsim4/Makefile \ +src/spicelib/devices/bsim4v2/Makefile \ +src/spicelib/devices/bsim4v3/Makefile \ src/spicelib/devices/bsim4v4/Makefile \ +src/spicelib/devices/bsim4v5/Makefile \ src/spicelib/devices/bsim3soi/Makefile \ src/spicelib/devices/bsim3soi_pd/Makefile \ src/spicelib/devices/bsim3soi_fd/Makefile \ diff --git a/src/Makefile.am b/src/Makefile.am index f3827a4b8..95db9b098 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -34,7 +34,10 @@ DYNAMIC_DEVICELIBS = \ spicelib/devices/bsim3v1s/libbsim3v1s.a \ spicelib/devices/bsim3v1a/libbsim3v1a.a \ spicelib/devices/bsim4/libbsim4.a \ + spicelib/devices/bsim4v2/libbsim4v2.a \ + spicelib/devices/bsim4v3/libbsim4v3.a \ spicelib/devices/bsim4v4/libbsim4v4.a \ + spicelib/devices/bsim4v5/libbsim4v5.a \ spicelib/devices/cap/libcap.a \ spicelib/devices/bsim3soi/libbsim3soi.a \ spicelib/devices/bsim3soi_pd/libbsim3soipd.a \ diff --git a/src/spicelib/devices/Makefile.am b/src/spicelib/devices/Makefile.am index 82120051a..6632a8dcf 100644 --- a/src/spicelib/devices/Makefile.am +++ b/src/spicelib/devices/Makefile.am @@ -9,7 +9,10 @@ SUBDIRS = \ bsim3 \ bsim3soi \ bsim4 \ + bsim4v2 \ + bsim4v3 \ bsim4v4 \ + bsim4v5 \ bsim3v0 \ bsim3v1 \ bsim3v1s \ @@ -62,7 +65,10 @@ DIST_SUBDIRS = \ bsim3 \ bsim3soi \ bsim4 \ + bsim4v2 \ + bsim4v3 \ bsim4v4 \ + bsim4v5 \ bsim3v0 \ bsim3v1 \ bsim3v1s \ diff --git a/src/spicelib/devices/bsim4v2/B4TERMS_OF_USE b/src/spicelib/devices/bsim4v2/B4TERMS_OF_USE new file mode 100644 index 000000000..446542e0a --- /dev/null +++ b/src/spicelib/devices/bsim4v2/B4TERMS_OF_USE @@ -0,0 +1,33 @@ + +The terms under which the software is provided are as the following. + +Software is distributed as is, completely without warranty or service +support. The University of California and its employees are not liable +for the condition or performance of the software. + +The University owns the copyright but shall not be liable for any +infringement of copyright or other proprietary rights brought by third +parties against the users of the software. + +The University of California hereby disclaims all implied warranties. + +The University of California grants the users the right to modify, copy, +and redistribute the software and documentation, both within the user's +organization and externally, subject to the following restrictions: + +1. The users agree not to charge for the University of California code + itself but may charge for additions, extensions, or support. + +2. In any product based on the software, the users agree to acknowledge + the UC Berkeley BSIM Research Group that developed the software. This + acknowledgment shall appear in the product documentation. + +3. The users agree to obey all U.S. Government restrictions governing + redistribution or export of the software. + +4. The users agree to reproduce any copyright notice which appears on + the software on any copy or modification of such made available + to others. + +Chenming Hu, and Weidong Liu +Oct. 2000 diff --git a/src/spicelib/devices/bsim4v2/Makefile.am b/src/spicelib/devices/bsim4v2/Makefile.am new file mode 100644 index 000000000..ee73ad0c3 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/Makefile.am @@ -0,0 +1,35 @@ +## Process this file with automake to produce Makefile.in + +noinst_LIBRARIES = libbsim4v2.a + +libbsim4v2_a_SOURCES = \ + b4v2.c \ + b4v2acld.c \ + b4v2ask.c \ + b4v2check.c \ + b4v2cvtest.c \ + b4v2del.c \ + b4v2dest.c \ + b4v2geo.c \ + b4v2getic.c \ + b4v2ld.c \ + b4v2mask.c \ + b4v2mdel.c \ + b4v2mpar.c \ + b4v2noi.c \ + b4v2par.c \ + b4v2pzld.c \ + b4v2set.c \ + b4v2temp.c \ + b4v2trunc.c \ + bsim4v2def.h \ + bsim4v2ext.h \ + bsim4v2init.c \ + bsim4v2init.h \ + bsim4v2itf.h + + + +INCLUDES = -I$(top_srcdir)/src/include + +MAINTAINERCLEANFILES = Makefile.in diff --git a/src/spicelib/devices/bsim4v2/b4v2.c b/src/spicelib/devices/bsim4v2/b4v2.c new file mode 100644 index 000000000..7b9751bac --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2.c @@ -0,0 +1,744 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include "devdefs.h" +#include "bsim4v2def.h" +#include "suffix.h" + +IFparm BSIM4v2pTable[] = { /* parameters */ +IOP( "l", BSIM4v2_L, IF_REAL , "Length"), +IOP( "w", BSIM4v2_W, IF_REAL , "Width"), +IOP( "nf", BSIM4v2_NF, IF_REAL , "Number of fingers"), +IOP( "min", BSIM4v2_MIN, IF_INTEGER , "Minimize either D or S"), +IOP( "ad", BSIM4v2_AD, IF_REAL , "Drain area"), +IOP( "as", BSIM4v2_AS, IF_REAL , "Source area"), +IOP( "pd", BSIM4v2_PD, IF_REAL , "Drain perimeter"), +IOP( "ps", BSIM4v2_PS, IF_REAL , "Source perimeter"), +IOP( "nrd", BSIM4v2_NRD, IF_REAL , "Number of squares in drain"), +IOP( "nrs", BSIM4v2_NRS, IF_REAL , "Number of squares in source"), +IOP( "off", BSIM4v2_OFF, IF_FLAG , "Device is initially off"), +IOP( "rbdb", BSIM4v2_RBDB, IF_REAL , "Body resistance"), +IOP( "rbsb", BSIM4v2_RBSB, IF_REAL , "Body resistance"), +IOP( "rbpb", BSIM4v2_RBPB, IF_REAL , "Body resistance"), +IOP( "rbps", BSIM4v2_RBPS, IF_REAL , "Body resistance"), +IOP( "rbpd", BSIM4v2_RBPD, IF_REAL , "Body resistance"), + +IOP( "trnqsmod", BSIM4v2_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"), +IOP( "acnqsmod", BSIM4v2_ACNQSMOD, IF_INTEGER, "AC NQS model selector"), +IOP( "rbodymod", BSIM4v2_RBODYMOD, IF_INTEGER, "Distributed body R model selector"), +IOP( "rgatemod", BSIM4v2_RGATEMOD, IF_INTEGER, "Gate resistance model selector"), +IOP( "geomod", BSIM4v2_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"), +IOP( "rgeomod", BSIM4v2_RGEOMOD, IF_INTEGER, "S/D resistance and contact model selector"), +IP( "ic", BSIM4v2_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"), +OP( "gmbs", BSIM4v2_GMBS, IF_REAL, "Gmb"), +OP( "gm", BSIM4v2_GM, IF_REAL, "Gm"), +OP( "gds", BSIM4v2_GDS, IF_REAL, "Gds"), +OP( "vdsat", BSIM4v2_VDSAT, IF_REAL, "Vdsat"), +OP( "vth", BSIM4v2_VON, IF_REAL, "Vth"), +OP( "id", BSIM4v2_CD, IF_REAL, "Ids"), +OP( "ibd", BSIM4v2_CBD, IF_REAL, "Ibd"), +OP( "ibs", BSIM4v2_CBS, IF_REAL, "Ibs"), +OP( "isub", BSIM4v2_CSUB, IF_REAL, "Isub"), +OP( "igidl", BSIM4v2_IGIDL, IF_REAL, "Igidl"), +OP( "igisl", BSIM4v2_IGISL, IF_REAL, "Igisl"), +OP( "igs", BSIM4v2_IGS, IF_REAL, "Igs"), +OP( "igd", BSIM4v2_IGD, IF_REAL, "Igd"), +OP( "igb", BSIM4v2_IGB, IF_REAL, "Igb"), +OP( "igcs", BSIM4v2_IGCS, IF_REAL, "Igcs"), +OP( "igcd", BSIM4v2_IGCD, IF_REAL, "Igcd"), +OP( "vbs", BSIM4v2_VBS, IF_REAL, "Vbs"), +OP( "vgs", BSIM4v2_VGS, IF_REAL, "Vgs"), +OP( "vds", BSIM4v2_VDS, IF_REAL, "Vds"), +OP( "cgg", BSIM4v2_CGGB, IF_REAL, "Cggb"), +OP( "cgs", BSIM4v2_CGSB, IF_REAL, "Cgsb"), +OP( "cgd", BSIM4v2_CGDB, IF_REAL, "Cgdb"), +OP( "cbg", BSIM4v2_CBGB, IF_REAL, "Cbgb"), +OP( "cbd", BSIM4v2_CBDB, IF_REAL, "Cbdb"), +OP( "cbs", BSIM4v2_CBSB, IF_REAL, "Cbsb"), +OP( "cdg", BSIM4v2_CDGB, IF_REAL, "Cdgb"), +OP( "cdd", BSIM4v2_CDDB, IF_REAL, "Cddb"), +OP( "cds", BSIM4v2_CDSB, IF_REAL, "Cdsb"), +OP( "csg", BSIM4v2_CSGB, IF_REAL, "Csgb"), +OP( "csd", BSIM4v2_CSDB, IF_REAL, "Csdb"), +OP( "css", BSIM4v2_CSSB, IF_REAL, "Cssb"), +OP( "cgb", BSIM4v2_CGBB, IF_REAL, "Cgbb"), +OP( "cdb", BSIM4v2_CDBB, IF_REAL, "Cdbb"), +OP( "csb", BSIM4v2_CSBB, IF_REAL, "Csbb"), +OP( "cbb", BSIM4v2_CBBB, IF_REAL, "Cbbb"), +OP( "capbd", BSIM4v2_CAPBD, IF_REAL, "Capbd"), +OP( "capbs", BSIM4v2_CAPBS, IF_REAL, "Capbs"), +OP( "qg", BSIM4v2_QG, IF_REAL, "Qgate"), +OP( "qb", BSIM4v2_QB, IF_REAL, "Qbulk"), +OP( "qd", BSIM4v2_QD, IF_REAL, "Qdrain"), +OP( "qs", BSIM4v2_QS, IF_REAL, "Qsource"), +OP( "qinv", BSIM4v2_QINV, IF_REAL, "Qinversion"), +}; + +IFparm BSIM4v2mPTable[] = { /* model parameters */ +IOP( "capmod", BSIM4v2_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"), +IOP( "diomod", BSIM4v2_MOD_DIOMOD, IF_INTEGER, "Diode IV model selector"), +IOP( "rdsmod", BSIM4v2_MOD_RDSMOD, IF_INTEGER, "Bias-dependent S/D resistance model selector"), +IOP( "trnqsmod", BSIM4v2_MOD_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"), +IOP( "acnqsmod", BSIM4v2_MOD_ACNQSMOD, IF_INTEGER, "AC NQS model selector"), +IOP( "mobmod", BSIM4v2_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"), +IOP( "rbodymod", BSIM4v2_MOD_RBODYMOD, IF_INTEGER, "Distributed body R model selector"), +IOP( "rgatemod", BSIM4v2_MOD_RGATEMOD, IF_INTEGER, "Gate R model selector"), +IOP( "permod", BSIM4v2_MOD_PERMOD, IF_INTEGER, "Pd and Ps model selector"), +IOP( "geomod", BSIM4v2_MOD_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"), +IOP( "fnoimod", BSIM4v2_MOD_FNOIMOD, IF_INTEGER, "Flicker noise model selector"), +IOP( "tnoimod", BSIM4v2_MOD_TNOIMOD, IF_INTEGER, "Thermal noise model selector"), +IOP( "igcmod", BSIM4v2_MOD_IGCMOD, IF_INTEGER, "Gate-to-channel Ig model selector"), +IOP( "igbmod", BSIM4v2_MOD_IGBMOD, IF_INTEGER, "Gate-to-body Ig model selector"), +IOP( "paramchk", BSIM4v2_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"), +IOP( "binunit", BSIM4v2_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"), +IOP( "version", BSIM4v2_MOD_VERSION, IF_STRING, "parameter for model version"), +IOP( "toxe", BSIM4v2_MOD_TOXE, IF_REAL, "Electrical gate oxide thickness in meters"), +IOP( "toxp", BSIM4v2_MOD_TOXP, IF_REAL, "Physical gate oxide thickness in meters"), +IOP( "toxm", BSIM4v2_MOD_TOXM, IF_REAL, "Gate oxide thickness at which parameters are extracted"), +IOP( "toxref", BSIM4v2_MOD_TOXREF, IF_REAL, "Target tox value"), +IOP( "dtox", BSIM4v2_MOD_DTOX, IF_REAL, "Defined as (toxe - toxp) "), +IOP( "epsrox", BSIM4v2_MOD_EPSROX, IF_REAL, "Dielectric constant of the gate oxide relative to vacuum"), +IOP( "cdsc", BSIM4v2_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), +IOP( "cdscb", BSIM4v2_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), +IOP( "cdscd", BSIM4v2_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), +IOP( "cit", BSIM4v2_MOD_CIT, IF_REAL, "Interface state capacitance"), +IOP( "nfactor", BSIM4v2_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), +IOP( "xj", BSIM4v2_MOD_XJ, IF_REAL, "Junction depth in meters"), +IOP( "vsat", BSIM4v2_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), +IOP( "at", BSIM4v2_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), +IOP( "a0", BSIM4v2_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), +IOP( "ags", BSIM4v2_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), +IOP( "a1", BSIM4v2_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), +IOP( "a2", BSIM4v2_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), +IOP( "keta", BSIM4v2_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), +IOP( "nsub", BSIM4v2_MOD_NSUB, IF_REAL, "Substrate doping concentration"), +IOP( "ndep", BSIM4v2_MOD_NDEP, IF_REAL, "Channel doping concentration at the depletion edge"), +IOP( "nsd", BSIM4v2_MOD_NSD, IF_REAL, "S/D doping concentration"), +IOP( "phin", BSIM4v2_MOD_PHIN, IF_REAL, "Adjusting parameter for surface potential due to non-uniform vertical doping"), +IOP( "ngate", BSIM4v2_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"), +IOP( "gamma1", BSIM4v2_MOD_GAMMA1, IF_REAL, "Vth body coefficient"), +IOP( "gamma2", BSIM4v2_MOD_GAMMA2, IF_REAL, "Vth body coefficient"), +IOP( "vbx", BSIM4v2_MOD_VBX, IF_REAL, "Vth transition body Voltage"), +IOP( "vbm", BSIM4v2_MOD_VBM, IF_REAL, "Maximum body voltage"), + +IOP( "xt", BSIM4v2_MOD_XT, IF_REAL, "Doping depth"), +IOP( "k1", BSIM4v2_MOD_K1, IF_REAL, "Bulk effect coefficient 1"), +IOP( "kt1", BSIM4v2_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt1l", BSIM4v2_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt2", BSIM4v2_MOD_KT2, IF_REAL, "Body-coefficient of kt1"), +IOP( "k2", BSIM4v2_MOD_K2, IF_REAL, "Bulk effect coefficient 2"), +IOP( "k3", BSIM4v2_MOD_K3, IF_REAL, "Narrow width effect coefficient"), +IOP( "k3b", BSIM4v2_MOD_K3B, IF_REAL, "Body effect coefficient of k3"), +IOP( "w0", BSIM4v2_MOD_W0, IF_REAL, "Narrow width effect parameter"), +IOP( "dvtp0", BSIM4v2_MOD_DVTP0, IF_REAL, "First parameter for Vth shift due to pocket"), +IOP( "dvtp1", BSIM4v2_MOD_DVTP1, IF_REAL, "Second parameter for Vth shift due to pocket"), +IOP( "lpe0", BSIM4v2_MOD_LPE0, IF_REAL, "Equivalent length of pocket region at zero bias"), +IOP( "lpeb", BSIM4v2_MOD_LPEB, IF_REAL, "Equivalent length of pocket region accounting for body bias"), +IOP( "dvt0", BSIM4v2_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"), +IOP( "dvt1", BSIM4v2_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"), +IOP( "dvt2", BSIM4v2_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"), +IOP( "dvt0w", BSIM4v2_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"), +IOP( "dvt1w", BSIM4v2_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"), +IOP( "dvt2w", BSIM4v2_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"), +IOP( "drout", BSIM4v2_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"), +IOP( "dsub", BSIM4v2_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"), +IOP( "vth0", BSIM4v2_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "vtho", BSIM4v2_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "ua", BSIM4v2_MOD_UA, IF_REAL, "Linear gate dependence of mobility"), +IOP( "ua1", BSIM4v2_MOD_UA1, IF_REAL, "Temperature coefficient of ua"), +IOP( "ub", BSIM4v2_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"), +IOP( "ub1", BSIM4v2_MOD_UB1, IF_REAL, "Temperature coefficient of ub"), +IOP( "uc", BSIM4v2_MOD_UC, IF_REAL, "Body-bias dependence of mobility"), +IOP( "uc1", BSIM4v2_MOD_UC1, IF_REAL, "Temperature coefficient of uc"), +IOP( "u0", BSIM4v2_MOD_U0, IF_REAL, "Low-field mobility at Tnom"), +IOP( "eu", BSIM4v2_MOD_EU, IF_REAL, "Mobility exponent"), +IOP( "ute", BSIM4v2_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"), +IOP( "voff", BSIM4v2_MOD_VOFF, IF_REAL, "Threshold voltage offset"), +IOP( "minv", BSIM4v2_MOD_MINV, IF_REAL, "Fitting parameter for moderate invversion in Vgsteff"), +IOP( "voffl", BSIM4v2_MOD_VOFFL, IF_REAL, "Length dependence parameter for Vth offset"), +IOP( "tnom", BSIM4v2_MOD_TNOM, IF_REAL, "Parameter measurement temperature"), +IOP( "cgso", BSIM4v2_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"), +IOP( "cgdo", BSIM4v2_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"), +IOP( "cgbo", BSIM4v2_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"), +IOP( "xpart", BSIM4v2_MOD_XPART, IF_REAL, "Channel charge partitioning"), +IOP( "delta", BSIM4v2_MOD_DELTA, IF_REAL, "Effective Vds parameter"), +IOP( "rsh", BSIM4v2_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), +IOP( "rdsw", BSIM4v2_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), +IOP( "rdswmin", BSIM4v2_MOD_RDSWMIN, IF_REAL, "Source-drain resistance per width at high Vg"), +IOP( "rsw", BSIM4v2_MOD_RSW, IF_REAL, "Source resistance per width"), +IOP( "rdw", BSIM4v2_MOD_RDW, IF_REAL, "Drain resistance per width"), +IOP( "rdwmin", BSIM4v2_MOD_RDWMIN, IF_REAL, "Drain resistance per width at high Vg"), +IOP( "rswmin", BSIM4v2_MOD_RSWMIN, IF_REAL, "Source resistance per width at high Vg"), + +IOP( "prwg", BSIM4v2_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), +IOP( "prwb", BSIM4v2_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), + +IOP( "prt", BSIM4v2_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), +IOP( "eta0", BSIM4v2_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "etab", BSIM4v2_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "pclm", BSIM4v2_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), +IOP( "pdiblc1", BSIM4v2_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblc2", BSIM4v2_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblcb", BSIM4v2_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), +IOP( "fprout", BSIM4v2_MOD_FPROUT, IF_REAL, "Rout degradation coefficient for pocket devices"), +IOP( "pdits", BSIM4v2_MOD_PDITS, IF_REAL, "Coefficient for drain-induced Vth shifts"), +IOP( "pditsl", BSIM4v2_MOD_PDITSL, IF_REAL, "Length dependence of drain-induced Vth shifts"), +IOP( "pditsd", BSIM4v2_MOD_PDITSD, IF_REAL, "Vds dependence of drain-induced Vth shifts"), +IOP( "pscbe1", BSIM4v2_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pscbe2", BSIM4v2_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pvag", BSIM4v2_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), + +IOP( "jss", BSIM4v2_MOD_JSS, IF_REAL, "Bottom source junction reverse saturation current density"), +IOP( "jsws", BSIM4v2_MOD_JSWS, IF_REAL, "Isolation edge sidewall source junction reverse saturation current density"), +IOP( "jswgs", BSIM4v2_MOD_JSWGS, IF_REAL, "Gate edge source junction reverse saturation current density"), +IOP( "pbs", BSIM4v2_MOD_PBS, IF_REAL, "Source junction built-in potential"), +IOP( "njs", BSIM4v2_MOD_NJS, IF_REAL, "Source junction emission coefficient"), +IOP( "xtis", BSIM4v2_MOD_XTIS, IF_REAL, "Source junction current temperature exponent"), +IOP( "mjs", BSIM4v2_MOD_MJS, IF_REAL, "Source bottom junction capacitance grading coefficient"), +IOP( "pbsws", BSIM4v2_MOD_PBSWS, IF_REAL, "Source sidewall junction capacitance built in potential"), +IOP( "mjsws", BSIM4v2_MOD_MJSWS, IF_REAL, "Source sidewall junction capacitance grading coefficient"), +IOP( "pbswgs", BSIM4v2_MOD_PBSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswgs", BSIM4v2_MOD_MJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cjs", BSIM4v2_MOD_CJS, IF_REAL, "Source bottom junction capacitance per unit area"), +IOP( "cjsws", BSIM4v2_MOD_CJSWS, IF_REAL, "Source sidewall junction capacitance per unit periphery"), +IOP( "cjswgs", BSIM4v2_MOD_CJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance per unit width"), + +IOP( "jsd", BSIM4v2_MOD_JSD, IF_REAL, "Bottom drain junction reverse saturation current density"), +IOP( "jswd", BSIM4v2_MOD_JSWD, IF_REAL, "Isolation edge sidewall drain junction reverse saturation current density"), +IOP( "jswgd", BSIM4v2_MOD_JSWGD, IF_REAL, "Gate edge drain junction reverse saturation current density"), +IOP( "pbd", BSIM4v2_MOD_PBD, IF_REAL, "Drain junction built-in potential"), +IOP( "njd", BSIM4v2_MOD_NJD, IF_REAL, "Drain junction emission coefficient"), +IOP( "xtid", BSIM4v2_MOD_XTID, IF_REAL, "Drainjunction current temperature exponent"), +IOP( "mjd", BSIM4v2_MOD_MJD, IF_REAL, "Drain bottom junction capacitance grading coefficient"), +IOP( "pbswd", BSIM4v2_MOD_PBSWD, IF_REAL, "Drain sidewall junction capacitance built in potential"), +IOP( "mjswd", BSIM4v2_MOD_MJSWD, IF_REAL, "Drain sidewall junction capacitance grading coefficient"), +IOP( "pbswgd", BSIM4v2_MOD_PBSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswgd", BSIM4v2_MOD_MJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cjd", BSIM4v2_MOD_CJD, IF_REAL, "Drain bottom junction capacitance per unit area"), +IOP( "cjswd", BSIM4v2_MOD_CJSWD, IF_REAL, "Drain sidewall junction capacitance per unit periphery"), +IOP( "cjswgd", BSIM4v2_MOD_CJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance per unit width"), + +IOP( "vfbcv", BSIM4v2_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"), +IOP( "vfb", BSIM4v2_MOD_VFB, IF_REAL, "Flat Band Voltage"), +IOP( "tpb", BSIM4v2_MOD_TPB, IF_REAL, "Temperature coefficient of pb"), +IOP( "tcj", BSIM4v2_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"), +IOP( "tpbsw", BSIM4v2_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"), +IOP( "tcjsw", BSIM4v2_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"), +IOP( "tpbswg", BSIM4v2_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"), +IOP( "tcjswg", BSIM4v2_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"), +IOP( "acde", BSIM4v2_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"), +IOP( "moin", BSIM4v2_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"), +IOP( "noff", BSIM4v2_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"), +IOP( "voffcv", BSIM4v2_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"), +IOP( "dmcg", BSIM4v2_MOD_DMCG, IF_REAL, "Distance of Mid-Contact to Gate edge"), +IOP( "dmci", BSIM4v2_MOD_DMCI, IF_REAL, "Distance of Mid-Contact to Isolation"), +IOP( "dmdg", BSIM4v2_MOD_DMDG, IF_REAL, "Distance of Mid-Diffusion to Gate edge"), +IOP( "dmcgt", BSIM4v2_MOD_DMCGT, IF_REAL, "Distance of Mid-Contact to Gate edge in Test structures"), +IOP( "xgw", BSIM4v2_MOD_XGW, IF_REAL, "Distance from gate contact center to device edge"), +IOP( "xgl", BSIM4v2_MOD_XGL, IF_REAL, "Variation in Ldrawn"), +IOP( "rshg", BSIM4v2_MOD_RSHG, IF_REAL, "Gate sheet resistance"), +IOP( "ngcon", BSIM4v2_MOD_NGCON, IF_REAL, "Number of gate contacts"), +IOP( "xrcrg1", BSIM4v2_MOD_XRCRG1, IF_REAL, "First fitting parameter the bias-dependent Rg"), +IOP( "xrcrg2", BSIM4v2_MOD_XRCRG2, IF_REAL, "Second fitting parameter the bias-dependent Rg"), +IOP( "lint", BSIM4v2_MOD_LINT, IF_REAL, "Length reduction parameter"), +IOP( "ll", BSIM4v2_MOD_LL, IF_REAL, "Length reduction parameter"), +IOP( "llc", BSIM4v2_MOD_LLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lln", BSIM4v2_MOD_LLN, IF_REAL, "Length reduction parameter"), +IOP( "lw", BSIM4v2_MOD_LW, IF_REAL, "Length reduction parameter"), +IOP( "lwc", BSIM4v2_MOD_LWC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lwn", BSIM4v2_MOD_LWN, IF_REAL, "Length reduction parameter"), +IOP( "lwl", BSIM4v2_MOD_LWL, IF_REAL, "Length reduction parameter"), +IOP( "lwlc", BSIM4v2_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lmin", BSIM4v2_MOD_LMIN, IF_REAL, "Minimum length for the model"), +IOP( "lmax", BSIM4v2_MOD_LMAX, IF_REAL, "Maximum length for the model"), + +IOP( "wr", BSIM4v2_MOD_WR, IF_REAL, "Width dependence of rds"), +IOP( "wint", BSIM4v2_MOD_WINT, IF_REAL, "Width reduction parameter"), +IOP( "dwg", BSIM4v2_MOD_DWG, IF_REAL, "Width reduction parameter"), +IOP( "dwb", BSIM4v2_MOD_DWB, IF_REAL, "Width reduction parameter"), + +IOP( "wl", BSIM4v2_MOD_WL, IF_REAL, "Width reduction parameter"), +IOP( "wlc", BSIM4v2_MOD_WLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wln", BSIM4v2_MOD_WLN, IF_REAL, "Width reduction parameter"), +IOP( "ww", BSIM4v2_MOD_WW, IF_REAL, "Width reduction parameter"), +IOP( "wwc", BSIM4v2_MOD_WWC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wwn", BSIM4v2_MOD_WWN, IF_REAL, "Width reduction parameter"), +IOP( "wwl", BSIM4v2_MOD_WWL, IF_REAL, "Width reduction parameter"), +IOP( "wwlc", BSIM4v2_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wmin", BSIM4v2_MOD_WMIN, IF_REAL, "Minimum width for the model"), +IOP( "wmax", BSIM4v2_MOD_WMAX, IF_REAL, "Maximum width for the model"), + +IOP( "b0", BSIM4v2_MOD_B0, IF_REAL, "Abulk narrow width parameter"), +IOP( "b1", BSIM4v2_MOD_B1, IF_REAL, "Abulk narrow width parameter"), + +IOP( "cgsl", BSIM4v2_MOD_CGSL, IF_REAL, "New C-V model parameter"), +IOP( "cgdl", BSIM4v2_MOD_CGDL, IF_REAL, "New C-V model parameter"), +IOP( "ckappas", BSIM4v2_MOD_CKAPPAS, IF_REAL, "S/G overlap C-V parameter "), +IOP( "ckappad", BSIM4v2_MOD_CKAPPAD, IF_REAL, "D/G overlap C-V parameter"), +IOP( "cf", BSIM4v2_MOD_CF, IF_REAL, "Fringe capacitance parameter"), +IOP( "clc", BSIM4v2_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "cle", BSIM4v2_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "dwc", BSIM4v2_MOD_DWC, IF_REAL, "Delta W for C-V model"), +IOP( "dlc", BSIM4v2_MOD_DLC, IF_REAL, "Delta L for C-V model"), +IOP( "xw", BSIM4v2_MOD_XW, IF_REAL, "W offset for channel width due to mask/etch effect"), +IOP( "xl", BSIM4v2_MOD_XL, IF_REAL, "L offset for channel length due to mask/etch effect"), +IOP( "dlcig", BSIM4v2_MOD_DLCIG, IF_REAL, "Delta L for Ig model"), +IOP( "dwj", BSIM4v2_MOD_DWJ, IF_REAL, "Delta W for S/D junctions"), + +IOP( "alpha0", BSIM4v2_MOD_ALPHA0, IF_REAL, "substrate current model parameter"), +IOP( "alpha1", BSIM4v2_MOD_ALPHA1, IF_REAL, "substrate current model parameter"), +IOP( "beta0", BSIM4v2_MOD_BETA0, IF_REAL, "substrate current model parameter"), +IOP( "agidl", BSIM4v2_MOD_AGIDL, IF_REAL, "Pre-exponential constant for GIDL"), +IOP( "bgidl", BSIM4v2_MOD_BGIDL, IF_REAL, "Exponential constant for GIDL"), +IOP( "cgidl", BSIM4v2_MOD_CGIDL, IF_REAL, "Parameter for body-bias dependence of GIDL"), +IOP( "egidl", BSIM4v2_MOD_EGIDL, IF_REAL, "Fitting parameter for Bandbending"), +IOP( "aigc", BSIM4v2_MOD_AIGC, IF_REAL, "Parameter for Igc"), +IOP( "bigc", BSIM4v2_MOD_BIGC, IF_REAL, "Parameter for Igc"), +IOP( "cigc", BSIM4v2_MOD_CIGC, IF_REAL, "Parameter for Igc"), +IOP( "aigsd", BSIM4v2_MOD_AIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "bigsd", BSIM4v2_MOD_BIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "cigsd", BSIM4v2_MOD_CIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "aigbacc", BSIM4v2_MOD_AIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "bigbacc", BSIM4v2_MOD_BIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "cigbacc", BSIM4v2_MOD_CIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "aigbinv", BSIM4v2_MOD_AIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "bigbinv", BSIM4v2_MOD_BIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "cigbinv", BSIM4v2_MOD_CIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "nigc", BSIM4v2_MOD_NIGC, IF_REAL, "Parameter for Igc slope"), +IOP( "nigbinv", BSIM4v2_MOD_NIGBINV, IF_REAL, "Parameter for Igbinv slope"), +IOP( "nigbacc", BSIM4v2_MOD_NIGBACC, IF_REAL, "Parameter for Igbacc slope"), +IOP( "ntox", BSIM4v2_MOD_NTOX, IF_REAL, "Exponent for Tox ratio"), +IOP( "eigbinv", BSIM4v2_MOD_EIGBINV, IF_REAL, "Parameter for the Si bandgap for Igbinv"), +IOP( "pigcd", BSIM4v2_MOD_PIGCD, IF_REAL, "Parameter for Igc partition"), +IOP( "poxedge", BSIM4v2_MOD_POXEDGE, IF_REAL, "Factor for the gate edge Tox"), + +IOP( "ijthdfwd", BSIM4v2_MOD_IJTHDFWD, IF_REAL, "Forward drain diode forward limiting current"), +IOP( "ijthsfwd", BSIM4v2_MOD_IJTHSFWD, IF_REAL, "Forward source diode forward limiting current"), +IOP( "ijthdrev", BSIM4v2_MOD_IJTHDREV, IF_REAL, "Reverse drain diode forward limiting current"), +IOP( "ijthsrev", BSIM4v2_MOD_IJTHSREV, IF_REAL, "Reverse source diode forward limiting current"), +IOP( "xjbvd", BSIM4v2_MOD_XJBVD, IF_REAL, "Fitting parameter for drain diode breakdown current"), +IOP( "xjbvs", BSIM4v2_MOD_XJBVS, IF_REAL, "Fitting parameter for source diode breakdown current"), +IOP( "bvd", BSIM4v2_MOD_BVD, IF_REAL, "Drain diode breakdown voltage"), +IOP( "bvs", BSIM4v2_MOD_BVS, IF_REAL, "Source diode breakdown voltage"), + +IOP( "gbmin", BSIM4v2_MOD_GBMIN, IF_REAL, "Minimum body conductance"), +IOP( "rbdb", BSIM4v2_MOD_RBDB, IF_REAL, "Resistance between bNode and dbNode"), +IOP( "rbpb", BSIM4v2_MOD_RBPB, IF_REAL, "Resistance between bNodePrime and bNode"), +IOP( "rbsb", BSIM4v2_MOD_RBSB, IF_REAL, "Resistance between bNode and sbNode"), +IOP( "rbps", BSIM4v2_MOD_RBPS, IF_REAL, "Resistance between bNodePrime and sbNode"), +IOP( "rbpd", BSIM4v2_MOD_RBPD, IF_REAL, "Resistance between bNodePrime and bNode"), + +IOP( "lcdsc", BSIM4v2_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"), +IOP( "lcdscb", BSIM4v2_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"), +IOP( "lcdscd", BSIM4v2_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"), +IOP( "lcit", BSIM4v2_MOD_LCIT, IF_REAL, "Length dependence of cit"), +IOP( "lnfactor", BSIM4v2_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"), +IOP( "lxj", BSIM4v2_MOD_LXJ, IF_REAL, "Length dependence of xj"), +IOP( "lvsat", BSIM4v2_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), +IOP( "lat", BSIM4v2_MOD_LAT, IF_REAL, "Length dependence of at"), +IOP( "la0", BSIM4v2_MOD_LA0, IF_REAL, "Length dependence of a0"), +IOP( "lags", BSIM4v2_MOD_LAGS, IF_REAL, "Length dependence of ags"), +IOP( "la1", BSIM4v2_MOD_LA1, IF_REAL, "Length dependence of a1"), +IOP( "la2", BSIM4v2_MOD_LA2, IF_REAL, "Length dependence of a2"), +IOP( "lketa", BSIM4v2_MOD_LKETA, IF_REAL, "Length dependence of keta"), +IOP( "lnsub", BSIM4v2_MOD_LNSUB, IF_REAL, "Length dependence of nsub"), +IOP( "lndep", BSIM4v2_MOD_LNDEP, IF_REAL, "Length dependence of ndep"), +IOP( "lnsd", BSIM4v2_MOD_LNSD, IF_REAL, "Length dependence of nsd"), +IOP( "lphin", BSIM4v2_MOD_LPHIN, IF_REAL, "Length dependence of phin"), +IOP( "lngate", BSIM4v2_MOD_LNGATE, IF_REAL, "Length dependence of ngate"), +IOP( "lgamma1", BSIM4v2_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"), +IOP( "lgamma2", BSIM4v2_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"), +IOP( "lvbx", BSIM4v2_MOD_LVBX, IF_REAL, "Length dependence of vbx"), +IOP( "lvbm", BSIM4v2_MOD_LVBM, IF_REAL, "Length dependence of vbm"), +IOP( "lxt", BSIM4v2_MOD_LXT, IF_REAL, "Length dependence of xt"), +IOP( "lk1", BSIM4v2_MOD_LK1, IF_REAL, "Length dependence of k1"), +IOP( "lkt1", BSIM4v2_MOD_LKT1, IF_REAL, "Length dependence of kt1"), +IOP( "lkt1l", BSIM4v2_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"), +IOP( "lkt2", BSIM4v2_MOD_LKT2, IF_REAL, "Length dependence of kt2"), +IOP( "lk2", BSIM4v2_MOD_LK2, IF_REAL, "Length dependence of k2"), +IOP( "lk3", BSIM4v2_MOD_LK3, IF_REAL, "Length dependence of k3"), +IOP( "lk3b", BSIM4v2_MOD_LK3B, IF_REAL, "Length dependence of k3b"), +IOP( "lw0", BSIM4v2_MOD_LW0, IF_REAL, "Length dependence of w0"), +IOP( "ldvtp0", BSIM4v2_MOD_LDVTP0, IF_REAL, "Length dependence of dvtp0"), +IOP( "ldvtp1", BSIM4v2_MOD_LDVTP1, IF_REAL, "Length dependence of dvtp1"), +IOP( "llpe0", BSIM4v2_MOD_LLPE0, IF_REAL, "Length dependence of lpe0"), +IOP( "llpeb", BSIM4v2_MOD_LLPEB, IF_REAL, "Length dependence of lpeb"), +IOP( "ldvt0", BSIM4v2_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"), +IOP( "ldvt1", BSIM4v2_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"), +IOP( "ldvt2", BSIM4v2_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"), +IOP( "ldvt0w", BSIM4v2_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"), +IOP( "ldvt1w", BSIM4v2_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"), +IOP( "ldvt2w", BSIM4v2_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"), +IOP( "ldrout", BSIM4v2_MOD_LDROUT, IF_REAL, "Length dependence of drout"), +IOP( "ldsub", BSIM4v2_MOD_LDSUB, IF_REAL, "Length dependence of dsub"), +IOP( "lvth0", BSIM4v2_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lvtho", BSIM4v2_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lua", BSIM4v2_MOD_LUA, IF_REAL, "Length dependence of ua"), +IOP( "lua1", BSIM4v2_MOD_LUA1, IF_REAL, "Length dependence of ua1"), +IOP( "lub", BSIM4v2_MOD_LUB, IF_REAL, "Length dependence of ub"), +IOP( "lub1", BSIM4v2_MOD_LUB1, IF_REAL, "Length dependence of ub1"), +IOP( "luc", BSIM4v2_MOD_LUC, IF_REAL, "Length dependence of uc"), +IOP( "luc1", BSIM4v2_MOD_LUC1, IF_REAL, "Length dependence of uc1"), +IOP( "lu0", BSIM4v2_MOD_LU0, IF_REAL, "Length dependence of u0"), +IOP( "lute", BSIM4v2_MOD_LUTE, IF_REAL, "Length dependence of ute"), +IOP( "lvoff", BSIM4v2_MOD_LVOFF, IF_REAL, "Length dependence of voff"), +IOP( "lminv", BSIM4v2_MOD_LMINV, IF_REAL, "Length dependence of minv"), +IOP( "ldelta", BSIM4v2_MOD_LDELTA, IF_REAL, "Length dependence of delta"), +IOP( "lrdsw", BSIM4v2_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), +IOP( "lrsw", BSIM4v2_MOD_LRSW, IF_REAL, "Length dependence of rsw"), +IOP( "lrdw", BSIM4v2_MOD_LRDW, IF_REAL, "Length dependence of rdw"), + +IOP( "lprwg", BSIM4v2_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), +IOP( "lprwb", BSIM4v2_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), + +IOP( "lprt", BSIM4v2_MOD_LPRT, IF_REAL, "Length dependence of prt "), +IOP( "leta0", BSIM4v2_MOD_LETA0, IF_REAL, "Length dependence of eta0"), +IOP( "letab", BSIM4v2_MOD_LETAB, IF_REAL, "Length dependence of etab"), +IOP( "lpclm", BSIM4v2_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), +IOP( "lpdiblc1", BSIM4v2_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), +IOP( "lpdiblc2", BSIM4v2_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), +IOP( "lpdiblcb", BSIM4v2_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lfprout", BSIM4v2_MOD_LFPROUT, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lpdits", BSIM4v2_MOD_LPDITS, IF_REAL, "Length dependence of pdits"), +IOP( "lpditsd", BSIM4v2_MOD_LPDITSD, IF_REAL, "Length dependence of pditsd"), +IOP( "lpscbe1", BSIM4v2_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), +IOP( "lpscbe2", BSIM4v2_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), +IOP( "lpvag", BSIM4v2_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), +IOP( "lwr", BSIM4v2_MOD_LWR, IF_REAL, "Length dependence of wr"), +IOP( "ldwg", BSIM4v2_MOD_LDWG, IF_REAL, "Length dependence of dwg"), +IOP( "ldwb", BSIM4v2_MOD_LDWB, IF_REAL, "Length dependence of dwb"), +IOP( "lb0", BSIM4v2_MOD_LB0, IF_REAL, "Length dependence of b0"), +IOP( "lb1", BSIM4v2_MOD_LB1, IF_REAL, "Length dependence of b1"), +IOP( "lcgsl", BSIM4v2_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"), +IOP( "lcgdl", BSIM4v2_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"), +IOP( "lckappas", BSIM4v2_MOD_LCKAPPAS, IF_REAL, "Length dependence of ckappas"), +IOP( "lckappad", BSIM4v2_MOD_LCKAPPAD, IF_REAL, "Length dependence of ckappad"), +IOP( "lcf", BSIM4v2_MOD_LCF, IF_REAL, "Length dependence of cf"), +IOP( "lclc", BSIM4v2_MOD_LCLC, IF_REAL, "Length dependence of clc"), +IOP( "lcle", BSIM4v2_MOD_LCLE, IF_REAL, "Length dependence of cle"), +IOP( "lalpha0", BSIM4v2_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"), +IOP( "lalpha1", BSIM4v2_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"), +IOP( "lbeta0", BSIM4v2_MOD_LBETA0, IF_REAL, "Length dependence of beta0"), +IOP( "lagidl", BSIM4v2_MOD_LAGIDL, IF_REAL, "Length dependence of agidl"), +IOP( "lbgidl", BSIM4v2_MOD_LBGIDL, IF_REAL, "Length dependence of bgidl"), +IOP( "lcgidl", BSIM4v2_MOD_LCGIDL, IF_REAL, "Length dependence of cgidl"), +IOP( "legidl", BSIM4v2_MOD_LEGIDL, IF_REAL, "Length dependence of egidl"), +IOP( "laigc", BSIM4v2_MOD_LAIGC, IF_REAL, "Length dependence of aigc"), +IOP( "lbigc", BSIM4v2_MOD_LBIGC, IF_REAL, "Length dependence of bigc"), +IOP( "lcigc", BSIM4v2_MOD_LCIGC, IF_REAL, "Length dependence of cigc"), +IOP( "laigsd", BSIM4v2_MOD_LAIGSD, IF_REAL, "Length dependence of aigsd"), +IOP( "lbigsd", BSIM4v2_MOD_LBIGSD, IF_REAL, "Length dependence of bigsd"), +IOP( "lcigsd", BSIM4v2_MOD_LCIGSD, IF_REAL, "Length dependence of cigsd"), +IOP( "laigbacc", BSIM4v2_MOD_LAIGBACC, IF_REAL, "Length dependence of aigbacc"), +IOP( "lbigbacc", BSIM4v2_MOD_LBIGBACC, IF_REAL, "Length dependence of bigbacc"), +IOP( "lcigbacc", BSIM4v2_MOD_LCIGBACC, IF_REAL, "Length dependence of cigbacc"), +IOP( "laigbinv", BSIM4v2_MOD_LAIGBINV, IF_REAL, "Length dependence of aigbinv"), +IOP( "lbigbinv", BSIM4v2_MOD_LBIGBINV, IF_REAL, "Length dependence of bigbinv"), +IOP( "lcigbinv", BSIM4v2_MOD_LCIGBINV, IF_REAL, "Length dependence of cigbinv"), +IOP( "lnigc", BSIM4v2_MOD_LNIGC, IF_REAL, "Length dependence of nigc"), +IOP( "lnigbinv", BSIM4v2_MOD_LNIGBINV, IF_REAL, "Length dependence of nigbinv"), +IOP( "lnigbacc", BSIM4v2_MOD_LNIGBACC, IF_REAL, "Length dependence of nigbacc"), +IOP( "lntox", BSIM4v2_MOD_LNTOX, IF_REAL, "Length dependence of ntox"), +IOP( "leigbinv", BSIM4v2_MOD_LEIGBINV, IF_REAL, "Length dependence for eigbinv"), +IOP( "lpigcd", BSIM4v2_MOD_LPIGCD, IF_REAL, "Length dependence for pigcd"), +IOP( "lpoxedge", BSIM4v2_MOD_LPOXEDGE, IF_REAL, "Length dependence for poxedge"), + +IOP( "lvfbcv", BSIM4v2_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"), +IOP( "lvfb", BSIM4v2_MOD_LVFB, IF_REAL, "Length dependence of vfb"), +IOP( "lacde", BSIM4v2_MOD_LACDE, IF_REAL, "Length dependence of acde"), +IOP( "lmoin", BSIM4v2_MOD_LMOIN, IF_REAL, "Length dependence of moin"), +IOP( "lnoff", BSIM4v2_MOD_LNOFF, IF_REAL, "Length dependence of noff"), +IOP( "lvoffcv", BSIM4v2_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"), +IOP( "lxrcrg1", BSIM4v2_MOD_LXRCRG1, IF_REAL, "Length dependence of xrcrg1"), +IOP( "lxrcrg2", BSIM4v2_MOD_LXRCRG2, IF_REAL, "Length dependence of xrcrg2"), +IOP( "leu", BSIM4v2_MOD_LEU, IF_REAL, "Length dependence of eu"), +IOP( "wcdsc", BSIM4v2_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), +IOP( "wcdscb", BSIM4v2_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), +IOP( "wcdscd", BSIM4v2_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), +IOP( "wcit", BSIM4v2_MOD_WCIT, IF_REAL, "Width dependence of cit"), +IOP( "wnfactor", BSIM4v2_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), +IOP( "wxj", BSIM4v2_MOD_WXJ, IF_REAL, "Width dependence of xj"), +IOP( "wvsat", BSIM4v2_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), +IOP( "wat", BSIM4v2_MOD_WAT, IF_REAL, "Width dependence of at"), +IOP( "wa0", BSIM4v2_MOD_WA0, IF_REAL, "Width dependence of a0"), +IOP( "wags", BSIM4v2_MOD_WAGS, IF_REAL, "Width dependence of ags"), +IOP( "wa1", BSIM4v2_MOD_WA1, IF_REAL, "Width dependence of a1"), +IOP( "wa2", BSIM4v2_MOD_WA2, IF_REAL, "Width dependence of a2"), +IOP( "wketa", BSIM4v2_MOD_WKETA, IF_REAL, "Width dependence of keta"), +IOP( "wnsub", BSIM4v2_MOD_WNSUB, IF_REAL, "Width dependence of nsub"), +IOP( "wndep", BSIM4v2_MOD_WNDEP, IF_REAL, "Width dependence of ndep"), +IOP( "wnsd", BSIM4v2_MOD_WNSD, IF_REAL, "Width dependence of nsd"), +IOP( "wphin", BSIM4v2_MOD_WPHIN, IF_REAL, "Width dependence of phin"), +IOP( "wngate", BSIM4v2_MOD_WNGATE, IF_REAL, "Width dependence of ngate"), +IOP( "wgamma1", BSIM4v2_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"), +IOP( "wgamma2", BSIM4v2_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"), +IOP( "wvbx", BSIM4v2_MOD_WVBX, IF_REAL, "Width dependence of vbx"), +IOP( "wvbm", BSIM4v2_MOD_WVBM, IF_REAL, "Width dependence of vbm"), +IOP( "wxt", BSIM4v2_MOD_WXT, IF_REAL, "Width dependence of xt"), +IOP( "wk1", BSIM4v2_MOD_WK1, IF_REAL, "Width dependence of k1"), +IOP( "wkt1", BSIM4v2_MOD_WKT1, IF_REAL, "Width dependence of kt1"), +IOP( "wkt1l", BSIM4v2_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"), +IOP( "wkt2", BSIM4v2_MOD_WKT2, IF_REAL, "Width dependence of kt2"), +IOP( "wk2", BSIM4v2_MOD_WK2, IF_REAL, "Width dependence of k2"), +IOP( "wk3", BSIM4v2_MOD_WK3, IF_REAL, "Width dependence of k3"), +IOP( "wk3b", BSIM4v2_MOD_WK3B, IF_REAL, "Width dependence of k3b"), +IOP( "ww0", BSIM4v2_MOD_WW0, IF_REAL, "Width dependence of w0"), +IOP( "wdvtp0", BSIM4v2_MOD_WDVTP0, IF_REAL, "Width dependence of dvtp0"), +IOP( "wdvtp1", BSIM4v2_MOD_WDVTP1, IF_REAL, "Width dependence of dvtp1"), +IOP( "wlpe0", BSIM4v2_MOD_WLPE0, IF_REAL, "Width dependence of lpe0"), +IOP( "wlpeb", BSIM4v2_MOD_WLPEB, IF_REAL, "Width dependence of lpeb"), +IOP( "wdvt0", BSIM4v2_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"), +IOP( "wdvt1", BSIM4v2_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"), +IOP( "wdvt2", BSIM4v2_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"), +IOP( "wdvt0w", BSIM4v2_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"), +IOP( "wdvt1w", BSIM4v2_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"), +IOP( "wdvt2w", BSIM4v2_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"), +IOP( "wdrout", BSIM4v2_MOD_WDROUT, IF_REAL, "Width dependence of drout"), +IOP( "wdsub", BSIM4v2_MOD_WDSUB, IF_REAL, "Width dependence of dsub"), +IOP( "wvth0", BSIM4v2_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wvtho", BSIM4v2_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wua", BSIM4v2_MOD_WUA, IF_REAL, "Width dependence of ua"), +IOP( "wua1", BSIM4v2_MOD_WUA1, IF_REAL, "Width dependence of ua1"), +IOP( "wub", BSIM4v2_MOD_WUB, IF_REAL, "Width dependence of ub"), +IOP( "wub1", BSIM4v2_MOD_WUB1, IF_REAL, "Width dependence of ub1"), +IOP( "wuc", BSIM4v2_MOD_WUC, IF_REAL, "Width dependence of uc"), +IOP( "wuc1", BSIM4v2_MOD_WUC1, IF_REAL, "Width dependence of uc1"), +IOP( "wu0", BSIM4v2_MOD_WU0, IF_REAL, "Width dependence of u0"), +IOP( "wute", BSIM4v2_MOD_WUTE, IF_REAL, "Width dependence of ute"), +IOP( "wvoff", BSIM4v2_MOD_WVOFF, IF_REAL, "Width dependence of voff"), +IOP( "wminv", BSIM4v2_MOD_WMINV, IF_REAL, "Width dependence of minv"), +IOP( "wdelta", BSIM4v2_MOD_WDELTA, IF_REAL, "Width dependence of delta"), +IOP( "wrdsw", BSIM4v2_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "), +IOP( "wrsw", BSIM4v2_MOD_WRSW, IF_REAL, "Width dependence of rsw"), +IOP( "wrdw", BSIM4v2_MOD_WRDW, IF_REAL, "Width dependence of rdw"), + +IOP( "wprwg", BSIM4v2_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), +IOP( "wprwb", BSIM4v2_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), + +IOP( "wprt", BSIM4v2_MOD_WPRT, IF_REAL, "Width dependence of prt"), +IOP( "weta0", BSIM4v2_MOD_WETA0, IF_REAL, "Width dependence of eta0"), +IOP( "wetab", BSIM4v2_MOD_WETAB, IF_REAL, "Width dependence of etab"), +IOP( "wpclm", BSIM4v2_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), +IOP( "wpdiblc1", BSIM4v2_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), +IOP( "wpdiblc2", BSIM4v2_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), +IOP( "wpdiblcb", BSIM4v2_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wfprout", BSIM4v2_MOD_WFPROUT, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wpdits", BSIM4v2_MOD_WPDITS, IF_REAL, "Width dependence of pdits"), +IOP( "wpditsd", BSIM4v2_MOD_WPDITSD, IF_REAL, "Width dependence of pditsd"), +IOP( "wpscbe1", BSIM4v2_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), +IOP( "wpscbe2", BSIM4v2_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), +IOP( "wpvag", BSIM4v2_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), +IOP( "wwr", BSIM4v2_MOD_WWR, IF_REAL, "Width dependence of wr"), +IOP( "wdwg", BSIM4v2_MOD_WDWG, IF_REAL, "Width dependence of dwg"), +IOP( "wdwb", BSIM4v2_MOD_WDWB, IF_REAL, "Width dependence of dwb"), +IOP( "wb0", BSIM4v2_MOD_WB0, IF_REAL, "Width dependence of b0"), +IOP( "wb1", BSIM4v2_MOD_WB1, IF_REAL, "Width dependence of b1"), +IOP( "wcgsl", BSIM4v2_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"), +IOP( "wcgdl", BSIM4v2_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"), +IOP( "wckappas", BSIM4v2_MOD_WCKAPPAS, IF_REAL, "Width dependence of ckappas"), +IOP( "wckappad", BSIM4v2_MOD_WCKAPPAD, IF_REAL, "Width dependence of ckappad"), +IOP( "wcf", BSIM4v2_MOD_WCF, IF_REAL, "Width dependence of cf"), +IOP( "wclc", BSIM4v2_MOD_WCLC, IF_REAL, "Width dependence of clc"), +IOP( "wcle", BSIM4v2_MOD_WCLE, IF_REAL, "Width dependence of cle"), +IOP( "walpha0", BSIM4v2_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"), +IOP( "walpha1", BSIM4v2_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"), +IOP( "wbeta0", BSIM4v2_MOD_WBETA0, IF_REAL, "Width dependence of beta0"), +IOP( "wagidl", BSIM4v2_MOD_WAGIDL, IF_REAL, "Width dependence of agidl"), +IOP( "wbgidl", BSIM4v2_MOD_WBGIDL, IF_REAL, "Width dependence of bgidl"), +IOP( "wcgidl", BSIM4v2_MOD_WCGIDL, IF_REAL, "Width dependence of cgidl"), +IOP( "wegidl", BSIM4v2_MOD_WEGIDL, IF_REAL, "Width dependence of egidl"), +IOP( "waigc", BSIM4v2_MOD_WAIGC, IF_REAL, "Width dependence of aigc"), +IOP( "wbigc", BSIM4v2_MOD_WBIGC, IF_REAL, "Width dependence of bigc"), +IOP( "wcigc", BSIM4v2_MOD_WCIGC, IF_REAL, "Width dependence of cigc"), +IOP( "waigsd", BSIM4v2_MOD_WAIGSD, IF_REAL, "Width dependence of aigsd"), +IOP( "wbigsd", BSIM4v2_MOD_WBIGSD, IF_REAL, "Width dependence of bigsd"), +IOP( "wcigsd", BSIM4v2_MOD_WCIGSD, IF_REAL, "Width dependence of cigsd"), +IOP( "waigbacc", BSIM4v2_MOD_WAIGBACC, IF_REAL, "Width dependence of aigbacc"), +IOP( "wbigbacc", BSIM4v2_MOD_WBIGBACC, IF_REAL, "Width dependence of bigbacc"), +IOP( "wcigbacc", BSIM4v2_MOD_WCIGBACC, IF_REAL, "Width dependence of cigbacc"), +IOP( "waigbinv", BSIM4v2_MOD_WAIGBINV, IF_REAL, "Width dependence of aigbinv"), +IOP( "wbigbinv", BSIM4v2_MOD_WBIGBINV, IF_REAL, "Width dependence of bigbinv"), +IOP( "wcigbinv", BSIM4v2_MOD_WCIGBINV, IF_REAL, "Width dependence of cigbinv"), +IOP( "wnigc", BSIM4v2_MOD_WNIGC, IF_REAL, "Width dependence of nigc"), +IOP( "wnigbinv", BSIM4v2_MOD_WNIGBINV, IF_REAL, "Width dependence of nigbinv"), +IOP( "wnigbacc", BSIM4v2_MOD_WNIGBACC, IF_REAL, "Width dependence of nigbacc"), +IOP( "wntox", BSIM4v2_MOD_WNTOX, IF_REAL, "Width dependence of ntox"), +IOP( "weigbinv", BSIM4v2_MOD_WEIGBINV, IF_REAL, "Width dependence for eigbinv"), +IOP( "wpigcd", BSIM4v2_MOD_WPIGCD, IF_REAL, "Width dependence for pigcd"), +IOP( "wpoxedge", BSIM4v2_MOD_WPOXEDGE, IF_REAL, "Width dependence for poxedge"), +IOP( "wvfbcv", BSIM4v2_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"), +IOP( "wvfb", BSIM4v2_MOD_WVFB, IF_REAL, "Width dependence of vfb"), +IOP( "wacde", BSIM4v2_MOD_WACDE, IF_REAL, "Width dependence of acde"), +IOP( "wmoin", BSIM4v2_MOD_WMOIN, IF_REAL, "Width dependence of moin"), +IOP( "wnoff", BSIM4v2_MOD_WNOFF, IF_REAL, "Width dependence of noff"), +IOP( "wvoffcv", BSIM4v2_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"), +IOP( "wxrcrg1", BSIM4v2_MOD_WXRCRG1, IF_REAL, "Width dependence of xrcrg1"), +IOP( "wxrcrg2", BSIM4v2_MOD_WXRCRG2, IF_REAL, "Width dependence of xrcrg2"), +IOP( "weu", BSIM4v2_MOD_WEU, IF_REAL, "Width dependence of eu"), + +IOP( "pcdsc", BSIM4v2_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), +IOP( "pcdscb", BSIM4v2_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), +IOP( "pcdscd", BSIM4v2_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), +IOP( "pcit", BSIM4v2_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), +IOP( "pnfactor", BSIM4v2_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), +IOP( "pxj", BSIM4v2_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), +IOP( "pvsat", BSIM4v2_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), +IOP( "pat", BSIM4v2_MOD_PAT, IF_REAL, "Cross-term dependence of at"), +IOP( "pa0", BSIM4v2_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), +IOP( "pags", BSIM4v2_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), +IOP( "pa1", BSIM4v2_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), +IOP( "pa2", BSIM4v2_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), +IOP( "pketa", BSIM4v2_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"), +IOP( "pnsub", BSIM4v2_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"), +IOP( "pndep", BSIM4v2_MOD_PNDEP, IF_REAL, "Cross-term dependence of ndep"), +IOP( "pnsd", BSIM4v2_MOD_PNSD, IF_REAL, "Cross-term dependence of nsd"), +IOP( "pphin", BSIM4v2_MOD_PPHIN, IF_REAL, "Cross-term dependence of phin"), +IOP( "pngate", BSIM4v2_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"), +IOP( "pgamma1", BSIM4v2_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"), +IOP( "pgamma2", BSIM4v2_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"), +IOP( "pvbx", BSIM4v2_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"), +IOP( "pvbm", BSIM4v2_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"), +IOP( "pxt", BSIM4v2_MOD_PXT, IF_REAL, "Cross-term dependence of xt"), +IOP( "pk1", BSIM4v2_MOD_PK1, IF_REAL, "Cross-term dependence of k1"), +IOP( "pkt1", BSIM4v2_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"), +IOP( "pkt1l", BSIM4v2_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"), +IOP( "pkt2", BSIM4v2_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"), +IOP( "pk2", BSIM4v2_MOD_PK2, IF_REAL, "Cross-term dependence of k2"), +IOP( "pk3", BSIM4v2_MOD_PK3, IF_REAL, "Cross-term dependence of k3"), +IOP( "pk3b", BSIM4v2_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"), +IOP( "pw0", BSIM4v2_MOD_PW0, IF_REAL, "Cross-term dependence of w0"), +IOP( "pdvtp0", BSIM4v2_MOD_PDVTP0, IF_REAL, "Cross-term dependence of dvtp0"), +IOP( "pdvtp1", BSIM4v2_MOD_PDVTP1, IF_REAL, "Cross-term dependence of dvtp1"), +IOP( "plpe0", BSIM4v2_MOD_PLPE0, IF_REAL, "Cross-term dependence of lpe0"), +IOP( "plpeb", BSIM4v2_MOD_PLPEB, IF_REAL, "Cross-term dependence of lpeb"), +IOP( "pdvt0", BSIM4v2_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"), +IOP( "pdvt1", BSIM4v2_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"), +IOP( "pdvt2", BSIM4v2_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"), +IOP( "pdvt0w", BSIM4v2_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"), +IOP( "pdvt1w", BSIM4v2_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"), +IOP( "pdvt2w", BSIM4v2_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"), +IOP( "pdrout", BSIM4v2_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"), +IOP( "pdsub", BSIM4v2_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"), +IOP( "pvth0", BSIM4v2_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pvtho", BSIM4v2_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pua", BSIM4v2_MOD_PUA, IF_REAL, "Cross-term dependence of ua"), +IOP( "pua1", BSIM4v2_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"), +IOP( "pub", BSIM4v2_MOD_PUB, IF_REAL, "Cross-term dependence of ub"), +IOP( "pub1", BSIM4v2_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"), +IOP( "puc", BSIM4v2_MOD_PUC, IF_REAL, "Cross-term dependence of uc"), +IOP( "puc1", BSIM4v2_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"), +IOP( "pu0", BSIM4v2_MOD_PU0, IF_REAL, "Cross-term dependence of u0"), +IOP( "pute", BSIM4v2_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), +IOP( "pvoff", BSIM4v2_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), +IOP( "pminv", BSIM4v2_MOD_PMINV, IF_REAL, "Cross-term dependence of minv"), +IOP( "pdelta", BSIM4v2_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), +IOP( "prdsw", BSIM4v2_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), +IOP( "prsw", BSIM4v2_MOD_PRSW, IF_REAL, "Cross-term dependence of rsw"), +IOP( "prdw", BSIM4v2_MOD_PRDW, IF_REAL, "Cross-term dependence of rdw"), + +IOP( "pprwg", BSIM4v2_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), +IOP( "pprwb", BSIM4v2_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), + +IOP( "pprt", BSIM4v2_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), +IOP( "peta0", BSIM4v2_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), +IOP( "petab", BSIM4v2_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"), +IOP( "ppclm", BSIM4v2_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"), +IOP( "ppdiblc1", BSIM4v2_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"), +IOP( "ppdiblc2", BSIM4v2_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"), +IOP( "ppdiblcb", BSIM4v2_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "pfprout", BSIM4v2_MOD_PFPROUT, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "ppdits", BSIM4v2_MOD_PPDITS, IF_REAL, "Cross-term dependence of pdits"), +IOP( "ppditsd", BSIM4v2_MOD_PPDITSD, IF_REAL, "Cross-term dependence of pditsd"), +IOP( "ppscbe1", BSIM4v2_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), +IOP( "ppscbe2", BSIM4v2_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), +IOP( "ppvag", BSIM4v2_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), +IOP( "pwr", BSIM4v2_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), +IOP( "pdwg", BSIM4v2_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), +IOP( "pdwb", BSIM4v2_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), +IOP( "pb0", BSIM4v2_MOD_PB0, IF_REAL, "Cross-term dependence of b0"), +IOP( "pb1", BSIM4v2_MOD_PB1, IF_REAL, "Cross-term dependence of b1"), +IOP( "pcgsl", BSIM4v2_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"), +IOP( "pcgdl", BSIM4v2_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"), +IOP( "pckappas", BSIM4v2_MOD_PCKAPPAS, IF_REAL, "Cross-term dependence of ckappas"), +IOP( "pckappad", BSIM4v2_MOD_PCKAPPAD, IF_REAL, "Cross-term dependence of ckappad"), +IOP( "pcf", BSIM4v2_MOD_PCF, IF_REAL, "Cross-term dependence of cf"), +IOP( "pclc", BSIM4v2_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"), +IOP( "pcle", BSIM4v2_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"), +IOP( "palpha0", BSIM4v2_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"), +IOP( "palpha1", BSIM4v2_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"), +IOP( "pbeta0", BSIM4v2_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"), +IOP( "pagidl", BSIM4v2_MOD_PAGIDL, IF_REAL, "Cross-term dependence of agidl"), +IOP( "pbgidl", BSIM4v2_MOD_PBGIDL, IF_REAL, "Cross-term dependence of bgidl"), +IOP( "pcgidl", BSIM4v2_MOD_PCGIDL, IF_REAL, "Cross-term dependence of cgidl"), +IOP( "pegidl", BSIM4v2_MOD_PEGIDL, IF_REAL, "Cross-term dependence of egidl"), +IOP( "paigc", BSIM4v2_MOD_PAIGC, IF_REAL, "Cross-term dependence of aigc"), +IOP( "pbigc", BSIM4v2_MOD_PBIGC, IF_REAL, "Cross-term dependence of bigc"), +IOP( "pcigc", BSIM4v2_MOD_PCIGC, IF_REAL, "Cross-term dependence of cigc"), +IOP( "paigsd", BSIM4v2_MOD_PAIGSD, IF_REAL, "Cross-term dependence of aigsd"), +IOP( "pbigsd", BSIM4v2_MOD_PBIGSD, IF_REAL, "Cross-term dependence of bigsd"), +IOP( "pcigsd", BSIM4v2_MOD_PCIGSD, IF_REAL, "Cross-term dependence of cigsd"), +IOP( "paigbacc", BSIM4v2_MOD_PAIGBACC, IF_REAL, "Cross-term dependence of aigbacc"), +IOP( "pbigbacc", BSIM4v2_MOD_PBIGBACC, IF_REAL, "Cross-term dependence of bigbacc"), +IOP( "pcigbacc", BSIM4v2_MOD_PCIGBACC, IF_REAL, "Cross-term dependence of cigbacc"), +IOP( "paigbinv", BSIM4v2_MOD_PAIGBINV, IF_REAL, "Cross-term dependence of aigbinv"), +IOP( "pbigbinv", BSIM4v2_MOD_PBIGBINV, IF_REAL, "Cross-term dependence of bigbinv"), +IOP( "pcigbinv", BSIM4v2_MOD_PCIGBINV, IF_REAL, "Cross-term dependence of cigbinv"), +IOP( "pnigc", BSIM4v2_MOD_PNIGC, IF_REAL, "Cross-term dependence of nigc"), +IOP( "pnigbinv", BSIM4v2_MOD_PNIGBINV, IF_REAL, "Cross-term dependence of nigbinv"), +IOP( "pnigbacc", BSIM4v2_MOD_PNIGBACC, IF_REAL, "Cross-term dependence of nigbacc"), +IOP( "pntox", BSIM4v2_MOD_PNTOX, IF_REAL, "Cross-term dependence of ntox"), +IOP( "peigbinv", BSIM4v2_MOD_PEIGBINV, IF_REAL, "Cross-term dependence for eigbinv"), +IOP( "ppigcd", BSIM4v2_MOD_PPIGCD, IF_REAL, "Cross-term dependence for pigcd"), +IOP( "ppoxedge", BSIM4v2_MOD_PPOXEDGE, IF_REAL, "Cross-term dependence for poxedge"), +IOP( "pvfbcv", BSIM4v2_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"), +IOP( "pvfb", BSIM4v2_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"), +IOP( "pacde", BSIM4v2_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"), +IOP( "pmoin", BSIM4v2_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"), +IOP( "pnoff", BSIM4v2_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"), +IOP( "pvoffcv", BSIM4v2_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"), +IOP( "pxrcrg1", BSIM4v2_MOD_PXRCRG1, IF_REAL, "Cross-term dependence of xrcrg1"), +IOP( "pxrcrg2", BSIM4v2_MOD_PXRCRG2, IF_REAL, "Cross-term dependence of xrcrg2"), +IOP( "peu", BSIM4v2_MOD_PEU, IF_REAL, "Cross-term dependence of eu"), + +IOP( "noia", BSIM4v2_MOD_NOIA, IF_REAL, "Flicker noise parameter"), +IOP( "noib", BSIM4v2_MOD_NOIB, IF_REAL, "Flicker noise parameter"), +IOP( "noic", BSIM4v2_MOD_NOIC, IF_REAL, "Flicker noise parameter"), +IOP( "tnoia", BSIM4v2_MOD_TNOIA, IF_REAL, "Thermal noise parameter"), +IOP( "tnoib", BSIM4v2_MOD_TNOIB, IF_REAL, "Thermal noise parameter"), +IOP( "ntnoi", BSIM4v2_MOD_NTNOI, IF_REAL, "Thermal noise parameter"), +IOP( "em", BSIM4v2_MOD_EM, IF_REAL, "Flicker noise parameter"), +IOP( "ef", BSIM4v2_MOD_EF, IF_REAL, "Flicker noise frequency exponent"), +IOP( "af", BSIM4v2_MOD_AF, IF_REAL, "Flicker noise exponent"), +IOP( "kf", BSIM4v2_MOD_KF, IF_REAL, "Flicker noise coefficient"), + +IP( "nmos", BSIM4v2_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"), +IP( "pmos", BSIM4v2_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"), +}; + +char *BSIM4v2names[] = { + "Drain", + "Gate", + "Source", + "Bulk", + "Charge" +}; + +int BSIM4v2nSize = NUMELEMS(BSIM4v2names); +int BSIM4v2pTSize = NUMELEMS(BSIM4v2pTable); +int BSIM4v2mPTSize = NUMELEMS(BSIM4v2mPTable); +int BSIM4v2iSize = sizeof(BSIM4v2instance); +int BSIM4v2mSize = sizeof(BSIM4v2model); + + + diff --git a/src/spicelib/devices/bsim4v2/b4v2acld.c b/src/spicelib/devices/bsim4v2/b4v2acld.c new file mode 100644 index 000000000..aaed04b4e --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2acld.c @@ -0,0 +1,670 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4acld.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * + * Modified by Xuemei Xi 10/05/2001 + **********/ + +#include "ngspice.h" +#include +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "sperror.h" + + + +int +BSIM4v2acLoad(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance *here; + +double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb; +double xcbgb, xcbdb, xcbsb, xcbbb; +double xcggbr, xcgdbr, xcgsbr, xcgbbr, xcggbi, xcgdbi, xcgsbi, xcgbbi; +double Cggr, Cgdr, Cgsr, Cgbr, Cggi, Cgdi, Cgsi, Cgbi; +double xcddbr, xcdgbr, xcdsbr, xcdbbr, xcsdbr, xcsgbr, xcssbr, xcsbbr; +double xcddbi, xcdgbi, xcdsbi, xcdbbi, xcsdbi, xcsgbi, xcssbi, xcsbbi; +double xcdbdb, xcsbsb, xcgmgmb, xcgmdb, xcgmsb, xcdgmb, xcsgmb; +double xcgmbb, xcbgmb; +double capbd, capbs, omega; +double gstot, gstotd, gstotg, gstots, gstotb, gspr; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double gIstotg, gIstotd, gIstots, gIstotb; +double gIdtotg, gIdtotd, gIdtots, gIdtotb; +double gIbtotg, gIbtotd, gIbtots, gIbtotb; +double gIgtotg, gIgtotd, gIgtots, gIgtotb; +double cgso, cgdo, cgbo; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11; +double Csg, Csd, Css, Csb; +double Cdgr, Cddr, Cdsr, Cdbr, Csgr, Csdr, Cssr, Csbr; +double Cdgi, Cddi, Cdsi, Cdbi, Csgi, Csdi, Cssi, Csbi; +double gmr, gmi, gmbsr, gmbsi, gdsr, gdsi; +double FwdSumr, RevSumr, Gmr, Gmbsr, Gdsr; +double FwdSumi, RevSumi, Gmi, Gmbsi, Gdsi; +struct bsim4SizeDependParam *pParam; +double ggidld, ggidlg, ggidlb,ggisld, ggislg, ggislb, ggisls; + + omega = ckt->CKTomega; + for (; model != NULL; model = model->BSIM4v2nextModel) + { for (here = model->BSIM4v2instances; here!= NULL; + here = here->BSIM4v2nextInstance) + { if (here->BSIM4v2owner != ARCHme) continue; + pParam = here->pParam; + capbd = here->BSIM4v2capbd; + capbs = here->BSIM4v2capbs; + cgso = here->BSIM4v2cgso; + cgdo = here->BSIM4v2cgdo; + cgbo = pParam->BSIM4v2cgbo; + + Csd = -(here->BSIM4v2cddb + here->BSIM4v2cgdb + here->BSIM4v2cbdb); + Csg = -(here->BSIM4v2cdgb + here->BSIM4v2cggb + here->BSIM4v2cbgb); + Css = -(here->BSIM4v2cdsb + here->BSIM4v2cgsb + here->BSIM4v2cbsb); + + if (here->BSIM4v2acnqsMod) + { T0 = omega * here->BSIM4v2taunet; + T1 = T0 * T0; + T2 = 1.0 / (1.0 + T1); + T3 = T0 * T2; + + gmr = here->BSIM4v2gm * T2; + gmbsr = here->BSIM4v2gmbs * T2; + gdsr = here->BSIM4v2gds * T2; + + gmi = -here->BSIM4v2gm * T3; + gmbsi = -here->BSIM4v2gmbs * T3; + gdsi = -here->BSIM4v2gds * T3; + + Cddr = here->BSIM4v2cddb * T2; + Cdgr = here->BSIM4v2cdgb * T2; + Cdsr = here->BSIM4v2cdsb * T2; + Cdbr = -(Cddr + Cdgr + Cdsr); + + /* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */ + Cddi = here->BSIM4v2cddb * T3 * omega; + Cdgi = here->BSIM4v2cdgb * T3 * omega; + Cdsi = here->BSIM4v2cdsb * T3 * omega; + Cdbi = -(Cddi + Cdgi + Cdsi); + + Csdr = Csd * T2; + Csgr = Csg * T2; + Cssr = Css * T2; + Csbr = -(Csdr + Csgr + Cssr); + + Csdi = Csd * T3 * omega; + Csgi = Csg * T3 * omega; + Cssi = Css * T3 * omega; + Csbi = -(Csdi + Csgi + Cssi); + + Cgdr = -(Cddr + Csdr + here->BSIM4v2cbdb); + Cggr = -(Cdgr + Csgr + here->BSIM4v2cbgb); + Cgsr = -(Cdsr + Cssr + here->BSIM4v2cbsb); + Cgbr = -(Cgdr + Cggr + Cgsr); + + Cgdi = -(Cddi + Csdi); + Cggi = -(Cdgi + Csgi); + Cgsi = -(Cdsi + Cssi); + Cgbi = -(Cgdi + Cggi + Cgsi); + } + else /* QS */ + { gmr = here->BSIM4v2gm; + gmbsr = here->BSIM4v2gmbs; + gdsr = here->BSIM4v2gds; + gmi = gmbsi = gdsi = 0.0; + + Cddr = here->BSIM4v2cddb; + Cdgr = here->BSIM4v2cdgb; + Cdsr = here->BSIM4v2cdsb; + Cdbr = -(Cddr + Cdgr + Cdsr); + Cddi = Cdgi = Cdsi = Cdbi = 0.0; + + Csdr = Csd; + Csgr = Csg; + Cssr = Css; + Csbr = -(Csdr + Csgr + Cssr); + Csdi = Csgi = Cssi = Csbi = 0.0; + + Cgdr = here->BSIM4v2cgdb; + Cggr = here->BSIM4v2cggb; + Cgsr = here->BSIM4v2cgsb; + Cgbr = -(Cgdr + Cggr + Cgsr); + Cgdi = Cggi = Cgsi = Cgbi = 0.0; + } + + + if (here->BSIM4v2mode >= 0) + { Gmr = gmr; + Gmbsr = gmbsr; + FwdSumr = Gmr + Gmbsr; + RevSumr = 0.0; + Gmi = gmi; + Gmbsi = gmbsi; + FwdSumi = Gmi + Gmbsi; + RevSumi = 0.0; + + gbbdp = -(here->BSIM4v2gbds); + gbbsp = here->BSIM4v2gbds + here->BSIM4v2gbgs + here->BSIM4v2gbbs; + gbdpg = here->BSIM4v2gbgs; + gbdpdp = here->BSIM4v2gbds; + gbdpb = here->BSIM4v2gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v2igcMod) + { gIstotg = here->BSIM4v2gIgsg + here->BSIM4v2gIgcsg; + gIstotd = here->BSIM4v2gIgcsd; + gIstots = here->BSIM4v2gIgss + here->BSIM4v2gIgcss; + gIstotb = here->BSIM4v2gIgcsb; + + gIdtotg = here->BSIM4v2gIgdg + here->BSIM4v2gIgcdg; + gIdtotd = here->BSIM4v2gIgdd + here->BSIM4v2gIgcdd; + gIdtots = here->BSIM4v2gIgcds; + gIdtotb = here->BSIM4v2gIgcdb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v2igbMod) + { gIbtotg = here->BSIM4v2gIgbg; + gIbtotd = here->BSIM4v2gIgbd; + gIbtots = here->BSIM4v2gIgbs; + gIbtotb = here->BSIM4v2gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v2rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vges) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + else if (here->BSIM4v2rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vgms) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + if (here->BSIM4v2rgateMod > 1) + { gcrgd = here->BSIM4v2gcrgd * T0; + gcrgg = here->BSIM4v2gcrgg * T0; + gcrgs = here->BSIM4v2gcrgs * T0; + gcrgb = here->BSIM4v2gcrgb * T0; + gcrgg -= here->BSIM4v2gcrg; + gcrg = here->BSIM4v2gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v2rgateMod == 3) + { xcgmgmb = (cgdo + cgso + pParam->BSIM4v2cgbo) * omega; + xcgmdb = -cgdo * omega; + xcgmsb = -cgso * omega; + xcgmbb = -pParam->BSIM4v2cgbo * omega; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggbr = Cggr * omega; + xcgdbr = Cgdr * omega; + xcgsbr = Cgsr * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = Cdgr * omega; + xcsgbr = Csgr * omega; + xcbgb = here->BSIM4v2cbgb * omega; + } + else + { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v2cgbo ) * omega; + xcgdbr = (Cgdr - cgdo) * omega; + xcgsbr = (Cgsr - cgso) * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = (Cdgr - cgdo) * omega; + xcsgbr = (Csgr - cgso) * omega; + xcbgb = (here->BSIM4v2cbgb - pParam->BSIM4v2cgbo) * omega; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddbr = (Cddr + here->BSIM4v2capbd + cgdo) * omega; + xcdsbr = Cdsr * omega; + xcsdbr = Csdr * omega; + xcssbr = (here->BSIM4v2capbs + cgso + Cssr) * omega; + + if (!here->BSIM4v2rbodyMod) + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb); + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb); + + xcbdb = (here->BSIM4v2cbdb - here->BSIM4v2capbd) * omega; + xcbsb = (here->BSIM4v2cbsb - here->BSIM4v2capbs) * omega; + xcdbdb = 0.0; + } + else + { xcdbbr = Cdbr * omega; + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb) + + here->BSIM4v2capbs * omega; + + xcbdb = here->BSIM4v2cbdb * omega; + xcbsb = here->BSIM4v2cbsb * omega; + + xcdbdb = -here->BSIM4v2capbd * omega; + xcsbsb = -here->BSIM4v2capbs * omega; + } + xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb); + + xcdgbi = Cdgi; + xcsgbi = Csgi; + xcddbi = Cddi; + xcdsbi = Cdsi; + xcsdbi = Csdi; + xcssbi = Cssi; + xcdbbi = Cdbi; + xcsbbi = Csbi; + xcggbi = Cggi; + xcgdbi = Cgdi; + xcgsbi = Cgsi; + xcgbbi = Cgbi; + } + else /* Reverse mode */ + { Gmr = -gmr; + Gmbsr = -gmbsr; + FwdSumr = 0.0; + RevSumr = -(Gmr + Gmbsr); + Gmi = -gmi; + Gmbsi = -gmbsi; + FwdSumi = 0.0; + RevSumi = -(Gmi + Gmbsi); + + gbbsp = -(here->BSIM4v2gbds); + gbbdp = here->BSIM4v2gbds + here->BSIM4v2gbgs + here->BSIM4v2gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v2gbgs; + gbspsp = here->BSIM4v2gbds; + gbspb = here->BSIM4v2gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v2igcMod) + { gIstotg = here->BSIM4v2gIgsg + here->BSIM4v2gIgcdg; + gIstotd = here->BSIM4v2gIgcds; + gIstots = here->BSIM4v2gIgss + here->BSIM4v2gIgcdd; + gIstotb = here->BSIM4v2gIgcdb; + + gIdtotg = here->BSIM4v2gIgdg + here->BSIM4v2gIgcsg; + gIdtotd = here->BSIM4v2gIgdd + here->BSIM4v2gIgcss; + gIdtots = here->BSIM4v2gIgcsd; + gIdtotb = here->BSIM4v2gIgcsb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v2igbMod) + { gIbtotg = here->BSIM4v2gIgbg; + gIbtotd = here->BSIM4v2gIgbs; + gIbtots = here->BSIM4v2gIgbd; + gIbtotb = here->BSIM4v2gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v2rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vges) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + else if (here->BSIM4v2rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vgms) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + if (here->BSIM4v2rgateMod > 1) + { gcrgd = here->BSIM4v2gcrgs * T0; + gcrgg = here->BSIM4v2gcrgg * T0; + gcrgs = here->BSIM4v2gcrgd * T0; + gcrgb = here->BSIM4v2gcrgb * T0; + gcrgg -= here->BSIM4v2gcrg; + gcrg = here->BSIM4v2gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v2rgateMod == 3) + { xcgmgmb = (cgdo + cgso + pParam->BSIM4v2cgbo) * omega; + xcgmdb = -cgdo * omega; + xcgmsb = -cgso * omega; + xcgmbb = -pParam->BSIM4v2cgbo * omega; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggbr = Cggr * omega; + xcgdbr = Cgsr * omega; + xcgsbr = Cgdr * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = Csgr * omega; + xcsgbr = Cdgr * omega; + xcbgb = here->BSIM4v2cbgb * omega; + } + else + { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v2cgbo ) * omega; + xcgdbr = (Cgsr - cgdo) * omega; + xcgsbr = (Cgdr - cgso) * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = (Csgr - cgdo) * omega; + xcsgbr = (Cdgr - cgso) * omega; + xcbgb = (here->BSIM4v2cbgb - pParam->BSIM4v2cgbo) * omega; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddbr = (here->BSIM4v2capbd + cgdo + Cssr) * omega; + xcdsbr = Csdr * omega; + xcsdbr = Cdsr * omega; + xcssbr = (Cddr + here->BSIM4v2capbs + cgso) * omega; + + if (!here->BSIM4v2rbodyMod) + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb); + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb); + + xcbdb = (here->BSIM4v2cbsb - here->BSIM4v2capbd) * omega; + xcbsb = (here->BSIM4v2cbdb - here->BSIM4v2capbs) * omega; + xcdbdb = 0.0; + } + else + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb) + + here->BSIM4v2capbd * omega; + xcsbbr = Cdbr * omega; + + xcbdb = here->BSIM4v2cbsb * omega; + xcbsb = here->BSIM4v2cbdb * omega; + xcdbdb = -here->BSIM4v2capbd * omega; + xcsbsb = -here->BSIM4v2capbs * omega; + } + xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb); + + xcdgbi = Csgi; + xcsgbi = Cdgi; + xcddbi = Cssi; + xcdsbi = Csdi; + xcsdbi = Cdsi; + xcssbi = Cddi; + xcdbbi = Csbi; + xcsbbi = Cdbi; + xcggbi = Cggi; + xcgdbi = Cgsi; + xcgsbi = Cgdi; + xcgbbi = Cgbi; + } + + if (model->BSIM4v2rdsMod == 1) + { gstot = here->BSIM4v2gstot; + gstotd = here->BSIM4v2gstotd; + gstotg = here->BSIM4v2gstotg; + gstots = here->BSIM4v2gstots - gstot; + gstotb = here->BSIM4v2gstotb; + + gdtot = here->BSIM4v2gdtot; + gdtotd = here->BSIM4v2gdtotd - gdtot; + gdtotg = here->BSIM4v2gdtotg; + gdtots = here->BSIM4v2gdtots; + gdtotb = here->BSIM4v2gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0; + } + + + /* + * Loading AC matrix + */ + + if (!model->BSIM4v2rdsMod) + { gdpr = here->BSIM4v2drainConductance; + gspr = here->BSIM4v2sourceConductance; + } + else + gdpr = gspr = 0.0; + + if (!here->BSIM4v2rbodyMod) + { gjbd = here->BSIM4v2gbd; + gjbs = here->BSIM4v2gbs; + } + else + gjbd = gjbs = 0.0; + + geltd = here->BSIM4v2grgeltd; + + if (here->BSIM4v2rgateMod == 1) + { *(here->BSIM4v2GEgePtr) += geltd; + *(here->BSIM4v2GPgePtr) -= geltd; + *(here->BSIM4v2GEgpPtr) -= geltd; + + *(here->BSIM4v2GPgpPtr +1) += xcggbr; + *(here->BSIM4v2GPgpPtr) += geltd + xcggbi + gIgtotg; + *(here->BSIM4v2GPdpPtr +1) += xcgdbr; + *(here->BSIM4v2GPdpPtr) += xcgdbi + gIgtotd; + *(here->BSIM4v2GPspPtr +1) += xcgsbr; + *(here->BSIM4v2GPspPtr) += xcgsbi + gIgtots; + *(here->BSIM4v2GPbpPtr +1) += xcgbbr; + *(here->BSIM4v2GPbpPtr) += xcgbbi + gIgtotb; + } /* WDLiu: gcrg already subtracted from all gcrgg below */ + else if (here->BSIM4v2rgateMod == 2) + { *(here->BSIM4v2GEgePtr) += gcrg; + *(here->BSIM4v2GEgpPtr) += gcrgg; + *(here->BSIM4v2GEdpPtr) += gcrgd; + *(here->BSIM4v2GEspPtr) += gcrgs; + *(here->BSIM4v2GEbpPtr) += gcrgb; + + *(here->BSIM4v2GPgePtr) -= gcrg; + *(here->BSIM4v2GPgpPtr +1) += xcggbr; + *(here->BSIM4v2GPgpPtr) -= gcrgg - xcggbi - gIgtotg; + *(here->BSIM4v2GPdpPtr +1) += xcgdbr; + *(here->BSIM4v2GPdpPtr) -= gcrgd - xcgdbi - gIgtotd; + *(here->BSIM4v2GPspPtr +1) += xcgsbr; + *(here->BSIM4v2GPspPtr) -= gcrgs - xcgsbi - gIgtots; + *(here->BSIM4v2GPbpPtr +1) += xcgbbr; + *(here->BSIM4v2GPbpPtr) -= gcrgb - xcgbbi - gIgtotb; + } + else if (here->BSIM4v2rgateMod == 3) + { *(here->BSIM4v2GEgePtr) += geltd; + *(here->BSIM4v2GEgmPtr) -= geltd; + *(here->BSIM4v2GMgePtr) -= geltd; + *(here->BSIM4v2GMgmPtr) += geltd + gcrg; + *(here->BSIM4v2GMgmPtr +1) += xcgmgmb; + + *(here->BSIM4v2GMdpPtr) += gcrgd; + *(here->BSIM4v2GMdpPtr +1) += xcgmdb; + *(here->BSIM4v2GMgpPtr) += gcrgg; + *(here->BSIM4v2GMspPtr) += gcrgs; + *(here->BSIM4v2GMspPtr +1) += xcgmsb; + *(here->BSIM4v2GMbpPtr) += gcrgb; + *(here->BSIM4v2GMbpPtr +1) += xcgmbb; + + *(here->BSIM4v2DPgmPtr +1) += xcdgmb; + *(here->BSIM4v2GPgmPtr) -= gcrg; + *(here->BSIM4v2SPgmPtr +1) += xcsgmb; + *(here->BSIM4v2BPgmPtr +1) += xcbgmb; + + *(here->BSIM4v2GPgpPtr) -= gcrgg - xcggbi - gIgtotg; + *(here->BSIM4v2GPgpPtr +1) += xcggbr; + *(here->BSIM4v2GPdpPtr) -= gcrgd - xcgdbi - gIgtotd; + *(here->BSIM4v2GPdpPtr +1) += xcgdbr; + *(here->BSIM4v2GPspPtr) -= gcrgs - xcgsbi - gIgtots; + *(here->BSIM4v2GPspPtr +1) += xcgsbr; + *(here->BSIM4v2GPbpPtr) -= gcrgb - xcgbbi - gIgtotb; + *(here->BSIM4v2GPbpPtr +1) += xcgbbr; + } + else + { *(here->BSIM4v2GPgpPtr +1) += xcggbr; + *(here->BSIM4v2GPgpPtr) += xcggbi + gIgtotg; + *(here->BSIM4v2GPdpPtr +1) += xcgdbr; + *(here->BSIM4v2GPdpPtr) += xcgdbi + gIgtotd; + *(here->BSIM4v2GPspPtr +1) += xcgsbr; + *(here->BSIM4v2GPspPtr) += xcgsbi + gIgtots; + *(here->BSIM4v2GPbpPtr +1) += xcgbbr; + *(here->BSIM4v2GPbpPtr) += xcgbbi + gIgtotb; + } + + if (model->BSIM4v2rdsMod) + { (*(here->BSIM4v2DgpPtr) += gdtotg); + (*(here->BSIM4v2DspPtr) += gdtots); + (*(here->BSIM4v2DbpPtr) += gdtotb); + (*(here->BSIM4v2SdpPtr) += gstotd); + (*(here->BSIM4v2SgpPtr) += gstotg); + (*(here->BSIM4v2SbpPtr) += gstotb); + } + + *(here->BSIM4v2DPdpPtr +1) += xcddbr + gdsi + RevSumi; + *(here->BSIM4v2DPdpPtr) += gdpr + xcddbi + gdsr + here->BSIM4v2gbd + - gdtotd + RevSumr + gbdpdp - gIdtotd; + *(here->BSIM4v2DPdPtr) -= gdpr + gdtot; + *(here->BSIM4v2DPgpPtr +1) += xcdgbr + Gmi; + *(here->BSIM4v2DPgpPtr) += Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg; + *(here->BSIM4v2DPspPtr +1) += xcdsbr - gdsi - FwdSumi; + *(here->BSIM4v2DPspPtr) -= gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots; + *(here->BSIM4v2DPbpPtr +1) += xcdbbr + Gmbsi; + *(here->BSIM4v2DPbpPtr) -= gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb; + + *(here->BSIM4v2DdpPtr) -= gdpr - gdtotd; + *(here->BSIM4v2DdPtr) += gdpr + gdtot; + + *(here->BSIM4v2SPdpPtr +1) += xcsdbr - gdsi - RevSumi; + *(here->BSIM4v2SPdpPtr) -= gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd; + *(here->BSIM4v2SPgpPtr +1) += xcsgbr - Gmi; + *(here->BSIM4v2SPgpPtr) -= Gmr - xcsgbi + gstotg - gbspg + gIstotg; + *(here->BSIM4v2SPspPtr +1) += xcssbr + gdsi + FwdSumi; + *(here->BSIM4v2SPspPtr) += gspr + xcssbi + gdsr + here->BSIM4v2gbs + - gstots + FwdSumr + gbspsp - gIstots; + *(here->BSIM4v2SPsPtr) -= gspr + gstot; + *(here->BSIM4v2SPbpPtr +1) += xcsbbr - Gmbsi; + *(here->BSIM4v2SPbpPtr) -= gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb; + + *(here->BSIM4v2SspPtr) -= gspr - gstots; + *(here->BSIM4v2SsPtr) += gspr + gstot; + + *(here->BSIM4v2BPdpPtr +1) += xcbdb; + *(here->BSIM4v2BPdpPtr) -= gjbd - gbbdp + gIbtotd; + *(here->BSIM4v2BPgpPtr +1) += xcbgb; + *(here->BSIM4v2BPgpPtr) -= here->BSIM4v2gbgs + gIbtotg; + *(here->BSIM4v2BPspPtr +1) += xcbsb; + *(here->BSIM4v2BPspPtr) -= gjbs - gbbsp + gIbtots; + *(here->BSIM4v2BPbpPtr +1) += xcbbb; + *(here->BSIM4v2BPbpPtr) += gjbd + gjbs - here->BSIM4v2gbbs + - gIbtotb; + ggidld = here->BSIM4v2ggidld; + ggidlg = here->BSIM4v2ggidlg; + ggidlb = here->BSIM4v2ggidlb; + ggislg = here->BSIM4v2ggislg; + ggisls = here->BSIM4v2ggisls; + ggislb = here->BSIM4v2ggislb; + + /* stamp gidl */ + (*(here->BSIM4v2DPdpPtr) += ggidld); + (*(here->BSIM4v2DPgpPtr) += ggidlg); + (*(here->BSIM4v2DPspPtr) -= (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v2DPbpPtr) += ggidlb); + (*(here->BSIM4v2BPdpPtr) -= ggidld); + (*(here->BSIM4v2BPgpPtr) -= ggidlg); + (*(here->BSIM4v2BPspPtr) += (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v2BPbpPtr) -= ggidlb); + /* stamp gisl */ + (*(here->BSIM4v2SPdpPtr) -= (ggisls + ggislg) + ggislb); + (*(here->BSIM4v2SPgpPtr) += ggislg); + (*(here->BSIM4v2SPspPtr) += ggisls); + (*(here->BSIM4v2SPbpPtr) += ggislb); + (*(here->BSIM4v2BPdpPtr) += (ggislg + ggisls) + ggislb); + (*(here->BSIM4v2BPgpPtr) -= ggislg); + (*(here->BSIM4v2BPspPtr) -= ggisls); + (*(here->BSIM4v2BPbpPtr) -= ggislb); + + if (here->BSIM4v2rbodyMod) + { (*(here->BSIM4v2DPdbPtr +1) += xcdbdb); + (*(here->BSIM4v2DPdbPtr) -= here->BSIM4v2gbd); + (*(here->BSIM4v2SPsbPtr +1) += xcsbsb); + (*(here->BSIM4v2SPsbPtr) -= here->BSIM4v2gbs); + + (*(here->BSIM4v2DBdpPtr +1) += xcdbdb); + (*(here->BSIM4v2DBdpPtr) -= here->BSIM4v2gbd); + (*(here->BSIM4v2DBdbPtr +1) -= xcdbdb); + (*(here->BSIM4v2DBdbPtr) += here->BSIM4v2gbd + here->BSIM4v2grbpd + + here->BSIM4v2grbdb); + (*(here->BSIM4v2DBbpPtr) -= here->BSIM4v2grbpd); + (*(here->BSIM4v2DBbPtr) -= here->BSIM4v2grbdb); + + (*(here->BSIM4v2BPdbPtr) -= here->BSIM4v2grbpd); + (*(here->BSIM4v2BPbPtr) -= here->BSIM4v2grbpb); + (*(here->BSIM4v2BPsbPtr) -= here->BSIM4v2grbps); + (*(here->BSIM4v2BPbpPtr) += here->BSIM4v2grbpd + here->BSIM4v2grbps + + here->BSIM4v2grbpb); + /* WDLiu: (-here->BSIM4v2gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v2SBspPtr +1) += xcsbsb); + (*(here->BSIM4v2SBspPtr) -= here->BSIM4v2gbs); + (*(here->BSIM4v2SBbpPtr) -= here->BSIM4v2grbps); + (*(here->BSIM4v2SBbPtr) -= here->BSIM4v2grbsb); + (*(here->BSIM4v2SBsbPtr +1) -= xcsbsb); + (*(here->BSIM4v2SBsbPtr) += here->BSIM4v2gbs + + here->BSIM4v2grbps + here->BSIM4v2grbsb); + + (*(here->BSIM4v2BdbPtr) -= here->BSIM4v2grbdb); + (*(here->BSIM4v2BbpPtr) -= here->BSIM4v2grbpb); + (*(here->BSIM4v2BsbPtr) -= here->BSIM4v2grbsb); + (*(here->BSIM4v2BbPtr) += here->BSIM4v2grbsb + here->BSIM4v2grbdb + + here->BSIM4v2grbpb); + } + + + /* + * WDLiu: The internal charge node generated for transient NQS is not needed for + * AC NQS. The following is not doing a real job, but we have to keep it; + * otherwise a singular AC NQS matrix may occur if the transient NQS is on. + * The charge node is isolated from the instance. + */ + if (here->BSIM4v2trnqsMod) + { (*(here->BSIM4v2QqPtr) += 1.0); + (*(here->BSIM4v2QgpPtr) += 0.0); + (*(here->BSIM4v2QdpPtr) += 0.0); + (*(here->BSIM4v2QspPtr) += 0.0); + (*(here->BSIM4v2QbpPtr) += 0.0); + + (*(here->BSIM4v2DPqPtr) += 0.0); + (*(here->BSIM4v2SPqPtr) += 0.0); + (*(here->BSIM4v2GPqPtr) += 0.0); + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2ask.c b/src/spicelib/devices/bsim4v2/b4v2ask.c new file mode 100644 index 000000000..2b4d78bf0 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2ask.c @@ -0,0 +1,300 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4ask.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim4v2def.h" +#include "sperror.h" + + +int +BSIM4v2ask(ckt,inst,which,value,select) +CKTcircuit *ckt; +GENinstance *inst; +int which; +IFvalue *value; +IFvalue *select; +{ +BSIM4v2instance *here = (BSIM4v2instance*)inst; + + switch(which) + { case BSIM4v2_L: + value->rValue = here->BSIM4v2l; + return(OK); + case BSIM4v2_W: + value->rValue = here->BSIM4v2w; + return(OK); + case BSIM4v2_NF: + value->rValue = here->BSIM4v2nf; + return(OK); + case BSIM4v2_MIN: + value->iValue = here->BSIM4v2min; + return(OK); + case BSIM4v2_AS: + value->rValue = here->BSIM4v2sourceArea; + return(OK); + case BSIM4v2_AD: + value->rValue = here->BSIM4v2drainArea; + return(OK); + case BSIM4v2_PS: + value->rValue = here->BSIM4v2sourcePerimeter; + return(OK); + case BSIM4v2_PD: + value->rValue = here->BSIM4v2drainPerimeter; + return(OK); + case BSIM4v2_NRS: + value->rValue = here->BSIM4v2sourceSquares; + return(OK); + case BSIM4v2_NRD: + value->rValue = here->BSIM4v2drainSquares; + return(OK); + case BSIM4v2_OFF: + value->rValue = here->BSIM4v2off; + return(OK); + case BSIM4v2_RBSB: + value->rValue = here->BSIM4v2rbsb; + return(OK); + case BSIM4v2_RBDB: + value->rValue = here->BSIM4v2rbdb; + return(OK); + case BSIM4v2_RBPB: + value->rValue = here->BSIM4v2rbpb; + return(OK); + case BSIM4v2_RBPS: + value->rValue = here->BSIM4v2rbps; + return(OK); + case BSIM4v2_RBPD: + value->rValue = here->BSIM4v2rbpd; + return(OK); + case BSIM4v2_TRNQSMOD: + value->iValue = here->BSIM4v2trnqsMod; + return(OK); + case BSIM4v2_ACNQSMOD: + value->iValue = here->BSIM4v2acnqsMod; + return(OK); + case BSIM4v2_RBODYMOD: + value->iValue = here->BSIM4v2rbodyMod; + return(OK); + case BSIM4v2_RGATEMOD: + value->iValue = here->BSIM4v2rgateMod; + return(OK); + case BSIM4v2_GEOMOD: + value->iValue = here->BSIM4v2geoMod; + return(OK); + case BSIM4v2_RGEOMOD: + value->iValue = here->BSIM4v2rgeoMod; + return(OK); + case BSIM4v2_IC_VDS: + value->rValue = here->BSIM4v2icVDS; + return(OK); + case BSIM4v2_IC_VGS: + value->rValue = here->BSIM4v2icVGS; + return(OK); + case BSIM4v2_IC_VBS: + value->rValue = here->BSIM4v2icVBS; + return(OK); + case BSIM4v2_DNODE: + value->iValue = here->BSIM4v2dNode; + return(OK); + case BSIM4v2_GNODEEXT: + value->iValue = here->BSIM4v2gNodeExt; + return(OK); + case BSIM4v2_SNODE: + value->iValue = here->BSIM4v2sNode; + return(OK); + case BSIM4v2_BNODE: + value->iValue = here->BSIM4v2bNode; + return(OK); + case BSIM4v2_DNODEPRIME: + value->iValue = here->BSIM4v2dNodePrime; + return(OK); + case BSIM4v2_GNODEPRIME: + value->iValue = here->BSIM4v2gNodePrime; + return(OK); + case BSIM4v2_GNODEMID: + value->iValue = here->BSIM4v2gNodeMid; + return(OK); + case BSIM4v2_SNODEPRIME: + value->iValue = here->BSIM4v2sNodePrime; + return(OK); + case BSIM4v2_DBNODE: + value->iValue = here->BSIM4v2dbNode; + return(OK); + case BSIM4v2_BNODEPRIME: + value->iValue = here->BSIM4v2bNodePrime; + return(OK); + case BSIM4v2_SBNODE: + value->iValue = here->BSIM4v2sbNode; + return(OK); + case BSIM4v2_SOURCECONDUCT: + value->rValue = here->BSIM4v2sourceConductance; + return(OK); + case BSIM4v2_DRAINCONDUCT: + value->rValue = here->BSIM4v2drainConductance; + return(OK); + case BSIM4v2_VBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2vbd); + return(OK); + case BSIM4v2_VBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2vbs); + return(OK); + case BSIM4v2_VGS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2vgs); + return(OK); + case BSIM4v2_VDS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2vds); + return(OK); + case BSIM4v2_CD: + value->rValue = here->BSIM4v2cd; + return(OK); + case BSIM4v2_CBS: + value->rValue = here->BSIM4v2cbs; + return(OK); + case BSIM4v2_CBD: + value->rValue = here->BSIM4v2cbd; + return(OK); + case BSIM4v2_CSUB: + value->rValue = here->BSIM4v2csub; + return(OK); + case BSIM4v2_IGIDL: + value->rValue = here->BSIM4v2Igidl; + return(OK); + case BSIM4v2_IGISL: + value->rValue = here->BSIM4v2Igisl; + return(OK); + case BSIM4v2_IGS: + value->rValue = here->BSIM4v2Igs; + return(OK); + case BSIM4v2_IGD: + value->rValue = here->BSIM4v2Igd; + return(OK); + case BSIM4v2_IGB: + value->rValue = here->BSIM4v2Igb; + return(OK); + case BSIM4v2_IGCS: + value->rValue = here->BSIM4v2Igcs; + return(OK); + case BSIM4v2_IGCD: + value->rValue = here->BSIM4v2Igcd; + return(OK); + case BSIM4v2_GM: + value->rValue = here->BSIM4v2gm; + return(OK); + case BSIM4v2_GDS: + value->rValue = here->BSIM4v2gds; + return(OK); + case BSIM4v2_GMBS: + value->rValue = here->BSIM4v2gmbs; + return(OK); + case BSIM4v2_GBD: + value->rValue = here->BSIM4v2gbd; + return(OK); + case BSIM4v2_GBS: + value->rValue = here->BSIM4v2gbs; + return(OK); + case BSIM4v2_QB: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2qb); + return(OK); + case BSIM4v2_CQB: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2cqb); + return(OK); + case BSIM4v2_QG: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2qg); + return(OK); + case BSIM4v2_CQG: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2cqg); + return(OK); + case BSIM4v2_QD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2qd); + return(OK); + case BSIM4v2_CQD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2cqd); + return(OK); + case BSIM4v2_QS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2qs); + return(OK); + case BSIM4v2_CGGB: + value->rValue = here->BSIM4v2cggb; + return(OK); + case BSIM4v2_CGDB: + value->rValue = here->BSIM4v2cgdb; + return(OK); + case BSIM4v2_CGSB: + value->rValue = here->BSIM4v2cgsb; + return(OK); + case BSIM4v2_CDGB: + value->rValue = here->BSIM4v2cdgb; + return(OK); + case BSIM4v2_CDDB: + value->rValue = here->BSIM4v2cddb; + return(OK); + case BSIM4v2_CDSB: + value->rValue = here->BSIM4v2cdsb; + return(OK); + case BSIM4v2_CBGB: + value->rValue = here->BSIM4v2cbgb; + return(OK); + case BSIM4v2_CBDB: + value->rValue = here->BSIM4v2cbdb; + return(OK); + case BSIM4v2_CBSB: + value->rValue = here->BSIM4v2cbsb; + return(OK); + case BSIM4v2_CSGB: + value->rValue = here->BSIM4v2csgb; + return(OK); + case BSIM4v2_CSDB: + value->rValue = here->BSIM4v2csdb; + return(OK); + case BSIM4v2_CSSB: + value->rValue = here->BSIM4v2cssb; + return(OK); + case BSIM4v2_CGBB: + value->rValue = here->BSIM4v2cgbb; + return(OK); + case BSIM4v2_CDBB: + value->rValue = here->BSIM4v2cdbb; + return(OK); + case BSIM4v2_CSBB: + value->rValue = here->BSIM4v2csbb; + return(OK); + case BSIM4v2_CBBB: + value->rValue = here->BSIM4v2cbbb; + return(OK); + case BSIM4v2_CAPBD: + value->rValue = here->BSIM4v2capbd; + return(OK); + case BSIM4v2_CAPBS: + value->rValue = here->BSIM4v2capbs; + return(OK); + case BSIM4v2_VON: + value->rValue = here->BSIM4v2von; + return(OK); + case BSIM4v2_VDSAT: + value->rValue = here->BSIM4v2vdsat; + return(OK); + case BSIM4v2_QBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2qbs); + return(OK); + case BSIM4v2_QBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v2qbd); + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + diff --git a/src/spicelib/devices/bsim4v2/b4v2check.c b/src/spicelib/devices/bsim4v2/b4v2check.c new file mode 100644 index 000000000..9a25f50b1 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2check.c @@ -0,0 +1,564 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4check.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" + +int +BSIM4v2checkModel(model, here, ckt) +BSIM4v2model *model; +BSIM4v2instance *here; +CKTcircuit *ckt; +{ +struct bsim4SizeDependParam *pParam; +int Fatal_Flag = 0; +FILE *fplog; + + if ((fplog = fopen("bsim4.out", "w")) != NULL) + { pParam = here->pParam; + fprintf(fplog, "BSIM4v2: Berkeley Short Channel IGFET Model-4\n"); + fprintf(fplog, "Developed by Weidong Liu, Xuemei Xi , Xiaodong Jin, Kanyu M. Cao and Prof. Chenming Hu in 2001.\n"); + fprintf(fplog, "\n"); + fprintf(fplog, "++++++++++ BSIM4v2 PARAMETER CHECKING BELOW ++++++++++\n"); + + if (strcmp(model->BSIM4v2version, "4.2.1") != 0) + { fprintf(fplog, "Warning: This model is BSIM4.2.1; you specified a wrong version number.\n"); + printf("Warning: This model is BSIM4.2.1; you specified a wrong version number.\n"); + } + fprintf(fplog, "Model = %s\n", model->BSIM4v2modName); + + + if ((here->BSIM4v2rgateMod == 2) || (here->BSIM4v2rgateMod == 3)) + { if ((here->BSIM4v2trnqsMod == 1) || (here->BSIM4v2acnqsMod == 1)) + { fprintf(fplog, "Warning: You've selected both Rg and charge deficit NQS; select one only.\n"); + printf("Warning: You've selected both Rg and charge deficit NQS; select one only.\n"); + } + } + + + if (model->BSIM4v2toxe <= 0.0) + { fprintf(fplog, "Fatal: Toxe = %g is not positive.\n", + model->BSIM4v2toxe); + printf("Fatal: Toxe = %g is not positive.\n", model->BSIM4v2toxe); + Fatal_Flag = 1; + } + if (model->BSIM4v2toxp <= 0.0) + { fprintf(fplog, "Fatal: Toxp = %g is not positive.\n", + model->BSIM4v2toxp); + printf("Fatal: Toxp = %g is not positive.\n", model->BSIM4v2toxp); + Fatal_Flag = 1; + } + + if (model->BSIM4v2toxm <= 0.0) + { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", + model->BSIM4v2toxm); + printf("Fatal: Toxm = %g is not positive.\n", model->BSIM4v2toxm); + Fatal_Flag = 1; + } + + if (model->BSIM4v2toxref <= 0.0) + { fprintf(fplog, "Fatal: Toxref = %g is not positive.\n", + model->BSIM4v2toxref); + printf("Fatal: Toxref = %g is not positive.\n", model->BSIM4v2toxref); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2lpe0 < -pParam->BSIM4v2leff) + { fprintf(fplog, "Fatal: Lpe0 = %g is less than -Leff.\n", + pParam->BSIM4v2lpe0); + printf("Fatal: Lpe0 = %g is less than -Leff.\n", + pParam->BSIM4v2lpe0); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2lpeb < -pParam->BSIM4v2leff) + { fprintf(fplog, "Fatal: Lpeb = %g is less than -Leff.\n", + pParam->BSIM4v2lpeb); + printf("Fatal: Lpeb = %g is less than -Leff.\n", + pParam->BSIM4v2lpeb); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2phin < -0.4) + { fprintf(fplog, "Fatal: Phin = %g is less than -0.4.\n", + pParam->BSIM4v2phin); + printf("Fatal: Phin = %g is less than -0.4.\n", + pParam->BSIM4v2phin); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2ndep <= 0.0) + { fprintf(fplog, "Fatal: Ndep = %g is not positive.\n", + pParam->BSIM4v2ndep); + printf("Fatal: Ndep = %g is not positive.\n", + pParam->BSIM4v2ndep); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2nsub <= 0.0) + { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", + pParam->BSIM4v2nsub); + printf("Fatal: Nsub = %g is not positive.\n", + pParam->BSIM4v2nsub); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2ngate < 0.0) + { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", + pParam->BSIM4v2ngate); + printf("Fatal: Ngate = %g Ngate is not positive.\n", + pParam->BSIM4v2ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2ngate > 1.e25) + { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", + pParam->BSIM4v2ngate); + printf("Fatal: Ngate = %g Ngate is too high\n", + pParam->BSIM4v2ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2xj <= 0.0) + { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", + pParam->BSIM4v2xj); + printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM4v2xj); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2dvt1 < 0.0) + { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", + pParam->BSIM4v2dvt1); + printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM4v2dvt1); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2dvt1w < 0.0) + { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", + pParam->BSIM4v2dvt1w); + printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM4v2dvt1w); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2w0 == -pParam->BSIM4v2weff) + { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2dsub < 0.0) + { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM4v2dsub); + printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM4v2dsub); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2b1 == -pParam->BSIM4v2weff) + { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2u0temp <= 0.0) + { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM4v2u0temp); + printf("Fatal: u0 at current temperature = %g is not positive.\n", + pParam->BSIM4v2u0temp); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2delta < 0.0) + { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", + pParam->BSIM4v2delta); + printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM4v2delta); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2vsattemp <= 0.0) + { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM4v2vsattemp); + printf("Fatal: Vsat at current temperature = %g is not positive.\n", + pParam->BSIM4v2vsattemp); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2pclm <= 0.0) + { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM4v2pclm); + printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM4v2pclm); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2drout < 0.0) + { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM4v2drout); + printf("Fatal: Drout = %g is negative.\n", pParam->BSIM4v2drout); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2pscbe2 <= 0.0) + { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", + pParam->BSIM4v2pscbe2); + printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM4v2pscbe2); + } + + if (here->BSIM4v2nf < 1.0) + { fprintf(fplog, "Fatal: Number of finger = %g is smaller than one.\n", here->BSIM4v2nf); + printf("Fatal: Number of finger = %g is smaller than one.\n", here->BSIM4v2nf); + Fatal_Flag = 1; + } + + if ((here->BSIM4v2l + model->BSIM4v2xl) <= model->BSIM4v2xgl) + { fprintf(fplog, "Fatal: The parameter xgl must be smaller than Ldrawn+XL.\n"); + printf("Fatal: The parameter xgl must be smaller than Ldrawn+XL.\n"); + Fatal_Flag = 1; + } + if (model->BSIM4v2ngcon < 1.0) + { fprintf(fplog, "Fatal: The parameter ngcon cannot be smaller than one.\n"); + printf("Fatal: The parameter ngcon cannot be smaller than one.\n"); + Fatal_Flag = 1; + } + if ((model->BSIM4v2ngcon != 1.0) && (model->BSIM4v2ngcon != 2.0)) + { model->BSIM4v2ngcon = 1.0; + fprintf(fplog, "Warning: Ngcon must be equal to one or two; reset to 1.0.\n"); + printf("Warning: Ngcon must be equal to one or two; reset to 1.0.\n"); + } + + if (model->BSIM4v2gbmin < 1.0e-20) + { fprintf(fplog, "Warning: Gbmin = %g is too small.\n", + model->BSIM4v2gbmin); + printf("Warning: Gbmin = %g is too small.\n", model->BSIM4v2gbmin); + } + + if (pParam->BSIM4v2noff < 0.1) + { fprintf(fplog, "Warning: Noff = %g is too small.\n", + pParam->BSIM4v2noff); + printf("Warning: Noff = %g is too small.\n", pParam->BSIM4v2noff); + } + if (pParam->BSIM4v2noff > 4.0) + { fprintf(fplog, "Warning: Noff = %g is too large.\n", + pParam->BSIM4v2noff); + printf("Warning: Noff = %g is too large.\n", pParam->BSIM4v2noff); + } + + if (pParam->BSIM4v2voffcv < -0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too small.\n", + pParam->BSIM4v2voffcv); + printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM4v2voffcv); + } + if (pParam->BSIM4v2voffcv > 0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too large.\n", + pParam->BSIM4v2voffcv); + printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM4v2voffcv); + } + + /* Check capacitance parameters */ + if (pParam->BSIM4v2clc < 0.0) + { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM4v2clc); + printf("Fatal: Clc = %g is negative.\n", pParam->BSIM4v2clc); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2moin < 5.0) + { fprintf(fplog, "Warning: Moin = %g is too small.\n", + pParam->BSIM4v2moin); + printf("Warning: Moin = %g is too small.\n", pParam->BSIM4v2moin); + } + if (pParam->BSIM4v2moin > 25.0) + { fprintf(fplog, "Warning: Moin = %g is too large.\n", + pParam->BSIM4v2moin); + printf("Warning: Moin = %g is too large.\n", pParam->BSIM4v2moin); + } + if(model->BSIM4v2capMod ==2) { + if (pParam->BSIM4v2acde < 0.4) + { fprintf(fplog, "Warning: Acde = %g is too small.\n", + pParam->BSIM4v2acde); + printf("Warning: Acde = %g is too small.\n", pParam->BSIM4v2acde); + } + if (pParam->BSIM4v2acde > 1.6) + { fprintf(fplog, "Warning: Acde = %g is too large.\n", + pParam->BSIM4v2acde); + printf("Warning: Acde = %g is too large.\n", pParam->BSIM4v2acde); + } + } + + if (model->BSIM4v2paramChk ==1) + { +/* Check L and W parameters */ + if (pParam->BSIM4v2leff <= 1.0e-9) + { fprintf(fplog, "Warning: Leff = %g <= 1.0e-9. Recommended Leff >= 1e-8 \n", + pParam->BSIM4v2leff); + printf("Warning: Leff = %g <= 1.0e-9. Recommended Leff >= 1e-8 \n", + pParam->BSIM4v2leff); + } + + if (pParam->BSIM4v2leffCV <= 1.0e-9) + { fprintf(fplog, "Warning: Leff for CV = %g <= 1.0e-9. Recommended LeffCV >=1e-8 \n", + pParam->BSIM4v2leffCV); + printf("Warning: Leff for CV = %g <= 1.0e-9. Recommended LeffCV >=1e-8 \n", + pParam->BSIM4v2leffCV); + } + + if (pParam->BSIM4v2weff <= 1.0e-9) + { fprintf(fplog, "Warning: Weff = %g <= 1.0e-9. Recommended Weff >=1e-7 \n", + pParam->BSIM4v2weff); + printf("Warning: Weff = %g <= 1.0e-9. Recommended Weff >=1e-7 \n", + pParam->BSIM4v2weff); + } + + if (pParam->BSIM4v2weffCV <= 1.0e-9) + { fprintf(fplog, "Warning: Weff for CV = %g <= 1.0e-9. Recommended WeffCV >= 1e-7 \n", + pParam->BSIM4v2weffCV); + printf("Warning: Weff for CV = %g <= 1.0e-9. Recommended WeffCV >= 1e-7 \n", + pParam->BSIM4v2weffCV); + } + + /* Check threshold voltage parameters */ + if (model->BSIM4v2toxe < 1.0e-10) + { fprintf(fplog, "Warning: Toxe = %g is less than 1A. Recommended Toxe >= 5A\n", + model->BSIM4v2toxe); + printf("Warning: Toxe = %g is less than 1A. Recommended Toxe >= 5A\n", model->BSIM4v2toxe); + } + if (model->BSIM4v2toxp < 1.0e-10) + { fprintf(fplog, "Warning: Toxp = %g is less than 1A. Recommended Toxp >= 5A\n", + model->BSIM4v2toxp); + printf("Warning: Toxp = %g is less than 1A. Recommended Toxp >= 5A\n", model->BSIM4v2toxp); + } + if (model->BSIM4v2toxm < 1.0e-10) + { fprintf(fplog, "Warning: Toxm = %g is less than 1A. Recommended Toxm >= 5A\n", + model->BSIM4v2toxm); + printf("Warning: Toxm = %g is less than 1A. Recommended Toxm >= 5A\n", model->BSIM4v2toxm); + } + + if (pParam->BSIM4v2ndep <= 1.0e12) + { fprintf(fplog, "Warning: Ndep = %g may be too small.\n", + pParam->BSIM4v2ndep); + printf("Warning: Ndep = %g may be too small.\n", + pParam->BSIM4v2ndep); + } + else if (pParam->BSIM4v2ndep >= 1.0e21) + { fprintf(fplog, "Warning: Ndep = %g may be too large.\n", + pParam->BSIM4v2ndep); + printf("Warning: Ndep = %g may be too large.\n", + pParam->BSIM4v2ndep); + } + + if (pParam->BSIM4v2nsub <= 1.0e14) + { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", + pParam->BSIM4v2nsub); + printf("Warning: Nsub = %g may be too small.\n", + pParam->BSIM4v2nsub); + } + else if (pParam->BSIM4v2nsub >= 1.0e21) + { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", + pParam->BSIM4v2nsub); + printf("Warning: Nsub = %g may be too large.\n", + pParam->BSIM4v2nsub); + } + + if ((pParam->BSIM4v2ngate > 0.0) && + (pParam->BSIM4v2ngate <= 1.e18)) + { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM4v2ngate); + printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM4v2ngate); + } + + if (pParam->BSIM4v2dvt0 < 0.0) + { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", + pParam->BSIM4v2dvt0); + printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM4v2dvt0); + } + + if (fabs(1.0e-6 / (pParam->BSIM4v2w0 + pParam->BSIM4v2weff)) > 10.0) + { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); + printf("Warning: (W0 + Weff) may be too small.\n"); + } + +/* Check subthreshold parameters */ + if (pParam->BSIM4v2nfactor < 0.0) + { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", + pParam->BSIM4v2nfactor); + printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM4v2nfactor); + } + if (pParam->BSIM4v2cdsc < 0.0) + { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", + pParam->BSIM4v2cdsc); + printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM4v2cdsc); + } + if (pParam->BSIM4v2cdscd < 0.0) + { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", + pParam->BSIM4v2cdscd); + printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM4v2cdscd); + } +/* Check DIBL parameters */ + if (pParam->BSIM4v2eta0 < 0.0) + { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", + pParam->BSIM4v2eta0); + printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM4v2eta0); + } + +/* Check Abulk parameters */ + if (fabs(1.0e-6 / (pParam->BSIM4v2b1 + pParam->BSIM4v2weff)) > 10.0) + { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); + printf("Warning: (B1 + Weff) may be too small.\n"); + } + + +/* Check Saturation parameters */ + if (pParam->BSIM4v2a2 < 0.01) + { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM4v2a2); + printf("Warning: A2 = %g is too small. Set to 0.01.\n", + pParam->BSIM4v2a2); + pParam->BSIM4v2a2 = 0.01; + } + else if (pParam->BSIM4v2a2 > 1.0) + { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM4v2a2); + printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM4v2a2); + pParam->BSIM4v2a2 = 1.0; + pParam->BSIM4v2a1 = 0.0; + + } + + if (pParam->BSIM4v2prwg < 0.0) + { fprintf(fplog, "Warning: Prwg = %g is negative. Set to zero.\n", + pParam->BSIM4v2prwg); + printf("Warning: Prwg = %g is negative. Set to zero.\n", + pParam->BSIM4v2prwg); + pParam->BSIM4v2prwg = 0.0; + } + if (pParam->BSIM4v2rdsw < 0.0) + { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM4v2rdsw); + printf("Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM4v2rdsw); + pParam->BSIM4v2rdsw = 0.0; + pParam->BSIM4v2rds0 = 0.0; + } + if (pParam->BSIM4v2rds0 < 0.0) + { fprintf(fplog, "Warning: Rds at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v2rds0); + printf("Warning: Rds at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v2rds0); + pParam->BSIM4v2rds0 = 0.0; + } + + if (pParam->BSIM4v2rdswmin < 0.0) + { fprintf(fplog, "Warning: Rdswmin at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v2rdswmin); + printf("Warning: Rdswmin at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v2rdswmin); + pParam->BSIM4v2rdswmin = 0.0; + } + + if (pParam->BSIM4v2vsattemp < 1.0e3) + { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM4v2vsattemp); + printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM4v2vsattemp); + } + + if (pParam->BSIM4v2fprout < 0.0) + { fprintf(fplog, "Fatal: fprout = %g is negative.\n", + pParam->BSIM4v2fprout); + printf("Fatal: fprout = %g is negative.\n", pParam->BSIM4v2fprout); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2pdits < 0.0) + { fprintf(fplog, "Fatal: pdits = %g is negative.\n", + pParam->BSIM4v2pdits); + printf("Fatal: pdits = %g is negative.\n", pParam->BSIM4v2pdits); + Fatal_Flag = 1; + } + if (model->BSIM4v2pditsl < 0.0) + { fprintf(fplog, "Fatal: pditsl = %g is negative.\n", + model->BSIM4v2pditsl); + printf("Fatal: pditsl = %g is negative.\n", model->BSIM4v2pditsl); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v2pdibl1 < 0.0) + { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", + pParam->BSIM4v2pdibl1); + printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM4v2pdibl1); + } + if (pParam->BSIM4v2pdibl2 < 0.0) + { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", + pParam->BSIM4v2pdibl2); + printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM4v2pdibl2); + } + + if (pParam->BSIM4v2nigbinv <= 0.0) + { fprintf(fplog, "Fatal: nigbinv = %g is non-positive.\n", + pParam->BSIM4v2nigbinv); + printf("Fatal: nigbinv = %g is non-positive.\n", pParam->BSIM4v2nigbinv); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2nigbacc <= 0.0) + { fprintf(fplog, "Fatal: nigbacc = %g is non-positive.\n", + pParam->BSIM4v2nigbacc); + printf("Fatal: nigbacc = %g is non-positive.\n", pParam->BSIM4v2nigbacc); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2nigc <= 0.0) + { fprintf(fplog, "Fatal: nigc = %g is non-positive.\n", + pParam->BSIM4v2nigc); + printf("Fatal: nigc = %g is non-positive.\n", pParam->BSIM4v2nigc); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2poxedge <= 0.0) + { fprintf(fplog, "Fatal: poxedge = %g is non-positive.\n", + pParam->BSIM4v2poxedge); + printf("Fatal: poxedge = %g is non-positive.\n", pParam->BSIM4v2poxedge); + Fatal_Flag = 1; + } + if (pParam->BSIM4v2pigcd <= 0.0) + { fprintf(fplog, "Fatal: pigcd = %g is non-positive.\n", + pParam->BSIM4v2pigcd); + printf("Fatal: pigcd = %g is non-positive.\n", pParam->BSIM4v2pigcd); + Fatal_Flag = 1; + } + + +/* Check overlap capacitance parameters */ + if (model->BSIM4v2cgdo < 0.0) + { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM4v2cgdo); + printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM4v2cgdo); + model->BSIM4v2cgdo = 0.0; + } + if (model->BSIM4v2cgso < 0.0) + { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM4v2cgso); + printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM4v2cgso); + model->BSIM4v2cgso = 0.0; + } + + if (model->BSIM4v2tnoia < 0.0) + { fprintf(fplog, "Warning: tnoia = %g is negative. Set to zero.\n", model->BSIM4v2tnoia); + printf("Warning: tnoia = %g is negative. Set to zero.\n", model->BSIM4v2tnoia); + model->BSIM4v2tnoia = 0.0; + } + if (model->BSIM4v2tnoib < 0.0) + { fprintf(fplog, "Warning: tnoib = %g is negative. Set to zero.\n", model->BSIM4v2tnoib); + printf("Warning: tnoib = %g is negative. Set to zero.\n", model->BSIM4v2tnoib); + model->BSIM4v2tnoib = 0.0; + } + + if (model->BSIM4v2ntnoi < 0.0) + { fprintf(fplog, "Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4v2ntnoi); + printf("Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4v2ntnoi); + model->BSIM4v2ntnoi = 0.0; + } + + }/* loop for the parameter check for warning messages */ + fclose(fplog); + } + else + { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); + } + + return(Fatal_Flag); +} + diff --git a/src/spicelib/devices/bsim4v2/b4v2cvtest.c b/src/spicelib/devices/bsim4v2/b4v2cvtest.c new file mode 100644 index 000000000..018bc273a --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2cvtest.c @@ -0,0 +1,201 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4cvtest.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "trandefs.h" +#include "const.h" +#include "devdefs.h" +#include "sperror.h" + + + +int +BSIM4v2convTest(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance *here; +double delvbd, delvbs, delvds, delvgd, delvgs; +double delvdbd, delvsbs; +double delvbd_jct, delvbs_jct; +double vds, vgs, vgd, vgdo, vbs, vbd; +double vdbd, vdbs, vsbs; +double cbhat, cdhat, Idtot, Ibtot; +double vses, vdes, vdedo, delvses, delvded, delvdes; +double Isestot, cseshat, Idedtot, cdedhat; +double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat; +double tol0, tol1, tol2, tol3, tol4, tol5, tol6; + + for (; model != NULL; model = model->BSIM4v2nextModel) + { for (here = model->BSIM4v2instances; here != NULL ; + here=here->BSIM4v2nextInstance) + { + if (here->BSIM4v2owner != ARCHme) continue; + + vds = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vgs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2gNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vbs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2bNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vdbs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2dbNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vsbs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2sbNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vses = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2sNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vdes = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2dNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + + vgdo = *(ckt->CKTstate0 + here->BSIM4v2vgs) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + vbd = vbs - vds; + vdbd = vdbs - vds; + vgd = vgs - vds; + + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v2vbd); + delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v2vdbd); + delvgd = vgd - vgdo; + + delvds = vds - *(ckt->CKTstate0 + here->BSIM4v2vds); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v2vgs); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v2vbs); + delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v2vsbs); + + delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v2vses)); + vdedo = *(ckt->CKTstate0 + here->BSIM4v2vdes) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v2vdes); + delvded = vdes - vds - vdedo; + + delvbd_jct = (!here->BSIM4v2rbodyMod) ? delvbd : delvdbd; + delvbs_jct = (!here->BSIM4v2rbodyMod) ? delvbs : delvsbs; + + if (here->BSIM4v2mode >= 0) + { Idtot = here->BSIM4v2cd + here->BSIM4v2csub - here->BSIM4v2cbd + + here->BSIM4v2Igidl; + cdhat = Idtot - here->BSIM4v2gbd * delvbd_jct + + (here->BSIM4v2gmbs + here->BSIM4v2gbbs + here->BSIM4v2ggidlb) * delvbs + + (here->BSIM4v2gm + here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * delvgs + + (here->BSIM4v2gds + here->BSIM4v2gbds + here->BSIM4v2ggidld) * delvds; + + Igstot = here->BSIM4v2Igs + here->BSIM4v2Igcs; + cgshat = Igstot + (here->BSIM4v2gIgsg + here->BSIM4v2gIgcsg) * delvgs + + here->BSIM4v2gIgcsd * delvds + here->BSIM4v2gIgcsb * delvbs; + + Igdtot = here->BSIM4v2Igd + here->BSIM4v2Igcd; + cgdhat = Igdtot + here->BSIM4v2gIgdg * delvgd + here->BSIM4v2gIgcdg * delvgs + + here->BSIM4v2gIgcdd * delvds + here->BSIM4v2gIgcdb * delvbs; + + Igbtot = here->BSIM4v2Igb; + cgbhat = here->BSIM4v2Igb + here->BSIM4v2gIgbg * delvgs + here->BSIM4v2gIgbd + * delvds + here->BSIM4v2gIgbb * delvbs; + } + else + { Idtot = here->BSIM4v2cd + here->BSIM4v2cbd - here->BSIM4v2Igisl; + cdhat = Idtot + here->BSIM4v2gbd * delvbd_jct + here->BSIM4v2gmbs + * delvbd + here->BSIM4v2gm * delvgd + - here->BSIM4v2gds * delvds - here->BSIM4v2ggislg * vgd + - here->BSIM4v2ggislb * vbd + here->BSIM4v2ggisls * vds; + + Igstot = here->BSIM4v2Igs + here->BSIM4v2Igcd; + cgshat = Igstot + here->BSIM4v2gIgsg * delvgs + here->BSIM4v2gIgcdg * delvgd + - here->BSIM4v2gIgcdd * delvds + here->BSIM4v2gIgcdb * delvbd; + + Igdtot = here->BSIM4v2Igd + here->BSIM4v2Igcs; + cgdhat = Igdtot + (here->BSIM4v2gIgdg + here->BSIM4v2gIgcsg) * delvgd + - here->BSIM4v2gIgcsd * delvds + here->BSIM4v2gIgcsb * delvbd; + + Igbtot = here->BSIM4v2Igb; + cgbhat = here->BSIM4v2Igb + here->BSIM4v2gIgbg * delvgd - here->BSIM4v2gIgbd + * delvds + here->BSIM4v2gIgbb * delvbd; + } + + Isestot = here->BSIM4v2gstot * (*(ckt->CKTstate0 + here->BSIM4v2vses)); + cseshat = Isestot + here->BSIM4v2gstot * delvses + + here->BSIM4v2gstotd * delvds + here->BSIM4v2gstotg * delvgs + + here->BSIM4v2gstotb * delvbs; + + Idedtot = here->BSIM4v2gdtot * vdedo; + cdedhat = Idedtot + here->BSIM4v2gdtot * delvded + + here->BSIM4v2gdtotd * delvds + here->BSIM4v2gdtotg * delvgs + + here->BSIM4v2gdtotb * delvbs; + + /* + * Check convergence + */ + + if ((here->BSIM4v2off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot)) + + ckt->CKTabstol; + tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot)) + + ckt->CKTabstol; + tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot)) + + ckt->CKTabstol; + tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot)) + + ckt->CKTabstol; + tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot)) + + ckt->CKTabstol; + tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot)) + + ckt->CKTabstol; + + if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1) + || (fabs(cdedhat - Idedtot) >= tol2)) + { ckt->CKTnoncon++; + return(OK); + } + + if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4) + || (fabs(cgbhat - Igbtot) >= tol5)) + { ckt->CKTnoncon++; + return(OK); + } + + Ibtot = here->BSIM4v2cbs + here->BSIM4v2cbd + - here->BSIM4v2Igidl - here->BSIM4v2Igisl - here->BSIM4v2csub; + if (here->BSIM4v2mode >= 0) + { cbhat = Ibtot + here->BSIM4v2gbd * delvbd_jct + + here->BSIM4v2gbs * delvbs_jct - (here->BSIM4v2gbbs + here->BSIM4v2ggidlb) + * delvbs - (here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * delvgs + - (here->BSIM4v2gbds + here->BSIM4v2ggidld) * delvds + - here->BSIM4v2ggislg * delvgd - here->BSIM4v2ggislb* delvbd + here->BSIM4v2ggisls * delvds ; + } + else + { cbhat = Ibtot + here->BSIM4v2gbs * delvbs_jct + here->BSIM4v2gbd + * delvbd_jct - (here->BSIM4v2gbbs + here->BSIM4v2ggidlb) * delvbd + - (here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * delvgd + + (here->BSIM4v2gbds + here->BSIM4v2ggidld) * delvds + - here->BSIM4v2ggislg * delvgs - here->BSIM4v2ggislb * delvbs + here->BSIM4v2ggisls * delvds; + } + tol6 = ckt->CKTreltol * MAX(fabs(cbhat), + fabs(Ibtot)) + ckt->CKTabstol; + if (fabs(cbhat - Ibtot) > tol6) + { ckt->CKTnoncon++; + return(OK); + } + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2del.c b/src/spicelib/devices/bsim4v2/b4v2del.c new file mode 100644 index 000000000..b2e148bcd --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2del.c @@ -0,0 +1,41 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4del.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v2def.h" +#include "sperror.h" +#include "gendefs.h" + + +int +BSIM4v2delete(inModel,name,inInst) +GENmodel *inModel; +IFuid name; +GENinstance **inInst; +{ +BSIM4v2instance **fast = (BSIM4v2instance**)inInst; +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance **prev = NULL; +BSIM4v2instance *here; + + for (; model ; model = model->BSIM4v2nextModel) + { prev = &(model->BSIM4v2instances); + for (here = *prev; here ; here = *prev) + { if (here->BSIM4v2name == name || (fast && here==*fast)) + { *prev= here->BSIM4v2nextInstance; + FREE(here); + return(OK); + } + prev = &(here->BSIM4v2nextInstance); + } + } + return(E_NODEV); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2dest.c b/src/spicelib/devices/bsim4v2/b4v2dest.c new file mode 100644 index 000000000..8e7024f68 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2dest.c @@ -0,0 +1,38 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4dest.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v2def.h" + +void +BSIM4v2destroy(inModel) +GENmodel **inModel; +{ +BSIM4v2model **model = (BSIM4v2model**)inModel; +BSIM4v2instance *here; +BSIM4v2instance *prev = NULL; +BSIM4v2model *mod = *model; +BSIM4v2model *oldmod = NULL; + + for (; mod ; mod = mod->BSIM4v2nextModel) + { if(oldmod) FREE(oldmod); + oldmod = mod; + prev = (BSIM4v2instance *)NULL; + for (here = mod->BSIM4v2instances; here; here = here->BSIM4v2nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + } + if(oldmod) FREE(oldmod); + *model = NULL; + return; +} diff --git a/src/spicelib/devices/bsim4v2/b4v2geo.c b/src/spicelib/devices/bsim4v2/b4v2geo.c new file mode 100644 index 000000000..cdb5dce55 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2geo.c @@ -0,0 +1,382 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4geo.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include + +/* + * WDLiu: + * This subrutine is a special module to process the geometry dependent + * parasitics for BSIM4v2, which calculates Ps, Pd, As, Ad, and Rs and Rd + * for multi-fingers and varous GEO and RGEO options. + */ + +int +BSIM4v2NumFingerDiff(nf, minSD, nuIntD, nuEndD, nuIntS, nuEndS) +int minSD; +double nf, *nuIntD, *nuEndD, *nuIntS, *nuEndS; +{ +int NF; + NF = (int)nf; + if ((NF%2) != 0) + { *nuEndD = *nuEndS = 1.0; + *nuIntD = *nuIntS = 2.0 * MAX((nf - 1.0) / 2.0, 0.0); + } + else + { if (minSD == 1) /* minimize # of source */ + { *nuEndD = 2.0; + *nuIntD = 2.0 * MAX((nf / 2.0 - 1.0), 0.0); + *nuEndS = 0.0; + *nuIntS = nf; + } + else + { *nuEndD = 0.0; + *nuIntD = nf; + *nuEndS = 2.0; + *nuIntS = 2.0 * MAX((nf / 2.0 - 1.0), 0.0); + } + } +return 0; +} + + +int +BSIM4v2PAeffGeo(nf, geo, minSD, Weffcj, DMCG, DMCI, DMDG, Ps, Pd, As, Ad) +int geo, minSD; +double Weffcj, DMCG, DMCI, DMDG; +double nf, *Ps, *Pd, *As, *Ad; +{ +double T0, T1, T2; +double ADiso, ADsha, ADmer, ASiso, ASsha, ASmer; +double PDiso, PDsha, PDmer, PSiso, PSsha, PSmer; +double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0; + + if (geo < 9) /* For geo = 9 and 10, the numbers of S/D diffusions already known */ + BSIM4v2NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS); + + T0 = DMCG + DMCI; + T1 = DMCG + DMCG; + T2 = DMDG + DMDG; + + PSiso = PDiso = T0 + T0 + Weffcj; + PSsha = PDsha = T1; + PSmer = PDmer = T2; + + ASiso = ADiso = T0 * Weffcj; + ASsha = ADsha = DMCG * Weffcj; + ASmer = ADmer = DMDG * Weffcj; + + switch(geo) + { case 0: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 1: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 2: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 3: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 4: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 5: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 6: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 7: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 8: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 9: /* geo = 9 and 10 happen only when nf = even */ + *Ps = PSiso + (nf - 1.0) * PSsha; + *Pd = nf * PDsha; + *As = ASiso + (nf - 1.0) * ASsha; + *Ad = nf * ADsha; + break; + case 10: + *Ps = nf * PSsha; + *Pd = PDiso + (nf - 1.0) * PDsha; + *As = nf * ASsha; + *Ad = ADiso + (nf - 1.0) * ADsha; + break; + default: + printf("Warning: Specified GEO = %d not matched\n", geo); + } +return 0; +} + + +int +BSIM4v2RdseffGeo(nf, geo, rgeo, minSD, Weffcj, Rsh, DMCG, DMCI, DMDG, Type, Rtot) +int geo, rgeo, minSD, Type; +double nf, Weffcj, Rsh, DMCG, DMCI, DMDG; +double *Rtot; +{ +double Rint, Rend = 0.0; +double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0; + + if (geo < 9) /* since geo = 9 and 10 only happen when nf = even */ + { BSIM4v2NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS); + + /* Internal S/D resistance -- assume shared S or D and all wide contacts */ + if (Type == 1) + { if (nuIntS == 0.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / ( Weffcj * nuIntS); + } + else + { if (nuIntD == 0.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / ( Weffcj * nuIntD); + } + } + + /* End S/D resistance -- geo dependent */ + switch(geo) + { case 0: + if (Type == 1) BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 1: + if (Type == 1) BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 2: + if (Type == 1) BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 3: + if (Type == 1) BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 4: + if (Type == 1) BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else Rend = Rsh * DMDG / Weffcj; + break; + case 5: + if (Type == 1) BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else Rend = Rsh * DMDG / (Weffcj * nuEndD); + break; + case 6: + if (Type == 1) Rend = Rsh * DMDG / Weffcj; + else BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 7: + if (Type == 1) Rend = Rsh * DMDG / (Weffcj * nuEndS); + else BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 8: + Rend = Rsh * DMDG / Weffcj; + break; + case 9: /* all wide contacts assumed for geo = 9 and 10 */ + if (Type == 1) + { Rend = 0.5 * Rsh * DMCG / Weffcj; + if (nf == 2.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / (Weffcj * (nf - 2.0)); + } + else + { Rend = 0.0; + Rint = Rsh * DMCG / (Weffcj * nf); + } + break; + case 10: + if (Type == 1) + { Rend = 0.0; + Rint = Rsh * DMCG / (Weffcj * nf); + } + else + { Rend = 0.5 * Rsh * DMCG / Weffcj;; + if (nf == 2.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / (Weffcj * (nf - 2.0)); + } + break; + default: + printf("Warning: Specified GEO = %d not matched\n", geo); + } + + if (Rint <= 0.0) + *Rtot = Rend; + else if (Rend <= 0.0) + *Rtot = Rint; + else + *Rtot = Rint * Rend / (Rint + Rend); +if(*Rtot==0.0) + printf("Warning: Zero resistance returned from RdseffGeo\n"); +return 0; +} + + +int +BSIM4v2RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend) +double Weffcj, Rsh, DMCG, DMCI, DMDG; +int rgeo, Type; +double nuEnd, *Rend; +{ + if (Type == 1) + { switch(rgeo) + { case 1: + case 2: + case 5: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 3: + case 4: + case 6: + if ((DMCG + DMCI) == 0.0) + printf("(DMCG + DMCI) can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI)); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } + else + { switch(rgeo) + { case 1: + case 3: + case 7: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 2: + case 4: + case 8: + if ((DMCG + DMCI) == 0.0) + printf("(DMCG + DMCI) can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI)); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } +return 0; +} + + +int +BSIM4v2RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend) +double Weffcj, Rsh, DMCG, DMCI, DMDG; +int rgeo, Type; +double nuEnd, *Rend; +{ + if (Type == 1) + { switch(rgeo) + { case 1: + case 2: + case 5: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 3: + case 4: + case 6: + if (DMCG == 0.0) + printf("DMCG can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } + else + { switch(rgeo) + { case 1: + case 3: + case 7: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 2: + case 4: + case 8: + if (DMCG == 0.0) + printf("DMCG can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } +return 0; +} diff --git a/src/spicelib/devices/bsim4v2/b4v2getic.c b/src/spicelib/devices/bsim4v2/b4v2getic.c new file mode 100644 index 000000000..4efdbf133 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2getic.c @@ -0,0 +1,44 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4getic.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "sperror.h" + + +int +BSIM4v2getic(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance *here; + + for (; model ; model = model->BSIM4v2nextModel) + { for (here = model->BSIM4v2instances; here; here = here->BSIM4v2nextInstance) + { if (here->BSIM4v2owner != ARCHme) continue; + if (!here->BSIM4v2icVDSGiven) + { here->BSIM4v2icVDS = *(ckt->CKTrhs + here->BSIM4v2dNode) + - *(ckt->CKTrhs + here->BSIM4v2sNode); + } + if (!here->BSIM4v2icVGSGiven) + { here->BSIM4v2icVGS = *(ckt->CKTrhs + here->BSIM4v2gNodeExt) + - *(ckt->CKTrhs + here->BSIM4v2sNode); + } + if(!here->BSIM4v2icVBSGiven) + { here->BSIM4v2icVBS = *(ckt->CKTrhs + here->BSIM4v2bNode) + - *(ckt->CKTrhs + here->BSIM4v2sNode); + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2ld.c b/src/spicelib/devices/bsim4v2/b4v2ld.c new file mode 100644 index 000000000..7598d200c --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2ld.c @@ -0,0 +1,4492 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4ld.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPSSI 1.03594e-10 +#define Charge_q 1.60219e-19 +#define DELTA_1 0.02 +#define DELTA_2 0.02 +#define DELTA_3 0.02 +#define DELTA_4 0.02 + +int BSIM4v2polyDepletion(double phi, double ngate,double coxe, double Vgs, double *Vgs_eff, double *dVgs_eff_dVg); + +int +BSIM4v2load(inModel,ckt) +GENmodel *inModel; +register CKTcircuit *ckt; +{ +register BSIM4v2model *model = (BSIM4v2model*)inModel; +register BSIM4v2instance *here; + +double ceqgstot, dgstot_dvd, dgstot_dvg, dgstot_dvs, dgstot_dvb; +double ceqgdtot, dgdtot_dvd, dgdtot_dvg, dgdtot_dvs, dgdtot_dvb; +double gstot, gstotd, gstotg, gstots, gstotb, gspr, Rs, Rd; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double vgs_eff, vgd_eff, dvgs_eff_dvg, dvgd_eff_dvg; +double dRs_dvg, dRd_dvg, dRs_dvb, dRd_dvb; +double dT0_dvg, dT1_dvb, dT3_dvg, dT3_dvb; +double vses, vdes, vdedo, delvses, delvded, delvdes; +double Isestot, cseshat, Idedtot, cdedhat; +double tol0, tol1, tol2, tol3, tol4, tol5, tol6; + +double geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb, ceqgcrg; +double vges, vgms, vgedo, vgmdo, vged, vgmd, delvged, delvgmd; +double delvges, delvgms, vgmb; +double gcgmgmb, gcgmdb, gcgmsb, gcdgmb, gcsgmb; +double gcgmbb, gcbgmb, qgmb, qgmid, ceqqgmid; + +double vbd, vbs, vds, vgb, vgd, vgs, vgdo, xfact; +double vdbs, vdbd, vsbs, vsbdo, vsbd; +double delvdbs, delvdbd, delvsbs; +double delvbd_jct, delvbs_jct, vbs_jct, vbd_jct; + +double SourceSatCurrent, DrainSatCurrent; +double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst; +double ceqqb, ceqqd, ceqqg, ceqqjd, ceqqjs, ceq, geq; +double cdrain, cdhat, ceqdrn, ceqbd, ceqbs, ceqjd, ceqjs, gjbd, gjbs; +double czbd, czbdsw, czbdswg, czbs, czbssw, czbsswg, evbd, evbs, arg, sarg; +double delvbd, delvbs, delvds, delvgd, delvgs; +double Vfbeff, dVfbeff_dVg, dVfbeff_dVb, V3, V4; +double gcbdb, gcbgb, gcbsb, gcddb, gcdgb, gcdsb, gcgdb, gcggb, gcgsb, gcsdb; +double gcgbb, gcdbb, gcsbb, gcbbb; +double gcdbdb, gcsbsb; +double gcsgb, gcssb, MJD, MJSWD, MJSWGD, MJS, MJSWS, MJSWGS; +double qgate, qbulk, qdrn, qsrc, cqgate, cqbody, cqdrn; +double Vdb, Vds, Vgs, Vbs, Gmbs, FwdSum, RevSum; +double Igidl, Ggidld, Ggidlg, Ggidlb; +double Voxacc, dVoxacc_dVg, dVoxacc_dVb; +double Voxdepinv, dVoxdepinv_dVg, dVoxdepinv_dVd, dVoxdepinv_dVb; +double VxNVt, ExpVxNVt, Vaux, dVaux_dVg, dVaux_dVd, dVaux_dVb; +double Igc, dIgc_dVg, dIgc_dVd, dIgc_dVb; +double Igcs, dIgcs_dVg, dIgcs_dVd, dIgcs_dVb; +double Igcd, dIgcd_dVg, dIgcd_dVd, dIgcd_dVb; +double Igs, dIgs_dVg, dIgs_dVs, Igd, dIgd_dVg, dIgd_dVd; +double Igbacc, dIgbacc_dVg, dIgbacc_dVd, dIgbacc_dVb; +double Igbinv, dIgbinv_dVg, dIgbinv_dVd, dIgbinv_dVb; +double Igb, dIgb_dVg, dIgb_dVd, dIgb_dVb; +double Pigcd, dPigcd_dVg, dPigcd_dVd, dPigcd_dVb; +double Istoteq, gIstotg, gIstotd, gIstots, gIstotb; +double Idtoteq, gIdtotg, gIdtotd, gIdtots, gIdtotb; +double Ibtoteq, gIbtotg, gIbtotd, gIbtots, gIbtotb; +double Igtoteq, gIgtotg, gIgtotd, gIgtots, gIgtotb; +double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat; +double Vgs_eff, Vfb, dVbs_dVb, Vth_NarrowW; +double Phis, dPhis_dVb, sqrtPhis, dsqrtPhis_dVb, Vth, dVth_dVb, dVth_dVd; +double Vgst, dVgst_dVg, dVgst_dVb, dVgs_eff_dVg, Nvtms, Nvtmd; +double Vgdt, Vgsaddvth, Vgsaddvth2, Vgsaddvth1o3, Vtm; +double n, dn_dVb, dn_dVd, voffcv, noff, dnoff_dVd, dnoff_dVb; +double ExpArg, ExpArg1, V0, CoxWLcen, QovCox, LINK; +double DeltaPhi, dDeltaPhi_dVg; +double Cox, Tox, Tcen, dTcen_dVg, dTcen_dVd, dTcen_dVb; +double Ccen, Coxeff, dCoxeff_dVd, dCoxeff_dVg, dCoxeff_dVb; +double Denomi, dDenomi_dVg, dDenomi_dVd, dDenomi_dVb; +double ueff, dueff_dVg, dueff_dVd, dueff_dVb; +double Esat, dEsat_dVg, dEsat_dVd, dEsat_dVb, Vdsat, Vdsat0; +double EsatL, dEsatL_dVg, dEsatL_dVd, dEsatL_dVb; +double Ilimit, Iexp, dIexp_dVg, dIexp_dVd, dIexp_dVb; +double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; +double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, Va2, dVa_dVd, dVa_dVg, dVa_dVb; +double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; +double Arg1, Arg2, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; +double T0, dT0_dVg, dT0_dVd, dT0_dVb; +double T1, dT1_dVg, dT1_dVd, dT1_dVb; +double T2, dT2_dVg, dT2_dVd, dT2_dVb; +double T3, dT3_dVg, dT3_dVd, dT3_dVb; +double T4, dT4_dVg, dT4_dVd, dT4_dVb; +double T5, dT5_dVg, dT5_dVd, dT5_dVb; +double T6, dT6_dVg, dT6_dVd, dT6_dVb; +double T7, dT7_dVg, dT7_dVd, dT7_dVb; +double T8, dT8_dVg, dT8_dVd, dT8_dVb; +double T9, dT9_dVg, dT9_dVd, dT9_dVb; +double T10, dT10_dVg, dT10_dVb, dT10_dVd; +double T11, T12, T13, T14; +double tmp, Abulk, dAbulk_dVb, Abulk0, dAbulk0_dVb; +double Cclm, dCclm_dVg, dCclm_dVd, dCclm_dVb; +double FP, dFP_dVg, PvagTerm, dPvagTerm_dVg, dPvagTerm_dVd, dPvagTerm_dVb; +double VADITS, dVADITS_dVg, dVADITS_dVd; +double Lpe_Vb, DITS_Sft, dDITS_Sft_dVb, dDITS_Sft_dVd; +double VACLM, dVACLM_dVg, dVACLM_dVd, dVACLM_dVb; +double VADIBL, dVADIBL_dVg, dVADIBL_dVd, dVADIBL_dVb; +double Xdep, dXdep_dVb, lt1, dlt1_dVb, ltw, dltw_dVb, Delt_vth, dDelt_vth_dVb; +double Theta0, dTheta0_dVb, Theta1, dTheta1_dVb; +double Thetarout, dThetarout_dVb, TempRatio, tmp1, tmp2, tmp3, tmp4; +double DIBL_Sft, dDIBL_Sft_dVd, DIBL_fact, Lambda, dLambda_dVg; +double Idtot, Ibtot, a1, ScalingFactor; + +double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; +double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; +double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; +double diffVds, diffVdsCV, dAbulk_dVg; +double beta, dbeta_dVg, dbeta_dVd, dbeta_dVb; +double gche, dgche_dVg, dgche_dVd, dgche_dVb; +double fgche1, dfgche1_dVg, dfgche1_dVd, dfgche1_dVb; +double fgche2, dfgche2_dVg, dfgche2_dVd, dfgche2_dVb; +double Idl, dIdl_dVg, dIdl_dVd, dIdl_dVb; +double Idsa, dIdsa_dVg, dIdsa_dVd, dIdsa_dVb; +double Ids, Gm, Gds, Gmb, devbs_dvb, devbd_dvb; +double Isub, Gbd, Gbg, Gbb; +double VASCBE, dVASCBE_dVg, dVASCBE_dVd, dVASCBE_dVb; +double CoxeffWovL; +double Rds, dRds_dVg, dRds_dVb, WVCox, WVCoxRds; +double Vgst2Vtm, VdsatCV, dVdsatCV_dVd, dVdsatCV_dVg, dVdsatCV_dVb; +double Leff, Weff, dWeff_dVg, dWeff_dVb; +double AbulkCV, dAbulkCV_dVb; +double qcheq, qdef, gqdef, cqdef, cqcheq; +double gcqdb, gcqsb, gcqgb, gcqbb; +double dxpart, sxpart, ggtg, ggtd, ggts, ggtb; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; +double gbdpdp, gbdpg, gbdpb, gbdpsp; +double qgdo, qgso, cgdo, cgso, cqbs, cqbd; +double Cgg, Cgd, Cgs, Cgb, Cdg, Cdd, Cds, Cdb, Qg, Qd; +double Csg, Csd, Css, Csb, Cbg, Cbd, Cbs, Cbb, Qs, Qb; +double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Csg1, Csd1, Csb1, Qac0, Qsub0; +double dQac0_dVg, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb; +double ggidld, ggidlg, ggidlb,ggisld, ggislg, ggislb, ggisls; +double Igisl, Ggisld, Ggislg, Ggislb, Ggisls; + + + +struct bsim4SizeDependParam *pParam; +int ByPass, ChargeComputationNeeded, error, Check, Check1, Check2; + +ScalingFactor = 1.0e-9; +ChargeComputationNeeded = + ((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || + ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) + ? 1 : 0; + + +for (; model != NULL; model = model->BSIM4v2nextModel) +{ for (here = model->BSIM4v2instances; here != NULL; + here = here->BSIM4v2nextInstance) + { if (here->BSIM4v2owner != ARCHme) continue; + Check = Check1 = Check2 = 1; + ByPass = 0; + pParam = here->pParam; + + if ((ckt->CKTmode & MODEINITSMSIG)) + { vds = *(ckt->CKTstate0 + here->BSIM4v2vds); + vgs = *(ckt->CKTstate0 + here->BSIM4v2vgs); + vbs = *(ckt->CKTstate0 + here->BSIM4v2vbs); + vges = *(ckt->CKTstate0 + here->BSIM4v2vges); + vgms = *(ckt->CKTstate0 + here->BSIM4v2vgms); + vdbs = *(ckt->CKTstate0 + here->BSIM4v2vdbs); + vsbs = *(ckt->CKTstate0 + here->BSIM4v2vsbs); + vses = *(ckt->CKTstate0 + here->BSIM4v2vses); + vdes = *(ckt->CKTstate0 + here->BSIM4v2vdes); + + qdef = *(ckt->CKTstate0 + here->BSIM4v2qdef); + } + else if ((ckt->CKTmode & MODEINITTRAN)) + { vds = *(ckt->CKTstate1 + here->BSIM4v2vds); + vgs = *(ckt->CKTstate1 + here->BSIM4v2vgs); + vbs = *(ckt->CKTstate1 + here->BSIM4v2vbs); + vges = *(ckt->CKTstate1 + here->BSIM4v2vges); + vgms = *(ckt->CKTstate1 + here->BSIM4v2vgms); + vdbs = *(ckt->CKTstate1 + here->BSIM4v2vdbs); + vsbs = *(ckt->CKTstate1 + here->BSIM4v2vsbs); + vses = *(ckt->CKTstate1 + here->BSIM4v2vses); + vdes = *(ckt->CKTstate1 + here->BSIM4v2vdes); + + qdef = *(ckt->CKTstate1 + here->BSIM4v2qdef); + } + else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM4v2off) + { vds = model->BSIM4v2type * here->BSIM4v2icVDS; + vgs = vges = vgms = model->BSIM4v2type * here->BSIM4v2icVGS; + vbs = vdbs = vsbs = model->BSIM4v2type * here->BSIM4v2icVBS; + if (vds > 0.0) + { vdes = vds + 0.01; + vses = -0.01; + } + else if (vds < 0.0) + { vdes = vds - 0.01; + vses = 0.01; + } + else + vdes = vses = 0.0; + + qdef = 0.0; + + if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && + ((ckt->CKTmode & (MODETRAN | MODEAC|MODEDCOP | + MODEDCTRANCURVE)) || (!(ckt->CKTmode & MODEUIC)))) + { vds = 0.1; + vdes = 0.11; + vses = -0.01; + vgs = vges = vgms = model->BSIM4v2type + * pParam->BSIM4v2vth0 + 0.1; + vbs = vdbs = vsbs = 0.0; + } + } + else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && + (here->BSIM4v2off)) + { vds = vgs = vbs = vges = vgms = 0.0; + vdbs = vsbs = vdes = vses = qdef = 0.0; + } + else + { +#ifndef PREDICTOR + if ((ckt->CKTmode & MODEINITPRED)) + { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; + *(ckt->CKTstate0 + here->BSIM4v2vds) = + *(ckt->CKTstate1 + here->BSIM4v2vds); + vds = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vds)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vds))); + *(ckt->CKTstate0 + here->BSIM4v2vgs) = + *(ckt->CKTstate1 + here->BSIM4v2vgs); + vgs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vgs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vgs))); + *(ckt->CKTstate0 + here->BSIM4v2vges) = + *(ckt->CKTstate1 + here->BSIM4v2vges); + vges = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vges)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vges))); + *(ckt->CKTstate0 + here->BSIM4v2vgms) = + *(ckt->CKTstate1 + here->BSIM4v2vgms); + vgms = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vgms)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vgms))); + *(ckt->CKTstate0 + here->BSIM4v2vbs) = + *(ckt->CKTstate1 + here->BSIM4v2vbs); + vbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vbs))); + *(ckt->CKTstate0 + here->BSIM4v2vbd) = + *(ckt->CKTstate0 + here->BSIM4v2vbs) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + *(ckt->CKTstate0 + here->BSIM4v2vdbs) = + *(ckt->CKTstate1 + here->BSIM4v2vdbs); + vdbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vdbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vdbs))); + *(ckt->CKTstate0 + here->BSIM4v2vdbd) = + *(ckt->CKTstate0 + here->BSIM4v2vdbs) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + *(ckt->CKTstate0 + here->BSIM4v2vsbs) = + *(ckt->CKTstate1 + here->BSIM4v2vsbs); + vsbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vsbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vsbs))); + *(ckt->CKTstate0 + here->BSIM4v2vses) = + *(ckt->CKTstate1 + here->BSIM4v2vses); + vses = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vses)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vses))); + *(ckt->CKTstate0 + here->BSIM4v2vdes) = + *(ckt->CKTstate1 + here->BSIM4v2vdes); + vdes = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2vdes)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v2vdes))); + + *(ckt->CKTstate0 + here->BSIM4v2qdef) = + *(ckt->CKTstate1 + here->BSIM4v2qdef); + qdef = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v2qdef)) + -(xfact * (*(ckt->CKTstate2 + here->BSIM4v2qdef))); + } + else + { +#endif /* PREDICTOR */ + vds = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vgs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2gNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vbs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2bNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vges = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2gNodeExt) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vgms = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2gNodeMid) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vdbs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2dbNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vsbs = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2sbNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vses = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2sNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + vdes = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2dNode) + - *(ckt->CKTrhsOld + here->BSIM4v2sNodePrime)); + qdef = model->BSIM4v2type + * (*(ckt->CKTrhsOld + here->BSIM4v2qNode)); +#ifndef PREDICTOR + } +#endif /* PREDICTOR */ + + vgdo = *(ckt->CKTstate0 + here->BSIM4v2vgs) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + vgedo = *(ckt->CKTstate0 + here->BSIM4v2vges) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + vgmdo = *(ckt->CKTstate0 + here->BSIM4v2vgms) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + + vbd = vbs - vds; + vdbd = vdbs - vds; + vgd = vgs - vds; + vged = vges - vds; + vgmd = vgms - vds; + + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v2vbd); + delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v2vdbd); + delvgd = vgd - vgdo; + delvged = vged - vgedo; + delvgmd = vgmd - vgmdo; + + delvds = vds - *(ckt->CKTstate0 + here->BSIM4v2vds); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v2vgs); + delvges = vges - *(ckt->CKTstate0 + here->BSIM4v2vges); + delvgms = vgms - *(ckt->CKTstate0 + here->BSIM4v2vgms); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v2vbs); + delvdbs = vdbs - *(ckt->CKTstate0 + here->BSIM4v2vdbs); + delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v2vsbs); + + delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v2vses)); + vdedo = *(ckt->CKTstate0 + here->BSIM4v2vdes) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v2vdes); + delvded = vdes - vds - vdedo; + + delvbd_jct = (!here->BSIM4v2rbodyMod) ? delvbd : delvdbd; + delvbs_jct = (!here->BSIM4v2rbodyMod) ? delvbs : delvsbs; + if (here->BSIM4v2mode >= 0) + { Idtot = here->BSIM4v2cd + here->BSIM4v2csub - here->BSIM4v2cbd + + here->BSIM4v2Igidl; + cdhat = Idtot - here->BSIM4v2gbd * delvbd_jct + + (here->BSIM4v2gmbs + here->BSIM4v2gbbs + here->BSIM4v2ggidlb) * delvbs + + (here->BSIM4v2gm + here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * delvgs + + (here->BSIM4v2gds + here->BSIM4v2gbds + here->BSIM4v2ggidld) * delvds; + Ibtot = here->BSIM4v2cbs + here->BSIM4v2cbd + - here->BSIM4v2Igidl - here->BSIM4v2Igisl - here->BSIM4v2csub; + cbhat = Ibtot + here->BSIM4v2gbd * delvbd_jct + + here->BSIM4v2gbs * delvbs_jct - (here->BSIM4v2gbbs + here->BSIM4v2ggidlb) + * delvbs - (here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * delvgs + - (here->BSIM4v2gbds + here->BSIM4v2ggidld) * delvds + - here->BSIM4v2ggislg * delvgd - here->BSIM4v2ggislb* delvbd + here->BSIM4v2ggisls * delvds ; + + Igstot = here->BSIM4v2Igs + here->BSIM4v2Igcs; + cgshat = Igstot + (here->BSIM4v2gIgsg + here->BSIM4v2gIgcsg) * delvgs + + here->BSIM4v2gIgcsd * delvds + here->BSIM4v2gIgcsb * delvbs; + + Igdtot = here->BSIM4v2Igd + here->BSIM4v2Igcd; + cgdhat = Igdtot + here->BSIM4v2gIgdg * delvgd + here->BSIM4v2gIgcdg * delvgs + + here->BSIM4v2gIgcdd * delvds + here->BSIM4v2gIgcdb * delvbs; + + Igbtot = here->BSIM4v2Igb; + cgbhat = here->BSIM4v2Igb + here->BSIM4v2gIgbg * delvgs + here->BSIM4v2gIgbd + * delvds + here->BSIM4v2gIgbb * delvbs; + } + else + { Idtot = here->BSIM4v2cd + here->BSIM4v2cbd - here->BSIM4v2Igisl; + cdhat = Idtot + here->BSIM4v2gbd * delvbd_jct + here->BSIM4v2gmbs + * delvbd + here->BSIM4v2gm * delvgd + - here->BSIM4v2gds * delvds - here->BSIM4v2ggislg * vgd + - here->BSIM4v2ggislb * vbd + here->BSIM4v2ggisls * vds; + Ibtot = here->BSIM4v2cbs + here->BSIM4v2cbd + - here->BSIM4v2Igidl - here->BSIM4v2Igisl - here->BSIM4v2csub; + cbhat = Ibtot + here->BSIM4v2gbs * delvbs_jct + here->BSIM4v2gbd + * delvbd_jct - (here->BSIM4v2gbbs + here->BSIM4v2ggidlb) * delvbd + - (here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * delvgd + + (here->BSIM4v2gbds + here->BSIM4v2ggidld) * delvds + - here->BSIM4v2ggislg * delvgs - here->BSIM4v2ggislb * delvbs + here->BSIM4v2ggisls * delvds; + + Igstot = here->BSIM4v2Igs + here->BSIM4v2Igcd; + cgshat = Igstot + here->BSIM4v2gIgsg * delvgs + here->BSIM4v2gIgcdg * delvgd + - here->BSIM4v2gIgcdd * delvds + here->BSIM4v2gIgcdb * delvbd; + + Igdtot = here->BSIM4v2Igd + here->BSIM4v2Igcs; + cgdhat = Igdtot + (here->BSIM4v2gIgdg + here->BSIM4v2gIgcsg) * delvgd + - here->BSIM4v2gIgcsd * delvds + here->BSIM4v2gIgcsb * delvbd; + + Igbtot = here->BSIM4v2Igb; + cgbhat = here->BSIM4v2Igb + here->BSIM4v2gIgbg * delvgd - here->BSIM4v2gIgbd + * delvds + here->BSIM4v2gIgbb * delvbd; + } + + Isestot = here->BSIM4v2gstot * (*(ckt->CKTstate0 + here->BSIM4v2vses)); + cseshat = Isestot + here->BSIM4v2gstot * delvses + + here->BSIM4v2gstotd * delvds + here->BSIM4v2gstotg * delvgs + + here->BSIM4v2gstotb * delvbs; + + Idedtot = here->BSIM4v2gdtot * vdedo; + cdedhat = Idedtot + here->BSIM4v2gdtot * delvded + + here->BSIM4v2gdtotd * delvds + here->BSIM4v2gdtotg * delvgs + + here->BSIM4v2gdtotb * delvbs; + + +#ifndef NOBYPASS + /* Following should be one IF statement, but some C compilers + * can't handle that all at once, so we split it into several + * successive IF's */ + + if ((!(ckt->CKTmode & MODEINITPRED)) && (ckt->CKTbypass)) + if ((fabs(delvds) < (ckt->CKTreltol * MAX(fabs(vds), + fabs(*(ckt->CKTstate0 + here->BSIM4v2vds))) + ckt->CKTvoltTol))) + if ((fabs(delvgs) < (ckt->CKTreltol * MAX(fabs(vgs), + fabs(*(ckt->CKTstate0 + here->BSIM4v2vgs))) + ckt->CKTvoltTol))) + if ((fabs(delvbs) < (ckt->CKTreltol * MAX(fabs(vbs), + fabs(*(ckt->CKTstate0 + here->BSIM4v2vbs))) + ckt->CKTvoltTol))) + if ((fabs(delvbd) < (ckt->CKTreltol * MAX(fabs(vbd), + fabs(*(ckt->CKTstate0 + here->BSIM4v2vbd))) + ckt->CKTvoltTol))) + if ((here->BSIM4v2rgateMod == 0) || (here->BSIM4v2rgateMod == 1) + || (fabs(delvges) < (ckt->CKTreltol * MAX(fabs(vges), + fabs(*(ckt->CKTstate0 + here->BSIM4v2vges))) + ckt->CKTvoltTol))) + if ((here->BSIM4v2rgateMod != 3) || (fabs(delvgms) < (ckt->CKTreltol + * MAX(fabs(vgms), fabs(*(ckt->CKTstate0 + here->BSIM4v2vgms))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v2rbodyMod) || (fabs(delvdbs) < (ckt->CKTreltol + * MAX(fabs(vdbs), fabs(*(ckt->CKTstate0 + here->BSIM4v2vdbs))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v2rbodyMod) || (fabs(delvdbd) < (ckt->CKTreltol + * MAX(fabs(vdbd), fabs(*(ckt->CKTstate0 + here->BSIM4v2vdbd))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v2rbodyMod) || (fabs(delvsbs) < (ckt->CKTreltol + * MAX(fabs(vsbs), fabs(*(ckt->CKTstate0 + here->BSIM4v2vsbs))) + + ckt->CKTvoltTol))) + if ((!model->BSIM4v2rdsMod) || (fabs(delvses) < (ckt->CKTreltol + * MAX(fabs(vses), fabs(*(ckt->CKTstate0 + here->BSIM4v2vses))) + + ckt->CKTvoltTol))) + if ((!model->BSIM4v2rdsMod) || (fabs(delvdes) < (ckt->CKTreltol + * MAX(fabs(vdes), fabs(*(ckt->CKTstate0 + here->BSIM4v2vdes))) + + ckt->CKTvoltTol))) + if ((fabs(cdhat - Idtot) < ckt->CKTreltol + * MAX(fabs(cdhat), fabs(Idtot)) + ckt->CKTabstol)) + if ((fabs(cbhat - Ibtot) < ckt->CKTreltol + * MAX(fabs(cbhat), fabs(Ibtot)) + ckt->CKTabstol)) + if ((!model->BSIM4v2igcMod) || ((fabs(cgshat - Igstot) < ckt->CKTreltol + * MAX(fabs(cgshat), fabs(Igstot)) + ckt->CKTabstol))) + if ((!model->BSIM4v2igcMod) || ((fabs(cgdhat - Igdtot) < ckt->CKTreltol + * MAX(fabs(cgdhat), fabs(Igdtot)) + ckt->CKTabstol))) + if ((!model->BSIM4v2igbMod) || ((fabs(cgbhat - Igbtot) < ckt->CKTreltol + * MAX(fabs(cgbhat), fabs(Igbtot)) + ckt->CKTabstol))) + if ((!model->BSIM4v2rdsMod) || ((fabs(cseshat - Isestot) < ckt->CKTreltol + * MAX(fabs(cseshat), fabs(Isestot)) + ckt->CKTabstol))) + if ((!model->BSIM4v2rdsMod) || ((fabs(cdedhat - Idedtot) < ckt->CKTreltol + * MAX(fabs(cdedhat), fabs(Idedtot)) + ckt->CKTabstol))) + { vds = *(ckt->CKTstate0 + here->BSIM4v2vds); + vgs = *(ckt->CKTstate0 + here->BSIM4v2vgs); + vbs = *(ckt->CKTstate0 + here->BSIM4v2vbs); + vges = *(ckt->CKTstate0 + here->BSIM4v2vges); + vgms = *(ckt->CKTstate0 + here->BSIM4v2vgms); + + vbd = *(ckt->CKTstate0 + here->BSIM4v2vbd); + vdbs = *(ckt->CKTstate0 + here->BSIM4v2vdbs); + vdbd = *(ckt->CKTstate0 + here->BSIM4v2vdbd); + vsbs = *(ckt->CKTstate0 + here->BSIM4v2vsbs); + vses = *(ckt->CKTstate0 + here->BSIM4v2vses); + vdes = *(ckt->CKTstate0 + here->BSIM4v2vdes); + + vgd = vgs - vds; + vgb = vgs - vbs; + vged = vges - vds; + vgmd = vgms - vds; + vgmb = vgms - vbs; + + vbs_jct = (!here->BSIM4v2rbodyMod) ? vbs : vsbs; + vbd_jct = (!here->BSIM4v2rbodyMod) ? vbd : vdbd; + + qdef = *(ckt->CKTstate0 + here->BSIM4v2qdef); + cdrain = here->BSIM4v2cd; + + if ((ckt->CKTmode & (MODETRAN | MODEAC)) || + ((ckt->CKTmode & MODETRANOP) && + (ckt->CKTmode & MODEUIC))) + { ByPass = 1; + + qgate = here->BSIM4v2qgate; + qbulk = here->BSIM4v2qbulk; + qdrn = here->BSIM4v2qdrn; + cgdo = here->BSIM4v2cgdo; + qgdo = here->BSIM4v2qgdo; + cgso = here->BSIM4v2cgso; + qgso = here->BSIM4v2qgso; + + goto line755; + } + else + goto line850; + } +#endif /*NOBYPASS*/ + + von = here->BSIM4v2von; + if (*(ckt->CKTstate0 + here->BSIM4v2vds) >= 0.0) + { vgs = DEVfetlim(vgs, *(ckt->CKTstate0 + here->BSIM4v2vgs), von); + vds = vgs - vgd; + vds = DEVlimvds(vds, *(ckt->CKTstate0 + here->BSIM4v2vds)); + vgd = vgs - vds; + if (here->BSIM4v2rgateMod == 3) + { vges = DEVfetlim(vges, *(ckt->CKTstate0 + here->BSIM4v2vges), von); + vgms = DEVfetlim(vgms, *(ckt->CKTstate0 + here->BSIM4v2vgms), von); + vged = vges - vds; + vgmd = vgms - vds; + } + else if ((here->BSIM4v2rgateMod == 1) || (here->BSIM4v2rgateMod == 2)) + { vges = DEVfetlim(vges, *(ckt->CKTstate0 + here->BSIM4v2vges), von); + vged = vges - vds; + } + + if (model->BSIM4v2rdsMod) + { vdes = DEVlimvds(vdes, *(ckt->CKTstate0 + here->BSIM4v2vdes)); + vses = -DEVlimvds(-vses, -(*(ckt->CKTstate0 + here->BSIM4v2vses))); + } + + } + else + { vgd = DEVfetlim(vgd, vgdo, von); + vds = vgs - vgd; + vds = -DEVlimvds(-vds, -(*(ckt->CKTstate0 + here->BSIM4v2vds))); + vgs = vgd + vds; + + if (here->BSIM4v2rgateMod == 3) + { vged = DEVfetlim(vged, vgedo, von); + vges = vged + vds; + vgmd = DEVfetlim(vgmd, vgmdo, von); + vgms = vgmd + vds; + } + if ((here->BSIM4v2rgateMod == 1) || (here->BSIM4v2rgateMod == 2)) + { vged = DEVfetlim(vged, vgedo, von); + vges = vged + vds; + } + + if (model->BSIM4v2rdsMod) + { vdes = -DEVlimvds(-vdes, -(*(ckt->CKTstate0 + here->BSIM4v2vdes))); + vses = DEVlimvds(vses, *(ckt->CKTstate0 + here->BSIM4v2vses)); + } + } + + if (vds >= 0.0) + { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM4v2vbs), + CONSTvt0, model->BSIM4v2vcrit, &Check); + vbd = vbs - vds; + if (here->BSIM4v2rbodyMod) + { vdbs = DEVpnjlim(vdbs, *(ckt->CKTstate0 + here->BSIM4v2vdbs), + CONSTvt0, model->BSIM4v2vcrit, &Check1); + vdbd = vdbs - vds; + vsbs = DEVpnjlim(vsbs, *(ckt->CKTstate0 + here->BSIM4v2vsbs), + CONSTvt0, model->BSIM4v2vcrit, &Check2); + if ((Check1 == 0) && (Check2 == 0)) + Check = 0; + else + Check = 1; + } + } + else + { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM4v2vbd), + CONSTvt0, model->BSIM4v2vcrit, &Check); + vbs = vbd + vds; + if (here->BSIM4v2rbodyMod) + { vdbd = DEVpnjlim(vdbd, *(ckt->CKTstate0 + here->BSIM4v2vdbd), + CONSTvt0, model->BSIM4v2vcrit, &Check1); + vdbs = vdbd + vds; + vsbdo = *(ckt->CKTstate0 + here->BSIM4v2vsbs) + - *(ckt->CKTstate0 + here->BSIM4v2vds); + vsbd = vsbs - vds; + vsbd = DEVpnjlim(vsbd, vsbdo, CONSTvt0, model->BSIM4v2vcrit, &Check2); + vsbs = vsbd + vds; + if ((Check1 == 0) && (Check2 == 0)) + Check = 0; + else + Check = 1; + } + } + } + + /* Calculate DC currents and their derivatives */ + vbd = vbs - vds; + vgd = vgs - vds; + vgb = vgs - vbs; + vged = vges - vds; + vgmd = vgms - vds; + vgmb = vgms - vbs; + vdbd = vdbs - vds; + + vbs_jct = (!here->BSIM4v2rbodyMod) ? vbs : vsbs; + vbd_jct = (!here->BSIM4v2rbodyMod) ? vbd : vdbd; + + /* Source/drain junction diode DC model begins */ + Nvtms = model->BSIM4v2vtm * model->BSIM4v2SjctEmissionCoeff; + if ((here->BSIM4v2Aseff <= 0.0) && (here->BSIM4v2Pseff <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM4v2Aseff * model->BSIM4v2SjctTempSatCurDensity + + here->BSIM4v2Pseff * model->BSIM4v2SjctSidewallTempSatCurDensity + + pParam->BSIM4v2weffCJ * here->BSIM4v2nf + * model->BSIM4v2SjctGateSidewallTempSatCurDensity; + } + + if (SourceSatCurrent <= 0.0) + { here->BSIM4v2gbs = ckt->CKTgmin; + here->BSIM4v2cbs = here->BSIM4v2gbs * vbs_jct; + } + else + { switch(model->BSIM4v2dioMod) + { case 0: + evbs = exp(vbs_jct / Nvtms); + T1 = model->BSIM4v2xjbvs * exp(-(model->BSIM4v2bvs + vbs_jct) / Nvtms); + /* WDLiu: Magic T1 in this form; different from BSIM4v2 beta. */ + here->BSIM4v2gbs = SourceSatCurrent * (evbs + T1) / Nvtms + ckt->CKTgmin; + here->BSIM4v2cbs = SourceSatCurrent * (evbs + here->BSIM4v2XExpBVS + - T1 - 1.0) + ckt->CKTgmin * vbs_jct; + break; + case 1: + T2 = vbs_jct / Nvtms; + if (T2 < -EXP_THRESHOLD) + { here->BSIM4v2gbs = ckt->CKTgmin; + here->BSIM4v2cbs = SourceSatCurrent * (MIN_EXP - 1.0) + + ckt->CKTgmin * vbs_jct; + } + else if (vbs_jct <= here->BSIM4v2vjsmFwd) + { evbs = exp(T2); + here->BSIM4v2gbs = SourceSatCurrent * evbs / Nvtms + ckt->CKTgmin; + here->BSIM4v2cbs = SourceSatCurrent * (evbs - 1.0) + + ckt->CKTgmin * vbs_jct; + } + else + { T0 = here->BSIM4v2IVjsmFwd / Nvtms; + here->BSIM4v2gbs = T0 + ckt->CKTgmin; + here->BSIM4v2cbs = here->BSIM4v2IVjsmFwd - SourceSatCurrent + T0 + * (vbs_jct - here->BSIM4v2vjsmFwd) + ckt->CKTgmin * vbs_jct; + } + break; + case 2: + if (vbs_jct < here->BSIM4v2vjsmRev) + { T0 = vbs_jct / Nvtms; + if (T0 < -EXP_THRESHOLD) + { evbs = MIN_EXP; + devbs_dvb = 0.0; + } + else + { evbs = exp(T0); + devbs_dvb = evbs / Nvtms; + } + + T1 = evbs - 1.0; + T2 = here->BSIM4v2IVjsmRev + here->BSIM4v2SslpRev + * (vbs_jct - here->BSIM4v2vjsmRev); + here->BSIM4v2gbs = devbs_dvb * T2 + T1 * here->BSIM4v2SslpRev + ckt->CKTgmin; + here->BSIM4v2cbs = T1 * T2 + ckt->CKTgmin * vbs_jct; + } + else if (vbs_jct <= here->BSIM4v2vjsmFwd) + { T0 = vbs_jct / Nvtms; + if (T0 < -EXP_THRESHOLD) + { evbs = MIN_EXP; + devbs_dvb = 0.0; + } + else + { evbs = exp(T0); + devbs_dvb = evbs / Nvtms; + } + + T1 = (model->BSIM4v2bvs + vbs_jct) / Nvtms; + if (T1 > EXP_THRESHOLD) + { T2 = MIN_EXP; + T3 = 0.0; + } + else + { T2 = exp(-T1); + T3 = -T2 /Nvtms; + } + here->BSIM4v2gbs = SourceSatCurrent * (devbs_dvb - model->BSIM4v2xjbvs * T3) + + ckt->CKTgmin; + here->BSIM4v2cbs = SourceSatCurrent * (evbs + here->BSIM4v2XExpBVS - 1.0 + - model->BSIM4v2xjbvs * T2) + ckt->CKTgmin * vbs_jct; + } + else + { here->BSIM4v2gbs = here->BSIM4v2SslpFwd + ckt->CKTgmin; + here->BSIM4v2cbs = here->BSIM4v2IVjsmFwd + here->BSIM4v2SslpFwd * (vbs_jct + - here->BSIM4v2vjsmFwd) + ckt->CKTgmin * vbs_jct; + } + break; + default: break; + } + } + + Nvtmd = model->BSIM4v2vtm * model->BSIM4v2DjctEmissionCoeff; + if ((here->BSIM4v2Adeff <= 0.0) && (here->BSIM4v2Pdeff <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM4v2Adeff * model->BSIM4v2DjctTempSatCurDensity + + here->BSIM4v2Pdeff * model->BSIM4v2DjctSidewallTempSatCurDensity + + pParam->BSIM4v2weffCJ * here->BSIM4v2nf + * model->BSIM4v2DjctGateSidewallTempSatCurDensity; + } + + if (DrainSatCurrent <= 0.0) + { here->BSIM4v2gbd = ckt->CKTgmin; + here->BSIM4v2cbd = here->BSIM4v2gbd * vbd_jct; + } + else + { switch(model->BSIM4v2dioMod) + { case 0: + evbd = exp(vbd_jct / Nvtmd); + T1 = model->BSIM4v2xjbvd * exp(-(model->BSIM4v2bvd + vbd_jct) / Nvtmd); + /* WDLiu: Magic T1 in this form; different from BSIM4v2 beta. */ + here->BSIM4v2gbd = DrainSatCurrent * (evbd + T1) / Nvtmd + ckt->CKTgmin; + here->BSIM4v2cbd = DrainSatCurrent * (evbd + here->BSIM4v2XExpBVD + - T1 - 1.0) + ckt->CKTgmin * vbd_jct; + break; + case 1: + T2 = vbd_jct / Nvtmd; + if (T2 < -EXP_THRESHOLD) + { here->BSIM4v2gbd = ckt->CKTgmin; + here->BSIM4v2cbd = DrainSatCurrent * (MIN_EXP - 1.0) + + ckt->CKTgmin * vbd_jct; + } + else if (vbd_jct <= here->BSIM4v2vjdmFwd) + { evbd = exp(T2); + here->BSIM4v2gbd = DrainSatCurrent * evbd / Nvtmd + ckt->CKTgmin; + here->BSIM4v2cbd = DrainSatCurrent * (evbd - 1.0) + + ckt->CKTgmin * vbd_jct; + } + else + { T0 = here->BSIM4v2IVjdmFwd / Nvtmd; + here->BSIM4v2gbd = T0 + ckt->CKTgmin; + here->BSIM4v2cbd = here->BSIM4v2IVjdmFwd - DrainSatCurrent + T0 + * (vbd_jct - here->BSIM4v2vjdmFwd) + ckt->CKTgmin * vbd_jct; + } + break; + case 2: + if (vbd_jct < here->BSIM4v2vjdmRev) + { T0 = vbd_jct / Nvtmd; + if (T0 < -EXP_THRESHOLD) + { evbd = MIN_EXP; + devbd_dvb = 0.0; + } + else + { evbd = exp(T0); + devbd_dvb = evbd / Nvtmd; + } + + T1 = evbd - 1.0; + T2 = here->BSIM4v2IVjdmRev + here->BSIM4v2DslpRev + * (vbd_jct - here->BSIM4v2vjdmRev); + here->BSIM4v2gbd = devbd_dvb * T2 + T1 * here->BSIM4v2DslpRev + ckt->CKTgmin; + here->BSIM4v2cbd = T1 * T2 + ckt->CKTgmin * vbd_jct; + } + else if (vbd_jct <= here->BSIM4v2vjdmFwd) + { T0 = vbd_jct / Nvtmd; + if (T0 < -EXP_THRESHOLD) + { evbd = MIN_EXP; + devbd_dvb = 0.0; + } + else + { evbd = exp(T0); + devbd_dvb = evbd / Nvtmd; + } + + T1 = (model->BSIM4v2bvd + vbd_jct) / Nvtmd; + if (T1 > EXP_THRESHOLD) + { T2 = MIN_EXP; + T3 = 0.0; + } + else + { T2 = exp(-T1); + T3 = -T2 /Nvtmd; + } + here->BSIM4v2gbd = DrainSatCurrent * (devbd_dvb - model->BSIM4v2xjbvd * T3) + + ckt->CKTgmin; + here->BSIM4v2cbd = DrainSatCurrent * (evbd + here->BSIM4v2XExpBVS - 1.0 + - model->BSIM4v2xjbvd * T2) + ckt->CKTgmin * vbd_jct; + } + else + { here->BSIM4v2gbd = here->BSIM4v2DslpFwd + ckt->CKTgmin; + here->BSIM4v2cbd = here->BSIM4v2IVjdmFwd + here->BSIM4v2DslpFwd * (vbd_jct + - here->BSIM4v2vjdmFwd) + ckt->CKTgmin * vbd_jct; + } + break; + default: break; + } + } /* End of diode DC model */ + + if (vds >= 0.0) + { here->BSIM4v2mode = 1; + Vds = vds; + Vgs = vgs; + Vbs = vbs; + Vdb = vds - vbs; /* WDLiu: for GIDL */ + } + else + { here->BSIM4v2mode = -1; + Vds = -vds; + Vgs = vgd; + Vbs = vbd; + Vdb = -vbs; + } + + T0 = Vbs - pParam->BSIM4v2vbsc - 0.001; + T1 = sqrt(T0 * T0 - 0.004 * pParam->BSIM4v2vbsc); + if (T0 >= 0.0) + { Vbseff = pParam->BSIM4v2vbsc + 0.5 * (T0 + T1); + dVbseff_dVb = 0.5 * (1.0 + T0 / T1); + } + else + { T2 = -0.002 / (T1 - T0); + Vbseff = pParam->BSIM4v2vbsc * (1.0 + T2); + dVbseff_dVb = T2 * pParam->BSIM4v2vbsc / T1; + } + if (Vbseff < Vbs) + { Vbseff = Vbs; + } + + if (Vbseff > 0.0) + { T0 = pParam->BSIM4v2phi / (pParam->BSIM4v2phi + Vbseff); + Phis = pParam->BSIM4v2phi * T0; + dPhis_dVb = -T0 * T0; + sqrtPhis = pParam->BSIM4v2phis3 / (pParam->BSIM4v2phi + 0.5 * Vbseff); + dsqrtPhis_dVb = -0.5 * sqrtPhis * sqrtPhis / pParam->BSIM4v2phis3; + } + else + { Phis = pParam->BSIM4v2phi - Vbseff; + dPhis_dVb = -1.0; + sqrtPhis = sqrt(Phis); + dsqrtPhis_dVb = -0.5 / sqrtPhis; + } + Xdep = pParam->BSIM4v2Xdep0 * sqrtPhis / pParam->BSIM4v2sqrtPhi; + dXdep_dVb = (pParam->BSIM4v2Xdep0 / pParam->BSIM4v2sqrtPhi) + * dsqrtPhis_dVb; + + Leff = pParam->BSIM4v2leff; + Vtm = model->BSIM4v2vtm; + + /* Vth Calculation */ + T3 = sqrt(Xdep); + V0 = pParam->BSIM4v2vbi - pParam->BSIM4v2phi; + + T0 = pParam->BSIM4v2dvt2 * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM4v2dvt2; + } + else + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM4v2dvt2 * T4 * T4; + } + lt1 = model->BSIM4v2factor1 * T3 * T1; + dlt1_dVb = model->BSIM4v2factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM4v2dvt2w * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM4v2dvt2w; + } + else + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM4v2dvt2w * T4 * T4; + } + ltw = model->BSIM4v2factor1 * T3 * T1; + dltw_dVb = model->BSIM4v2factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM4v2dvt1 * Leff / lt1; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + Theta0 = T1 / T4; + dT1_dVb = -T0 * T1 * dlt1_dVb / lt1; + dTheta0_dVb = dT1_dVb * (T4 - 2.0 * T1 * (T2 + MIN_EXP)) / T4 / T4; + } + else + { Theta0 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + dTheta0_dVb = 0.0; + } + here->BSIM4v2thetavth = pParam->BSIM4v2dvt0 * Theta0; + Delt_vth = here->BSIM4v2thetavth * V0; + dDelt_vth_dVb = pParam->BSIM4v2dvt0 * dTheta0_dVb * V0; + + T0 = pParam->BSIM4v2dvt1w * pParam->BSIM4v2weff * Leff / ltw; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T5 = T1 / T4; + dT1_dVb = -T0 * T1 * dltw_dVb / ltw; /* bugfix -JX */ + dT5_dVb = dT1_dVb * (T4 - 2.0 * T1 * (T2 + MIN_EXP)) / T4 / T4; + } + else + { T5 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + dT5_dVb = 0.0; + } + T0 = pParam->BSIM4v2dvt0w * T5; + T2 = T0 * V0; + dT2_dVb = pParam->BSIM4v2dvt0w * dT5_dVb * V0; + + TempRatio = ckt->CKTtemp / model->BSIM4v2tnom - 1.0; + T0 = sqrt(1.0 + pParam->BSIM4v2lpe0 / Leff); + T1 = pParam->BSIM4v2k1ox * (T0 - 1.0) * pParam->BSIM4v2sqrtPhi + + (pParam->BSIM4v2kt1 + pParam->BSIM4v2kt1l / Leff + + pParam->BSIM4v2kt2 * Vbseff) * TempRatio; + Vth_NarrowW = model->BSIM4v2toxe * pParam->BSIM4v2phi + / (pParam->BSIM4v2weff + pParam->BSIM4v2w0); + + T3 = pParam->BSIM4v2eta0 + pParam->BSIM4v2etab * Vbseff; + if (T3 < 1.0e-4) + { T9 = 1.0 / (3.0 - 2.0e4 * T3); + T3 = (2.0e-4 - T3) * T9; + T4 = T9 * T9; + } + else + { T4 = 1.0; + } + dDIBL_Sft_dVd = T3 * pParam->BSIM4v2theta0vb0; + DIBL_Sft = dDIBL_Sft_dVd * Vds; + + Lpe_Vb = sqrt(1.0 + pParam->BSIM4v2lpeb / Leff); + + Vth = model->BSIM4v2type * pParam->BSIM4v2vth0 + (pParam->BSIM4v2k1ox * sqrtPhis + - pParam->BSIM4v2k1 * pParam->BSIM4v2sqrtPhi) * Lpe_Vb + - pParam->BSIM4v2k2ox * Vbseff - Delt_vth - T2 + (pParam->BSIM4v2k3 + + pParam->BSIM4v2k3b * Vbseff) * Vth_NarrowW + T1 - DIBL_Sft; + + dVth_dVb = Lpe_Vb * pParam->BSIM4v2k1ox * dsqrtPhis_dVb - pParam->BSIM4v2k2ox + - dDelt_vth_dVb - dT2_dVb + pParam->BSIM4v2k3b * Vth_NarrowW + - pParam->BSIM4v2etab * Vds * pParam->BSIM4v2theta0vb0 * T4 + + pParam->BSIM4v2kt2 * TempRatio; + dVth_dVd = -dDIBL_Sft_dVd; + + + /* Calculate n */ + tmp1 = EPSSI / Xdep; + here->BSIM4v2nstar = model->BSIM4v2vtm / Charge_q * (model->BSIM4v2coxe + + tmp1 + pParam->BSIM4v2cit); + tmp2 = pParam->BSIM4v2nfactor * tmp1; + tmp3 = pParam->BSIM4v2cdsc + pParam->BSIM4v2cdscb * Vbseff + + pParam->BSIM4v2cdscd * Vds; + tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM4v2cit) / model->BSIM4v2coxe; + if (tmp4 >= -0.5) + { n = 1.0 + tmp4; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM4v2cdscb * Theta0) / model->BSIM4v2coxe; + dn_dVd = pParam->BSIM4v2cdscd * Theta0 / model->BSIM4v2coxe; + } + else + { T0 = 1.0 / (3.0 + 8.0 * tmp4); + n = (1.0 + 3.0 * tmp4) * T0; + T0 *= T0; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM4v2cdscb * Theta0) / model->BSIM4v2coxe * T0; + dn_dVd = pParam->BSIM4v2cdscd * Theta0 / model->BSIM4v2coxe * T0; + } + + + /* Vth correction for Pocket implant */ + if (pParam->BSIM4v2dvtp0 > 0.0) + { T0 = -pParam->BSIM4v2dvtp1 * Vds; + if (T0 < -EXP_THRESHOLD) + { T2 = MIN_EXP; + dT2_dVd = 0.0; + } + else + { T2 = exp(T0); + dT2_dVd = -pParam->BSIM4v2dvtp1 * T2; + } + + T3 = Leff + pParam->BSIM4v2dvtp0 * (1.0 + T2); + dT3_dVd = pParam->BSIM4v2dvtp0 * dT2_dVd; + T4 = Vtm * log(Leff / T3); + dT4_dVd = -Vtm * dT3_dVd / T3; + dDITS_Sft_dVd = dn_dVd * T4 + n * dT4_dVd; + dDITS_Sft_dVb = T4 * dn_dVb; + + Vth -= n * T4; + dVth_dVd -= dDITS_Sft_dVd; + dVth_dVb -= dDITS_Sft_dVb; + } + here->BSIM4v2von = Vth; + + + /* Poly Gate Si Depletion Effect */ + T0 = pParam->BSIM4v2vfb + pParam->BSIM4v2phi; + + BSIM4v2polyDepletion(T0, pParam->BSIM4v2ngate, model->BSIM4v2coxe, vgs, &vgs_eff, &dvgs_eff_dvg); + + BSIM4v2polyDepletion(T0, pParam->BSIM4v2ngate, model->BSIM4v2coxe, vgd, &vgd_eff, &dvgd_eff_dvg); + + if(here->BSIM4v2mode>0) { + Vgs_eff = vgs_eff; + dVgs_eff_dVg = dvgs_eff_dvg; + } else { + Vgs_eff = vgd_eff; + dVgs_eff_dVg = dvgd_eff_dvg; + } + here->BSIM4v2vgs_eff = vgs_eff; + here->BSIM4v2vgd_eff = vgd_eff; + here->BSIM4v2dvgs_eff_dvg = dvgs_eff_dvg; + here->BSIM4v2dvgd_eff_dvg = dvgd_eff_dvg; + + + Vgst = Vgs_eff - Vth; + + /* Calculate Vgsteff */ + T0 = n * Vtm; + T1 = pParam->BSIM4v2mstar * Vgst; + T2 = T1 / T0; + if (T2 > EXP_THRESHOLD) + { T10 = T1; + dT10_dVg = pParam->BSIM4v2mstar * dVgs_eff_dVg; + dT10_dVd = -dVth_dVd * pParam->BSIM4v2mstar; + dT10_dVb = -dVth_dVb * pParam->BSIM4v2mstar; + } + else if (T2 < -EXP_THRESHOLD) + { T10 = Vtm * log(1.0 + MIN_EXP); + dT10_dVg = 0.0; + dT10_dVd = T10 * dn_dVd; + dT10_dVb = T10 * dn_dVb; + T10 *= n; + } + else + { ExpVgst = exp(T2); + T3 = Vtm * log(1.0 + ExpVgst); + T10 = n * T3; + dT10_dVg = pParam->BSIM4v2mstar * ExpVgst / (1.0 + ExpVgst); + dT10_dVb = T3 * dn_dVb - dT10_dVg * (dVth_dVb + Vgst * dn_dVb / n); + dT10_dVd = T3 * dn_dVd - dT10_dVg * (dVth_dVd + Vgst * dn_dVd / n); + dT10_dVg *= dVgs_eff_dVg; + } + + T1 = pParam->BSIM4v2voffcbn - (1.0 - pParam->BSIM4v2mstar) * Vgst; + T2 = T1 / T0; + if (T2 < -EXP_THRESHOLD) + { T3 = model->BSIM4v2coxe * MIN_EXP / pParam->BSIM4v2cdep0; + T9 = pParam->BSIM4v2mstar + T3 * n; + dT9_dVg = 0.0; + dT9_dVd = dn_dVd * T3; + dT9_dVb = dn_dVb * T3; + } + else if (T2 > EXP_THRESHOLD) + { T3 = model->BSIM4v2coxe * MAX_EXP / pParam->BSIM4v2cdep0; + T9 = pParam->BSIM4v2mstar + T3 * n; + dT9_dVg = 0.0; + dT9_dVd = dn_dVd * T3; + dT9_dVb = dn_dVb * T3; + } + else + { ExpVgst = exp(T2); + T3 = model->BSIM4v2coxe / pParam->BSIM4v2cdep0; + T4 = T3 * ExpVgst; + T5 = T1 * T4 / T0; + T9 = pParam->BSIM4v2mstar + n * T4; + dT9_dVg = T3 * (pParam->BSIM4v2mstar - 1.0) * ExpVgst / Vtm; + dT9_dVb = T4 * dn_dVb - dT9_dVg * dVth_dVb - T5 * dn_dVb; + dT9_dVd = T4 * dn_dVd - dT9_dVg * dVth_dVd - T5 * dn_dVd; + dT9_dVg *= dVgs_eff_dVg; + } + + here->BSIM4v2Vgsteff = Vgsteff = T10 / T9; + T11 = T9 * T9; + dVgsteff_dVg = (T9 * dT10_dVg - T10 * dT9_dVg) / T11; + dVgsteff_dVd = (T9 * dT10_dVd - T10 * dT9_dVd) / T11; + dVgsteff_dVb = (T9 * dT10_dVb - T10 * dT9_dVb) / T11; + + /* Calculate Effective Channel Geometry */ + T9 = sqrtPhis - pParam->BSIM4v2sqrtPhi; + Weff = pParam->BSIM4v2weff - 2.0 * (pParam->BSIM4v2dwg * Vgsteff + + pParam->BSIM4v2dwb * T9); + dWeff_dVg = -2.0 * pParam->BSIM4v2dwg; + dWeff_dVb = -2.0 * pParam->BSIM4v2dwb * dsqrtPhis_dVb; + + if (Weff < 2.0e-8) /* to avoid the discontinuity problem due to Weff*/ + { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); + Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; + T0 *= T0 * 4.0e-16; + dWeff_dVg *= T0; + dWeff_dVb *= T0; + } + + if (model->BSIM4v2rdsMod == 1) + Rds = dRds_dVg = dRds_dVb = 0.0; + else + { T0 = 1.0 + pParam->BSIM4v2prwg * Vgsteff; + dT0_dVg = -pParam->BSIM4v2prwg / T0 / T0; + T1 = pParam->BSIM4v2prwb * T9; + dT1_dVb = pParam->BSIM4v2prwb * dsqrtPhis_dVb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); /* 0.01 = 4.0 * 0.05 * 0.05 */ + dT3_dVg = 1.0 + T2 / (T3 - T2); + dT3_dVb = dT3_dVg * dT1_dVb; + dT3_dVg *= dT0_dVg; + + T4 = pParam->BSIM4v2rds0 * 0.5; + Rds = pParam->BSIM4v2rdswmin + T3 * T4; + dRds_dVg = T4 * dT3_dVg; + dRds_dVb = T4 * dT3_dVb; + + if (Rds > 0.0) + here->BSIM4v2grdsw = 1.0 / Rds; + else + here->BSIM4v2grdsw = 0.0; + } + + /* Calculate Abulk */ + T9 = 0.5 * pParam->BSIM4v2k1ox * Lpe_Vb / sqrtPhis; + T1 = T9 + pParam->BSIM4v2k2ox - pParam->BSIM4v2k3b * Vth_NarrowW; + dT1_dVb = -T9 / sqrtPhis * dsqrtPhis_dVb; + + T9 = sqrt(pParam->BSIM4v2xj * Xdep); + tmp1 = Leff + 2.0 * T9; + T5 = Leff / tmp1; + tmp2 = pParam->BSIM4v2a0 * T5; + tmp3 = pParam->BSIM4v2weff + pParam->BSIM4v2b1; + tmp4 = pParam->BSIM4v2b0 / tmp3; + T2 = tmp2 + tmp4; + dT2_dVb = -T9 / tmp1 / Xdep * dXdep_dVb; + T6 = T5 * T5; + T7 = T5 * T6; + + Abulk0 = 1.0 + T1 * T2; + dAbulk0_dVb = T1 * tmp2 * dT2_dVb + T2 * dT1_dVb; + + T8 = pParam->BSIM4v2ags * pParam->BSIM4v2a0 * T7; + dAbulk_dVg = -T1 * T8; + Abulk = Abulk0 + dAbulk_dVg * Vgsteff; + dAbulk_dVb = dAbulk0_dVb - T8 * Vgsteff * (dT1_dVb + + 3.0 * T1 * dT2_dVb); + + if (Abulk0 < 0.1) /* added to avoid the problems caused by Abulk0 */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk0); + Abulk0 = (0.2 - Abulk0) * T9; + dAbulk0_dVb *= T9 * T9; + } + + if (Abulk < 0.1) + { T9 = 1.0 / (3.0 - 20.0 * Abulk); + Abulk = (0.2 - Abulk) * T9; + T10 = T9 * T9; + dAbulk_dVb *= T10; + dAbulk_dVg *= T10; + } + here->BSIM4v2Abulk = Abulk; + + T2 = pParam->BSIM4v2keta * Vbseff; + if (T2 >= -0.9) + { T0 = 1.0 / (1.0 + T2); + dT0_dVb = -pParam->BSIM4v2keta * T0 * T0; + } + else + { T1 = 1.0 / (0.8 + T2); + T0 = (17.0 + 20.0 * T2) * T1; + dT0_dVb = -pParam->BSIM4v2keta * T1 * T1; + } + dAbulk_dVg *= T0; + dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; + dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; + Abulk *= T0; + Abulk0 *= T0; + + /* Mobility calculation */ + if (model->BSIM4v2mobMod == 0) + { T0 = Vgsteff + Vth + Vth; + T2 = pParam->BSIM4v2ua + pParam->BSIM4v2uc * Vbseff; + T3 = T0 / model->BSIM4v2toxe; + T5 = T3 * (T2 + pParam->BSIM4v2ub * T3); + dDenomi_dVg = (T2 + 2.0 * pParam->BSIM4v2ub * T3) / model->BSIM4v2toxe; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4v2uc * T3; + } + else if (model->BSIM4v2mobMod == 1) + { T0 = Vgsteff + Vth + Vth; + T2 = 1.0 + pParam->BSIM4v2uc * Vbseff; + T3 = T0 / model->BSIM4v2toxe; + T4 = T3 * (pParam->BSIM4v2ua + pParam->BSIM4v2ub * T3); + T5 = T4 * T2; + dDenomi_dVg = (pParam->BSIM4v2ua + 2.0 * pParam->BSIM4v2ub * T3) * T2 + / model->BSIM4v2toxe; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4v2uc * T4; + } + else + { T0 = (Vgsteff + pParam->BSIM4v2vtfbphi1) / model->BSIM4v2toxe; + T1 = exp(pParam->BSIM4v2eu * log(T0)); + dT1_dVg = T1 * pParam->BSIM4v2eu / T0 / model->BSIM4v2toxe; + T2 = pParam->BSIM4v2ua + pParam->BSIM4v2uc * Vbseff; + T5 = T1 * T2; + dDenomi_dVg = T2 * dT1_dVg; + dDenomi_dVd = 0.0; + dDenomi_dVb = T1 * pParam->BSIM4v2uc; + } + + if (T5 >= -0.8) + { Denomi = 1.0 + T5; + } + else + { T9 = 1.0 / (7.0 + 10.0 * T5); + Denomi = (0.6 + T5) * T9; + T9 *= T9; + dDenomi_dVg *= T9; + dDenomi_dVd *= T9; + dDenomi_dVb *= T9; + } + + here->BSIM4v2ueff = ueff = pParam->BSIM4v2u0temp / Denomi; + T9 = -ueff / Denomi; + dueff_dVg = T9 * dDenomi_dVg; + dueff_dVd = T9 * dDenomi_dVd; + dueff_dVb = T9 * dDenomi_dVb; + + /* Saturation Drain Voltage Vdsat */ + WVCox = Weff * pParam->BSIM4v2vsattemp * model->BSIM4v2coxe; + WVCoxRds = WVCox * Rds; + + Esat = 2.0 * pParam->BSIM4v2vsattemp / ueff; + here->BSIM4v2EsatL = EsatL = Esat * Leff; + T0 = -EsatL /ueff; + dEsatL_dVg = T0 * dueff_dVg; + dEsatL_dVd = T0 * dueff_dVd; + dEsatL_dVb = T0 * dueff_dVb; + + /* Sqrt() */ + a1 = pParam->BSIM4v2a1; + if (a1 == 0.0) + { Lambda = pParam->BSIM4v2a2; + dLambda_dVg = 0.0; + } + else if (a1 > 0.0) + { T0 = 1.0 - pParam->BSIM4v2a2; + T1 = T0 - pParam->BSIM4v2a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * T0); + Lambda = pParam->BSIM4v2a2 + T0 - 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM4v2a1 * (1.0 + T1 / T2); + } + else + { T1 = pParam->BSIM4v2a2 + pParam->BSIM4v2a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM4v2a2); + Lambda = 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM4v2a1 * (1.0 + T1 / T2); + } + + Vgst2Vtm = Vgsteff + 2.0 * Vtm; + if (Rds > 0) + { tmp2 = dRds_dVg / Rds + dWeff_dVg / Weff; + tmp3 = dRds_dVb / Rds + dWeff_dVb / Weff; + } + else + { tmp2 = dWeff_dVg / Weff; + tmp3 = dWeff_dVb / Weff; + } + if ((Rds == 0.0) && (Lambda == 1.0)) + { T0 = 1.0 / (Abulk * EsatL + Vgst2Vtm); + tmp1 = 0.0; + T1 = T0 * T0; + T2 = Vgst2Vtm * T0; + T3 = EsatL * Vgst2Vtm; + Vdsat = T3 * T0; + + dT0_dVg = -(Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 1.0) * T1; + dT0_dVd = -(Abulk * dEsatL_dVd) * T1; + dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; + + dVdsat_dVg = T3 * dT0_dVg + T2 * dEsatL_dVg + EsatL * T0; + dVdsat_dVd = T3 * dT0_dVd + T2 * dEsatL_dVd; + dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; + } + else + { tmp1 = dLambda_dVg / (Lambda * Lambda); + T9 = Abulk * WVCoxRds; + T8 = Abulk * T9; + T7 = Vgst2Vtm * T9; + T6 = Vgst2Vtm * WVCoxRds; + T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); + dT0_dVg = 2.0 * (T8 * tmp2 - Abulk * tmp1 + + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); + + dT0_dVb = 2.0 * (T8 * (2.0 / Abulk * dAbulk_dVb + tmp3) + + (1.0 / Lambda - 1.0) * dAbulk_dVb); + dT0_dVd = 0.0; + T1 = Vgst2Vtm * (2.0 / Lambda - 1.0) + Abulk * EsatL + 3.0 * T7; + + dT1_dVg = (2.0 / Lambda - 1.0) - 2.0 * Vgst2Vtm * tmp1 + + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 + + T7 * tmp2 + T6 * dAbulk_dVg); + dT1_dVb = Abulk * dEsatL_dVb + EsatL * dAbulk_dVb + + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); + dT1_dVd = Abulk * dEsatL_dVd; + + T2 = Vgst2Vtm * (EsatL + 2.0 * T6); + dT2_dVg = EsatL + Vgst2Vtm * dEsatL_dVg + + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); + dT2_dVb = Vgst2Vtm * (dEsatL_dVb + 2.0 * T6 * tmp3); + dT2_dVd = Vgst2Vtm * dEsatL_dVd; + + T3 = sqrt(T1 * T1 - 2.0 * T0 * T2); + Vdsat = (T1 - T3) / T0; + + dT3_dVg = (T1 * dT1_dVg - 2.0 * (T0 * dT2_dVg + T2 * dT0_dVg)) + / T3; + dT3_dVd = (T1 * dT1_dVd - 2.0 * (T0 * dT2_dVd + T2 * dT0_dVd)) + / T3; + dT3_dVb = (T1 * dT1_dVb - 2.0 * (T0 * dT2_dVb + T2 * dT0_dVb)) + / T3; + + dVdsat_dVg = (dT1_dVg - (T1 * dT1_dVg - dT0_dVg * T2 + - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; + dVdsat_dVb = (dT1_dVb - (T1 * dT1_dVb - dT0_dVb * T2 + - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; + dVdsat_dVd = (dT1_dVd - (T1 * dT1_dVd - T0 * dT2_dVd) / T3) / T0; + } + here->BSIM4v2vdsat = Vdsat; + + /* Calculate Vdseff */ + T1 = Vdsat - Vds - pParam->BSIM4v2delta; + dT1_dVg = dVdsat_dVg; + dT1_dVd = dVdsat_dVd - 1.0; + dT1_dVb = dVdsat_dVb; + + T2 = sqrt(T1 * T1 + 4.0 * pParam->BSIM4v2delta * Vdsat); + T0 = T1 / T2; + T9 = 2.0 * pParam->BSIM4v2delta; + T3 = T9 / T2; + dT2_dVg = T0 * dT1_dVg + T3 * dVdsat_dVg; + dT2_dVd = T0 * dT1_dVd + T3 * dVdsat_dVd; + dT2_dVb = T0 * dT1_dVb + T3 * dVdsat_dVb; + + if (T1 >= 0.0) + { Vdseff = Vdsat - 0.5 * (T1 + T2); + dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); + dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); + dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); + } + else + { T4 = T9 / (T2 - T1); + T5 = 1.0 - T4; + T6 = Vdsat * T4 / (T2 - T1); + Vdseff = Vdsat * T5; + dVdseff_dVg = dVdsat_dVg * T5 + T6 * (dT2_dVg - dT1_dVg); + dVdseff_dVd = dVdsat_dVd * T5 + T6 * (dT2_dVd - dT1_dVd); + dVdseff_dVb = dVdsat_dVb * T5 + T6 * (dT2_dVb - dT1_dVb); + } + + if (Vds == 0.0) + { Vdseff = 0.0; + dVdseff_dVg = 0.0; + dVdseff_dVb = 0.0; + } + + if (Vdseff > Vds) + Vdseff = Vds; + diffVds = Vds - Vdseff; + here->BSIM4v2Vdseff = Vdseff; + + /* Calculate Vasat */ + tmp4 = 1.0 - 0.5 * Abulk * Vdsat / Vgst2Vtm; + T9 = WVCoxRds * Vgsteff; + T8 = T9 / Vgst2Vtm; + T0 = EsatL + Vdsat + 2.0 * T9 * tmp4; + + T7 = 2.0 * WVCoxRds * tmp4; + dT0_dVg = dEsatL_dVg + dVdsat_dVg + T7 * (1.0 + tmp2 * Vgsteff) + - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm + + Vdsat * dAbulk_dVg); + + dT0_dVb = dEsatL_dVb + dVdsat_dVb + T7 * tmp3 * Vgsteff + - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = dEsatL_dVd + dVdsat_dVd - T8 * Abulk * dVdsat_dVd; + + T9 = WVCoxRds * Abulk; + T1 = 2.0 / Lambda - 1.0 + T9; + dT1_dVg = -2.0 * tmp1 + WVCoxRds * (Abulk * tmp2 + dAbulk_dVg); + dT1_dVb = dAbulk_dVb * WVCoxRds + T9 * tmp3; + + Vasat = T0 / T1; + dVasat_dVg = (dT0_dVg - Vasat * dT1_dVg) / T1; + dVasat_dVb = (dT0_dVb - Vasat * dT1_dVb) / T1; + dVasat_dVd = dT0_dVd / T1; + + /* Calculate Idl first */ + tmp1 = pParam->BSIM4v2vtfbphi2; + tmp2 = 2.0e8 * model->BSIM4v2toxp; + dT0_dVg = 1.0 / tmp2; + T0 = (Vgsteff + tmp1) * dT0_dVg; + + tmp3 = exp(0.7 * log(T0)); + T1 = 1.0 + tmp3; + T2 = 0.7 * tmp3 / T0; + Tcen = 1.9e-9 / T1; + dTcen_dVg = -Tcen * T2 * dT0_dVg / T1; + + Coxeff = EPSSI * model->BSIM4v2coxp + / (EPSSI + model->BSIM4v2coxp * Tcen); + dCoxeff_dVg = -Coxeff * Coxeff * dTcen_dVg / EPSSI; + + CoxeffWovL = Coxeff * Weff / Leff; + beta = ueff * CoxeffWovL; + T3 = ueff / Leff; + dbeta_dVg = CoxeffWovL * dueff_dVg + T3 + * (Weff * dCoxeff_dVg + Coxeff * dWeff_dVg); + dbeta_dVd = CoxeffWovL * dueff_dVd; + dbeta_dVb = CoxeffWovL * dueff_dVb + T3 * Coxeff * dWeff_dVb; + + here->BSIM4v2AbovVgst2Vtm = Abulk / Vgst2Vtm; + T0 = 1.0 - 0.5 * Vdseff * here->BSIM4v2AbovVgst2Vtm; + dT0_dVg = -0.5 * (Abulk * dVdseff_dVg + - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; + dT0_dVd = -0.5 * Abulk * dVdseff_dVd / Vgst2Vtm; + dT0_dVb = -0.5 * (Abulk * dVdseff_dVb + dAbulk_dVb * Vdseff) + / Vgst2Vtm; + + fgche1 = Vgsteff * T0; + dfgche1_dVg = Vgsteff * dT0_dVg + T0; + dfgche1_dVd = Vgsteff * dT0_dVd; + dfgche1_dVb = Vgsteff * dT0_dVb; + + T9 = Vdseff / EsatL; + fgche2 = 1.0 + T9; + dfgche2_dVg = (dVdseff_dVg - T9 * dEsatL_dVg) / EsatL; + dfgche2_dVd = (dVdseff_dVd - T9 * dEsatL_dVd) / EsatL; + dfgche2_dVb = (dVdseff_dVb - T9 * dEsatL_dVb) / EsatL; + + gche = beta * fgche1 / fgche2; + dgche_dVg = (beta * dfgche1_dVg + fgche1 * dbeta_dVg + - gche * dfgche2_dVg) / fgche2; + dgche_dVd = (beta * dfgche1_dVd + fgche1 * dbeta_dVd + - gche * dfgche2_dVd) / fgche2; + dgche_dVb = (beta * dfgche1_dVb + fgche1 * dbeta_dVb + - gche * dfgche2_dVb) / fgche2; + + T0 = 1.0 + gche * Rds; + Idl = gche / T0; + T1 = (1.0 - Idl * Rds) / T0; + T2 = Idl * Idl; + dIdl_dVg = T1 * dgche_dVg - T2 * dRds_dVg; + dIdl_dVd = T1 * dgche_dVd; + dIdl_dVb = T1 * dgche_dVb - T2 * dRds_dVb; + + /* Calculate degradation factor due to pocket implant */ + + if (pParam->BSIM4v2fprout <= 0.0) + { FP = 1.0; + dFP_dVg = 0.0; + } + else + { T9 = pParam->BSIM4v2fprout * sqrt(Leff) / Vgst2Vtm; + FP = 1.0 / (1.0 + T9); + dFP_dVg = FP * FP * T9 / Vgst2Vtm; + } + + /* Calculate VACLM */ + T8 = pParam->BSIM4v2pvag / EsatL; + T9 = T8 * Vgsteff; + if (T9 > -0.9) + { PvagTerm = 1.0 + T9; + dPvagTerm_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL); + dPvagTerm_dVb = -T9 * dEsatL_dVb / EsatL; + dPvagTerm_dVd = -T9 * dEsatL_dVd / EsatL; + } + else + { T4 = 1.0 / (17.0 + 20.0 * T9); + PvagTerm = (0.8 + T9) * T4; + T4 *= T4; + dPvagTerm_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL) * T4; + T9 *= T4 / EsatL; + dPvagTerm_dVb = -T9 * dEsatL_dVb; + dPvagTerm_dVd = -T9 * dEsatL_dVd; + } + + if ((pParam->BSIM4v2pclm > 0.0) && (diffVds > 1.0e-10)) + { T0 = 1.0 + Rds * Idl; + dT0_dVg = dRds_dVg * Idl + Rds * dIdl_dVg; + dT0_dVd = Rds * dIdl_dVd; + dT0_dVb = dRds_dVb * Idl + Rds * dIdl_dVb; + + T2 = Vdsat / Esat; + T1 = Leff + T2; + dT1_dVg = (dVdsat_dVg - T2 * dEsatL_dVg / Leff) / Esat; + dT1_dVd = (dVdsat_dVd - T2 * dEsatL_dVd / Leff) / Esat; + dT1_dVb = (dVdsat_dVb - T2 * dEsatL_dVb / Leff) / Esat; + + Cclm = FP * PvagTerm * T0 * T1 / (pParam->BSIM4v2pclm * pParam->BSIM4v2litl); + dCclm_dVg = Cclm * (dFP_dVg / FP + dPvagTerm_dVg / PvagTerm + + dT0_dVg / T0 + dT1_dVg / T1); + dCclm_dVb = Cclm * (dPvagTerm_dVb / PvagTerm + dT0_dVb / T0 + + dT1_dVb / T1); + dCclm_dVd = Cclm * (dPvagTerm_dVd / PvagTerm + dT0_dVd / T0 + + dT1_dVd / T1); + VACLM = Cclm * diffVds; + + dVACLM_dVg = dCclm_dVg * diffVds - dVdseff_dVg * Cclm; + dVACLM_dVb = dCclm_dVb * diffVds - dVdseff_dVb * Cclm; + dVACLM_dVd = dCclm_dVd * diffVds + (1.0 - dVdseff_dVd) * Cclm; + } + else + { VACLM = Cclm = MAX_EXP; + dVACLM_dVd = dVACLM_dVg = dVACLM_dVb = 0.0; + dCclm_dVd = dCclm_dVg = dCclm_dVb = 0.0; + } + + /* Calculate VADIBL */ + if (pParam->BSIM4v2thetaRout > 0.0) + { T8 = Abulk * Vdsat; + T0 = Vgst2Vtm * T8; + dT0_dVg = Vgst2Vtm * Abulk * dVdsat_dVg + T8 + + Vgst2Vtm * Vdsat * dAbulk_dVg; + dT0_dVb = Vgst2Vtm * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = Vgst2Vtm * Abulk * dVdsat_dVd; + + T1 = Vgst2Vtm + T8; + dT1_dVg = 1.0 + Abulk * dVdsat_dVg + Vdsat * dAbulk_dVg; + dT1_dVb = Abulk * dVdsat_dVb + dAbulk_dVb * Vdsat; + dT1_dVd = Abulk * dVdsat_dVd; + + T9 = T1 * T1; + T2 = pParam->BSIM4v2thetaRout; + VADIBL = (Vgst2Vtm - T0 / T1) / T2; + dVADIBL_dVg = (1.0 - dT0_dVg / T1 + T0 * dT1_dVg / T9) / T2; + dVADIBL_dVb = (-dT0_dVb / T1 + T0 * dT1_dVb / T9) / T2; + dVADIBL_dVd = (-dT0_dVd / T1 + T0 * dT1_dVd / T9) / T2; + + T7 = pParam->BSIM4v2pdiblb * Vbseff; + if (T7 >= -0.9) + { T3 = 1.0 / (1.0 + T7); + VADIBL *= T3; + dVADIBL_dVg *= T3; + dVADIBL_dVb = (dVADIBL_dVb - VADIBL * pParam->BSIM4v2pdiblb) + * T3; + dVADIBL_dVd *= T3; + } + else + { T4 = 1.0 / (0.8 + T7); + T3 = (17.0 + 20.0 * T7) * T4; + dVADIBL_dVg *= T3; + dVADIBL_dVb = dVADIBL_dVb * T3 + - VADIBL * pParam->BSIM4v2pdiblb * T4 * T4; + dVADIBL_dVd *= T3; + VADIBL *= T3; + } + + dVADIBL_dVg = dVADIBL_dVg * PvagTerm + VADIBL * dPvagTerm_dVg; + dVADIBL_dVb = dVADIBL_dVb * PvagTerm + VADIBL * dPvagTerm_dVb; + dVADIBL_dVd = dVADIBL_dVd * PvagTerm + VADIBL * dPvagTerm_dVd; + VADIBL *= PvagTerm; + } + else + { VADIBL = MAX_EXP; + dVADIBL_dVd = dVADIBL_dVg = dVADIBL_dVb = 0.0; + } + + /* Calculate Va */ + Va = Vasat + VACLM; + dVa_dVg = dVasat_dVg + dVACLM_dVg; + dVa_dVb = dVasat_dVb + dVACLM_dVb; + dVa_dVd = dVasat_dVd + dVACLM_dVd; + + /* Calculate VADITS */ + T0 = pParam->BSIM4v2pditsd * Vds; + if (T0 > EXP_THRESHOLD) + { T1 = MAX_EXP; + dT1_dVd = 0; + } + else + { T1 = exp(T0); + dT1_dVd = T1 * pParam->BSIM4v2pditsd; + } + + if (pParam->BSIM4v2pdits > 0.0) + { T2 = 1.0 + model->BSIM4v2pditsl * Leff; + VADITS = (1.0 + T2 * T1) / pParam->BSIM4v2pdits; + dVADITS_dVg = VADITS * dFP_dVg; + dVADITS_dVd = FP * T2 * dT1_dVd / pParam->BSIM4v2pdits; + VADITS *= FP; + } + else + { VADITS = MAX_EXP; + dVADITS_dVg = dVADITS_dVd = 0; + } + + /* Calculate VASCBE */ + if (pParam->BSIM4v2pscbe2 > 0.0) + { if (diffVds > pParam->BSIM4v2pscbe1 * pParam->BSIM4v2litl + / EXP_THRESHOLD) + { T0 = pParam->BSIM4v2pscbe1 * pParam->BSIM4v2litl / diffVds; + VASCBE = Leff * exp(T0) / pParam->BSIM4v2pscbe2; + T1 = T0 * VASCBE / diffVds; + dVASCBE_dVg = T1 * dVdseff_dVg; + dVASCBE_dVd = -T1 * (1.0 - dVdseff_dVd); + dVASCBE_dVb = T1 * dVdseff_dVb; + } + else + { VASCBE = MAX_EXP * Leff/pParam->BSIM4v2pscbe2; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + } + else + { VASCBE = MAX_EXP; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + + /* Add DIBL to Ids */ + T9 = diffVds / VADIBL; + T0 = 1.0 + T9; + Idsa = Idl * T0; + dIdsa_dVg = T0 * dIdl_dVg - Idl * (dVdseff_dVg + T9 * dVADIBL_dVg) / VADIBL; + dIdsa_dVd = T0 * dIdl_dVd + Idl + * (1.0 - dVdseff_dVd - T9 * dVADIBL_dVd) / VADIBL; + dIdsa_dVb = T0 * dIdl_dVb - Idl * (dVdseff_dVb + T9 * dVADIBL_dVb) / VADIBL; + + /* Add DITS to Ids */ + T9 = diffVds / VADITS; + T0 = 1.0 + T9; + dIdsa_dVg = T0 * dIdsa_dVg - Idsa * (dVdseff_dVg + T9 * dVADITS_dVg) / VADITS; + dIdsa_dVd = T0 * dIdsa_dVd + Idsa + * (1.0 - dVdseff_dVd - T9 * dVADITS_dVd) / VADITS; + dIdsa_dVb = T0 * dIdsa_dVb - Idsa * dVdseff_dVb / VADITS; + Idsa *= T0; + + /* Add CLM to Ids */ + T0 = log(Va / Vasat); + dT0_dVg = dVa_dVg / Va - dVasat_dVg / Vasat; + dT0_dVb = dVa_dVb / Va - dVasat_dVb / Vasat; + dT0_dVd = dVa_dVd / Va - dVasat_dVd / Vasat; + T1 = T0 / Cclm; + T9 = 1.0 + T1; + dT9_dVg = (dT0_dVg - T1 * dCclm_dVg) / Cclm; + dT9_dVb = (dT0_dVb - T1 * dCclm_dVb) / Cclm; + dT9_dVd = (dT0_dVd - T1 * dCclm_dVd) / Cclm; + + dIdsa_dVg = dIdsa_dVg * T9 + Idsa * dT9_dVg; + dIdsa_dVb = dIdsa_dVb * T9 + Idsa * dT9_dVb; + dIdsa_dVd = dIdsa_dVd * T9 + Idsa * dT9_dVd; + Idsa *= T9; + + /* Substrate current begins */ + tmp = pParam->BSIM4v2alpha0 + pParam->BSIM4v2alpha1 * Leff; + if ((tmp <= 0.0) || (pParam->BSIM4v2beta0 <= 0.0)) + { Isub = Gbd = Gbb = Gbg = 0.0; + } + else + { T2 = tmp / Leff; + if (diffVds > pParam->BSIM4v2beta0 / EXP_THRESHOLD) + { T0 = -pParam->BSIM4v2beta0 / diffVds; + T1 = T2 * diffVds * exp(T0); + T3 = T1 / diffVds * (T0 - 1.0); + dT1_dVg = T3 * dVdseff_dVg; + dT1_dVd = T3 * (dVdseff_dVd - 1.0); + dT1_dVb = T3 * dVdseff_dVb; + } + else + { T3 = T2 * MIN_EXP; + T1 = T3 * diffVds; + dT1_dVg = -T3 * dVdseff_dVg; + dT1_dVd = T3 * (1.0 - dVdseff_dVd); + dT1_dVb = -T3 * dVdseff_dVb; + } + T4 = Idsa * Vdseff; + Isub = T1 * T4; + Gbg = T1 * (dIdsa_dVg * Vdseff + Idsa * dVdseff_dVg) + + T4 * dT1_dVg; + Gbd = T1 * (dIdsa_dVd * Vdseff + Idsa * dVdseff_dVd) + + T4 * dT1_dVd; + Gbb = T1 * (dIdsa_dVb * Vdseff + Idsa * dVdseff_dVb) + + T4 * dT1_dVb; + + Gbd += Gbg * dVgsteff_dVd; + Gbb += Gbg * dVgsteff_dVb; + Gbg *= dVgsteff_dVg; + Gbb *= dVbseff_dVb; + } + here->BSIM4v2csub = Isub; + here->BSIM4v2gbbs = Gbb; + here->BSIM4v2gbgs = Gbg; + here->BSIM4v2gbds = Gbd; + + /* Add SCBE to Ids */ + T9 = diffVds / VASCBE; + T0 = 1.0 + T9; + Ids = Idsa * T0; + + Gm = T0 * dIdsa_dVg - Idsa + * (dVdseff_dVg + T9 * dVASCBE_dVg) / VASCBE; + Gds = T0 * dIdsa_dVd + Idsa + * (1.0 - dVdseff_dVd - T9 * dVASCBE_dVd) / VASCBE; + Gmb = T0 * dIdsa_dVb - Idsa + * (dVdseff_dVb + T9 * dVASCBE_dVb) / VASCBE; + + tmp1 = Gds + Gm * dVgsteff_dVd; + tmp2 = Gmb + Gm * dVgsteff_dVb; + tmp3 = Gm; + + Gm = (Ids * dVdseff_dVg + Vdseff * tmp3) * dVgsteff_dVg; + Gds = Ids * (dVdseff_dVd + dVdseff_dVg * dVgsteff_dVd) + + Vdseff * tmp1; + Gmb = (Ids * (dVdseff_dVb + dVdseff_dVg * dVgsteff_dVb) + + Vdseff * tmp2) * dVbseff_dVb; + + cdrain = Ids * Vdseff; + here->BSIM4v2gds = Gds; + here->BSIM4v2gm = Gm; + here->BSIM4v2gmbs = Gmb; + here->BSIM4v2IdovVds = Ids; + + /* Calculate Rg */ + if ((here->BSIM4v2rgateMod > 1) || + (here->BSIM4v2trnqsMod != 0) || (here->BSIM4v2acnqsMod != 0)) + { T9 = pParam->BSIM4v2xrcrg2 * model->BSIM4v2vtm; + T0 = T9 * beta; + dT0_dVd = (dbeta_dVd + dbeta_dVg * dVgsteff_dVd) * T9; + dT0_dVb = (dbeta_dVb + dbeta_dVg * dVgsteff_dVb) * T9; + dT0_dVg = dbeta_dVg * T9; + + here->BSIM4v2gcrg = pParam->BSIM4v2xrcrg1 * ( T0 + Ids); + here->BSIM4v2gcrgd = pParam->BSIM4v2xrcrg1 * (dT0_dVd + tmp1); + here->BSIM4v2gcrgb = pParam->BSIM4v2xrcrg1 * (dT0_dVb + tmp2) + * dVbseff_dVb; + here->BSIM4v2gcrgg = pParam->BSIM4v2xrcrg1 * (dT0_dVg + tmp3) + * dVgsteff_dVg; + + if (here->BSIM4v2nf != 1.0) + { here->BSIM4v2gcrg *= here->BSIM4v2nf; + here->BSIM4v2gcrgg *= here->BSIM4v2nf; + here->BSIM4v2gcrgd *= here->BSIM4v2nf; + here->BSIM4v2gcrgb *= here->BSIM4v2nf; + } + + if (here->BSIM4v2rgateMod == 2) + { T10 = here->BSIM4v2grgeltd * here->BSIM4v2grgeltd; + T11 = here->BSIM4v2grgeltd + here->BSIM4v2gcrg; + here->BSIM4v2gcrg = here->BSIM4v2grgeltd * here->BSIM4v2gcrg / T11; + T12 = T10 / T11 / T11; + here->BSIM4v2gcrgg *= T12; + here->BSIM4v2gcrgd *= T12; + here->BSIM4v2gcrgb *= T12; + } + here->BSIM4v2gcrgs = -(here->BSIM4v2gcrgg + here->BSIM4v2gcrgd + + here->BSIM4v2gcrgb); + } + + + /* Calculate bias-dependent external S/D resistance */ + if (model->BSIM4v2rdsMod) + { /* Rs(V) */ + T0 = vgs - pParam->BSIM4v2vfbsd; + T1 = sqrt(T0 * T0 + 1.0e-4); + vgs_eff = 0.5 * (T0 + T1); + dvgs_eff_dvg = vgs_eff / T1; + + T0 = 1.0 + pParam->BSIM4v2prwg * vgs_eff; + dT0_dvg = -pParam->BSIM4v2prwg / T0 / T0 * dvgs_eff_dvg; + T1 = -pParam->BSIM4v2prwb * vbs; + dT1_dvb = -pParam->BSIM4v2prwb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); + dT3_dvg = T3 / (T3 - T2); + dT3_dvb = dT3_dvg * dT1_dvb; + dT3_dvg *= dT0_dvg; + + T4 = pParam->BSIM4v2rs0 * 0.5; + Rs = pParam->BSIM4v2rswmin + T3 * T4; + dRs_dvg = T4 * dT3_dvg; + dRs_dvb = T4 * dT3_dvb; + + T0 = 1.0 + here->BSIM4v2sourceConductance * Rs; + here->BSIM4v2gstot = here->BSIM4v2sourceConductance / T0; + T0 = -here->BSIM4v2gstot * here->BSIM4v2gstot; + dgstot_dvd = 0.0; /* place holder */ + dgstot_dvg = T0 * dRs_dvg; + dgstot_dvb = T0 * dRs_dvb; + dgstot_dvs = -(dgstot_dvg + dgstot_dvb + dgstot_dvd); + + /* Rd(V) */ + T0 = vgd - pParam->BSIM4v2vfbsd; + T1 = sqrt(T0 * T0 + 1.0e-4); + vgd_eff = 0.5 * (T0 + T1); + dvgd_eff_dvg = vgd_eff / T1; + + T0 = 1.0 + pParam->BSIM4v2prwg * vgd_eff; + dT0_dvg = -pParam->BSIM4v2prwg / T0 / T0 * dvgd_eff_dvg; + T1 = -pParam->BSIM4v2prwb * vbd; + dT1_dvb = -pParam->BSIM4v2prwb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); + dT3_dvg = T3 / (T3 - T2); + dT3_dvb = dT3_dvg * dT1_dvb; + dT3_dvg *= dT0_dvg; + + T4 = pParam->BSIM4v2rd0 * 0.5; + Rd = pParam->BSIM4v2rdwmin + T3 * T4; + dRd_dvg = T4 * dT3_dvg; + dRd_dvb = T4 * dT3_dvb; + + T0 = 1.0 + here->BSIM4v2drainConductance * Rd; + here->BSIM4v2gdtot = here->BSIM4v2drainConductance / T0; + T0 = -here->BSIM4v2gdtot * here->BSIM4v2gdtot; + dgdtot_dvs = 0.0; + dgdtot_dvg = T0 * dRd_dvg; + dgdtot_dvb = T0 * dRd_dvb; + dgdtot_dvd = -(dgdtot_dvg + dgdtot_dvb + dgdtot_dvs); + + here->BSIM4v2gstotd = vses * dgstot_dvd; + here->BSIM4v2gstotg = vses * dgstot_dvg; + here->BSIM4v2gstots = vses * dgstot_dvs; + here->BSIM4v2gstotb = vses * dgstot_dvb; + + T2 = vdes - vds; + here->BSIM4v2gdtotd = T2 * dgdtot_dvd; + here->BSIM4v2gdtotg = T2 * dgdtot_dvg; + here->BSIM4v2gdtots = T2 * dgdtot_dvs; + here->BSIM4v2gdtotb = T2 * dgdtot_dvb; + } + else /* WDLiu: for bypass */ + { here->BSIM4v2gstot = here->BSIM4v2gstotd = here->BSIM4v2gstotg = 0.0; + here->BSIM4v2gstots = here->BSIM4v2gstotb = 0.0; + here->BSIM4v2gdtot = here->BSIM4v2gdtotd = here->BSIM4v2gdtotg = 0.0; + here->BSIM4v2gdtots = here->BSIM4v2gdtotb = 0.0; + } + + /* Calculate GIDL current */ + vgs_eff = here->BSIM4v2vgs_eff; + dvgs_eff_dvg = here->BSIM4v2dvgs_eff_dvg; + T0 = 3.0 * model->BSIM4v2toxe; + + T1 = (vds - vgs_eff - pParam->BSIM4v2egidl ) / T0; + if ((pParam->BSIM4v2agidl <= 0.0) || (pParam->BSIM4v2bgidl <= 0.0) + || (T1 <= 0.0) || (pParam->BSIM4v2cgidl <= 0.0) || (vbd > 0.0)) + Igidl = Ggidld = Ggidlg = Ggidlb = 0.0; + else { + dT1_dVd = 1.0 / T0; + dT1_dVg = -dvgs_eff_dvg * dT1_dVd; + T2 = pParam->BSIM4v2bgidl / T1; + if (T2 < 100.0) + { Igidl = pParam->BSIM4v2agidl * pParam->BSIM4v2weffCJ * T1 * exp(-T2); + T3 = Igidl * (1.0 + T2) / T1; + Ggidld = T3 * dT1_dVd; + Ggidlg = T3 * dT1_dVg; + } + else + { Igidl = pParam->BSIM4v2agidl * pParam->BSIM4v2weffCJ * 3.720075976e-44; + Ggidld = Igidl * dT1_dVd; + Ggidlg = Igidl * dT1_dVg; + Igidl *= T1; + } + + T4 = vbd * vbd; + T5 = -vbd * T4; + T6 = pParam->BSIM4v2cgidl + T5; + T7 = T5 / T6; + T8 = 3.0 * pParam->BSIM4v2cgidl * T4 / T6 / T6; + Ggidld = Ggidld * T7 + Igidl * T8; + Ggidlg = Ggidlg * T7; + Ggidlb = -Igidl * T8; + Igidl *= T7; + } + here->BSIM4v2Igidl = Igidl; + here->BSIM4v2ggidld = Ggidld; + here->BSIM4v2ggidlg = Ggidlg; + here->BSIM4v2ggidlb = Ggidlb; + + /* Calculate GISL current: bugfix recommended by TI -JX */ + vgd_eff = here->BSIM4v2vgd_eff; + dvgd_eff_dvg = here->BSIM4v2dvgd_eff_dvg; + + T1 = (-vds - vgd_eff - pParam->BSIM4v2egidl ) / T0; + + if ((pParam->BSIM4v2agidl <= 0.0) || (pParam->BSIM4v2bgidl <= 0.0) + || (T1 <= 0.0) || (pParam->BSIM4v2cgidl <= 0.0) || (vbs > 0.0)) + Igisl = Ggisls = Ggislg = Ggislb = 0.0; + else { + dT1_dVd = 1.0 / T0; + dT1_dVg = -dvgd_eff_dvg * dT1_dVd; + T2 = pParam->BSIM4v2bgidl / T1; + if (T2 < 100.0) + { Igisl = pParam->BSIM4v2agidl * pParam->BSIM4v2weffCJ * T1 * exp(-T2); + T3 = Igisl * (1.0 + T2) / T1; + Ggisls = T3 * dT1_dVd; + Ggislg = T3 * dT1_dVg; + } + else + { Igisl = pParam->BSIM4v2agidl * pParam->BSIM4v2weffCJ * 3.720075976e-44; + Ggisls = Igisl * dT1_dVd; + Ggislg = Igisl * dT1_dVg; + Igisl *= T1; + } + + T4 = vbs * vbs; + T5 = -vbs * T4; + T6 = pParam->BSIM4v2cgidl + T5; + T7 = T5 / T6; + T8 = 3.0 * pParam->BSIM4v2cgidl * T4 / T6 / T6; + Ggisls = Ggisls * T7 + Igisl * T8; + Ggislg = Ggislg * T7; + Ggislb = -Igisl * T8; + Igisl *= T7; + } + here->BSIM4v2Igisl = Igisl; + here->BSIM4v2ggisls = Ggisls; + here->BSIM4v2ggislg = Ggislg; + here->BSIM4v2ggislb = Ggislb; + + + /* Calculate gate tunneling current */ + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { Vfb = pParam->BSIM4v2vfbzb; + V3 = Vfb - Vgs_eff + Vbseff - DELTA_3; + if (Vfb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1; /* WDLiu: -No surprise? No. -Good! */ + + Voxacc = Vfb - Vfbeff; + dVoxacc_dVg = -dVfbeff_dVg; + dVoxacc_dVb = -dVfbeff_dVb; + if (Voxacc < 0.0) /* WDLiu: Avoiding numerical instability. */ + Voxacc = dVoxacc_dVg = dVoxacc_dVb = 0.0; + + T0 = 0.5 * pParam->BSIM4v2k1ox; + T3 = Vgs_eff - Vfbeff - Vbseff - Vgsteff; + if (pParam->BSIM4v2k1ox == 0.0) + Voxdepinv = dVoxdepinv_dVg = dVoxdepinv_dVd + = dVoxdepinv_dVb = 0.0; + else if (T3 < 0.0) + { Voxdepinv = -T3; + dVoxdepinv_dVg = -dVgs_eff_dVg + dVfbeff_dVg + + dVgsteff_dVg; + dVoxdepinv_dVd = dVgsteff_dVd; + dVoxdepinv_dVb = dVfbeff_dVb + 1.0 + dVgsteff_dVb; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = T0 / T1; + Voxdepinv = pParam->BSIM4v2k1ox * (T1 - T0); + dVoxdepinv_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg + - dVgsteff_dVg); + dVoxdepinv_dVd = -T2 * dVgsteff_dVd; + dVoxdepinv_dVb = -T2 * (dVfbeff_dVb + 1.0 + dVgsteff_dVb); + } + + Voxdepinv += Vgsteff; + dVoxdepinv_dVg += dVgsteff_dVg; + dVoxdepinv_dVd += dVgsteff_dVd; + dVoxdepinv_dVb += dVgsteff_dVb; + } + + if (model->BSIM4v2igcMod) + { T0 = Vtm * pParam->BSIM4v2nigc; + VxNVt = (Vgs_eff - model->BSIM4v2type * pParam->BSIM4v2vth0) / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = Vgs_eff - model->BSIM4v2type * pParam->BSIM4v2vth0; + dVaux_dVg = dVgs_eff_dVg; + dVaux_dVd = 0.0; + dVaux_dVb = 0.0; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVd = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVg = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVd = 0.0; + dVaux_dVb = 0.0; + dVaux_dVg *= dVgs_eff_dVg; + } + + T2 = Vgs_eff * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + Vgs_eff * dVaux_dVg; + dT2_dVd = Vgs_eff * dVaux_dVd; + dT2_dVb = Vgs_eff * dVaux_dVb; + + T11 = pParam->BSIM4v2Aechvb; + T12 = pParam->BSIM4v2Bechvb; + T3 = pParam->BSIM4v2aigc * pParam->BSIM4v2cigc + - pParam->BSIM4v2bigc; + T4 = pParam->BSIM4v2bigc * pParam->BSIM4v2cigc; + T5 = T12 * (pParam->BSIM4v2aigc + T3 * Voxdepinv + - T4 * Voxdepinv * Voxdepinv); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxdepinv); + dT6_dVd = dT6_dVg * dVoxdepinv_dVd; + dT6_dVb = dT6_dVg * dVoxdepinv_dVb; + dT6_dVg *= dVoxdepinv_dVg; + } + + Igc = T11 * T2 * T6; + dIgc_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgc_dVd = T11 * (T2 * dT6_dVd + T6 * dT2_dVd); + dIgc_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + if (model->BSIM4v2pigcdGiven) + { Pigcd = pParam->BSIM4v2pigcd; + dPigcd_dVg = dPigcd_dVd = dPigcd_dVb = 0.0; + } + else + { T11 = pParam->BSIM4v2Bechvb * model->BSIM4v2toxe; + T12 = Vgsteff + 1.0e-20; + T13 = T11 / T12 / T12; + T14 = -T13 / T12; + Pigcd = T13 * (1.0 - 0.5 * Vdseff / T12); + dPigcd_dVg = T14 * (2.0 + 0.5 * (dVdseff_dVg + * Vgsteff - 3.0 * Vdseff) / T12); + dPigcd_dVd = 0.5 * T14 * dVdseff_dVd + + dPigcd_dVg * dVgsteff_dVd; + dPigcd_dVb = 0.5 * T14 * dVdseff_dVb + + dPigcd_dVg * dVgsteff_dVb; + dPigcd_dVg *= dVgsteff_dVg; + } + + T7 = -Pigcd * Vds; + dT7_dVg = -Vds * dPigcd_dVg; + dT7_dVd = -Pigcd - Vds * dPigcd_dVd; + dT7_dVb = -Vds * dPigcd_dVb; + T8 = T7 * T7 + 2.0e-4; + dT8_dVg = 2.0 * T7; + dT8_dVd = dT8_dVg * dT7_dVd; + dT8_dVb = dT8_dVg * dT7_dVb; + dT8_dVg *= dT7_dVg; + + if (T7 > EXP_THRESHOLD) + { T9 = MAX_EXP; + dT9_dVg = dT9_dVd = dT9_dVb = 0.0; + } + else if (T7 < -EXP_THRESHOLD) + { T9 = MIN_EXP; + dT9_dVg = dT9_dVd = dT9_dVb = 0.0; + } + else + { T9 = exp(T7); + dT9_dVg = T9 * dT7_dVg; + dT9_dVd = T9 * dT7_dVd; + dT9_dVb = T9 * dT7_dVb; + } + + T0 = T8 * T8; + T1 = T9 - 1.0 + 1.0e-4; + T10 = (T1 - T7) / T8; + dT10_dVg = (dT9_dVg - dT7_dVg - T10 * dT8_dVg) / T8; + dT10_dVd = (dT9_dVd - dT7_dVd - T10 * dT8_dVd) / T8; + dT10_dVb = (dT9_dVb - dT7_dVb - T10 * dT8_dVb) / T8; + + Igcs = Igc * T10; + dIgcs_dVg = dIgc_dVg * T10 + Igc * dT10_dVg; + dIgcs_dVd = dIgc_dVd * T10 + Igc * dT10_dVd; + dIgcs_dVb = dIgc_dVb * T10 + Igc * dT10_dVb; + + T1 = T9 - 1.0 - 1.0e-4; + T10 = (T7 * T9 - T1) / T8; + dT10_dVg = (dT7_dVg * T9 + (T7 - 1.0) * dT9_dVg + - T10 * dT8_dVg) / T8; + dT10_dVd = (dT7_dVd * T9 + (T7 - 1.0) * dT9_dVd + - T10 * dT8_dVd) / T8; + dT10_dVb = (dT7_dVb * T9 + (T7 - 1.0) * dT9_dVb + - T10 * dT8_dVb) / T8; + Igcd = Igc * T10; + dIgcd_dVg = dIgc_dVg * T10 + Igc * dT10_dVg; + dIgcd_dVd = dIgc_dVd * T10 + Igc * dT10_dVd; + dIgcd_dVb = dIgc_dVb * T10 + Igc * dT10_dVb; + + here->BSIM4v2Igcs = Igcs; + here->BSIM4v2gIgcsg = dIgcs_dVg; + here->BSIM4v2gIgcsd = dIgcs_dVd; + here->BSIM4v2gIgcsb = dIgcs_dVb * dVbseff_dVb; + here->BSIM4v2Igcd = Igcd; + here->BSIM4v2gIgcdg = dIgcd_dVg; + here->BSIM4v2gIgcdd = dIgcd_dVd; + here->BSIM4v2gIgcdb = dIgcd_dVb * dVbseff_dVb; + + T0 = vgs - pParam->BSIM4v2vfbsd; + vgs_eff = sqrt(T0 * T0 + 1.0e-4); + dvgs_eff_dvg = T0 / vgs_eff; + + T2 = vgs * vgs_eff; + dT2_dVg = vgs * dvgs_eff_dvg + vgs_eff; + T11 = pParam->BSIM4v2AechvbEdge; + T12 = pParam->BSIM4v2BechvbEdge; + T3 = pParam->BSIM4v2aigsd * pParam->BSIM4v2cigsd + - pParam->BSIM4v2bigsd; + T4 = pParam->BSIM4v2bigsd * pParam->BSIM4v2cigsd; + T5 = T12 * (pParam->BSIM4v2aigsd + T3 * vgs_eff + - T4 * vgs_eff * vgs_eff); + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * vgs_eff) + * dvgs_eff_dvg; + } + Igs = T11 * T2 * T6; + dIgs_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgs_dVs = -dIgs_dVg; + + + T0 = vgd - pParam->BSIM4v2vfbsd; + vgd_eff = sqrt(T0 * T0 + 1.0e-4); + dvgd_eff_dvg = T0 / vgd_eff; + + T2 = vgd * vgd_eff; + dT2_dVg = vgd * dvgd_eff_dvg + vgd_eff; + T5 = T12 * (pParam->BSIM4v2aigsd + T3 * vgd_eff + - T4 * vgd_eff * vgd_eff); + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * vgd_eff) + * dvgd_eff_dvg; + } + Igd = T11 * T2 * T6; + dIgd_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgd_dVd = -dIgd_dVg; + + here->BSIM4v2Igs = Igs; + here->BSIM4v2gIgsg = dIgs_dVg; + here->BSIM4v2gIgss = dIgs_dVs; + here->BSIM4v2Igd = Igd; + here->BSIM4v2gIgdg = dIgd_dVg; + here->BSIM4v2gIgdd = dIgd_dVd; + } + else + { here->BSIM4v2Igcs = here->BSIM4v2gIgcsg = here->BSIM4v2gIgcsd + = here->BSIM4v2gIgcsb = 0.0; + here->BSIM4v2Igcd = here->BSIM4v2gIgcdg = here->BSIM4v2gIgcdd + = here->BSIM4v2gIgcdb = 0.0; + here->BSIM4v2Igs = here->BSIM4v2gIgsg = here->BSIM4v2gIgss = 0.0; + here->BSIM4v2Igd = here->BSIM4v2gIgdg = here->BSIM4v2gIgdd = 0.0; + } + + if (model->BSIM4v2igbMod) + { T0 = Vtm * pParam->BSIM4v2nigbacc; + T1 = -Vgs_eff + Vbseff + Vfb; + VxNVt = T1 / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = T1; + dVaux_dVg = -dVgs_eff_dVg; + dVaux_dVb = 1.0; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVb = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVg = -dVaux_dVb * dVgs_eff_dVg; + } + + T2 = (Vgs_eff - Vbseff) * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + (Vgs_eff - Vbseff) * dVaux_dVg; + dT2_dVb = -Vaux + (Vgs_eff - Vbseff) * dVaux_dVb; + + T11 = 4.97232e-7 * pParam->BSIM4v2weff + * pParam->BSIM4v2leff * pParam->BSIM4v2ToxRatio; + T12 = -7.45669e11 * model->BSIM4v2toxe; + T3 = pParam->BSIM4v2aigbacc * pParam->BSIM4v2cigbacc + - pParam->BSIM4v2bigbacc; + T4 = pParam->BSIM4v2bigbacc * pParam->BSIM4v2cigbacc; + T5 = T12 * (pParam->BSIM4v2aigbacc + T3 * Voxacc + - T4 * Voxacc * Voxacc); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxacc); + dT6_dVb = dT6_dVg * dVoxacc_dVb; + dT6_dVg *= dVoxacc_dVg; + } + + Igbacc = T11 * T2 * T6; + dIgbacc_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgbacc_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + + T0 = Vtm * pParam->BSIM4v2nigbinv; + T1 = Voxdepinv - pParam->BSIM4v2eigbinv; + VxNVt = T1 / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = T1; + dVaux_dVg = dVoxdepinv_dVg; + dVaux_dVd = dVoxdepinv_dVd; + dVaux_dVb = dVoxdepinv_dVb; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVd = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVg = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVd = dVaux_dVg * dVoxdepinv_dVd; + dVaux_dVb = dVaux_dVg * dVoxdepinv_dVb; + dVaux_dVg *= dVoxdepinv_dVg; + } + + T2 = (Vgs_eff - Vbseff) * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + (Vgs_eff - Vbseff) * dVaux_dVg; + dT2_dVd = (Vgs_eff - Vbseff) * dVaux_dVd; + dT2_dVb = -Vaux + (Vgs_eff - Vbseff) * dVaux_dVb; + + T11 *= 0.75610; + T12 *= 1.31724; + T3 = pParam->BSIM4v2aigbinv * pParam->BSIM4v2cigbinv + - pParam->BSIM4v2bigbinv; + T4 = pParam->BSIM4v2bigbinv * pParam->BSIM4v2cigbinv; + T5 = T12 * (pParam->BSIM4v2aigbinv + T3 * Voxdepinv + - T4 * Voxdepinv * Voxdepinv); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxdepinv); + dT6_dVd = dT6_dVg * dVoxdepinv_dVd; + dT6_dVb = dT6_dVg * dVoxdepinv_dVb; + dT6_dVg *= dVoxdepinv_dVg; + } + + Igbinv = T11 * T2 * T6; + dIgbinv_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgbinv_dVd = T11 * (T2 * dT6_dVd + T6 * dT2_dVd); + dIgbinv_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + here->BSIM4v2Igb = Igbinv + Igbacc; + here->BSIM4v2gIgbg = dIgbinv_dVg + dIgbacc_dVg; + here->BSIM4v2gIgbd = dIgbinv_dVd; + here->BSIM4v2gIgbb = (dIgbinv_dVb + dIgbacc_dVb) * dVbseff_dVb; + } + else + { here->BSIM4v2Igb = here->BSIM4v2gIgbg = here->BSIM4v2gIgbd + = here->BSIM4v2gIgbs = here->BSIM4v2gIgbb = 0.0; + } /* End of Gate current */ + + if (here->BSIM4v2nf != 1.0) + { cdrain *= here->BSIM4v2nf; + here->BSIM4v2gds *= here->BSIM4v2nf; + here->BSIM4v2gm *= here->BSIM4v2nf; + here->BSIM4v2gmbs *= here->BSIM4v2nf; + here->BSIM4v2IdovVds *= here->BSIM4v2nf; + + here->BSIM4v2gbbs *= here->BSIM4v2nf; + here->BSIM4v2gbgs *= here->BSIM4v2nf; + here->BSIM4v2gbds *= here->BSIM4v2nf; + here->BSIM4v2csub *= here->BSIM4v2nf; + + here->BSIM4v2Igidl *= here->BSIM4v2nf; + here->BSIM4v2ggidld *= here->BSIM4v2nf; + here->BSIM4v2ggidlg *= here->BSIM4v2nf; + here->BSIM4v2ggidlb *= here->BSIM4v2nf; + + here->BSIM4v2Igisl *= here->BSIM4v2nf; + here->BSIM4v2ggisls *= here->BSIM4v2nf; + here->BSIM4v2ggislg *= here->BSIM4v2nf; + here->BSIM4v2ggislb *= here->BSIM4v2nf; + + here->BSIM4v2Igcs *= here->BSIM4v2nf; + here->BSIM4v2gIgcsg *= here->BSIM4v2nf; + here->BSIM4v2gIgcsd *= here->BSIM4v2nf; + here->BSIM4v2gIgcsb *= here->BSIM4v2nf; + here->BSIM4v2Igcd *= here->BSIM4v2nf; + here->BSIM4v2gIgcdg *= here->BSIM4v2nf; + here->BSIM4v2gIgcdd *= here->BSIM4v2nf; + here->BSIM4v2gIgcdb *= here->BSIM4v2nf; + + here->BSIM4v2Igs *= here->BSIM4v2nf; + here->BSIM4v2gIgsg *= here->BSIM4v2nf; + here->BSIM4v2gIgss *= here->BSIM4v2nf; + here->BSIM4v2Igd *= here->BSIM4v2nf; + here->BSIM4v2gIgdg *= here->BSIM4v2nf; + here->BSIM4v2gIgdd *= here->BSIM4v2nf; + + here->BSIM4v2Igb *= here->BSIM4v2nf; + here->BSIM4v2gIgbg *= here->BSIM4v2nf; + here->BSIM4v2gIgbd *= here->BSIM4v2nf; + here->BSIM4v2gIgbb *= here->BSIM4v2nf; + } + + here->BSIM4v2ggidls = -(here->BSIM4v2ggidld + here->BSIM4v2ggidlg + + here->BSIM4v2ggidlb); + here->BSIM4v2ggisld = -(here->BSIM4v2ggisls + here->BSIM4v2ggislg + + here->BSIM4v2ggislb); + here->BSIM4v2gIgbs = -(here->BSIM4v2gIgbg + here->BSIM4v2gIgbd + + here->BSIM4v2gIgbb); + here->BSIM4v2gIgcss = -(here->BSIM4v2gIgcsg + here->BSIM4v2gIgcsd + + here->BSIM4v2gIgcsb); + here->BSIM4v2gIgcds = -(here->BSIM4v2gIgcdg + here->BSIM4v2gIgcdd + + here->BSIM4v2gIgcdb); + here->BSIM4v2cd = cdrain; + + + if (model->BSIM4v2tnoiMod == 0) + { Abulk = Abulk0 * pParam->BSIM4v2abulkCVfactor; + Vdsat = Vgsteff / Abulk; + T0 = Vdsat - Vds - DELTA_4; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * Vdsat); + if (T0 >= 0.0) + Vdseff = Vdsat - 0.5 * (T0 + T1); + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = Vdsat * T3 / (T1 - T0); + Vdseff = Vdsat * T4; + } + if (Vds == 0.0) + Vdseff = 0.0; + + T0 = Abulk * Vdseff; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.0e-20); + T2 = Vdseff / T1; + T3 = T0 * T2; + here->BSIM4v2qinv = Coxeff * pParam->BSIM4v2weffCV * here->BSIM4v2nf + * pParam->BSIM4v2leffCV + * (Vgsteff - 0.5 * T0 + Abulk * T3); + } + + /* + * BSIM4v2 C-V begins + */ + + if ((model->BSIM4v2xpart < 0) || (!ChargeComputationNeeded)) + { qgate = qdrn = qsrc = qbulk = 0.0; + here->BSIM4v2cggb = here->BSIM4v2cgsb = here->BSIM4v2cgdb = 0.0; + here->BSIM4v2cdgb = here->BSIM4v2cdsb = here->BSIM4v2cddb = 0.0; + here->BSIM4v2cbgb = here->BSIM4v2cbsb = here->BSIM4v2cbdb = 0.0; + here->BSIM4v2csgb = here->BSIM4v2cssb = here->BSIM4v2csdb = 0.0; + here->BSIM4v2cgbb = here->BSIM4v2csbb = here->BSIM4v2cdbb = here->BSIM4v2cbbb = 0.0; + here->BSIM4v2cqdb = here->BSIM4v2cqsb = here->BSIM4v2cqgb + = here->BSIM4v2cqbb = 0.0; + here->BSIM4v2gtau = 0.0; + goto finished; + } + else if (model->BSIM4v2capMod == 0) + { + if (Vbseff < 0.0) + { Vbseff = Vbs; + dVbseff_dVb = 1.0; + } + else + { Vbseff = pParam->BSIM4v2phi - Phis; + dVbseff_dVb = -dPhis_dVb; + } + + Vfb = pParam->BSIM4v2vfbcv; + Vth = Vfb + pParam->BSIM4v2phi + pParam->BSIM4v2k1ox * sqrtPhis; + Vgst = Vgs_eff - Vth; + dVth_dVb = pParam->BSIM4v2k1ox * dsqrtPhis_dVb; + dVgst_dVb = -dVth_dVb; + dVgst_dVg = dVgs_eff_dVg; + + CoxWL = model->BSIM4v2coxe * pParam->BSIM4v2weffCV + * pParam->BSIM4v2leffCV * here->BSIM4v2nf; + Arg1 = Vgs_eff - Vbseff - Vfb; + + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + qbulk = -qgate; + qdrn = 0.0; + + here->BSIM4v2cggb = CoxWL * dVgs_eff_dVg; + here->BSIM4v2cgdb = 0.0; + here->BSIM4v2cgsb = CoxWL * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM4v2cdgb = 0.0; + here->BSIM4v2cddb = 0.0; + here->BSIM4v2cdsb = 0.0; + + here->BSIM4v2cbgb = -CoxWL * dVgs_eff_dVg; + here->BSIM4v2cbdb = 0.0; + here->BSIM4v2cbsb = -here->BSIM4v2cgsb; + } /* Arg1 <= 0.0, end of accumulation */ + else if (Vgst <= 0.0) + { T1 = 0.5 * pParam->BSIM4v2k1ox; + T2 = sqrt(T1 * T1 + Arg1); + qgate = CoxWL * pParam->BSIM4v2k1ox * (T2 - T1); + qbulk = -qgate; + qdrn = 0.0; + + T0 = CoxWL * T1 / T2; + here->BSIM4v2cggb = T0 * dVgs_eff_dVg; + here->BSIM4v2cgdb = 0.0; + here->BSIM4v2cgsb = T0 * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM4v2cdgb = 0.0; + here->BSIM4v2cddb = 0.0; + here->BSIM4v2cdsb = 0.0; + + here->BSIM4v2cbgb = -here->BSIM4v2cggb; + here->BSIM4v2cbdb = 0.0; + here->BSIM4v2cbsb = -here->BSIM4v2cgsb; + } /* Vgst <= 0.0, end of depletion */ + else + { One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + + AbulkCV = Abulk0 * pParam->BSIM4v2abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v2abulkCVfactor * dAbulk0_dVb; + Vdsat = Vgst / AbulkCV; + dVdsat_dVg = dVgs_eff_dVg / AbulkCV; + dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; + + if (model->BSIM4v2xpart > 0.5) + { /* 0/100 Charge partition model */ + if (Vdsat <= Vds) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v2phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.0; + + here->BSIM4v2cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v2cgsb = -(here->BSIM4v2cggb + T2); + here->BSIM4v2cgdb = 0.0; + + here->BSIM4v2cdgb = 0.0; + here->BSIM4v2cddb = 0.0; + here->BSIM4v2cdsb = 0.0; + + here->BSIM4v2cbgb = -(here->BSIM4v2cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v2cbsb = -(here->BSIM4v2cbgb + T3); + here->BSIM4v2cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + T7 = 2.0 * Vds - T1 - 3.0 * T3; + T8 = T3 - T1 - 2.0 * Vds; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v2phi - 0.5 * (Vds - T3)); + T10 = T4 * T8; + qdrn = T4 * T7; + qbulk = -(qgate + qdrn + T10); + + T5 = T3 / T1; + here->BSIM4v2cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v2cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v2cgsb = -(here->BSIM4v2cggb + T11 + + here->BSIM4v2cgdb); + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + T7 = T9 * T7; + T8 = T9 * T8; + T9 = 2.0 * T4 * (1.0 - 3.0 * T5); + here->BSIM4v2cdgb = (T7 * dAlphaz_dVg - T9 + * dVdsat_dVg) * dVgs_eff_dVg; + T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb; + here->BSIM4v2cddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5); + here->BSIM4v2cdsb = -(here->BSIM4v2cdgb + T12 + + here->BSIM4v2cddb); + + T9 = 2.0 * T4 * (1.0 + T5); + T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb; + T12 = T4 * (2.0 * T2 + T5 - 1.0); + T0 = -(T10 + T11 + T12); + + here->BSIM4v2cbgb = -(here->BSIM4v2cggb + + here->BSIM4v2cdgb + T10); + here->BSIM4v2cbdb = -(here->BSIM4v2cgdb + + here->BSIM4v2cddb + T12); + here->BSIM4v2cbsb = -(here->BSIM4v2cgsb + + here->BSIM4v2cdsb + T0); + } + } + else if (model->BSIM4v2xpart < 0.5) + { /* 40/60 Charge partition model */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v2phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.4 * T2; + + here->BSIM4v2cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v2cgsb = -(here->BSIM4v2cggb + T2); + here->BSIM4v2cgdb = 0.0; + + T3 = 0.4 * Two_Third_CoxWL; + here->BSIM4v2cdgb = -T3 * dVgs_eff_dVg; + here->BSIM4v2cddb = 0.0; + T4 = T3 * dVth_dVb; + here->BSIM4v2cdsb = -(T4 + here->BSIM4v2cdgb); + + here->BSIM4v2cbgb = -(here->BSIM4v2cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v2cbsb = -(here->BSIM4v2cbgb + T3); + here->BSIM4v2cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM4v2phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM4v2cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v2cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v2cgsb = -(here->BSIM4v2cggb + + here->BSIM4v2cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds + + 1.2 * Vds * Vds; + T8 = T2 / T1; + T7 = Vds - T1 - T8 * T6; + qdrn = T4 * T7; + T7 *= T9; + tmp = T8 / T1; + tmp1 = T4 * (2.0 - 4.0 * tmp * T6 + + T8 * (16.0 * Vdsat - 6.0 * Vds)); + + here->BSIM4v2cdgb = (T7 * dAlphaz_dVg - tmp1 + * dVdsat_dVg) * dVgs_eff_dVg; + T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb; + here->BSIM4v2cddb = T4 * (2.0 - (1.0 / (3.0 * T1 + * T1) + 2.0 * tmp) * T6 + T8 + * (6.0 * Vdsat - 2.4 * Vds)); + here->BSIM4v2cdsb = -(here->BSIM4v2cdgb + + T10 + here->BSIM4v2cddb); + + T7 = 2.0 * (T1 + T3); + qbulk = -(qgate - T4 * T7); + T7 *= T9; + T0 = 4.0 * T4 * (1.0 - T5); + T12 = (-T7 * dAlphaz_dVg - here->BSIM4v2cdgb + - T0 * dVdsat_dVg) * dVgs_eff_dVg; + T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; + T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) + - here->BSIM4v2cddb; + tmp = -(T10 + T11 + T12); + + here->BSIM4v2cbgb = -(here->BSIM4v2cggb + + here->BSIM4v2cdgb + T12); + here->BSIM4v2cbdb = -(here->BSIM4v2cgdb + + here->BSIM4v2cddb + T10); /* bug fix */ + here->BSIM4v2cbsb = -(here->BSIM4v2cgsb + + here->BSIM4v2cdsb + tmp); + } + } + else + { /* 50/50 partitioning */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v2phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.5 * T2; + + here->BSIM4v2cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v2cgsb = -(here->BSIM4v2cggb + T2); + here->BSIM4v2cgdb = 0.0; + + here->BSIM4v2cdgb = -One_Third_CoxWL * dVgs_eff_dVg; + here->BSIM4v2cddb = 0.0; + T4 = One_Third_CoxWL * dVth_dVb; + here->BSIM4v2cdsb = -(T4 + here->BSIM4v2cdgb); + + here->BSIM4v2cbgb = -(here->BSIM4v2cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v2cbsb = -(here->BSIM4v2cbgb + T3); + here->BSIM4v2cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM4v2phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM4v2cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v2cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v2cgsb = -(here->BSIM4v2cggb + + here->BSIM4v2cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T7 = T1 + T3; + qdrn = -T4 * T7; + qbulk = - (qgate + qdrn + qdrn); + T7 *= T9; + T0 = T4 * (2.0 * T5 - 2.0); + + here->BSIM4v2cdgb = (T0 * dVdsat_dVg - T7 + * dAlphaz_dVg) * dVgs_eff_dVg; + T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; + here->BSIM4v2cddb = T4 * (1.0 - 2.0 * T2 - T5); + here->BSIM4v2cdsb = -(here->BSIM4v2cdgb + T12 + + here->BSIM4v2cddb); + + here->BSIM4v2cbgb = -(here->BSIM4v2cggb + + 2.0 * here->BSIM4v2cdgb); + here->BSIM4v2cbdb = -(here->BSIM4v2cgdb + + 2.0 * here->BSIM4v2cddb); + here->BSIM4v2cbsb = -(here->BSIM4v2cgsb + + 2.0 * here->BSIM4v2cdsb); + } /* end of linear region */ + } /* end of 50/50 partition */ + } /* end of inversion */ + } /* end of capMod=0 */ + else + { if (Vbseff < 0.0) + { VbseffCV = Vbseff; + dVbseffCV_dVb = 1.0; + } + else + { VbseffCV = pParam->BSIM4v2phi - Phis; + dVbseffCV_dVb = -dPhis_dVb; + } + + CoxWL = model->BSIM4v2coxe * pParam->BSIM4v2weffCV + * pParam->BSIM4v2leffCV * here->BSIM4v2nf; + + /* Seperate VgsteffCV with noff and voffcv */ + noff = n * pParam->BSIM4v2noff; + dnoff_dVd = pParam->BSIM4v2noff * dn_dVd; + dnoff_dVb = pParam->BSIM4v2noff * dn_dVb; + T0 = Vtm * noff; + voffcv = pParam->BSIM4v2voffcv; + VgstNVt = (Vgst - voffcv) / T0; + + if (VgstNVt > EXP_THRESHOLD) + { Vgsteff = Vgst - voffcv; + dVgsteff_dVg = dVgs_eff_dVg; + dVgsteff_dVd = -dVth_dVd; + dVgsteff_dVb = -dVth_dVb; + } + else if (VgstNVt < -EXP_THRESHOLD) + { Vgsteff = T0 * log(1.0 + MIN_EXP); + dVgsteff_dVg = 0.0; + dVgsteff_dVd = Vgsteff / noff; + dVgsteff_dVb = dVgsteff_dVd * dnoff_dVb; + dVgsteff_dVd *= dnoff_dVd; + } + else + { ExpVgst = exp(VgstNVt); + Vgsteff = T0 * log(1.0 + ExpVgst); + dVgsteff_dVg = ExpVgst / (1.0 + ExpVgst); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + (Vgst - voffcv) + / noff * dnoff_dVd) + Vgsteff / noff * dnoff_dVd; + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + (Vgst - voffcv) + / noff * dnoff_dVb) + Vgsteff / noff * dnoff_dVb; + dVgsteff_dVg *= dVgs_eff_dVg; + } /* End of VgsteffCV */ + + + if (model->BSIM4v2capMod == 1) + { Vfb = pParam->BSIM4v2vfbzb; + V3 = Vfb - Vgs_eff + VbseffCV - DELTA_3; + if (Vfb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + Qac0 = CoxWL * (Vfbeff - Vfb); + dQac0_dVg = CoxWL * dVfbeff_dVg; + dQac0_dVb = CoxWL * dVfbeff_dVb; + + T0 = 0.5 * pParam->BSIM4v2k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM4v2k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM4v2k1ox; + T2 = CoxWL; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWL * T0 / T1; + } + + Qsub0 = CoxWL * pParam->BSIM4v2k1ox * (T1 - T0); + + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg); + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + + dVgsteff_dVb); + + AbulkCV = Abulk0 * pParam->BSIM4v2abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v2abulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + + T0 = VdsatCV - Vds - DELTA_4; + dT0_dVg = 1.0 / AbulkCV; + dT0_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * VdsatCV); + dT1_dVg = (T0 + DELTA_4 + DELTA_4) / T1; + dT1_dVd = -T0 / T1; + dT1_dVb = dT1_dVg * dT0_dVb; + dT1_dVg *= dT0_dVg; + if (T0 >= 0.0) + { VdseffCV = VdsatCV - 0.5 * (T0 + T1); + dVdseffCV_dVg = 0.5 * (dT0_dVg - dT1_dVg); + dVdseffCV_dVd = 0.5 * (1.0 - dT1_dVd); + dVdseffCV_dVb = 0.5 * (dT0_dVb - dT1_dVb); + } + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = VdsatCV * T3 / (T1 - T0); + VdseffCV = VdsatCV * T4; + dVdseffCV_dVg = dT0_dVg * T4 + T5 * (dT1_dVg - dT0_dVg); + dVdseffCV_dVd = T5 * (dT1_dVd + 1.0); + dVdseffCV_dVb = dT0_dVb * (1.0 - T5) + T5 * dT1_dVb; + } + + if (Vds == 0.0) + { VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + + T0 = AbulkCV * VdseffCV; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.0e-20); + T2 = VdseffCV / T1; + T3 = T0 * T2; + + T4 = (1.0 - 12.0 * T2 * T2 * AbulkCV); + T5 = (6.0 * T0 * (4.0 * Vgsteff - T0) / (T1 * T1) - 0.5); + T6 = 12.0 * T2 * T2 * Vgsteff; + + qgate = CoxWL * (Vgsteff - 0.5 * VdseffCV + T3); + Cgg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cgd1 = CoxWL * T5 * dVdseffCV_dVd + Cgg1 * dVgsteff_dVd; + Cgb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb; + Cgg1 *= dVgsteff_dVg; + + T7 = 1.0 - AbulkCV; + qbulk = CoxWL * T7 * (0.5 * VdseffCV - T3); + T4 = -T7 * (T4 - 1.0); + T5 = -T7 * T5; + T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); + Cbg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cbd1 = CoxWL * T5 * dVdseffCV_dVd + Cbg1 * dVgsteff_dVd; + Cbb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbg1 *= dVgsteff_dVg; + + if (model->BSIM4v2xpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + T7 = (4.0 * Vgsteff - T0) / (T1 * T1); + T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); + T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); + T6 = -(0.25 * VdseffCV - 12.0 * T0 * VdseffCV * T7); + Csg = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWL * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM4v2xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + T5 = (qsrc / T1 + T2 * T7) * AbulkCV; + T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); + Csg = (T4 + T5 * dVdseffCV_dVg); + Csd = T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + + qgate += Qac0 + Qsub0; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; + Cgd = dQsub0_dVd + Cgd1; + Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM4v2cggb = Cgg; + here->BSIM4v2cgsb = -(Cgg + Cgd + Cgb); + here->BSIM4v2cgdb = Cgd; + here->BSIM4v2cdgb = -(Cgg + Cbg + Csg); + here->BSIM4v2cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM4v2cddb = -(Cgd + Cbd + Csd); + here->BSIM4v2cbgb = Cbg; + here->BSIM4v2cbsb = -(Cbg + Cbd + Cbb); + here->BSIM4v2cbdb = Cbd; + } + + /* Charge-Thickness capMod (CTM) begins */ + else if (model->BSIM4v2capMod == 2) + { V3 = pParam->BSIM4v2vfbzb - Vgs_eff + VbseffCV - DELTA_3; + if (pParam->BSIM4v2vfbzb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * pParam->BSIM4v2vfbzb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * pParam->BSIM4v2vfbzb); + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = pParam->BSIM4v2vfbzb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + + Cox = model->BSIM4v2coxp; + Tox = 1.0e8 * model->BSIM4v2toxp; + T0 = (Vgs_eff - VbseffCV - pParam->BSIM4v2vfbzb) / Tox; + dT0_dVg = dVgs_eff_dVg / Tox; + dT0_dVb = -dVbseffCV_dVb / Tox; + + tmp = T0 * pParam->BSIM4v2acde; + if ((-EXP_THRESHOLD < tmp) && (tmp < EXP_THRESHOLD)) + { Tcen = pParam->BSIM4v2ldeb * exp(tmp); + dTcen_dVg = pParam->BSIM4v2acde * Tcen; + dTcen_dVb = dTcen_dVg * dT0_dVb; + dTcen_dVg *= dT0_dVg; + } + else if (tmp <= -EXP_THRESHOLD) + { Tcen = pParam->BSIM4v2ldeb * MIN_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + else + { Tcen = pParam->BSIM4v2ldeb * MAX_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + + LINK = 1.0e-3 * model->BSIM4v2toxp; + V3 = pParam->BSIM4v2ldeb - Tcen - LINK; + V4 = sqrt(V3 * V3 + 4.0 * LINK * pParam->BSIM4v2ldeb); + Tcen = pParam->BSIM4v2ldeb - 0.5 * (V3 + V4); + T1 = 0.5 * (1.0 + V3 / V4); + dTcen_dVg *= T1; + dTcen_dVb *= T1; + + Ccen = EPSSI / Tcen; + T2 = Cox / (Cox + Ccen); + Coxeff = T2 * Ccen; + T3 = -Ccen / Tcen; + dCoxeff_dVg = T2 * T2 * T3; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / model->BSIM4v2coxe; + + Qac0 = CoxWLcen * (Vfbeff - pParam->BSIM4v2vfbzb); + QovCox = Qac0 / Coxeff; + dQac0_dVg = CoxWLcen * dVfbeff_dVg + + QovCox * dCoxeff_dVg; + dQac0_dVb = CoxWLcen * dVfbeff_dVb + + QovCox * dCoxeff_dVb; + + T0 = 0.5 * pParam->BSIM4v2k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM4v2k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM4v2k1ox; + T2 = CoxWLcen; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWLcen * T0 / T1; + } + + Qsub0 = CoxWLcen * pParam->BSIM4v2k1ox * (T1 - T0); + QovCox = Qsub0 / Coxeff; + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg) + + QovCox * dCoxeff_dVg; + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + dVgsteff_dVb) + + QovCox * dCoxeff_dVb; + + /* Gate-bias dependent delta Phis begins */ + if (pParam->BSIM4v2k1ox <= 0.0) + { Denomi = 0.25 * pParam->BSIM4v2moin * Vtm; + T0 = 0.5 * pParam->BSIM4v2sqrtPhi; + } + else + { Denomi = pParam->BSIM4v2moin * Vtm + * pParam->BSIM4v2k1ox * pParam->BSIM4v2k1ox; + T0 = pParam->BSIM4v2k1ox * pParam->BSIM4v2sqrtPhi; + } + T1 = 2.0 * T0 + Vgsteff; + + DeltaPhi = Vtm * log(1.0 + T1 * Vgsteff / Denomi); + dDeltaPhi_dVg = 2.0 * Vtm * (T1 -T0) / (Denomi + T1 * Vgsteff); + /* End of delta Phis */ + + Tox += Tox; /* WDLiu: Tcen reevaluated below due to different Vgsteff */ + T0 = (Vgsteff + pParam->BSIM4v2vtfbphi2) / Tox; + tmp = exp(0.7 * log(T0)); + T1 = 1.0 + tmp; + T2 = 0.7 * tmp / (T0 * Tox); + Tcen = 1.9e-9 / T1; + dTcen_dVg = -Tcen * T2 / T1; + dTcen_dVd = dTcen_dVg * dVgsteff_dVd; + dTcen_dVb = dTcen_dVg * dVgsteff_dVb; + dTcen_dVg *= dVgsteff_dVg; + + Ccen = EPSSI / Tcen; + T0 = Cox / (Cox + Ccen); + Coxeff = T0 * Ccen; + T1 = -Ccen / Tcen; + dCoxeff_dVg = T0 * T0 * T1; + dCoxeff_dVd = dCoxeff_dVg * dTcen_dVd; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / model->BSIM4v2coxe; + + AbulkCV = Abulk0 * pParam->BSIM4v2abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v2abulkCVfactor * dAbulk0_dVb; + VdsatCV = (Vgsteff - DeltaPhi) / AbulkCV; + + T0 = VdsatCV - Vds - DELTA_4; + dT0_dVg = (1.0 - dDeltaPhi_dVg) / AbulkCV; + dT0_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * VdsatCV); + dT1_dVg = (T0 + DELTA_4 + DELTA_4) / T1; + dT1_dVd = -T0 / T1; + dT1_dVb = dT1_dVg * dT0_dVb; + dT1_dVg *= dT0_dVg; + if (T0 >= 0.0) + { VdseffCV = VdsatCV - 0.5 * (T0 + T1); + dVdseffCV_dVg = 0.5 * (dT0_dVg - dT1_dVg); + dVdseffCV_dVd = 0.5 * (1.0 - dT1_dVd); + dVdseffCV_dVb = 0.5 * (dT0_dVb - dT1_dVb); + } + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = VdsatCV * T3 / (T1 - T0); + VdseffCV = VdsatCV * T4; + dVdseffCV_dVg = dT0_dVg * T4 + T5 * (dT1_dVg - dT0_dVg); + dVdseffCV_dVd = T5 * (dT1_dVd + 1.0); + dVdseffCV_dVb = dT0_dVb * (1.0 - T5) + T5 * dT1_dVb; + } + + if (Vds == 0.0) + { VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + + T0 = AbulkCV * VdseffCV; + T1 = Vgsteff - DeltaPhi; + T2 = 12.0 * (T1 - 0.5 * T0 + 1.0e-20); + T3 = T0 / T2; + T4 = 1.0 - 12.0 * T3 * T3; + T5 = AbulkCV * (6.0 * T0 * (4.0 * T1 - T0) / (T2 * T2) - 0.5); + T6 = T5 * VdseffCV / AbulkCV; + + qgate = CoxWLcen * (T1 - T0 * (0.5 - T3)); + QovCox = qgate / Coxeff; + Cgg1 = CoxWLcen * (T4 * (1.0 - dDeltaPhi_dVg) + + T5 * dVdseffCV_dVg); + Cgd1 = CoxWLcen * T5 * dVdseffCV_dVd + Cgg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cgb1 = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cgg1 = Cgg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + + T7 = 1.0 - AbulkCV; + T8 = T2 * T2; + T9 = 12.0 * T7 * T0 * T0 / (T8 * AbulkCV); + T10 = T9 * (1.0 - dDeltaPhi_dVg); + T11 = -T7 * T5 / AbulkCV; + T12 = -(T9 * T1 / AbulkCV + VdseffCV * (0.5 - T0 / T2)); + + qbulk = CoxWLcen * T7 * (0.5 * VdseffCV - T0 * VdseffCV / T2); + QovCox = qbulk / Coxeff; + Cbg1 = CoxWLcen * (T10 + T11 * dVdseffCV_dVg); + Cbd1 = CoxWLcen * T11 * dVdseffCV_dVd + Cbg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cbb1 = CoxWLcen * (T11 * dVdseffCV_dVb + T12 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cbg1 = Cbg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + if (model->BSIM4v2xpart > 0.5) + { /* 0/100 partition */ + qsrc = -CoxWLcen * (T1 / 2.0 + T0 / 4.0 + - 0.5 * T0 * T0 / T2); + QovCox = qsrc / Coxeff; + T2 += T2; + T3 = T2 * T2; + T7 = -(0.25 - 12.0 * T0 * (4.0 * T1 - T0) / T3); + T4 = -(0.5 + 24.0 * T0 * T0 / T3) * (1.0 - dDeltaPhi_dVg); + T5 = T7 * AbulkCV; + T6 = T7 * VdseffCV; + + Csg = CoxWLcen * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWLcen * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd + + QovCox * dCoxeff_dVd; + Csb = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else if (model->BSIM4v2xpart < 0.5) + { /* 40/60 partition */ + T2 = T2 / 12.0; + T3 = 0.5 * CoxWLcen / (T2 * T2); + T4 = T1 * (2.0 * T0 * T0 / 3.0 + T1 * (T1 - 4.0 + * T0 / 3.0)) - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T3 * T4; + QovCox = qsrc / Coxeff; + T8 = 4.0 / 3.0 * T1 * (T1 - T0) + 0.4 * T0 * T0; + T5 = -2.0 * qsrc / T2 - T3 * (T1 * (3.0 * T1 - 8.0 + * T0 / 3.0) + 2.0 * T0 * T0 / 3.0); + T6 = AbulkCV * (qsrc / T2 + T3 * T8); + T7 = T6 * VdseffCV / AbulkCV; + + Csg = T5 * (1.0 - dDeltaPhi_dVg) + T6 * dVdseffCV_dVg; + Csd = Csg * dVgsteff_dVd + T6 * dVdseffCV_dVd + + QovCox * dCoxeff_dVd; + Csb = Csg * dVgsteff_dVb + T6 * dVdseffCV_dVb + + T7 * dAbulkCV_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else + { /* 50/50 partition */ + qsrc = -0.5 * qgate; + Csg = -0.5 * Cgg1; + Csd = -0.5 * Cgd1; + Csb = -0.5 * Cgb1; + } + + qgate += Qac0 + Qsub0 - qbulk; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgg = Cgg1 - Cbg; + Cgd = Cgd1 - Cbd; + Cgb = Cgb1 - Cbb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM4v2cggb = Cgg; + here->BSIM4v2cgsb = -(Cgg + Cgd + Cgb); + here->BSIM4v2cgdb = Cgd; + here->BSIM4v2cdgb = -(Cgg + Cbg + Csg); + here->BSIM4v2cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM4v2cddb = -(Cgd + Cbd + Csd); + here->BSIM4v2cbgb = Cbg; + here->BSIM4v2cbsb = -(Cbg + Cbd + Cbb); + here->BSIM4v2cbdb = Cbd; + } /* End of CTM */ + } + + here->BSIM4v2csgb = - here->BSIM4v2cggb - here->BSIM4v2cdgb - here->BSIM4v2cbgb; + here->BSIM4v2csdb = - here->BSIM4v2cgdb - here->BSIM4v2cddb - here->BSIM4v2cbdb; + here->BSIM4v2cssb = - here->BSIM4v2cgsb - here->BSIM4v2cdsb - here->BSIM4v2cbsb; + here->BSIM4v2cgbb = - here->BSIM4v2cgdb - here->BSIM4v2cggb - here->BSIM4v2cgsb; + here->BSIM4v2cdbb = - here->BSIM4v2cddb - here->BSIM4v2cdgb - here->BSIM4v2cdsb; + here->BSIM4v2cbbb = - here->BSIM4v2cbgb - here->BSIM4v2cbdb - here->BSIM4v2cbsb; + here->BSIM4v2csbb = - here->BSIM4v2cgbb - here->BSIM4v2cdbb - here->BSIM4v2cbbb; + here->BSIM4v2qgate = qgate; + here->BSIM4v2qbulk = qbulk; + here->BSIM4v2qdrn = qdrn; + here->BSIM4v2qsrc = -(qgate + qbulk + qdrn); + + /* NQS begins */ + if ((here->BSIM4v2trnqsMod) || (here->BSIM4v2acnqsMod)) + { here->BSIM4v2qchqs = qcheq = -(qbulk + qgate); + here->BSIM4v2cqgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb); + here->BSIM4v2cqdb = -(here->BSIM4v2cgdb + here->BSIM4v2cbdb); + here->BSIM4v2cqsb = -(here->BSIM4v2cgsb + here->BSIM4v2cbsb); + here->BSIM4v2cqbb = -(here->BSIM4v2cqgb + here->BSIM4v2cqdb + + here->BSIM4v2cqsb); + + CoxWL = model->BSIM4v2coxe * pParam->BSIM4v2weffCV * here->BSIM4v2nf + * pParam->BSIM4v2leffCV; + T1 = here->BSIM4v2gcrg / CoxWL; /* 1 / tau */ + here->BSIM4v2gtau = T1 * ScalingFactor; + + if (here->BSIM4v2acnqsMod) + here->BSIM4v2taunet = 1.0 / T1; + + *(ckt->CKTstate0 + here->BSIM4v2qcheq) = qcheq; + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM4v2qcheq) = + *(ckt->CKTstate0 + here->BSIM4v2qcheq); + if (here->BSIM4v2trnqsMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qcheq); + if (error) + return(error); + } + } + + +finished: + + /* Calculate junction C-V */ + if (ChargeComputationNeeded) + { czbd = model->BSIM4v2DunitAreaTempJctCap * here->BSIM4v2Adeff; /* bug fix */ + czbs = model->BSIM4v2SunitAreaTempJctCap * here->BSIM4v2Aseff; + czbdsw = model->BSIM4v2DunitLengthSidewallTempJctCap * here->BSIM4v2Pdeff; + czbdswg = model->BSIM4v2DunitLengthGateSidewallTempJctCap + * pParam->BSIM4v2weffCJ * here->BSIM4v2nf; + czbssw = model->BSIM4v2SunitLengthSidewallTempJctCap * here->BSIM4v2Pseff; + czbsswg = model->BSIM4v2SunitLengthGateSidewallTempJctCap + * pParam->BSIM4v2weffCJ * here->BSIM4v2nf; + + MJS = model->BSIM4v2SbulkJctBotGradingCoeff; + MJSWS = model->BSIM4v2SbulkJctSideGradingCoeff; + MJSWGS = model->BSIM4v2SbulkJctGateSideGradingCoeff; + + MJD = model->BSIM4v2DbulkJctBotGradingCoeff; + MJSWD = model->BSIM4v2DbulkJctSideGradingCoeff; + MJSWGD = model->BSIM4v2DbulkJctGateSideGradingCoeff; + + /* Source Bulk Junction */ + if (vbs_jct == 0.0) + { *(ckt->CKTstate0 + here->BSIM4v2qbs) = 0.0; + here->BSIM4v2capbs = czbs + czbssw + czbsswg; + } + else if (vbs_jct < 0.0) + { if (czbs > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v2PhiBS; + if (MJS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v2qbs) = model->BSIM4v2PhiBS * czbs + * (1.0 - arg * sarg) / (1.0 - MJS); + here->BSIM4v2capbs = czbs * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM4v2qbs) = 0.0; + here->BSIM4v2capbs = 0.0; + } + if (czbssw > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v2PhiBSWS; + if (MJSWS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v2qbs) += model->BSIM4v2PhiBSWS * czbssw + * (1.0 - arg * sarg) / (1.0 - MJSWS); + here->BSIM4v2capbs += czbssw * sarg; + } + if (czbsswg > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v2PhiBSWGS; + if (MJSWGS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWGS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v2qbs) += model->BSIM4v2PhiBSWGS * czbsswg + * (1.0 - arg * sarg) / (1.0 - MJSWGS); + here->BSIM4v2capbs += czbsswg * sarg; + } + + } + else + { T0 = czbs + czbssw + czbsswg; + T1 = vbs_jct * (czbs * MJS / model->BSIM4v2PhiBS + czbssw * MJSWS + / model->BSIM4v2PhiBSWS + czbsswg * MJSWGS / model->BSIM4v2PhiBSWGS); + *(ckt->CKTstate0 + here->BSIM4v2qbs) = vbs_jct * (T0 + 0.5 * T1); + here->BSIM4v2capbs = T0 + T1; + } + + /* Drain Bulk Junction */ + if (vbd_jct == 0.0) + { *(ckt->CKTstate0 + here->BSIM4v2qbd) = 0.0; + here->BSIM4v2capbd = czbd + czbdsw + czbdswg; + } + else if (vbd_jct < 0.0) + { if (czbd > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v2PhiBD; + if (MJD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v2qbd) = model->BSIM4v2PhiBD* czbd + * (1.0 - arg * sarg) / (1.0 - MJD); + here->BSIM4v2capbd = czbd * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM4v2qbd) = 0.0; + here->BSIM4v2capbd = 0.0; + } + if (czbdsw > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v2PhiBSWD; + if (MJSWD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v2qbd) += model->BSIM4v2PhiBSWD * czbdsw + * (1.0 - arg * sarg) / (1.0 - MJSWD); + here->BSIM4v2capbd += czbdsw * sarg; + } + if (czbdswg > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v2PhiBSWGD; + if (MJSWGD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWGD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v2qbd) += model->BSIM4v2PhiBSWGD * czbdswg + * (1.0 - arg * sarg) / (1.0 - MJSWGD); + here->BSIM4v2capbd += czbdswg * sarg; + } + } + else + { T0 = czbd + czbdsw + czbdswg; + T1 = vbd_jct * (czbd * MJD / model->BSIM4v2PhiBD + czbdsw * MJSWD + / model->BSIM4v2PhiBSWD + czbdswg * MJSWGD / model->BSIM4v2PhiBSWGD); + *(ckt->CKTstate0 + here->BSIM4v2qbd) = vbd_jct * (T0 + 0.5 * T1); + here->BSIM4v2capbd = T0 + T1; + } + } + + + /* + * check convergence + */ + + if ((here->BSIM4v2off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { if (Check == 1) + { ckt->CKTnoncon++; + } + } + *(ckt->CKTstate0 + here->BSIM4v2vds) = vds; + *(ckt->CKTstate0 + here->BSIM4v2vgs) = vgs; + *(ckt->CKTstate0 + here->BSIM4v2vbs) = vbs; + *(ckt->CKTstate0 + here->BSIM4v2vbd) = vbd; + *(ckt->CKTstate0 + here->BSIM4v2vges) = vges; + *(ckt->CKTstate0 + here->BSIM4v2vgms) = vgms; + *(ckt->CKTstate0 + here->BSIM4v2vdbs) = vdbs; + *(ckt->CKTstate0 + here->BSIM4v2vdbd) = vdbd; + *(ckt->CKTstate0 + here->BSIM4v2vsbs) = vsbs; + *(ckt->CKTstate0 + here->BSIM4v2vses) = vses; + *(ckt->CKTstate0 + here->BSIM4v2vdes) = vdes; + *(ckt->CKTstate0 + here->BSIM4v2qdef) = qdef; + + + if (!ChargeComputationNeeded) + goto line850; + + if (model->BSIM4v2capMod == 0) /* code merge -JX */ + { + cgdo = pParam->BSIM4v2cgdo; + qgdo = pParam->BSIM4v2cgdo * vgd; + cgso = pParam->BSIM4v2cgso; + qgso = pParam->BSIM4v2cgso * vgs; + } + else /* For both capMod == 1 and 2 */ + { T0 = vgd + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + + T3 = pParam->BSIM4v2weffCV * pParam->BSIM4v2cgdl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM4v2ckappad); + cgdo = pParam->BSIM4v2cgdo + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgdo = (pParam->BSIM4v2cgdo + T3) * vgd - T3 * (T2 + + 0.5 * pParam->BSIM4v2ckappad * (T4 - 1.0)); + + T0 = vgs + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + T3 = pParam->BSIM4v2weffCV * pParam->BSIM4v2cgsl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM4v2ckappas); + cgso = pParam->BSIM4v2cgso + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgso = (pParam->BSIM4v2cgso + T3) * vgs - T3 * (T2 + + 0.5 * pParam->BSIM4v2ckappas * (T4 - 1.0)); + } + + if (here->BSIM4v2nf != 1.0) + { cgdo *= here->BSIM4v2nf; + cgso *= here->BSIM4v2nf; + qgdo *= here->BSIM4v2nf; + qgso *= here->BSIM4v2nf; + } + here->BSIM4v2cgdo = cgdo; + here->BSIM4v2qgdo = qgdo; + here->BSIM4v2cgso = cgso; + here->BSIM4v2qgso = qgso; + + +line755: + ag0 = ckt->CKTag[0]; + if (here->BSIM4v2mode > 0) + { if (here->BSIM4v2trnqsMod == 0) + { qdrn -= qgdo; + if (here->BSIM4v2rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v2cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v2cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcggb = here->BSIM4v2cggb * ag0; + gcgdb = here->BSIM4v2cgdb * ag0; + gcgsb = here->BSIM4v2cgsb * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = here->BSIM4v2cdgb * ag0; + gcsgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb) * ag0; + gcbgb = here->BSIM4v2cbgb * ag0; + + qgmb = pParam->BSIM4v2cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qbulk -= qgmb; + qsrc = -(qgate + qgmid + qbulk + qdrn); + } + else + { gcggb = (here->BSIM4v2cggb + cgdo + cgso + + pParam->BSIM4v2cgbo ) * ag0; + gcgdb = (here->BSIM4v2cgdb - cgdo) * ag0; + gcgsb = (here->BSIM4v2cgsb - cgso) * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = (here->BSIM4v2cdgb - cgdo) * ag0; + gcsgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb + cgso) * ag0; + gcbgb = (here->BSIM4v2cbgb - pParam->BSIM4v2cgbo) * ag0; + + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v2cgbo * vgb; + qgate += qgdo + qgso + qgb; + qbulk -= qgb; + qsrc = -(qgate + qbulk + qdrn); + } + gcddb = (here->BSIM4v2cddb + here->BSIM4v2capbd + cgdo) * ag0; + gcdsb = here->BSIM4v2cdsb * ag0; + + gcsdb = -(here->BSIM4v2cgdb + here->BSIM4v2cbdb + + here->BSIM4v2cddb) * ag0; + gcssb = (here->BSIM4v2capbs + cgso - (here->BSIM4v2cgsb + + here->BSIM4v2cbsb + here->BSIM4v2cdsb)) * ag0; + + if (!here->BSIM4v2rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb); + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb); + gcbdb = (here->BSIM4v2cbdb - here->BSIM4v2capbd) * ag0; + gcbsb = (here->BSIM4v2cbsb - here->BSIM4v2capbs) * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = -(here->BSIM4v2cddb + here->BSIM4v2cdgb + + here->BSIM4v2cdsb) * ag0; + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb) + + here->BSIM4v2capbs * ag0; + gcbdb = here->BSIM4v2cbdb * ag0; + gcbsb = here->BSIM4v2cbsb * ag0; + + gcdbdb = -here->BSIM4v2capbd * ag0; + gcsbsb = -here->BSIM4v2capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { qcheq = here->BSIM4v2qchqs; + CoxWL = model->BSIM4v2coxe * pParam->BSIM4v2weffCV * here->BSIM4v2nf + * pParam->BSIM4v2leffCV; + T0 = qdef * ScalingFactor / CoxWL; + + ggtg = here->BSIM4v2gtg = T0 * here->BSIM4v2gcrgg; + ggtd = here->BSIM4v2gtd = T0 * here->BSIM4v2gcrgd; + ggts = here->BSIM4v2gts = T0 * here->BSIM4v2gcrgs; + ggtb = here->BSIM4v2gtb = T0 * here->BSIM4v2gcrgb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM4v2cqgb * ag0; + gcqdb = here->BSIM4v2cqdb * ag0; + gcqsb = here->BSIM4v2cqsb * ag0; + gcqbb = here->BSIM4v2cqbb * ag0; + + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v2xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM4v2xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = qdrn / qcheq; + Cdd = here->BSIM4v2cddb; + Csd = -(here->BSIM4v2cgdb + here->BSIM4v2cddb + + here->BSIM4v2cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM4v2cdgb; + Csg = -(here->BSIM4v2cggb + here->BSIM4v2cdgb + + here->BSIM4v2cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM4v2cdsb; + Css = -(here->BSIM4v2cgsb + here->BSIM4v2cdsb + + here->BSIM4v2cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + + if (here->BSIM4v2rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v2cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v2cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcdgb = gcsgb = gcbgb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + + qgmb = pParam->BSIM4v2cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qgate = 0.0; + qbulk = -qgmb; + qdrn = -qgdo; + qsrc = -(qgmid + qbulk + qdrn); + } + else + { gcggb = (cgdo + cgso + pParam->BSIM4v2cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + gcgbb = -pParam->BSIM4v2cgbo * ag0; + + gcdgb = gcgdb; + gcsgb = gcgsb; + gcbgb = gcgbb; + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v2cgbo * vgb; + qgate = qgdo + qgso + qgb; + qbulk = -qgb; + qdrn = -qgdo; + qsrc = -(qgate + qbulk + qdrn); + } + + gcddb = (here->BSIM4v2capbd + cgdo) * ag0; + gcdsb = gcsdb = 0.0; + gcssb = (here->BSIM4v2capbs + cgso) * ag0; + + if (!here->BSIM4v2rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdgmb); + gcsbb = -(gcsgb + gcssb + gcsgmb); + gcbdb = -here->BSIM4v2capbd * ag0; + gcbsb = -here->BSIM4v2capbs * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = gcsbb = gcbdb = gcbsb = 0.0; + gcdbdb = -here->BSIM4v2capbd * ag0; + gcsbsb = -here->BSIM4v2capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + } + } + else + { if (here->BSIM4v2trnqsMod == 0) + { qsrc = qdrn - qgso; + if (here->BSIM4v2rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v2cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v2cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcggb = here->BSIM4v2cggb * ag0; + gcgdb = here->BSIM4v2cgsb * ag0; + gcgsb = here->BSIM4v2cgdb * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb) * ag0; + gcsgb = here->BSIM4v2cdgb * ag0; + gcbgb = here->BSIM4v2cbgb * ag0; + + qgmb = pParam->BSIM4v2cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qbulk -= qgmb; + qdrn = -(qgate + qgmid + qbulk + qsrc); + } + else + { gcggb = (here->BSIM4v2cggb + cgdo + cgso + + pParam->BSIM4v2cgbo ) * ag0; + gcgdb = (here->BSIM4v2cgsb - cgdo) * ag0; + gcgsb = (here->BSIM4v2cgdb - cgso) * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb + cgdo) * ag0; + gcsgb = (here->BSIM4v2cdgb - cgso) * ag0; + gcbgb = (here->BSIM4v2cbgb - pParam->BSIM4v2cgbo) * ag0; + + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v2cgbo * vgb; + qgate += qgdo + qgso + qgb; + qbulk -= qgb; + qdrn = -(qgate + qbulk + qsrc); + } + gcddb = (here->BSIM4v2capbd + cgdo - (here->BSIM4v2cgsb + + here->BSIM4v2cbsb + here->BSIM4v2cdsb)) * ag0; + gcdsb = -(here->BSIM4v2cgdb + here->BSIM4v2cbdb + + here->BSIM4v2cddb) * ag0; + + gcsdb = here->BSIM4v2cdsb * ag0; + gcssb = (here->BSIM4v2cddb + here->BSIM4v2capbs + cgso) * ag0; + + if (!here->BSIM4v2rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb); + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb); + gcbdb = (here->BSIM4v2cbsb - here->BSIM4v2capbd) * ag0; + gcbsb = (here->BSIM4v2cbdb - here->BSIM4v2capbs) * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb) + + here->BSIM4v2capbd * ag0; + gcsbb = -(here->BSIM4v2cddb + here->BSIM4v2cdgb + + here->BSIM4v2cdsb) * ag0; + gcbdb = here->BSIM4v2cbsb * ag0; + gcbsb = here->BSIM4v2cbdb * ag0; + gcdbdb = -here->BSIM4v2capbd * ag0; + gcsbsb = -here->BSIM4v2capbs * ag0; + } + gcbbb = -(gcbgb + gcbdb + gcbsb + gcbgmb); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { qcheq = here->BSIM4v2qchqs; + CoxWL = model->BSIM4v2coxe * pParam->BSIM4v2weffCV * here->BSIM4v2nf + * pParam->BSIM4v2leffCV; + T0 = qdef * ScalingFactor / CoxWL; + ggtg = here->BSIM4v2gtg = T0 * here->BSIM4v2gcrgg; + ggts = here->BSIM4v2gtd = T0 * here->BSIM4v2gcrgs; + ggtd = here->BSIM4v2gts = T0 * here->BSIM4v2gcrgd; + ggtb = here->BSIM4v2gtb = T0 * here->BSIM4v2gcrgb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM4v2cqgb * ag0; + gcqdb = here->BSIM4v2cqsb * ag0; + gcqsb = here->BSIM4v2cqdb * ag0; + gcqbb = here->BSIM4v2cqbb * ag0; + + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v2xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM4v2xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = qdrn / qcheq; + Css = here->BSIM4v2cddb; + Cds = -(here->BSIM4v2cgdb + here->BSIM4v2cddb + + here->BSIM4v2cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM4v2cdgb; + Cdg = -(here->BSIM4v2cggb + here->BSIM4v2cdgb + + here->BSIM4v2cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM4v2cdsb; + Cdd = -(here->BSIM4v2cgsb + here->BSIM4v2cdsb + + here->BSIM4v2cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + + if (here->BSIM4v2rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v2cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v2cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcdgb = gcsgb = gcbgb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + + qgmb = pParam->BSIM4v2cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qgate = 0.0; + qbulk = -qgmb; + qdrn = -qgdo; + qsrc = -qgso; + } + else + { gcggb = (cgdo + cgso + pParam->BSIM4v2cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + gcgbb = -pParam->BSIM4v2cgbo * ag0; + + gcdgb = gcgdb; + gcsgb = gcgsb; + gcbgb = gcgbb; + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v2cgbo * vgb; + qgate = qgdo + qgso + qgb; + qbulk = -qgb; + qdrn = -qgdo; + qsrc = -qgso; + } + + gcddb = (here->BSIM4v2capbd + cgdo) * ag0; + gcdsb = gcsdb = 0.0; + gcssb = (here->BSIM4v2capbs + cgso) * ag0; + if (!here->BSIM4v2rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdgmb); + gcsbb = -(gcsgb + gcssb + gcsgmb); + gcbdb = -here->BSIM4v2capbd * ag0; + gcbsb = -here->BSIM4v2capbs * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = gcsbb = gcbdb = gcbsb = 0.0; + gcdbdb = -here->BSIM4v2capbd * ag0; + gcsbsb = -here->BSIM4v2capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + } + } + + + if (here->BSIM4v2trnqsMod) + { *(ckt->CKTstate0 + here->BSIM4v2qcdump) = qdef * ScalingFactor; + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM4v2qcdump) = + *(ckt->CKTstate0 + here->BSIM4v2qcdump); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qcdump); + if (error) + return(error); + } + + if (ByPass) goto line860; + + *(ckt->CKTstate0 + here->BSIM4v2qg) = qgate; + *(ckt->CKTstate0 + here->BSIM4v2qd) = qdrn + - *(ckt->CKTstate0 + here->BSIM4v2qbd); + *(ckt->CKTstate0 + here->BSIM4v2qs) = qsrc + - *(ckt->CKTstate0 + here->BSIM4v2qbs); + if (here->BSIM4v2rgateMod == 3) + *(ckt->CKTstate0 + here->BSIM4v2qgmid) = qgmid; + + if (!here->BSIM4v2rbodyMod) + { *(ckt->CKTstate0 + here->BSIM4v2qb) = qbulk + + *(ckt->CKTstate0 + here->BSIM4v2qbd) + + *(ckt->CKTstate0 + here->BSIM4v2qbs); + } + else + *(ckt->CKTstate0 + here->BSIM4v2qb) = qbulk; + + + /* Store small signal parameters */ + if (ckt->CKTmode & MODEINITSMSIG) + { goto line1000; + } + + if (!ChargeComputationNeeded) + goto line850; + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM4v2qb) = + *(ckt->CKTstate0 + here->BSIM4v2qb); + *(ckt->CKTstate1 + here->BSIM4v2qg) = + *(ckt->CKTstate0 + here->BSIM4v2qg); + *(ckt->CKTstate1 + here->BSIM4v2qd) = + *(ckt->CKTstate0 + here->BSIM4v2qd); + if (here->BSIM4v2rgateMod == 3) + *(ckt->CKTstate1 + here->BSIM4v2qgmid) = + *(ckt->CKTstate0 + here->BSIM4v2qgmid); + if (here->BSIM4v2rbodyMod) + { *(ckt->CKTstate1 + here->BSIM4v2qbs) = + *(ckt->CKTstate0 + here->BSIM4v2qbs); + *(ckt->CKTstate1 + here->BSIM4v2qbd) = + *(ckt->CKTstate0 + here->BSIM4v2qbd); + } + } + + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qb); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qg); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qd); + if (error) + return(error); + + if (here->BSIM4v2rgateMod == 3) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qgmid); + if (error) return(error); + } + + if (here->BSIM4v2rbodyMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qbs); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v2qbd); + if (error) + return(error); + } + + goto line860; + + +line850: + /* Zero gcap and ceqcap if (!ChargeComputationNeeded) */ + ceqqg = ceqqb = ceqqd = 0.0; + ceqqjd = ceqqjs = 0.0; + cqcheq = cqdef = 0.0; + + gcdgb = gcddb = gcdsb = gcdbb = 0.0; + gcsgb = gcsdb = gcssb = gcsbb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + gcbdb = gcbgb = gcbsb = gcbbb = 0.0; + + gcgmgmb = gcgmdb = gcgmsb = gcgmbb = 0.0; + gcdgmb = gcsgmb = gcbgmb = ceqqgmid = 0.0; + gcdbdb = gcsbsb = 0.0; + + gqdef = gcqgb = gcqdb = gcqsb = gcqbb = 0.0; + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = (1.0 - (dxpart = (here->BSIM4v2mode > 0) ? 0.4 : 0.6)); + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + + if (here->BSIM4v2trnqsMod) + { CoxWL = model->BSIM4v2coxe * pParam->BSIM4v2weffCV * here->BSIM4v2nf + * pParam->BSIM4v2leffCV; + T1 = here->BSIM4v2gcrg / CoxWL; + here->BSIM4v2gtau = T1 * ScalingFactor; + } + else + here->BSIM4v2gtau = 0.0; + + goto line900; + + +line860: + /* Calculate equivalent charge current */ + + cqgate = *(ckt->CKTstate0 + here->BSIM4v2cqg); + cqbody = *(ckt->CKTstate0 + here->BSIM4v2cqb); + cqdrn = *(ckt->CKTstate0 + here->BSIM4v2cqd); + + ceqqg = cqgate - gcggb * vgb + gcgdb * vbd + gcgsb * vbs; + ceqqd = cqdrn - gcdgb * vgb - gcdgmb * vgmb + (gcddb + gcdbdb) + * vbd - gcdbdb * vbd_jct + gcdsb * vbs; + ceqqb = cqbody - gcbgb * vgb - gcbgmb * vgmb + + gcbdb * vbd + gcbsb * vbs; + + + if (here->BSIM4v2rgateMod == 3) + ceqqgmid = *(ckt->CKTstate0 + here->BSIM4v2cqgmid) + + gcgmdb * vbd + gcgmsb * vbs - gcgmgmb * vgmb; + else + ceqqgmid = 0.0; + + if (here->BSIM4v2rbodyMod) + { ceqqjs = *(ckt->CKTstate0 + here->BSIM4v2cqbs) + gcsbsb * vbs_jct; + ceqqjd = *(ckt->CKTstate0 + here->BSIM4v2cqbd) + gcdbdb * vbd_jct; + } + + if (here->BSIM4v2trnqsMod) + { T0 = ggtg * vgb - ggtd * vbd - ggts * vbs; + ceqqg += T0; + T1 = qdef * here->BSIM4v2gtau; + ceqqd -= dxpart * T0 + T1 * (ddxpart_dVg * vgb - ddxpart_dVd + * vbd - ddxpart_dVs * vbs); + cqdef = *(ckt->CKTstate0 + here->BSIM4v2cqcdump) - gqdef * qdef; + cqcheq = *(ckt->CKTstate0 + here->BSIM4v2cqcheq) + - (gcqgb * vgb - gcqdb * vbd - gcqsb * vbs) + T0; + } + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM4v2cqb) = + *(ckt->CKTstate0 + here->BSIM4v2cqb); + *(ckt->CKTstate1 + here->BSIM4v2cqg) = + *(ckt->CKTstate0 + here->BSIM4v2cqg); + *(ckt->CKTstate1 + here->BSIM4v2cqd) = + *(ckt->CKTstate0 + here->BSIM4v2cqd); + + if (here->BSIM4v2rgateMod == 3) + *(ckt->CKTstate1 + here->BSIM4v2cqgmid) = + *(ckt->CKTstate0 + here->BSIM4v2cqgmid); + + if (here->BSIM4v2rbodyMod) + { *(ckt->CKTstate1 + here->BSIM4v2cqbs) = + *(ckt->CKTstate0 + here->BSIM4v2cqbs); + *(ckt->CKTstate1 + here->BSIM4v2cqbd) = + *(ckt->CKTstate0 + here->BSIM4v2cqbd); + } + } + + + /* + * Load current vector + */ + +line900: + if (here->BSIM4v2mode >= 0) + { Gm = here->BSIM4v2gm; + Gmbs = here->BSIM4v2gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + ceqdrn = model->BSIM4v2type * (cdrain - here->BSIM4v2gds * vds + - Gm * vgs - Gmbs * vbs); + ceqbd = model->BSIM4v2type * (here->BSIM4v2csub + here->BSIM4v2Igidl + - (here->BSIM4v2gbds + here->BSIM4v2ggidld) * vds + - (here->BSIM4v2gbgs + here->BSIM4v2ggidlg) * vgs + - (here->BSIM4v2gbbs + here->BSIM4v2ggidlb) * vbs); + ceqbs = model->BSIM4v2type * (here->BSIM4v2Igisl + here->BSIM4v2ggisls * vds + - here->BSIM4v2ggislg * vgd - here->BSIM4v2ggislb * vbd); + + gbbdp = -(here->BSIM4v2gbds); + gbbsp = here->BSIM4v2gbds + here->BSIM4v2gbgs + here->BSIM4v2gbbs; + + gbdpg = here->BSIM4v2gbgs; + gbdpdp = here->BSIM4v2gbds; + gbdpb = here->BSIM4v2gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspg = 0.0; + gbspdp = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v2igcMod) + { gIstotg = here->BSIM4v2gIgsg + here->BSIM4v2gIgcsg; + gIstotd = here->BSIM4v2gIgcsd; + gIstots = here->BSIM4v2gIgss + here->BSIM4v2gIgcss; + gIstotb = here->BSIM4v2gIgcsb; + Istoteq = model->BSIM4v2type * (here->BSIM4v2Igs + here->BSIM4v2Igcs + - gIstotg * vgs - here->BSIM4v2gIgcsd * vds + - here->BSIM4v2gIgcsb * vbs); + + gIdtotg = here->BSIM4v2gIgdg + here->BSIM4v2gIgcdg; + gIdtotd = here->BSIM4v2gIgdd + here->BSIM4v2gIgcdd; + gIdtots = here->BSIM4v2gIgcds; + gIdtotb = here->BSIM4v2gIgcdb; + Idtoteq = model->BSIM4v2type * (here->BSIM4v2Igd + here->BSIM4v2Igcd + - here->BSIM4v2gIgdg * vgd - here->BSIM4v2gIgcdg * vgs + - here->BSIM4v2gIgcdd * vds - here->BSIM4v2gIgcdb * vbs); + } + else + { gIstotg = gIstotd = gIstots = gIstotb = Istoteq = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = Idtoteq = 0.0; + } + + if (model->BSIM4v2igbMod) + { gIbtotg = here->BSIM4v2gIgbg; + gIbtotd = here->BSIM4v2gIgbd; + gIbtots = here->BSIM4v2gIgbs; + gIbtotb = here->BSIM4v2gIgbb; + Ibtoteq = model->BSIM4v2type * (here->BSIM4v2Igb + - here->BSIM4v2gIgbg * vgs - here->BSIM4v2gIgbd * vds + - here->BSIM4v2gIgbb * vbs); + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = Ibtoteq = 0.0; + + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + Igtoteq = Istoteq + Idtoteq + Ibtoteq; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = Igtoteq = 0.0; + + + if (here->BSIM4v2rgateMod == 2) + T0 = vges - vgs; + else if (here->BSIM4v2rgateMod == 3) + T0 = vgms - vgs; + if (here->BSIM4v2rgateMod > 1) + { gcrgd = here->BSIM4v2gcrgd * T0; + gcrgg = here->BSIM4v2gcrgg * T0; + gcrgs = here->BSIM4v2gcrgs * T0; + gcrgb = here->BSIM4v2gcrgb * T0; + ceqgcrg = -(gcrgd * vds + gcrgg * vgs + + gcrgb * vbs); + gcrgg -= here->BSIM4v2gcrg; + gcrg = here->BSIM4v2gcrg; + } + else + ceqgcrg = gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + } + else + { Gm = -here->BSIM4v2gm; + Gmbs = -here->BSIM4v2gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + ceqdrn = -model->BSIM4v2type * (cdrain + here->BSIM4v2gds * vds + + Gm * vgd + Gmbs * vbd); + + ceqbs = model->BSIM4v2type * (here->BSIM4v2csub + here->BSIM4v2Igisl + + (here->BSIM4v2gbds + here->BSIM4v2ggisls) * vds + - (here->BSIM4v2gbgs + here->BSIM4v2ggislg) * vgd + - (here->BSIM4v2gbbs + here->BSIM4v2ggislb) * vbd); + ceqbd = model->BSIM4v2type * (here->BSIM4v2Igidl - here->BSIM4v2ggidld * vds + - here->BSIM4v2ggidlg * vgs - here->BSIM4v2ggidlb * vbs); + + gbbsp = -(here->BSIM4v2gbds); + gbbdp = here->BSIM4v2gbds + here->BSIM4v2gbgs + here->BSIM4v2gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v2gbgs; + gbspsp = here->BSIM4v2gbds; + gbspb = here->BSIM4v2gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v2igcMod) + { gIstotg = here->BSIM4v2gIgsg + here->BSIM4v2gIgcdg; + gIstotd = here->BSIM4v2gIgcds; + gIstots = here->BSIM4v2gIgss + here->BSIM4v2gIgcdd; + gIstotb = here->BSIM4v2gIgcdb; + Istoteq = model->BSIM4v2type * (here->BSIM4v2Igs + here->BSIM4v2Igcd + - here->BSIM4v2gIgsg * vgs - here->BSIM4v2gIgcdg * vgd + + here->BSIM4v2gIgcdd * vds - here->BSIM4v2gIgcdb * vbd); + + gIdtotg = here->BSIM4v2gIgdg + here->BSIM4v2gIgcsg; + gIdtotd = here->BSIM4v2gIgdd + here->BSIM4v2gIgcss; + gIdtots = here->BSIM4v2gIgcsd; + gIdtotb = here->BSIM4v2gIgcsb; + Idtoteq = model->BSIM4v2type * (here->BSIM4v2Igd + here->BSIM4v2Igcs + - (here->BSIM4v2gIgdg + here->BSIM4v2gIgcsg) * vgd + + here->BSIM4v2gIgcsd * vds - here->BSIM4v2gIgcsb * vbd); + } + else + { gIstotg = gIstotd = gIstots = gIstotb = Istoteq = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = Idtoteq = 0.0; + } + + if (model->BSIM4v2igbMod) + { gIbtotg = here->BSIM4v2gIgbg; + gIbtotd = here->BSIM4v2gIgbs; + gIbtots = here->BSIM4v2gIgbd; + gIbtotb = here->BSIM4v2gIgbb; + Ibtoteq = model->BSIM4v2type * (here->BSIM4v2Igb + - here->BSIM4v2gIgbg * vgd + here->BSIM4v2gIgbd * vds + - here->BSIM4v2gIgbb * vbd); + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = Ibtoteq = 0.0; + + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + Igtoteq = Istoteq + Idtoteq + Ibtoteq; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = Igtoteq = 0.0; + + + if (here->BSIM4v2rgateMod == 2) + T0 = vges - vgs; + else if (here->BSIM4v2rgateMod == 3) + T0 = vgms - vgs; + if (here->BSIM4v2rgateMod > 1) + { gcrgd = here->BSIM4v2gcrgs * T0; + gcrgg = here->BSIM4v2gcrgg * T0; + gcrgs = here->BSIM4v2gcrgd * T0; + gcrgb = here->BSIM4v2gcrgb * T0; + ceqgcrg = -(gcrgg * vgd - gcrgs * vds + + gcrgb * vbd); + gcrgg -= here->BSIM4v2gcrg; + gcrg = here->BSIM4v2gcrg; + } + else + ceqgcrg = gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + } + + if (model->BSIM4v2rdsMod == 1) + { ceqgstot = model->BSIM4v2type * (here->BSIM4v2gstotd * vds + + here->BSIM4v2gstotg * vgs + here->BSIM4v2gstotb * vbs); + /* WDLiu: ceqgstot flowing away from sNodePrime */ + gstot = here->BSIM4v2gstot; + gstotd = here->BSIM4v2gstotd; + gstotg = here->BSIM4v2gstotg; + gstots = here->BSIM4v2gstots - gstot; + gstotb = here->BSIM4v2gstotb; + + ceqgdtot = -model->BSIM4v2type * (here->BSIM4v2gdtotd * vds + + here->BSIM4v2gdtotg * vgs + here->BSIM4v2gdtotb * vbs); + /* WDLiu: ceqgdtot defined as flowing into dNodePrime */ + gdtot = here->BSIM4v2gdtot; + gdtotd = here->BSIM4v2gdtotd - gdtot; + gdtotg = here->BSIM4v2gdtotg; + gdtots = here->BSIM4v2gdtots; + gdtotb = here->BSIM4v2gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = ceqgstot = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = ceqgdtot = 0.0; + } + + if (model->BSIM4v2type > 0) + { ceqjs = (here->BSIM4v2cbs - here->BSIM4v2gbs * vbs_jct); + ceqjd = (here->BSIM4v2cbd - here->BSIM4v2gbd * vbd_jct); + } + else + { ceqjs = -(here->BSIM4v2cbs - here->BSIM4v2gbs * vbs_jct); + ceqjd = -(here->BSIM4v2cbd - here->BSIM4v2gbd * vbd_jct); + ceqqg = -ceqqg; + ceqqd = -ceqqd; + ceqqb = -ceqqb; + ceqgcrg = -ceqgcrg; + + if (here->BSIM4v2trnqsMod) + { cqdef = -cqdef; + cqcheq = -cqcheq; + } + + if (here->BSIM4v2rbodyMod) + { ceqqjs = -ceqqjs; + ceqqjd = -ceqqjd; + } + + if (here->BSIM4v2rgateMod == 3) + ceqqgmid = -ceqqgmid; + } + + + /* + * Loading RHS + */ + + + (*(ckt->CKTrhs + here->BSIM4v2dNodePrime) += (ceqjd - ceqbd + ceqgdtot + - ceqdrn - ceqqd + Idtoteq)); + (*(ckt->CKTrhs + here->BSIM4v2gNodePrime) -= ceqqg - ceqgcrg + Igtoteq); + + if (here->BSIM4v2rgateMod == 2) + (*(ckt->CKTrhs + here->BSIM4v2gNodeExt) -= ceqgcrg); + else if (here->BSIM4v2rgateMod == 3) + (*(ckt->CKTrhs + here->BSIM4v2gNodeMid) -= ceqqgmid + ceqgcrg); + + if (!here->BSIM4v2rbodyMod) + { (*(ckt->CKTrhs + here->BSIM4v2bNodePrime) += (ceqbd + ceqbs - ceqjd + - ceqjs - ceqqb + Ibtoteq)); + (*(ckt->CKTrhs + here->BSIM4v2sNodePrime) += (ceqdrn - ceqbs + ceqjs + + ceqqg + ceqqb + ceqqd + ceqqgmid - ceqgstot + Istoteq)); + } + else + { (*(ckt->CKTrhs + here->BSIM4v2dbNode) -= (ceqjd + ceqqjd)); + (*(ckt->CKTrhs + here->BSIM4v2bNodePrime) += (ceqbd + ceqbs - ceqqb + Ibtoteq)); + (*(ckt->CKTrhs + here->BSIM4v2sbNode) -= (ceqjs + ceqqjs)); + (*(ckt->CKTrhs + here->BSIM4v2sNodePrime) += (ceqdrn - ceqbs + ceqjs + ceqqd + + ceqqg + ceqqb + ceqqjd + ceqqjs + ceqqgmid - ceqgstot + Istoteq)); + } + + if (model->BSIM4v2rdsMod) + { (*(ckt->CKTrhs + here->BSIM4v2dNode) -= ceqgdtot); + (*(ckt->CKTrhs + here->BSIM4v2sNode) += ceqgstot); + } + + if (here->BSIM4v2trnqsMod) + *(ckt->CKTrhs + here->BSIM4v2qNode) += (cqcheq - cqdef); + + + /* + * Loading matrix + */ + + if (!here->BSIM4v2rbodyMod) + { gjbd = here->BSIM4v2gbd; + gjbs = here->BSIM4v2gbs; + } + else + gjbd = gjbs = 0.0; + + if (!model->BSIM4v2rdsMod) + { gdpr = here->BSIM4v2drainConductance; + gspr = here->BSIM4v2sourceConductance; + } + else + gdpr = gspr = 0.0; + + geltd = here->BSIM4v2grgeltd; + + T1 = qdef * here->BSIM4v2gtau; + + if (here->BSIM4v2rgateMod == 1) + { (*(here->BSIM4v2GEgePtr) += geltd); + (*(here->BSIM4v2GPgePtr) -= geltd); + (*(here->BSIM4v2GEgpPtr) -= geltd); + (*(here->BSIM4v2GPgpPtr) += gcggb + geltd - ggtg + gIgtotg); + (*(here->BSIM4v2GPdpPtr) += gcgdb - ggtd + gIgtotd); + (*(here->BSIM4v2GPspPtr) += gcgsb - ggts + gIgtots); + (*(here->BSIM4v2GPbpPtr) += gcgbb - ggtb + gIgtotb); + } /* WDLiu: gcrg already subtracted from all gcrgg below */ + else if (here->BSIM4v2rgateMod == 2) + { (*(here->BSIM4v2GEgePtr) += gcrg); + (*(here->BSIM4v2GEgpPtr) += gcrgg); + (*(here->BSIM4v2GEdpPtr) += gcrgd); + (*(here->BSIM4v2GEspPtr) += gcrgs); + (*(here->BSIM4v2GEbpPtr) += gcrgb); + + (*(here->BSIM4v2GPgePtr) -= gcrg); + (*(here->BSIM4v2GPgpPtr) += gcggb - gcrgg - ggtg + gIgtotg); + (*(here->BSIM4v2GPdpPtr) += gcgdb - gcrgd - ggtd + gIgtotd); + (*(here->BSIM4v2GPspPtr) += gcgsb - gcrgs - ggts + gIgtots); + (*(here->BSIM4v2GPbpPtr) += gcgbb - gcrgb - ggtb + gIgtotb); + } + else if (here->BSIM4v2rgateMod == 3) + { (*(here->BSIM4v2GEgePtr) += geltd); + (*(here->BSIM4v2GEgmPtr) -= geltd); + (*(here->BSIM4v2GMgePtr) -= geltd); + (*(here->BSIM4v2GMgmPtr) += geltd + gcrg + gcgmgmb); + + (*(here->BSIM4v2GMdpPtr) += gcrgd + gcgmdb); + (*(here->BSIM4v2GMgpPtr) += gcrgg); + (*(here->BSIM4v2GMspPtr) += gcrgs + gcgmsb); + (*(here->BSIM4v2GMbpPtr) += gcrgb + gcgmbb); + + (*(here->BSIM4v2DPgmPtr) += gcdgmb); + (*(here->BSIM4v2GPgmPtr) -= gcrg); + (*(here->BSIM4v2SPgmPtr) += gcsgmb); + (*(here->BSIM4v2BPgmPtr) += gcbgmb); + + (*(here->BSIM4v2GPgpPtr) += gcggb - gcrgg - ggtg + gIgtotg); + (*(here->BSIM4v2GPdpPtr) += gcgdb - gcrgd - ggtd + gIgtotd); + (*(here->BSIM4v2GPspPtr) += gcgsb - gcrgs - ggts + gIgtots); + (*(here->BSIM4v2GPbpPtr) += gcgbb - gcrgb - ggtb + gIgtotb); + } + else + { (*(here->BSIM4v2GPgpPtr) += gcggb - ggtg + gIgtotg); + (*(here->BSIM4v2GPdpPtr) += gcgdb - ggtd + gIgtotd); + (*(here->BSIM4v2GPspPtr) += gcgsb - ggts + gIgtots); + (*(here->BSIM4v2GPbpPtr) += gcgbb - ggtb + gIgtotb); + } + + if (model->BSIM4v2rdsMod) + { (*(here->BSIM4v2DgpPtr) += gdtotg); + (*(here->BSIM4v2DspPtr) += gdtots); + (*(here->BSIM4v2DbpPtr) += gdtotb); + (*(here->BSIM4v2SdpPtr) += gstotd); + (*(here->BSIM4v2SgpPtr) += gstotg); + (*(here->BSIM4v2SbpPtr) += gstotb); + } + + (*(here->BSIM4v2DPdpPtr) += gdpr + here->BSIM4v2gds + here->BSIM4v2gbd + T1 * ddxpart_dVd + - gdtotd + RevSum + gcddb + gbdpdp + dxpart * ggtd - gIdtotd); + (*(here->BSIM4v2DPdPtr) -= gdpr + gdtot); + (*(here->BSIM4v2DPgpPtr) += Gm + gcdgb - gdtotg + gbdpg - gIdtotg + + dxpart * ggtg + T1 * ddxpart_dVg); + (*(here->BSIM4v2DPspPtr) -= here->BSIM4v2gds + gdtots - dxpart * ggts + gIdtots + - T1 * ddxpart_dVs + FwdSum - gcdsb - gbdpsp); + (*(here->BSIM4v2DPbpPtr) -= gjbd + gdtotb - Gmbs - gcdbb - gbdpb + gIdtotb + - T1 * ddxpart_dVb - dxpart * ggtb); + + (*(here->BSIM4v2DdpPtr) -= gdpr - gdtotd); + (*(here->BSIM4v2DdPtr) += gdpr + gdtot); + + (*(here->BSIM4v2SPdpPtr) -= here->BSIM4v2gds + gstotd + RevSum - gcsdb - gbspdp + - T1 * dsxpart_dVd - sxpart * ggtd + gIstotd); + (*(here->BSIM4v2SPgpPtr) += gcsgb - Gm - gstotg + gbspg + sxpart * ggtg + + T1 * dsxpart_dVg - gIstotg); + (*(here->BSIM4v2SPspPtr) += gspr + here->BSIM4v2gds + here->BSIM4v2gbs + T1 * dsxpart_dVs + - gstots + FwdSum + gcssb + gbspsp + sxpart * ggts - gIstots); + (*(here->BSIM4v2SPsPtr) -= gspr + gstot); + (*(here->BSIM4v2SPbpPtr) -= gjbs + gstotb + Gmbs - gcsbb - gbspb - sxpart * ggtb + - T1 * dsxpart_dVb + gIstotb); + + (*(here->BSIM4v2SspPtr) -= gspr - gstots); + (*(here->BSIM4v2SsPtr) += gspr + gstot); + + (*(here->BSIM4v2BPdpPtr) += gcbdb - gjbd + gbbdp - gIbtotd); + (*(here->BSIM4v2BPgpPtr) += gcbgb - here->BSIM4v2gbgs - gIbtotg); + (*(here->BSIM4v2BPspPtr) += gcbsb - gjbs + gbbsp - gIbtots); + (*(here->BSIM4v2BPbpPtr) += gjbd + gjbs + gcbbb - here->BSIM4v2gbbs + - gIbtotb); + + ggidld = here->BSIM4v2ggidld; + ggidlg = here->BSIM4v2ggidlg; + ggidlb = here->BSIM4v2ggidlb; + ggislg = here->BSIM4v2ggislg; + ggisls = here->BSIM4v2ggisls; + ggislb = here->BSIM4v2ggislb; + + /* stamp gidl */ + (*(here->BSIM4v2DPdpPtr) += ggidld); + (*(here->BSIM4v2DPgpPtr) += ggidlg); + (*(here->BSIM4v2DPspPtr) -= (ggidlg + ggidld + ggidlb)); + (*(here->BSIM4v2DPbpPtr) += ggidlb); + (*(here->BSIM4v2BPdpPtr) -= ggidld); + (*(here->BSIM4v2BPgpPtr) -= ggidlg); + (*(here->BSIM4v2BPspPtr) += (ggidlg + ggidld + ggidlb)); + (*(here->BSIM4v2BPbpPtr) -= ggidlb); + /* stamp gisl */ + (*(here->BSIM4v2SPdpPtr) -= (ggisls + ggislg + ggislb)); + (*(here->BSIM4v2SPgpPtr) += ggislg); + (*(here->BSIM4v2SPspPtr) += ggisls); + (*(here->BSIM4v2SPbpPtr) += ggislb); + (*(here->BSIM4v2BPdpPtr) += (ggislg + ggisls + ggislb)); + (*(here->BSIM4v2BPgpPtr) -= ggislg); + (*(here->BSIM4v2BPspPtr) -= ggisls); + (*(here->BSIM4v2BPbpPtr) -= ggislb); + + + if (here->BSIM4v2rbodyMod) + { (*(here->BSIM4v2DPdbPtr) += gcdbdb - here->BSIM4v2gbd); + (*(here->BSIM4v2SPsbPtr) -= here->BSIM4v2gbs - gcsbsb); + + (*(here->BSIM4v2DBdpPtr) += gcdbdb - here->BSIM4v2gbd); + (*(here->BSIM4v2DBdbPtr) += here->BSIM4v2gbd - gcdbdb + + here->BSIM4v2grbpd + here->BSIM4v2grbdb); + (*(here->BSIM4v2DBbpPtr) -= here->BSIM4v2grbpd); + (*(here->BSIM4v2DBbPtr) -= here->BSIM4v2grbdb); + + (*(here->BSIM4v2BPdbPtr) -= here->BSIM4v2grbpd); + (*(here->BSIM4v2BPbPtr) -= here->BSIM4v2grbpb); + (*(here->BSIM4v2BPsbPtr) -= here->BSIM4v2grbps); + (*(here->BSIM4v2BPbpPtr) += here->BSIM4v2grbpd + here->BSIM4v2grbps + + here->BSIM4v2grbpb); + /* WDLiu: (gcbbb - here->BSIM4v2gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v2SBspPtr) += gcsbsb - here->BSIM4v2gbs); + (*(here->BSIM4v2SBbpPtr) -= here->BSIM4v2grbps); + (*(here->BSIM4v2SBbPtr) -= here->BSIM4v2grbsb); + (*(here->BSIM4v2SBsbPtr) += here->BSIM4v2gbs - gcsbsb + + here->BSIM4v2grbps + here->BSIM4v2grbsb); + + (*(here->BSIM4v2BdbPtr) -= here->BSIM4v2grbdb); + (*(here->BSIM4v2BbpPtr) -= here->BSIM4v2grbpb); + (*(here->BSIM4v2BsbPtr) -= here->BSIM4v2grbsb); + (*(here->BSIM4v2BbPtr) += here->BSIM4v2grbsb + here->BSIM4v2grbdb + + here->BSIM4v2grbpb); + } + + if (here->BSIM4v2trnqsMod) + { (*(here->BSIM4v2QqPtr) += gqdef + here->BSIM4v2gtau); + (*(here->BSIM4v2QgpPtr) += ggtg - gcqgb); + (*(here->BSIM4v2QdpPtr) += ggtd - gcqdb); + (*(here->BSIM4v2QspPtr) += ggts - gcqsb); + (*(here->BSIM4v2QbpPtr) += ggtb - gcqbb); + + (*(here->BSIM4v2DPqPtr) += dxpart * here->BSIM4v2gtau); + (*(here->BSIM4v2SPqPtr) += sxpart * here->BSIM4v2gtau); + (*(here->BSIM4v2GPqPtr) -= here->BSIM4v2gtau); + } + +line1000: ; + + } /* End of MOSFET Instance */ +} /* End of Model Instance */ + +return(OK); +} + +/* function to compute poly depletion effect */ +int BSIM4v2polyDepletion( + double phi, + double ngate, + double coxe, + double Vgs, + double *Vgs_eff, + double *dVgs_eff_dVg) +{ + double T1, T2, T3, T4, T5, T6, T7, T8; + + /* Poly Gate Si Depletion Effect */ + if ((ngate > 1.0e18) && + (ngate < 1.0e25) && (Vgs > phi)) { + T1 = 1.0e6 * CHARGE * EPSSI * ngate / (coxe * coxe); + T8 = Vgs - phi; + T4 = sqrt(1.0 + 2.0 * T8 / T1); + T2 = 2.0 * T8 / (T4 + 1.0); + T3 = 0.5 * T2 * T2 / T1; /* T3 = Vpoly */ + T7 = 1.12 - T3 - 0.05; + T6 = sqrt(T7 * T7 + 0.224); + T5 = 1.12 - 0.5 * (T7 + T6); + *Vgs_eff = Vgs - T5; + *dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); + } + else { + *Vgs_eff = Vgs; + *dVgs_eff_dVg = 1.0; + } + return(0); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2mask.c b/src/spicelib/devices/bsim4v2/b4v2mask.c new file mode 100644 index 000000000..beec51162 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2mask.c @@ -0,0 +1,1877 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4mask.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + + +#include "ngspice.h" +#include +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim4v2def.h" +#include "sperror.h" + + +int +BSIM4v2mAsk(ckt,inst,which,value) +CKTcircuit *ckt; +GENmodel *inst; +int which; +IFvalue *value; +{ + BSIM4v2model *model = (BSIM4v2model *)inst; + switch(which) + { case BSIM4v2_MOD_MOBMOD : + value->iValue = model->BSIM4v2mobMod; + return(OK); + case BSIM4v2_MOD_PARAMCHK : + value->iValue = model->BSIM4v2paramChk; + return(OK); + case BSIM4v2_MOD_BINUNIT : + value->iValue = model->BSIM4v2binUnit; + return(OK); + case BSIM4v2_MOD_CAPMOD : + value->iValue = model->BSIM4v2capMod; + return(OK); + case BSIM4v2_MOD_DIOMOD : + value->iValue = model->BSIM4v2dioMod; + return(OK); + case BSIM4v2_MOD_TRNQSMOD : + value->iValue = model->BSIM4v2trnqsMod; + return(OK); + case BSIM4v2_MOD_ACNQSMOD : + value->iValue = model->BSIM4v2acnqsMod; + return(OK); + case BSIM4v2_MOD_FNOIMOD : + value->iValue = model->BSIM4v2fnoiMod; + return(OK); + case BSIM4v2_MOD_TNOIMOD : + value->iValue = model->BSIM4v2tnoiMod; + return(OK); + case BSIM4v2_MOD_RDSMOD : + value->iValue = model->BSIM4v2rdsMod; + return(OK); + case BSIM4v2_MOD_RBODYMOD : + value->iValue = model->BSIM4v2rbodyMod; + return(OK); + case BSIM4v2_MOD_RGATEMOD : + value->iValue = model->BSIM4v2rgateMod; + return(OK); + case BSIM4v2_MOD_PERMOD : + value->iValue = model->BSIM4v2perMod; + return(OK); + case BSIM4v2_MOD_GEOMOD : + value->iValue = model->BSIM4v2geoMod; + return(OK); + case BSIM4v2_MOD_IGCMOD : + value->iValue = model->BSIM4v2igcMod; + return(OK); + case BSIM4v2_MOD_IGBMOD : + value->iValue = model->BSIM4v2igbMod; + return(OK); + case BSIM4v2_MOD_VERSION : + value->sValue = model->BSIM4v2version; + return(OK); + case BSIM4v2_MOD_TOXREF : + value->rValue = model->BSIM4v2toxref; + return(OK); + case BSIM4v2_MOD_TOXE : + value->rValue = model->BSIM4v2toxe; + return(OK); + case BSIM4v2_MOD_TOXP : + value->rValue = model->BSIM4v2toxp; + return(OK); + case BSIM4v2_MOD_TOXM : + value->rValue = model->BSIM4v2toxm; + return(OK); + case BSIM4v2_MOD_DTOX : + value->rValue = model->BSIM4v2dtox; + return(OK); + case BSIM4v2_MOD_EPSROX : + value->rValue = model->BSIM4v2epsrox; + return(OK); + case BSIM4v2_MOD_CDSC : + value->rValue = model->BSIM4v2cdsc; + return(OK); + case BSIM4v2_MOD_CDSCB : + value->rValue = model->BSIM4v2cdscb; + return(OK); + + case BSIM4v2_MOD_CDSCD : + value->rValue = model->BSIM4v2cdscd; + return(OK); + + case BSIM4v2_MOD_CIT : + value->rValue = model->BSIM4v2cit; + return(OK); + case BSIM4v2_MOD_NFACTOR : + value->rValue = model->BSIM4v2nfactor; + return(OK); + case BSIM4v2_MOD_XJ: + value->rValue = model->BSIM4v2xj; + return(OK); + case BSIM4v2_MOD_VSAT: + value->rValue = model->BSIM4v2vsat; + return(OK); + case BSIM4v2_MOD_AT: + value->rValue = model->BSIM4v2at; + return(OK); + case BSIM4v2_MOD_A0: + value->rValue = model->BSIM4v2a0; + return(OK); + + case BSIM4v2_MOD_AGS: + value->rValue = model->BSIM4v2ags; + return(OK); + + case BSIM4v2_MOD_A1: + value->rValue = model->BSIM4v2a1; + return(OK); + case BSIM4v2_MOD_A2: + value->rValue = model->BSIM4v2a2; + return(OK); + case BSIM4v2_MOD_KETA: + value->rValue = model->BSIM4v2keta; + return(OK); + case BSIM4v2_MOD_NSUB: + value->rValue = model->BSIM4v2nsub; + return(OK); + case BSIM4v2_MOD_NDEP: + value->rValue = model->BSIM4v2ndep; + return(OK); + case BSIM4v2_MOD_NSD: + value->rValue = model->BSIM4v2nsd; + return(OK); + case BSIM4v2_MOD_NGATE: + value->rValue = model->BSIM4v2ngate; + return(OK); + case BSIM4v2_MOD_GAMMA1: + value->rValue = model->BSIM4v2gamma1; + return(OK); + case BSIM4v2_MOD_GAMMA2: + value->rValue = model->BSIM4v2gamma2; + return(OK); + case BSIM4v2_MOD_VBX: + value->rValue = model->BSIM4v2vbx; + return(OK); + case BSIM4v2_MOD_VBM: + value->rValue = model->BSIM4v2vbm; + return(OK); + case BSIM4v2_MOD_XT: + value->rValue = model->BSIM4v2xt; + return(OK); + case BSIM4v2_MOD_K1: + value->rValue = model->BSIM4v2k1; + return(OK); + case BSIM4v2_MOD_KT1: + value->rValue = model->BSIM4v2kt1; + return(OK); + case BSIM4v2_MOD_KT1L: + value->rValue = model->BSIM4v2kt1l; + return(OK); + case BSIM4v2_MOD_KT2 : + value->rValue = model->BSIM4v2kt2; + return(OK); + case BSIM4v2_MOD_K2 : + value->rValue = model->BSIM4v2k2; + return(OK); + case BSIM4v2_MOD_K3: + value->rValue = model->BSIM4v2k3; + return(OK); + case BSIM4v2_MOD_K3B: + value->rValue = model->BSIM4v2k3b; + return(OK); + case BSIM4v2_MOD_W0: + value->rValue = model->BSIM4v2w0; + return(OK); + case BSIM4v2_MOD_LPE0: + value->rValue = model->BSIM4v2lpe0; + return(OK); + case BSIM4v2_MOD_LPEB: + value->rValue = model->BSIM4v2lpeb; + return(OK); + case BSIM4v2_MOD_DVTP0: + value->rValue = model->BSIM4v2dvtp0; + return(OK); + case BSIM4v2_MOD_DVTP1: + value->rValue = model->BSIM4v2dvtp1; + return(OK); + case BSIM4v2_MOD_DVT0 : + value->rValue = model->BSIM4v2dvt0; + return(OK); + case BSIM4v2_MOD_DVT1 : + value->rValue = model->BSIM4v2dvt1; + return(OK); + case BSIM4v2_MOD_DVT2 : + value->rValue = model->BSIM4v2dvt2; + return(OK); + case BSIM4v2_MOD_DVT0W : + value->rValue = model->BSIM4v2dvt0w; + return(OK); + case BSIM4v2_MOD_DVT1W : + value->rValue = model->BSIM4v2dvt1w; + return(OK); + case BSIM4v2_MOD_DVT2W : + value->rValue = model->BSIM4v2dvt2w; + return(OK); + case BSIM4v2_MOD_DROUT : + value->rValue = model->BSIM4v2drout; + return(OK); + case BSIM4v2_MOD_DSUB : + value->rValue = model->BSIM4v2dsub; + return(OK); + case BSIM4v2_MOD_VTH0: + value->rValue = model->BSIM4v2vth0; + return(OK); + case BSIM4v2_MOD_EU: + value->rValue = model->BSIM4v2eu; + return(OK); + case BSIM4v2_MOD_UA: + value->rValue = model->BSIM4v2ua; + return(OK); + case BSIM4v2_MOD_UA1: + value->rValue = model->BSIM4v2ua1; + return(OK); + case BSIM4v2_MOD_UB: + value->rValue = model->BSIM4v2ub; + return(OK); + case BSIM4v2_MOD_UB1: + value->rValue = model->BSIM4v2ub1; + return(OK); + case BSIM4v2_MOD_UC: + value->rValue = model->BSIM4v2uc; + return(OK); + case BSIM4v2_MOD_UC1: + value->rValue = model->BSIM4v2uc1; + return(OK); + case BSIM4v2_MOD_U0: + value->rValue = model->BSIM4v2u0; + return(OK); + case BSIM4v2_MOD_UTE: + value->rValue = model->BSIM4v2ute; + return(OK); + case BSIM4v2_MOD_VOFF: + value->rValue = model->BSIM4v2voff; + return(OK); + case BSIM4v2_MOD_VOFFL: + value->rValue = model->BSIM4v2voffl; + return(OK); + case BSIM4v2_MOD_MINV: + value->rValue = model->BSIM4v2minv; + return(OK); + case BSIM4v2_MOD_FPROUT: + value->rValue = model->BSIM4v2fprout; + return(OK); + case BSIM4v2_MOD_PDITS: + value->rValue = model->BSIM4v2pdits; + return(OK); + case BSIM4v2_MOD_PDITSD: + value->rValue = model->BSIM4v2pditsd; + return(OK); + case BSIM4v2_MOD_PDITSL: + value->rValue = model->BSIM4v2pditsl; + return(OK); + case BSIM4v2_MOD_DELTA: + value->rValue = model->BSIM4v2delta; + return(OK); + case BSIM4v2_MOD_RDSW: + value->rValue = model->BSIM4v2rdsw; + return(OK); + case BSIM4v2_MOD_RDSWMIN: + value->rValue = model->BSIM4v2rdswmin; + return(OK); + case BSIM4v2_MOD_RDWMIN: + value->rValue = model->BSIM4v2rdwmin; + return(OK); + case BSIM4v2_MOD_RSWMIN: + value->rValue = model->BSIM4v2rswmin; + return(OK); + case BSIM4v2_MOD_RDW: + value->rValue = model->BSIM4v2rdw; + return(OK); + case BSIM4v2_MOD_RSW: + value->rValue = model->BSIM4v2rsw; + return(OK); + case BSIM4v2_MOD_PRWG: + value->rValue = model->BSIM4v2prwg; + return(OK); + case BSIM4v2_MOD_PRWB: + value->rValue = model->BSIM4v2prwb; + return(OK); + case BSIM4v2_MOD_PRT: + value->rValue = model->BSIM4v2prt; + return(OK); + case BSIM4v2_MOD_ETA0: + value->rValue = model->BSIM4v2eta0; + return(OK); + case BSIM4v2_MOD_ETAB: + value->rValue = model->BSIM4v2etab; + return(OK); + case BSIM4v2_MOD_PCLM: + value->rValue = model->BSIM4v2pclm; + return(OK); + case BSIM4v2_MOD_PDIBL1: + value->rValue = model->BSIM4v2pdibl1; + return(OK); + case BSIM4v2_MOD_PDIBL2: + value->rValue = model->BSIM4v2pdibl2; + return(OK); + case BSIM4v2_MOD_PDIBLB: + value->rValue = model->BSIM4v2pdiblb; + return(OK); + case BSIM4v2_MOD_PSCBE1: + value->rValue = model->BSIM4v2pscbe1; + return(OK); + case BSIM4v2_MOD_PSCBE2: + value->rValue = model->BSIM4v2pscbe2; + return(OK); + case BSIM4v2_MOD_PVAG: + value->rValue = model->BSIM4v2pvag; + return(OK); + case BSIM4v2_MOD_WR: + value->rValue = model->BSIM4v2wr; + return(OK); + case BSIM4v2_MOD_DWG: + value->rValue = model->BSIM4v2dwg; + return(OK); + case BSIM4v2_MOD_DWB: + value->rValue = model->BSIM4v2dwb; + return(OK); + case BSIM4v2_MOD_B0: + value->rValue = model->BSIM4v2b0; + return(OK); + case BSIM4v2_MOD_B1: + value->rValue = model->BSIM4v2b1; + return(OK); + case BSIM4v2_MOD_ALPHA0: + value->rValue = model->BSIM4v2alpha0; + return(OK); + case BSIM4v2_MOD_ALPHA1: + value->rValue = model->BSIM4v2alpha1; + return(OK); + case BSIM4v2_MOD_BETA0: + value->rValue = model->BSIM4v2beta0; + return(OK); + case BSIM4v2_MOD_AGIDL: + value->rValue = model->BSIM4v2agidl; + return(OK); + case BSIM4v2_MOD_BGIDL: + value->rValue = model->BSIM4v2bgidl; + return(OK); + case BSIM4v2_MOD_CGIDL: + value->rValue = model->BSIM4v2cgidl; + return(OK); + case BSIM4v2_MOD_EGIDL: + value->rValue = model->BSIM4v2egidl; + return(OK); + case BSIM4v2_MOD_AIGC: + value->rValue = model->BSIM4v2aigc; + return(OK); + case BSIM4v2_MOD_BIGC: + value->rValue = model->BSIM4v2bigc; + return(OK); + case BSIM4v2_MOD_CIGC: + value->rValue = model->BSIM4v2cigc; + return(OK); + case BSIM4v2_MOD_AIGSD: + value->rValue = model->BSIM4v2aigsd; + return(OK); + case BSIM4v2_MOD_BIGSD: + value->rValue = model->BSIM4v2bigsd; + return(OK); + case BSIM4v2_MOD_CIGSD: + value->rValue = model->BSIM4v2cigsd; + return(OK); + case BSIM4v2_MOD_AIGBACC: + value->rValue = model->BSIM4v2aigbacc; + return(OK); + case BSIM4v2_MOD_BIGBACC: + value->rValue = model->BSIM4v2bigbacc; + return(OK); + case BSIM4v2_MOD_CIGBACC: + value->rValue = model->BSIM4v2cigbacc; + return(OK); + case BSIM4v2_MOD_AIGBINV: + value->rValue = model->BSIM4v2aigbinv; + return(OK); + case BSIM4v2_MOD_BIGBINV: + value->rValue = model->BSIM4v2bigbinv; + return(OK); + case BSIM4v2_MOD_CIGBINV: + value->rValue = model->BSIM4v2cigbinv; + return(OK); + case BSIM4v2_MOD_NIGC: + value->rValue = model->BSIM4v2nigc; + return(OK); + case BSIM4v2_MOD_NIGBACC: + value->rValue = model->BSIM4v2nigbacc; + return(OK); + case BSIM4v2_MOD_NIGBINV: + value->rValue = model->BSIM4v2nigbinv; + return(OK); + case BSIM4v2_MOD_NTOX: + value->rValue = model->BSIM4v2ntox; + return(OK); + case BSIM4v2_MOD_EIGBINV: + value->rValue = model->BSIM4v2eigbinv; + return(OK); + case BSIM4v2_MOD_PIGCD: + value->rValue = model->BSIM4v2pigcd; + return(OK); + case BSIM4v2_MOD_POXEDGE: + value->rValue = model->BSIM4v2poxedge; + return(OK); + case BSIM4v2_MOD_PHIN: + value->rValue = model->BSIM4v2phin; + return(OK); + case BSIM4v2_MOD_XRCRG1: + value->rValue = model->BSIM4v2xrcrg1; + return(OK); + case BSIM4v2_MOD_XRCRG2: + value->rValue = model->BSIM4v2xrcrg2; + return(OK); + case BSIM4v2_MOD_TNOIA: + value->rValue = model->BSIM4v2tnoia; + return(OK); + case BSIM4v2_MOD_TNOIB: + value->rValue = model->BSIM4v2tnoib; + return(OK); + case BSIM4v2_MOD_NTNOI: + value->rValue = model->BSIM4v2ntnoi; + return(OK); + case BSIM4v2_MOD_IJTHDFWD: + value->rValue = model->BSIM4v2ijthdfwd; + return(OK); + case BSIM4v2_MOD_IJTHSFWD: + value->rValue = model->BSIM4v2ijthsfwd; + return(OK); + case BSIM4v2_MOD_IJTHDREV: + value->rValue = model->BSIM4v2ijthdrev; + return(OK); + case BSIM4v2_MOD_IJTHSREV: + value->rValue = model->BSIM4v2ijthsrev; + return(OK); + case BSIM4v2_MOD_XJBVD: + value->rValue = model->BSIM4v2xjbvd; + return(OK); + case BSIM4v2_MOD_XJBVS: + value->rValue = model->BSIM4v2xjbvs; + return(OK); + case BSIM4v2_MOD_BVD: + value->rValue = model->BSIM4v2bvd; + return(OK); + case BSIM4v2_MOD_BVS: + value->rValue = model->BSIM4v2bvs; + return(OK); + case BSIM4v2_MOD_VFB: + value->rValue = model->BSIM4v2vfb; + return(OK); + + case BSIM4v2_MOD_GBMIN: + value->rValue = model->BSIM4v2gbmin; + return(OK); + case BSIM4v2_MOD_RBDB: + value->rValue = model->BSIM4v2rbdb; + return(OK); + case BSIM4v2_MOD_RBPB: + value->rValue = model->BSIM4v2rbpb; + return(OK); + case BSIM4v2_MOD_RBSB: + value->rValue = model->BSIM4v2rbsb; + return(OK); + case BSIM4v2_MOD_RBPS: + value->rValue = model->BSIM4v2rbps; + return(OK); + case BSIM4v2_MOD_RBPD: + value->rValue = model->BSIM4v2rbpd; + return(OK); + + case BSIM4v2_MOD_CGSL: + value->rValue = model->BSIM4v2cgsl; + return(OK); + case BSIM4v2_MOD_CGDL: + value->rValue = model->BSIM4v2cgdl; + return(OK); + case BSIM4v2_MOD_CKAPPAS: + value->rValue = model->BSIM4v2ckappas; + return(OK); + case BSIM4v2_MOD_CKAPPAD: + value->rValue = model->BSIM4v2ckappad; + return(OK); + case BSIM4v2_MOD_CF: + value->rValue = model->BSIM4v2cf; + return(OK); + case BSIM4v2_MOD_CLC: + value->rValue = model->BSIM4v2clc; + return(OK); + case BSIM4v2_MOD_CLE: + value->rValue = model->BSIM4v2cle; + return(OK); + case BSIM4v2_MOD_DWC: + value->rValue = model->BSIM4v2dwc; + return(OK); + case BSIM4v2_MOD_DLC: + value->rValue = model->BSIM4v2dlc; + return(OK); + case BSIM4v2_MOD_XW: + value->rValue = model->BSIM4v2xw; + return(OK); + case BSIM4v2_MOD_XL: + value->rValue = model->BSIM4v2xl; + return(OK); + case BSIM4v2_MOD_DLCIG: + value->rValue = model->BSIM4v2dlcig; + return(OK); + case BSIM4v2_MOD_DWJ: + value->rValue = model->BSIM4v2dwj; + return(OK); + case BSIM4v2_MOD_VFBCV: + value->rValue = model->BSIM4v2vfbcv; + return(OK); + case BSIM4v2_MOD_ACDE: + value->rValue = model->BSIM4v2acde; + return(OK); + case BSIM4v2_MOD_MOIN: + value->rValue = model->BSIM4v2moin; + return(OK); + case BSIM4v2_MOD_NOFF: + value->rValue = model->BSIM4v2noff; + return(OK); + case BSIM4v2_MOD_VOFFCV: + value->rValue = model->BSIM4v2voffcv; + return(OK); + case BSIM4v2_MOD_DMCG: + value->rValue = model->BSIM4v2dmcg; + return(OK); + case BSIM4v2_MOD_DMCI: + value->rValue = model->BSIM4v2dmci; + return(OK); + case BSIM4v2_MOD_DMDG: + value->rValue = model->BSIM4v2dmdg; + return(OK); + case BSIM4v2_MOD_DMCGT: + value->rValue = model->BSIM4v2dmcgt; + return(OK); + case BSIM4v2_MOD_XGW: + value->rValue = model->BSIM4v2xgw; + return(OK); + case BSIM4v2_MOD_XGL: + value->rValue = model->BSIM4v2xgl; + return(OK); + case BSIM4v2_MOD_RSHG: + value->rValue = model->BSIM4v2rshg; + return(OK); + case BSIM4v2_MOD_NGCON: + value->rValue = model->BSIM4v2ngcon; + return(OK); + case BSIM4v2_MOD_TCJ: + value->rValue = model->BSIM4v2tcj; + return(OK); + case BSIM4v2_MOD_TPB: + value->rValue = model->BSIM4v2tpb; + return(OK); + case BSIM4v2_MOD_TCJSW: + value->rValue = model->BSIM4v2tcjsw; + return(OK); + case BSIM4v2_MOD_TPBSW: + value->rValue = model->BSIM4v2tpbsw; + return(OK); + case BSIM4v2_MOD_TCJSWG: + value->rValue = model->BSIM4v2tcjswg; + return(OK); + case BSIM4v2_MOD_TPBSWG: + value->rValue = model->BSIM4v2tpbswg; + return(OK); + + /* Length dependence */ + case BSIM4v2_MOD_LCDSC : + value->rValue = model->BSIM4v2lcdsc; + return(OK); + case BSIM4v2_MOD_LCDSCB : + value->rValue = model->BSIM4v2lcdscb; + return(OK); + case BSIM4v2_MOD_LCDSCD : + value->rValue = model->BSIM4v2lcdscd; + return(OK); + case BSIM4v2_MOD_LCIT : + value->rValue = model->BSIM4v2lcit; + return(OK); + case BSIM4v2_MOD_LNFACTOR : + value->rValue = model->BSIM4v2lnfactor; + return(OK); + case BSIM4v2_MOD_LXJ: + value->rValue = model->BSIM4v2lxj; + return(OK); + case BSIM4v2_MOD_LVSAT: + value->rValue = model->BSIM4v2lvsat; + return(OK); + case BSIM4v2_MOD_LAT: + value->rValue = model->BSIM4v2lat; + return(OK); + case BSIM4v2_MOD_LA0: + value->rValue = model->BSIM4v2la0; + return(OK); + case BSIM4v2_MOD_LAGS: + value->rValue = model->BSIM4v2lags; + return(OK); + case BSIM4v2_MOD_LA1: + value->rValue = model->BSIM4v2la1; + return(OK); + case BSIM4v2_MOD_LA2: + value->rValue = model->BSIM4v2la2; + return(OK); + case BSIM4v2_MOD_LKETA: + value->rValue = model->BSIM4v2lketa; + return(OK); + case BSIM4v2_MOD_LNSUB: + value->rValue = model->BSIM4v2lnsub; + return(OK); + case BSIM4v2_MOD_LNDEP: + value->rValue = model->BSIM4v2lndep; + return(OK); + case BSIM4v2_MOD_LNSD: + value->rValue = model->BSIM4v2lnsd; + return(OK); + case BSIM4v2_MOD_LNGATE: + value->rValue = model->BSIM4v2lngate; + return(OK); + case BSIM4v2_MOD_LGAMMA1: + value->rValue = model->BSIM4v2lgamma1; + return(OK); + case BSIM4v2_MOD_LGAMMA2: + value->rValue = model->BSIM4v2lgamma2; + return(OK); + case BSIM4v2_MOD_LVBX: + value->rValue = model->BSIM4v2lvbx; + return(OK); + case BSIM4v2_MOD_LVBM: + value->rValue = model->BSIM4v2lvbm; + return(OK); + case BSIM4v2_MOD_LXT: + value->rValue = model->BSIM4v2lxt; + return(OK); + case BSIM4v2_MOD_LK1: + value->rValue = model->BSIM4v2lk1; + return(OK); + case BSIM4v2_MOD_LKT1: + value->rValue = model->BSIM4v2lkt1; + return(OK); + case BSIM4v2_MOD_LKT1L: + value->rValue = model->BSIM4v2lkt1l; + return(OK); + case BSIM4v2_MOD_LKT2 : + value->rValue = model->BSIM4v2lkt2; + return(OK); + case BSIM4v2_MOD_LK2 : + value->rValue = model->BSIM4v2lk2; + return(OK); + case BSIM4v2_MOD_LK3: + value->rValue = model->BSIM4v2lk3; + return(OK); + case BSIM4v2_MOD_LK3B: + value->rValue = model->BSIM4v2lk3b; + return(OK); + case BSIM4v2_MOD_LW0: + value->rValue = model->BSIM4v2lw0; + return(OK); + case BSIM4v2_MOD_LLPE0: + value->rValue = model->BSIM4v2llpe0; + return(OK); + case BSIM4v2_MOD_LLPEB: + value->rValue = model->BSIM4v2llpeb; + return(OK); + case BSIM4v2_MOD_LDVTP0: + value->rValue = model->BSIM4v2ldvtp0; + return(OK); + case BSIM4v2_MOD_LDVTP1: + value->rValue = model->BSIM4v2ldvtp1; + return(OK); + case BSIM4v2_MOD_LDVT0: + value->rValue = model->BSIM4v2ldvt0; + return(OK); + case BSIM4v2_MOD_LDVT1 : + value->rValue = model->BSIM4v2ldvt1; + return(OK); + case BSIM4v2_MOD_LDVT2 : + value->rValue = model->BSIM4v2ldvt2; + return(OK); + case BSIM4v2_MOD_LDVT0W : + value->rValue = model->BSIM4v2ldvt0w; + return(OK); + case BSIM4v2_MOD_LDVT1W : + value->rValue = model->BSIM4v2ldvt1w; + return(OK); + case BSIM4v2_MOD_LDVT2W : + value->rValue = model->BSIM4v2ldvt2w; + return(OK); + case BSIM4v2_MOD_LDROUT : + value->rValue = model->BSIM4v2ldrout; + return(OK); + case BSIM4v2_MOD_LDSUB : + value->rValue = model->BSIM4v2ldsub; + return(OK); + case BSIM4v2_MOD_LVTH0: + value->rValue = model->BSIM4v2lvth0; + return(OK); + case BSIM4v2_MOD_LUA: + value->rValue = model->BSIM4v2lua; + return(OK); + case BSIM4v2_MOD_LUA1: + value->rValue = model->BSIM4v2lua1; + return(OK); + case BSIM4v2_MOD_LUB: + value->rValue = model->BSIM4v2lub; + return(OK); + case BSIM4v2_MOD_LUB1: + value->rValue = model->BSIM4v2lub1; + return(OK); + case BSIM4v2_MOD_LUC: + value->rValue = model->BSIM4v2luc; + return(OK); + case BSIM4v2_MOD_LUC1: + value->rValue = model->BSIM4v2luc1; + return(OK); + case BSIM4v2_MOD_LU0: + value->rValue = model->BSIM4v2lu0; + return(OK); + case BSIM4v2_MOD_LUTE: + value->rValue = model->BSIM4v2lute; + return(OK); + case BSIM4v2_MOD_LVOFF: + value->rValue = model->BSIM4v2lvoff; + return(OK); + case BSIM4v2_MOD_LMINV: + value->rValue = model->BSIM4v2lminv; + return(OK); + case BSIM4v2_MOD_LFPROUT: + value->rValue = model->BSIM4v2lfprout; + return(OK); + case BSIM4v2_MOD_LPDITS: + value->rValue = model->BSIM4v2lpdits; + return(OK); + case BSIM4v2_MOD_LPDITSD: + value->rValue = model->BSIM4v2lpditsd; + return(OK); + case BSIM4v2_MOD_LDELTA: + value->rValue = model->BSIM4v2ldelta; + return(OK); + case BSIM4v2_MOD_LRDSW: + value->rValue = model->BSIM4v2lrdsw; + return(OK); + case BSIM4v2_MOD_LRDW: + value->rValue = model->BSIM4v2lrdw; + return(OK); + case BSIM4v2_MOD_LRSW: + value->rValue = model->BSIM4v2lrsw; + return(OK); + case BSIM4v2_MOD_LPRWB: + value->rValue = model->BSIM4v2lprwb; + return(OK); + case BSIM4v2_MOD_LPRWG: + value->rValue = model->BSIM4v2lprwg; + return(OK); + case BSIM4v2_MOD_LPRT: + value->rValue = model->BSIM4v2lprt; + return(OK); + case BSIM4v2_MOD_LETA0: + value->rValue = model->BSIM4v2leta0; + return(OK); + case BSIM4v2_MOD_LETAB: + value->rValue = model->BSIM4v2letab; + return(OK); + case BSIM4v2_MOD_LPCLM: + value->rValue = model->BSIM4v2lpclm; + return(OK); + case BSIM4v2_MOD_LPDIBL1: + value->rValue = model->BSIM4v2lpdibl1; + return(OK); + case BSIM4v2_MOD_LPDIBL2: + value->rValue = model->BSIM4v2lpdibl2; + return(OK); + case BSIM4v2_MOD_LPDIBLB: + value->rValue = model->BSIM4v2lpdiblb; + return(OK); + case BSIM4v2_MOD_LPSCBE1: + value->rValue = model->BSIM4v2lpscbe1; + return(OK); + case BSIM4v2_MOD_LPSCBE2: + value->rValue = model->BSIM4v2lpscbe2; + return(OK); + case BSIM4v2_MOD_LPVAG: + value->rValue = model->BSIM4v2lpvag; + return(OK); + case BSIM4v2_MOD_LWR: + value->rValue = model->BSIM4v2lwr; + return(OK); + case BSIM4v2_MOD_LDWG: + value->rValue = model->BSIM4v2ldwg; + return(OK); + case BSIM4v2_MOD_LDWB: + value->rValue = model->BSIM4v2ldwb; + return(OK); + case BSIM4v2_MOD_LB0: + value->rValue = model->BSIM4v2lb0; + return(OK); + case BSIM4v2_MOD_LB1: + value->rValue = model->BSIM4v2lb1; + return(OK); + case BSIM4v2_MOD_LALPHA0: + value->rValue = model->BSIM4v2lalpha0; + return(OK); + case BSIM4v2_MOD_LALPHA1: + value->rValue = model->BSIM4v2lalpha1; + return(OK); + case BSIM4v2_MOD_LBETA0: + value->rValue = model->BSIM4v2lbeta0; + return(OK); + case BSIM4v2_MOD_LAGIDL: + value->rValue = model->BSIM4v2lagidl; + return(OK); + case BSIM4v2_MOD_LBGIDL: + value->rValue = model->BSIM4v2lbgidl; + return(OK); + case BSIM4v2_MOD_LCGIDL: + value->rValue = model->BSIM4v2lcgidl; + return(OK); + case BSIM4v2_MOD_LEGIDL: + value->rValue = model->BSIM4v2legidl; + return(OK); + case BSIM4v2_MOD_LAIGC: + value->rValue = model->BSIM4v2laigc; + return(OK); + case BSIM4v2_MOD_LBIGC: + value->rValue = model->BSIM4v2lbigc; + return(OK); + case BSIM4v2_MOD_LCIGC: + value->rValue = model->BSIM4v2lcigc; + return(OK); + case BSIM4v2_MOD_LAIGSD: + value->rValue = model->BSIM4v2laigsd; + return(OK); + case BSIM4v2_MOD_LBIGSD: + value->rValue = model->BSIM4v2lbigsd; + return(OK); + case BSIM4v2_MOD_LCIGSD: + value->rValue = model->BSIM4v2lcigsd; + return(OK); + case BSIM4v2_MOD_LAIGBACC: + value->rValue = model->BSIM4v2laigbacc; + return(OK); + case BSIM4v2_MOD_LBIGBACC: + value->rValue = model->BSIM4v2lbigbacc; + return(OK); + case BSIM4v2_MOD_LCIGBACC: + value->rValue = model->BSIM4v2lcigbacc; + return(OK); + case BSIM4v2_MOD_LAIGBINV: + value->rValue = model->BSIM4v2laigbinv; + return(OK); + case BSIM4v2_MOD_LBIGBINV: + value->rValue = model->BSIM4v2lbigbinv; + return(OK); + case BSIM4v2_MOD_LCIGBINV: + value->rValue = model->BSIM4v2lcigbinv; + return(OK); + case BSIM4v2_MOD_LNIGC: + value->rValue = model->BSIM4v2lnigc; + return(OK); + case BSIM4v2_MOD_LNIGBACC: + value->rValue = model->BSIM4v2lnigbacc; + return(OK); + case BSIM4v2_MOD_LNIGBINV: + value->rValue = model->BSIM4v2lnigbinv; + return(OK); + case BSIM4v2_MOD_LNTOX: + value->rValue = model->BSIM4v2lntox; + return(OK); + case BSIM4v2_MOD_LEIGBINV: + value->rValue = model->BSIM4v2leigbinv; + return(OK); + case BSIM4v2_MOD_LPIGCD: + value->rValue = model->BSIM4v2lpigcd; + return(OK); + case BSIM4v2_MOD_LPOXEDGE: + value->rValue = model->BSIM4v2lpoxedge; + return(OK); + case BSIM4v2_MOD_LPHIN: + value->rValue = model->BSIM4v2lphin; + return(OK); + case BSIM4v2_MOD_LXRCRG1: + value->rValue = model->BSIM4v2lxrcrg1; + return(OK); + case BSIM4v2_MOD_LXRCRG2: + value->rValue = model->BSIM4v2lxrcrg2; + return(OK); + case BSIM4v2_MOD_LEU: + value->rValue = model->BSIM4v2leu; + return(OK); + case BSIM4v2_MOD_LVFB: + value->rValue = model->BSIM4v2lvfb; + return(OK); + + case BSIM4v2_MOD_LCGSL: + value->rValue = model->BSIM4v2lcgsl; + return(OK); + case BSIM4v2_MOD_LCGDL: + value->rValue = model->BSIM4v2lcgdl; + return(OK); + case BSIM4v2_MOD_LCKAPPAS: + value->rValue = model->BSIM4v2lckappas; + return(OK); + case BSIM4v2_MOD_LCKAPPAD: + value->rValue = model->BSIM4v2lckappad; + return(OK); + case BSIM4v2_MOD_LCF: + value->rValue = model->BSIM4v2lcf; + return(OK); + case BSIM4v2_MOD_LCLC: + value->rValue = model->BSIM4v2lclc; + return(OK); + case BSIM4v2_MOD_LCLE: + value->rValue = model->BSIM4v2lcle; + return(OK); + case BSIM4v2_MOD_LVFBCV: + value->rValue = model->BSIM4v2lvfbcv; + return(OK); + case BSIM4v2_MOD_LACDE: + value->rValue = model->BSIM4v2lacde; + return(OK); + case BSIM4v2_MOD_LMOIN: + value->rValue = model->BSIM4v2lmoin; + return(OK); + case BSIM4v2_MOD_LNOFF: + value->rValue = model->BSIM4v2lnoff; + return(OK); + case BSIM4v2_MOD_LVOFFCV: + value->rValue = model->BSIM4v2lvoffcv; + return(OK); + + /* Width dependence */ + case BSIM4v2_MOD_WCDSC : + value->rValue = model->BSIM4v2wcdsc; + return(OK); + case BSIM4v2_MOD_WCDSCB : + value->rValue = model->BSIM4v2wcdscb; + return(OK); + case BSIM4v2_MOD_WCDSCD : + value->rValue = model->BSIM4v2wcdscd; + return(OK); + case BSIM4v2_MOD_WCIT : + value->rValue = model->BSIM4v2wcit; + return(OK); + case BSIM4v2_MOD_WNFACTOR : + value->rValue = model->BSIM4v2wnfactor; + return(OK); + case BSIM4v2_MOD_WXJ: + value->rValue = model->BSIM4v2wxj; + return(OK); + case BSIM4v2_MOD_WVSAT: + value->rValue = model->BSIM4v2wvsat; + return(OK); + case BSIM4v2_MOD_WAT: + value->rValue = model->BSIM4v2wat; + return(OK); + case BSIM4v2_MOD_WA0: + value->rValue = model->BSIM4v2wa0; + return(OK); + case BSIM4v2_MOD_WAGS: + value->rValue = model->BSIM4v2wags; + return(OK); + case BSIM4v2_MOD_WA1: + value->rValue = model->BSIM4v2wa1; + return(OK); + case BSIM4v2_MOD_WA2: + value->rValue = model->BSIM4v2wa2; + return(OK); + case BSIM4v2_MOD_WKETA: + value->rValue = model->BSIM4v2wketa; + return(OK); + case BSIM4v2_MOD_WNSUB: + value->rValue = model->BSIM4v2wnsub; + return(OK); + case BSIM4v2_MOD_WNDEP: + value->rValue = model->BSIM4v2wndep; + return(OK); + case BSIM4v2_MOD_WNSD: + value->rValue = model->BSIM4v2wnsd; + return(OK); + case BSIM4v2_MOD_WNGATE: + value->rValue = model->BSIM4v2wngate; + return(OK); + case BSIM4v2_MOD_WGAMMA1: + value->rValue = model->BSIM4v2wgamma1; + return(OK); + case BSIM4v2_MOD_WGAMMA2: + value->rValue = model->BSIM4v2wgamma2; + return(OK); + case BSIM4v2_MOD_WVBX: + value->rValue = model->BSIM4v2wvbx; + return(OK); + case BSIM4v2_MOD_WVBM: + value->rValue = model->BSIM4v2wvbm; + return(OK); + case BSIM4v2_MOD_WXT: + value->rValue = model->BSIM4v2wxt; + return(OK); + case BSIM4v2_MOD_WK1: + value->rValue = model->BSIM4v2wk1; + return(OK); + case BSIM4v2_MOD_WKT1: + value->rValue = model->BSIM4v2wkt1; + return(OK); + case BSIM4v2_MOD_WKT1L: + value->rValue = model->BSIM4v2wkt1l; + return(OK); + case BSIM4v2_MOD_WKT2 : + value->rValue = model->BSIM4v2wkt2; + return(OK); + case BSIM4v2_MOD_WK2 : + value->rValue = model->BSIM4v2wk2; + return(OK); + case BSIM4v2_MOD_WK3: + value->rValue = model->BSIM4v2wk3; + return(OK); + case BSIM4v2_MOD_WK3B: + value->rValue = model->BSIM4v2wk3b; + return(OK); + case BSIM4v2_MOD_WW0: + value->rValue = model->BSIM4v2ww0; + return(OK); + case BSIM4v2_MOD_WLPE0: + value->rValue = model->BSIM4v2wlpe0; + return(OK); + case BSIM4v2_MOD_WDVTP0: + value->rValue = model->BSIM4v2wdvtp0; + return(OK); + case BSIM4v2_MOD_WDVTP1: + value->rValue = model->BSIM4v2wdvtp1; + return(OK); + case BSIM4v2_MOD_WLPEB: + value->rValue = model->BSIM4v2wlpeb; + return(OK); + case BSIM4v2_MOD_WDVT0: + value->rValue = model->BSIM4v2wdvt0; + return(OK); + case BSIM4v2_MOD_WDVT1 : + value->rValue = model->BSIM4v2wdvt1; + return(OK); + case BSIM4v2_MOD_WDVT2 : + value->rValue = model->BSIM4v2wdvt2; + return(OK); + case BSIM4v2_MOD_WDVT0W : + value->rValue = model->BSIM4v2wdvt0w; + return(OK); + case BSIM4v2_MOD_WDVT1W : + value->rValue = model->BSIM4v2wdvt1w; + return(OK); + case BSIM4v2_MOD_WDVT2W : + value->rValue = model->BSIM4v2wdvt2w; + return(OK); + case BSIM4v2_MOD_WDROUT : + value->rValue = model->BSIM4v2wdrout; + return(OK); + case BSIM4v2_MOD_WDSUB : + value->rValue = model->BSIM4v2wdsub; + return(OK); + case BSIM4v2_MOD_WVTH0: + value->rValue = model->BSIM4v2wvth0; + return(OK); + case BSIM4v2_MOD_WUA: + value->rValue = model->BSIM4v2wua; + return(OK); + case BSIM4v2_MOD_WUA1: + value->rValue = model->BSIM4v2wua1; + return(OK); + case BSIM4v2_MOD_WUB: + value->rValue = model->BSIM4v2wub; + return(OK); + case BSIM4v2_MOD_WUB1: + value->rValue = model->BSIM4v2wub1; + return(OK); + case BSIM4v2_MOD_WUC: + value->rValue = model->BSIM4v2wuc; + return(OK); + case BSIM4v2_MOD_WUC1: + value->rValue = model->BSIM4v2wuc1; + return(OK); + case BSIM4v2_MOD_WU0: + value->rValue = model->BSIM4v2wu0; + return(OK); + case BSIM4v2_MOD_WUTE: + value->rValue = model->BSIM4v2wute; + return(OK); + case BSIM4v2_MOD_WVOFF: + value->rValue = model->BSIM4v2wvoff; + return(OK); + case BSIM4v2_MOD_WMINV: + value->rValue = model->BSIM4v2wminv; + return(OK); + case BSIM4v2_MOD_WFPROUT: + value->rValue = model->BSIM4v2wfprout; + return(OK); + case BSIM4v2_MOD_WPDITS: + value->rValue = model->BSIM4v2wpdits; + return(OK); + case BSIM4v2_MOD_WPDITSD: + value->rValue = model->BSIM4v2wpditsd; + return(OK); + case BSIM4v2_MOD_WDELTA: + value->rValue = model->BSIM4v2wdelta; + return(OK); + case BSIM4v2_MOD_WRDSW: + value->rValue = model->BSIM4v2wrdsw; + return(OK); + case BSIM4v2_MOD_WRDW: + value->rValue = model->BSIM4v2wrdw; + return(OK); + case BSIM4v2_MOD_WRSW: + value->rValue = model->BSIM4v2wrsw; + return(OK); + case BSIM4v2_MOD_WPRWB: + value->rValue = model->BSIM4v2wprwb; + return(OK); + case BSIM4v2_MOD_WPRWG: + value->rValue = model->BSIM4v2wprwg; + return(OK); + case BSIM4v2_MOD_WPRT: + value->rValue = model->BSIM4v2wprt; + return(OK); + case BSIM4v2_MOD_WETA0: + value->rValue = model->BSIM4v2weta0; + return(OK); + case BSIM4v2_MOD_WETAB: + value->rValue = model->BSIM4v2wetab; + return(OK); + case BSIM4v2_MOD_WPCLM: + value->rValue = model->BSIM4v2wpclm; + return(OK); + case BSIM4v2_MOD_WPDIBL1: + value->rValue = model->BSIM4v2wpdibl1; + return(OK); + case BSIM4v2_MOD_WPDIBL2: + value->rValue = model->BSIM4v2wpdibl2; + return(OK); + case BSIM4v2_MOD_WPDIBLB: + value->rValue = model->BSIM4v2wpdiblb; + return(OK); + case BSIM4v2_MOD_WPSCBE1: + value->rValue = model->BSIM4v2wpscbe1; + return(OK); + case BSIM4v2_MOD_WPSCBE2: + value->rValue = model->BSIM4v2wpscbe2; + return(OK); + case BSIM4v2_MOD_WPVAG: + value->rValue = model->BSIM4v2wpvag; + return(OK); + case BSIM4v2_MOD_WWR: + value->rValue = model->BSIM4v2wwr; + return(OK); + case BSIM4v2_MOD_WDWG: + value->rValue = model->BSIM4v2wdwg; + return(OK); + case BSIM4v2_MOD_WDWB: + value->rValue = model->BSIM4v2wdwb; + return(OK); + case BSIM4v2_MOD_WB0: + value->rValue = model->BSIM4v2wb0; + return(OK); + case BSIM4v2_MOD_WB1: + value->rValue = model->BSIM4v2wb1; + return(OK); + case BSIM4v2_MOD_WALPHA0: + value->rValue = model->BSIM4v2walpha0; + return(OK); + case BSIM4v2_MOD_WALPHA1: + value->rValue = model->BSIM4v2walpha1; + return(OK); + case BSIM4v2_MOD_WBETA0: + value->rValue = model->BSIM4v2wbeta0; + return(OK); + case BSIM4v2_MOD_WAGIDL: + value->rValue = model->BSIM4v2wagidl; + return(OK); + case BSIM4v2_MOD_WBGIDL: + value->rValue = model->BSIM4v2wbgidl; + return(OK); + case BSIM4v2_MOD_WCGIDL: + value->rValue = model->BSIM4v2wcgidl; + return(OK); + case BSIM4v2_MOD_WEGIDL: + value->rValue = model->BSIM4v2wegidl; + return(OK); + case BSIM4v2_MOD_WAIGC: + value->rValue = model->BSIM4v2waigc; + return(OK); + case BSIM4v2_MOD_WBIGC: + value->rValue = model->BSIM4v2wbigc; + return(OK); + case BSIM4v2_MOD_WCIGC: + value->rValue = model->BSIM4v2wcigc; + return(OK); + case BSIM4v2_MOD_WAIGSD: + value->rValue = model->BSIM4v2waigsd; + return(OK); + case BSIM4v2_MOD_WBIGSD: + value->rValue = model->BSIM4v2wbigsd; + return(OK); + case BSIM4v2_MOD_WCIGSD: + value->rValue = model->BSIM4v2wcigsd; + return(OK); + case BSIM4v2_MOD_WAIGBACC: + value->rValue = model->BSIM4v2waigbacc; + return(OK); + case BSIM4v2_MOD_WBIGBACC: + value->rValue = model->BSIM4v2wbigbacc; + return(OK); + case BSIM4v2_MOD_WCIGBACC: + value->rValue = model->BSIM4v2wcigbacc; + return(OK); + case BSIM4v2_MOD_WAIGBINV: + value->rValue = model->BSIM4v2waigbinv; + return(OK); + case BSIM4v2_MOD_WBIGBINV: + value->rValue = model->BSIM4v2wbigbinv; + return(OK); + case BSIM4v2_MOD_WCIGBINV: + value->rValue = model->BSIM4v2wcigbinv; + return(OK); + case BSIM4v2_MOD_WNIGC: + value->rValue = model->BSIM4v2wnigc; + return(OK); + case BSIM4v2_MOD_WNIGBACC: + value->rValue = model->BSIM4v2wnigbacc; + return(OK); + case BSIM4v2_MOD_WNIGBINV: + value->rValue = model->BSIM4v2wnigbinv; + return(OK); + case BSIM4v2_MOD_WNTOX: + value->rValue = model->BSIM4v2wntox; + return(OK); + case BSIM4v2_MOD_WEIGBINV: + value->rValue = model->BSIM4v2weigbinv; + return(OK); + case BSIM4v2_MOD_WPIGCD: + value->rValue = model->BSIM4v2wpigcd; + return(OK); + case BSIM4v2_MOD_WPOXEDGE: + value->rValue = model->BSIM4v2wpoxedge; + return(OK); + case BSIM4v2_MOD_WPHIN: + value->rValue = model->BSIM4v2wphin; + return(OK); + case BSIM4v2_MOD_WXRCRG1: + value->rValue = model->BSIM4v2wxrcrg1; + return(OK); + case BSIM4v2_MOD_WXRCRG2: + value->rValue = model->BSIM4v2wxrcrg2; + return(OK); + case BSIM4v2_MOD_WEU: + value->rValue = model->BSIM4v2weu; + return(OK); + case BSIM4v2_MOD_WVFB: + value->rValue = model->BSIM4v2wvfb; + return(OK); + + case BSIM4v2_MOD_WCGSL: + value->rValue = model->BSIM4v2wcgsl; + return(OK); + case BSIM4v2_MOD_WCGDL: + value->rValue = model->BSIM4v2wcgdl; + return(OK); + case BSIM4v2_MOD_WCKAPPAS: + value->rValue = model->BSIM4v2wckappas; + return(OK); + case BSIM4v2_MOD_WCKAPPAD: + value->rValue = model->BSIM4v2wckappad; + return(OK); + case BSIM4v2_MOD_WCF: + value->rValue = model->BSIM4v2wcf; + return(OK); + case BSIM4v2_MOD_WCLC: + value->rValue = model->BSIM4v2wclc; + return(OK); + case BSIM4v2_MOD_WCLE: + value->rValue = model->BSIM4v2wcle; + return(OK); + case BSIM4v2_MOD_WVFBCV: + value->rValue = model->BSIM4v2wvfbcv; + return(OK); + case BSIM4v2_MOD_WACDE: + value->rValue = model->BSIM4v2wacde; + return(OK); + case BSIM4v2_MOD_WMOIN: + value->rValue = model->BSIM4v2wmoin; + return(OK); + case BSIM4v2_MOD_WNOFF: + value->rValue = model->BSIM4v2wnoff; + return(OK); + case BSIM4v2_MOD_WVOFFCV: + value->rValue = model->BSIM4v2wvoffcv; + return(OK); + + /* Cross-term dependence */ + case BSIM4v2_MOD_PCDSC : + value->rValue = model->BSIM4v2pcdsc; + return(OK); + case BSIM4v2_MOD_PCDSCB : + value->rValue = model->BSIM4v2pcdscb; + return(OK); + case BSIM4v2_MOD_PCDSCD : + value->rValue = model->BSIM4v2pcdscd; + return(OK); + case BSIM4v2_MOD_PCIT : + value->rValue = model->BSIM4v2pcit; + return(OK); + case BSIM4v2_MOD_PNFACTOR : + value->rValue = model->BSIM4v2pnfactor; + return(OK); + case BSIM4v2_MOD_PXJ: + value->rValue = model->BSIM4v2pxj; + return(OK); + case BSIM4v2_MOD_PVSAT: + value->rValue = model->BSIM4v2pvsat; + return(OK); + case BSIM4v2_MOD_PAT: + value->rValue = model->BSIM4v2pat; + return(OK); + case BSIM4v2_MOD_PA0: + value->rValue = model->BSIM4v2pa0; + return(OK); + case BSIM4v2_MOD_PAGS: + value->rValue = model->BSIM4v2pags; + return(OK); + case BSIM4v2_MOD_PA1: + value->rValue = model->BSIM4v2pa1; + return(OK); + case BSIM4v2_MOD_PA2: + value->rValue = model->BSIM4v2pa2; + return(OK); + case BSIM4v2_MOD_PKETA: + value->rValue = model->BSIM4v2pketa; + return(OK); + case BSIM4v2_MOD_PNSUB: + value->rValue = model->BSIM4v2pnsub; + return(OK); + case BSIM4v2_MOD_PNDEP: + value->rValue = model->BSIM4v2pndep; + return(OK); + case BSIM4v2_MOD_PNSD: + value->rValue = model->BSIM4v2pnsd; + return(OK); + case BSIM4v2_MOD_PNGATE: + value->rValue = model->BSIM4v2pngate; + return(OK); + case BSIM4v2_MOD_PGAMMA1: + value->rValue = model->BSIM4v2pgamma1; + return(OK); + case BSIM4v2_MOD_PGAMMA2: + value->rValue = model->BSIM4v2pgamma2; + return(OK); + case BSIM4v2_MOD_PVBX: + value->rValue = model->BSIM4v2pvbx; + return(OK); + case BSIM4v2_MOD_PVBM: + value->rValue = model->BSIM4v2pvbm; + return(OK); + case BSIM4v2_MOD_PXT: + value->rValue = model->BSIM4v2pxt; + return(OK); + case BSIM4v2_MOD_PK1: + value->rValue = model->BSIM4v2pk1; + return(OK); + case BSIM4v2_MOD_PKT1: + value->rValue = model->BSIM4v2pkt1; + return(OK); + case BSIM4v2_MOD_PKT1L: + value->rValue = model->BSIM4v2pkt1l; + return(OK); + case BSIM4v2_MOD_PKT2 : + value->rValue = model->BSIM4v2pkt2; + return(OK); + case BSIM4v2_MOD_PK2 : + value->rValue = model->BSIM4v2pk2; + return(OK); + case BSIM4v2_MOD_PK3: + value->rValue = model->BSIM4v2pk3; + return(OK); + case BSIM4v2_MOD_PK3B: + value->rValue = model->BSIM4v2pk3b; + return(OK); + case BSIM4v2_MOD_PW0: + value->rValue = model->BSIM4v2pw0; + return(OK); + case BSIM4v2_MOD_PLPE0: + value->rValue = model->BSIM4v2plpe0; + return(OK); + case BSIM4v2_MOD_PLPEB: + value->rValue = model->BSIM4v2plpeb; + return(OK); + case BSIM4v2_MOD_PDVTP0: + value->rValue = model->BSIM4v2pdvtp0; + return(OK); + case BSIM4v2_MOD_PDVTP1: + value->rValue = model->BSIM4v2pdvtp1; + return(OK); + case BSIM4v2_MOD_PDVT0 : + value->rValue = model->BSIM4v2pdvt0; + return(OK); + case BSIM4v2_MOD_PDVT1 : + value->rValue = model->BSIM4v2pdvt1; + return(OK); + case BSIM4v2_MOD_PDVT2 : + value->rValue = model->BSIM4v2pdvt2; + return(OK); + case BSIM4v2_MOD_PDVT0W : + value->rValue = model->BSIM4v2pdvt0w; + return(OK); + case BSIM4v2_MOD_PDVT1W : + value->rValue = model->BSIM4v2pdvt1w; + return(OK); + case BSIM4v2_MOD_PDVT2W : + value->rValue = model->BSIM4v2pdvt2w; + return(OK); + case BSIM4v2_MOD_PDROUT : + value->rValue = model->BSIM4v2pdrout; + return(OK); + case BSIM4v2_MOD_PDSUB : + value->rValue = model->BSIM4v2pdsub; + return(OK); + case BSIM4v2_MOD_PVTH0: + value->rValue = model->BSIM4v2pvth0; + return(OK); + case BSIM4v2_MOD_PUA: + value->rValue = model->BSIM4v2pua; + return(OK); + case BSIM4v2_MOD_PUA1: + value->rValue = model->BSIM4v2pua1; + return(OK); + case BSIM4v2_MOD_PUB: + value->rValue = model->BSIM4v2pub; + return(OK); + case BSIM4v2_MOD_PUB1: + value->rValue = model->BSIM4v2pub1; + return(OK); + case BSIM4v2_MOD_PUC: + value->rValue = model->BSIM4v2puc; + return(OK); + case BSIM4v2_MOD_PUC1: + value->rValue = model->BSIM4v2puc1; + return(OK); + case BSIM4v2_MOD_PU0: + value->rValue = model->BSIM4v2pu0; + return(OK); + case BSIM4v2_MOD_PUTE: + value->rValue = model->BSIM4v2pute; + return(OK); + case BSIM4v2_MOD_PVOFF: + value->rValue = model->BSIM4v2pvoff; + return(OK); + case BSIM4v2_MOD_PMINV: + value->rValue = model->BSIM4v2pminv; + return(OK); + case BSIM4v2_MOD_PFPROUT: + value->rValue = model->BSIM4v2pfprout; + return(OK); + case BSIM4v2_MOD_PPDITS: + value->rValue = model->BSIM4v2ppdits; + return(OK); + case BSIM4v2_MOD_PPDITSD: + value->rValue = model->BSIM4v2ppditsd; + return(OK); + case BSIM4v2_MOD_PDELTA: + value->rValue = model->BSIM4v2pdelta; + return(OK); + case BSIM4v2_MOD_PRDSW: + value->rValue = model->BSIM4v2prdsw; + return(OK); + case BSIM4v2_MOD_PRDW: + value->rValue = model->BSIM4v2prdw; + return(OK); + case BSIM4v2_MOD_PRSW: + value->rValue = model->BSIM4v2prsw; + return(OK); + case BSIM4v2_MOD_PPRWB: + value->rValue = model->BSIM4v2pprwb; + return(OK); + case BSIM4v2_MOD_PPRWG: + value->rValue = model->BSIM4v2pprwg; + return(OK); + case BSIM4v2_MOD_PPRT: + value->rValue = model->BSIM4v2pprt; + return(OK); + case BSIM4v2_MOD_PETA0: + value->rValue = model->BSIM4v2peta0; + return(OK); + case BSIM4v2_MOD_PETAB: + value->rValue = model->BSIM4v2petab; + return(OK); + case BSIM4v2_MOD_PPCLM: + value->rValue = model->BSIM4v2ppclm; + return(OK); + case BSIM4v2_MOD_PPDIBL1: + value->rValue = model->BSIM4v2ppdibl1; + return(OK); + case BSIM4v2_MOD_PPDIBL2: + value->rValue = model->BSIM4v2ppdibl2; + return(OK); + case BSIM4v2_MOD_PPDIBLB: + value->rValue = model->BSIM4v2ppdiblb; + return(OK); + case BSIM4v2_MOD_PPSCBE1: + value->rValue = model->BSIM4v2ppscbe1; + return(OK); + case BSIM4v2_MOD_PPSCBE2: + value->rValue = model->BSIM4v2ppscbe2; + return(OK); + case BSIM4v2_MOD_PPVAG: + value->rValue = model->BSIM4v2ppvag; + return(OK); + case BSIM4v2_MOD_PWR: + value->rValue = model->BSIM4v2pwr; + return(OK); + case BSIM4v2_MOD_PDWG: + value->rValue = model->BSIM4v2pdwg; + return(OK); + case BSIM4v2_MOD_PDWB: + value->rValue = model->BSIM4v2pdwb; + return(OK); + case BSIM4v2_MOD_PB0: + value->rValue = model->BSIM4v2pb0; + return(OK); + case BSIM4v2_MOD_PB1: + value->rValue = model->BSIM4v2pb1; + return(OK); + case BSIM4v2_MOD_PALPHA0: + value->rValue = model->BSIM4v2palpha0; + return(OK); + case BSIM4v2_MOD_PALPHA1: + value->rValue = model->BSIM4v2palpha1; + return(OK); + case BSIM4v2_MOD_PBETA0: + value->rValue = model->BSIM4v2pbeta0; + return(OK); + case BSIM4v2_MOD_PAGIDL: + value->rValue = model->BSIM4v2pagidl; + return(OK); + case BSIM4v2_MOD_PBGIDL: + value->rValue = model->BSIM4v2pbgidl; + return(OK); + case BSIM4v2_MOD_PCGIDL: + value->rValue = model->BSIM4v2pcgidl; + return(OK); + case BSIM4v2_MOD_PEGIDL: + value->rValue = model->BSIM4v2pegidl; + return(OK); + case BSIM4v2_MOD_PAIGC: + value->rValue = model->BSIM4v2paigc; + return(OK); + case BSIM4v2_MOD_PBIGC: + value->rValue = model->BSIM4v2pbigc; + return(OK); + case BSIM4v2_MOD_PCIGC: + value->rValue = model->BSIM4v2pcigc; + return(OK); + case BSIM4v2_MOD_PAIGSD: + value->rValue = model->BSIM4v2paigsd; + return(OK); + case BSIM4v2_MOD_PBIGSD: + value->rValue = model->BSIM4v2pbigsd; + return(OK); + case BSIM4v2_MOD_PCIGSD: + value->rValue = model->BSIM4v2pcigsd; + return(OK); + case BSIM4v2_MOD_PAIGBACC: + value->rValue = model->BSIM4v2paigbacc; + return(OK); + case BSIM4v2_MOD_PBIGBACC: + value->rValue = model->BSIM4v2pbigbacc; + return(OK); + case BSIM4v2_MOD_PCIGBACC: + value->rValue = model->BSIM4v2pcigbacc; + return(OK); + case BSIM4v2_MOD_PAIGBINV: + value->rValue = model->BSIM4v2paigbinv; + return(OK); + case BSIM4v2_MOD_PBIGBINV: + value->rValue = model->BSIM4v2pbigbinv; + return(OK); + case BSIM4v2_MOD_PCIGBINV: + value->rValue = model->BSIM4v2pcigbinv; + return(OK); + case BSIM4v2_MOD_PNIGC: + value->rValue = model->BSIM4v2pnigc; + return(OK); + case BSIM4v2_MOD_PNIGBACC: + value->rValue = model->BSIM4v2pnigbacc; + return(OK); + case BSIM4v2_MOD_PNIGBINV: + value->rValue = model->BSIM4v2pnigbinv; + return(OK); + case BSIM4v2_MOD_PNTOX: + value->rValue = model->BSIM4v2pntox; + return(OK); + case BSIM4v2_MOD_PEIGBINV: + value->rValue = model->BSIM4v2peigbinv; + return(OK); + case BSIM4v2_MOD_PPIGCD: + value->rValue = model->BSIM4v2ppigcd; + return(OK); + case BSIM4v2_MOD_PPOXEDGE: + value->rValue = model->BSIM4v2ppoxedge; + return(OK); + case BSIM4v2_MOD_PPHIN: + value->rValue = model->BSIM4v2pphin; + return(OK); + case BSIM4v2_MOD_PXRCRG1: + value->rValue = model->BSIM4v2pxrcrg1; + return(OK); + case BSIM4v2_MOD_PXRCRG2: + value->rValue = model->BSIM4v2pxrcrg2; + return(OK); + case BSIM4v2_MOD_PEU: + value->rValue = model->BSIM4v2peu; + return(OK); + case BSIM4v2_MOD_PVFB: + value->rValue = model->BSIM4v2pvfb; + return(OK); + + case BSIM4v2_MOD_PCGSL: + value->rValue = model->BSIM4v2pcgsl; + return(OK); + case BSIM4v2_MOD_PCGDL: + value->rValue = model->BSIM4v2pcgdl; + return(OK); + case BSIM4v2_MOD_PCKAPPAS: + value->rValue = model->BSIM4v2pckappas; + return(OK); + case BSIM4v2_MOD_PCKAPPAD: + value->rValue = model->BSIM4v2pckappad; + return(OK); + case BSIM4v2_MOD_PCF: + value->rValue = model->BSIM4v2pcf; + return(OK); + case BSIM4v2_MOD_PCLC: + value->rValue = model->BSIM4v2pclc; + return(OK); + case BSIM4v2_MOD_PCLE: + value->rValue = model->BSIM4v2pcle; + return(OK); + case BSIM4v2_MOD_PVFBCV: + value->rValue = model->BSIM4v2pvfbcv; + return(OK); + case BSIM4v2_MOD_PACDE: + value->rValue = model->BSIM4v2pacde; + return(OK); + case BSIM4v2_MOD_PMOIN: + value->rValue = model->BSIM4v2pmoin; + return(OK); + case BSIM4v2_MOD_PNOFF: + value->rValue = model->BSIM4v2pnoff; + return(OK); + case BSIM4v2_MOD_PVOFFCV: + value->rValue = model->BSIM4v2pvoffcv; + return(OK); + + case BSIM4v2_MOD_TNOM : + value->rValue = model->BSIM4v2tnom; + return(OK); + case BSIM4v2_MOD_CGSO: + value->rValue = model->BSIM4v2cgso; + return(OK); + case BSIM4v2_MOD_CGDO: + value->rValue = model->BSIM4v2cgdo; + return(OK); + case BSIM4v2_MOD_CGBO: + value->rValue = model->BSIM4v2cgbo; + return(OK); + case BSIM4v2_MOD_XPART: + value->rValue = model->BSIM4v2xpart; + return(OK); + case BSIM4v2_MOD_RSH: + value->rValue = model->BSIM4v2sheetResistance; + return(OK); + case BSIM4v2_MOD_JSS: + value->rValue = model->BSIM4v2SjctSatCurDensity; + return(OK); + case BSIM4v2_MOD_JSWS: + value->rValue = model->BSIM4v2SjctSidewallSatCurDensity; + return(OK); + case BSIM4v2_MOD_JSWGS: + value->rValue = model->BSIM4v2SjctGateSidewallSatCurDensity; + return(OK); + case BSIM4v2_MOD_PBS: + value->rValue = model->BSIM4v2SbulkJctPotential; + return(OK); + case BSIM4v2_MOD_MJS: + value->rValue = model->BSIM4v2SbulkJctBotGradingCoeff; + return(OK); + case BSIM4v2_MOD_PBSWS: + value->rValue = model->BSIM4v2SsidewallJctPotential; + return(OK); + case BSIM4v2_MOD_MJSWS: + value->rValue = model->BSIM4v2SbulkJctSideGradingCoeff; + return(OK); + case BSIM4v2_MOD_CJS: + value->rValue = model->BSIM4v2SunitAreaJctCap; + return(OK); + case BSIM4v2_MOD_CJSWS: + value->rValue = model->BSIM4v2SunitLengthSidewallJctCap; + return(OK); + case BSIM4v2_MOD_PBSWGS: + value->rValue = model->BSIM4v2SGatesidewallJctPotential; + return(OK); + case BSIM4v2_MOD_MJSWGS: + value->rValue = model->BSIM4v2SbulkJctGateSideGradingCoeff; + return(OK); + case BSIM4v2_MOD_CJSWGS: + value->rValue = model->BSIM4v2SunitLengthGateSidewallJctCap; + return(OK); + case BSIM4v2_MOD_NJS: + value->rValue = model->BSIM4v2SjctEmissionCoeff; + return(OK); + case BSIM4v2_MOD_XTIS: + value->rValue = model->BSIM4v2SjctTempExponent; + return(OK); + case BSIM4v2_MOD_JSD: + value->rValue = model->BSIM4v2DjctSatCurDensity; + return(OK); + case BSIM4v2_MOD_JSWD: + value->rValue = model->BSIM4v2DjctSidewallSatCurDensity; + return(OK); + case BSIM4v2_MOD_JSWGD: + value->rValue = model->BSIM4v2DjctGateSidewallSatCurDensity; + return(OK); + case BSIM4v2_MOD_PBD: + value->rValue = model->BSIM4v2DbulkJctPotential; + return(OK); + case BSIM4v2_MOD_MJD: + value->rValue = model->BSIM4v2DbulkJctBotGradingCoeff; + return(OK); + case BSIM4v2_MOD_PBSWD: + value->rValue = model->BSIM4v2DsidewallJctPotential; + return(OK); + case BSIM4v2_MOD_MJSWD: + value->rValue = model->BSIM4v2DbulkJctSideGradingCoeff; + return(OK); + case BSIM4v2_MOD_CJD: + value->rValue = model->BSIM4v2DunitAreaJctCap; + return(OK); + case BSIM4v2_MOD_CJSWD: + value->rValue = model->BSIM4v2DunitLengthSidewallJctCap; + return(OK); + case BSIM4v2_MOD_PBSWGD: + value->rValue = model->BSIM4v2DGatesidewallJctPotential; + return(OK); + case BSIM4v2_MOD_MJSWGD: + value->rValue = model->BSIM4v2DbulkJctGateSideGradingCoeff; + return(OK); + case BSIM4v2_MOD_CJSWGD: + value->rValue = model->BSIM4v2DunitLengthGateSidewallJctCap; + return(OK); + case BSIM4v2_MOD_NJD: + value->rValue = model->BSIM4v2DjctEmissionCoeff; + return(OK); + case BSIM4v2_MOD_XTID: + value->rValue = model->BSIM4v2DjctTempExponent; + return(OK); + case BSIM4v2_MOD_LINT: + value->rValue = model->BSIM4v2Lint; + return(OK); + case BSIM4v2_MOD_LL: + value->rValue = model->BSIM4v2Ll; + return(OK); + case BSIM4v2_MOD_LLC: + value->rValue = model->BSIM4v2Llc; + return(OK); + case BSIM4v2_MOD_LLN: + value->rValue = model->BSIM4v2Lln; + return(OK); + case BSIM4v2_MOD_LW: + value->rValue = model->BSIM4v2Lw; + return(OK); + case BSIM4v2_MOD_LWC: + value->rValue = model->BSIM4v2Lwc; + return(OK); + case BSIM4v2_MOD_LWN: + value->rValue = model->BSIM4v2Lwn; + return(OK); + case BSIM4v2_MOD_LWL: + value->rValue = model->BSIM4v2Lwl; + return(OK); + case BSIM4v2_MOD_LWLC: + value->rValue = model->BSIM4v2Lwlc; + return(OK); + case BSIM4v2_MOD_LMIN: + value->rValue = model->BSIM4v2Lmin; + return(OK); + case BSIM4v2_MOD_LMAX: + value->rValue = model->BSIM4v2Lmax; + return(OK); + case BSIM4v2_MOD_WINT: + value->rValue = model->BSIM4v2Wint; + return(OK); + case BSIM4v2_MOD_WL: + value->rValue = model->BSIM4v2Wl; + return(OK); + case BSIM4v2_MOD_WLC: + value->rValue = model->BSIM4v2Wlc; + return(OK); + case BSIM4v2_MOD_WLN: + value->rValue = model->BSIM4v2Wln; + return(OK); + case BSIM4v2_MOD_WW: + value->rValue = model->BSIM4v2Ww; + return(OK); + case BSIM4v2_MOD_WWC: + value->rValue = model->BSIM4v2Wwc; + return(OK); + case BSIM4v2_MOD_WWN: + value->rValue = model->BSIM4v2Wwn; + return(OK); + case BSIM4v2_MOD_WWL: + value->rValue = model->BSIM4v2Wwl; + return(OK); + case BSIM4v2_MOD_WWLC: + value->rValue = model->BSIM4v2Wwlc; + return(OK); + case BSIM4v2_MOD_WMIN: + value->rValue = model->BSIM4v2Wmin; + return(OK); + case BSIM4v2_MOD_WMAX: + value->rValue = model->BSIM4v2Wmax; + return(OK); + case BSIM4v2_MOD_NOIA: + value->rValue = model->BSIM4v2oxideTrapDensityA; + return(OK); + case BSIM4v2_MOD_NOIB: + value->rValue = model->BSIM4v2oxideTrapDensityB; + return(OK); + case BSIM4v2_MOD_NOIC: + value->rValue = model->BSIM4v2oxideTrapDensityC; + return(OK); + case BSIM4v2_MOD_EM: + value->rValue = model->BSIM4v2em; + return(OK); + case BSIM4v2_MOD_EF: + value->rValue = model->BSIM4v2ef; + return(OK); + case BSIM4v2_MOD_AF: + value->rValue = model->BSIM4v2af; + return(OK); + case BSIM4v2_MOD_KF: + value->rValue = model->BSIM4v2kf; + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + + + diff --git a/src/spicelib/devices/bsim4v2/b4v2mdel.c b/src/spicelib/devices/bsim4v2/b4v2mdel.c new file mode 100644 index 000000000..5fd4f6a86 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2mdel.c @@ -0,0 +1,47 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4mdel.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v2def.h" +#include "sperror.h" + + +int +BSIM4v2mDelete(inModel,modname,kill) +GENmodel **inModel; +IFuid modname; +GENmodel *kill; +{ +BSIM4v2model **model = (BSIM4v2model**)inModel; +BSIM4v2model *modfast = (BSIM4v2model*)kill; +BSIM4v2instance *here; +BSIM4v2instance *prev = NULL; +BSIM4v2model **oldmod; + + oldmod = model; + for (; *model ; model = &((*model)->BSIM4v2nextModel)) + { if ((*model)->BSIM4v2modName == modname || + (modfast && *model == modfast)) + goto delgot; + oldmod = model; + } + return(E_NOMOD); + +delgot: + *oldmod = (*model)->BSIM4v2nextModel; /* cut deleted device out of list */ + for (here = (*model)->BSIM4v2instances; here; here = here->BSIM4v2nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + FREE(*model); + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2mpar.c b/src/spicelib/devices/bsim4v2/b4v2mpar.c new file mode 100644 index 000000000..9d34f6267 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2mpar.c @@ -0,0 +1,2532 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4mpar.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * + * Modified by Xuemei Xi 04/06/2001 + **********/ + +#include "ngspice.h" +#include +#include "bsim4v2def.h" +#include "ifsim.h" +#include "sperror.h" +#include "const.h" + +int +BSIM4v2mParam(param,value,inMod) +int param; +IFvalue *value; +GENmodel *inMod; +{ + BSIM4v2model *mod = (BSIM4v2model*)inMod; + switch(param) + { case BSIM4v2_MOD_MOBMOD : + mod->BSIM4v2mobMod = value->iValue; + mod->BSIM4v2mobModGiven = TRUE; + break; + case BSIM4v2_MOD_BINUNIT : + mod->BSIM4v2binUnit = value->iValue; + mod->BSIM4v2binUnitGiven = TRUE; + break; + case BSIM4v2_MOD_PARAMCHK : + mod->BSIM4v2paramChk = value->iValue; + mod->BSIM4v2paramChkGiven = TRUE; + break; + case BSIM4v2_MOD_CAPMOD : + mod->BSIM4v2capMod = value->iValue; + mod->BSIM4v2capModGiven = TRUE; + break; + case BSIM4v2_MOD_DIOMOD : + mod->BSIM4v2dioMod = value->iValue; + mod->BSIM4v2dioModGiven = TRUE; + break; + case BSIM4v2_MOD_RDSMOD : + mod->BSIM4v2rdsMod = value->iValue; + mod->BSIM4v2rdsModGiven = TRUE; + break; + case BSIM4v2_MOD_TRNQSMOD : + mod->BSIM4v2trnqsMod = value->iValue; + mod->BSIM4v2trnqsModGiven = TRUE; + break; + case BSIM4v2_MOD_ACNQSMOD : + mod->BSIM4v2acnqsMod = value->iValue; + mod->BSIM4v2acnqsModGiven = TRUE; + break; + case BSIM4v2_MOD_RBODYMOD : + mod->BSIM4v2rbodyMod = value->iValue; + mod->BSIM4v2rbodyModGiven = TRUE; + break; + case BSIM4v2_MOD_RGATEMOD : + mod->BSIM4v2rgateMod = value->iValue; + mod->BSIM4v2rgateModGiven = TRUE; + break; + case BSIM4v2_MOD_PERMOD : + mod->BSIM4v2perMod = value->iValue; + mod->BSIM4v2perModGiven = TRUE; + break; + case BSIM4v2_MOD_GEOMOD : + mod->BSIM4v2geoMod = value->iValue; + mod->BSIM4v2geoModGiven = TRUE; + break; + case BSIM4v2_MOD_FNOIMOD : + mod->BSIM4v2fnoiMod = value->iValue; + mod->BSIM4v2fnoiModGiven = TRUE; + break; + case BSIM4v2_MOD_TNOIMOD : + mod->BSIM4v2tnoiMod = value->iValue; + mod->BSIM4v2tnoiModGiven = TRUE; + break; + case BSIM4v2_MOD_IGCMOD : + mod->BSIM4v2igcMod = value->iValue; + mod->BSIM4v2igcModGiven = TRUE; + break; + case BSIM4v2_MOD_IGBMOD : + mod->BSIM4v2igbMod = value->iValue; + mod->BSIM4v2igbModGiven = TRUE; + break; + case BSIM4v2_MOD_VERSION : + mod->BSIM4v2version = value->sValue; + mod->BSIM4v2versionGiven = TRUE; + break; + case BSIM4v2_MOD_TOXREF : + mod->BSIM4v2toxref = value->rValue; + mod->BSIM4v2toxrefGiven = TRUE; + break; + case BSIM4v2_MOD_TOXE : + mod->BSIM4v2toxe = value->rValue; + mod->BSIM4v2toxeGiven = TRUE; + break; + case BSIM4v2_MOD_TOXP : + mod->BSIM4v2toxp = value->rValue; + mod->BSIM4v2toxpGiven = TRUE; + break; + case BSIM4v2_MOD_TOXM : + mod->BSIM4v2toxm = value->rValue; + mod->BSIM4v2toxmGiven = TRUE; + break; + case BSIM4v2_MOD_DTOX : + mod->BSIM4v2dtox = value->rValue; + mod->BSIM4v2dtoxGiven = TRUE; + break; + case BSIM4v2_MOD_EPSROX : + mod->BSIM4v2epsrox = value->rValue; + mod->BSIM4v2epsroxGiven = TRUE; + break; + + case BSIM4v2_MOD_CDSC : + mod->BSIM4v2cdsc = value->rValue; + mod->BSIM4v2cdscGiven = TRUE; + break; + case BSIM4v2_MOD_CDSCB : + mod->BSIM4v2cdscb = value->rValue; + mod->BSIM4v2cdscbGiven = TRUE; + break; + + case BSIM4v2_MOD_CDSCD : + mod->BSIM4v2cdscd = value->rValue; + mod->BSIM4v2cdscdGiven = TRUE; + break; + + case BSIM4v2_MOD_CIT : + mod->BSIM4v2cit = value->rValue; + mod->BSIM4v2citGiven = TRUE; + break; + case BSIM4v2_MOD_NFACTOR : + mod->BSIM4v2nfactor = value->rValue; + mod->BSIM4v2nfactorGiven = TRUE; + break; + case BSIM4v2_MOD_XJ: + mod->BSIM4v2xj = value->rValue; + mod->BSIM4v2xjGiven = TRUE; + break; + case BSIM4v2_MOD_VSAT: + mod->BSIM4v2vsat = value->rValue; + mod->BSIM4v2vsatGiven = TRUE; + break; + case BSIM4v2_MOD_A0: + mod->BSIM4v2a0 = value->rValue; + mod->BSIM4v2a0Given = TRUE; + break; + + case BSIM4v2_MOD_AGS: + mod->BSIM4v2ags= value->rValue; + mod->BSIM4v2agsGiven = TRUE; + break; + + case BSIM4v2_MOD_A1: + mod->BSIM4v2a1 = value->rValue; + mod->BSIM4v2a1Given = TRUE; + break; + case BSIM4v2_MOD_A2: + mod->BSIM4v2a2 = value->rValue; + mod->BSIM4v2a2Given = TRUE; + break; + case BSIM4v2_MOD_AT: + mod->BSIM4v2at = value->rValue; + mod->BSIM4v2atGiven = TRUE; + break; + case BSIM4v2_MOD_KETA: + mod->BSIM4v2keta = value->rValue; + mod->BSIM4v2ketaGiven = TRUE; + break; + case BSIM4v2_MOD_NSUB: + mod->BSIM4v2nsub = value->rValue; + mod->BSIM4v2nsubGiven = TRUE; + break; + case BSIM4v2_MOD_NDEP: + mod->BSIM4v2ndep = value->rValue; + mod->BSIM4v2ndepGiven = TRUE; + if (mod->BSIM4v2ndep > 1.0e20) + mod->BSIM4v2ndep *= 1.0e-6; + break; + case BSIM4v2_MOD_NSD: + mod->BSIM4v2nsd = value->rValue; + mod->BSIM4v2nsdGiven = TRUE; + if (mod->BSIM4v2nsd > 1.0e23) + mod->BSIM4v2nsd *= 1.0e-6; + break; + case BSIM4v2_MOD_NGATE: + mod->BSIM4v2ngate = value->rValue; + mod->BSIM4v2ngateGiven = TRUE; + if (mod->BSIM4v2ngate > 1.0e23) + mod->BSIM4v2ngate *= 1.0e-6; + break; + case BSIM4v2_MOD_GAMMA1: + mod->BSIM4v2gamma1 = value->rValue; + mod->BSIM4v2gamma1Given = TRUE; + break; + case BSIM4v2_MOD_GAMMA2: + mod->BSIM4v2gamma2 = value->rValue; + mod->BSIM4v2gamma2Given = TRUE; + break; + case BSIM4v2_MOD_VBX: + mod->BSIM4v2vbx = value->rValue; + mod->BSIM4v2vbxGiven = TRUE; + break; + case BSIM4v2_MOD_VBM: + mod->BSIM4v2vbm = value->rValue; + mod->BSIM4v2vbmGiven = TRUE; + break; + case BSIM4v2_MOD_XT: + mod->BSIM4v2xt = value->rValue; + mod->BSIM4v2xtGiven = TRUE; + break; + case BSIM4v2_MOD_K1: + mod->BSIM4v2k1 = value->rValue; + mod->BSIM4v2k1Given = TRUE; + break; + case BSIM4v2_MOD_KT1: + mod->BSIM4v2kt1 = value->rValue; + mod->BSIM4v2kt1Given = TRUE; + break; + case BSIM4v2_MOD_KT1L: + mod->BSIM4v2kt1l = value->rValue; + mod->BSIM4v2kt1lGiven = TRUE; + break; + case BSIM4v2_MOD_KT2: + mod->BSIM4v2kt2 = value->rValue; + mod->BSIM4v2kt2Given = TRUE; + break; + case BSIM4v2_MOD_K2: + mod->BSIM4v2k2 = value->rValue; + mod->BSIM4v2k2Given = TRUE; + break; + case BSIM4v2_MOD_K3: + mod->BSIM4v2k3 = value->rValue; + mod->BSIM4v2k3Given = TRUE; + break; + case BSIM4v2_MOD_K3B: + mod->BSIM4v2k3b = value->rValue; + mod->BSIM4v2k3bGiven = TRUE; + break; + case BSIM4v2_MOD_LPE0: + mod->BSIM4v2lpe0 = value->rValue; + mod->BSIM4v2lpe0Given = TRUE; + break; + case BSIM4v2_MOD_LPEB: + mod->BSIM4v2lpeb = value->rValue; + mod->BSIM4v2lpebGiven = TRUE; + break; + case BSIM4v2_MOD_DVTP0: + mod->BSIM4v2dvtp0 = value->rValue; + mod->BSIM4v2dvtp0Given = TRUE; + break; + case BSIM4v2_MOD_DVTP1: + mod->BSIM4v2dvtp1 = value->rValue; + mod->BSIM4v2dvtp1Given = TRUE; + break; + case BSIM4v2_MOD_W0: + mod->BSIM4v2w0 = value->rValue; + mod->BSIM4v2w0Given = TRUE; + break; + case BSIM4v2_MOD_DVT0: + mod->BSIM4v2dvt0 = value->rValue; + mod->BSIM4v2dvt0Given = TRUE; + break; + case BSIM4v2_MOD_DVT1: + mod->BSIM4v2dvt1 = value->rValue; + mod->BSIM4v2dvt1Given = TRUE; + break; + case BSIM4v2_MOD_DVT2: + mod->BSIM4v2dvt2 = value->rValue; + mod->BSIM4v2dvt2Given = TRUE; + break; + case BSIM4v2_MOD_DVT0W: + mod->BSIM4v2dvt0w = value->rValue; + mod->BSIM4v2dvt0wGiven = TRUE; + break; + case BSIM4v2_MOD_DVT1W: + mod->BSIM4v2dvt1w = value->rValue; + mod->BSIM4v2dvt1wGiven = TRUE; + break; + case BSIM4v2_MOD_DVT2W: + mod->BSIM4v2dvt2w = value->rValue; + mod->BSIM4v2dvt2wGiven = TRUE; + break; + case BSIM4v2_MOD_DROUT: + mod->BSIM4v2drout = value->rValue; + mod->BSIM4v2droutGiven = TRUE; + break; + case BSIM4v2_MOD_DSUB: + mod->BSIM4v2dsub = value->rValue; + mod->BSIM4v2dsubGiven = TRUE; + break; + case BSIM4v2_MOD_VTH0: + mod->BSIM4v2vth0 = value->rValue; + mod->BSIM4v2vth0Given = TRUE; + break; + case BSIM4v2_MOD_EU: + mod->BSIM4v2eu = value->rValue; + mod->BSIM4v2euGiven = TRUE; + break; + case BSIM4v2_MOD_UA: + mod->BSIM4v2ua = value->rValue; + mod->BSIM4v2uaGiven = TRUE; + break; + case BSIM4v2_MOD_UA1: + mod->BSIM4v2ua1 = value->rValue; + mod->BSIM4v2ua1Given = TRUE; + break; + case BSIM4v2_MOD_UB: + mod->BSIM4v2ub = value->rValue; + mod->BSIM4v2ubGiven = TRUE; + break; + case BSIM4v2_MOD_UB1: + mod->BSIM4v2ub1 = value->rValue; + mod->BSIM4v2ub1Given = TRUE; + break; + case BSIM4v2_MOD_UC: + mod->BSIM4v2uc = value->rValue; + mod->BSIM4v2ucGiven = TRUE; + break; + case BSIM4v2_MOD_UC1: + mod->BSIM4v2uc1 = value->rValue; + mod->BSIM4v2uc1Given = TRUE; + break; + case BSIM4v2_MOD_U0 : + mod->BSIM4v2u0 = value->rValue; + mod->BSIM4v2u0Given = TRUE; + break; + case BSIM4v2_MOD_UTE : + mod->BSIM4v2ute = value->rValue; + mod->BSIM4v2uteGiven = TRUE; + break; + case BSIM4v2_MOD_VOFF: + mod->BSIM4v2voff = value->rValue; + mod->BSIM4v2voffGiven = TRUE; + break; + case BSIM4v2_MOD_VOFFL: + mod->BSIM4v2voffl = value->rValue; + mod->BSIM4v2vofflGiven = TRUE; + break; + case BSIM4v2_MOD_MINV: + mod->BSIM4v2minv = value->rValue; + mod->BSIM4v2minvGiven = TRUE; + break; + case BSIM4v2_MOD_FPROUT: + mod->BSIM4v2fprout = value->rValue; + mod->BSIM4v2fproutGiven = TRUE; + break; + case BSIM4v2_MOD_PDITS: + mod->BSIM4v2pdits = value->rValue; + mod->BSIM4v2pditsGiven = TRUE; + break; + case BSIM4v2_MOD_PDITSD: + mod->BSIM4v2pditsd = value->rValue; + mod->BSIM4v2pditsdGiven = TRUE; + break; + case BSIM4v2_MOD_PDITSL: + mod->BSIM4v2pditsl = value->rValue; + mod->BSIM4v2pditslGiven = TRUE; + break; + case BSIM4v2_MOD_DELTA : + mod->BSIM4v2delta = value->rValue; + mod->BSIM4v2deltaGiven = TRUE; + break; + case BSIM4v2_MOD_RDSW: + mod->BSIM4v2rdsw = value->rValue; + mod->BSIM4v2rdswGiven = TRUE; + break; + case BSIM4v2_MOD_RDSWMIN: + mod->BSIM4v2rdswmin = value->rValue; + mod->BSIM4v2rdswminGiven = TRUE; + break; + case BSIM4v2_MOD_RDWMIN: + mod->BSIM4v2rdwmin = value->rValue; + mod->BSIM4v2rdwminGiven = TRUE; + break; + case BSIM4v2_MOD_RSWMIN: + mod->BSIM4v2rswmin = value->rValue; + mod->BSIM4v2rswminGiven = TRUE; + break; + case BSIM4v2_MOD_RDW: + mod->BSIM4v2rdw = value->rValue; + mod->BSIM4v2rdwGiven = TRUE; + break; + case BSIM4v2_MOD_RSW: + mod->BSIM4v2rsw = value->rValue; + mod->BSIM4v2rswGiven = TRUE; + break; + case BSIM4v2_MOD_PRWG: + mod->BSIM4v2prwg = value->rValue; + mod->BSIM4v2prwgGiven = TRUE; + break; + case BSIM4v2_MOD_PRWB: + mod->BSIM4v2prwb = value->rValue; + mod->BSIM4v2prwbGiven = TRUE; + break; + case BSIM4v2_MOD_PRT: + mod->BSIM4v2prt = value->rValue; + mod->BSIM4v2prtGiven = TRUE; + break; + case BSIM4v2_MOD_ETA0: + mod->BSIM4v2eta0 = value->rValue; + mod->BSIM4v2eta0Given = TRUE; + break; + case BSIM4v2_MOD_ETAB: + mod->BSIM4v2etab = value->rValue; + mod->BSIM4v2etabGiven = TRUE; + break; + case BSIM4v2_MOD_PCLM: + mod->BSIM4v2pclm = value->rValue; + mod->BSIM4v2pclmGiven = TRUE; + break; + case BSIM4v2_MOD_PDIBL1: + mod->BSIM4v2pdibl1 = value->rValue; + mod->BSIM4v2pdibl1Given = TRUE; + break; + case BSIM4v2_MOD_PDIBL2: + mod->BSIM4v2pdibl2 = value->rValue; + mod->BSIM4v2pdibl2Given = TRUE; + break; + case BSIM4v2_MOD_PDIBLB: + mod->BSIM4v2pdiblb = value->rValue; + mod->BSIM4v2pdiblbGiven = TRUE; + break; + case BSIM4v2_MOD_PSCBE1: + mod->BSIM4v2pscbe1 = value->rValue; + mod->BSIM4v2pscbe1Given = TRUE; + break; + case BSIM4v2_MOD_PSCBE2: + mod->BSIM4v2pscbe2 = value->rValue; + mod->BSIM4v2pscbe2Given = TRUE; + break; + case BSIM4v2_MOD_PVAG: + mod->BSIM4v2pvag = value->rValue; + mod->BSIM4v2pvagGiven = TRUE; + break; + case BSIM4v2_MOD_WR : + mod->BSIM4v2wr = value->rValue; + mod->BSIM4v2wrGiven = TRUE; + break; + case BSIM4v2_MOD_DWG : + mod->BSIM4v2dwg = value->rValue; + mod->BSIM4v2dwgGiven = TRUE; + break; + case BSIM4v2_MOD_DWB : + mod->BSIM4v2dwb = value->rValue; + mod->BSIM4v2dwbGiven = TRUE; + break; + case BSIM4v2_MOD_B0 : + mod->BSIM4v2b0 = value->rValue; + mod->BSIM4v2b0Given = TRUE; + break; + case BSIM4v2_MOD_B1 : + mod->BSIM4v2b1 = value->rValue; + mod->BSIM4v2b1Given = TRUE; + break; + case BSIM4v2_MOD_ALPHA0 : + mod->BSIM4v2alpha0 = value->rValue; + mod->BSIM4v2alpha0Given = TRUE; + break; + case BSIM4v2_MOD_ALPHA1 : + mod->BSIM4v2alpha1 = value->rValue; + mod->BSIM4v2alpha1Given = TRUE; + break; + case BSIM4v2_MOD_AGIDL : + mod->BSIM4v2agidl = value->rValue; + mod->BSIM4v2agidlGiven = TRUE; + break; + case BSIM4v2_MOD_BGIDL : + mod->BSIM4v2bgidl = value->rValue; + mod->BSIM4v2bgidlGiven = TRUE; + break; + case BSIM4v2_MOD_CGIDL : + mod->BSIM4v2cgidl = value->rValue; + mod->BSIM4v2cgidlGiven = TRUE; + break; + case BSIM4v2_MOD_PHIN : + mod->BSIM4v2phin = value->rValue; + mod->BSIM4v2phinGiven = TRUE; + break; + case BSIM4v2_MOD_EGIDL : + mod->BSIM4v2egidl = value->rValue; + mod->BSIM4v2egidlGiven = TRUE; + break; + case BSIM4v2_MOD_AIGC : + mod->BSIM4v2aigc = value->rValue; + mod->BSIM4v2aigcGiven = TRUE; + break; + case BSIM4v2_MOD_BIGC : + mod->BSIM4v2bigc = value->rValue; + mod->BSIM4v2bigcGiven = TRUE; + break; + case BSIM4v2_MOD_CIGC : + mod->BSIM4v2cigc = value->rValue; + mod->BSIM4v2cigcGiven = TRUE; + break; + case BSIM4v2_MOD_AIGSD : + mod->BSIM4v2aigsd = value->rValue; + mod->BSIM4v2aigsdGiven = TRUE; + break; + case BSIM4v2_MOD_BIGSD : + mod->BSIM4v2bigsd = value->rValue; + mod->BSIM4v2bigsdGiven = TRUE; + break; + case BSIM4v2_MOD_CIGSD : + mod->BSIM4v2cigsd = value->rValue; + mod->BSIM4v2cigsdGiven = TRUE; + break; + case BSIM4v2_MOD_AIGBACC : + mod->BSIM4v2aigbacc = value->rValue; + mod->BSIM4v2aigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_BIGBACC : + mod->BSIM4v2bigbacc = value->rValue; + mod->BSIM4v2bigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_CIGBACC : + mod->BSIM4v2cigbacc = value->rValue; + mod->BSIM4v2cigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_AIGBINV : + mod->BSIM4v2aigbinv = value->rValue; + mod->BSIM4v2aigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_BIGBINV : + mod->BSIM4v2bigbinv = value->rValue; + mod->BSIM4v2bigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_CIGBINV : + mod->BSIM4v2cigbinv = value->rValue; + mod->BSIM4v2cigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_NIGC : + mod->BSIM4v2nigc = value->rValue; + mod->BSIM4v2nigcGiven = TRUE; + break; + case BSIM4v2_MOD_NIGBINV : + mod->BSIM4v2nigbinv = value->rValue; + mod->BSIM4v2nigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_NIGBACC : + mod->BSIM4v2nigbacc = value->rValue; + mod->BSIM4v2nigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_NTOX : + mod->BSIM4v2ntox = value->rValue; + mod->BSIM4v2ntoxGiven = TRUE; + break; + case BSIM4v2_MOD_EIGBINV : + mod->BSIM4v2eigbinv = value->rValue; + mod->BSIM4v2eigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_PIGCD : + mod->BSIM4v2pigcd = value->rValue; + mod->BSIM4v2pigcdGiven = TRUE; + break; + case BSIM4v2_MOD_POXEDGE : + mod->BSIM4v2poxedge = value->rValue; + mod->BSIM4v2poxedgeGiven = TRUE; + break; + case BSIM4v2_MOD_XRCRG1 : + mod->BSIM4v2xrcrg1 = value->rValue; + mod->BSIM4v2xrcrg1Given = TRUE; + break; + case BSIM4v2_MOD_TNOIA : + mod->BSIM4v2tnoia = value->rValue; + mod->BSIM4v2tnoiaGiven = TRUE; + break; + case BSIM4v2_MOD_TNOIB : + mod->BSIM4v2tnoib = value->rValue; + mod->BSIM4v2tnoibGiven = TRUE; + break; + case BSIM4v2_MOD_NTNOI : + mod->BSIM4v2ntnoi = value->rValue; + mod->BSIM4v2ntnoiGiven = TRUE; + break; + case BSIM4v2_MOD_XRCRG2 : + mod->BSIM4v2xrcrg2 = value->rValue; + mod->BSIM4v2xrcrg2Given = TRUE; + break; + case BSIM4v2_MOD_BETA0 : + mod->BSIM4v2beta0 = value->rValue; + mod->BSIM4v2beta0Given = TRUE; + break; + case BSIM4v2_MOD_IJTHDFWD : + mod->BSIM4v2ijthdfwd = value->rValue; + mod->BSIM4v2ijthdfwdGiven = TRUE; + break; + case BSIM4v2_MOD_IJTHSFWD : + mod->BSIM4v2ijthsfwd = value->rValue; + mod->BSIM4v2ijthsfwdGiven = TRUE; + break; + case BSIM4v2_MOD_IJTHDREV : + mod->BSIM4v2ijthdrev = value->rValue; + mod->BSIM4v2ijthdrevGiven = TRUE; + break; + case BSIM4v2_MOD_IJTHSREV : + mod->BSIM4v2ijthsrev = value->rValue; + mod->BSIM4v2ijthsrevGiven = TRUE; + break; + case BSIM4v2_MOD_XJBVD : + mod->BSIM4v2xjbvd = value->rValue; + mod->BSIM4v2xjbvdGiven = TRUE; + break; + case BSIM4v2_MOD_XJBVS : + mod->BSIM4v2xjbvs = value->rValue; + mod->BSIM4v2xjbvsGiven = TRUE; + break; + case BSIM4v2_MOD_BVD : + mod->BSIM4v2bvd = value->rValue; + mod->BSIM4v2bvdGiven = TRUE; + break; + case BSIM4v2_MOD_BVS : + mod->BSIM4v2bvs = value->rValue; + mod->BSIM4v2bvsGiven = TRUE; + break; + case BSIM4v2_MOD_VFB : + mod->BSIM4v2vfb = value->rValue; + mod->BSIM4v2vfbGiven = TRUE; + break; + + case BSIM4v2_MOD_GBMIN : + mod->BSIM4v2gbmin = value->rValue; + mod->BSIM4v2gbminGiven = TRUE; + break; + case BSIM4v2_MOD_RBDB : + mod->BSIM4v2rbdb = value->rValue; + mod->BSIM4v2rbdbGiven = TRUE; + break; + case BSIM4v2_MOD_RBPB : + mod->BSIM4v2rbpb = value->rValue; + mod->BSIM4v2rbpbGiven = TRUE; + break; + case BSIM4v2_MOD_RBSB : + mod->BSIM4v2rbsb = value->rValue; + mod->BSIM4v2rbsbGiven = TRUE; + break; + case BSIM4v2_MOD_RBPS : + mod->BSIM4v2rbps = value->rValue; + mod->BSIM4v2rbpsGiven = TRUE; + break; + case BSIM4v2_MOD_RBPD : + mod->BSIM4v2rbpd = value->rValue; + mod->BSIM4v2rbpdGiven = TRUE; + break; + + case BSIM4v2_MOD_CGSL : + mod->BSIM4v2cgsl = value->rValue; + mod->BSIM4v2cgslGiven = TRUE; + break; + case BSIM4v2_MOD_CGDL : + mod->BSIM4v2cgdl = value->rValue; + mod->BSIM4v2cgdlGiven = TRUE; + break; + case BSIM4v2_MOD_CKAPPAS : + mod->BSIM4v2ckappas = value->rValue; + mod->BSIM4v2ckappasGiven = TRUE; + break; + case BSIM4v2_MOD_CKAPPAD : + mod->BSIM4v2ckappad = value->rValue; + mod->BSIM4v2ckappadGiven = TRUE; + break; + case BSIM4v2_MOD_CF : + mod->BSIM4v2cf = value->rValue; + mod->BSIM4v2cfGiven = TRUE; + break; + case BSIM4v2_MOD_CLC : + mod->BSIM4v2clc = value->rValue; + mod->BSIM4v2clcGiven = TRUE; + break; + case BSIM4v2_MOD_CLE : + mod->BSIM4v2cle = value->rValue; + mod->BSIM4v2cleGiven = TRUE; + break; + case BSIM4v2_MOD_DWC : + mod->BSIM4v2dwc = value->rValue; + mod->BSIM4v2dwcGiven = TRUE; + break; + case BSIM4v2_MOD_DLC : + mod->BSIM4v2dlc = value->rValue; + mod->BSIM4v2dlcGiven = TRUE; + break; + case BSIM4v2_MOD_XW : + mod->BSIM4v2xw = value->rValue; + mod->BSIM4v2xwGiven = TRUE; + break; + case BSIM4v2_MOD_XL : + mod->BSIM4v2xl = value->rValue; + mod->BSIM4v2xlGiven = TRUE; + break; + case BSIM4v2_MOD_DLCIG : + mod->BSIM4v2dlcig = value->rValue; + mod->BSIM4v2dlcigGiven = TRUE; + break; + case BSIM4v2_MOD_DWJ : + mod->BSIM4v2dwj = value->rValue; + mod->BSIM4v2dwjGiven = TRUE; + break; + case BSIM4v2_MOD_VFBCV : + mod->BSIM4v2vfbcv = value->rValue; + mod->BSIM4v2vfbcvGiven = TRUE; + break; + case BSIM4v2_MOD_ACDE : + mod->BSIM4v2acde = value->rValue; + mod->BSIM4v2acdeGiven = TRUE; + break; + case BSIM4v2_MOD_MOIN : + mod->BSIM4v2moin = value->rValue; + mod->BSIM4v2moinGiven = TRUE; + break; + case BSIM4v2_MOD_NOFF : + mod->BSIM4v2noff = value->rValue; + mod->BSIM4v2noffGiven = TRUE; + break; + case BSIM4v2_MOD_VOFFCV : + mod->BSIM4v2voffcv = value->rValue; + mod->BSIM4v2voffcvGiven = TRUE; + break; + case BSIM4v2_MOD_DMCG : + mod->BSIM4v2dmcg = value->rValue; + mod->BSIM4v2dmcgGiven = TRUE; + break; + case BSIM4v2_MOD_DMCI : + mod->BSIM4v2dmci = value->rValue; + mod->BSIM4v2dmciGiven = TRUE; + break; + case BSIM4v2_MOD_DMDG : + mod->BSIM4v2dmdg = value->rValue; + mod->BSIM4v2dmdgGiven = TRUE; + break; + case BSIM4v2_MOD_DMCGT : + mod->BSIM4v2dmcgt = value->rValue; + mod->BSIM4v2dmcgtGiven = TRUE; + break; + case BSIM4v2_MOD_XGW : + mod->BSIM4v2xgw = value->rValue; + mod->BSIM4v2xgwGiven = TRUE; + break; + case BSIM4v2_MOD_XGL : + mod->BSIM4v2xgl = value->rValue; + mod->BSIM4v2xglGiven = TRUE; + break; + case BSIM4v2_MOD_RSHG : + mod->BSIM4v2rshg = value->rValue; + mod->BSIM4v2rshgGiven = TRUE; + break; + case BSIM4v2_MOD_NGCON : + mod->BSIM4v2ngcon = value->rValue; + mod->BSIM4v2ngconGiven = TRUE; + break; + case BSIM4v2_MOD_TCJ : + mod->BSIM4v2tcj = value->rValue; + mod->BSIM4v2tcjGiven = TRUE; + break; + case BSIM4v2_MOD_TPB : + mod->BSIM4v2tpb = value->rValue; + mod->BSIM4v2tpbGiven = TRUE; + break; + case BSIM4v2_MOD_TCJSW : + mod->BSIM4v2tcjsw = value->rValue; + mod->BSIM4v2tcjswGiven = TRUE; + break; + case BSIM4v2_MOD_TPBSW : + mod->BSIM4v2tpbsw = value->rValue; + mod->BSIM4v2tpbswGiven = TRUE; + break; + case BSIM4v2_MOD_TCJSWG : + mod->BSIM4v2tcjswg = value->rValue; + mod->BSIM4v2tcjswgGiven = TRUE; + break; + case BSIM4v2_MOD_TPBSWG : + mod->BSIM4v2tpbswg = value->rValue; + mod->BSIM4v2tpbswgGiven = TRUE; + break; + + /* Length dependence */ + case BSIM4v2_MOD_LCDSC : + mod->BSIM4v2lcdsc = value->rValue; + mod->BSIM4v2lcdscGiven = TRUE; + break; + + + case BSIM4v2_MOD_LCDSCB : + mod->BSIM4v2lcdscb = value->rValue; + mod->BSIM4v2lcdscbGiven = TRUE; + break; + case BSIM4v2_MOD_LCDSCD : + mod->BSIM4v2lcdscd = value->rValue; + mod->BSIM4v2lcdscdGiven = TRUE; + break; + case BSIM4v2_MOD_LCIT : + mod->BSIM4v2lcit = value->rValue; + mod->BSIM4v2lcitGiven = TRUE; + break; + case BSIM4v2_MOD_LNFACTOR : + mod->BSIM4v2lnfactor = value->rValue; + mod->BSIM4v2lnfactorGiven = TRUE; + break; + case BSIM4v2_MOD_LXJ: + mod->BSIM4v2lxj = value->rValue; + mod->BSIM4v2lxjGiven = TRUE; + break; + case BSIM4v2_MOD_LVSAT: + mod->BSIM4v2lvsat = value->rValue; + mod->BSIM4v2lvsatGiven = TRUE; + break; + + + case BSIM4v2_MOD_LA0: + mod->BSIM4v2la0 = value->rValue; + mod->BSIM4v2la0Given = TRUE; + break; + case BSIM4v2_MOD_LAGS: + mod->BSIM4v2lags = value->rValue; + mod->BSIM4v2lagsGiven = TRUE; + break; + case BSIM4v2_MOD_LA1: + mod->BSIM4v2la1 = value->rValue; + mod->BSIM4v2la1Given = TRUE; + break; + case BSIM4v2_MOD_LA2: + mod->BSIM4v2la2 = value->rValue; + mod->BSIM4v2la2Given = TRUE; + break; + case BSIM4v2_MOD_LAT: + mod->BSIM4v2lat = value->rValue; + mod->BSIM4v2latGiven = TRUE; + break; + case BSIM4v2_MOD_LKETA: + mod->BSIM4v2lketa = value->rValue; + mod->BSIM4v2lketaGiven = TRUE; + break; + case BSIM4v2_MOD_LNSUB: + mod->BSIM4v2lnsub = value->rValue; + mod->BSIM4v2lnsubGiven = TRUE; + break; + case BSIM4v2_MOD_LNDEP: + mod->BSIM4v2lndep = value->rValue; + mod->BSIM4v2lndepGiven = TRUE; + if (mod->BSIM4v2lndep > 1.0e20) + mod->BSIM4v2lndep *= 1.0e-6; + break; + case BSIM4v2_MOD_LNSD: + mod->BSIM4v2lnsd = value->rValue; + mod->BSIM4v2lnsdGiven = TRUE; + if (mod->BSIM4v2lnsd > 1.0e23) + mod->BSIM4v2lnsd *= 1.0e-6; + break; + case BSIM4v2_MOD_LNGATE: + mod->BSIM4v2lngate = value->rValue; + mod->BSIM4v2lngateGiven = TRUE; + if (mod->BSIM4v2lngate > 1.0e23) + mod->BSIM4v2lngate *= 1.0e-6; + break; + case BSIM4v2_MOD_LGAMMA1: + mod->BSIM4v2lgamma1 = value->rValue; + mod->BSIM4v2lgamma1Given = TRUE; + break; + case BSIM4v2_MOD_LGAMMA2: + mod->BSIM4v2lgamma2 = value->rValue; + mod->BSIM4v2lgamma2Given = TRUE; + break; + case BSIM4v2_MOD_LVBX: + mod->BSIM4v2lvbx = value->rValue; + mod->BSIM4v2lvbxGiven = TRUE; + break; + case BSIM4v2_MOD_LVBM: + mod->BSIM4v2lvbm = value->rValue; + mod->BSIM4v2lvbmGiven = TRUE; + break; + case BSIM4v2_MOD_LXT: + mod->BSIM4v2lxt = value->rValue; + mod->BSIM4v2lxtGiven = TRUE; + break; + case BSIM4v2_MOD_LK1: + mod->BSIM4v2lk1 = value->rValue; + mod->BSIM4v2lk1Given = TRUE; + break; + case BSIM4v2_MOD_LKT1: + mod->BSIM4v2lkt1 = value->rValue; + mod->BSIM4v2lkt1Given = TRUE; + break; + case BSIM4v2_MOD_LKT1L: + mod->BSIM4v2lkt1l = value->rValue; + mod->BSIM4v2lkt1lGiven = TRUE; + break; + case BSIM4v2_MOD_LKT2: + mod->BSIM4v2lkt2 = value->rValue; + mod->BSIM4v2lkt2Given = TRUE; + break; + case BSIM4v2_MOD_LK2: + mod->BSIM4v2lk2 = value->rValue; + mod->BSIM4v2lk2Given = TRUE; + break; + case BSIM4v2_MOD_LK3: + mod->BSIM4v2lk3 = value->rValue; + mod->BSIM4v2lk3Given = TRUE; + break; + case BSIM4v2_MOD_LK3B: + mod->BSIM4v2lk3b = value->rValue; + mod->BSIM4v2lk3bGiven = TRUE; + break; + case BSIM4v2_MOD_LLPE0: + mod->BSIM4v2llpe0 = value->rValue; + mod->BSIM4v2llpe0Given = TRUE; + break; + case BSIM4v2_MOD_LLPEB: + mod->BSIM4v2llpeb = value->rValue; + mod->BSIM4v2llpebGiven = TRUE; + break; + case BSIM4v2_MOD_LDVTP0: + mod->BSIM4v2ldvtp0 = value->rValue; + mod->BSIM4v2ldvtp0Given = TRUE; + break; + case BSIM4v2_MOD_LDVTP1: + mod->BSIM4v2ldvtp1 = value->rValue; + mod->BSIM4v2ldvtp1Given = TRUE; + break; + case BSIM4v2_MOD_LW0: + mod->BSIM4v2lw0 = value->rValue; + mod->BSIM4v2lw0Given = TRUE; + break; + case BSIM4v2_MOD_LDVT0: + mod->BSIM4v2ldvt0 = value->rValue; + mod->BSIM4v2ldvt0Given = TRUE; + break; + case BSIM4v2_MOD_LDVT1: + mod->BSIM4v2ldvt1 = value->rValue; + mod->BSIM4v2ldvt1Given = TRUE; + break; + case BSIM4v2_MOD_LDVT2: + mod->BSIM4v2ldvt2 = value->rValue; + mod->BSIM4v2ldvt2Given = TRUE; + break; + case BSIM4v2_MOD_LDVT0W: + mod->BSIM4v2ldvt0w = value->rValue; + mod->BSIM4v2ldvt0wGiven = TRUE; + break; + case BSIM4v2_MOD_LDVT1W: + mod->BSIM4v2ldvt1w = value->rValue; + mod->BSIM4v2ldvt1wGiven = TRUE; + break; + case BSIM4v2_MOD_LDVT2W: + mod->BSIM4v2ldvt2w = value->rValue; + mod->BSIM4v2ldvt2wGiven = TRUE; + break; + case BSIM4v2_MOD_LDROUT: + mod->BSIM4v2ldrout = value->rValue; + mod->BSIM4v2ldroutGiven = TRUE; + break; + case BSIM4v2_MOD_LDSUB: + mod->BSIM4v2ldsub = value->rValue; + mod->BSIM4v2ldsubGiven = TRUE; + break; + case BSIM4v2_MOD_LVTH0: + mod->BSIM4v2lvth0 = value->rValue; + mod->BSIM4v2lvth0Given = TRUE; + break; + case BSIM4v2_MOD_LUA: + mod->BSIM4v2lua = value->rValue; + mod->BSIM4v2luaGiven = TRUE; + break; + case BSIM4v2_MOD_LUA1: + mod->BSIM4v2lua1 = value->rValue; + mod->BSIM4v2lua1Given = TRUE; + break; + case BSIM4v2_MOD_LUB: + mod->BSIM4v2lub = value->rValue; + mod->BSIM4v2lubGiven = TRUE; + break; + case BSIM4v2_MOD_LUB1: + mod->BSIM4v2lub1 = value->rValue; + mod->BSIM4v2lub1Given = TRUE; + break; + case BSIM4v2_MOD_LUC: + mod->BSIM4v2luc = value->rValue; + mod->BSIM4v2lucGiven = TRUE; + break; + case BSIM4v2_MOD_LUC1: + mod->BSIM4v2luc1 = value->rValue; + mod->BSIM4v2luc1Given = TRUE; + break; + case BSIM4v2_MOD_LU0 : + mod->BSIM4v2lu0 = value->rValue; + mod->BSIM4v2lu0Given = TRUE; + break; + case BSIM4v2_MOD_LUTE : + mod->BSIM4v2lute = value->rValue; + mod->BSIM4v2luteGiven = TRUE; + break; + case BSIM4v2_MOD_LVOFF: + mod->BSIM4v2lvoff = value->rValue; + mod->BSIM4v2lvoffGiven = TRUE; + break; + case BSIM4v2_MOD_LMINV: + mod->BSIM4v2lminv = value->rValue; + mod->BSIM4v2lminvGiven = TRUE; + break; + case BSIM4v2_MOD_LFPROUT: + mod->BSIM4v2lfprout = value->rValue; + mod->BSIM4v2lfproutGiven = TRUE; + break; + case BSIM4v2_MOD_LPDITS: + mod->BSIM4v2lpdits = value->rValue; + mod->BSIM4v2lpditsGiven = TRUE; + break; + case BSIM4v2_MOD_LPDITSD: + mod->BSIM4v2lpditsd = value->rValue; + mod->BSIM4v2lpditsdGiven = TRUE; + break; + case BSIM4v2_MOD_LDELTA : + mod->BSIM4v2ldelta = value->rValue; + mod->BSIM4v2ldeltaGiven = TRUE; + break; + case BSIM4v2_MOD_LRDSW: + mod->BSIM4v2lrdsw = value->rValue; + mod->BSIM4v2lrdswGiven = TRUE; + break; + case BSIM4v2_MOD_LRDW: + mod->BSIM4v2lrdw = value->rValue; + mod->BSIM4v2lrdwGiven = TRUE; + break; + case BSIM4v2_MOD_LRSW: + mod->BSIM4v2lrsw = value->rValue; + mod->BSIM4v2lrswGiven = TRUE; + break; + case BSIM4v2_MOD_LPRWB: + mod->BSIM4v2lprwb = value->rValue; + mod->BSIM4v2lprwbGiven = TRUE; + break; + case BSIM4v2_MOD_LPRWG: + mod->BSIM4v2lprwg = value->rValue; + mod->BSIM4v2lprwgGiven = TRUE; + break; + case BSIM4v2_MOD_LPRT: + mod->BSIM4v2lprt = value->rValue; + mod->BSIM4v2lprtGiven = TRUE; + break; + case BSIM4v2_MOD_LETA0: + mod->BSIM4v2leta0 = value->rValue; + mod->BSIM4v2leta0Given = TRUE; + break; + case BSIM4v2_MOD_LETAB: + mod->BSIM4v2letab = value->rValue; + mod->BSIM4v2letabGiven = TRUE; + break; + case BSIM4v2_MOD_LPCLM: + mod->BSIM4v2lpclm = value->rValue; + mod->BSIM4v2lpclmGiven = TRUE; + break; + case BSIM4v2_MOD_LPDIBL1: + mod->BSIM4v2lpdibl1 = value->rValue; + mod->BSIM4v2lpdibl1Given = TRUE; + break; + case BSIM4v2_MOD_LPDIBL2: + mod->BSIM4v2lpdibl2 = value->rValue; + mod->BSIM4v2lpdibl2Given = TRUE; + break; + case BSIM4v2_MOD_LPDIBLB: + mod->BSIM4v2lpdiblb = value->rValue; + mod->BSIM4v2lpdiblbGiven = TRUE; + break; + case BSIM4v2_MOD_LPSCBE1: + mod->BSIM4v2lpscbe1 = value->rValue; + mod->BSIM4v2lpscbe1Given = TRUE; + break; + case BSIM4v2_MOD_LPSCBE2: + mod->BSIM4v2lpscbe2 = value->rValue; + mod->BSIM4v2lpscbe2Given = TRUE; + break; + case BSIM4v2_MOD_LPVAG: + mod->BSIM4v2lpvag = value->rValue; + mod->BSIM4v2lpvagGiven = TRUE; + break; + case BSIM4v2_MOD_LWR : + mod->BSIM4v2lwr = value->rValue; + mod->BSIM4v2lwrGiven = TRUE; + break; + case BSIM4v2_MOD_LDWG : + mod->BSIM4v2ldwg = value->rValue; + mod->BSIM4v2ldwgGiven = TRUE; + break; + case BSIM4v2_MOD_LDWB : + mod->BSIM4v2ldwb = value->rValue; + mod->BSIM4v2ldwbGiven = TRUE; + break; + case BSIM4v2_MOD_LB0 : + mod->BSIM4v2lb0 = value->rValue; + mod->BSIM4v2lb0Given = TRUE; + break; + case BSIM4v2_MOD_LB1 : + mod->BSIM4v2lb1 = value->rValue; + mod->BSIM4v2lb1Given = TRUE; + break; + case BSIM4v2_MOD_LALPHA0 : + mod->BSIM4v2lalpha0 = value->rValue; + mod->BSIM4v2lalpha0Given = TRUE; + break; + case BSIM4v2_MOD_LALPHA1 : + mod->BSIM4v2lalpha1 = value->rValue; + mod->BSIM4v2lalpha1Given = TRUE; + break; + case BSIM4v2_MOD_LBETA0 : + mod->BSIM4v2lbeta0 = value->rValue; + mod->BSIM4v2lbeta0Given = TRUE; + break; + case BSIM4v2_MOD_LAGIDL : + mod->BSIM4v2lagidl = value->rValue; + mod->BSIM4v2lagidlGiven = TRUE; + break; + case BSIM4v2_MOD_LBGIDL : + mod->BSIM4v2lbgidl = value->rValue; + mod->BSIM4v2lbgidlGiven = TRUE; + break; + case BSIM4v2_MOD_LCGIDL : + mod->BSIM4v2lcgidl = value->rValue; + mod->BSIM4v2lcgidlGiven = TRUE; + break; + case BSIM4v2_MOD_LPHIN : + mod->BSIM4v2lphin = value->rValue; + mod->BSIM4v2lphinGiven = TRUE; + break; + case BSIM4v2_MOD_LEGIDL : + mod->BSIM4v2legidl = value->rValue; + mod->BSIM4v2legidlGiven = TRUE; + break; + case BSIM4v2_MOD_LAIGC : + mod->BSIM4v2laigc = value->rValue; + mod->BSIM4v2laigcGiven = TRUE; + break; + case BSIM4v2_MOD_LBIGC : + mod->BSIM4v2lbigc = value->rValue; + mod->BSIM4v2lbigcGiven = TRUE; + break; + case BSIM4v2_MOD_LCIGC : + mod->BSIM4v2lcigc = value->rValue; + mod->BSIM4v2lcigcGiven = TRUE; + break; + case BSIM4v2_MOD_LAIGSD : + mod->BSIM4v2laigsd = value->rValue; + mod->BSIM4v2laigsdGiven = TRUE; + break; + case BSIM4v2_MOD_LBIGSD : + mod->BSIM4v2lbigsd = value->rValue; + mod->BSIM4v2lbigsdGiven = TRUE; + break; + case BSIM4v2_MOD_LCIGSD : + mod->BSIM4v2lcigsd = value->rValue; + mod->BSIM4v2lcigsdGiven = TRUE; + break; + case BSIM4v2_MOD_LAIGBACC : + mod->BSIM4v2laigbacc = value->rValue; + mod->BSIM4v2laigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_LBIGBACC : + mod->BSIM4v2lbigbacc = value->rValue; + mod->BSIM4v2lbigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_LCIGBACC : + mod->BSIM4v2lcigbacc = value->rValue; + mod->BSIM4v2lcigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_LAIGBINV : + mod->BSIM4v2laigbinv = value->rValue; + mod->BSIM4v2laigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_LBIGBINV : + mod->BSIM4v2lbigbinv = value->rValue; + mod->BSIM4v2lbigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_LCIGBINV : + mod->BSIM4v2lcigbinv = value->rValue; + mod->BSIM4v2lcigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_LNIGC : + mod->BSIM4v2lnigc = value->rValue; + mod->BSIM4v2lnigcGiven = TRUE; + break; + case BSIM4v2_MOD_LNIGBINV : + mod->BSIM4v2lnigbinv = value->rValue; + mod->BSIM4v2lnigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_LNIGBACC : + mod->BSIM4v2lnigbacc = value->rValue; + mod->BSIM4v2lnigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_LNTOX : + mod->BSIM4v2lntox = value->rValue; + mod->BSIM4v2lntoxGiven = TRUE; + break; + case BSIM4v2_MOD_LEIGBINV : + mod->BSIM4v2leigbinv = value->rValue; + mod->BSIM4v2leigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_LPIGCD : + mod->BSIM4v2lpigcd = value->rValue; + mod->BSIM4v2lpigcdGiven = TRUE; + break; + case BSIM4v2_MOD_LPOXEDGE : + mod->BSIM4v2lpoxedge = value->rValue; + mod->BSIM4v2lpoxedgeGiven = TRUE; + break; + case BSIM4v2_MOD_LXRCRG1 : + mod->BSIM4v2lxrcrg1 = value->rValue; + mod->BSIM4v2lxrcrg1Given = TRUE; + break; + case BSIM4v2_MOD_LXRCRG2 : + mod->BSIM4v2lxrcrg2 = value->rValue; + mod->BSIM4v2lxrcrg2Given = TRUE; + break; + case BSIM4v2_MOD_LEU : + mod->BSIM4v2leu = value->rValue; + mod->BSIM4v2leuGiven = TRUE; + break; + case BSIM4v2_MOD_LVFB : + mod->BSIM4v2lvfb = value->rValue; + mod->BSIM4v2lvfbGiven = TRUE; + break; + + case BSIM4v2_MOD_LCGSL : + mod->BSIM4v2lcgsl = value->rValue; + mod->BSIM4v2lcgslGiven = TRUE; + break; + case BSIM4v2_MOD_LCGDL : + mod->BSIM4v2lcgdl = value->rValue; + mod->BSIM4v2lcgdlGiven = TRUE; + break; + case BSIM4v2_MOD_LCKAPPAS : + mod->BSIM4v2lckappas = value->rValue; + mod->BSIM4v2lckappasGiven = TRUE; + break; + case BSIM4v2_MOD_LCKAPPAD : + mod->BSIM4v2lckappad = value->rValue; + mod->BSIM4v2lckappadGiven = TRUE; + break; + case BSIM4v2_MOD_LCF : + mod->BSIM4v2lcf = value->rValue; + mod->BSIM4v2lcfGiven = TRUE; + break; + case BSIM4v2_MOD_LCLC : + mod->BSIM4v2lclc = value->rValue; + mod->BSIM4v2lclcGiven = TRUE; + break; + case BSIM4v2_MOD_LCLE : + mod->BSIM4v2lcle = value->rValue; + mod->BSIM4v2lcleGiven = TRUE; + break; + case BSIM4v2_MOD_LVFBCV : + mod->BSIM4v2lvfbcv = value->rValue; + mod->BSIM4v2lvfbcvGiven = TRUE; + break; + case BSIM4v2_MOD_LACDE : + mod->BSIM4v2lacde = value->rValue; + mod->BSIM4v2lacdeGiven = TRUE; + break; + case BSIM4v2_MOD_LMOIN : + mod->BSIM4v2lmoin = value->rValue; + mod->BSIM4v2lmoinGiven = TRUE; + break; + case BSIM4v2_MOD_LNOFF : + mod->BSIM4v2lnoff = value->rValue; + mod->BSIM4v2lnoffGiven = TRUE; + break; + case BSIM4v2_MOD_LVOFFCV : + mod->BSIM4v2lvoffcv = value->rValue; + mod->BSIM4v2lvoffcvGiven = TRUE; + break; + + /* Width dependence */ + case BSIM4v2_MOD_WCDSC : + mod->BSIM4v2wcdsc = value->rValue; + mod->BSIM4v2wcdscGiven = TRUE; + break; + + + case BSIM4v2_MOD_WCDSCB : + mod->BSIM4v2wcdscb = value->rValue; + mod->BSIM4v2wcdscbGiven = TRUE; + break; + case BSIM4v2_MOD_WCDSCD : + mod->BSIM4v2wcdscd = value->rValue; + mod->BSIM4v2wcdscdGiven = TRUE; + break; + case BSIM4v2_MOD_WCIT : + mod->BSIM4v2wcit = value->rValue; + mod->BSIM4v2wcitGiven = TRUE; + break; + case BSIM4v2_MOD_WNFACTOR : + mod->BSIM4v2wnfactor = value->rValue; + mod->BSIM4v2wnfactorGiven = TRUE; + break; + case BSIM4v2_MOD_WXJ: + mod->BSIM4v2wxj = value->rValue; + mod->BSIM4v2wxjGiven = TRUE; + break; + case BSIM4v2_MOD_WVSAT: + mod->BSIM4v2wvsat = value->rValue; + mod->BSIM4v2wvsatGiven = TRUE; + break; + + + case BSIM4v2_MOD_WA0: + mod->BSIM4v2wa0 = value->rValue; + mod->BSIM4v2wa0Given = TRUE; + break; + case BSIM4v2_MOD_WAGS: + mod->BSIM4v2wags = value->rValue; + mod->BSIM4v2wagsGiven = TRUE; + break; + case BSIM4v2_MOD_WA1: + mod->BSIM4v2wa1 = value->rValue; + mod->BSIM4v2wa1Given = TRUE; + break; + case BSIM4v2_MOD_WA2: + mod->BSIM4v2wa2 = value->rValue; + mod->BSIM4v2wa2Given = TRUE; + break; + case BSIM4v2_MOD_WAT: + mod->BSIM4v2wat = value->rValue; + mod->BSIM4v2watGiven = TRUE; + break; + case BSIM4v2_MOD_WKETA: + mod->BSIM4v2wketa = value->rValue; + mod->BSIM4v2wketaGiven = TRUE; + break; + case BSIM4v2_MOD_WNSUB: + mod->BSIM4v2wnsub = value->rValue; + mod->BSIM4v2wnsubGiven = TRUE; + break; + case BSIM4v2_MOD_WNDEP: + mod->BSIM4v2wndep = value->rValue; + mod->BSIM4v2wndepGiven = TRUE; + if (mod->BSIM4v2wndep > 1.0e20) + mod->BSIM4v2wndep *= 1.0e-6; + break; + case BSIM4v2_MOD_WNSD: + mod->BSIM4v2wnsd = value->rValue; + mod->BSIM4v2wnsdGiven = TRUE; + if (mod->BSIM4v2wnsd > 1.0e23) + mod->BSIM4v2wnsd *= 1.0e-6; + break; + case BSIM4v2_MOD_WNGATE: + mod->BSIM4v2wngate = value->rValue; + mod->BSIM4v2wngateGiven = TRUE; + if (mod->BSIM4v2wngate > 1.0e23) + mod->BSIM4v2wngate *= 1.0e-6; + break; + case BSIM4v2_MOD_WGAMMA1: + mod->BSIM4v2wgamma1 = value->rValue; + mod->BSIM4v2wgamma1Given = TRUE; + break; + case BSIM4v2_MOD_WGAMMA2: + mod->BSIM4v2wgamma2 = value->rValue; + mod->BSIM4v2wgamma2Given = TRUE; + break; + case BSIM4v2_MOD_WVBX: + mod->BSIM4v2wvbx = value->rValue; + mod->BSIM4v2wvbxGiven = TRUE; + break; + case BSIM4v2_MOD_WVBM: + mod->BSIM4v2wvbm = value->rValue; + mod->BSIM4v2wvbmGiven = TRUE; + break; + case BSIM4v2_MOD_WXT: + mod->BSIM4v2wxt = value->rValue; + mod->BSIM4v2wxtGiven = TRUE; + break; + case BSIM4v2_MOD_WK1: + mod->BSIM4v2wk1 = value->rValue; + mod->BSIM4v2wk1Given = TRUE; + break; + case BSIM4v2_MOD_WKT1: + mod->BSIM4v2wkt1 = value->rValue; + mod->BSIM4v2wkt1Given = TRUE; + break; + case BSIM4v2_MOD_WKT1L: + mod->BSIM4v2wkt1l = value->rValue; + mod->BSIM4v2wkt1lGiven = TRUE; + break; + case BSIM4v2_MOD_WKT2: + mod->BSIM4v2wkt2 = value->rValue; + mod->BSIM4v2wkt2Given = TRUE; + break; + case BSIM4v2_MOD_WK2: + mod->BSIM4v2wk2 = value->rValue; + mod->BSIM4v2wk2Given = TRUE; + break; + case BSIM4v2_MOD_WK3: + mod->BSIM4v2wk3 = value->rValue; + mod->BSIM4v2wk3Given = TRUE; + break; + case BSIM4v2_MOD_WK3B: + mod->BSIM4v2wk3b = value->rValue; + mod->BSIM4v2wk3bGiven = TRUE; + break; + case BSIM4v2_MOD_WLPE0: + mod->BSIM4v2wlpe0 = value->rValue; + mod->BSIM4v2wlpe0Given = TRUE; + break; + case BSIM4v2_MOD_WLPEB: + mod->BSIM4v2wlpeb = value->rValue; + mod->BSIM4v2wlpebGiven = TRUE; + break; + case BSIM4v2_MOD_WDVTP0: + mod->BSIM4v2wdvtp0 = value->rValue; + mod->BSIM4v2wdvtp0Given = TRUE; + break; + case BSIM4v2_MOD_WDVTP1: + mod->BSIM4v2wdvtp1 = value->rValue; + mod->BSIM4v2wdvtp1Given = TRUE; + break; + case BSIM4v2_MOD_WW0: + mod->BSIM4v2ww0 = value->rValue; + mod->BSIM4v2ww0Given = TRUE; + break; + case BSIM4v2_MOD_WDVT0: + mod->BSIM4v2wdvt0 = value->rValue; + mod->BSIM4v2wdvt0Given = TRUE; + break; + case BSIM4v2_MOD_WDVT1: + mod->BSIM4v2wdvt1 = value->rValue; + mod->BSIM4v2wdvt1Given = TRUE; + break; + case BSIM4v2_MOD_WDVT2: + mod->BSIM4v2wdvt2 = value->rValue; + mod->BSIM4v2wdvt2Given = TRUE; + break; + case BSIM4v2_MOD_WDVT0W: + mod->BSIM4v2wdvt0w = value->rValue; + mod->BSIM4v2wdvt0wGiven = TRUE; + break; + case BSIM4v2_MOD_WDVT1W: + mod->BSIM4v2wdvt1w = value->rValue; + mod->BSIM4v2wdvt1wGiven = TRUE; + break; + case BSIM4v2_MOD_WDVT2W: + mod->BSIM4v2wdvt2w = value->rValue; + mod->BSIM4v2wdvt2wGiven = TRUE; + break; + case BSIM4v2_MOD_WDROUT: + mod->BSIM4v2wdrout = value->rValue; + mod->BSIM4v2wdroutGiven = TRUE; + break; + case BSIM4v2_MOD_WDSUB: + mod->BSIM4v2wdsub = value->rValue; + mod->BSIM4v2wdsubGiven = TRUE; + break; + case BSIM4v2_MOD_WVTH0: + mod->BSIM4v2wvth0 = value->rValue; + mod->BSIM4v2wvth0Given = TRUE; + break; + case BSIM4v2_MOD_WUA: + mod->BSIM4v2wua = value->rValue; + mod->BSIM4v2wuaGiven = TRUE; + break; + case BSIM4v2_MOD_WUA1: + mod->BSIM4v2wua1 = value->rValue; + mod->BSIM4v2wua1Given = TRUE; + break; + case BSIM4v2_MOD_WUB: + mod->BSIM4v2wub = value->rValue; + mod->BSIM4v2wubGiven = TRUE; + break; + case BSIM4v2_MOD_WUB1: + mod->BSIM4v2wub1 = value->rValue; + mod->BSIM4v2wub1Given = TRUE; + break; + case BSIM4v2_MOD_WUC: + mod->BSIM4v2wuc = value->rValue; + mod->BSIM4v2wucGiven = TRUE; + break; + case BSIM4v2_MOD_WUC1: + mod->BSIM4v2wuc1 = value->rValue; + mod->BSIM4v2wuc1Given = TRUE; + break; + case BSIM4v2_MOD_WU0 : + mod->BSIM4v2wu0 = value->rValue; + mod->BSIM4v2wu0Given = TRUE; + break; + case BSIM4v2_MOD_WUTE : + mod->BSIM4v2wute = value->rValue; + mod->BSIM4v2wuteGiven = TRUE; + break; + case BSIM4v2_MOD_WVOFF: + mod->BSIM4v2wvoff = value->rValue; + mod->BSIM4v2wvoffGiven = TRUE; + break; + case BSIM4v2_MOD_WMINV: + mod->BSIM4v2wminv = value->rValue; + mod->BSIM4v2wminvGiven = TRUE; + break; + case BSIM4v2_MOD_WFPROUT: + mod->BSIM4v2wfprout = value->rValue; + mod->BSIM4v2wfproutGiven = TRUE; + break; + case BSIM4v2_MOD_WPDITS: + mod->BSIM4v2wpdits = value->rValue; + mod->BSIM4v2wpditsGiven = TRUE; + break; + case BSIM4v2_MOD_WPDITSD: + mod->BSIM4v2wpditsd = value->rValue; + mod->BSIM4v2wpditsdGiven = TRUE; + break; + case BSIM4v2_MOD_WDELTA : + mod->BSIM4v2wdelta = value->rValue; + mod->BSIM4v2wdeltaGiven = TRUE; + break; + case BSIM4v2_MOD_WRDSW: + mod->BSIM4v2wrdsw = value->rValue; + mod->BSIM4v2wrdswGiven = TRUE; + break; + case BSIM4v2_MOD_WRDW: + mod->BSIM4v2wrdw = value->rValue; + mod->BSIM4v2wrdwGiven = TRUE; + break; + case BSIM4v2_MOD_WRSW: + mod->BSIM4v2wrsw = value->rValue; + mod->BSIM4v2wrswGiven = TRUE; + break; + case BSIM4v2_MOD_WPRWB: + mod->BSIM4v2wprwb = value->rValue; + mod->BSIM4v2wprwbGiven = TRUE; + break; + case BSIM4v2_MOD_WPRWG: + mod->BSIM4v2wprwg = value->rValue; + mod->BSIM4v2wprwgGiven = TRUE; + break; + case BSIM4v2_MOD_WPRT: + mod->BSIM4v2wprt = value->rValue; + mod->BSIM4v2wprtGiven = TRUE; + break; + case BSIM4v2_MOD_WETA0: + mod->BSIM4v2weta0 = value->rValue; + mod->BSIM4v2weta0Given = TRUE; + break; + case BSIM4v2_MOD_WETAB: + mod->BSIM4v2wetab = value->rValue; + mod->BSIM4v2wetabGiven = TRUE; + break; + case BSIM4v2_MOD_WPCLM: + mod->BSIM4v2wpclm = value->rValue; + mod->BSIM4v2wpclmGiven = TRUE; + break; + case BSIM4v2_MOD_WPDIBL1: + mod->BSIM4v2wpdibl1 = value->rValue; + mod->BSIM4v2wpdibl1Given = TRUE; + break; + case BSIM4v2_MOD_WPDIBL2: + mod->BSIM4v2wpdibl2 = value->rValue; + mod->BSIM4v2wpdibl2Given = TRUE; + break; + case BSIM4v2_MOD_WPDIBLB: + mod->BSIM4v2wpdiblb = value->rValue; + mod->BSIM4v2wpdiblbGiven = TRUE; + break; + case BSIM4v2_MOD_WPSCBE1: + mod->BSIM4v2wpscbe1 = value->rValue; + mod->BSIM4v2wpscbe1Given = TRUE; + break; + case BSIM4v2_MOD_WPSCBE2: + mod->BSIM4v2wpscbe2 = value->rValue; + mod->BSIM4v2wpscbe2Given = TRUE; + break; + case BSIM4v2_MOD_WPVAG: + mod->BSIM4v2wpvag = value->rValue; + mod->BSIM4v2wpvagGiven = TRUE; + break; + case BSIM4v2_MOD_WWR : + mod->BSIM4v2wwr = value->rValue; + mod->BSIM4v2wwrGiven = TRUE; + break; + case BSIM4v2_MOD_WDWG : + mod->BSIM4v2wdwg = value->rValue; + mod->BSIM4v2wdwgGiven = TRUE; + break; + case BSIM4v2_MOD_WDWB : + mod->BSIM4v2wdwb = value->rValue; + mod->BSIM4v2wdwbGiven = TRUE; + break; + case BSIM4v2_MOD_WB0 : + mod->BSIM4v2wb0 = value->rValue; + mod->BSIM4v2wb0Given = TRUE; + break; + case BSIM4v2_MOD_WB1 : + mod->BSIM4v2wb1 = value->rValue; + mod->BSIM4v2wb1Given = TRUE; + break; + case BSIM4v2_MOD_WALPHA0 : + mod->BSIM4v2walpha0 = value->rValue; + mod->BSIM4v2walpha0Given = TRUE; + break; + case BSIM4v2_MOD_WALPHA1 : + mod->BSIM4v2walpha1 = value->rValue; + mod->BSIM4v2walpha1Given = TRUE; + break; + case BSIM4v2_MOD_WBETA0 : + mod->BSIM4v2wbeta0 = value->rValue; + mod->BSIM4v2wbeta0Given = TRUE; + break; + case BSIM4v2_MOD_WAGIDL : + mod->BSIM4v2wagidl = value->rValue; + mod->BSIM4v2wagidlGiven = TRUE; + break; + case BSIM4v2_MOD_WBGIDL : + mod->BSIM4v2wbgidl = value->rValue; + mod->BSIM4v2wbgidlGiven = TRUE; + break; + case BSIM4v2_MOD_WCGIDL : + mod->BSIM4v2wcgidl = value->rValue; + mod->BSIM4v2wcgidlGiven = TRUE; + break; + case BSIM4v2_MOD_WPHIN : + mod->BSIM4v2wphin = value->rValue; + mod->BSIM4v2wphinGiven = TRUE; + break; + case BSIM4v2_MOD_WEGIDL : + mod->BSIM4v2wegidl = value->rValue; + mod->BSIM4v2wegidlGiven = TRUE; + break; + case BSIM4v2_MOD_WAIGC : + mod->BSIM4v2waigc = value->rValue; + mod->BSIM4v2waigcGiven = TRUE; + break; + case BSIM4v2_MOD_WBIGC : + mod->BSIM4v2wbigc = value->rValue; + mod->BSIM4v2wbigcGiven = TRUE; + break; + case BSIM4v2_MOD_WCIGC : + mod->BSIM4v2wcigc = value->rValue; + mod->BSIM4v2wcigcGiven = TRUE; + break; + case BSIM4v2_MOD_WAIGSD : + mod->BSIM4v2waigsd = value->rValue; + mod->BSIM4v2waigsdGiven = TRUE; + break; + case BSIM4v2_MOD_WBIGSD : + mod->BSIM4v2wbigsd = value->rValue; + mod->BSIM4v2wbigsdGiven = TRUE; + break; + case BSIM4v2_MOD_WCIGSD : + mod->BSIM4v2wcigsd = value->rValue; + mod->BSIM4v2wcigsdGiven = TRUE; + break; + case BSIM4v2_MOD_WAIGBACC : + mod->BSIM4v2waigbacc = value->rValue; + mod->BSIM4v2waigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_WBIGBACC : + mod->BSIM4v2wbigbacc = value->rValue; + mod->BSIM4v2wbigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_WCIGBACC : + mod->BSIM4v2wcigbacc = value->rValue; + mod->BSIM4v2wcigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_WAIGBINV : + mod->BSIM4v2waigbinv = value->rValue; + mod->BSIM4v2waigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_WBIGBINV : + mod->BSIM4v2wbigbinv = value->rValue; + mod->BSIM4v2wbigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_WCIGBINV : + mod->BSIM4v2wcigbinv = value->rValue; + mod->BSIM4v2wcigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_WNIGC : + mod->BSIM4v2wnigc = value->rValue; + mod->BSIM4v2wnigcGiven = TRUE; + break; + case BSIM4v2_MOD_WNIGBINV : + mod->BSIM4v2wnigbinv = value->rValue; + mod->BSIM4v2wnigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_WNIGBACC : + mod->BSIM4v2wnigbacc = value->rValue; + mod->BSIM4v2wnigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_WNTOX : + mod->BSIM4v2wntox = value->rValue; + mod->BSIM4v2wntoxGiven = TRUE; + break; + case BSIM4v2_MOD_WEIGBINV : + mod->BSIM4v2weigbinv = value->rValue; + mod->BSIM4v2weigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_WPIGCD : + mod->BSIM4v2wpigcd = value->rValue; + mod->BSIM4v2wpigcdGiven = TRUE; + break; + case BSIM4v2_MOD_WPOXEDGE : + mod->BSIM4v2wpoxedge = value->rValue; + mod->BSIM4v2wpoxedgeGiven = TRUE; + break; + case BSIM4v2_MOD_WXRCRG1 : + mod->BSIM4v2wxrcrg1 = value->rValue; + mod->BSIM4v2wxrcrg1Given = TRUE; + break; + case BSIM4v2_MOD_WXRCRG2 : + mod->BSIM4v2wxrcrg2 = value->rValue; + mod->BSIM4v2wxrcrg2Given = TRUE; + break; + case BSIM4v2_MOD_WEU : + mod->BSIM4v2weu = value->rValue; + mod->BSIM4v2weuGiven = TRUE; + break; + case BSIM4v2_MOD_WVFB : + mod->BSIM4v2wvfb = value->rValue; + mod->BSIM4v2wvfbGiven = TRUE; + break; + + case BSIM4v2_MOD_WCGSL : + mod->BSIM4v2wcgsl = value->rValue; + mod->BSIM4v2wcgslGiven = TRUE; + break; + case BSIM4v2_MOD_WCGDL : + mod->BSIM4v2wcgdl = value->rValue; + mod->BSIM4v2wcgdlGiven = TRUE; + break; + case BSIM4v2_MOD_WCKAPPAS : + mod->BSIM4v2wckappas = value->rValue; + mod->BSIM4v2wckappasGiven = TRUE; + break; + case BSIM4v2_MOD_WCKAPPAD : + mod->BSIM4v2wckappad = value->rValue; + mod->BSIM4v2wckappadGiven = TRUE; + break; + case BSIM4v2_MOD_WCF : + mod->BSIM4v2wcf = value->rValue; + mod->BSIM4v2wcfGiven = TRUE; + break; + case BSIM4v2_MOD_WCLC : + mod->BSIM4v2wclc = value->rValue; + mod->BSIM4v2wclcGiven = TRUE; + break; + case BSIM4v2_MOD_WCLE : + mod->BSIM4v2wcle = value->rValue; + mod->BSIM4v2wcleGiven = TRUE; + break; + case BSIM4v2_MOD_WVFBCV : + mod->BSIM4v2wvfbcv = value->rValue; + mod->BSIM4v2wvfbcvGiven = TRUE; + break; + case BSIM4v2_MOD_WACDE : + mod->BSIM4v2wacde = value->rValue; + mod->BSIM4v2wacdeGiven = TRUE; + break; + case BSIM4v2_MOD_WMOIN : + mod->BSIM4v2wmoin = value->rValue; + mod->BSIM4v2wmoinGiven = TRUE; + break; + case BSIM4v2_MOD_WNOFF : + mod->BSIM4v2wnoff = value->rValue; + mod->BSIM4v2wnoffGiven = TRUE; + break; + case BSIM4v2_MOD_WVOFFCV : + mod->BSIM4v2wvoffcv = value->rValue; + mod->BSIM4v2wvoffcvGiven = TRUE; + break; + + /* Cross-term dependence */ + case BSIM4v2_MOD_PCDSC : + mod->BSIM4v2pcdsc = value->rValue; + mod->BSIM4v2pcdscGiven = TRUE; + break; + + + case BSIM4v2_MOD_PCDSCB : + mod->BSIM4v2pcdscb = value->rValue; + mod->BSIM4v2pcdscbGiven = TRUE; + break; + case BSIM4v2_MOD_PCDSCD : + mod->BSIM4v2pcdscd = value->rValue; + mod->BSIM4v2pcdscdGiven = TRUE; + break; + case BSIM4v2_MOD_PCIT : + mod->BSIM4v2pcit = value->rValue; + mod->BSIM4v2pcitGiven = TRUE; + break; + case BSIM4v2_MOD_PNFACTOR : + mod->BSIM4v2pnfactor = value->rValue; + mod->BSIM4v2pnfactorGiven = TRUE; + break; + case BSIM4v2_MOD_PXJ: + mod->BSIM4v2pxj = value->rValue; + mod->BSIM4v2pxjGiven = TRUE; + break; + case BSIM4v2_MOD_PVSAT: + mod->BSIM4v2pvsat = value->rValue; + mod->BSIM4v2pvsatGiven = TRUE; + break; + + + case BSIM4v2_MOD_PA0: + mod->BSIM4v2pa0 = value->rValue; + mod->BSIM4v2pa0Given = TRUE; + break; + case BSIM4v2_MOD_PAGS: + mod->BSIM4v2pags = value->rValue; + mod->BSIM4v2pagsGiven = TRUE; + break; + case BSIM4v2_MOD_PA1: + mod->BSIM4v2pa1 = value->rValue; + mod->BSIM4v2pa1Given = TRUE; + break; + case BSIM4v2_MOD_PA2: + mod->BSIM4v2pa2 = value->rValue; + mod->BSIM4v2pa2Given = TRUE; + break; + case BSIM4v2_MOD_PAT: + mod->BSIM4v2pat = value->rValue; + mod->BSIM4v2patGiven = TRUE; + break; + case BSIM4v2_MOD_PKETA: + mod->BSIM4v2pketa = value->rValue; + mod->BSIM4v2pketaGiven = TRUE; + break; + case BSIM4v2_MOD_PNSUB: + mod->BSIM4v2pnsub = value->rValue; + mod->BSIM4v2pnsubGiven = TRUE; + break; + case BSIM4v2_MOD_PNDEP: + mod->BSIM4v2pndep = value->rValue; + mod->BSIM4v2pndepGiven = TRUE; + if (mod->BSIM4v2pndep > 1.0e20) + mod->BSIM4v2pndep *= 1.0e-6; + break; + case BSIM4v2_MOD_PNSD: + mod->BSIM4v2pnsd = value->rValue; + mod->BSIM4v2pnsdGiven = TRUE; + if (mod->BSIM4v2pnsd > 1.0e23) + mod->BSIM4v2pnsd *= 1.0e-6; + break; + case BSIM4v2_MOD_PNGATE: + mod->BSIM4v2pngate = value->rValue; + mod->BSIM4v2pngateGiven = TRUE; + if (mod->BSIM4v2pngate > 1.0e23) + mod->BSIM4v2pngate *= 1.0e-6; + break; + case BSIM4v2_MOD_PGAMMA1: + mod->BSIM4v2pgamma1 = value->rValue; + mod->BSIM4v2pgamma1Given = TRUE; + break; + case BSIM4v2_MOD_PGAMMA2: + mod->BSIM4v2pgamma2 = value->rValue; + mod->BSIM4v2pgamma2Given = TRUE; + break; + case BSIM4v2_MOD_PVBX: + mod->BSIM4v2pvbx = value->rValue; + mod->BSIM4v2pvbxGiven = TRUE; + break; + case BSIM4v2_MOD_PVBM: + mod->BSIM4v2pvbm = value->rValue; + mod->BSIM4v2pvbmGiven = TRUE; + break; + case BSIM4v2_MOD_PXT: + mod->BSIM4v2pxt = value->rValue; + mod->BSIM4v2pxtGiven = TRUE; + break; + case BSIM4v2_MOD_PK1: + mod->BSIM4v2pk1 = value->rValue; + mod->BSIM4v2pk1Given = TRUE; + break; + case BSIM4v2_MOD_PKT1: + mod->BSIM4v2pkt1 = value->rValue; + mod->BSIM4v2pkt1Given = TRUE; + break; + case BSIM4v2_MOD_PKT1L: + mod->BSIM4v2pkt1l = value->rValue; + mod->BSIM4v2pkt1lGiven = TRUE; + break; + case BSIM4v2_MOD_PKT2: + mod->BSIM4v2pkt2 = value->rValue; + mod->BSIM4v2pkt2Given = TRUE; + break; + case BSIM4v2_MOD_PK2: + mod->BSIM4v2pk2 = value->rValue; + mod->BSIM4v2pk2Given = TRUE; + break; + case BSIM4v2_MOD_PK3: + mod->BSIM4v2pk3 = value->rValue; + mod->BSIM4v2pk3Given = TRUE; + break; + case BSIM4v2_MOD_PK3B: + mod->BSIM4v2pk3b = value->rValue; + mod->BSIM4v2pk3bGiven = TRUE; + break; + case BSIM4v2_MOD_PLPE0: + mod->BSIM4v2plpe0 = value->rValue; + mod->BSIM4v2plpe0Given = TRUE; + break; + case BSIM4v2_MOD_PLPEB: + mod->BSIM4v2plpeb = value->rValue; + mod->BSIM4v2plpebGiven = TRUE; + break; + case BSIM4v2_MOD_PDVTP0: + mod->BSIM4v2pdvtp0 = value->rValue; + mod->BSIM4v2pdvtp0Given = TRUE; + break; + case BSIM4v2_MOD_PDVTP1: + mod->BSIM4v2pdvtp1 = value->rValue; + mod->BSIM4v2pdvtp1Given = TRUE; + break; + case BSIM4v2_MOD_PW0: + mod->BSIM4v2pw0 = value->rValue; + mod->BSIM4v2pw0Given = TRUE; + break; + case BSIM4v2_MOD_PDVT0: + mod->BSIM4v2pdvt0 = value->rValue; + mod->BSIM4v2pdvt0Given = TRUE; + break; + case BSIM4v2_MOD_PDVT1: + mod->BSIM4v2pdvt1 = value->rValue; + mod->BSIM4v2pdvt1Given = TRUE; + break; + case BSIM4v2_MOD_PDVT2: + mod->BSIM4v2pdvt2 = value->rValue; + mod->BSIM4v2pdvt2Given = TRUE; + break; + case BSIM4v2_MOD_PDVT0W: + mod->BSIM4v2pdvt0w = value->rValue; + mod->BSIM4v2pdvt0wGiven = TRUE; + break; + case BSIM4v2_MOD_PDVT1W: + mod->BSIM4v2pdvt1w = value->rValue; + mod->BSIM4v2pdvt1wGiven = TRUE; + break; + case BSIM4v2_MOD_PDVT2W: + mod->BSIM4v2pdvt2w = value->rValue; + mod->BSIM4v2pdvt2wGiven = TRUE; + break; + case BSIM4v2_MOD_PDROUT: + mod->BSIM4v2pdrout = value->rValue; + mod->BSIM4v2pdroutGiven = TRUE; + break; + case BSIM4v2_MOD_PDSUB: + mod->BSIM4v2pdsub = value->rValue; + mod->BSIM4v2pdsubGiven = TRUE; + break; + case BSIM4v2_MOD_PVTH0: + mod->BSIM4v2pvth0 = value->rValue; + mod->BSIM4v2pvth0Given = TRUE; + break; + case BSIM4v2_MOD_PUA: + mod->BSIM4v2pua = value->rValue; + mod->BSIM4v2puaGiven = TRUE; + break; + case BSIM4v2_MOD_PUA1: + mod->BSIM4v2pua1 = value->rValue; + mod->BSIM4v2pua1Given = TRUE; + break; + case BSIM4v2_MOD_PUB: + mod->BSIM4v2pub = value->rValue; + mod->BSIM4v2pubGiven = TRUE; + break; + case BSIM4v2_MOD_PUB1: + mod->BSIM4v2pub1 = value->rValue; + mod->BSIM4v2pub1Given = TRUE; + break; + case BSIM4v2_MOD_PUC: + mod->BSIM4v2puc = value->rValue; + mod->BSIM4v2pucGiven = TRUE; + break; + case BSIM4v2_MOD_PUC1: + mod->BSIM4v2puc1 = value->rValue; + mod->BSIM4v2puc1Given = TRUE; + break; + case BSIM4v2_MOD_PU0 : + mod->BSIM4v2pu0 = value->rValue; + mod->BSIM4v2pu0Given = TRUE; + break; + case BSIM4v2_MOD_PUTE : + mod->BSIM4v2pute = value->rValue; + mod->BSIM4v2puteGiven = TRUE; + break; + case BSIM4v2_MOD_PVOFF: + mod->BSIM4v2pvoff = value->rValue; + mod->BSIM4v2pvoffGiven = TRUE; + break; + case BSIM4v2_MOD_PMINV: + mod->BSIM4v2pminv = value->rValue; + mod->BSIM4v2pminvGiven = TRUE; + break; + case BSIM4v2_MOD_PFPROUT: + mod->BSIM4v2pfprout = value->rValue; + mod->BSIM4v2pfproutGiven = TRUE; + break; + case BSIM4v2_MOD_PPDITS: + mod->BSIM4v2ppdits = value->rValue; + mod->BSIM4v2ppditsGiven = TRUE; + break; + case BSIM4v2_MOD_PPDITSD: + mod->BSIM4v2ppditsd = value->rValue; + mod->BSIM4v2ppditsdGiven = TRUE; + break; + case BSIM4v2_MOD_PDELTA : + mod->BSIM4v2pdelta = value->rValue; + mod->BSIM4v2pdeltaGiven = TRUE; + break; + case BSIM4v2_MOD_PRDSW: + mod->BSIM4v2prdsw = value->rValue; + mod->BSIM4v2prdswGiven = TRUE; + break; + case BSIM4v2_MOD_PRDW: + mod->BSIM4v2prdw = value->rValue; + mod->BSIM4v2prdwGiven = TRUE; + break; + case BSIM4v2_MOD_PRSW: + mod->BSIM4v2prsw = value->rValue; + mod->BSIM4v2prswGiven = TRUE; + break; + case BSIM4v2_MOD_PPRWB: + mod->BSIM4v2pprwb = value->rValue; + mod->BSIM4v2pprwbGiven = TRUE; + break; + case BSIM4v2_MOD_PPRWG: + mod->BSIM4v2pprwg = value->rValue; + mod->BSIM4v2pprwgGiven = TRUE; + break; + case BSIM4v2_MOD_PPRT: + mod->BSIM4v2pprt = value->rValue; + mod->BSIM4v2pprtGiven = TRUE; + break; + case BSIM4v2_MOD_PETA0: + mod->BSIM4v2peta0 = value->rValue; + mod->BSIM4v2peta0Given = TRUE; + break; + case BSIM4v2_MOD_PETAB: + mod->BSIM4v2petab = value->rValue; + mod->BSIM4v2petabGiven = TRUE; + break; + case BSIM4v2_MOD_PPCLM: + mod->BSIM4v2ppclm = value->rValue; + mod->BSIM4v2ppclmGiven = TRUE; + break; + case BSIM4v2_MOD_PPDIBL1: + mod->BSIM4v2ppdibl1 = value->rValue; + mod->BSIM4v2ppdibl1Given = TRUE; + break; + case BSIM4v2_MOD_PPDIBL2: + mod->BSIM4v2ppdibl2 = value->rValue; + mod->BSIM4v2ppdibl2Given = TRUE; + break; + case BSIM4v2_MOD_PPDIBLB: + mod->BSIM4v2ppdiblb = value->rValue; + mod->BSIM4v2ppdiblbGiven = TRUE; + break; + case BSIM4v2_MOD_PPSCBE1: + mod->BSIM4v2ppscbe1 = value->rValue; + mod->BSIM4v2ppscbe1Given = TRUE; + break; + case BSIM4v2_MOD_PPSCBE2: + mod->BSIM4v2ppscbe2 = value->rValue; + mod->BSIM4v2ppscbe2Given = TRUE; + break; + case BSIM4v2_MOD_PPVAG: + mod->BSIM4v2ppvag = value->rValue; + mod->BSIM4v2ppvagGiven = TRUE; + break; + case BSIM4v2_MOD_PWR : + mod->BSIM4v2pwr = value->rValue; + mod->BSIM4v2pwrGiven = TRUE; + break; + case BSIM4v2_MOD_PDWG : + mod->BSIM4v2pdwg = value->rValue; + mod->BSIM4v2pdwgGiven = TRUE; + break; + case BSIM4v2_MOD_PDWB : + mod->BSIM4v2pdwb = value->rValue; + mod->BSIM4v2pdwbGiven = TRUE; + break; + case BSIM4v2_MOD_PB0 : + mod->BSIM4v2pb0 = value->rValue; + mod->BSIM4v2pb0Given = TRUE; + break; + case BSIM4v2_MOD_PB1 : + mod->BSIM4v2pb1 = value->rValue; + mod->BSIM4v2pb1Given = TRUE; + break; + case BSIM4v2_MOD_PALPHA0 : + mod->BSIM4v2palpha0 = value->rValue; + mod->BSIM4v2palpha0Given = TRUE; + break; + case BSIM4v2_MOD_PALPHA1 : + mod->BSIM4v2palpha1 = value->rValue; + mod->BSIM4v2palpha1Given = TRUE; + break; + case BSIM4v2_MOD_PBETA0 : + mod->BSIM4v2pbeta0 = value->rValue; + mod->BSIM4v2pbeta0Given = TRUE; + break; + case BSIM4v2_MOD_PAGIDL : + mod->BSIM4v2pagidl = value->rValue; + mod->BSIM4v2pagidlGiven = TRUE; + break; + case BSIM4v2_MOD_PBGIDL : + mod->BSIM4v2pbgidl = value->rValue; + mod->BSIM4v2pbgidlGiven = TRUE; + break; + case BSIM4v2_MOD_PCGIDL : + mod->BSIM4v2pcgidl = value->rValue; + mod->BSIM4v2pcgidlGiven = TRUE; + break; + case BSIM4v2_MOD_PPHIN : + mod->BSIM4v2pphin = value->rValue; + mod->BSIM4v2pphinGiven = TRUE; + break; + case BSIM4v2_MOD_PEGIDL : + mod->BSIM4v2pegidl = value->rValue; + mod->BSIM4v2pegidlGiven = TRUE; + break; + case BSIM4v2_MOD_PAIGC : + mod->BSIM4v2paigc = value->rValue; + mod->BSIM4v2paigcGiven = TRUE; + break; + case BSIM4v2_MOD_PBIGC : + mod->BSIM4v2pbigc = value->rValue; + mod->BSIM4v2pbigcGiven = TRUE; + break; + case BSIM4v2_MOD_PCIGC : + mod->BSIM4v2pcigc = value->rValue; + mod->BSIM4v2pcigcGiven = TRUE; + break; + case BSIM4v2_MOD_PAIGSD : + mod->BSIM4v2paigsd = value->rValue; + mod->BSIM4v2paigsdGiven = TRUE; + break; + case BSIM4v2_MOD_PBIGSD : + mod->BSIM4v2pbigsd = value->rValue; + mod->BSIM4v2pbigsdGiven = TRUE; + break; + case BSIM4v2_MOD_PCIGSD : + mod->BSIM4v2pcigsd = value->rValue; + mod->BSIM4v2pcigsdGiven = TRUE; + break; + case BSIM4v2_MOD_PAIGBACC : + mod->BSIM4v2paigbacc = value->rValue; + mod->BSIM4v2paigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_PBIGBACC : + mod->BSIM4v2pbigbacc = value->rValue; + mod->BSIM4v2pbigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_PCIGBACC : + mod->BSIM4v2pcigbacc = value->rValue; + mod->BSIM4v2pcigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_PAIGBINV : + mod->BSIM4v2paigbinv = value->rValue; + mod->BSIM4v2paigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_PBIGBINV : + mod->BSIM4v2pbigbinv = value->rValue; + mod->BSIM4v2pbigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_PCIGBINV : + mod->BSIM4v2pcigbinv = value->rValue; + mod->BSIM4v2pcigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_PNIGC : + mod->BSIM4v2pnigc = value->rValue; + mod->BSIM4v2pnigcGiven = TRUE; + break; + case BSIM4v2_MOD_PNIGBINV : + mod->BSIM4v2pnigbinv = value->rValue; + mod->BSIM4v2pnigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_PNIGBACC : + mod->BSIM4v2pnigbacc = value->rValue; + mod->BSIM4v2pnigbaccGiven = TRUE; + break; + case BSIM4v2_MOD_PNTOX : + mod->BSIM4v2pntox = value->rValue; + mod->BSIM4v2pntoxGiven = TRUE; + break; + case BSIM4v2_MOD_PEIGBINV : + mod->BSIM4v2peigbinv = value->rValue; + mod->BSIM4v2peigbinvGiven = TRUE; + break; + case BSIM4v2_MOD_PPIGCD : + mod->BSIM4v2ppigcd = value->rValue; + mod->BSIM4v2ppigcdGiven = TRUE; + break; + case BSIM4v2_MOD_PPOXEDGE : + mod->BSIM4v2ppoxedge = value->rValue; + mod->BSIM4v2ppoxedgeGiven = TRUE; + break; + case BSIM4v2_MOD_PXRCRG1 : + mod->BSIM4v2pxrcrg1 = value->rValue; + mod->BSIM4v2pxrcrg1Given = TRUE; + break; + case BSIM4v2_MOD_PXRCRG2 : + mod->BSIM4v2pxrcrg2 = value->rValue; + mod->BSIM4v2pxrcrg2Given = TRUE; + break; + case BSIM4v2_MOD_PEU : + mod->BSIM4v2peu = value->rValue; + mod->BSIM4v2peuGiven = TRUE; + break; + case BSIM4v2_MOD_PVFB : + mod->BSIM4v2pvfb = value->rValue; + mod->BSIM4v2pvfbGiven = TRUE; + break; + + case BSIM4v2_MOD_PCGSL : + mod->BSIM4v2pcgsl = value->rValue; + mod->BSIM4v2pcgslGiven = TRUE; + break; + case BSIM4v2_MOD_PCGDL : + mod->BSIM4v2pcgdl = value->rValue; + mod->BSIM4v2pcgdlGiven = TRUE; + break; + case BSIM4v2_MOD_PCKAPPAS : + mod->BSIM4v2pckappas = value->rValue; + mod->BSIM4v2pckappasGiven = TRUE; + break; + case BSIM4v2_MOD_PCKAPPAD : + mod->BSIM4v2pckappad = value->rValue; + mod->BSIM4v2pckappadGiven = TRUE; + break; + case BSIM4v2_MOD_PCF : + mod->BSIM4v2pcf = value->rValue; + mod->BSIM4v2pcfGiven = TRUE; + break; + case BSIM4v2_MOD_PCLC : + mod->BSIM4v2pclc = value->rValue; + mod->BSIM4v2pclcGiven = TRUE; + break; + case BSIM4v2_MOD_PCLE : + mod->BSIM4v2pcle = value->rValue; + mod->BSIM4v2pcleGiven = TRUE; + break; + case BSIM4v2_MOD_PVFBCV : + mod->BSIM4v2pvfbcv = value->rValue; + mod->BSIM4v2pvfbcvGiven = TRUE; + break; + case BSIM4v2_MOD_PACDE : + mod->BSIM4v2pacde = value->rValue; + mod->BSIM4v2pacdeGiven = TRUE; + break; + case BSIM4v2_MOD_PMOIN : + mod->BSIM4v2pmoin = value->rValue; + mod->BSIM4v2pmoinGiven = TRUE; + break; + case BSIM4v2_MOD_PNOFF : + mod->BSIM4v2pnoff = value->rValue; + mod->BSIM4v2pnoffGiven = TRUE; + break; + case BSIM4v2_MOD_PVOFFCV : + mod->BSIM4v2pvoffcv = value->rValue; + mod->BSIM4v2pvoffcvGiven = TRUE; + break; + + case BSIM4v2_MOD_TNOM : + mod->BSIM4v2tnom = value->rValue + CONSTCtoK; + mod->BSIM4v2tnomGiven = TRUE; + break; + case BSIM4v2_MOD_CGSO : + mod->BSIM4v2cgso = value->rValue; + mod->BSIM4v2cgsoGiven = TRUE; + break; + case BSIM4v2_MOD_CGDO : + mod->BSIM4v2cgdo = value->rValue; + mod->BSIM4v2cgdoGiven = TRUE; + break; + case BSIM4v2_MOD_CGBO : + mod->BSIM4v2cgbo = value->rValue; + mod->BSIM4v2cgboGiven = TRUE; + break; + case BSIM4v2_MOD_XPART : + mod->BSIM4v2xpart = value->rValue; + mod->BSIM4v2xpartGiven = TRUE; + break; + case BSIM4v2_MOD_RSH : + mod->BSIM4v2sheetResistance = value->rValue; + mod->BSIM4v2sheetResistanceGiven = TRUE; + break; + case BSIM4v2_MOD_JSS : + mod->BSIM4v2SjctSatCurDensity = value->rValue; + mod->BSIM4v2SjctSatCurDensityGiven = TRUE; + break; + case BSIM4v2_MOD_JSWS : + mod->BSIM4v2SjctSidewallSatCurDensity = value->rValue; + mod->BSIM4v2SjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v2_MOD_JSWGS : + mod->BSIM4v2SjctGateSidewallSatCurDensity = value->rValue; + mod->BSIM4v2SjctGateSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v2_MOD_PBS : + mod->BSIM4v2SbulkJctPotential = value->rValue; + mod->BSIM4v2SbulkJctPotentialGiven = TRUE; + break; + case BSIM4v2_MOD_MJS : + mod->BSIM4v2SbulkJctBotGradingCoeff = value->rValue; + mod->BSIM4v2SbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_PBSWS : + mod->BSIM4v2SsidewallJctPotential = value->rValue; + mod->BSIM4v2SsidewallJctPotentialGiven = TRUE; + break; + case BSIM4v2_MOD_MJSWS : + mod->BSIM4v2SbulkJctSideGradingCoeff = value->rValue; + mod->BSIM4v2SbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_CJS : + mod->BSIM4v2SunitAreaJctCap = value->rValue; + mod->BSIM4v2SunitAreaJctCapGiven = TRUE; + break; + case BSIM4v2_MOD_CJSWS : + mod->BSIM4v2SunitLengthSidewallJctCap = value->rValue; + mod->BSIM4v2SunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM4v2_MOD_NJS : + mod->BSIM4v2SjctEmissionCoeff = value->rValue; + mod->BSIM4v2SjctEmissionCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_PBSWGS : + mod->BSIM4v2SGatesidewallJctPotential = value->rValue; + mod->BSIM4v2SGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM4v2_MOD_MJSWGS : + mod->BSIM4v2SbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM4v2SbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_CJSWGS : + mod->BSIM4v2SunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM4v2SunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM4v2_MOD_XTIS : + mod->BSIM4v2SjctTempExponent = value->rValue; + mod->BSIM4v2SjctTempExponentGiven = TRUE; + break; + case BSIM4v2_MOD_JSD : + mod->BSIM4v2DjctSatCurDensity = value->rValue; + mod->BSIM4v2DjctSatCurDensityGiven = TRUE; + break; + case BSIM4v2_MOD_JSWD : + mod->BSIM4v2DjctSidewallSatCurDensity = value->rValue; + mod->BSIM4v2DjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v2_MOD_JSWGD : + mod->BSIM4v2DjctGateSidewallSatCurDensity = value->rValue; + mod->BSIM4v2DjctGateSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v2_MOD_PBD : + mod->BSIM4v2DbulkJctPotential = value->rValue; + mod->BSIM4v2DbulkJctPotentialGiven = TRUE; + break; + case BSIM4v2_MOD_MJD : + mod->BSIM4v2DbulkJctBotGradingCoeff = value->rValue; + mod->BSIM4v2DbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_PBSWD : + mod->BSIM4v2DsidewallJctPotential = value->rValue; + mod->BSIM4v2DsidewallJctPotentialGiven = TRUE; + break; + case BSIM4v2_MOD_MJSWD : + mod->BSIM4v2DbulkJctSideGradingCoeff = value->rValue; + mod->BSIM4v2DbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_CJD : + mod->BSIM4v2DunitAreaJctCap = value->rValue; + mod->BSIM4v2DunitAreaJctCapGiven = TRUE; + break; + case BSIM4v2_MOD_CJSWD : + mod->BSIM4v2DunitLengthSidewallJctCap = value->rValue; + mod->BSIM4v2DunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM4v2_MOD_NJD : + mod->BSIM4v2DjctEmissionCoeff = value->rValue; + mod->BSIM4v2DjctEmissionCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_PBSWGD : + mod->BSIM4v2DGatesidewallJctPotential = value->rValue; + mod->BSIM4v2DGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM4v2_MOD_MJSWGD : + mod->BSIM4v2DbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM4v2DbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM4v2_MOD_CJSWGD : + mod->BSIM4v2DunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM4v2DunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM4v2_MOD_XTID : + mod->BSIM4v2DjctTempExponent = value->rValue; + mod->BSIM4v2DjctTempExponentGiven = TRUE; + break; + case BSIM4v2_MOD_LINT : + mod->BSIM4v2Lint = value->rValue; + mod->BSIM4v2LintGiven = TRUE; + break; + case BSIM4v2_MOD_LL : + mod->BSIM4v2Ll = value->rValue; + mod->BSIM4v2LlGiven = TRUE; + break; + case BSIM4v2_MOD_LLC : + mod->BSIM4v2Llc = value->rValue; + mod->BSIM4v2LlcGiven = TRUE; + break; + case BSIM4v2_MOD_LLN : + mod->BSIM4v2Lln = value->rValue; + mod->BSIM4v2LlnGiven = TRUE; + break; + case BSIM4v2_MOD_LW : + mod->BSIM4v2Lw = value->rValue; + mod->BSIM4v2LwGiven = TRUE; + break; + case BSIM4v2_MOD_LWC : + mod->BSIM4v2Lwc = value->rValue; + mod->BSIM4v2LwcGiven = TRUE; + break; + case BSIM4v2_MOD_LWN : + mod->BSIM4v2Lwn = value->rValue; + mod->BSIM4v2LwnGiven = TRUE; + break; + case BSIM4v2_MOD_LWL : + mod->BSIM4v2Lwl = value->rValue; + mod->BSIM4v2LwlGiven = TRUE; + break; + case BSIM4v2_MOD_LWLC : + mod->BSIM4v2Lwlc = value->rValue; + mod->BSIM4v2LwlcGiven = TRUE; + break; + case BSIM4v2_MOD_LMIN : + mod->BSIM4v2Lmin = value->rValue; + mod->BSIM4v2LminGiven = TRUE; + break; + case BSIM4v2_MOD_LMAX : + mod->BSIM4v2Lmax = value->rValue; + mod->BSIM4v2LmaxGiven = TRUE; + break; + case BSIM4v2_MOD_WINT : + mod->BSIM4v2Wint = value->rValue; + mod->BSIM4v2WintGiven = TRUE; + break; + case BSIM4v2_MOD_WL : + mod->BSIM4v2Wl = value->rValue; + mod->BSIM4v2WlGiven = TRUE; + break; + case BSIM4v2_MOD_WLC : + mod->BSIM4v2Wlc = value->rValue; + mod->BSIM4v2WlcGiven = TRUE; + break; + case BSIM4v2_MOD_WLN : + mod->BSIM4v2Wln = value->rValue; + mod->BSIM4v2WlnGiven = TRUE; + break; + case BSIM4v2_MOD_WW : + mod->BSIM4v2Ww = value->rValue; + mod->BSIM4v2WwGiven = TRUE; + break; + case BSIM4v2_MOD_WWC : + mod->BSIM4v2Wwc = value->rValue; + mod->BSIM4v2WwcGiven = TRUE; + break; + case BSIM4v2_MOD_WWN : + mod->BSIM4v2Wwn = value->rValue; + mod->BSIM4v2WwnGiven = TRUE; + break; + case BSIM4v2_MOD_WWL : + mod->BSIM4v2Wwl = value->rValue; + mod->BSIM4v2WwlGiven = TRUE; + break; + case BSIM4v2_MOD_WWLC : + mod->BSIM4v2Wwlc = value->rValue; + mod->BSIM4v2WwlcGiven = TRUE; + break; + case BSIM4v2_MOD_WMIN : + mod->BSIM4v2Wmin = value->rValue; + mod->BSIM4v2WminGiven = TRUE; + break; + case BSIM4v2_MOD_WMAX : + mod->BSIM4v2Wmax = value->rValue; + mod->BSIM4v2WmaxGiven = TRUE; + break; + + case BSIM4v2_MOD_NOIA : + mod->BSIM4v2oxideTrapDensityA = value->rValue; + mod->BSIM4v2oxideTrapDensityAGiven = TRUE; + break; + case BSIM4v2_MOD_NOIB : + mod->BSIM4v2oxideTrapDensityB = value->rValue; + mod->BSIM4v2oxideTrapDensityBGiven = TRUE; + break; + case BSIM4v2_MOD_NOIC : + mod->BSIM4v2oxideTrapDensityC = value->rValue; + mod->BSIM4v2oxideTrapDensityCGiven = TRUE; + break; + case BSIM4v2_MOD_EM : + mod->BSIM4v2em = value->rValue; + mod->BSIM4v2emGiven = TRUE; + break; + case BSIM4v2_MOD_EF : + mod->BSIM4v2ef = value->rValue; + mod->BSIM4v2efGiven = TRUE; + break; + case BSIM4v2_MOD_AF : + mod->BSIM4v2af = value->rValue; + mod->BSIM4v2afGiven = TRUE; + break; + case BSIM4v2_MOD_KF : + mod->BSIM4v2kf = value->rValue; + mod->BSIM4v2kfGiven = TRUE; + break; + case BSIM4v2_MOD_NMOS : + if(value->iValue) { + mod->BSIM4v2type = 1; + mod->BSIM4v2typeGiven = TRUE; + } + break; + case BSIM4v2_MOD_PMOS : + if(value->iValue) { + mod->BSIM4v2type = - 1; + mod->BSIM4v2typeGiven = TRUE; + } + break; + default: + return(E_BADPARM); + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim4v2/b4v2noi.c b/src/spicelib/devices/bsim4v2/b4v2noi.c new file mode 100644 index 000000000..168030d2b --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2noi.c @@ -0,0 +1,474 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4noi.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "bsim4v2def.h" +#include "cktdefs.h" +#include "iferrmsg.h" +#include "noisedef.h" +#include "const.h" + + +extern void NevalSrc(); +extern double Nintegrate(); + +/* + * WDL: 1/f noise model has been smoothed out and enhanced with + * bulk charge effect as well as physical N* equ. and necessary + * conversion into the SI unit system. + */ + +double +BSIM4v2Eval1ovFNoise(Vds, model, here, freq, temp) +double Vds, freq, temp; +BSIM4v2model *model; +BSIM4v2instance *here; +{ +struct bsim4SizeDependParam *pParam; +double cd, esat, DelClm, EffFreq, N0, Nl; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13, Ssi; + + pParam = here->pParam; + cd = fabs(here->BSIM4v2cd); + esat = 2.0 * pParam->BSIM4v2vsattemp / here->BSIM4v2ueff; + if(model->BSIM4v2em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */ + else { + T0 = ((((Vds - here->BSIM4v2Vdseff) / pParam->BSIM4v2litl) + + model->BSIM4v2em) / esat); + DelClm = pParam->BSIM4v2litl * log (MAX(T0, N_MINLOG)); + } + EffFreq = pow(freq, model->BSIM4v2ef); + T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4v2ueff; + T2 = 1.0e10 * EffFreq * here->BSIM4v2Abulk * model->BSIM4v2coxe + * pParam->BSIM4v2leff * pParam->BSIM4v2leff; + N0 = model->BSIM4v2coxe * here->BSIM4v2Vgsteff / CHARGE; + Nl = model->BSIM4v2coxe * here->BSIM4v2Vgsteff + * (1.0 - here->BSIM4v2AbovVgst2Vtm * here->BSIM4v2Vdseff) / CHARGE; + + T3 = model->BSIM4v2oxideTrapDensityA + * log(MAX(((N0 + here->BSIM4v2nstar) / (Nl + here->BSIM4v2nstar)), N_MINLOG)); + T4 = model->BSIM4v2oxideTrapDensityB * (N0 - Nl); + T5 = model->BSIM4v2oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); + + T6 = CONSTboltz * temp * cd * cd; + T7 = 1.0e10 * EffFreq * pParam->BSIM4v2leff + * pParam->BSIM4v2leff * pParam->BSIM4v2weff; + T8 = model->BSIM4v2oxideTrapDensityA + model->BSIM4v2oxideTrapDensityB * Nl + + model->BSIM4v2oxideTrapDensityC * Nl * Nl; + T9 = (Nl + here->BSIM4v2nstar) * (Nl + here->BSIM4v2nstar); + Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; + return Ssi; +} + + +int +BSIM4v2noise (mode, operation, inModel, ckt, data, OnDens) +int mode, operation; +GENmodel *inModel; +CKTcircuit *ckt; +Ndata *data; +double *OnDens; +{ +BSIM4v2model *model = (BSIM4v2model *)inModel; +BSIM4v2instance *here; +struct bsim4SizeDependParam *pParam; +char name[N_MXVLNTH]; +double tempOnoise; +double tempInoise; +double noizDens[BSIM4v2NSRCS]; +double lnNdens[BSIM4v2NSRCS]; + +double N0, Nl; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13; +double Vds, n, ExpArg, Ssi, Swi; +double tmp, gdpr, gspr, npart_theta, npart_beta, igsquare; + +int error, i; + + /* define the names of the noise sources */ + static char *BSIM4v2nNames[BSIM4v2NSRCS] = + { /* Note that we have to keep the order */ + ".rd", /* noise due to rd */ + ".rs", /* noise due to rs */ + ".rg", /* noise due to rgeltd */ + ".rbps", /* noise due to rbps */ + ".rbpd", /* noise due to rbpd */ + ".rbpb", /* noise due to rbpb */ + ".rbsb", /* noise due to rbsb */ + ".rbdb", /* noise due to rbdb */ + ".id", /* noise due to id */ + ".1overf", /* flicker (1/f) noise */ + ".igs", /* shot noise due to IGS */ + ".igd", /* shot noise due to IGD */ + ".igb", /* shot noise due to IGB */ + "" /* total transistor noise */ + }; + + for (; model != NULL; model = model->BSIM4v2nextModel) + { for (here = model->BSIM4v2instances; here != NULL; + here = here->BSIM4v2nextInstance) + { pParam = here->pParam; + switch (operation) + { case N_OPEN: + /* see if we have to to produce a summary report */ + /* if so, name all the noise generators */ + + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { switch (mode) + { case N_DENS: + for (i = 0; i < BSIM4v2NSRCS; i++) + { (void) sprintf(name, "onoise.%s%s", + here->BSIM4v2name, + BSIM4v2nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + } + break; + case INT_NOIZ: + for (i = 0; i < BSIM4v2NSRCS; i++) + { (void) sprintf(name, "onoise_total.%s%s", + here->BSIM4v2name, + BSIM4v2nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + + (void) sprintf(name, "inoise_total.%s%s", + here->BSIM4v2name, + BSIM4v2nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **)NULL); + /* we've added one more plot */ + } + break; + } + } + break; + case N_CALC: + switch (mode) + { case N_DENS: + if (model->BSIM4v2tnoiMod == 0) + { if (model->BSIM4v2rdsMod == 0) + { gspr = here->BSIM4v2sourceConductance; + gdpr = here->BSIM4v2drainConductance; + if (here->BSIM4v2grdsw > 0.0) + tmp = 1.0 / here->BSIM4v2grdsw; /* tmp used below */ + else + tmp = 0.0; + } + else + { gspr = here->BSIM4v2gstot; + gdpr = here->BSIM4v2gdtot; + tmp = 0.0; + } + } + else + { T5 = here->BSIM4v2Vgsteff / here->BSIM4v2EsatL; + T5 *= T5; + npart_beta = 0.577 * (1.0 + T5 + * model->BSIM4v2tnoia * pParam->BSIM4v2leff); + npart_theta = 0.37 * (1.0 + T5 + * model->BSIM4v2tnoib * pParam->BSIM4v2leff); + + if (model->BSIM4v2rdsMod == 0) + { gspr = here->BSIM4v2sourceConductance; + gdpr = here->BSIM4v2drainConductance; + } + else + { gspr = here->BSIM4v2gstot; + gdpr = here->BSIM4v2gdtot; + } + + if ((*(ckt->CKTstates[0] + here->BSIM4v2vds)) >= 0.0) + gspr = gspr * (1.0 + npart_theta * npart_theta * gspr + / here->BSIM4v2IdovVds); + else + gdpr = gdpr * (1.0 + npart_theta * npart_theta * gdpr + / here->BSIM4v2IdovVds); + } + + NevalSrc(&noizDens[BSIM4v2RDNOIZ], + &lnNdens[BSIM4v2RDNOIZ], ckt, THERMNOISE, + here->BSIM4v2dNodePrime, here->BSIM4v2dNode, + gdpr); + + NevalSrc(&noizDens[BSIM4v2RSNOIZ], + &lnNdens[BSIM4v2RSNOIZ], ckt, THERMNOISE, + here->BSIM4v2sNodePrime, here->BSIM4v2sNode, + gspr); + + + if ((here->BSIM4v2rgateMod == 1) || (here->BSIM4v2rgateMod == 2)) + { NevalSrc(&noizDens[BSIM4v2RGNOIZ], + &lnNdens[BSIM4v2RGNOIZ], ckt, THERMNOISE, + here->BSIM4v2gNodePrime, here->BSIM4v2gNodeExt, + here->BSIM4v2grgeltd); + } + else if (here->BSIM4v2rgateMod == 3) + { NevalSrc(&noizDens[BSIM4v2RGNOIZ], + &lnNdens[BSIM4v2RGNOIZ], ckt, THERMNOISE, + here->BSIM4v2gNodeMid, here->BSIM4v2gNodeExt, + here->BSIM4v2grgeltd); + } + else + { noizDens[BSIM4v2RGNOIZ] = 0.0; + lnNdens[BSIM4v2RGNOIZ] = + log(MAX(noizDens[BSIM4v2RGNOIZ], N_MINLOG)); + } + + + if (here->BSIM4v2rbodyMod) + { NevalSrc(&noizDens[BSIM4v2RBPSNOIZ], + &lnNdens[BSIM4v2RBPSNOIZ], ckt, THERMNOISE, + here->BSIM4v2bNodePrime, here->BSIM4v2sbNode, + here->BSIM4v2grbps); + NevalSrc(&noizDens[BSIM4v2RBPDNOIZ], + &lnNdens[BSIM4v2RBPDNOIZ], ckt, THERMNOISE, + here->BSIM4v2bNodePrime, here->BSIM4v2dbNode, + here->BSIM4v2grbpd); + NevalSrc(&noizDens[BSIM4v2RBPBNOIZ], + &lnNdens[BSIM4v2RBPBNOIZ], ckt, THERMNOISE, + here->BSIM4v2bNodePrime, here->BSIM4v2bNode, + here->BSIM4v2grbpb); + NevalSrc(&noizDens[BSIM4v2RBSBNOIZ], + &lnNdens[BSIM4v2RBSBNOIZ], ckt, THERMNOISE, + here->BSIM4v2bNode, here->BSIM4v2sbNode, + here->BSIM4v2grbsb); + NevalSrc(&noizDens[BSIM4v2RBDBNOIZ], + &lnNdens[BSIM4v2RBDBNOIZ], ckt, THERMNOISE, + here->BSIM4v2bNode, here->BSIM4v2dbNode, + here->BSIM4v2grbdb); + } + else + { noizDens[BSIM4v2RBPSNOIZ] = noizDens[BSIM4v2RBPDNOIZ] = 0.0; + noizDens[BSIM4v2RBPBNOIZ] = 0.0; + noizDens[BSIM4v2RBSBNOIZ] = noizDens[BSIM4v2RBDBNOIZ] = 0.0; + lnNdens[BSIM4v2RBPSNOIZ] = + log(MAX(noizDens[BSIM4v2RBPSNOIZ], N_MINLOG)); + lnNdens[BSIM4v2RBPDNOIZ] = + log(MAX(noizDens[BSIM4v2RBPDNOIZ], N_MINLOG)); + lnNdens[BSIM4v2RBPBNOIZ] = + log(MAX(noizDens[BSIM4v2RBPBNOIZ], N_MINLOG)); + lnNdens[BSIM4v2RBSBNOIZ] = + log(MAX(noizDens[BSIM4v2RBSBNOIZ], N_MINLOG)); + lnNdens[BSIM4v2RBDBNOIZ] = + log(MAX(noizDens[BSIM4v2RBDBNOIZ], N_MINLOG)); + } + + + switch(model->BSIM4v2tnoiMod) + { case 0: + T0 = here->BSIM4v2ueff * fabs(here->BSIM4v2qinv); + T1 = T0 * tmp + pParam->BSIM4v2leff + * pParam->BSIM4v2leff; + NevalSrc(&noizDens[BSIM4v2IDNOIZ], + &lnNdens[BSIM4v2IDNOIZ], ckt, + THERMNOISE, here->BSIM4v2dNodePrime, + here->BSIM4v2sNodePrime, + (T0 / T1) * model->BSIM4v2ntnoi); + break; + case 1: + T0 = here->BSIM4v2gm + here->BSIM4v2gmbs + here->BSIM4v2gds; + T0 *= T0; + igsquare = npart_theta * npart_theta * T0 / here->BSIM4v2IdovVds; + T1 = npart_beta * (here->BSIM4v2gm + + here->BSIM4v2gmbs) + here->BSIM4v2gds; + T2 = T1 * T1 / here->BSIM4v2IdovVds; + NevalSrc(&noizDens[BSIM4v2IDNOIZ], + &lnNdens[BSIM4v2IDNOIZ], ckt, + THERMNOISE, here->BSIM4v2dNodePrime, + here->BSIM4v2sNodePrime, (T2 - igsquare)); + break; + } + + NevalSrc(&noizDens[BSIM4v2FLNOIZ], (double*) NULL, + ckt, N_GAIN, here->BSIM4v2dNodePrime, + here->BSIM4v2sNodePrime, (double) 0.0); + + switch(model->BSIM4v2fnoiMod) + { case 0: + noizDens[BSIM4v2FLNOIZ] *= model->BSIM4v2kf + * exp(model->BSIM4v2af + * log(MAX(fabs(here->BSIM4v2cd), + N_MINLOG))) + / (pow(data->freq, model->BSIM4v2ef) + * pParam->BSIM4v2leff + * pParam->BSIM4v2leff + * model->BSIM4v2coxe); + break; + case 1: + Vds = *(ckt->CKTstates[0] + here->BSIM4v2vds); + if (Vds < 0.0) + Vds = -Vds; + + Ssi = BSIM4v2Eval1ovFNoise(Vds, model, here, + data->freq, ckt->CKTtemp); + T10 = model->BSIM4v2oxideTrapDensityA + * CONSTboltz * ckt->CKTtemp; + T11 = pParam->BSIM4v2weff * pParam->BSIM4v2leff + * pow(data->freq, model->BSIM4v2ef) * 1.0e10 + * here->BSIM4v2nstar * here->BSIM4v2nstar; + Swi = T10 / T11 * here->BSIM4v2cd + * here->BSIM4v2cd; + T1 = Swi + Ssi; + if (T1 > 0.0) + noizDens[BSIM4v2FLNOIZ] *= (Ssi * Swi) / T1; + else + noizDens[BSIM4v2FLNOIZ] *= 0.0; + break; + } + + lnNdens[BSIM4v2FLNOIZ] = + log(MAX(noizDens[BSIM4v2FLNOIZ], N_MINLOG)); + + + NevalSrc(&noizDens[BSIM4v2IGSNOIZ], + &lnNdens[BSIM4v2IGSNOIZ], ckt, SHOTNOISE, + here->BSIM4v2gNodePrime, here->BSIM4v2sNodePrime, + (here->BSIM4v2Igs + here->BSIM4v2Igcs)); + NevalSrc(&noizDens[BSIM4v2IGDNOIZ], + &lnNdens[BSIM4v2IGDNOIZ], ckt, SHOTNOISE, + here->BSIM4v2gNodePrime, here->BSIM4v2dNodePrime, + (here->BSIM4v2Igd + here->BSIM4v2Igcd)); + + NevalSrc(&noizDens[BSIM4v2IGBNOIZ], + &lnNdens[BSIM4v2IGBNOIZ], ckt, SHOTNOISE, + here->BSIM4v2gNodePrime, here->BSIM4v2bNodePrime, + here->BSIM4v2Igb); + + + noizDens[BSIM4v2TOTNOIZ] = noizDens[BSIM4v2RDNOIZ] + + noizDens[BSIM4v2RSNOIZ] + noizDens[BSIM4v2RGNOIZ] + + noizDens[BSIM4v2RBPSNOIZ] + noizDens[BSIM4v2RBPDNOIZ] + + noizDens[BSIM4v2RBPBNOIZ] + + noizDens[BSIM4v2RBSBNOIZ] + noizDens[BSIM4v2RBDBNOIZ] + + noizDens[BSIM4v2IDNOIZ] + noizDens[BSIM4v2FLNOIZ] + + noizDens[BSIM4v2IGSNOIZ] + noizDens[BSIM4v2IGDNOIZ] + + noizDens[BSIM4v2IGBNOIZ]; + lnNdens[BSIM4v2TOTNOIZ] = + log(MAX(noizDens[BSIM4v2TOTNOIZ], N_MINLOG)); + + *OnDens += noizDens[BSIM4v2TOTNOIZ]; + + if (data->delFreq == 0.0) + { /* if we haven't done any previous + integration, we need to initialize our + "history" variables. + */ + + for (i = 0; i < BSIM4v2NSRCS; i++) + { here->BSIM4v2nVar[LNLSTDENS][i] = + lnNdens[i]; + } + + /* clear out our integration variables + if it's the first pass + */ + if (data->freq == + ((NOISEAN*) ckt->CKTcurJob)->NstartFreq) + { for (i = 0; i < BSIM4v2NSRCS; i++) + { here->BSIM4v2nVar[OUTNOIZ][i] = 0.0; + here->BSIM4v2nVar[INNOIZ][i] = 0.0; + } + } + } + else + { /* data->delFreq != 0.0, + we have to integrate. + */ + for (i = 0; i < BSIM4v2NSRCS; i++) + { if (i != BSIM4v2TOTNOIZ) + { tempOnoise = Nintegrate(noizDens[i], + lnNdens[i], + here->BSIM4v2nVar[LNLSTDENS][i], + data); + tempInoise = Nintegrate(noizDens[i] + * data->GainSqInv, lnNdens[i] + + data->lnGainInv, + here->BSIM4v2nVar[LNLSTDENS][i] + + data->lnGainInv, data); + here->BSIM4v2nVar[LNLSTDENS][i] = + lnNdens[i]; + data->outNoiz += tempOnoise; + data->inNoise += tempInoise; + if (((NOISEAN*) + ckt->CKTcurJob)->NStpsSm != 0) + { here->BSIM4v2nVar[OUTNOIZ][i] + += tempOnoise; + here->BSIM4v2nVar[OUTNOIZ][BSIM4v2TOTNOIZ] + += tempOnoise; + here->BSIM4v2nVar[INNOIZ][i] + += tempInoise; + here->BSIM4v2nVar[INNOIZ][BSIM4v2TOTNOIZ] + += tempInoise; + } + } + } + } + if (data->prtSummary) + { for (i = 0; i < BSIM4v2NSRCS; i++) + { /* print a summary report */ + data->outpVector[data->outNumber++] + = noizDens[i]; + } + } + break; + case INT_NOIZ: + /* already calculated, just output */ + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { for (i = 0; i < BSIM4v2NSRCS; i++) + { data->outpVector[data->outNumber++] + = here->BSIM4v2nVar[OUTNOIZ][i]; + data->outpVector[data->outNumber++] + = here->BSIM4v2nVar[INNOIZ][i]; + } + } + break; + } + break; + case N_CLOSE: + /* do nothing, the main calling routine will close */ + return (OK); + break; /* the plots */ + } /* switch (operation) */ + } /* for here */ + } /* for model */ + + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2par.c b/src/spicelib/devices/bsim4v2/b4v2par.c new file mode 100644 index 000000000..905bd1174 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2par.c @@ -0,0 +1,150 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4par.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "ifsim.h" +#include "bsim4v2def.h" +#include "sperror.h" +#include "fteext.h" + +int +BSIM4v2param(param,value,inst,select) +int param; +IFvalue *value; +GENinstance *inst; +IFvalue *select; +{ + double scale; + + if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1; + + BSIM4v2instance *here = (BSIM4v2instance*)inst; + switch(param) + { case BSIM4v2_W: + here->BSIM4v2w = value->rValue*scale; + here->BSIM4v2wGiven = TRUE; + break; + case BSIM4v2_L: + here->BSIM4v2l = value->rValue*scale; + here->BSIM4v2lGiven = TRUE; + break; + case BSIM4v2_NF: + here->BSIM4v2nf = value->rValue; + here->BSIM4v2nfGiven = TRUE; + break; + case BSIM4v2_MIN: + here->BSIM4v2min = value->iValue; + here->BSIM4v2minGiven = TRUE; + break; + case BSIM4v2_AS: + here->BSIM4v2sourceArea = value->rValue*scale*scale; + here->BSIM4v2sourceAreaGiven = TRUE; + break; + case BSIM4v2_AD: + here->BSIM4v2drainArea = value->rValue*scale*scale; + here->BSIM4v2drainAreaGiven = TRUE; + break; + case BSIM4v2_PS: + here->BSIM4v2sourcePerimeter = value->rValue*scale; + here->BSIM4v2sourcePerimeterGiven = TRUE; + break; + case BSIM4v2_PD: + here->BSIM4v2drainPerimeter = value->rValue*scale; + here->BSIM4v2drainPerimeterGiven = TRUE; + break; + case BSIM4v2_NRS: + here->BSIM4v2sourceSquares = value->rValue; + here->BSIM4v2sourceSquaresGiven = TRUE; + break; + case BSIM4v2_NRD: + here->BSIM4v2drainSquares = value->rValue; + here->BSIM4v2drainSquaresGiven = TRUE; + break; + case BSIM4v2_OFF: + here->BSIM4v2off = value->iValue; + break; + case BSIM4v2_RBSB: + here->BSIM4v2rbsb = value->rValue; + here->BSIM4v2rbsbGiven = TRUE; + break; + case BSIM4v2_RBDB: + here->BSIM4v2rbdb = value->rValue; + here->BSIM4v2rbdbGiven = TRUE; + break; + case BSIM4v2_RBPB: + here->BSIM4v2rbpb = value->rValue; + here->BSIM4v2rbpbGiven = TRUE; + break; + case BSIM4v2_RBPS: + here->BSIM4v2rbps = value->rValue; + here->BSIM4v2rbpsGiven = TRUE; + break; + case BSIM4v2_RBPD: + here->BSIM4v2rbpd = value->rValue; + here->BSIM4v2rbpdGiven = TRUE; + break; + case BSIM4v2_TRNQSMOD: + here->BSIM4v2trnqsMod = value->iValue; + here->BSIM4v2trnqsModGiven = TRUE; + break; + case BSIM4v2_ACNQSMOD: + here->BSIM4v2acnqsMod = value->iValue; + here->BSIM4v2acnqsModGiven = TRUE; + break; + case BSIM4v2_RBODYMOD: + here->BSIM4v2rbodyMod = value->iValue; + here->BSIM4v2rbodyModGiven = TRUE; + break; + case BSIM4v2_RGATEMOD: + here->BSIM4v2rgateMod = value->iValue; + here->BSIM4v2rgateModGiven = TRUE; + break; + case BSIM4v2_GEOMOD: + here->BSIM4v2geoMod = value->iValue; + here->BSIM4v2geoModGiven = TRUE; + break; + case BSIM4v2_RGEOMOD: + here->BSIM4v2rgeoMod = value->iValue; + here->BSIM4v2rgeoModGiven = TRUE; + break; + case BSIM4v2_IC_VDS: + here->BSIM4v2icVDS = value->rValue; + here->BSIM4v2icVDSGiven = TRUE; + break; + case BSIM4v2_IC_VGS: + here->BSIM4v2icVGS = value->rValue; + here->BSIM4v2icVGSGiven = TRUE; + break; + case BSIM4v2_IC_VBS: + here->BSIM4v2icVBS = value->rValue; + here->BSIM4v2icVBSGiven = TRUE; + break; + case BSIM4v2_IC: + switch(value->v.numValue) + { case 3: + here->BSIM4v2icVBS = *(value->v.vec.rVec+2); + here->BSIM4v2icVBSGiven = TRUE; + case 2: + here->BSIM4v2icVGS = *(value->v.vec.rVec+1); + here->BSIM4v2icVGSGiven = TRUE; + case 1: + here->BSIM4v2icVDS = *(value->v.vec.rVec); + here->BSIM4v2icVDSGiven = TRUE; + break; + default: + return(E_BADPARM); + } + break; + default: + return(E_BADPARM); + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2pzld.c b/src/spicelib/devices/bsim4v2/b4v2pzld.c new file mode 100644 index 000000000..570ca1f6c --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2pzld.c @@ -0,0 +1,756 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4pzld.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include "cktdefs.h" +#include "complex.h" +#include "sperror.h" +#include "bsim4v2def.h" + +int +BSIM4v2pzLoad(inModel,ckt,s) +GENmodel *inModel; +CKTcircuit *ckt; +SPcomplex *s; +{ +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance *here; + +double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb; +double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb; +double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb; +double gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs; +double gstot, gstotd, gstotg, gstots, gstotb, gspr; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double gIstotg, gIstotd, gIstots, gIstotb; +double gIdtotg, gIdtotd, gIdtots, gIdtotb; +double gIbtotg, gIbtotd, gIbtots, gIbtotb; +double gIgtotg, gIgtotd, gIgtots, gIgtotb; +double cgso, cgdo, cgbo; +double xcdbdb, xcsbsb, xcgmgmb, xcgmdb, xcgmsb, xcdgmb, xcsgmb; +double xcgmbb, xcbgmb; +double dxpart, sxpart, xgtg, xgtd, xgts, xgtb, xcqgb, xcqdb, xcqsb, xcqbb; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double T0, T1, CoxWL, qcheq, Cdg, Cdd, Cds, Cdb, Csg, Csd, Css, Csb; +double ScalingFactor = 1.0e-9; +struct bsim4SizeDependParam *pParam; +double ggidld, ggidlg, ggidlb,ggisld, ggislg, ggislb, ggisls; + + + for (; model != NULL; model = model->BSIM4v2nextModel) + { for (here = model->BSIM4v2instances; here!= NULL; + here = here->BSIM4v2nextInstance) + { if (here->BSIM4v2owner != ARCHme) continue; + pParam = here->pParam; + capbd = here->BSIM4v2capbd; + capbs = here->BSIM4v2capbs; + cgso = here->BSIM4v2cgso; + cgdo = here->BSIM4v2cgdo; + cgbo = pParam->BSIM4v2cgbo; + + if (here->BSIM4v2mode >= 0) + { Gm = here->BSIM4v2gm; + Gmbs = here->BSIM4v2gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + gbbdp = -(here->BSIM4v2gbds); + gbbsp = here->BSIM4v2gbds + here->BSIM4v2gbgs + here->BSIM4v2gbbs; + gbdpg = here->BSIM4v2gbgs; + gbdpdp = here->BSIM4v2gbds; + gbdpb = here->BSIM4v2gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v2igcMod) + { gIstotg = here->BSIM4v2gIgsg + here->BSIM4v2gIgcsg; + gIstotd = here->BSIM4v2gIgcsd; + gIstots = here->BSIM4v2gIgss + here->BSIM4v2gIgcss; + gIstotb = here->BSIM4v2gIgcsb; + + gIdtotg = here->BSIM4v2gIgdg + here->BSIM4v2gIgcdg; + gIdtotd = here->BSIM4v2gIgdd + here->BSIM4v2gIgcdd; + gIdtots = here->BSIM4v2gIgcds; + gIdtotb = here->BSIM4v2gIgcdb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v2igbMod) + { gIbtotg = here->BSIM4v2gIgbg; + gIbtotd = here->BSIM4v2gIgbd; + gIbtots = here->BSIM4v2gIgbs; + gIbtotb = here->BSIM4v2gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v2rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vges) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + else if (here->BSIM4v2rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vgms) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + if (here->BSIM4v2rgateMod > 1) + { gcrgd = here->BSIM4v2gcrgd * T0; + gcrgg = here->BSIM4v2gcrgg * T0; + gcrgs = here->BSIM4v2gcrgs * T0; + gcrgb = here->BSIM4v2gcrgb * T0; + gcrgg -= here->BSIM4v2gcrg; + gcrg = here->BSIM4v2gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v2acnqsMod == 0) + { if (here->BSIM4v2rgateMod == 3) + { xcgmgmb = cgdo + cgso + pParam->BSIM4v2cgbo; + xcgmdb = -cgdo; + xcgmsb = -cgso; + xcgmbb = -pParam->BSIM4v2cgbo; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggb = here->BSIM4v2cggb; + xcgdb = here->BSIM4v2cgdb; + xcgsb = here->BSIM4v2cgsb; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = here->BSIM4v2cdgb; + xcsgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb); + xcbgb = here->BSIM4v2cbgb; + } + else + { xcggb = here->BSIM4v2cggb + cgdo + cgso + + pParam->BSIM4v2cgbo; + xcgdb = here->BSIM4v2cgdb - cgdo; + xcgsb = here->BSIM4v2cgsb - cgso; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = here->BSIM4v2cdgb - cgdo; + xcsgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb + cgso); + xcbgb = here->BSIM4v2cbgb - pParam->BSIM4v2cgbo; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddb = here->BSIM4v2cddb + here->BSIM4v2capbd + cgdo; + xcdsb = here->BSIM4v2cdsb; + + xcsdb = -(here->BSIM4v2cgdb + here->BSIM4v2cbdb + + here->BSIM4v2cddb); + xcssb = here->BSIM4v2capbs + cgso - (here->BSIM4v2cgsb + + here->BSIM4v2cbsb + here->BSIM4v2cdsb); + + if (!here->BSIM4v2rbodyMod) + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb); + xcbdb = here->BSIM4v2cbdb - here->BSIM4v2capbd; + xcbsb = here->BSIM4v2cbsb - here->BSIM4v2capbs; + xcdbdb = 0.0; + } + else + { xcdbb = -(here->BSIM4v2cddb + here->BSIM4v2cdgb + + here->BSIM4v2cdsb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb) + + here->BSIM4v2capbs; + xcbdb = here->BSIM4v2cbdb; + xcbsb = here->BSIM4v2cbsb; + + xcdbdb = -here->BSIM4v2capbd; + xcsbsb = -here->BSIM4v2capbs; + } + xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { xcggb = xcgdb = xcgsb = xcgbb = 0.0; + xcbgb = xcbdb = xcbsb = xcbbb = 0.0; + xcdgb = xcddb = xcdsb = xcdbb = 0.0; + xcsgb = xcsdb = xcssb = xcsbb = 0.0; + + xgtg = here->BSIM4v2gtg; + xgtd = here->BSIM4v2gtd; + xgts = here->BSIM4v2gts; + xgtb = here->BSIM4v2gtb; + + xcqgb = here->BSIM4v2cqgb; + xcqdb = here->BSIM4v2cqdb; + xcqsb = here->BSIM4v2cqsb; + xcqbb = here->BSIM4v2cqbb; + + CoxWL = model->BSIM4v2coxe * here->pParam->BSIM4v2weffCV + * here->BSIM4v2nf * here->pParam->BSIM4v2leffCV; + qcheq = -(here->BSIM4v2qgate + here->BSIM4v2qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v2xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM4v2xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM4v2qdrn / qcheq; + Cdd = here->BSIM4v2cddb; + Csd = -(here->BSIM4v2cgdb + here->BSIM4v2cddb + + here->BSIM4v2cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM4v2cdgb; + Csg = -(here->BSIM4v2cggb + here->BSIM4v2cdgb + + here->BSIM4v2cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM4v2cdsb; + Css = -(here->BSIM4v2cgsb + here->BSIM4v2cdsb + + here->BSIM4v2cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + } + else + { Gm = -here->BSIM4v2gm; + Gmbs = -here->BSIM4v2gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + gbbsp = -(here->BSIM4v2gbds); + gbbdp = here->BSIM4v2gbds + here->BSIM4v2gbgs + here->BSIM4v2gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v2gbgs; + gbspsp = here->BSIM4v2gbds; + gbspb = here->BSIM4v2gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v2igcMod) + { gIstotg = here->BSIM4v2gIgsg + here->BSIM4v2gIgcdg; + gIstotd = here->BSIM4v2gIgcds; + gIstots = here->BSIM4v2gIgss + here->BSIM4v2gIgcdd; + gIstotb = here->BSIM4v2gIgcdb; + + gIdtotg = here->BSIM4v2gIgdg + here->BSIM4v2gIgcsg; + gIdtotd = here->BSIM4v2gIgdd + here->BSIM4v2gIgcss; + gIdtots = here->BSIM4v2gIgcsd; + gIdtotb = here->BSIM4v2gIgcsb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v2igbMod) + { gIbtotg = here->BSIM4v2gIgbg; + gIbtotd = here->BSIM4v2gIgbs; + gIbtots = here->BSIM4v2gIgbd; + gIbtotb = here->BSIM4v2gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v2igcMod != 0) || (model->BSIM4v2igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v2rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vges) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + else if (here->BSIM4v2rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v2vgms) + - *(ckt->CKTstates[0] + here->BSIM4v2vgs); + if (here->BSIM4v2rgateMod > 1) + { gcrgd = here->BSIM4v2gcrgs * T0; + gcrgg = here->BSIM4v2gcrgg * T0; + gcrgs = here->BSIM4v2gcrgd * T0; + gcrgb = here->BSIM4v2gcrgb * T0; + gcrgg -= here->BSIM4v2gcrg; + gcrg = here->BSIM4v2gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v2acnqsMod == 0) + { if (here->BSIM4v2rgateMod == 3) + { xcgmgmb = cgdo + cgso + pParam->BSIM4v2cgbo; + xcgmdb = -cgdo; + xcgmsb = -cgso; + xcgmbb = -pParam->BSIM4v2cgbo; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggb = here->BSIM4v2cggb; + xcgdb = here->BSIM4v2cgsb; + xcgsb = here->BSIM4v2cgdb; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb); + xcsgb = here->BSIM4v2cdgb; + xcbgb = here->BSIM4v2cbgb; + } + else + { xcggb = here->BSIM4v2cggb + cgdo + cgso + + pParam->BSIM4v2cgbo; + xcgdb = here->BSIM4v2cgsb - cgdo; + xcgsb = here->BSIM4v2cgdb - cgso; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = -(here->BSIM4v2cggb + here->BSIM4v2cbgb + + here->BSIM4v2cdgb + cgdo); + xcsgb = here->BSIM4v2cdgb - cgso; + xcbgb = here->BSIM4v2cbgb - pParam->BSIM4v2cgbo; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddb = here->BSIM4v2capbd + cgdo - (here->BSIM4v2cgsb + + here->BSIM4v2cbsb + here->BSIM4v2cdsb); + xcdsb = -(here->BSIM4v2cgdb + here->BSIM4v2cbdb + + here->BSIM4v2cddb); + + xcsdb = here->BSIM4v2cdsb; + xcssb = here->BSIM4v2cddb + here->BSIM4v2capbs + cgso; + + if (!here->BSIM4v2rbodyMod) + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb); + xcbdb = here->BSIM4v2cbsb - here->BSIM4v2capbd; + xcbsb = here->BSIM4v2cbdb - here->BSIM4v2capbs; + xcdbdb = 0.0; + } + else + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb) + + here->BSIM4v2capbd; + xcsbb = -(here->BSIM4v2cddb + here->BSIM4v2cdgb + + here->BSIM4v2cdsb); + xcbdb = here->BSIM4v2cbsb; + xcbsb = here->BSIM4v2cbdb; + xcdbdb = -here->BSIM4v2capbd; + xcsbsb = -here->BSIM4v2capbs; + } + xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { xcggb = xcgdb = xcgsb = xcgbb = 0.0; + xcbgb = xcbdb = xcbsb = xcbbb = 0.0; + xcdgb = xcddb = xcdsb = xcdbb = 0.0; + xcsgb = xcsdb = xcssb = xcsbb = 0.0; + + xgtg = here->BSIM4v2gtg; + xgtd = here->BSIM4v2gts; + xgts = here->BSIM4v2gtd; + xgtb = here->BSIM4v2gtb; + + xcqgb = here->BSIM4v2cqgb; + xcqdb = here->BSIM4v2cqsb; + xcqsb = here->BSIM4v2cqdb; + xcqbb = here->BSIM4v2cqbb; + + CoxWL = model->BSIM4v2coxe * here->pParam->BSIM4v2weffCV + * here->BSIM4v2nf * here->pParam->BSIM4v2leffCV; + qcheq = -(here->BSIM4v2qgate + here->BSIM4v2qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v2xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM4v2xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM4v2qdrn / qcheq; + Css = here->BSIM4v2cddb; + Cds = -(here->BSIM4v2cgdb + here->BSIM4v2cddb + + here->BSIM4v2cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM4v2cdgb; + Cdg = -(here->BSIM4v2cggb + here->BSIM4v2cdgb + + here->BSIM4v2cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM4v2cdsb; + Cdd = -(here->BSIM4v2cgsb + here->BSIM4v2cdsb + + here->BSIM4v2cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + } + + if (model->BSIM4v2rdsMod == 1) + { gstot = here->BSIM4v2gstot; + gstotd = here->BSIM4v2gstotd; + gstotg = here->BSIM4v2gstotg; + gstots = here->BSIM4v2gstots - gstot; + gstotb = here->BSIM4v2gstotb; + + gdtot = here->BSIM4v2gdtot; + gdtotd = here->BSIM4v2gdtotd - gdtot; + gdtotg = here->BSIM4v2gdtotg; + gdtots = here->BSIM4v2gdtots; + gdtotb = here->BSIM4v2gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0; + } + + + T1 = *(ckt->CKTstate0 + here->BSIM4v2qdef) * here->BSIM4v2gtau; + gds = here->BSIM4v2gds; + + /* + * Loading PZ matrix + */ + + if (!model->BSIM4v2rdsMod) + { gdpr = here->BSIM4v2drainConductance; + gspr = here->BSIM4v2sourceConductance; + } + else + gdpr = gspr = 0.0; + + if (!here->BSIM4v2rbodyMod) + { gjbd = here->BSIM4v2gbd; + gjbs = here->BSIM4v2gbs; + } + else + gjbd = gjbs = 0.0; + + geltd = here->BSIM4v2grgeltd; + + if (here->BSIM4v2rgateMod == 1) + { *(here->BSIM4v2GEgePtr) += geltd; + *(here->BSIM4v2GPgePtr) -= geltd; + *(here->BSIM4v2GEgpPtr) -= geltd; + + *(here->BSIM4v2GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v2GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v2GPgpPtr) += geltd - xgtg + gIgtotg; + *(here->BSIM4v2GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v2GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v2GPdpPtr) -= xgtd - gIgtotd; + *(here->BSIM4v2GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v2GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v2GPspPtr) -= xgts - gIgtots; + *(here->BSIM4v2GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v2GPbpPtr +1) += xcgbb * s->imag; + *(here->BSIM4v2GPbpPtr) -= xgtb - gIgtotb; + } + else if (here->BSIM4v2rgateMod == 2) + { *(here->BSIM4v2GEgePtr) += gcrg; + *(here->BSIM4v2GEgpPtr) += gcrgg; + *(here->BSIM4v2GEdpPtr) += gcrgd; + *(here->BSIM4v2GEspPtr) += gcrgs; + *(here->BSIM4v2GEbpPtr) += gcrgb; + + *(here->BSIM4v2GPgePtr) -= gcrg; + *(here->BSIM4v2GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v2GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v2GPgpPtr) -= gcrgg + xgtg - gIgtotg; + *(here->BSIM4v2GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v2GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v2GPdpPtr) -= gcrgd + xgtd - gIgtotd; + *(here->BSIM4v2GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v2GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v2GPspPtr) -= gcrgs + xgts - gIgtots; + *(here->BSIM4v2GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v2GPbpPtr +1) += xcgbb * s->imag; + *(here->BSIM4v2GPbpPtr) -= gcrgb + xgtb - gIgtotb; + } + else if (here->BSIM4v2rgateMod == 3) + { *(here->BSIM4v2GEgePtr) += geltd; + *(here->BSIM4v2GEgmPtr) -= geltd; + *(here->BSIM4v2GMgePtr) -= geltd; + *(here->BSIM4v2GMgmPtr) += geltd + gcrg; + *(here->BSIM4v2GMgmPtr ) += xcgmgmb * s->real; + *(here->BSIM4v2GMgmPtr +1) += xcgmgmb * s->imag; + + *(here->BSIM4v2GMdpPtr) += gcrgd; + *(here->BSIM4v2GMdpPtr ) += xcgmdb * s->real; + *(here->BSIM4v2GMdpPtr +1) += xcgmdb * s->imag; + *(here->BSIM4v2GMgpPtr) += gcrgg; + *(here->BSIM4v2GMspPtr) += gcrgs; + *(here->BSIM4v2GMspPtr ) += xcgmsb * s->real; + *(here->BSIM4v2GMspPtr +1) += xcgmsb * s->imag; + *(here->BSIM4v2GMbpPtr) += gcrgb; + *(here->BSIM4v2GMbpPtr ) += xcgmbb * s->real; + *(here->BSIM4v2GMbpPtr +1) += xcgmbb * s->imag; + + *(here->BSIM4v2DPgmPtr ) += xcdgmb * s->real; + *(here->BSIM4v2DPgmPtr +1) += xcdgmb * s->imag; + *(here->BSIM4v2GPgmPtr) -= gcrg; + *(here->BSIM4v2SPgmPtr ) += xcsgmb * s->real; + *(here->BSIM4v2SPgmPtr +1) += xcsgmb * s->imag; + *(here->BSIM4v2BPgmPtr ) += xcbgmb * s->real; + *(here->BSIM4v2BPgmPtr +1) += xcbgmb * s->imag; + + *(here->BSIM4v2GPgpPtr) -= gcrgg + xgtg - gIgtotg; + *(here->BSIM4v2GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v2GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v2GPdpPtr) -= gcrgd + xgtd - gIgtotd; + *(here->BSIM4v2GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v2GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v2GPspPtr) -= gcrgs + xgts - gIgtots; + *(here->BSIM4v2GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v2GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v2GPbpPtr) -= gcrgb + xgtb - gIgtotb; + *(here->BSIM4v2GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v2GPbpPtr +1) += xcgbb * s->imag; + } + else + { *(here->BSIM4v2GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v2GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v2GPdpPtr) -= xgtd - gIgtotd; + *(here->BSIM4v2GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v2GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v2GPgpPtr) -= xgtg - gIgtotg; + *(here->BSIM4v2GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v2GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v2GPspPtr) -= xgts - gIgtots; + *(here->BSIM4v2GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v2GPbpPtr +1) += xcgbb * s->imag; + *(here->BSIM4v2GPbpPtr) -= xgtb - gIgtotb; + } + + if (model->BSIM4v2rdsMod) + { (*(here->BSIM4v2DgpPtr) += gdtotg); + (*(here->BSIM4v2DspPtr) += gdtots); + (*(here->BSIM4v2DbpPtr) += gdtotb); + (*(here->BSIM4v2SdpPtr) += gstotd); + (*(here->BSIM4v2SgpPtr) += gstotg); + (*(here->BSIM4v2SbpPtr) += gstotb); + } + + *(here->BSIM4v2DPdpPtr ) += xcddb * s->real; + *(here->BSIM4v2DPdpPtr +1) += xcddb * s->imag; + *(here->BSIM4v2DPdpPtr) += gdpr + gds + here->BSIM4v2gbd + - gdtotd + RevSum + gbdpdp - gIdtotd + + dxpart * xgtd + T1 * ddxpart_dVd; + *(here->BSIM4v2DPdPtr) -= gdpr + gdtot; + *(here->BSIM4v2DPgpPtr ) += xcdgb * s->real; + *(here->BSIM4v2DPgpPtr +1) += xcdgb * s->imag; + *(here->BSIM4v2DPgpPtr) += Gm - gdtotg + gbdpg - gIdtotg + + T1 * ddxpart_dVg + dxpart * xgtg; + *(here->BSIM4v2DPspPtr ) += xcdsb * s->real; + *(here->BSIM4v2DPspPtr +1) += xcdsb * s->imag; + *(here->BSIM4v2DPspPtr) -= gds + FwdSum + gdtots - gbdpsp + gIdtots + - T1 * ddxpart_dVs - dxpart * xgts; + *(here->BSIM4v2DPbpPtr ) += xcdbb * s->real; + *(here->BSIM4v2DPbpPtr +1) += xcdbb * s->imag; + *(here->BSIM4v2DPbpPtr) -= gjbd + gdtotb - Gmbs - gbdpb + gIdtotb + - T1 * ddxpart_dVb - dxpart * xgtb; + + *(here->BSIM4v2DdpPtr) -= gdpr - gdtotd; + *(here->BSIM4v2DdPtr) += gdpr + gdtot; + + *(here->BSIM4v2SPdpPtr ) += xcsdb * s->real; + *(here->BSIM4v2SPdpPtr +1) += xcsdb * s->imag; + *(here->BSIM4v2SPdpPtr) -= gds + gstotd + RevSum - gbspdp + gIstotd + - T1 * dsxpart_dVd - sxpart * xgtd; + *(here->BSIM4v2SPgpPtr ) += xcsgb * s->real; + *(here->BSIM4v2SPgpPtr +1) += xcsgb * s->imag; + *(here->BSIM4v2SPgpPtr) -= Gm + gstotg - gbspg + gIstotg + - T1 * dsxpart_dVg - sxpart * xgtg; + *(here->BSIM4v2SPspPtr ) += xcssb * s->real; + *(here->BSIM4v2SPspPtr +1) += xcssb * s->imag; + *(here->BSIM4v2SPspPtr) += gspr + gds + here->BSIM4v2gbs - gIstots + - gstots + FwdSum + gbspsp + + sxpart * xgts + T1 * dsxpart_dVs; + *(here->BSIM4v2SPsPtr) -= gspr + gstot; + *(here->BSIM4v2SPbpPtr ) += xcsbb * s->real; + *(here->BSIM4v2SPbpPtr +1) += xcsbb * s->imag; + *(here->BSIM4v2SPbpPtr) -= gjbs + gstotb + Gmbs - gbspb + gIstotb + - T1 * dsxpart_dVb - sxpart * xgtb; + + *(here->BSIM4v2SspPtr) -= gspr - gstots; + *(here->BSIM4v2SsPtr) += gspr + gstot; + + *(here->BSIM4v2BPdpPtr ) += xcbdb * s->real; + *(here->BSIM4v2BPdpPtr +1) += xcbdb * s->imag; + *(here->BSIM4v2BPdpPtr) -= gjbd - gbbdp + gIbtotd; + *(here->BSIM4v2BPgpPtr ) += xcbgb * s->real; + *(here->BSIM4v2BPgpPtr +1) += xcbgb * s->imag; + *(here->BSIM4v2BPgpPtr) -= here->BSIM4v2gbgs + gIbtotg; + *(here->BSIM4v2BPspPtr ) += xcbsb * s->real; + *(here->BSIM4v2BPspPtr +1) += xcbsb * s->imag; + *(here->BSIM4v2BPspPtr) -= gjbs - gbbsp + gIbtots; + *(here->BSIM4v2BPbpPtr ) += xcbbb * s->real; + *(here->BSIM4v2BPbpPtr +1) += xcbbb * s->imag; + *(here->BSIM4v2BPbpPtr) += gjbd + gjbs - here->BSIM4v2gbbs + - gIbtotb; + ggidld = here->BSIM4v2ggidld; + ggidlg = here->BSIM4v2ggidlg; + ggidlb = here->BSIM4v2ggidlb; + ggislg = here->BSIM4v2ggislg; + ggisls = here->BSIM4v2ggisls; + ggislb = here->BSIM4v2ggislb; + + /* stamp gidl */ + (*(here->BSIM4v2DPdpPtr) += ggidld); + (*(here->BSIM4v2DPgpPtr) += ggidlg); + (*(here->BSIM4v2DPspPtr) -= (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v2DPbpPtr) += ggidlb); + (*(here->BSIM4v2BPdpPtr) -= ggidld); + (*(here->BSIM4v2BPgpPtr) -= ggidlg); + (*(here->BSIM4v2BPspPtr) += (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v2BPbpPtr) -= ggidlb); + /* stamp gisl */ + (*(here->BSIM4v2SPdpPtr) -= (ggisls + ggislg) + ggislb); + (*(here->BSIM4v2SPgpPtr) += ggislg); + (*(here->BSIM4v2SPspPtr) += ggisls); + (*(here->BSIM4v2SPbpPtr) += ggislb); + (*(here->BSIM4v2BPdpPtr) += (ggislg + ggisls) + ggislb); + (*(here->BSIM4v2BPgpPtr) -= ggislg); + (*(here->BSIM4v2BPspPtr) -= ggisls); + (*(here->BSIM4v2BPbpPtr) -= ggislb); + + if (here->BSIM4v2rbodyMod) + { (*(here->BSIM4v2DPdbPtr ) += xcdbdb * s->real); + (*(here->BSIM4v2DPdbPtr +1) += xcdbdb * s->imag); + (*(here->BSIM4v2DPdbPtr) -= here->BSIM4v2gbd); + (*(here->BSIM4v2SPsbPtr ) += xcsbsb * s->real); + (*(here->BSIM4v2SPsbPtr +1) += xcsbsb * s->imag); + (*(here->BSIM4v2SPsbPtr) -= here->BSIM4v2gbs); + + (*(here->BSIM4v2DBdpPtr ) += xcdbdb * s->real); + (*(here->BSIM4v2DBdpPtr +1) += xcdbdb * s->imag); + (*(here->BSIM4v2DBdpPtr) -= here->BSIM4v2gbd); + (*(here->BSIM4v2DBdbPtr ) -= xcdbdb * s->real); + (*(here->BSIM4v2DBdbPtr +1) -= xcdbdb * s->imag); + (*(here->BSIM4v2DBdbPtr) += here->BSIM4v2gbd + here->BSIM4v2grbpd + + here->BSIM4v2grbdb); + (*(here->BSIM4v2DBbpPtr) -= here->BSIM4v2grbpd); + (*(here->BSIM4v2DBbPtr) -= here->BSIM4v2grbdb); + + (*(here->BSIM4v2BPdbPtr) -= here->BSIM4v2grbpd); + (*(here->BSIM4v2BPbPtr) -= here->BSIM4v2grbpb); + (*(here->BSIM4v2BPsbPtr) -= here->BSIM4v2grbps); + (*(here->BSIM4v2BPbpPtr) += here->BSIM4v2grbpd + here->BSIM4v2grbps + + here->BSIM4v2grbpb); + /* WDL: (-here->BSIM4v2gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v2SBspPtr ) += xcsbsb * s->real); + (*(here->BSIM4v2SBspPtr +1) += xcsbsb * s->imag); + (*(here->BSIM4v2SBspPtr) -= here->BSIM4v2gbs); + (*(here->BSIM4v2SBbpPtr) -= here->BSIM4v2grbps); + (*(here->BSIM4v2SBbPtr) -= here->BSIM4v2grbsb); + (*(here->BSIM4v2SBsbPtr ) -= xcsbsb * s->real); + (*(here->BSIM4v2SBsbPtr +1) -= xcsbsb * s->imag); + (*(here->BSIM4v2SBsbPtr) += here->BSIM4v2gbs + + here->BSIM4v2grbps + here->BSIM4v2grbsb); + + (*(here->BSIM4v2BdbPtr) -= here->BSIM4v2grbdb); + (*(here->BSIM4v2BbpPtr) -= here->BSIM4v2grbpb); + (*(here->BSIM4v2BsbPtr) -= here->BSIM4v2grbsb); + (*(here->BSIM4v2BbPtr) += here->BSIM4v2grbsb + here->BSIM4v2grbdb + + here->BSIM4v2grbpb); + } + + if (here->BSIM4v2acnqsMod) + { *(here->BSIM4v2QqPtr ) += s->real * ScalingFactor; + *(here->BSIM4v2QqPtr +1) += s->imag * ScalingFactor; + *(here->BSIM4v2QgpPtr ) -= xcqgb * s->real; + *(here->BSIM4v2QgpPtr +1) -= xcqgb * s->imag; + *(here->BSIM4v2QdpPtr ) -= xcqdb * s->real; + *(here->BSIM4v2QdpPtr +1) -= xcqdb * s->imag; + *(here->BSIM4v2QbpPtr ) -= xcqbb * s->real; + *(here->BSIM4v2QbpPtr +1) -= xcqbb * s->imag; + *(here->BSIM4v2QspPtr ) -= xcqsb * s->real; + *(here->BSIM4v2QspPtr +1) -= xcqsb * s->imag; + + *(here->BSIM4v2GPqPtr) -= here->BSIM4v2gtau; + *(here->BSIM4v2DPqPtr) += dxpart * here->BSIM4v2gtau; + *(here->BSIM4v2SPqPtr) += sxpart * here->BSIM4v2gtau; + + *(here->BSIM4v2QqPtr) += here->BSIM4v2gtau; + *(here->BSIM4v2QgpPtr) += xgtg; + *(here->BSIM4v2QdpPtr) += xgtd; + *(here->BSIM4v2QbpPtr) += xgtb; + *(here->BSIM4v2QspPtr) += xgts; + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2set.c b/src/spicelib/devices/bsim4v2/b4v2set.c new file mode 100644 index 000000000..1dfcc2665 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2set.c @@ -0,0 +1,1679 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4set.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "jobdefs.h" /* Needed because the model searches for noise Analysis */ +#include "ftedefs.h" /* " " */ +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "const.h" +#include "sperror.h" + + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPS0 8.85418e-12 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define Charge_q 1.60219e-19 + +int +BSIM4v2setup(matrix,inModel,ckt,states) +SMPmatrix *matrix; +GENmodel *inModel; +CKTcircuit *ckt; +int *states; +{ +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance *here; +int error; +CKTnode *tmp; +double tmp1, tmp2; +int noiseAnalGiven = 0, createNode; /* Criteria for new node creation */ +double Rtot, DMCGeff, DMCIeff, DMDGeff; +JOB *job; + + /* Search for a noise analysis request */ + for (job = ((TSKtask *)(ft_curckt->ci_curTask))->jobs;job;job = job->JOBnextJob) { + if(strcmp(job->JOBname,"Noise Analysis")==0) { + noiseAnalGiven = 1; + break; + } + } + + /* loop through all the BSIM4v2 device models */ + for( ; model != NULL; model = model->BSIM4v2nextModel ) + { /* process defaults of model parameters */ + if (!model->BSIM4v2typeGiven) + model->BSIM4v2type = NMOS; + + if (!model->BSIM4v2mobModGiven) + model->BSIM4v2mobMod = 0; + else if ((model->BSIM4v2mobMod != 0) && (model->BSIM4v2mobMod != 1) + && (model->BSIM4v2mobMod != 2)) + { model->BSIM4v2mobMod = 0; + printf("Warning: mobMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v2binUnitGiven) + model->BSIM4v2binUnit = 1; + if (!model->BSIM4v2paramChkGiven) + model->BSIM4v2paramChk = 1; + + if (!model->BSIM4v2dioModGiven) + model->BSIM4v2dioMod = 1; + else if ((model->BSIM4v2dioMod != 0) && (model->BSIM4v2dioMod != 1) + && (model->BSIM4v2dioMod != 2)) + { model->BSIM4v2dioMod = 1; + printf("Warning: dioMod has been set to its default value: 1.\n"); + } + + if (!model->BSIM4v2capModGiven) + model->BSIM4v2capMod = 2; + else if ((model->BSIM4v2capMod != 0) && (model->BSIM4v2capMod != 1) + && (model->BSIM4v2capMod != 2)) + { model->BSIM4v2capMod = 2; + printf("Warning: capMod has been set to its default value: 2.\n"); + } + + if (!model->BSIM4v2rdsModGiven) + model->BSIM4v2rdsMod = 0; + else if ((model->BSIM4v2rdsMod != 0) && (model->BSIM4v2rdsMod != 1)) + { model->BSIM4v2rdsMod = 0; + printf("Warning: rdsMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v2rbodyModGiven) + model->BSIM4v2rbodyMod = 0; + else if ((model->BSIM4v2rbodyMod != 0) && (model->BSIM4v2rbodyMod != 1)) + { model->BSIM4v2rbodyMod = 0; + printf("Warning: rbodyMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v2rgateModGiven) + model->BSIM4v2rgateMod = 0; + else if ((model->BSIM4v2rgateMod != 0) && (model->BSIM4v2rgateMod != 1) + && (model->BSIM4v2rgateMod != 2) && (model->BSIM4v2rgateMod != 3)) + { model->BSIM4v2rgateMod = 0; + printf("Warning: rgateMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v2perModGiven) + model->BSIM4v2perMod = 1; + else if ((model->BSIM4v2perMod != 0) && (model->BSIM4v2perMod != 1)) + { model->BSIM4v2perMod = 1; + printf("Warning: perMod has been set to its default value: 1.\n"); + } + + if (!model->BSIM4v2geoModGiven) + model->BSIM4v2geoMod = 0; + + if (!model->BSIM4v2fnoiModGiven) + model->BSIM4v2fnoiMod = 1; + else if ((model->BSIM4v2fnoiMod != 0) && (model->BSIM4v2fnoiMod != 1)) + { model->BSIM4v2fnoiMod = 1; + printf("Warning: fnoiMod has been set to its default value: 1.\n"); + } + if (!model->BSIM4v2tnoiModGiven) + model->BSIM4v2tnoiMod = 0; /* WDLiu: tnoiMod=1 needs to set internal S/D nodes */ + else if ((model->BSIM4v2tnoiMod != 0) && (model->BSIM4v2tnoiMod != 1)) + { model->BSIM4v2tnoiMod = 0; + printf("Warning: tnoiMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v2trnqsModGiven) + model->BSIM4v2trnqsMod = 0; + else if ((model->BSIM4v2trnqsMod != 0) && (model->BSIM4v2trnqsMod != 1)) + { model->BSIM4v2trnqsMod = 0; + printf("Warning: trnqsMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v2acnqsModGiven) + model->BSIM4v2acnqsMod = 0; + else if ((model->BSIM4v2acnqsMod != 0) && (model->BSIM4v2acnqsMod != 1)) + { model->BSIM4v2acnqsMod = 0; + printf("Warning: acnqsMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v2igcModGiven) + model->BSIM4v2igcMod = 0; + else if ((model->BSIM4v2igcMod != 0) && (model->BSIM4v2igcMod != 1)) + { model->BSIM4v2igcMod = 0; + printf("Warning: igcMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v2igbModGiven) + model->BSIM4v2igbMod = 0; + else if ((model->BSIM4v2igbMod != 0) && (model->BSIM4v2igbMod != 1)) + { model->BSIM4v2igbMod = 0; + printf("Warning: igbMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v2versionGiven) + model->BSIM4v2version = "4.2.1"; + if (!model->BSIM4v2toxrefGiven) + model->BSIM4v2toxref = 30.0e-10; + if (!model->BSIM4v2toxeGiven) + model->BSIM4v2toxe = 30.0e-10; + if (!model->BSIM4v2toxpGiven) + model->BSIM4v2toxp = model->BSIM4v2toxe; + if (!model->BSIM4v2toxmGiven) + model->BSIM4v2toxm = model->BSIM4v2toxe; + if (!model->BSIM4v2dtoxGiven) + model->BSIM4v2dtox = 0.0; + if (!model->BSIM4v2epsroxGiven) + model->BSIM4v2epsrox = 3.9; + + if (!model->BSIM4v2cdscGiven) + model->BSIM4v2cdsc = 2.4e-4; /* unit Q/V/m^2 */ + if (!model->BSIM4v2cdscbGiven) + model->BSIM4v2cdscb = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v2cdscdGiven) + model->BSIM4v2cdscd = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v2citGiven) + model->BSIM4v2cit = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v2nfactorGiven) + model->BSIM4v2nfactor = 1.0; + if (!model->BSIM4v2xjGiven) + model->BSIM4v2xj = .15e-6; + if (!model->BSIM4v2vsatGiven) + model->BSIM4v2vsat = 8.0e4; /* unit m/s */ + if (!model->BSIM4v2atGiven) + model->BSIM4v2at = 3.3e4; /* unit m/s */ + if (!model->BSIM4v2a0Given) + model->BSIM4v2a0 = 1.0; + if (!model->BSIM4v2agsGiven) + model->BSIM4v2ags = 0.0; + if (!model->BSIM4v2a1Given) + model->BSIM4v2a1 = 0.0; + if (!model->BSIM4v2a2Given) + model->BSIM4v2a2 = 1.0; + if (!model->BSIM4v2ketaGiven) + model->BSIM4v2keta = -0.047; /* unit / V */ + if (!model->BSIM4v2nsubGiven) + model->BSIM4v2nsub = 6.0e16; /* unit 1/cm3 */ + if (!model->BSIM4v2ndepGiven) + model->BSIM4v2ndep = 1.7e17; /* unit 1/cm3 */ + if (!model->BSIM4v2nsdGiven) + model->BSIM4v2nsd = 1.0e20; /* unit 1/cm3 */ + if (!model->BSIM4v2phinGiven) + model->BSIM4v2phin = 0.0; /* unit V */ + if (!model->BSIM4v2ngateGiven) + model->BSIM4v2ngate = 0; /* unit 1/cm3 */ + if (!model->BSIM4v2vbmGiven) + model->BSIM4v2vbm = -3.0; + if (!model->BSIM4v2xtGiven) + model->BSIM4v2xt = 1.55e-7; + if (!model->BSIM4v2kt1Given) + model->BSIM4v2kt1 = -0.11; /* unit V */ + if (!model->BSIM4v2kt1lGiven) + model->BSIM4v2kt1l = 0.0; /* unit V*m */ + if (!model->BSIM4v2kt2Given) + model->BSIM4v2kt2 = 0.022; /* No unit */ + if (!model->BSIM4v2k3Given) + model->BSIM4v2k3 = 80.0; + if (!model->BSIM4v2k3bGiven) + model->BSIM4v2k3b = 0.0; + if (!model->BSIM4v2w0Given) + model->BSIM4v2w0 = 2.5e-6; + if (!model->BSIM4v2lpe0Given) + model->BSIM4v2lpe0 = 1.74e-7; + if (!model->BSIM4v2lpebGiven) + model->BSIM4v2lpeb = 0.0; + if (!model->BSIM4v2dvtp0Given) + model->BSIM4v2dvtp0 = 0.0; + if (!model->BSIM4v2dvtp1Given) + model->BSIM4v2dvtp1 = 0.0; + if (!model->BSIM4v2dvt0Given) + model->BSIM4v2dvt0 = 2.2; + if (!model->BSIM4v2dvt1Given) + model->BSIM4v2dvt1 = 0.53; + if (!model->BSIM4v2dvt2Given) + model->BSIM4v2dvt2 = -0.032; /* unit 1 / V */ + + if (!model->BSIM4v2dvt0wGiven) + model->BSIM4v2dvt0w = 0.0; + if (!model->BSIM4v2dvt1wGiven) + model->BSIM4v2dvt1w = 5.3e6; + if (!model->BSIM4v2dvt2wGiven) + model->BSIM4v2dvt2w = -0.032; + + if (!model->BSIM4v2droutGiven) + model->BSIM4v2drout = 0.56; + if (!model->BSIM4v2dsubGiven) + model->BSIM4v2dsub = model->BSIM4v2drout; + if (!model->BSIM4v2vth0Given) + model->BSIM4v2vth0 = (model->BSIM4v2type == NMOS) ? 0.7 : -0.7; + if (!model->BSIM4v2euGiven) + model->BSIM4v2eu = (model->BSIM4v2type == NMOS) ? 1.67 : 1.0;; + if (!model->BSIM4v2uaGiven) + model->BSIM4v2ua = (model->BSIM4v2mobMod == 2) ? 1.0e-15 : 1.0e-9; /* unit m/V */ + if (!model->BSIM4v2ua1Given) + model->BSIM4v2ua1 = 1.0e-9; /* unit m/V */ + if (!model->BSIM4v2ubGiven) + model->BSIM4v2ub = 1.0e-19; /* unit (m/V)**2 */ + if (!model->BSIM4v2ub1Given) + model->BSIM4v2ub1 = -1.0e-18; /* unit (m/V)**2 */ + if (!model->BSIM4v2ucGiven) + model->BSIM4v2uc = (model->BSIM4v2mobMod == 1) ? -0.0465 : -0.0465e-9; + if (!model->BSIM4v2uc1Given) + model->BSIM4v2uc1 = (model->BSIM4v2mobMod == 1) ? -0.056 : -0.056e-9; + if (!model->BSIM4v2u0Given) + model->BSIM4v2u0 = (model->BSIM4v2type == NMOS) ? 0.067 : 0.025; + if (!model->BSIM4v2uteGiven) + model->BSIM4v2ute = -1.5; + if (!model->BSIM4v2voffGiven) + model->BSIM4v2voff = -0.08; + if (!model->BSIM4v2vofflGiven) + model->BSIM4v2voffl = 0.0; + if (!model->BSIM4v2minvGiven) + model->BSIM4v2minv = 0.0; + if (!model->BSIM4v2fproutGiven) + model->BSIM4v2fprout = 0.0; + if (!model->BSIM4v2pditsGiven) + model->BSIM4v2pdits = 0.0; + if (!model->BSIM4v2pditsdGiven) + model->BSIM4v2pditsd = 0.0; + if (!model->BSIM4v2pditslGiven) + model->BSIM4v2pditsl = 0.0; + if (!model->BSIM4v2deltaGiven) + model->BSIM4v2delta = 0.01; + if (!model->BSIM4v2rdswminGiven) + model->BSIM4v2rdswmin = 0.0; + if (!model->BSIM4v2rdwminGiven) + model->BSIM4v2rdwmin = 0.0; + if (!model->BSIM4v2rswminGiven) + model->BSIM4v2rswmin = 0.0; + if (!model->BSIM4v2rdswGiven) + model->BSIM4v2rdsw = 200.0; /* in ohm*um */ + if (!model->BSIM4v2rdwGiven) + model->BSIM4v2rdw = 100.0; + if (!model->BSIM4v2rswGiven) + model->BSIM4v2rsw = 100.0; + if (!model->BSIM4v2prwgGiven) + model->BSIM4v2prwg = 1.0; /* in 1/V */ + if (!model->BSIM4v2prwbGiven) + model->BSIM4v2prwb = 0.0; + if (!model->BSIM4v2prtGiven) + if (!model->BSIM4v2prtGiven) + model->BSIM4v2prt = 0.0; + if (!model->BSIM4v2eta0Given) + model->BSIM4v2eta0 = 0.08; /* no unit */ + if (!model->BSIM4v2etabGiven) + model->BSIM4v2etab = -0.07; /* unit 1/V */ + if (!model->BSIM4v2pclmGiven) + model->BSIM4v2pclm = 1.3; /* no unit */ + if (!model->BSIM4v2pdibl1Given) + model->BSIM4v2pdibl1 = 0.39; /* no unit */ + if (!model->BSIM4v2pdibl2Given) + model->BSIM4v2pdibl2 = 0.0086; /* no unit */ + if (!model->BSIM4v2pdiblbGiven) + model->BSIM4v2pdiblb = 0.0; /* 1/V */ + if (!model->BSIM4v2pscbe1Given) + model->BSIM4v2pscbe1 = 4.24e8; + if (!model->BSIM4v2pscbe2Given) + model->BSIM4v2pscbe2 = 1.0e-5; + if (!model->BSIM4v2pvagGiven) + model->BSIM4v2pvag = 0.0; + if (!model->BSIM4v2wrGiven) + model->BSIM4v2wr = 1.0; + if (!model->BSIM4v2dwgGiven) + model->BSIM4v2dwg = 0.0; + if (!model->BSIM4v2dwbGiven) + model->BSIM4v2dwb = 0.0; + if (!model->BSIM4v2b0Given) + model->BSIM4v2b0 = 0.0; + if (!model->BSIM4v2b1Given) + model->BSIM4v2b1 = 0.0; + if (!model->BSIM4v2alpha0Given) + model->BSIM4v2alpha0 = 0.0; + if (!model->BSIM4v2alpha1Given) + model->BSIM4v2alpha1 = 0.0; + if (!model->BSIM4v2beta0Given) + model->BSIM4v2beta0 = 30.0; + if (!model->BSIM4v2agidlGiven) + model->BSIM4v2agidl = 0.0; + if (!model->BSIM4v2bgidlGiven) + model->BSIM4v2bgidl = 2.3e9; /* V/m */ + if (!model->BSIM4v2cgidlGiven) + model->BSIM4v2cgidl = 0.5; /* V^3 */ + if (!model->BSIM4v2egidlGiven) + model->BSIM4v2egidl = 0.8; /* V */ + if (!model->BSIM4v2aigcGiven) + model->BSIM4v2aigc = (model->BSIM4v2type == NMOS) ? 0.43 : 0.31; + if (!model->BSIM4v2bigcGiven) + model->BSIM4v2bigc = (model->BSIM4v2type == NMOS) ? 0.054 : 0.024; + if (!model->BSIM4v2cigcGiven) + model->BSIM4v2cigc = (model->BSIM4v2type == NMOS) ? 0.075 : 0.03; + if (!model->BSIM4v2aigsdGiven) + model->BSIM4v2aigsd = (model->BSIM4v2type == NMOS) ? 0.43 : 0.31; + if (!model->BSIM4v2bigsdGiven) + model->BSIM4v2bigsd = (model->BSIM4v2type == NMOS) ? 0.054 : 0.024; + if (!model->BSIM4v2cigsdGiven) + model->BSIM4v2cigsd = (model->BSIM4v2type == NMOS) ? 0.075 : 0.03; + if (!model->BSIM4v2aigbaccGiven) + model->BSIM4v2aigbacc = 0.43; + if (!model->BSIM4v2bigbaccGiven) + model->BSIM4v2bigbacc = 0.054; + if (!model->BSIM4v2cigbaccGiven) + model->BSIM4v2cigbacc = 0.075; + if (!model->BSIM4v2aigbinvGiven) + model->BSIM4v2aigbinv = 0.35; + if (!model->BSIM4v2bigbinvGiven) + model->BSIM4v2bigbinv = 0.03; + if (!model->BSIM4v2cigbinvGiven) + model->BSIM4v2cigbinv = 0.006; + if (!model->BSIM4v2nigcGiven) + model->BSIM4v2nigc = 1.0; + if (!model->BSIM4v2nigbinvGiven) + model->BSIM4v2nigbinv = 3.0; + if (!model->BSIM4v2nigbaccGiven) + model->BSIM4v2nigbacc = 1.0; + if (!model->BSIM4v2ntoxGiven) + model->BSIM4v2ntox = 1.0; + if (!model->BSIM4v2eigbinvGiven) + model->BSIM4v2eigbinv = 1.1; + if (!model->BSIM4v2pigcdGiven) + model->BSIM4v2pigcd = 1.0; + if (!model->BSIM4v2poxedgeGiven) + model->BSIM4v2poxedge = 1.0; + if (!model->BSIM4v2xrcrg1Given) + model->BSIM4v2xrcrg1 = 12.0; + if (!model->BSIM4v2xrcrg2Given) + model->BSIM4v2xrcrg2 = 1.0; + if (!model->BSIM4v2ijthsfwdGiven) + model->BSIM4v2ijthsfwd = 0.1; /* unit A */ + if (!model->BSIM4v2ijthdfwdGiven) + model->BSIM4v2ijthdfwd = model->BSIM4v2ijthsfwd; + if (!model->BSIM4v2ijthsrevGiven) + model->BSIM4v2ijthsrev = 0.1; /* unit A */ + if (!model->BSIM4v2ijthdrevGiven) + model->BSIM4v2ijthdrev = model->BSIM4v2ijthsrev; + if (!model->BSIM4v2tnoiaGiven) + model->BSIM4v2tnoia = 1.5; + if (!model->BSIM4v2tnoibGiven) + model->BSIM4v2tnoib = 3.5; + if (!model->BSIM4v2ntnoiGiven) + model->BSIM4v2ntnoi = 1.0; + + if (!model->BSIM4v2xjbvsGiven) + model->BSIM4v2xjbvs = 1.0; /* no unit */ + if (!model->BSIM4v2xjbvdGiven) + model->BSIM4v2xjbvd = model->BSIM4v2xjbvs; + if (!model->BSIM4v2bvsGiven) + model->BSIM4v2bvs = 10.0; /* V */ + if (!model->BSIM4v2bvdGiven) + model->BSIM4v2bvd = model->BSIM4v2bvs; + if (!model->BSIM4v2gbminGiven) + model->BSIM4v2gbmin = 1.0e-12; /* in mho */ + if (!model->BSIM4v2rbdbGiven) + model->BSIM4v2rbdb = 50.0; /* in ohm */ + if (!model->BSIM4v2rbpbGiven) + model->BSIM4v2rbpb = 50.0; + if (!model->BSIM4v2rbsbGiven) + model->BSIM4v2rbsb = 50.0; + if (!model->BSIM4v2rbpsGiven) + model->BSIM4v2rbps = 50.0; + if (!model->BSIM4v2rbpdGiven) + model->BSIM4v2rbpd = 50.0; + + if (!model->BSIM4v2cgslGiven) + model->BSIM4v2cgsl = 0.0; + if (!model->BSIM4v2cgdlGiven) + model->BSIM4v2cgdl = 0.0; + if (!model->BSIM4v2ckappasGiven) + model->BSIM4v2ckappas = 0.6; + if (!model->BSIM4v2ckappadGiven) + model->BSIM4v2ckappad = model->BSIM4v2ckappas; + if (!model->BSIM4v2clcGiven) + model->BSIM4v2clc = 0.1e-6; + if (!model->BSIM4v2cleGiven) + model->BSIM4v2cle = 0.6; + if (!model->BSIM4v2vfbcvGiven) + model->BSIM4v2vfbcv = -1.0; + if (!model->BSIM4v2acdeGiven) + model->BSIM4v2acde = 1.0; + if (!model->BSIM4v2moinGiven) + model->BSIM4v2moin = 15.0; + if (!model->BSIM4v2noffGiven) + model->BSIM4v2noff = 1.0; + if (!model->BSIM4v2voffcvGiven) + model->BSIM4v2voffcv = 0.0; + if (!model->BSIM4v2dmcgGiven) + model->BSIM4v2dmcg = 0.0; + if (!model->BSIM4v2dmciGiven) + model->BSIM4v2dmci = model->BSIM4v2dmcg; + if (!model->BSIM4v2dmdgGiven) + model->BSIM4v2dmdg = 0.0; + if (!model->BSIM4v2dmcgtGiven) + model->BSIM4v2dmcgt = 0.0; + if (!model->BSIM4v2xgwGiven) + model->BSIM4v2xgw = 0.0; + if (!model->BSIM4v2xglGiven) + model->BSIM4v2xgl = 0.0; + if (!model->BSIM4v2rshgGiven) + model->BSIM4v2rshg = 0.1; + if (!model->BSIM4v2ngconGiven) + model->BSIM4v2ngcon = 1.0; + if (!model->BSIM4v2tcjGiven) + model->BSIM4v2tcj = 0.0; + if (!model->BSIM4v2tpbGiven) + model->BSIM4v2tpb = 0.0; + if (!model->BSIM4v2tcjswGiven) + model->BSIM4v2tcjsw = 0.0; + if (!model->BSIM4v2tpbswGiven) + model->BSIM4v2tpbsw = 0.0; + if (!model->BSIM4v2tcjswgGiven) + model->BSIM4v2tcjswg = 0.0; + if (!model->BSIM4v2tpbswgGiven) + model->BSIM4v2tpbswg = 0.0; + + /* Length dependence */ + if (!model->BSIM4v2lcdscGiven) + model->BSIM4v2lcdsc = 0.0; + if (!model->BSIM4v2lcdscbGiven) + model->BSIM4v2lcdscb = 0.0; + if (!model->BSIM4v2lcdscdGiven) + model->BSIM4v2lcdscd = 0.0; + if (!model->BSIM4v2lcitGiven) + model->BSIM4v2lcit = 0.0; + if (!model->BSIM4v2lnfactorGiven) + model->BSIM4v2lnfactor = 0.0; + if (!model->BSIM4v2lxjGiven) + model->BSIM4v2lxj = 0.0; + if (!model->BSIM4v2lvsatGiven) + model->BSIM4v2lvsat = 0.0; + if (!model->BSIM4v2latGiven) + model->BSIM4v2lat = 0.0; + if (!model->BSIM4v2la0Given) + model->BSIM4v2la0 = 0.0; + if (!model->BSIM4v2lagsGiven) + model->BSIM4v2lags = 0.0; + if (!model->BSIM4v2la1Given) + model->BSIM4v2la1 = 0.0; + if (!model->BSIM4v2la2Given) + model->BSIM4v2la2 = 0.0; + if (!model->BSIM4v2lketaGiven) + model->BSIM4v2lketa = 0.0; + if (!model->BSIM4v2lnsubGiven) + model->BSIM4v2lnsub = 0.0; + if (!model->BSIM4v2lndepGiven) + model->BSIM4v2lndep = 0.0; + if (!model->BSIM4v2lnsdGiven) + model->BSIM4v2lnsd = 0.0; + if (!model->BSIM4v2lphinGiven) + model->BSIM4v2lphin = 0.0; + if (!model->BSIM4v2lngateGiven) + model->BSIM4v2lngate = 0.0; + if (!model->BSIM4v2lvbmGiven) + model->BSIM4v2lvbm = 0.0; + if (!model->BSIM4v2lxtGiven) + model->BSIM4v2lxt = 0.0; + if (!model->BSIM4v2lkt1Given) + model->BSIM4v2lkt1 = 0.0; + if (!model->BSIM4v2lkt1lGiven) + model->BSIM4v2lkt1l = 0.0; + if (!model->BSIM4v2lkt2Given) + model->BSIM4v2lkt2 = 0.0; + if (!model->BSIM4v2lk3Given) + model->BSIM4v2lk3 = 0.0; + if (!model->BSIM4v2lk3bGiven) + model->BSIM4v2lk3b = 0.0; + if (!model->BSIM4v2lw0Given) + model->BSIM4v2lw0 = 0.0; + if (!model->BSIM4v2llpe0Given) + model->BSIM4v2llpe0 = 0.0; + if (!model->BSIM4v2llpebGiven) + model->BSIM4v2llpeb = model->BSIM4v2llpe0; + if (!model->BSIM4v2ldvtp0Given) + model->BSIM4v2ldvtp0 = 0.0; + if (!model->BSIM4v2ldvtp1Given) + model->BSIM4v2ldvtp1 = 0.0; + if (!model->BSIM4v2ldvt0Given) + model->BSIM4v2ldvt0 = 0.0; + if (!model->BSIM4v2ldvt1Given) + model->BSIM4v2ldvt1 = 0.0; + if (!model->BSIM4v2ldvt2Given) + model->BSIM4v2ldvt2 = 0.0; + if (!model->BSIM4v2ldvt0wGiven) + model->BSIM4v2ldvt0w = 0.0; + if (!model->BSIM4v2ldvt1wGiven) + model->BSIM4v2ldvt1w = 0.0; + if (!model->BSIM4v2ldvt2wGiven) + model->BSIM4v2ldvt2w = 0.0; + if (!model->BSIM4v2ldroutGiven) + model->BSIM4v2ldrout = 0.0; + if (!model->BSIM4v2ldsubGiven) + model->BSIM4v2ldsub = 0.0; + if (!model->BSIM4v2lvth0Given) + model->BSIM4v2lvth0 = 0.0; + if (!model->BSIM4v2luaGiven) + model->BSIM4v2lua = 0.0; + if (!model->BSIM4v2lua1Given) + model->BSIM4v2lua1 = 0.0; + if (!model->BSIM4v2lubGiven) + model->BSIM4v2lub = 0.0; + if (!model->BSIM4v2lub1Given) + model->BSIM4v2lub1 = 0.0; + if (!model->BSIM4v2lucGiven) + model->BSIM4v2luc = 0.0; + if (!model->BSIM4v2luc1Given) + model->BSIM4v2luc1 = 0.0; + if (!model->BSIM4v2lu0Given) + model->BSIM4v2lu0 = 0.0; + if (!model->BSIM4v2luteGiven) + model->BSIM4v2lute = 0.0; + if (!model->BSIM4v2lvoffGiven) + model->BSIM4v2lvoff = 0.0; + if (!model->BSIM4v2lminvGiven) + model->BSIM4v2lminv = 0.0; + if (!model->BSIM4v2lfproutGiven) + model->BSIM4v2lfprout = 0.0; + if (!model->BSIM4v2lpditsGiven) + model->BSIM4v2lpdits = 0.0; + if (!model->BSIM4v2lpditsdGiven) + model->BSIM4v2lpditsd = 0.0; + if (!model->BSIM4v2ldeltaGiven) + model->BSIM4v2ldelta = 0.0; + if (!model->BSIM4v2lrdswGiven) + model->BSIM4v2lrdsw = 0.0; + if (!model->BSIM4v2lrdwGiven) + model->BSIM4v2lrdw = 0.0; + if (!model->BSIM4v2lrswGiven) + model->BSIM4v2lrsw = 0.0; + if (!model->BSIM4v2lprwbGiven) + model->BSIM4v2lprwb = 0.0; + if (!model->BSIM4v2lprwgGiven) + model->BSIM4v2lprwg = 0.0; + if (!model->BSIM4v2lprtGiven) + model->BSIM4v2lprt = 0.0; + if (!model->BSIM4v2leta0Given) + model->BSIM4v2leta0 = 0.0; + if (!model->BSIM4v2letabGiven) + model->BSIM4v2letab = -0.0; + if (!model->BSIM4v2lpclmGiven) + model->BSIM4v2lpclm = 0.0; + if (!model->BSIM4v2lpdibl1Given) + model->BSIM4v2lpdibl1 = 0.0; + if (!model->BSIM4v2lpdibl2Given) + model->BSIM4v2lpdibl2 = 0.0; + if (!model->BSIM4v2lpdiblbGiven) + model->BSIM4v2lpdiblb = 0.0; + if (!model->BSIM4v2lpscbe1Given) + model->BSIM4v2lpscbe1 = 0.0; + if (!model->BSIM4v2lpscbe2Given) + model->BSIM4v2lpscbe2 = 0.0; + if (!model->BSIM4v2lpvagGiven) + model->BSIM4v2lpvag = 0.0; + if (!model->BSIM4v2lwrGiven) + model->BSIM4v2lwr = 0.0; + if (!model->BSIM4v2ldwgGiven) + model->BSIM4v2ldwg = 0.0; + if (!model->BSIM4v2ldwbGiven) + model->BSIM4v2ldwb = 0.0; + if (!model->BSIM4v2lb0Given) + model->BSIM4v2lb0 = 0.0; + if (!model->BSIM4v2lb1Given) + model->BSIM4v2lb1 = 0.0; + if (!model->BSIM4v2lalpha0Given) + model->BSIM4v2lalpha0 = 0.0; + if (!model->BSIM4v2lalpha1Given) + model->BSIM4v2lalpha1 = 0.0; + if (!model->BSIM4v2lbeta0Given) + model->BSIM4v2lbeta0 = 0.0; + if (!model->BSIM4v2lagidlGiven) + model->BSIM4v2lagidl = 0.0; + if (!model->BSIM4v2lbgidlGiven) + model->BSIM4v2lbgidl = 0.0; + if (!model->BSIM4v2lcgidlGiven) + model->BSIM4v2lcgidl = 0.0; + if (!model->BSIM4v2legidlGiven) + model->BSIM4v2legidl = 0.0; + if (!model->BSIM4v2laigcGiven) + model->BSIM4v2laigc = 0.0; + if (!model->BSIM4v2lbigcGiven) + model->BSIM4v2lbigc = 0.0; + if (!model->BSIM4v2lcigcGiven) + model->BSIM4v2lcigc = 0.0; + if (!model->BSIM4v2laigsdGiven) + model->BSIM4v2laigsd = 0.0; + if (!model->BSIM4v2lbigsdGiven) + model->BSIM4v2lbigsd = 0.0; + if (!model->BSIM4v2lcigsdGiven) + model->BSIM4v2lcigsd = 0.0; + if (!model->BSIM4v2laigbaccGiven) + model->BSIM4v2laigbacc = 0.0; + if (!model->BSIM4v2lbigbaccGiven) + model->BSIM4v2lbigbacc = 0.0; + if (!model->BSIM4v2lcigbaccGiven) + model->BSIM4v2lcigbacc = 0.0; + if (!model->BSIM4v2laigbinvGiven) + model->BSIM4v2laigbinv = 0.0; + if (!model->BSIM4v2lbigbinvGiven) + model->BSIM4v2lbigbinv = 0.0; + if (!model->BSIM4v2lcigbinvGiven) + model->BSIM4v2lcigbinv = 0.0; + if (!model->BSIM4v2lnigcGiven) + model->BSIM4v2lnigc = 0.0; + if (!model->BSIM4v2lnigbinvGiven) + model->BSIM4v2lnigbinv = 0.0; + if (!model->BSIM4v2lnigbaccGiven) + model->BSIM4v2lnigbacc = 0.0; + if (!model->BSIM4v2lntoxGiven) + model->BSIM4v2lntox = 0.0; + if (!model->BSIM4v2leigbinvGiven) + model->BSIM4v2leigbinv = 0.0; + if (!model->BSIM4v2lpigcdGiven) + model->BSIM4v2lpigcd = 0.0; + if (!model->BSIM4v2lpoxedgeGiven) + model->BSIM4v2lpoxedge = 0.0; + if (!model->BSIM4v2lxrcrg1Given) + model->BSIM4v2lxrcrg1 = 0.0; + if (!model->BSIM4v2lxrcrg2Given) + model->BSIM4v2lxrcrg2 = 0.0; + if (!model->BSIM4v2leuGiven) + model->BSIM4v2leu = 0.0; + if (!model->BSIM4v2lvfbGiven) + model->BSIM4v2lvfb = 0.0; + + if (!model->BSIM4v2lcgslGiven) + model->BSIM4v2lcgsl = 0.0; + if (!model->BSIM4v2lcgdlGiven) + model->BSIM4v2lcgdl = 0.0; + if (!model->BSIM4v2lckappasGiven) + model->BSIM4v2lckappas = 0.0; + if (!model->BSIM4v2lckappadGiven) + model->BSIM4v2lckappad = 0.0; + if (!model->BSIM4v2lclcGiven) + model->BSIM4v2lclc = 0.0; + if (!model->BSIM4v2lcleGiven) + model->BSIM4v2lcle = 0.0; + if (!model->BSIM4v2lcfGiven) + model->BSIM4v2lcf = 0.0; + if (!model->BSIM4v2lvfbcvGiven) + model->BSIM4v2lvfbcv = 0.0; + if (!model->BSIM4v2lacdeGiven) + model->BSIM4v2lacde = 0.0; + if (!model->BSIM4v2lmoinGiven) + model->BSIM4v2lmoin = 0.0; + if (!model->BSIM4v2lnoffGiven) + model->BSIM4v2lnoff = 0.0; + if (!model->BSIM4v2lvoffcvGiven) + model->BSIM4v2lvoffcv = 0.0; + + /* Width dependence */ + if (!model->BSIM4v2wcdscGiven) + model->BSIM4v2wcdsc = 0.0; + if (!model->BSIM4v2wcdscbGiven) + model->BSIM4v2wcdscb = 0.0; + if (!model->BSIM4v2wcdscdGiven) + model->BSIM4v2wcdscd = 0.0; + if (!model->BSIM4v2wcitGiven) + model->BSIM4v2wcit = 0.0; + if (!model->BSIM4v2wnfactorGiven) + model->BSIM4v2wnfactor = 0.0; + if (!model->BSIM4v2wxjGiven) + model->BSIM4v2wxj = 0.0; + if (!model->BSIM4v2wvsatGiven) + model->BSIM4v2wvsat = 0.0; + if (!model->BSIM4v2watGiven) + model->BSIM4v2wat = 0.0; + if (!model->BSIM4v2wa0Given) + model->BSIM4v2wa0 = 0.0; + if (!model->BSIM4v2wagsGiven) + model->BSIM4v2wags = 0.0; + if (!model->BSIM4v2wa1Given) + model->BSIM4v2wa1 = 0.0; + if (!model->BSIM4v2wa2Given) + model->BSIM4v2wa2 = 0.0; + if (!model->BSIM4v2wketaGiven) + model->BSIM4v2wketa = 0.0; + if (!model->BSIM4v2wnsubGiven) + model->BSIM4v2wnsub = 0.0; + if (!model->BSIM4v2wndepGiven) + model->BSIM4v2wndep = 0.0; + if (!model->BSIM4v2wnsdGiven) + model->BSIM4v2wnsd = 0.0; + if (!model->BSIM4v2wphinGiven) + model->BSIM4v2wphin = 0.0; + if (!model->BSIM4v2wngateGiven) + model->BSIM4v2wngate = 0.0; + if (!model->BSIM4v2wvbmGiven) + model->BSIM4v2wvbm = 0.0; + if (!model->BSIM4v2wxtGiven) + model->BSIM4v2wxt = 0.0; + if (!model->BSIM4v2wkt1Given) + model->BSIM4v2wkt1 = 0.0; + if (!model->BSIM4v2wkt1lGiven) + model->BSIM4v2wkt1l = 0.0; + if (!model->BSIM4v2wkt2Given) + model->BSIM4v2wkt2 = 0.0; + if (!model->BSIM4v2wk3Given) + model->BSIM4v2wk3 = 0.0; + if (!model->BSIM4v2wk3bGiven) + model->BSIM4v2wk3b = 0.0; + if (!model->BSIM4v2ww0Given) + model->BSIM4v2ww0 = 0.0; + if (!model->BSIM4v2wlpe0Given) + model->BSIM4v2wlpe0 = 0.0; + if (!model->BSIM4v2wlpebGiven) + model->BSIM4v2wlpeb = model->BSIM4v2wlpe0; + if (!model->BSIM4v2wdvtp0Given) + model->BSIM4v2wdvtp0 = 0.0; + if (!model->BSIM4v2wdvtp1Given) + model->BSIM4v2wdvtp1 = 0.0; + if (!model->BSIM4v2wdvt0Given) + model->BSIM4v2wdvt0 = 0.0; + if (!model->BSIM4v2wdvt1Given) + model->BSIM4v2wdvt1 = 0.0; + if (!model->BSIM4v2wdvt2Given) + model->BSIM4v2wdvt2 = 0.0; + if (!model->BSIM4v2wdvt0wGiven) + model->BSIM4v2wdvt0w = 0.0; + if (!model->BSIM4v2wdvt1wGiven) + model->BSIM4v2wdvt1w = 0.0; + if (!model->BSIM4v2wdvt2wGiven) + model->BSIM4v2wdvt2w = 0.0; + if (!model->BSIM4v2wdroutGiven) + model->BSIM4v2wdrout = 0.0; + if (!model->BSIM4v2wdsubGiven) + model->BSIM4v2wdsub = 0.0; + if (!model->BSIM4v2wvth0Given) + model->BSIM4v2wvth0 = 0.0; + if (!model->BSIM4v2wuaGiven) + model->BSIM4v2wua = 0.0; + if (!model->BSIM4v2wua1Given) + model->BSIM4v2wua1 = 0.0; + if (!model->BSIM4v2wubGiven) + model->BSIM4v2wub = 0.0; + if (!model->BSIM4v2wub1Given) + model->BSIM4v2wub1 = 0.0; + if (!model->BSIM4v2wucGiven) + model->BSIM4v2wuc = 0.0; + if (!model->BSIM4v2wuc1Given) + model->BSIM4v2wuc1 = 0.0; + if (!model->BSIM4v2wu0Given) + model->BSIM4v2wu0 = 0.0; + if (!model->BSIM4v2wuteGiven) + model->BSIM4v2wute = 0.0; + if (!model->BSIM4v2wvoffGiven) + model->BSIM4v2wvoff = 0.0; + if (!model->BSIM4v2wminvGiven) + model->BSIM4v2wminv = 0.0; + if (!model->BSIM4v2wfproutGiven) + model->BSIM4v2wfprout = 0.0; + if (!model->BSIM4v2wpditsGiven) + model->BSIM4v2wpdits = 0.0; + if (!model->BSIM4v2wpditsdGiven) + model->BSIM4v2wpditsd = 0.0; + if (!model->BSIM4v2wdeltaGiven) + model->BSIM4v2wdelta = 0.0; + if (!model->BSIM4v2wrdswGiven) + model->BSIM4v2wrdsw = 0.0; + if (!model->BSIM4v2wrdwGiven) + model->BSIM4v2wrdw = 0.0; + if (!model->BSIM4v2wrswGiven) + model->BSIM4v2wrsw = 0.0; + if (!model->BSIM4v2wprwbGiven) + model->BSIM4v2wprwb = 0.0; + if (!model->BSIM4v2wprwgGiven) + model->BSIM4v2wprwg = 0.0; + if (!model->BSIM4v2wprtGiven) + model->BSIM4v2wprt = 0.0; + if (!model->BSIM4v2weta0Given) + model->BSIM4v2weta0 = 0.0; + if (!model->BSIM4v2wetabGiven) + model->BSIM4v2wetab = 0.0; + if (!model->BSIM4v2wpclmGiven) + model->BSIM4v2wpclm = 0.0; + if (!model->BSIM4v2wpdibl1Given) + model->BSIM4v2wpdibl1 = 0.0; + if (!model->BSIM4v2wpdibl2Given) + model->BSIM4v2wpdibl2 = 0.0; + if (!model->BSIM4v2wpdiblbGiven) + model->BSIM4v2wpdiblb = 0.0; + if (!model->BSIM4v2wpscbe1Given) + model->BSIM4v2wpscbe1 = 0.0; + if (!model->BSIM4v2wpscbe2Given) + model->BSIM4v2wpscbe2 = 0.0; + if (!model->BSIM4v2wpvagGiven) + model->BSIM4v2wpvag = 0.0; + if (!model->BSIM4v2wwrGiven) + model->BSIM4v2wwr = 0.0; + if (!model->BSIM4v2wdwgGiven) + model->BSIM4v2wdwg = 0.0; + if (!model->BSIM4v2wdwbGiven) + model->BSIM4v2wdwb = 0.0; + if (!model->BSIM4v2wb0Given) + model->BSIM4v2wb0 = 0.0; + if (!model->BSIM4v2wb1Given) + model->BSIM4v2wb1 = 0.0; + if (!model->BSIM4v2walpha0Given) + model->BSIM4v2walpha0 = 0.0; + if (!model->BSIM4v2walpha1Given) + model->BSIM4v2walpha1 = 0.0; + if (!model->BSIM4v2wbeta0Given) + model->BSIM4v2wbeta0 = 0.0; + if (!model->BSIM4v2wagidlGiven) + model->BSIM4v2wagidl = 0.0; + if (!model->BSIM4v2wbgidlGiven) + model->BSIM4v2wbgidl = 0.0; + if (!model->BSIM4v2wcgidlGiven) + model->BSIM4v2wcgidl = 0.0; + if (!model->BSIM4v2wegidlGiven) + model->BSIM4v2wegidl = 0.0; + if (!model->BSIM4v2waigcGiven) + model->BSIM4v2waigc = 0.0; + if (!model->BSIM4v2wbigcGiven) + model->BSIM4v2wbigc = 0.0; + if (!model->BSIM4v2wcigcGiven) + model->BSIM4v2wcigc = 0.0; + if (!model->BSIM4v2waigsdGiven) + model->BSIM4v2waigsd = 0.0; + if (!model->BSIM4v2wbigsdGiven) + model->BSIM4v2wbigsd = 0.0; + if (!model->BSIM4v2wcigsdGiven) + model->BSIM4v2wcigsd = 0.0; + if (!model->BSIM4v2waigbaccGiven) + model->BSIM4v2waigbacc = 0.0; + if (!model->BSIM4v2wbigbaccGiven) + model->BSIM4v2wbigbacc = 0.0; + if (!model->BSIM4v2wcigbaccGiven) + model->BSIM4v2wcigbacc = 0.0; + if (!model->BSIM4v2waigbinvGiven) + model->BSIM4v2waigbinv = 0.0; + if (!model->BSIM4v2wbigbinvGiven) + model->BSIM4v2wbigbinv = 0.0; + if (!model->BSIM4v2wcigbinvGiven) + model->BSIM4v2wcigbinv = 0.0; + if (!model->BSIM4v2wnigcGiven) + model->BSIM4v2wnigc = 0.0; + if (!model->BSIM4v2wnigbinvGiven) + model->BSIM4v2wnigbinv = 0.0; + if (!model->BSIM4v2wnigbaccGiven) + model->BSIM4v2wnigbacc = 0.0; + if (!model->BSIM4v2wntoxGiven) + model->BSIM4v2wntox = 0.0; + if (!model->BSIM4v2weigbinvGiven) + model->BSIM4v2weigbinv = 0.0; + if (!model->BSIM4v2wpigcdGiven) + model->BSIM4v2wpigcd = 0.0; + if (!model->BSIM4v2wpoxedgeGiven) + model->BSIM4v2wpoxedge = 0.0; + if (!model->BSIM4v2wxrcrg1Given) + model->BSIM4v2wxrcrg1 = 0.0; + if (!model->BSIM4v2wxrcrg2Given) + model->BSIM4v2wxrcrg2 = 0.0; + if (!model->BSIM4v2weuGiven) + model->BSIM4v2weu = 0.0; + if (!model->BSIM4v2wvfbGiven) + model->BSIM4v2wvfb = 0.0; + + if (!model->BSIM4v2wcgslGiven) + model->BSIM4v2wcgsl = 0.0; + if (!model->BSIM4v2wcgdlGiven) + model->BSIM4v2wcgdl = 0.0; + if (!model->BSIM4v2wckappasGiven) + model->BSIM4v2wckappas = 0.0; + if (!model->BSIM4v2wckappadGiven) + model->BSIM4v2wckappad = 0.0; + if (!model->BSIM4v2wcfGiven) + model->BSIM4v2wcf = 0.0; + if (!model->BSIM4v2wclcGiven) + model->BSIM4v2wclc = 0.0; + if (!model->BSIM4v2wcleGiven) + model->BSIM4v2wcle = 0.0; + if (!model->BSIM4v2wvfbcvGiven) + model->BSIM4v2wvfbcv = 0.0; + if (!model->BSIM4v2wacdeGiven) + model->BSIM4v2wacde = 0.0; + if (!model->BSIM4v2wmoinGiven) + model->BSIM4v2wmoin = 0.0; + if (!model->BSIM4v2wnoffGiven) + model->BSIM4v2wnoff = 0.0; + if (!model->BSIM4v2wvoffcvGiven) + model->BSIM4v2wvoffcv = 0.0; + + /* Cross-term dependence */ + if (!model->BSIM4v2pcdscGiven) + model->BSIM4v2pcdsc = 0.0; + if (!model->BSIM4v2pcdscbGiven) + model->BSIM4v2pcdscb = 0.0; + if (!model->BSIM4v2pcdscdGiven) + model->BSIM4v2pcdscd = 0.0; + if (!model->BSIM4v2pcitGiven) + model->BSIM4v2pcit = 0.0; + if (!model->BSIM4v2pnfactorGiven) + model->BSIM4v2pnfactor = 0.0; + if (!model->BSIM4v2pxjGiven) + model->BSIM4v2pxj = 0.0; + if (!model->BSIM4v2pvsatGiven) + model->BSIM4v2pvsat = 0.0; + if (!model->BSIM4v2patGiven) + model->BSIM4v2pat = 0.0; + if (!model->BSIM4v2pa0Given) + model->BSIM4v2pa0 = 0.0; + + if (!model->BSIM4v2pagsGiven) + model->BSIM4v2pags = 0.0; + if (!model->BSIM4v2pa1Given) + model->BSIM4v2pa1 = 0.0; + if (!model->BSIM4v2pa2Given) + model->BSIM4v2pa2 = 0.0; + if (!model->BSIM4v2pketaGiven) + model->BSIM4v2pketa = 0.0; + if (!model->BSIM4v2pnsubGiven) + model->BSIM4v2pnsub = 0.0; + if (!model->BSIM4v2pndepGiven) + model->BSIM4v2pndep = 0.0; + if (!model->BSIM4v2pnsdGiven) + model->BSIM4v2pnsd = 0.0; + if (!model->BSIM4v2pphinGiven) + model->BSIM4v2pphin = 0.0; + if (!model->BSIM4v2pngateGiven) + model->BSIM4v2pngate = 0.0; + if (!model->BSIM4v2pvbmGiven) + model->BSIM4v2pvbm = 0.0; + if (!model->BSIM4v2pxtGiven) + model->BSIM4v2pxt = 0.0; + if (!model->BSIM4v2pkt1Given) + model->BSIM4v2pkt1 = 0.0; + if (!model->BSIM4v2pkt1lGiven) + model->BSIM4v2pkt1l = 0.0; + if (!model->BSIM4v2pkt2Given) + model->BSIM4v2pkt2 = 0.0; + if (!model->BSIM4v2pk3Given) + model->BSIM4v2pk3 = 0.0; + if (!model->BSIM4v2pk3bGiven) + model->BSIM4v2pk3b = 0.0; + if (!model->BSIM4v2pw0Given) + model->BSIM4v2pw0 = 0.0; + if (!model->BSIM4v2plpe0Given) + model->BSIM4v2plpe0 = 0.0; + if (!model->BSIM4v2plpebGiven) + model->BSIM4v2plpeb = model->BSIM4v2plpe0; + if (!model->BSIM4v2pdvtp0Given) + model->BSIM4v2pdvtp0 = 0.0; + if (!model->BSIM4v2pdvtp1Given) + model->BSIM4v2pdvtp1 = 0.0; + if (!model->BSIM4v2pdvt0Given) + model->BSIM4v2pdvt0 = 0.0; + if (!model->BSIM4v2pdvt1Given) + model->BSIM4v2pdvt1 = 0.0; + if (!model->BSIM4v2pdvt2Given) + model->BSIM4v2pdvt2 = 0.0; + if (!model->BSIM4v2pdvt0wGiven) + model->BSIM4v2pdvt0w = 0.0; + if (!model->BSIM4v2pdvt1wGiven) + model->BSIM4v2pdvt1w = 0.0; + if (!model->BSIM4v2pdvt2wGiven) + model->BSIM4v2pdvt2w = 0.0; + if (!model->BSIM4v2pdroutGiven) + model->BSIM4v2pdrout = 0.0; + if (!model->BSIM4v2pdsubGiven) + model->BSIM4v2pdsub = 0.0; + if (!model->BSIM4v2pvth0Given) + model->BSIM4v2pvth0 = 0.0; + if (!model->BSIM4v2puaGiven) + model->BSIM4v2pua = 0.0; + if (!model->BSIM4v2pua1Given) + model->BSIM4v2pua1 = 0.0; + if (!model->BSIM4v2pubGiven) + model->BSIM4v2pub = 0.0; + if (!model->BSIM4v2pub1Given) + model->BSIM4v2pub1 = 0.0; + if (!model->BSIM4v2pucGiven) + model->BSIM4v2puc = 0.0; + if (!model->BSIM4v2puc1Given) + model->BSIM4v2puc1 = 0.0; + if (!model->BSIM4v2pu0Given) + model->BSIM4v2pu0 = 0.0; + if (!model->BSIM4v2puteGiven) + model->BSIM4v2pute = 0.0; + if (!model->BSIM4v2pvoffGiven) + model->BSIM4v2pvoff = 0.0; + if (!model->BSIM4v2pminvGiven) + model->BSIM4v2pminv = 0.0; + if (!model->BSIM4v2pfproutGiven) + model->BSIM4v2pfprout = 0.0; + if (!model->BSIM4v2ppditsGiven) + model->BSIM4v2ppdits = 0.0; + if (!model->BSIM4v2ppditsdGiven) + model->BSIM4v2ppditsd = 0.0; + if (!model->BSIM4v2pdeltaGiven) + model->BSIM4v2pdelta = 0.0; + if (!model->BSIM4v2prdswGiven) + model->BSIM4v2prdsw = 0.0; + if (!model->BSIM4v2prdwGiven) + model->BSIM4v2prdw = 0.0; + if (!model->BSIM4v2prswGiven) + model->BSIM4v2prsw = 0.0; + if (!model->BSIM4v2pprwbGiven) + model->BSIM4v2pprwb = 0.0; + if (!model->BSIM4v2pprwgGiven) + model->BSIM4v2pprwg = 0.0; + if (!model->BSIM4v2pprtGiven) + model->BSIM4v2pprt = 0.0; + if (!model->BSIM4v2peta0Given) + model->BSIM4v2peta0 = 0.0; + if (!model->BSIM4v2petabGiven) + model->BSIM4v2petab = 0.0; + if (!model->BSIM4v2ppclmGiven) + model->BSIM4v2ppclm = 0.0; + if (!model->BSIM4v2ppdibl1Given) + model->BSIM4v2ppdibl1 = 0.0; + if (!model->BSIM4v2ppdibl2Given) + model->BSIM4v2ppdibl2 = 0.0; + if (!model->BSIM4v2ppdiblbGiven) + model->BSIM4v2ppdiblb = 0.0; + if (!model->BSIM4v2ppscbe1Given) + model->BSIM4v2ppscbe1 = 0.0; + if (!model->BSIM4v2ppscbe2Given) + model->BSIM4v2ppscbe2 = 0.0; + if (!model->BSIM4v2ppvagGiven) + model->BSIM4v2ppvag = 0.0; + if (!model->BSIM4v2pwrGiven) + model->BSIM4v2pwr = 0.0; + if (!model->BSIM4v2pdwgGiven) + model->BSIM4v2pdwg = 0.0; + if (!model->BSIM4v2pdwbGiven) + model->BSIM4v2pdwb = 0.0; + if (!model->BSIM4v2pb0Given) + model->BSIM4v2pb0 = 0.0; + if (!model->BSIM4v2pb1Given) + model->BSIM4v2pb1 = 0.0; + if (!model->BSIM4v2palpha0Given) + model->BSIM4v2palpha0 = 0.0; + if (!model->BSIM4v2palpha1Given) + model->BSIM4v2palpha1 = 0.0; + if (!model->BSIM4v2pbeta0Given) + model->BSIM4v2pbeta0 = 0.0; + if (!model->BSIM4v2pagidlGiven) + model->BSIM4v2pagidl = 0.0; + if (!model->BSIM4v2pbgidlGiven) + model->BSIM4v2pbgidl = 0.0; + if (!model->BSIM4v2pcgidlGiven) + model->BSIM4v2pcgidl = 0.0; + if (!model->BSIM4v2pegidlGiven) + model->BSIM4v2pegidl = 0.0; + if (!model->BSIM4v2paigcGiven) + model->BSIM4v2paigc = 0.0; + if (!model->BSIM4v2pbigcGiven) + model->BSIM4v2pbigc = 0.0; + if (!model->BSIM4v2pcigcGiven) + model->BSIM4v2pcigc = 0.0; + if (!model->BSIM4v2paigsdGiven) + model->BSIM4v2paigsd = 0.0; + if (!model->BSIM4v2pbigsdGiven) + model->BSIM4v2pbigsd = 0.0; + if (!model->BSIM4v2pcigsdGiven) + model->BSIM4v2pcigsd = 0.0; + if (!model->BSIM4v2paigbaccGiven) + model->BSIM4v2paigbacc = 0.0; + if (!model->BSIM4v2pbigbaccGiven) + model->BSIM4v2pbigbacc = 0.0; + if (!model->BSIM4v2pcigbaccGiven) + model->BSIM4v2pcigbacc = 0.0; + if (!model->BSIM4v2paigbinvGiven) + model->BSIM4v2paigbinv = 0.0; + if (!model->BSIM4v2pbigbinvGiven) + model->BSIM4v2pbigbinv = 0.0; + if (!model->BSIM4v2pcigbinvGiven) + model->BSIM4v2pcigbinv = 0.0; + if (!model->BSIM4v2pnigcGiven) + model->BSIM4v2pnigc = 0.0; + if (!model->BSIM4v2pnigbinvGiven) + model->BSIM4v2pnigbinv = 0.0; + if (!model->BSIM4v2pnigbaccGiven) + model->BSIM4v2pnigbacc = 0.0; + if (!model->BSIM4v2pntoxGiven) + model->BSIM4v2pntox = 0.0; + if (!model->BSIM4v2peigbinvGiven) + model->BSIM4v2peigbinv = 0.0; + if (!model->BSIM4v2ppigcdGiven) + model->BSIM4v2ppigcd = 0.0; + if (!model->BSIM4v2ppoxedgeGiven) + model->BSIM4v2ppoxedge = 0.0; + if (!model->BSIM4v2pxrcrg1Given) + model->BSIM4v2pxrcrg1 = 0.0; + if (!model->BSIM4v2pxrcrg2Given) + model->BSIM4v2pxrcrg2 = 0.0; + if (!model->BSIM4v2peuGiven) + model->BSIM4v2peu = 0.0; + if (!model->BSIM4v2pvfbGiven) + model->BSIM4v2pvfb = 0.0; + + if (!model->BSIM4v2pcgslGiven) + model->BSIM4v2pcgsl = 0.0; + if (!model->BSIM4v2pcgdlGiven) + model->BSIM4v2pcgdl = 0.0; + if (!model->BSIM4v2pckappasGiven) + model->BSIM4v2pckappas = 0.0; + if (!model->BSIM4v2pckappadGiven) + model->BSIM4v2pckappad = 0.0; + if (!model->BSIM4v2pcfGiven) + model->BSIM4v2pcf = 0.0; + if (!model->BSIM4v2pclcGiven) + model->BSIM4v2pclc = 0.0; + if (!model->BSIM4v2pcleGiven) + model->BSIM4v2pcle = 0.0; + if (!model->BSIM4v2pvfbcvGiven) + model->BSIM4v2pvfbcv = 0.0; + if (!model->BSIM4v2pacdeGiven) + model->BSIM4v2pacde = 0.0; + if (!model->BSIM4v2pmoinGiven) + model->BSIM4v2pmoin = 0.0; + if (!model->BSIM4v2pnoffGiven) + model->BSIM4v2pnoff = 0.0; + if (!model->BSIM4v2pvoffcvGiven) + model->BSIM4v2pvoffcv = 0.0; + + /* unit degree celcius */ + if (!model->BSIM4v2tnomGiven) + model->BSIM4v2tnom = ckt->CKTnomTemp; + if (!model->BSIM4v2LintGiven) + model->BSIM4v2Lint = 0.0; + if (!model->BSIM4v2LlGiven) + model->BSIM4v2Ll = 0.0; + if (!model->BSIM4v2LlcGiven) + model->BSIM4v2Llc = model->BSIM4v2Ll; + if (!model->BSIM4v2LlnGiven) + model->BSIM4v2Lln = 1.0; + if (!model->BSIM4v2LwGiven) + model->BSIM4v2Lw = 0.0; + if (!model->BSIM4v2LwcGiven) + model->BSIM4v2Lwc = model->BSIM4v2Lw; + if (!model->BSIM4v2LwnGiven) + model->BSIM4v2Lwn = 1.0; + if (!model->BSIM4v2LwlGiven) + model->BSIM4v2Lwl = 0.0; + if (!model->BSIM4v2LwlcGiven) + model->BSIM4v2Lwlc = model->BSIM4v2Lwl; + if (!model->BSIM4v2LminGiven) + model->BSIM4v2Lmin = 0.0; + if (!model->BSIM4v2LmaxGiven) + model->BSIM4v2Lmax = 1.0; + if (!model->BSIM4v2WintGiven) + model->BSIM4v2Wint = 0.0; + if (!model->BSIM4v2WlGiven) + model->BSIM4v2Wl = 0.0; + if (!model->BSIM4v2WlcGiven) + model->BSIM4v2Wlc = model->BSIM4v2Wl; + if (!model->BSIM4v2WlnGiven) + model->BSIM4v2Wln = 1.0; + if (!model->BSIM4v2WwGiven) + model->BSIM4v2Ww = 0.0; + if (!model->BSIM4v2WwcGiven) + model->BSIM4v2Wwc = model->BSIM4v2Ww; + if (!model->BSIM4v2WwnGiven) + model->BSIM4v2Wwn = 1.0; + if (!model->BSIM4v2WwlGiven) + model->BSIM4v2Wwl = 0.0; + if (!model->BSIM4v2WwlcGiven) + model->BSIM4v2Wwlc = model->BSIM4v2Wwl; + if (!model->BSIM4v2WminGiven) + model->BSIM4v2Wmin = 0.0; + if (!model->BSIM4v2WmaxGiven) + model->BSIM4v2Wmax = 1.0; + if (!model->BSIM4v2dwcGiven) + model->BSIM4v2dwc = model->BSIM4v2Wint; + if (!model->BSIM4v2dlcGiven) + model->BSIM4v2dlc = model->BSIM4v2Lint; + if (!model->BSIM4v2xlGiven) + model->BSIM4v2xl = 0.0; + if (!model->BSIM4v2xwGiven) + model->BSIM4v2xw = 0.0; + if (!model->BSIM4v2dlcigGiven) + model->BSIM4v2dlcig = model->BSIM4v2Lint; + if (!model->BSIM4v2dwjGiven) + model->BSIM4v2dwj = model->BSIM4v2dwc; + if (!model->BSIM4v2cfGiven) + model->BSIM4v2cf = 2.0 * model->BSIM4v2epsrox * EPS0 / PI + * log(1.0 + 0.4e-6 / model->BSIM4v2toxe); + + if (!model->BSIM4v2xpartGiven) + model->BSIM4v2xpart = 0.0; + if (!model->BSIM4v2sheetResistanceGiven) + model->BSIM4v2sheetResistance = 0.0; + + if (!model->BSIM4v2SunitAreaJctCapGiven) + model->BSIM4v2SunitAreaJctCap = 5.0E-4; + if (!model->BSIM4v2DunitAreaJctCapGiven) + model->BSIM4v2DunitAreaJctCap = model->BSIM4v2SunitAreaJctCap; + if (!model->BSIM4v2SunitLengthSidewallJctCapGiven) + model->BSIM4v2SunitLengthSidewallJctCap = 5.0E-10; + if (!model->BSIM4v2DunitLengthSidewallJctCapGiven) + model->BSIM4v2DunitLengthSidewallJctCap = model->BSIM4v2SunitLengthSidewallJctCap; + if (!model->BSIM4v2SunitLengthGateSidewallJctCapGiven) + model->BSIM4v2SunitLengthGateSidewallJctCap = model->BSIM4v2SunitLengthSidewallJctCap ; + if (!model->BSIM4v2DunitLengthGateSidewallJctCapGiven) + model->BSIM4v2DunitLengthGateSidewallJctCap = model->BSIM4v2SunitLengthGateSidewallJctCap; + if (!model->BSIM4v2SjctSatCurDensityGiven) + model->BSIM4v2SjctSatCurDensity = 1.0E-4; + if (!model->BSIM4v2DjctSatCurDensityGiven) + model->BSIM4v2DjctSatCurDensity = model->BSIM4v2SjctSatCurDensity; + if (!model->BSIM4v2SjctSidewallSatCurDensityGiven) + model->BSIM4v2SjctSidewallSatCurDensity = 0.0; + if (!model->BSIM4v2DjctSidewallSatCurDensityGiven) + model->BSIM4v2DjctSidewallSatCurDensity = model->BSIM4v2SjctSidewallSatCurDensity; + if (!model->BSIM4v2SjctGateSidewallSatCurDensityGiven) + model->BSIM4v2SjctGateSidewallSatCurDensity = 0.0; + if (!model->BSIM4v2DjctGateSidewallSatCurDensityGiven) + model->BSIM4v2DjctGateSidewallSatCurDensity = model->BSIM4v2SjctGateSidewallSatCurDensity; + if (!model->BSIM4v2SbulkJctPotentialGiven) + model->BSIM4v2SbulkJctPotential = 1.0; + if (!model->BSIM4v2DbulkJctPotentialGiven) + model->BSIM4v2DbulkJctPotential = model->BSIM4v2SbulkJctPotential; + if (!model->BSIM4v2SsidewallJctPotentialGiven) + model->BSIM4v2SsidewallJctPotential = 1.0; + if (!model->BSIM4v2DsidewallJctPotentialGiven) + model->BSIM4v2DsidewallJctPotential = model->BSIM4v2SsidewallJctPotential; + if (!model->BSIM4v2SGatesidewallJctPotentialGiven) + model->BSIM4v2SGatesidewallJctPotential = model->BSIM4v2SsidewallJctPotential; + if (!model->BSIM4v2DGatesidewallJctPotentialGiven) + model->BSIM4v2DGatesidewallJctPotential = model->BSIM4v2SGatesidewallJctPotential; + if (!model->BSIM4v2SbulkJctBotGradingCoeffGiven) + model->BSIM4v2SbulkJctBotGradingCoeff = 0.5; + if (!model->BSIM4v2DbulkJctBotGradingCoeffGiven) + model->BSIM4v2DbulkJctBotGradingCoeff = model->BSIM4v2SbulkJctBotGradingCoeff; + if (!model->BSIM4v2SbulkJctSideGradingCoeffGiven) + model->BSIM4v2SbulkJctSideGradingCoeff = 0.33; + if (!model->BSIM4v2DbulkJctSideGradingCoeffGiven) + model->BSIM4v2DbulkJctSideGradingCoeff = model->BSIM4v2SbulkJctSideGradingCoeff; + if (!model->BSIM4v2SbulkJctGateSideGradingCoeffGiven) + model->BSIM4v2SbulkJctGateSideGradingCoeff = model->BSIM4v2SbulkJctSideGradingCoeff; + if (!model->BSIM4v2DbulkJctGateSideGradingCoeffGiven) + model->BSIM4v2DbulkJctGateSideGradingCoeff = model->BSIM4v2SbulkJctGateSideGradingCoeff; + if (!model->BSIM4v2SjctEmissionCoeffGiven) + model->BSIM4v2SjctEmissionCoeff = 1.0; + if (!model->BSIM4v2DjctEmissionCoeffGiven) + model->BSIM4v2DjctEmissionCoeff = model->BSIM4v2SjctEmissionCoeff; + if (!model->BSIM4v2SjctTempExponentGiven) + model->BSIM4v2SjctTempExponent = 3.0; + if (!model->BSIM4v2DjctTempExponentGiven) + model->BSIM4v2DjctTempExponent = model->BSIM4v2SjctTempExponent; + + if (!model->BSIM4v2oxideTrapDensityAGiven) + { if (model->BSIM4v2type == NMOS) + model->BSIM4v2oxideTrapDensityA = 6.25e41; + else + model->BSIM4v2oxideTrapDensityA= 6.188e40; + } + if (!model->BSIM4v2oxideTrapDensityBGiven) + { if (model->BSIM4v2type == NMOS) + model->BSIM4v2oxideTrapDensityB = 3.125e26; + else + model->BSIM4v2oxideTrapDensityB = 1.5e25; + } + if (!model->BSIM4v2oxideTrapDensityCGiven) + model->BSIM4v2oxideTrapDensityC = 8.75e9; + if (!model->BSIM4v2emGiven) + model->BSIM4v2em = 4.1e7; /* V/m */ + if (!model->BSIM4v2efGiven) + model->BSIM4v2ef = 1.0; + if (!model->BSIM4v2afGiven) + model->BSIM4v2af = 1.0; + if (!model->BSIM4v2kfGiven) + model->BSIM4v2kf = 0.0; + DMCGeff = model->BSIM4v2dmcg - model->BSIM4v2dmcgt; + DMCIeff = model->BSIM4v2dmci; + DMDGeff = model->BSIM4v2dmdg - model->BSIM4v2dmcgt; + + /* + * End processing models and begin to loop + * through all the instances of the model + */ + + for (here = model->BSIM4v2instances; here != NULL ; + here=here->BSIM4v2nextInstance) + { + if (here->BSIM4v2owner == ARCHme) { + /* allocate a chunk of the state vector */ + here->BSIM4v2states = *states; + *states += BSIM4v2numStates; + } + /* perform the parameter defaulting */ + if (!here->BSIM4v2lGiven) + here->BSIM4v2l = 5.0e-6; + if (!here->BSIM4v2wGiven) + here->BSIM4v2w = 5.0e-6; + if (!here->BSIM4v2nfGiven) + here->BSIM4v2nf = 1.0; + if (!here->BSIM4v2minGiven) + here->BSIM4v2min = 0; /* integer */ + if (!here->BSIM4v2icVDSGiven) + here->BSIM4v2icVDS = 0.0; + if (!here->BSIM4v2icVGSGiven) + here->BSIM4v2icVGS = 0.0; + if (!here->BSIM4v2icVBSGiven) + here->BSIM4v2icVBS = 0.0; + if (!here->BSIM4v2drainAreaGiven) + here->BSIM4v2drainArea = 0.0; + if (!here->BSIM4v2drainPerimeterGiven) + here->BSIM4v2drainPerimeter = 0.0; + if (!here->BSIM4v2drainSquaresGiven) + here->BSIM4v2drainSquares = 1.0; + if (!here->BSIM4v2sourceAreaGiven) + here->BSIM4v2sourceArea = 0.0; + if (!here->BSIM4v2sourcePerimeterGiven) + here->BSIM4v2sourcePerimeter = 0.0; + if (!here->BSIM4v2sourceSquaresGiven) + here->BSIM4v2sourceSquares = 1.0; + + if (!here->BSIM4v2rbdbGiven) + here->BSIM4v2rbdb = model->BSIM4v2rbdb; /* in ohm */ + if (!here->BSIM4v2rbsbGiven) + here->BSIM4v2rbsb = model->BSIM4v2rbsb; + if (!here->BSIM4v2rbpbGiven) + here->BSIM4v2rbpb = model->BSIM4v2rbpb; + if (!here->BSIM4v2rbpsGiven) + here->BSIM4v2rbps = model->BSIM4v2rbps; + if (!here->BSIM4v2rbpdGiven) + here->BSIM4v2rbpd = model->BSIM4v2rbpd; + + + /* Process instance model selectors, some + * may override their global counterparts + */ + if (!here->BSIM4v2rbodyModGiven) + here->BSIM4v2rbodyMod = model->BSIM4v2rbodyMod; + else if ((here->BSIM4v2rbodyMod != 0) && (here->BSIM4v2rbodyMod != 1)) + { here->BSIM4v2rbodyMod = model->BSIM4v2rbodyMod; + printf("Warning: rbodyMod has been set to its global value %d.\n", + model->BSIM4v2rbodyMod); + } + + if (!here->BSIM4v2rgateModGiven) + here->BSIM4v2rgateMod = model->BSIM4v2rgateMod; + else if ((here->BSIM4v2rgateMod != 0) && (here->BSIM4v2rgateMod != 1) + && (here->BSIM4v2rgateMod != 2) && (here->BSIM4v2rgateMod != 3)) + { here->BSIM4v2rgateMod = model->BSIM4v2rgateMod; + printf("Warning: rgateMod has been set to its global value %d.\n", + model->BSIM4v2rgateMod); + } + + if (!here->BSIM4v2geoModGiven) + here->BSIM4v2geoMod = model->BSIM4v2geoMod; + if (!here->BSIM4v2rgeoModGiven) + here->BSIM4v2rgeoMod = 0.0; + if (!here->BSIM4v2trnqsModGiven) + here->BSIM4v2trnqsMod = model->BSIM4v2trnqsMod; + else if ((here->BSIM4v2trnqsMod != 0) && (here->BSIM4v2trnqsMod != 1)) + { here->BSIM4v2trnqsMod = model->BSIM4v2trnqsMod; + printf("Warning: trnqsMod has been set to its global value %d.\n", + model->BSIM4v2trnqsMod); + } + + if (!here->BSIM4v2acnqsModGiven) + here->BSIM4v2acnqsMod = model->BSIM4v2acnqsMod; + else if ((here->BSIM4v2acnqsMod != 0) && (here->BSIM4v2acnqsMod != 1)) + { here->BSIM4v2acnqsMod = model->BSIM4v2acnqsMod; + printf("Warning: acnqsMod has been set to its global value %d.\n", + model->BSIM4v2acnqsMod); + } + + /* process drain series resistance */ + createNode = 0; + if ( (model->BSIM4v2rdsMod != 0) + || (model->BSIM4v2tnoiMod != 0 && noiseAnalGiven)) + { + createNode = 1; + } else if (model->BSIM4v2sheetResistance > 0) + { + if (here->BSIM4v2drainSquaresGiven + && here->BSIM4v2drainSquares > 0) + { + createNode = 1; + } else if (!here->BSIM4v2drainSquaresGiven + && (here->BSIM4v2rgeoMod != 0)) + { + BSIM4v2RdseffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, + here->BSIM4v2rgeoMod, here->BSIM4v2min, + here->BSIM4v2w, model->BSIM4v2sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 0, &Rtot); + if(Rtot > 0) + createNode = 1; + } + } + if ( createNode != 0 && (here->BSIM4v2dNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"drain"); + if(error) return(error); + here->BSIM4v2dNodePrime = tmp->number; + } + else + { here->BSIM4v2dNodePrime = here->BSIM4v2dNode; + } + + /* process source series resistance */ + createNode = 0; + if ( (model->BSIM4v2rdsMod != 0) + || (model->BSIM4v2tnoiMod != 0 && noiseAnalGiven)) + { + createNode = 1; + } else if (model->BSIM4v2sheetResistance > 0) + { + if (here->BSIM4v2sourceSquaresGiven + && here->BSIM4v2sourceSquares > 0) + { + createNode = 1; + } else if (!here->BSIM4v2sourceSquaresGiven + && (here->BSIM4v2rgeoMod != 0)) + { + BSIM4v2RdseffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, + here->BSIM4v2rgeoMod, here->BSIM4v2min, + here->BSIM4v2w, model->BSIM4v2sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 1, &Rtot); + if(Rtot > 0) + createNode = 1; + } + } + if ( createNode != 0 && here->BSIM4v2sNodePrime == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"source"); + if(error) return(error); + here->BSIM4v2sNodePrime = tmp->number; + } + else + here->BSIM4v2sNodePrime = here->BSIM4v2sNode; + + if ((here->BSIM4v2rgateMod > 0) && (here->BSIM4v2gNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"gate"); + if(error) return(error); + here->BSIM4v2gNodePrime = tmp->number; + if (here->BSIM4v2rgateMod == 1) + { if (model->BSIM4v2rshg <= 0.0) + printf("Warning: rshg should be positive for rgateMod = 1.\n"); + } + else if (here->BSIM4v2rgateMod == 2) + { if (model->BSIM4v2rshg <= 0.0) + printf("Warning: rshg <= 0.0 for rgateMod = 2!!!\n"); + else if (model->BSIM4v2xrcrg1 <= 0.0) + printf("Warning: xrcrg1 <= 0.0 for rgateMod = 2!!!\n"); + } + } + else + here->BSIM4v2gNodePrime = here->BSIM4v2gNodeExt; + + if ((here->BSIM4v2rgateMod == 3) && (here->BSIM4v2gNodeMid == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"midgate"); + if(error) return(error); + here->BSIM4v2gNodeMid = tmp->number; + if (model->BSIM4v2rshg <= 0.0) + printf("Warning: rshg should be positive for rgateMod = 3.\n"); + else if (model->BSIM4v2xrcrg1 <= 0.0) + printf("Warning: xrcrg1 should be positive for rgateMod = 3.\n"); + } + else + here->BSIM4v2gNodeMid = here->BSIM4v2gNodeExt; + + + /* internal body nodes for body resistance model */ + if (here->BSIM4v2rbodyMod) + { if (here->BSIM4v2dbNode == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"dbody"); + if(error) return(error); + here->BSIM4v2dbNode = tmp->number; + } + if (here->BSIM4v2bNodePrime == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"body"); + if(error) return(error); + here->BSIM4v2bNodePrime = tmp->number; + } + if (here->BSIM4v2sbNode == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"sbody"); + if(error) return(error); + here->BSIM4v2sbNode = tmp->number; + } + } + else + here->BSIM4v2dbNode = here->BSIM4v2bNodePrime = here->BSIM4v2sbNode + = here->BSIM4v2bNode; + + /* NQS node */ + if ((here->BSIM4v2trnqsMod) && (here->BSIM4v2qNode == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v2name,"charge"); + if(error) return(error); + here->BSIM4v2qNode = tmp->number; + } + else + here->BSIM4v2qNode = 0; + +/* set Sparse Matrix Pointers + * macro to make elements with built-in out-of-memory test */ +#define TSTALLOC(ptr,first,second) \ +if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\ + return(E_NOMEM);\ +} + + TSTALLOC(BSIM4v2DPbpPtr, BSIM4v2dNodePrime, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2GPbpPtr, BSIM4v2gNodePrime, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2SPbpPtr, BSIM4v2sNodePrime, BSIM4v2bNodePrime) + + TSTALLOC(BSIM4v2BPdpPtr, BSIM4v2bNodePrime, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2BPgpPtr, BSIM4v2bNodePrime, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2BPspPtr, BSIM4v2bNodePrime, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2BPbpPtr, BSIM4v2bNodePrime, BSIM4v2bNodePrime) + + TSTALLOC(BSIM4v2DdPtr, BSIM4v2dNode, BSIM4v2dNode) + TSTALLOC(BSIM4v2GPgpPtr, BSIM4v2gNodePrime, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2SsPtr, BSIM4v2sNode, BSIM4v2sNode) + TSTALLOC(BSIM4v2DPdpPtr, BSIM4v2dNodePrime, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2SPspPtr, BSIM4v2sNodePrime, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2DdpPtr, BSIM4v2dNode, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2GPdpPtr, BSIM4v2gNodePrime, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2GPspPtr, BSIM4v2gNodePrime, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2SspPtr, BSIM4v2sNode, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2DPspPtr, BSIM4v2dNodePrime, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2DPdPtr, BSIM4v2dNodePrime, BSIM4v2dNode) + TSTALLOC(BSIM4v2DPgpPtr, BSIM4v2dNodePrime, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2SPgpPtr, BSIM4v2sNodePrime, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2SPsPtr, BSIM4v2sNodePrime, BSIM4v2sNode) + TSTALLOC(BSIM4v2SPdpPtr, BSIM4v2sNodePrime, BSIM4v2dNodePrime) + + TSTALLOC(BSIM4v2QqPtr, BSIM4v2qNode, BSIM4v2qNode) + TSTALLOC(BSIM4v2QbpPtr, BSIM4v2qNode, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2QdpPtr, BSIM4v2qNode, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2QspPtr, BSIM4v2qNode, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2QgpPtr, BSIM4v2qNode, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2DPqPtr, BSIM4v2dNodePrime, BSIM4v2qNode) + TSTALLOC(BSIM4v2SPqPtr, BSIM4v2sNodePrime, BSIM4v2qNode) + TSTALLOC(BSIM4v2GPqPtr, BSIM4v2gNodePrime, BSIM4v2qNode) + + if (here->BSIM4v2rgateMod != 0) + { TSTALLOC(BSIM4v2GEgePtr, BSIM4v2gNodeExt, BSIM4v2gNodeExt) + TSTALLOC(BSIM4v2GEgpPtr, BSIM4v2gNodeExt, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2GPgePtr, BSIM4v2gNodePrime, BSIM4v2gNodeExt) + TSTALLOC(BSIM4v2GEdpPtr, BSIM4v2gNodeExt, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2GEspPtr, BSIM4v2gNodeExt, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2GEbpPtr, BSIM4v2gNodeExt, BSIM4v2bNodePrime) + + TSTALLOC(BSIM4v2GMdpPtr, BSIM4v2gNodeMid, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2GMgpPtr, BSIM4v2gNodeMid, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2GMgmPtr, BSIM4v2gNodeMid, BSIM4v2gNodeMid) + TSTALLOC(BSIM4v2GMgePtr, BSIM4v2gNodeMid, BSIM4v2gNodeExt) + TSTALLOC(BSIM4v2GMspPtr, BSIM4v2gNodeMid, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2GMbpPtr, BSIM4v2gNodeMid, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2DPgmPtr, BSIM4v2dNodePrime, BSIM4v2gNodeMid) + TSTALLOC(BSIM4v2GPgmPtr, BSIM4v2gNodePrime, BSIM4v2gNodeMid) + TSTALLOC(BSIM4v2GEgmPtr, BSIM4v2gNodeExt, BSIM4v2gNodeMid) + TSTALLOC(BSIM4v2SPgmPtr, BSIM4v2sNodePrime, BSIM4v2gNodeMid) + TSTALLOC(BSIM4v2BPgmPtr, BSIM4v2bNodePrime, BSIM4v2gNodeMid) + } + + if (here->BSIM4v2rbodyMod) + { TSTALLOC(BSIM4v2DPdbPtr, BSIM4v2dNodePrime, BSIM4v2dbNode) + TSTALLOC(BSIM4v2SPsbPtr, BSIM4v2sNodePrime, BSIM4v2sbNode) + + TSTALLOC(BSIM4v2DBdpPtr, BSIM4v2dbNode, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2DBdbPtr, BSIM4v2dbNode, BSIM4v2dbNode) + TSTALLOC(BSIM4v2DBbpPtr, BSIM4v2dbNode, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2DBbPtr, BSIM4v2dbNode, BSIM4v2bNode) + + TSTALLOC(BSIM4v2BPdbPtr, BSIM4v2bNodePrime, BSIM4v2dbNode) + TSTALLOC(BSIM4v2BPbPtr, BSIM4v2bNodePrime, BSIM4v2bNode) + TSTALLOC(BSIM4v2BPsbPtr, BSIM4v2bNodePrime, BSIM4v2sbNode) + + TSTALLOC(BSIM4v2SBspPtr, BSIM4v2sbNode, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2SBbpPtr, BSIM4v2sbNode, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2SBbPtr, BSIM4v2sbNode, BSIM4v2bNode) + TSTALLOC(BSIM4v2SBsbPtr, BSIM4v2sbNode, BSIM4v2sbNode) + + TSTALLOC(BSIM4v2BdbPtr, BSIM4v2bNode, BSIM4v2dbNode) + TSTALLOC(BSIM4v2BbpPtr, BSIM4v2bNode, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2BsbPtr, BSIM4v2bNode, BSIM4v2sbNode) + TSTALLOC(BSIM4v2BbPtr, BSIM4v2bNode, BSIM4v2bNode) + } + + if (model->BSIM4v2rdsMod) + { TSTALLOC(BSIM4v2DgpPtr, BSIM4v2dNode, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2DspPtr, BSIM4v2dNode, BSIM4v2sNodePrime) + TSTALLOC(BSIM4v2DbpPtr, BSIM4v2dNode, BSIM4v2bNodePrime) + TSTALLOC(BSIM4v2SdpPtr, BSIM4v2sNode, BSIM4v2dNodePrime) + TSTALLOC(BSIM4v2SgpPtr, BSIM4v2sNode, BSIM4v2gNodePrime) + TSTALLOC(BSIM4v2SbpPtr, BSIM4v2sNode, BSIM4v2bNodePrime) + } + } + } + return(OK); +} + +int +BSIM4v2unsetup(inModel,ckt) + GENmodel *inModel; + CKTcircuit *ckt; +{ + + BSIM4v2model *model; + BSIM4v2instance *here; + + for (model = (BSIM4v2model *)inModel; model != NULL; + model = model->BSIM4v2nextModel) + { + for (here = model->BSIM4v2instances; here != NULL; + here=here->BSIM4v2nextInstance) + { + if (here->BSIM4v2dNodePrime + && here->BSIM4v2dNodePrime != here->BSIM4v2dNode) + { + CKTdltNNum(ckt, here->BSIM4v2dNodePrime); + here->BSIM4v2dNodePrime = 0; + } + if (here->BSIM4v2sNodePrime + && here->BSIM4v2sNodePrime != here->BSIM4v2sNode) + { + CKTdltNNum(ckt, here->BSIM4v2sNodePrime); + here->BSIM4v2sNodePrime = 0; + } + } + } + return OK; +} diff --git a/src/spicelib/devices/bsim4v2/b4v2temp.c b/src/spicelib/devices/bsim4v2/b4v2temp.c new file mode 100644 index 000000000..8bf06d5a5 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2temp.c @@ -0,0 +1,1497 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4temp.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "const.h" +#include "sperror.h" + +#define Kb 1.3806226e-23 +#define KboQ 8.617087e-5 +#define EPS0 8.85418e-12 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define Charge_q 1.60219e-19 + +int +BSIM4v2DioIjthVjmEval(Nvtm, Ijth, Isb, XExpBV, Vjm) +double Nvtm, Ijth, Isb, XExpBV; +double *Vjm; +{ +double Tb, Tc, EVjmovNv; + + Tc = XExpBV; + Tb = 1.0 + Ijth / Isb - Tc; + EVjmovNv = 0.5 * (Tb + sqrt(Tb * Tb + 4.0 * Tc)); + *Vjm = Nvtm * log(EVjmovNv); + +return 0; +} + + +int +BSIM4v2temp(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v2model *model = (BSIM4v2model*) inModel; +BSIM4v2instance *here; +struct bsim4SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam; +double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni; +double T0, T1, T2, T3, T4, T5, T8, T9, Lnew, Wnew; +double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Dw, Dl, Vtm0, Tnom; +double dumPs, dumPd, dumAs, dumAd, PowWeffWr; +double DMCGeff, DMCIeff, DMDGeff; +double Nvtms, Nvtmd, SourceSatCurrent, DrainSatCurrent; +int Size_Not_Found; + + /* loop through all the BSIM4v2 device models */ + for (; model != NULL; model = model->BSIM4v2nextModel) + { Temp = ckt->CKTtemp; + if (model->BSIM4v2SbulkJctPotential < 0.1) + { model->BSIM4v2SbulkJctPotential = 0.1; + fprintf(stderr, "Given pbs is less than 0.1. Pbs is set to 0.1.\n"); + } + if (model->BSIM4v2SsidewallJctPotential < 0.1) + { model->BSIM4v2SsidewallJctPotential = 0.1; + fprintf(stderr, "Given pbsws is less than 0.1. Pbsws is set to 0.1.\n"); + } + if (model->BSIM4v2SGatesidewallJctPotential < 0.1) + { model->BSIM4v2SGatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswgs is less than 0.1. Pbswgs is set to 0.1.\n"); + } + + if (model->BSIM4v2DbulkJctPotential < 0.1) + { model->BSIM4v2DbulkJctPotential = 0.1; + fprintf(stderr, "Given pbd is less than 0.1. Pbd is set to 0.1.\n"); + } + if (model->BSIM4v2DsidewallJctPotential < 0.1) + { model->BSIM4v2DsidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswd is less than 0.1. Pbswd is set to 0.1.\n"); + } + if (model->BSIM4v2DGatesidewallJctPotential < 0.1) + { model->BSIM4v2DGatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswgd is less than 0.1. Pbswgd is set to 0.1.\n"); + } + + if ((model->BSIM4v2toxeGiven) && (model->BSIM4v2toxpGiven) && (model->BSIM4v2dtoxGiven) + && (model->BSIM4v2toxe != (model->BSIM4v2toxp + model->BSIM4v2dtox))) + printf("Warning: toxe, toxp and dtox all given and toxe != toxp + dtox; dtox ignored.\n"); + else if ((model->BSIM4v2toxeGiven) && (!model->BSIM4v2toxpGiven)) + model->BSIM4v2toxp = model->BSIM4v2toxe - model->BSIM4v2dtox; + else if ((!model->BSIM4v2toxeGiven) && (model->BSIM4v2toxpGiven)) + model->BSIM4v2toxe = model->BSIM4v2toxp + model->BSIM4v2dtox; + + model->BSIM4v2coxe = model->BSIM4v2epsrox * EPS0 / model->BSIM4v2toxe; + model->BSIM4v2coxp = model->BSIM4v2epsrox * EPS0 / model->BSIM4v2toxp; + + if (!model->BSIM4v2cgdoGiven) + { if (model->BSIM4v2dlcGiven && (model->BSIM4v2dlc > 0.0)) + model->BSIM4v2cgdo = model->BSIM4v2dlc * model->BSIM4v2coxe + - model->BSIM4v2cgdl ; + else + model->BSIM4v2cgdo = 0.6 * model->BSIM4v2xj * model->BSIM4v2coxe; + } + if (!model->BSIM4v2cgsoGiven) + { if (model->BSIM4v2dlcGiven && (model->BSIM4v2dlc > 0.0)) + model->BSIM4v2cgso = model->BSIM4v2dlc * model->BSIM4v2coxe + - model->BSIM4v2cgsl ; + else + model->BSIM4v2cgso = 0.6 * model->BSIM4v2xj * model->BSIM4v2coxe; + } + if (!model->BSIM4v2cgboGiven) + model->BSIM4v2cgbo = 2.0 * model->BSIM4v2dwc * model->BSIM4v2coxe; + + model->pSizeDependParamKnot = NULL; + pLastKnot = NULL; + + Tnom = model->BSIM4v2tnom; + TRatio = Temp / Tnom; + + model->BSIM4v2vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); + model->BSIM4v2factor1 = sqrt(EPSSI / (model->BSIM4v2epsrox * EPS0) + * model->BSIM4v2toxe); + + Vtm0 = KboQ * Tnom; + Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0); + ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) + * exp(21.5565981 - Eg0 / (2.0 * Vtm0)); + + model->BSIM4v2vtm = KboQ * Temp; + Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); + if (Temp != Tnom) + { T0 = Eg0 / Vtm0 - Eg / model->BSIM4v2vtm; + T1 = log(Temp / Tnom); + T2 = T0 + model->BSIM4v2SjctTempExponent * T1; + T3 = exp(T2 / model->BSIM4v2SjctEmissionCoeff); + model->BSIM4v2SjctTempSatCurDensity = model->BSIM4v2SjctSatCurDensity + * T3; + model->BSIM4v2SjctSidewallTempSatCurDensity + = model->BSIM4v2SjctSidewallSatCurDensity * T3; + model->BSIM4v2SjctGateSidewallTempSatCurDensity + = model->BSIM4v2SjctGateSidewallSatCurDensity * T3; + + T2 = T0 + model->BSIM4v2DjctTempExponent * T1; + T3 = exp(T2 / model->BSIM4v2DjctEmissionCoeff); + model->BSIM4v2DjctTempSatCurDensity = model->BSIM4v2DjctSatCurDensity + * T3; + model->BSIM4v2DjctSidewallTempSatCurDensity + = model->BSIM4v2DjctSidewallSatCurDensity * T3; + model->BSIM4v2DjctGateSidewallTempSatCurDensity + = model->BSIM4v2DjctGateSidewallSatCurDensity * T3; + } + else + { model->BSIM4v2SjctTempSatCurDensity = model->BSIM4v2SjctSatCurDensity; + model->BSIM4v2SjctSidewallTempSatCurDensity + = model->BSIM4v2SjctSidewallSatCurDensity; + model->BSIM4v2SjctGateSidewallTempSatCurDensity + = model->BSIM4v2SjctGateSidewallSatCurDensity; + model->BSIM4v2DjctTempSatCurDensity = model->BSIM4v2DjctSatCurDensity; + model->BSIM4v2DjctSidewallTempSatCurDensity + = model->BSIM4v2DjctSidewallSatCurDensity; + model->BSIM4v2DjctGateSidewallTempSatCurDensity + = model->BSIM4v2DjctGateSidewallSatCurDensity; + } + + if (model->BSIM4v2SjctTempSatCurDensity < 0.0) + model->BSIM4v2SjctTempSatCurDensity = 0.0; + if (model->BSIM4v2SjctSidewallTempSatCurDensity < 0.0) + model->BSIM4v2SjctSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v2SjctGateSidewallTempSatCurDensity < 0.0) + model->BSIM4v2SjctGateSidewallTempSatCurDensity = 0.0; + + if (model->BSIM4v2DjctTempSatCurDensity < 0.0) + model->BSIM4v2DjctTempSatCurDensity = 0.0; + if (model->BSIM4v2DjctSidewallTempSatCurDensity < 0.0) + model->BSIM4v2DjctSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v2DjctGateSidewallTempSatCurDensity < 0.0) + model->BSIM4v2DjctGateSidewallTempSatCurDensity = 0.0; + + /* Temperature dependence of D/B and S/B diode capacitance begins */ + delTemp = ckt->CKTtemp - model->BSIM4v2tnom; + T0 = model->BSIM4v2tcj * delTemp; + if (T0 >= -1.0) + { model->BSIM4v2SunitAreaTempJctCap = model->BSIM4v2SunitAreaJctCap *(1.0 + T0); /*bug_fix -JX */ + model->BSIM4v2DunitAreaTempJctCap = model->BSIM4v2DunitAreaJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v2SunitAreaJctCap > 0.0) + { model->BSIM4v2SunitAreaTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjs to be negative. Cjs is clamped to zero.\n"); + } + if (model->BSIM4v2DunitAreaJctCap > 0.0) + { model->BSIM4v2DunitAreaTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjd to be negative. Cjd is clamped to zero.\n"); + } + } + T0 = model->BSIM4v2tcjsw * delTemp; + if (T0 >= -1.0) + { model->BSIM4v2SunitLengthSidewallTempJctCap = model->BSIM4v2SunitLengthSidewallJctCap *(1.0 + T0); + model->BSIM4v2DunitLengthSidewallTempJctCap = model->BSIM4v2DunitLengthSidewallJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v2SunitLengthSidewallJctCap > 0.0) + { model->BSIM4v2SunitLengthSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjsws to be negative. Cjsws is clamped to zero.\n"); + } + if (model->BSIM4v2DunitLengthSidewallJctCap > 0.0) + { model->BSIM4v2DunitLengthSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswd to be negative. Cjswd is clamped to zero.\n"); + } + } + T0 = model->BSIM4v2tcjswg * delTemp; + if (T0 >= -1.0) + { model->BSIM4v2SunitLengthGateSidewallTempJctCap = model->BSIM4v2SunitLengthGateSidewallJctCap *(1.0 + T0); + model->BSIM4v2DunitLengthGateSidewallTempJctCap = model->BSIM4v2DunitLengthGateSidewallJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v2SunitLengthGateSidewallJctCap > 0.0) + { model->BSIM4v2SunitLengthGateSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswgs to be negative. Cjswgs is clamped to zero.\n"); + } + if (model->BSIM4v2DunitLengthGateSidewallJctCap > 0.0) + { model->BSIM4v2DunitLengthGateSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswgd to be negative. Cjswgd is clamped to zero.\n"); + } + } + + model->BSIM4v2PhiBS = model->BSIM4v2SbulkJctPotential + - model->BSIM4v2tpb * delTemp; + if (model->BSIM4v2PhiBS < 0.01) + { model->BSIM4v2PhiBS = 0.01; + fprintf(stderr, "Temperature effect has caused pbs to be less than 0.01. Pbs is clamped to 0.01.\n"); + } + model->BSIM4v2PhiBD = model->BSIM4v2DbulkJctPotential + - model->BSIM4v2tpb * delTemp; + if (model->BSIM4v2PhiBD < 0.01) + { model->BSIM4v2PhiBD = 0.01; + fprintf(stderr, "Temperature effect has caused pbd to be less than 0.01. Pbd is clamped to 0.01.\n"); + } + + model->BSIM4v2PhiBSWS = model->BSIM4v2SsidewallJctPotential + - model->BSIM4v2tpbsw * delTemp; + if (model->BSIM4v2PhiBSWS <= 0.01) + { model->BSIM4v2PhiBSWS = 0.01; + fprintf(stderr, "Temperature effect has caused pbsws to be less than 0.01. Pbsws is clamped to 0.01.\n"); + } + model->BSIM4v2PhiBSWD = model->BSIM4v2DsidewallJctPotential + - model->BSIM4v2tpbsw * delTemp; + if (model->BSIM4v2PhiBSWD <= 0.01) + { model->BSIM4v2PhiBSWD = 0.01; + fprintf(stderr, "Temperature effect has caused pbswd to be less than 0.01. Pbswd is clamped to 0.01.\n"); + } + + model->BSIM4v2PhiBSWGS = model->BSIM4v2SGatesidewallJctPotential + - model->BSIM4v2tpbswg * delTemp; + if (model->BSIM4v2PhiBSWGS <= 0.01) + { model->BSIM4v2PhiBSWGS = 0.01; + fprintf(stderr, "Temperature effect has caused pbswgs to be less than 0.01. Pbswgs is clamped to 0.01.\n"); + } + model->BSIM4v2PhiBSWGD = model->BSIM4v2DGatesidewallJctPotential + - model->BSIM4v2tpbswg * delTemp; + if (model->BSIM4v2PhiBSWGD <= 0.01) + { model->BSIM4v2PhiBSWGD = 0.01; + fprintf(stderr, "Temperature effect has caused pbswgd to be less than 0.01. Pbswgd is clamped to 0.01.\n"); + } /* End of junction capacitance */ + + + if (model->BSIM4v2ijthdfwd <= 0.0) + { model->BSIM4v2ijthdfwd = 0.1; + fprintf(stderr, "Ijthdfwd reset to %g.\n", model->BSIM4v2ijthdfwd); + } + if (model->BSIM4v2ijthsfwd <= 0.0) + { model->BSIM4v2ijthsfwd = 0.1; + fprintf(stderr, "Ijthsfwd reset to %g.\n", model->BSIM4v2ijthsfwd); + } + if (model->BSIM4v2ijthdrev <= 0.0) + { model->BSIM4v2ijthdrev = 0.1; + fprintf(stderr, "Ijthdrev reset to %g.\n", model->BSIM4v2ijthdrev); + } + if (model->BSIM4v2ijthsrev <= 0.0) + { model->BSIM4v2ijthsrev = 0.1; + fprintf(stderr, "Ijthsrev reset to %g.\n", model->BSIM4v2ijthsrev); + } + + if ((model->BSIM4v2xjbvd <= 0.0) && (model->BSIM4v2dioMod == 2)) + { model->BSIM4v2xjbvd = 1.0; + fprintf(stderr, "Xjbvd reset to %g.\n", model->BSIM4v2xjbvd); + } + else if ((model->BSIM4v2xjbvd < 0.0) && (model->BSIM4v2dioMod == 0)) + { model->BSIM4v2xjbvd = 1.0; + fprintf(stderr, "Xjbvd reset to %g.\n", model->BSIM4v2xjbvd); + } + + if (model->BSIM4v2bvd <= 0.0) + { model->BSIM4v2bvd = 10.0; + fprintf(stderr, "BVD reset to %g.\n", model->BSIM4v2bvd); + } + + if ((model->BSIM4v2xjbvs <= 0.0) && (model->BSIM4v2dioMod == 2)) + { model->BSIM4v2xjbvs = 1.0; + fprintf(stderr, "Xjbvs reset to %g.\n", model->BSIM4v2xjbvs); + } + else if ((model->BSIM4v2xjbvs < 0.0) && (model->BSIM4v2dioMod == 0)) + { model->BSIM4v2xjbvs = 1.0; + fprintf(stderr, "Xjbvs reset to %g.\n", model->BSIM4v2xjbvs); + } + + if (model->BSIM4v2bvs <= 0.0) + { model->BSIM4v2bvs = 10.0; + fprintf(stderr, "BVS reset to %g.\n", model->BSIM4v2bvs); + } + + + /* loop through all the instances of the model */ + for (here = model->BSIM4v2instances; here != NULL; + here = here->BSIM4v2nextInstance) + { if (here->BSIM4v2owner != ARCHme) continue; + pSizeDependParamKnot = model->pSizeDependParamKnot; + Size_Not_Found = 1; + while ((pSizeDependParamKnot != NULL) && Size_Not_Found) + { if ((here->BSIM4v2l == pSizeDependParamKnot->Length) + && (here->BSIM4v2w == pSizeDependParamKnot->Width) + && (here->BSIM4v2nf == pSizeDependParamKnot->NFinger)) + { Size_Not_Found = 0; + here->pParam = pSizeDependParamKnot; + pParam = here->pParam; /*bug-fix */ + } + else + { pLastKnot = pSizeDependParamKnot; + pSizeDependParamKnot = pSizeDependParamKnot->pNext; + } + } + + if (Size_Not_Found) + { pParam = (struct bsim4SizeDependParam *)malloc( + sizeof(struct bsim4SizeDependParam)); + if (pLastKnot == NULL) + model->pSizeDependParamKnot = pParam; + else + pLastKnot->pNext = pParam; + pParam->pNext = NULL; + here->pParam = pParam; + + pParam->Length = here->BSIM4v2l; + pParam->Width = here->BSIM4v2w; + pParam->NFinger = here->BSIM4v2nf; + Lnew = here->BSIM4v2l + model->BSIM4v2xl ; + Wnew = here->BSIM4v2w / here->BSIM4v2nf + model->BSIM4v2xw; + + T0 = pow(Lnew, model->BSIM4v2Lln); + T1 = pow(Wnew, model->BSIM4v2Lwn); + tmp1 = model->BSIM4v2Ll / T0 + model->BSIM4v2Lw / T1 + + model->BSIM4v2Lwl / (T0 * T1); + pParam->BSIM4v2dl = model->BSIM4v2Lint + tmp1; + tmp2 = model->BSIM4v2Llc / T0 + model->BSIM4v2Lwc / T1 + + model->BSIM4v2Lwlc / (T0 * T1); + pParam->BSIM4v2dlc = model->BSIM4v2dlc + tmp2; + pParam->BSIM4v2dlcig = model->BSIM4v2dlcig + tmp2; + + T2 = pow(Lnew, model->BSIM4v2Wln); + T3 = pow(Wnew, model->BSIM4v2Wwn); + tmp1 = model->BSIM4v2Wl / T2 + model->BSIM4v2Ww / T3 + + model->BSIM4v2Wwl / (T2 * T3); + pParam->BSIM4v2dw = model->BSIM4v2Wint + tmp1; + tmp2 = model->BSIM4v2Wlc / T2 + model->BSIM4v2Wwc / T3 + + model->BSIM4v2Wwlc / (T2 * T3); + pParam->BSIM4v2dwc = model->BSIM4v2dwc + tmp2; + pParam->BSIM4v2dwj = model->BSIM4v2dwj + tmp2; + + pParam->BSIM4v2leff = Lnew - 2.0 * pParam->BSIM4v2dl; + if (pParam->BSIM4v2leff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v2modName; + namarray[1] = here->BSIM4v2name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v2: mosfet %s, model %s: Effective channel length <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v2weff = Wnew - 2.0 * pParam->BSIM4v2dw; + if (pParam->BSIM4v2weff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v2modName; + namarray[1] = here->BSIM4v2name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v2: mosfet %s, model %s: Effective channel width <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v2leffCV = Lnew - 2.0 * pParam->BSIM4v2dlc; + if (pParam->BSIM4v2leffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v2modName; + namarray[1] = here->BSIM4v2name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v2: mosfet %s, model %s: Effective channel length for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v2weffCV = Wnew - 2.0 * pParam->BSIM4v2dwc; + if (pParam->BSIM4v2weffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v2modName; + namarray[1] = here->BSIM4v2name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v2: mosfet %s, model %s: Effective channel width for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v2weffCJ = Wnew - 2.0 * pParam->BSIM4v2dwj; + if (pParam->BSIM4v2weffCJ <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v2modName; + namarray[1] = here->BSIM4v2name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v2: mosfet %s, model %s: Effective channel width for S/D junctions <= 0", + namarray); + return(E_BADPARM); + } + + + if (model->BSIM4v2binUnit == 1) + { Inv_L = 1.0e-6 / pParam->BSIM4v2leff; + Inv_W = 1.0e-6 / pParam->BSIM4v2weff; + Inv_LW = 1.0e-12 / (pParam->BSIM4v2leff + * pParam->BSIM4v2weff); + } + else + { Inv_L = 1.0 / pParam->BSIM4v2leff; + Inv_W = 1.0 / pParam->BSIM4v2weff; + Inv_LW = 1.0 / (pParam->BSIM4v2leff + * pParam->BSIM4v2weff); + } + pParam->BSIM4v2cdsc = model->BSIM4v2cdsc + + model->BSIM4v2lcdsc * Inv_L + + model->BSIM4v2wcdsc * Inv_W + + model->BSIM4v2pcdsc * Inv_LW; + pParam->BSIM4v2cdscb = model->BSIM4v2cdscb + + model->BSIM4v2lcdscb * Inv_L + + model->BSIM4v2wcdscb * Inv_W + + model->BSIM4v2pcdscb * Inv_LW; + + pParam->BSIM4v2cdscd = model->BSIM4v2cdscd + + model->BSIM4v2lcdscd * Inv_L + + model->BSIM4v2wcdscd * Inv_W + + model->BSIM4v2pcdscd * Inv_LW; + + pParam->BSIM4v2cit = model->BSIM4v2cit + + model->BSIM4v2lcit * Inv_L + + model->BSIM4v2wcit * Inv_W + + model->BSIM4v2pcit * Inv_LW; + pParam->BSIM4v2nfactor = model->BSIM4v2nfactor + + model->BSIM4v2lnfactor * Inv_L + + model->BSIM4v2wnfactor * Inv_W + + model->BSIM4v2pnfactor * Inv_LW; + pParam->BSIM4v2xj = model->BSIM4v2xj + + model->BSIM4v2lxj * Inv_L + + model->BSIM4v2wxj * Inv_W + + model->BSIM4v2pxj * Inv_LW; + pParam->BSIM4v2vsat = model->BSIM4v2vsat + + model->BSIM4v2lvsat * Inv_L + + model->BSIM4v2wvsat * Inv_W + + model->BSIM4v2pvsat * Inv_LW; + pParam->BSIM4v2at = model->BSIM4v2at + + model->BSIM4v2lat * Inv_L + + model->BSIM4v2wat * Inv_W + + model->BSIM4v2pat * Inv_LW; + pParam->BSIM4v2a0 = model->BSIM4v2a0 + + model->BSIM4v2la0 * Inv_L + + model->BSIM4v2wa0 * Inv_W + + model->BSIM4v2pa0 * Inv_LW; + + pParam->BSIM4v2ags = model->BSIM4v2ags + + model->BSIM4v2lags * Inv_L + + model->BSIM4v2wags * Inv_W + + model->BSIM4v2pags * Inv_LW; + + pParam->BSIM4v2a1 = model->BSIM4v2a1 + + model->BSIM4v2la1 * Inv_L + + model->BSIM4v2wa1 * Inv_W + + model->BSIM4v2pa1 * Inv_LW; + pParam->BSIM4v2a2 = model->BSIM4v2a2 + + model->BSIM4v2la2 * Inv_L + + model->BSIM4v2wa2 * Inv_W + + model->BSIM4v2pa2 * Inv_LW; + pParam->BSIM4v2keta = model->BSIM4v2keta + + model->BSIM4v2lketa * Inv_L + + model->BSIM4v2wketa * Inv_W + + model->BSIM4v2pketa * Inv_LW; + pParam->BSIM4v2nsub = model->BSIM4v2nsub + + model->BSIM4v2lnsub * Inv_L + + model->BSIM4v2wnsub * Inv_W + + model->BSIM4v2pnsub * Inv_LW; + pParam->BSIM4v2ndep = model->BSIM4v2ndep + + model->BSIM4v2lndep * Inv_L + + model->BSIM4v2wndep * Inv_W + + model->BSIM4v2pndep * Inv_LW; + pParam->BSIM4v2nsd = model->BSIM4v2nsd + + model->BSIM4v2lnsd * Inv_L + + model->BSIM4v2wnsd * Inv_W + + model->BSIM4v2pnsd * Inv_LW; + pParam->BSIM4v2phin = model->BSIM4v2phin + + model->BSIM4v2lphin * Inv_L + + model->BSIM4v2wphin * Inv_W + + model->BSIM4v2pphin * Inv_LW; + pParam->BSIM4v2ngate = model->BSIM4v2ngate + + model->BSIM4v2lngate * Inv_L + + model->BSIM4v2wngate * Inv_W + + model->BSIM4v2pngate * Inv_LW; + pParam->BSIM4v2gamma1 = model->BSIM4v2gamma1 + + model->BSIM4v2lgamma1 * Inv_L + + model->BSIM4v2wgamma1 * Inv_W + + model->BSIM4v2pgamma1 * Inv_LW; + pParam->BSIM4v2gamma2 = model->BSIM4v2gamma2 + + model->BSIM4v2lgamma2 * Inv_L + + model->BSIM4v2wgamma2 * Inv_W + + model->BSIM4v2pgamma2 * Inv_LW; + pParam->BSIM4v2vbx = model->BSIM4v2vbx + + model->BSIM4v2lvbx * Inv_L + + model->BSIM4v2wvbx * Inv_W + + model->BSIM4v2pvbx * Inv_LW; + pParam->BSIM4v2vbm = model->BSIM4v2vbm + + model->BSIM4v2lvbm * Inv_L + + model->BSIM4v2wvbm * Inv_W + + model->BSIM4v2pvbm * Inv_LW; + pParam->BSIM4v2xt = model->BSIM4v2xt + + model->BSIM4v2lxt * Inv_L + + model->BSIM4v2wxt * Inv_W + + model->BSIM4v2pxt * Inv_LW; + pParam->BSIM4v2vfb = model->BSIM4v2vfb + + model->BSIM4v2lvfb * Inv_L + + model->BSIM4v2wvfb * Inv_W + + model->BSIM4v2pvfb * Inv_LW; + pParam->BSIM4v2k1 = model->BSIM4v2k1 + + model->BSIM4v2lk1 * Inv_L + + model->BSIM4v2wk1 * Inv_W + + model->BSIM4v2pk1 * Inv_LW; + pParam->BSIM4v2kt1 = model->BSIM4v2kt1 + + model->BSIM4v2lkt1 * Inv_L + + model->BSIM4v2wkt1 * Inv_W + + model->BSIM4v2pkt1 * Inv_LW; + pParam->BSIM4v2kt1l = model->BSIM4v2kt1l + + model->BSIM4v2lkt1l * Inv_L + + model->BSIM4v2wkt1l * Inv_W + + model->BSIM4v2pkt1l * Inv_LW; + pParam->BSIM4v2k2 = model->BSIM4v2k2 + + model->BSIM4v2lk2 * Inv_L + + model->BSIM4v2wk2 * Inv_W + + model->BSIM4v2pk2 * Inv_LW; + pParam->BSIM4v2kt2 = model->BSIM4v2kt2 + + model->BSIM4v2lkt2 * Inv_L + + model->BSIM4v2wkt2 * Inv_W + + model->BSIM4v2pkt2 * Inv_LW; + pParam->BSIM4v2k3 = model->BSIM4v2k3 + + model->BSIM4v2lk3 * Inv_L + + model->BSIM4v2wk3 * Inv_W + + model->BSIM4v2pk3 * Inv_LW; + pParam->BSIM4v2k3b = model->BSIM4v2k3b + + model->BSIM4v2lk3b * Inv_L + + model->BSIM4v2wk3b * Inv_W + + model->BSIM4v2pk3b * Inv_LW; + pParam->BSIM4v2w0 = model->BSIM4v2w0 + + model->BSIM4v2lw0 * Inv_L + + model->BSIM4v2ww0 * Inv_W + + model->BSIM4v2pw0 * Inv_LW; + pParam->BSIM4v2lpe0 = model->BSIM4v2lpe0 + + model->BSIM4v2llpe0 * Inv_L + + model->BSIM4v2wlpe0 * Inv_W + + model->BSIM4v2plpe0 * Inv_LW; + pParam->BSIM4v2lpeb = model->BSIM4v2lpeb + + model->BSIM4v2llpeb * Inv_L + + model->BSIM4v2wlpeb * Inv_W + + model->BSIM4v2plpeb * Inv_LW; + pParam->BSIM4v2dvtp0 = model->BSIM4v2dvtp0 + + model->BSIM4v2ldvtp0 * Inv_L + + model->BSIM4v2wdvtp0 * Inv_W + + model->BSIM4v2pdvtp0 * Inv_LW; + pParam->BSIM4v2dvtp1 = model->BSIM4v2dvtp1 + + model->BSIM4v2ldvtp1 * Inv_L + + model->BSIM4v2wdvtp1 * Inv_W + + model->BSIM4v2pdvtp1 * Inv_LW; + pParam->BSIM4v2dvt0 = model->BSIM4v2dvt0 + + model->BSIM4v2ldvt0 * Inv_L + + model->BSIM4v2wdvt0 * Inv_W + + model->BSIM4v2pdvt0 * Inv_LW; + pParam->BSIM4v2dvt1 = model->BSIM4v2dvt1 + + model->BSIM4v2ldvt1 * Inv_L + + model->BSIM4v2wdvt1 * Inv_W + + model->BSIM4v2pdvt1 * Inv_LW; + pParam->BSIM4v2dvt2 = model->BSIM4v2dvt2 + + model->BSIM4v2ldvt2 * Inv_L + + model->BSIM4v2wdvt2 * Inv_W + + model->BSIM4v2pdvt2 * Inv_LW; + pParam->BSIM4v2dvt0w = model->BSIM4v2dvt0w + + model->BSIM4v2ldvt0w * Inv_L + + model->BSIM4v2wdvt0w * Inv_W + + model->BSIM4v2pdvt0w * Inv_LW; + pParam->BSIM4v2dvt1w = model->BSIM4v2dvt1w + + model->BSIM4v2ldvt1w * Inv_L + + model->BSIM4v2wdvt1w * Inv_W + + model->BSIM4v2pdvt1w * Inv_LW; + pParam->BSIM4v2dvt2w = model->BSIM4v2dvt2w + + model->BSIM4v2ldvt2w * Inv_L + + model->BSIM4v2wdvt2w * Inv_W + + model->BSIM4v2pdvt2w * Inv_LW; + pParam->BSIM4v2drout = model->BSIM4v2drout + + model->BSIM4v2ldrout * Inv_L + + model->BSIM4v2wdrout * Inv_W + + model->BSIM4v2pdrout * Inv_LW; + pParam->BSIM4v2dsub = model->BSIM4v2dsub + + model->BSIM4v2ldsub * Inv_L + + model->BSIM4v2wdsub * Inv_W + + model->BSIM4v2pdsub * Inv_LW; + pParam->BSIM4v2vth0 = model->BSIM4v2vth0 + + model->BSIM4v2lvth0 * Inv_L + + model->BSIM4v2wvth0 * Inv_W + + model->BSIM4v2pvth0 * Inv_LW; + pParam->BSIM4v2ua = model->BSIM4v2ua + + model->BSIM4v2lua * Inv_L + + model->BSIM4v2wua * Inv_W + + model->BSIM4v2pua * Inv_LW; + pParam->BSIM4v2ua1 = model->BSIM4v2ua1 + + model->BSIM4v2lua1 * Inv_L + + model->BSIM4v2wua1 * Inv_W + + model->BSIM4v2pua1 * Inv_LW; + pParam->BSIM4v2ub = model->BSIM4v2ub + + model->BSIM4v2lub * Inv_L + + model->BSIM4v2wub * Inv_W + + model->BSIM4v2pub * Inv_LW; + pParam->BSIM4v2ub1 = model->BSIM4v2ub1 + + model->BSIM4v2lub1 * Inv_L + + model->BSIM4v2wub1 * Inv_W + + model->BSIM4v2pub1 * Inv_LW; + pParam->BSIM4v2uc = model->BSIM4v2uc + + model->BSIM4v2luc * Inv_L + + model->BSIM4v2wuc * Inv_W + + model->BSIM4v2puc * Inv_LW; + pParam->BSIM4v2uc1 = model->BSIM4v2uc1 + + model->BSIM4v2luc1 * Inv_L + + model->BSIM4v2wuc1 * Inv_W + + model->BSIM4v2puc1 * Inv_LW; + pParam->BSIM4v2eu = model->BSIM4v2eu + + model->BSIM4v2leu * Inv_L + + model->BSIM4v2weu * Inv_W + + model->BSIM4v2peu * Inv_LW; + pParam->BSIM4v2u0 = model->BSIM4v2u0 + + model->BSIM4v2lu0 * Inv_L + + model->BSIM4v2wu0 * Inv_W + + model->BSIM4v2pu0 * Inv_LW; + pParam->BSIM4v2ute = model->BSIM4v2ute + + model->BSIM4v2lute * Inv_L + + model->BSIM4v2wute * Inv_W + + model->BSIM4v2pute * Inv_LW; + pParam->BSIM4v2voff = model->BSIM4v2voff + + model->BSIM4v2lvoff * Inv_L + + model->BSIM4v2wvoff * Inv_W + + model->BSIM4v2pvoff * Inv_LW; + pParam->BSIM4v2minv = model->BSIM4v2minv + + model->BSIM4v2lminv * Inv_L + + model->BSIM4v2wminv * Inv_W + + model->BSIM4v2pminv * Inv_LW; + pParam->BSIM4v2fprout = model->BSIM4v2fprout + + model->BSIM4v2lfprout * Inv_L + + model->BSIM4v2wfprout * Inv_W + + model->BSIM4v2pfprout * Inv_LW; + pParam->BSIM4v2pdits = model->BSIM4v2pdits + + model->BSIM4v2lpdits * Inv_L + + model->BSIM4v2wpdits * Inv_W + + model->BSIM4v2ppdits * Inv_LW; + pParam->BSIM4v2pditsd = model->BSIM4v2pditsd + + model->BSIM4v2lpditsd * Inv_L + + model->BSIM4v2wpditsd * Inv_W + + model->BSIM4v2ppditsd * Inv_LW; + pParam->BSIM4v2delta = model->BSIM4v2delta + + model->BSIM4v2ldelta * Inv_L + + model->BSIM4v2wdelta * Inv_W + + model->BSIM4v2pdelta * Inv_LW; + pParam->BSIM4v2rdsw = model->BSIM4v2rdsw + + model->BSIM4v2lrdsw * Inv_L + + model->BSIM4v2wrdsw * Inv_W + + model->BSIM4v2prdsw * Inv_LW; + pParam->BSIM4v2rdw = model->BSIM4v2rdw + + model->BSIM4v2lrdw * Inv_L + + model->BSIM4v2wrdw * Inv_W + + model->BSIM4v2prdw * Inv_LW; + pParam->BSIM4v2rsw = model->BSIM4v2rsw + + model->BSIM4v2lrsw * Inv_L + + model->BSIM4v2wrsw * Inv_W + + model->BSIM4v2prsw * Inv_LW; + pParam->BSIM4v2prwg = model->BSIM4v2prwg + + model->BSIM4v2lprwg * Inv_L + + model->BSIM4v2wprwg * Inv_W + + model->BSIM4v2pprwg * Inv_LW; + pParam->BSIM4v2prwb = model->BSIM4v2prwb + + model->BSIM4v2lprwb * Inv_L + + model->BSIM4v2wprwb * Inv_W + + model->BSIM4v2pprwb * Inv_LW; + pParam->BSIM4v2prt = model->BSIM4v2prt + + model->BSIM4v2lprt * Inv_L + + model->BSIM4v2wprt * Inv_W + + model->BSIM4v2pprt * Inv_LW; + pParam->BSIM4v2eta0 = model->BSIM4v2eta0 + + model->BSIM4v2leta0 * Inv_L + + model->BSIM4v2weta0 * Inv_W + + model->BSIM4v2peta0 * Inv_LW; + pParam->BSIM4v2etab = model->BSIM4v2etab + + model->BSIM4v2letab * Inv_L + + model->BSIM4v2wetab * Inv_W + + model->BSIM4v2petab * Inv_LW; + pParam->BSIM4v2pclm = model->BSIM4v2pclm + + model->BSIM4v2lpclm * Inv_L + + model->BSIM4v2wpclm * Inv_W + + model->BSIM4v2ppclm * Inv_LW; + pParam->BSIM4v2pdibl1 = model->BSIM4v2pdibl1 + + model->BSIM4v2lpdibl1 * Inv_L + + model->BSIM4v2wpdibl1 * Inv_W + + model->BSIM4v2ppdibl1 * Inv_LW; + pParam->BSIM4v2pdibl2 = model->BSIM4v2pdibl2 + + model->BSIM4v2lpdibl2 * Inv_L + + model->BSIM4v2wpdibl2 * Inv_W + + model->BSIM4v2ppdibl2 * Inv_LW; + pParam->BSIM4v2pdiblb = model->BSIM4v2pdiblb + + model->BSIM4v2lpdiblb * Inv_L + + model->BSIM4v2wpdiblb * Inv_W + + model->BSIM4v2ppdiblb * Inv_LW; + pParam->BSIM4v2pscbe1 = model->BSIM4v2pscbe1 + + model->BSIM4v2lpscbe1 * Inv_L + + model->BSIM4v2wpscbe1 * Inv_W + + model->BSIM4v2ppscbe1 * Inv_LW; + pParam->BSIM4v2pscbe2 = model->BSIM4v2pscbe2 + + model->BSIM4v2lpscbe2 * Inv_L + + model->BSIM4v2wpscbe2 * Inv_W + + model->BSIM4v2ppscbe2 * Inv_LW; + pParam->BSIM4v2pvag = model->BSIM4v2pvag + + model->BSIM4v2lpvag * Inv_L + + model->BSIM4v2wpvag * Inv_W + + model->BSIM4v2ppvag * Inv_LW; + pParam->BSIM4v2wr = model->BSIM4v2wr + + model->BSIM4v2lwr * Inv_L + + model->BSIM4v2wwr * Inv_W + + model->BSIM4v2pwr * Inv_LW; + pParam->BSIM4v2dwg = model->BSIM4v2dwg + + model->BSIM4v2ldwg * Inv_L + + model->BSIM4v2wdwg * Inv_W + + model->BSIM4v2pdwg * Inv_LW; + pParam->BSIM4v2dwb = model->BSIM4v2dwb + + model->BSIM4v2ldwb * Inv_L + + model->BSIM4v2wdwb * Inv_W + + model->BSIM4v2pdwb * Inv_LW; + pParam->BSIM4v2b0 = model->BSIM4v2b0 + + model->BSIM4v2lb0 * Inv_L + + model->BSIM4v2wb0 * Inv_W + + model->BSIM4v2pb0 * Inv_LW; + pParam->BSIM4v2b1 = model->BSIM4v2b1 + + model->BSIM4v2lb1 * Inv_L + + model->BSIM4v2wb1 * Inv_W + + model->BSIM4v2pb1 * Inv_LW; + pParam->BSIM4v2alpha0 = model->BSIM4v2alpha0 + + model->BSIM4v2lalpha0 * Inv_L + + model->BSIM4v2walpha0 * Inv_W + + model->BSIM4v2palpha0 * Inv_LW; + pParam->BSIM4v2alpha1 = model->BSIM4v2alpha1 + + model->BSIM4v2lalpha1 * Inv_L + + model->BSIM4v2walpha1 * Inv_W + + model->BSIM4v2palpha1 * Inv_LW; + pParam->BSIM4v2beta0 = model->BSIM4v2beta0 + + model->BSIM4v2lbeta0 * Inv_L + + model->BSIM4v2wbeta0 * Inv_W + + model->BSIM4v2pbeta0 * Inv_LW; + pParam->BSIM4v2agidl = model->BSIM4v2agidl + + model->BSIM4v2lagidl * Inv_L + + model->BSIM4v2wagidl * Inv_W + + model->BSIM4v2pagidl * Inv_LW; + pParam->BSIM4v2bgidl = model->BSIM4v2bgidl + + model->BSIM4v2lbgidl * Inv_L + + model->BSIM4v2wbgidl * Inv_W + + model->BSIM4v2pbgidl * Inv_LW; + pParam->BSIM4v2cgidl = model->BSIM4v2cgidl + + model->BSIM4v2lcgidl * Inv_L + + model->BSIM4v2wcgidl * Inv_W + + model->BSIM4v2pcgidl * Inv_LW; + pParam->BSIM4v2egidl = model->BSIM4v2egidl + + model->BSIM4v2legidl * Inv_L + + model->BSIM4v2wegidl * Inv_W + + model->BSIM4v2pegidl * Inv_LW; + pParam->BSIM4v2aigc = model->BSIM4v2aigc + + model->BSIM4v2laigc * Inv_L + + model->BSIM4v2waigc * Inv_W + + model->BSIM4v2paigc * Inv_LW; + pParam->BSIM4v2bigc = model->BSIM4v2bigc + + model->BSIM4v2lbigc * Inv_L + + model->BSIM4v2wbigc * Inv_W + + model->BSIM4v2pbigc * Inv_LW; + pParam->BSIM4v2cigc = model->BSIM4v2cigc + + model->BSIM4v2lcigc * Inv_L + + model->BSIM4v2wcigc * Inv_W + + model->BSIM4v2pcigc * Inv_LW; + pParam->BSIM4v2aigsd = model->BSIM4v2aigsd + + model->BSIM4v2laigsd * Inv_L + + model->BSIM4v2waigsd * Inv_W + + model->BSIM4v2paigsd * Inv_LW; + pParam->BSIM4v2bigsd = model->BSIM4v2bigsd + + model->BSIM4v2lbigsd * Inv_L + + model->BSIM4v2wbigsd * Inv_W + + model->BSIM4v2pbigsd * Inv_LW; + pParam->BSIM4v2cigsd = model->BSIM4v2cigsd + + model->BSIM4v2lcigsd * Inv_L + + model->BSIM4v2wcigsd * Inv_W + + model->BSIM4v2pcigsd * Inv_LW; + pParam->BSIM4v2aigbacc = model->BSIM4v2aigbacc + + model->BSIM4v2laigbacc * Inv_L + + model->BSIM4v2waigbacc * Inv_W + + model->BSIM4v2paigbacc * Inv_LW; + pParam->BSIM4v2bigbacc = model->BSIM4v2bigbacc + + model->BSIM4v2lbigbacc * Inv_L + + model->BSIM4v2wbigbacc * Inv_W + + model->BSIM4v2pbigbacc * Inv_LW; + pParam->BSIM4v2cigbacc = model->BSIM4v2cigbacc + + model->BSIM4v2lcigbacc * Inv_L + + model->BSIM4v2wcigbacc * Inv_W + + model->BSIM4v2pcigbacc * Inv_LW; + pParam->BSIM4v2aigbinv = model->BSIM4v2aigbinv + + model->BSIM4v2laigbinv * Inv_L + + model->BSIM4v2waigbinv * Inv_W + + model->BSIM4v2paigbinv * Inv_LW; + pParam->BSIM4v2bigbinv = model->BSIM4v2bigbinv + + model->BSIM4v2lbigbinv * Inv_L + + model->BSIM4v2wbigbinv * Inv_W + + model->BSIM4v2pbigbinv * Inv_LW; + pParam->BSIM4v2cigbinv = model->BSIM4v2cigbinv + + model->BSIM4v2lcigbinv * Inv_L + + model->BSIM4v2wcigbinv * Inv_W + + model->BSIM4v2pcigbinv * Inv_LW; + pParam->BSIM4v2nigc = model->BSIM4v2nigc + + model->BSIM4v2lnigc * Inv_L + + model->BSIM4v2wnigc * Inv_W + + model->BSIM4v2pnigc * Inv_LW; + pParam->BSIM4v2nigbacc = model->BSIM4v2nigbacc + + model->BSIM4v2lnigbacc * Inv_L + + model->BSIM4v2wnigbacc * Inv_W + + model->BSIM4v2pnigbacc * Inv_LW; + pParam->BSIM4v2nigbinv = model->BSIM4v2nigbinv + + model->BSIM4v2lnigbinv * Inv_L + + model->BSIM4v2wnigbinv * Inv_W + + model->BSIM4v2pnigbinv * Inv_LW; + pParam->BSIM4v2ntox = model->BSIM4v2ntox + + model->BSIM4v2lntox * Inv_L + + model->BSIM4v2wntox * Inv_W + + model->BSIM4v2pntox * Inv_LW; + pParam->BSIM4v2eigbinv = model->BSIM4v2eigbinv + + model->BSIM4v2leigbinv * Inv_L + + model->BSIM4v2weigbinv * Inv_W + + model->BSIM4v2peigbinv * Inv_LW; + pParam->BSIM4v2pigcd = model->BSIM4v2pigcd + + model->BSIM4v2lpigcd * Inv_L + + model->BSIM4v2wpigcd * Inv_W + + model->BSIM4v2ppigcd * Inv_LW; + pParam->BSIM4v2poxedge = model->BSIM4v2poxedge + + model->BSIM4v2lpoxedge * Inv_L + + model->BSIM4v2wpoxedge * Inv_W + + model->BSIM4v2ppoxedge * Inv_LW; + pParam->BSIM4v2xrcrg1 = model->BSIM4v2xrcrg1 + + model->BSIM4v2lxrcrg1 * Inv_L + + model->BSIM4v2wxrcrg1 * Inv_W + + model->BSIM4v2pxrcrg1 * Inv_LW; + pParam->BSIM4v2xrcrg2 = model->BSIM4v2xrcrg2 + + model->BSIM4v2lxrcrg2 * Inv_L + + model->BSIM4v2wxrcrg2 * Inv_W + + model->BSIM4v2pxrcrg2 * Inv_LW; + + pParam->BSIM4v2cgsl = model->BSIM4v2cgsl + + model->BSIM4v2lcgsl * Inv_L + + model->BSIM4v2wcgsl * Inv_W + + model->BSIM4v2pcgsl * Inv_LW; + pParam->BSIM4v2cgdl = model->BSIM4v2cgdl + + model->BSIM4v2lcgdl * Inv_L + + model->BSIM4v2wcgdl * Inv_W + + model->BSIM4v2pcgdl * Inv_LW; + pParam->BSIM4v2ckappas = model->BSIM4v2ckappas + + model->BSIM4v2lckappas * Inv_L + + model->BSIM4v2wckappas * Inv_W + + model->BSIM4v2pckappas * Inv_LW; + pParam->BSIM4v2ckappad = model->BSIM4v2ckappad + + model->BSIM4v2lckappad * Inv_L + + model->BSIM4v2wckappad * Inv_W + + model->BSIM4v2pckappad * Inv_LW; + pParam->BSIM4v2cf = model->BSIM4v2cf + + model->BSIM4v2lcf * Inv_L + + model->BSIM4v2wcf * Inv_W + + model->BSIM4v2pcf * Inv_LW; + pParam->BSIM4v2clc = model->BSIM4v2clc + + model->BSIM4v2lclc * Inv_L + + model->BSIM4v2wclc * Inv_W + + model->BSIM4v2pclc * Inv_LW; + pParam->BSIM4v2cle = model->BSIM4v2cle + + model->BSIM4v2lcle * Inv_L + + model->BSIM4v2wcle * Inv_W + + model->BSIM4v2pcle * Inv_LW; + pParam->BSIM4v2vfbcv = model->BSIM4v2vfbcv + + model->BSIM4v2lvfbcv * Inv_L + + model->BSIM4v2wvfbcv * Inv_W + + model->BSIM4v2pvfbcv * Inv_LW; + pParam->BSIM4v2acde = model->BSIM4v2acde + + model->BSIM4v2lacde * Inv_L + + model->BSIM4v2wacde * Inv_W + + model->BSIM4v2pacde * Inv_LW; + pParam->BSIM4v2moin = model->BSIM4v2moin + + model->BSIM4v2lmoin * Inv_L + + model->BSIM4v2wmoin * Inv_W + + model->BSIM4v2pmoin * Inv_LW; + pParam->BSIM4v2noff = model->BSIM4v2noff + + model->BSIM4v2lnoff * Inv_L + + model->BSIM4v2wnoff * Inv_W + + model->BSIM4v2pnoff * Inv_LW; + pParam->BSIM4v2voffcv = model->BSIM4v2voffcv + + model->BSIM4v2lvoffcv * Inv_L + + model->BSIM4v2wvoffcv * Inv_W + + model->BSIM4v2pvoffcv * Inv_LW; + + pParam->BSIM4v2abulkCVfactor = 1.0 + pow((pParam->BSIM4v2clc + / pParam->BSIM4v2leffCV), + pParam->BSIM4v2cle); + + T0 = (TRatio - 1.0); + pParam->BSIM4v2ua = pParam->BSIM4v2ua + pParam->BSIM4v2ua1 * T0; + pParam->BSIM4v2ub = pParam->BSIM4v2ub + pParam->BSIM4v2ub1 * T0; + pParam->BSIM4v2uc = pParam->BSIM4v2uc + pParam->BSIM4v2uc1 * T0; + if (pParam->BSIM4v2u0 > 1.0) + pParam->BSIM4v2u0 = pParam->BSIM4v2u0 / 1.0e4; + + pParam->BSIM4v2u0temp = pParam->BSIM4v2u0 + * pow(TRatio, pParam->BSIM4v2ute); + pParam->BSIM4v2vsattemp = pParam->BSIM4v2vsat - pParam->BSIM4v2at + * T0; + if (pParam->BSIM4v2eu < 0.0) + { pParam->BSIM4v2eu = 0.0; + printf("Warning: eu has been negative; reset to 0.0.\n"); + } + + + PowWeffWr = pow(pParam->BSIM4v2weffCJ * 1.0e6, pParam->BSIM4v2wr) * here->BSIM4v2nf; + /* External Rd(V) */ + T1 = pParam->BSIM4v2rdw + pParam->BSIM4v2prt * T0; + if (T1 < 0.0) + { T1 = 0.0; + printf("Warning: Rdw at current temperature is negative; set to 0.\n"); + } + T2 = model->BSIM4v2rdwmin + pParam->BSIM4v2prt * T0; + if (T2 < 0.0) + { T2 = 0.0; + printf("Warning: Rdwmin at current temperature is negative; set to 0.\n"); + } + pParam->BSIM4v2rd0 = T1 / PowWeffWr; + pParam->BSIM4v2rdwmin = T2 / PowWeffWr; + + + /* External Rs(V) */ + T1 = pParam->BSIM4v2rsw + pParam->BSIM4v2prt * T0; + if (T1 < 0.0) + { T1 = 0.0; + printf("Warning: Rsw at current temperature is negative; set to 0.\n"); + } + T2 = model->BSIM4v2rswmin + pParam->BSIM4v2prt * T0; + if (T2 < 0.0) + { T2 = 0.0; + printf("Warning: Rswmin at current temperature is negative; set to 0.\n"); + } + pParam->BSIM4v2rs0 = T1 / PowWeffWr; + pParam->BSIM4v2rswmin = T2 / PowWeffWr; + + /* Internal Rds(V) in IV */ + pParam->BSIM4v2rds0 = (pParam->BSIM4v2rdsw + pParam->BSIM4v2prt * T0) + * here->BSIM4v2nf / PowWeffWr; + pParam->BSIM4v2rdswmin = (model->BSIM4v2rdswmin + pParam->BSIM4v2prt * T0) + * here->BSIM4v2nf / PowWeffWr; + + pParam->BSIM4v2cgdo = (model->BSIM4v2cgdo + pParam->BSIM4v2cf) + * pParam->BSIM4v2weffCV; + pParam->BSIM4v2cgso = (model->BSIM4v2cgso + pParam->BSIM4v2cf) + * pParam->BSIM4v2weffCV; + pParam->BSIM4v2cgbo = model->BSIM4v2cgbo * pParam->BSIM4v2leffCV * here->BSIM4v2nf; + + if (!model->BSIM4v2ndepGiven && model->BSIM4v2gamma1Given) + { T0 = pParam->BSIM4v2gamma1 * model->BSIM4v2coxe; + pParam->BSIM4v2ndep = 3.01248e22 * T0 * T0; + } + + pParam->BSIM4v2phi = Vtm0 * log(pParam->BSIM4v2ndep / ni) + + pParam->BSIM4v2phin + 0.4; + + pParam->BSIM4v2sqrtPhi = sqrt(pParam->BSIM4v2phi); + pParam->BSIM4v2phis3 = pParam->BSIM4v2sqrtPhi * pParam->BSIM4v2phi; + + pParam->BSIM4v2Xdep0 = sqrt(2.0 * EPSSI / (Charge_q + * pParam->BSIM4v2ndep * 1.0e6)) + * pParam->BSIM4v2sqrtPhi; + pParam->BSIM4v2sqrtXdep0 = sqrt(pParam->BSIM4v2Xdep0); + pParam->BSIM4v2litl = sqrt(3.0 * pParam->BSIM4v2xj + * model->BSIM4v2toxe); + pParam->BSIM4v2vbi = Vtm0 * log(pParam->BSIM4v2nsd + * pParam->BSIM4v2ndep / (ni * ni)); + + if (pParam->BSIM4v2ngate > 0.0) + { pParam->BSIM4v2vfbsd = Vtm0 * log(pParam->BSIM4v2ngate + / pParam->BSIM4v2nsd); + } + else + pParam->BSIM4v2vfbsd = 0.0; + + pParam->BSIM4v2cdep0 = sqrt(Charge_q * EPSSI + * pParam->BSIM4v2ndep * 1.0e6 / 2.0 + / pParam->BSIM4v2phi); + + pParam->BSIM4v2ToxRatio = exp(pParam->BSIM4v2ntox + * log(model->BSIM4v2toxref / model->BSIM4v2toxe)) + / model->BSIM4v2toxe / model->BSIM4v2toxe; + pParam->BSIM4v2ToxRatioEdge = exp(pParam->BSIM4v2ntox + * log(model->BSIM4v2toxref + / (model->BSIM4v2toxe * pParam->BSIM4v2poxedge))) + / model->BSIM4v2toxe / model->BSIM4v2toxe + / pParam->BSIM4v2poxedge / pParam->BSIM4v2poxedge; + pParam->BSIM4v2Aechvb = (model->BSIM4v2type == NMOS) ? 4.97232e-7 : 3.42537e-7; + pParam->BSIM4v2Bechvb = (model->BSIM4v2type == NMOS) ? 7.45669e11 : 1.16645e12; + pParam->BSIM4v2AechvbEdge = pParam->BSIM4v2Aechvb * pParam->BSIM4v2weff + * pParam->BSIM4v2dlcig * pParam->BSIM4v2ToxRatioEdge; + pParam->BSIM4v2BechvbEdge = -pParam->BSIM4v2Bechvb + * model->BSIM4v2toxe * pParam->BSIM4v2poxedge; + pParam->BSIM4v2Aechvb *= pParam->BSIM4v2weff * pParam->BSIM4v2leff + * pParam->BSIM4v2ToxRatio; + pParam->BSIM4v2Bechvb *= -model->BSIM4v2toxe; + + + pParam->BSIM4v2mstar = 0.5 + atan(pParam->BSIM4v2minv) / PI; + pParam->BSIM4v2voffcbn = pParam->BSIM4v2voff + model->BSIM4v2voffl / pParam->BSIM4v2leff; + + pParam->BSIM4v2ldeb = sqrt(EPSSI * Vtm0 / (Charge_q + * pParam->BSIM4v2ndep * 1.0e6)) / 3.0; + pParam->BSIM4v2acde *= pow((pParam->BSIM4v2ndep / 2.0e16), -0.25); + + + if (model->BSIM4v2k1Given || model->BSIM4v2k2Given) + { if (!model->BSIM4v2k1Given) + { fprintf(stdout, "Warning: k1 should be specified with k2.\n"); + pParam->BSIM4v2k1 = 0.53; + } + if (!model->BSIM4v2k2Given) + { fprintf(stdout, "Warning: k2 should be specified with k1.\n"); + pParam->BSIM4v2k2 = -0.0186; + } + if (model->BSIM4v2nsubGiven) + fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v2xtGiven) + fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v2vbxGiven) + fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v2gamma1Given) + fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v2gamma2Given) + fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); + } + else + { if (!model->BSIM4v2vbxGiven) + pParam->BSIM4v2vbx = pParam->BSIM4v2phi - 7.7348e-4 + * pParam->BSIM4v2ndep + * pParam->BSIM4v2xt * pParam->BSIM4v2xt; + if (pParam->BSIM4v2vbx > 0.0) + pParam->BSIM4v2vbx = -pParam->BSIM4v2vbx; + if (pParam->BSIM4v2vbm > 0.0) + pParam->BSIM4v2vbm = -pParam->BSIM4v2vbm; + + if (!model->BSIM4v2gamma1Given) + pParam->BSIM4v2gamma1 = 5.753e-12 + * sqrt(pParam->BSIM4v2ndep) + / model->BSIM4v2coxe; + if (!model->BSIM4v2gamma2Given) + pParam->BSIM4v2gamma2 = 5.753e-12 + * sqrt(pParam->BSIM4v2nsub) + / model->BSIM4v2coxe; + + T0 = pParam->BSIM4v2gamma1 - pParam->BSIM4v2gamma2; + T1 = sqrt(pParam->BSIM4v2phi - pParam->BSIM4v2vbx) + - pParam->BSIM4v2sqrtPhi; + T2 = sqrt(pParam->BSIM4v2phi * (pParam->BSIM4v2phi + - pParam->BSIM4v2vbm)) - pParam->BSIM4v2phi; + pParam->BSIM4v2k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM4v2vbm); + pParam->BSIM4v2k1 = pParam->BSIM4v2gamma2 - 2.0 + * pParam->BSIM4v2k2 * sqrt(pParam->BSIM4v2phi + - pParam->BSIM4v2vbm); + } + + if (pParam->BSIM4v2k2 < 0.0) + { T0 = 0.5 * pParam->BSIM4v2k1 / pParam->BSIM4v2k2; + pParam->BSIM4v2vbsc = 0.9 * (pParam->BSIM4v2phi - T0 * T0); + if (pParam->BSIM4v2vbsc > -3.0) + pParam->BSIM4v2vbsc = -3.0; + else if (pParam->BSIM4v2vbsc < -30.0) + pParam->BSIM4v2vbsc = -30.0; + } + else + { pParam->BSIM4v2vbsc = -30.0; + } + if (pParam->BSIM4v2vbsc > pParam->BSIM4v2vbm) + pParam->BSIM4v2vbsc = pParam->BSIM4v2vbm; + + if (!model->BSIM4v2vfbGiven) + { if (model->BSIM4v2vth0Given) + { pParam->BSIM4v2vfb = model->BSIM4v2type * pParam->BSIM4v2vth0 + - pParam->BSIM4v2phi - pParam->BSIM4v2k1 + * pParam->BSIM4v2sqrtPhi; + } + else + { pParam->BSIM4v2vfb = -1.0; + } + } + if (!model->BSIM4v2vth0Given) + { pParam->BSIM4v2vth0 = model->BSIM4v2type * (pParam->BSIM4v2vfb + + pParam->BSIM4v2phi + pParam->BSIM4v2k1 + * pParam->BSIM4v2sqrtPhi); + } + + pParam->BSIM4v2k1ox = pParam->BSIM4v2k1 * model->BSIM4v2toxe + / model->BSIM4v2toxm; + pParam->BSIM4v2k2ox = pParam->BSIM4v2k2 * model->BSIM4v2toxe + / model->BSIM4v2toxm; + + T3 = model->BSIM4v2type * pParam->BSIM4v2vth0 + - pParam->BSIM4v2vfb - pParam->BSIM4v2phi; + T4 = T3 + T3; + T5 = 2.5 * T3; + pParam->BSIM4v2vtfbphi1 = (model->BSIM4v2type == NMOS) ? T4 : T5; + if (pParam->BSIM4v2vtfbphi1 < 0.0) + pParam->BSIM4v2vtfbphi1 = 0.0; + + pParam->BSIM4v2vtfbphi2 = 4.0 * T3; + if (pParam->BSIM4v2vtfbphi2 < 0.0) + pParam->BSIM4v2vtfbphi2 = 0.0; + + tmp = sqrt(EPSSI / (model->BSIM4v2epsrox * EPS0) + * model->BSIM4v2toxe * pParam->BSIM4v2Xdep0); + T0 = pParam->BSIM4v2dsub * pParam->BSIM4v2leff / tmp; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + pParam->BSIM4v2theta0vb0 = T1 / T4; + } + else + pParam->BSIM4v2theta0vb0 = 1.0 / (MAX_EXP - 2.0); + + T0 = pParam->BSIM4v2drout * pParam->BSIM4v2leff / tmp; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T5 = T1 / T4; + } + else + T5 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + pParam->BSIM4v2thetaRout = pParam->BSIM4v2pdibl1 * T5 + + pParam->BSIM4v2pdibl2; + + tmp = sqrt(pParam->BSIM4v2Xdep0); + tmp1 = pParam->BSIM4v2vbi - pParam->BSIM4v2phi; + tmp2 = model->BSIM4v2factor1 * tmp; + + T0 = pParam->BSIM4v2dvt1w * pParam->BSIM4v2weff + * pParam->BSIM4v2leff / tmp2; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T8 = T1 / T4; + } + else + T8 = 1.0 / (MAX_EXP - 2.0); + T0 = pParam->BSIM4v2dvt0w * T8; + T8 = T0 * tmp1; + + T0 = pParam->BSIM4v2dvt1 * pParam->BSIM4v2leff / tmp2; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T9 = T1 / T4; + } + else + T9 = 1.0 / (MAX_EXP - 2.0); + T9 = pParam->BSIM4v2dvt0 * T9 * tmp1; + + T4 = model->BSIM4v2toxe * pParam->BSIM4v2phi + / (pParam->BSIM4v2weff + pParam->BSIM4v2w0); + + T0 = sqrt(1.0 + pParam->BSIM4v2lpe0 / pParam->BSIM4v2leff); + T5 = pParam->BSIM4v2k1ox * (T0 - 1.0) * pParam->BSIM4v2sqrtPhi + + (pParam->BSIM4v2kt1 + pParam->BSIM4v2kt1l / pParam->BSIM4v2leff) + * (TRatio - 1.0); + + tmp3 = model->BSIM4v2type * pParam->BSIM4v2vth0 + - T8 - T9 + pParam->BSIM4v2k3 * T4 + T5; + pParam->BSIM4v2vfbzb = tmp3 - pParam->BSIM4v2phi - pParam->BSIM4v2k1 + * pParam->BSIM4v2sqrtPhi; /* End of vfbzb */ + } /* End of SizeNotFound */ + + here->BSIM4v2cgso = pParam->BSIM4v2cgso; + here->BSIM4v2cgdo = pParam->BSIM4v2cgdo; + + if (here->BSIM4v2rbodyMod) + { if (here->BSIM4v2rbdb < 1.0e-3) + here->BSIM4v2grbdb = 1.0e3; /* in mho */ + else + here->BSIM4v2grbdb = model->BSIM4v2gbmin + 1.0 / here->BSIM4v2rbdb; + if (here->BSIM4v2rbpb < 1.0e-3) + here->BSIM4v2grbpb = 1.0e3; + else + here->BSIM4v2grbpb = model->BSIM4v2gbmin + 1.0 / here->BSIM4v2rbpb; + if (here->BSIM4v2rbps < 1.0e-3) + here->BSIM4v2grbps = 1.0e3; + else + here->BSIM4v2grbps = model->BSIM4v2gbmin + 1.0 / here->BSIM4v2rbps; + if (here->BSIM4v2rbsb < 1.0e-3) + here->BSIM4v2grbsb = 1.0e3; + else + here->BSIM4v2grbsb = model->BSIM4v2gbmin + 1.0 / here->BSIM4v2rbsb; + if (here->BSIM4v2rbpd < 1.0e-3) + here->BSIM4v2grbpd = 1.0e3; + else + here->BSIM4v2grbpd = model->BSIM4v2gbmin + 1.0 / here->BSIM4v2rbpd; + } + + + /* + * Process geomertry dependent parasitics + */ + + here->BSIM4v2grgeltd = model->BSIM4v2rshg * (model->BSIM4v2xgw + + pParam->BSIM4v2weffCJ / 3.0 / model->BSIM4v2ngcon) / + (model->BSIM4v2ngcon * here->BSIM4v2nf * + (Lnew - model->BSIM4v2xgl)); + if (here->BSIM4v2grgeltd > 0.0) + here->BSIM4v2grgeltd = 1.0 / here->BSIM4v2grgeltd; + else + { here->BSIM4v2grgeltd = 1.0e3; /* mho */ + if (here->BSIM4v2rgateMod != 0) + printf("Warning: The gate conductance reset to 1.0e3 mho.\n"); + } + + DMCGeff = model->BSIM4v2dmcg - model->BSIM4v2dmcgt; + DMCIeff = model->BSIM4v2dmci; + DMDGeff = model->BSIM4v2dmdg - model->BSIM4v2dmcgt; + + if (here->BSIM4v2sourcePerimeterGiven) + { if (model->BSIM4v2perMod == 0) + here->BSIM4v2Pseff = here->BSIM4v2sourcePerimeter; + else + here->BSIM4v2Pseff = here->BSIM4v2sourcePerimeter + - pParam->BSIM4v2weffCJ * here->BSIM4v2nf; + } + else + BSIM4v2PAeffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, here->BSIM4v2min, + pParam->BSIM4v2weffCJ, DMCGeff, DMCIeff, DMDGeff, + &(here->BSIM4v2Pseff), &dumPd, &dumAs, &dumAd); + + if (here->BSIM4v2drainPerimeterGiven) + { if (model->BSIM4v2perMod == 0) + here->BSIM4v2Pdeff = here->BSIM4v2drainPerimeter; + else + here->BSIM4v2Pdeff = here->BSIM4v2drainPerimeter + - pParam->BSIM4v2weffCJ * here->BSIM4v2nf; + } + else + BSIM4v2PAeffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, here->BSIM4v2min, + pParam->BSIM4v2weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &(here->BSIM4v2Pdeff), &dumAs, &dumAd); + + if (here->BSIM4v2sourceAreaGiven) + here->BSIM4v2Aseff = here->BSIM4v2sourceArea; + else + BSIM4v2PAeffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, here->BSIM4v2min, + pParam->BSIM4v2weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &dumPd, &(here->BSIM4v2Aseff), &dumAd); + + if (here->BSIM4v2drainAreaGiven) + here->BSIM4v2Adeff = here->BSIM4v2drainArea; + else + BSIM4v2PAeffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, here->BSIM4v2min, + pParam->BSIM4v2weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &dumPd, &dumAs, &(here->BSIM4v2Adeff)); + + /* Processing S/D resistance and conductance below */ + if(here->BSIM4v2sNodePrime != here->BSIM4v2sNode) + { + here->BSIM4v2sourceConductance = 0.0; + if(here->BSIM4v2sourceSquaresGiven) + { + here->BSIM4v2sourceConductance = model->BSIM4v2sheetResistance + * here->BSIM4v2sourceSquares; + } else if (here->BSIM4v2rgeoMod > 0) + { + BSIM4v2RdseffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, + here->BSIM4v2rgeoMod, here->BSIM4v2min, + pParam->BSIM4v2weffCJ, model->BSIM4v2sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 1, &(here->BSIM4v2sourceConductance)); + } else + { + here->BSIM4v2sourceConductance = 0.0; + } + + if (here->BSIM4v2sourceConductance > 0.0) + here->BSIM4v2sourceConductance = 1.0 + / here->BSIM4v2sourceConductance; + else + { + here->BSIM4v2sourceConductance = 1.0e3; /* mho */ + printf ("Warning: Source conductance reset to 1.0e3 mho.\n"); + } + } else + { + here->BSIM4v2sourceConductance = 0.0; + } + + if(here->BSIM4v2dNodePrime != here->BSIM4v2dNode) + { + here->BSIM4v2drainConductance = 0.0; + if(here->BSIM4v2drainSquaresGiven) + { + here->BSIM4v2drainConductance = model->BSIM4v2sheetResistance + * here->BSIM4v2drainSquares; + } else if (here->BSIM4v2rgeoMod > 0) + { + BSIM4v2RdseffGeo(here->BSIM4v2nf, here->BSIM4v2geoMod, + here->BSIM4v2rgeoMod, here->BSIM4v2min, + pParam->BSIM4v2weffCJ, model->BSIM4v2sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 0, &(here->BSIM4v2drainConductance)); + } else + { + here->BSIM4v2drainConductance = 0.0; + } + + if (here->BSIM4v2drainConductance > 0.0) + here->BSIM4v2drainConductance = 1.0 + / here->BSIM4v2drainConductance; + else + { + here->BSIM4v2drainConductance = 1.0e3; /* mho */ + printf ("Warning: Drain conductance reset to 1.0e3 mho.\n"); + } + } else + { + here->BSIM4v2drainConductance = 0.0; + } + + /* End of Rsd processing */ + + + Nvtms = model->BSIM4v2vtm * model->BSIM4v2SjctEmissionCoeff; + if ((here->BSIM4v2Aseff <= 0.0) && (here->BSIM4v2Pseff <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM4v2Aseff * model->BSIM4v2SjctTempSatCurDensity + + here->BSIM4v2Pseff * model->BSIM4v2SjctSidewallTempSatCurDensity + + pParam->BSIM4v2weffCJ * here->BSIM4v2nf + * model->BSIM4v2SjctGateSidewallTempSatCurDensity; + } + if (SourceSatCurrent > 0.0) + { switch(model->BSIM4v2dioMod) + { case 0: + if ((model->BSIM4v2bvs / Nvtms) > EXP_THRESHOLD) + here->BSIM4v2XExpBVS = model->BSIM4v2xjbvs * MIN_EXP; + else + here->BSIM4v2XExpBVS = model->BSIM4v2xjbvs * exp(-model->BSIM4v2bvs / Nvtms); + break; + case 1: + BSIM4v2DioIjthVjmEval(Nvtms, model->BSIM4v2ijthsfwd, SourceSatCurrent, + 0.0, &(here->BSIM4v2vjsmFwd)); + here->BSIM4v2IVjsmFwd = SourceSatCurrent * exp(here->BSIM4v2vjsmFwd / Nvtms); + break; + case 2: + if ((model->BSIM4v2bvs / Nvtms) > EXP_THRESHOLD) + { here->BSIM4v2XExpBVS = model->BSIM4v2xjbvs * MIN_EXP; + tmp = MIN_EXP; + } + else + { here->BSIM4v2XExpBVS = exp(-model->BSIM4v2bvs / Nvtms); + tmp = here->BSIM4v2XExpBVS; + here->BSIM4v2XExpBVS *= model->BSIM4v2xjbvs; + } + + BSIM4v2DioIjthVjmEval(Nvtms, model->BSIM4v2ijthsfwd, SourceSatCurrent, + here->BSIM4v2XExpBVS, &(here->BSIM4v2vjsmFwd)); + T0 = exp(here->BSIM4v2vjsmFwd / Nvtms); + here->BSIM4v2IVjsmFwd = SourceSatCurrent * (T0 - here->BSIM4v2XExpBVS / T0 + + here->BSIM4v2XExpBVS - 1.0); + here->BSIM4v2SslpFwd = SourceSatCurrent + * (T0 + here->BSIM4v2XExpBVS / T0) / Nvtms; + + T2 = model->BSIM4v2ijthsrev / SourceSatCurrent; + if (T2 < 1.0) + { T2 = 10.0; + fprintf(stderr, "Warning: ijthsrev too small and set to 10 times IsbSat.\n"); + } + here->BSIM4v2vjsmRev = -model->BSIM4v2bvs + - Nvtms * log((T2 - 1.0) / model->BSIM4v2xjbvs); + T1 = model->BSIM4v2xjbvs * exp(-(model->BSIM4v2bvs + + here->BSIM4v2vjsmRev) / Nvtms); + here->BSIM4v2IVjsmRev = SourceSatCurrent * (1.0 + T1); + here->BSIM4v2SslpRev = -SourceSatCurrent * T1 / Nvtms; + break; + default: + printf("Specified dioMod = %d not matched\n", model->BSIM4v2dioMod); + } + } + + Nvtmd = model->BSIM4v2vtm * model->BSIM4v2DjctEmissionCoeff; + if ((here->BSIM4v2Adeff <= 0.0) && (here->BSIM4v2Pdeff <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM4v2Adeff * model->BSIM4v2DjctTempSatCurDensity + + here->BSIM4v2Pdeff * model->BSIM4v2DjctSidewallTempSatCurDensity + + pParam->BSIM4v2weffCJ * here->BSIM4v2nf + * model->BSIM4v2DjctGateSidewallTempSatCurDensity; + } + if (DrainSatCurrent > 0.0) + { switch(model->BSIM4v2dioMod) + { case 0: + if ((model->BSIM4v2bvd / Nvtmd) > EXP_THRESHOLD) + here->BSIM4v2XExpBVD = model->BSIM4v2xjbvd * MIN_EXP; + else + here->BSIM4v2XExpBVD = model->BSIM4v2xjbvd * exp(-model->BSIM4v2bvd / Nvtmd); + break; + case 1: + BSIM4v2DioIjthVjmEval(Nvtmd, model->BSIM4v2ijthdfwd, DrainSatCurrent, + 0.0, &(here->BSIM4v2vjdmFwd)); + here->BSIM4v2IVjdmFwd = DrainSatCurrent * exp(here->BSIM4v2vjdmFwd / Nvtmd); + break; + case 2: + if ((model->BSIM4v2bvd / Nvtmd) > EXP_THRESHOLD) + { here->BSIM4v2XExpBVD = model->BSIM4v2xjbvd * MIN_EXP; + tmp = MIN_EXP; + } + else + { here->BSIM4v2XExpBVD = exp(-model->BSIM4v2bvd / Nvtmd); + tmp = here->BSIM4v2XExpBVD; + here->BSIM4v2XExpBVD *= model->BSIM4v2xjbvd; + } + + BSIM4v2DioIjthVjmEval(Nvtmd, model->BSIM4v2ijthdfwd, DrainSatCurrent, + here->BSIM4v2XExpBVD, &(here->BSIM4v2vjdmFwd)); + T0 = exp(here->BSIM4v2vjdmFwd / Nvtmd); + here->BSIM4v2IVjdmFwd = DrainSatCurrent * (T0 - here->BSIM4v2XExpBVD / T0 + + here->BSIM4v2XExpBVD - 1.0); + here->BSIM4v2DslpFwd = DrainSatCurrent + * (T0 + here->BSIM4v2XExpBVD / T0) / Nvtmd; + + T2 = model->BSIM4v2ijthdrev / DrainSatCurrent; + if (T2 < 1.0) + { T2 = 10.0; + fprintf(stderr, "Warning: ijthdrev too small and set to 10 times IdbSat.\n"); + } + here->BSIM4v2vjdmRev = -model->BSIM4v2bvd + - Nvtms * log((T2 - 1.0) / model->BSIM4v2xjbvd); + T1 = model->BSIM4v2xjbvd * exp(-(model->BSIM4v2bvd + + here->BSIM4v2vjdmRev) / Nvtmd); + here->BSIM4v2IVjdmRev = DrainSatCurrent * (1.0 + T1); + here->BSIM4v2DslpRev = -DrainSatCurrent * T1 / Nvtmd; + break; + default: + printf("Specified dioMod = %d not matched\n", model->BSIM4v2dioMod); + } + } + + if (BSIM4v2checkModel(model, here, ckt)) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v2modName; + namarray[1] = here->BSIM4v2name; + (*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM4v2.2.1 parameter checking for %s in model %s", namarray); + return(E_BADPARM); + } + } /* End instance */ + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/b4v2trunc.c b/src/spicelib/devices/bsim4v2/b4v2trunc.c new file mode 100644 index 000000000..a3f713a80 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/b4v2trunc.c @@ -0,0 +1,60 @@ +/**** BSIM4.2.1, Released by Xuemei Xi 10/05/2001 ****/ + +/********** + * Copyright 2001 Regents of the University of California. All rights reserved. + * File: b4trunc.c of BSIM4.2.1. + * Author: 2000 Weidong Liu + * Authors: Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v2def.h" +#include "sperror.h" + + +int +BSIM4v2trunc(inModel,ckt,timeStep) +GENmodel *inModel; +CKTcircuit *ckt; +double *timeStep; +{ +BSIM4v2model *model = (BSIM4v2model*)inModel; +BSIM4v2instance *here; + +#ifdef STEPDEBUG + double debugtemp; +#endif /* STEPDEBUG */ + + for (; model != NULL; model = model->BSIM4v2nextModel) + { for (here = model->BSIM4v2instances; here != NULL; + here = here->BSIM4v2nextInstance) + { + if (here->BSIM4v2owner != ARCHme) continue; +#ifdef STEPDEBUG + debugtemp = *timeStep; +#endif /* STEPDEBUG */ + CKTterr(here->BSIM4v2qb,ckt,timeStep); + CKTterr(here->BSIM4v2qg,ckt,timeStep); + CKTterr(here->BSIM4v2qd,ckt,timeStep); + if (here->BSIM4v2trnqsMod) + CKTterr(here->BSIM4v2qcdump,ckt,timeStep); + if (here->BSIM4v2rbodyMod) + { CKTterr(here->BSIM4v2qbs,ckt,timeStep); + CKTterr(here->BSIM4v2qbd,ckt,timeStep); + } + if (here->BSIM4v2rgateMod == 3) + CKTterr(here->BSIM4v2qgmid,ckt,timeStep); +#ifdef STEPDEBUG + if(debugtemp != *timeStep) + { printf("device %s reduces step from %g to %g\n", + here->BSIM4v2name,debugtemp,*timeStep); + } +#endif /* STEPDEBUG */ + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v2/bsim4v2def.h b/src/spicelib/devices/bsim4v2/bsim4v2def.h new file mode 100644 index 000000000..19d69fdea --- /dev/null +++ b/src/spicelib/devices/bsim4v2/bsim4v2def.h @@ -0,0 +1,2663 @@ +/********** +Copyright 2001 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu. +Modified by Xuemei Xi October 2001 +File: bsim4def.h +**********/ + +#ifndef BSIM4V2 +#define BSIM4V2 + +#include "ifsim.h" +#include "gendefs.h" +#include "cktdefs.h" +#include "complex.h" +#include "noisedef.h" + +typedef struct sBSIM4v2instance +{ + struct sBSIM4v2model *BSIM4v2modPtr; + struct sBSIM4v2instance *BSIM4v2nextInstance; + IFuid BSIM4v2name; + int BSIM4v2owner; /* Number of owner process */ + int BSIM4v2states; /* index into state table for this device */ + int BSIM4v2dNode; + int BSIM4v2gNodeExt; + int BSIM4v2sNode; + int BSIM4v2bNode; + int BSIM4v2dNodePrime; + int BSIM4v2gNodePrime; + int BSIM4v2gNodeMid; + int BSIM4v2sNodePrime; + int BSIM4v2bNodePrime; + int BSIM4v2dbNode; + int BSIM4v2sbNode; + int BSIM4v2qNode; + + double BSIM4v2ueff; + double BSIM4v2thetavth; + double BSIM4v2von; + double BSIM4v2vdsat; + double BSIM4v2cgdo; + double BSIM4v2qgdo; + double BSIM4v2cgso; + double BSIM4v2qgso; + double BSIM4v2grbsb; + double BSIM4v2grbdb; + double BSIM4v2grbpb; + double BSIM4v2grbps; + double BSIM4v2grbpd; + + double BSIM4v2vjsmFwd; + double BSIM4v2vjsmRev; + double BSIM4v2vjdmFwd; + double BSIM4v2vjdmRev; + double BSIM4v2XExpBVS; + double BSIM4v2XExpBVD; + double BSIM4v2SslpFwd; + double BSIM4v2SslpRev; + double BSIM4v2DslpFwd; + double BSIM4v2DslpRev; + double BSIM4v2IVjsmFwd; + double BSIM4v2IVjsmRev; + double BSIM4v2IVjdmFwd; + double BSIM4v2IVjdmRev; + + double BSIM4v2grgeltd; + double BSIM4v2Pseff; + double BSIM4v2Pdeff; + double BSIM4v2Aseff; + double BSIM4v2Adeff; + + double BSIM4v2l; + double BSIM4v2w; + double BSIM4v2drainArea; + double BSIM4v2sourceArea; + double BSIM4v2drainSquares; + double BSIM4v2sourceSquares; + double BSIM4v2drainPerimeter; + double BSIM4v2sourcePerimeter; + double BSIM4v2sourceConductance; + double BSIM4v2drainConductance; + double BSIM4v2rbdb; + double BSIM4v2rbsb; + double BSIM4v2rbpb; + double BSIM4v2rbps; + double BSIM4v2rbpd; + + double BSIM4v2icVDS; + double BSIM4v2icVGS; + double BSIM4v2icVBS; + double BSIM4v2nf; + int BSIM4v2off; + int BSIM4v2mode; + int BSIM4v2trnqsMod; + int BSIM4v2acnqsMod; + int BSIM4v2rbodyMod; + int BSIM4v2rgateMod; + int BSIM4v2geoMod; + int BSIM4v2rgeoMod; + int BSIM4v2min; + + /* OP point */ + double BSIM4v2Vgsteff; + double BSIM4v2vgs_eff; + double BSIM4v2vgd_eff; + double BSIM4v2dvgs_eff_dvg; + double BSIM4v2dvgd_eff_dvg; + double BSIM4v2Vdseff; + double BSIM4v2nstar; + double BSIM4v2Abulk; + double BSIM4v2EsatL; + double BSIM4v2AbovVgst2Vtm; + double BSIM4v2qinv; + double BSIM4v2cd; + double BSIM4v2cbs; + double BSIM4v2cbd; + double BSIM4v2csub; + double BSIM4v2Igidl; + double BSIM4v2Igisl; + double BSIM4v2gm; + double BSIM4v2gds; + double BSIM4v2gmbs; + double BSIM4v2gbd; + double BSIM4v2gbs; + + double BSIM4v2gbbs; + double BSIM4v2gbgs; + double BSIM4v2gbds; + double BSIM4v2ggidld; + double BSIM4v2ggidlg; + double BSIM4v2ggidls; + double BSIM4v2ggidlb; + double BSIM4v2ggisld; + double BSIM4v2ggislg; + double BSIM4v2ggisls; + double BSIM4v2ggislb; + + double BSIM4v2Igcs; + double BSIM4v2gIgcsg; + double BSIM4v2gIgcsd; + double BSIM4v2gIgcss; + double BSIM4v2gIgcsb; + double BSIM4v2Igcd; + double BSIM4v2gIgcdg; + double BSIM4v2gIgcdd; + double BSIM4v2gIgcds; + double BSIM4v2gIgcdb; + + double BSIM4v2Igs; + double BSIM4v2gIgsg; + double BSIM4v2gIgss; + double BSIM4v2Igd; + double BSIM4v2gIgdg; + double BSIM4v2gIgdd; + + double BSIM4v2Igb; + double BSIM4v2gIgbg; + double BSIM4v2gIgbd; + double BSIM4v2gIgbs; + double BSIM4v2gIgbb; + + double BSIM4v2grdsw; + double BSIM4v2IdovVds; + double BSIM4v2gcrg; + double BSIM4v2gcrgd; + double BSIM4v2gcrgg; + double BSIM4v2gcrgs; + double BSIM4v2gcrgb; + + double BSIM4v2gstot; + double BSIM4v2gstotd; + double BSIM4v2gstotg; + double BSIM4v2gstots; + double BSIM4v2gstotb; + + double BSIM4v2gdtot; + double BSIM4v2gdtotd; + double BSIM4v2gdtotg; + double BSIM4v2gdtots; + double BSIM4v2gdtotb; + + double BSIM4v2cggb; + double BSIM4v2cgdb; + double BSIM4v2cgsb; + double BSIM4v2cbgb; + double BSIM4v2cbdb; + double BSIM4v2cbsb; + double BSIM4v2cdgb; + double BSIM4v2cddb; + double BSIM4v2cdsb; + double BSIM4v2csgb; + double BSIM4v2csdb; + double BSIM4v2cssb; + double BSIM4v2cgbb; + double BSIM4v2cdbb; + double BSIM4v2csbb; + double BSIM4v2cbbb; + double BSIM4v2capbd; + double BSIM4v2capbs; + + double BSIM4v2cqgb; + double BSIM4v2cqdb; + double BSIM4v2cqsb; + double BSIM4v2cqbb; + + double BSIM4v2qgate; + double BSIM4v2qbulk; + double BSIM4v2qdrn; + double BSIM4v2qsrc; + + double BSIM4v2qchqs; + double BSIM4v2taunet; + double BSIM4v2gtau; + double BSIM4v2gtg; + double BSIM4v2gtd; + double BSIM4v2gts; + double BSIM4v2gtb; + + struct bsim4SizeDependParam *pParam; + + unsigned BSIM4v2lGiven :1; + unsigned BSIM4v2wGiven :1; + unsigned BSIM4v2nfGiven :1; + unsigned BSIM4v2minGiven :1; + unsigned BSIM4v2drainAreaGiven :1; + unsigned BSIM4v2sourceAreaGiven :1; + unsigned BSIM4v2drainSquaresGiven :1; + unsigned BSIM4v2sourceSquaresGiven :1; + unsigned BSIM4v2drainPerimeterGiven :1; + unsigned BSIM4v2sourcePerimeterGiven :1; + unsigned BSIM4v2rbdbGiven :1; + unsigned BSIM4v2rbsbGiven :1; + unsigned BSIM4v2rbpbGiven :1; + unsigned BSIM4v2rbpdGiven :1; + unsigned BSIM4v2rbpsGiven :1; + unsigned BSIM4v2icVDSGiven :1; + unsigned BSIM4v2icVGSGiven :1; + unsigned BSIM4v2icVBSGiven :1; + unsigned BSIM4v2trnqsModGiven :1; + unsigned BSIM4v2acnqsModGiven :1; + unsigned BSIM4v2rbodyModGiven :1; + unsigned BSIM4v2rgateModGiven :1; + unsigned BSIM4v2geoModGiven :1; + unsigned BSIM4v2rgeoModGiven :1; + + double *BSIM4v2DPdPtr; + double *BSIM4v2DPdpPtr; + double *BSIM4v2DPgpPtr; + double *BSIM4v2DPgmPtr; + double *BSIM4v2DPspPtr; + double *BSIM4v2DPbpPtr; + double *BSIM4v2DPdbPtr; + + double *BSIM4v2DdPtr; + double *BSIM4v2DdpPtr; + + double *BSIM4v2GPdpPtr; + double *BSIM4v2GPgpPtr; + double *BSIM4v2GPgmPtr; + double *BSIM4v2GPgePtr; + double *BSIM4v2GPspPtr; + double *BSIM4v2GPbpPtr; + + double *BSIM4v2GMdpPtr; + double *BSIM4v2GMgpPtr; + double *BSIM4v2GMgmPtr; + double *BSIM4v2GMgePtr; + double *BSIM4v2GMspPtr; + double *BSIM4v2GMbpPtr; + + double *BSIM4v2GEdpPtr; + double *BSIM4v2GEgpPtr; + double *BSIM4v2GEgmPtr; + double *BSIM4v2GEgePtr; + double *BSIM4v2GEspPtr; + double *BSIM4v2GEbpPtr; + + double *BSIM4v2SPdpPtr; + double *BSIM4v2SPgpPtr; + double *BSIM4v2SPgmPtr; + double *BSIM4v2SPsPtr; + double *BSIM4v2SPspPtr; + double *BSIM4v2SPbpPtr; + double *BSIM4v2SPsbPtr; + + double *BSIM4v2SspPtr; + double *BSIM4v2SsPtr; + + double *BSIM4v2BPdpPtr; + double *BSIM4v2BPgpPtr; + double *BSIM4v2BPgmPtr; + double *BSIM4v2BPspPtr; + double *BSIM4v2BPdbPtr; + double *BSIM4v2BPbPtr; + double *BSIM4v2BPsbPtr; + double *BSIM4v2BPbpPtr; + + double *BSIM4v2DBdpPtr; + double *BSIM4v2DBdbPtr; + double *BSIM4v2DBbpPtr; + double *BSIM4v2DBbPtr; + + double *BSIM4v2SBspPtr; + double *BSIM4v2SBbpPtr; + double *BSIM4v2SBbPtr; + double *BSIM4v2SBsbPtr; + + double *BSIM4v2BdbPtr; + double *BSIM4v2BbpPtr; + double *BSIM4v2BsbPtr; + double *BSIM4v2BbPtr; + + double *BSIM4v2DgpPtr; + double *BSIM4v2DspPtr; + double *BSIM4v2DbpPtr; + double *BSIM4v2SdpPtr; + double *BSIM4v2SgpPtr; + double *BSIM4v2SbpPtr; + + double *BSIM4v2QdpPtr; + double *BSIM4v2QgpPtr; + double *BSIM4v2QspPtr; + double *BSIM4v2QbpPtr; + double *BSIM4v2QqPtr; + double *BSIM4v2DPqPtr; + double *BSIM4v2GPqPtr; + double *BSIM4v2SPqPtr; + + +#define BSIM4v2vbd BSIM4v2states+ 0 +#define BSIM4v2vbs BSIM4v2states+ 1 +#define BSIM4v2vgs BSIM4v2states+ 2 +#define BSIM4v2vds BSIM4v2states+ 3 +#define BSIM4v2vdbs BSIM4v2states+ 4 +#define BSIM4v2vdbd BSIM4v2states+ 5 +#define BSIM4v2vsbs BSIM4v2states+ 6 +#define BSIM4v2vges BSIM4v2states+ 7 +#define BSIM4v2vgms BSIM4v2states+ 8 +#define BSIM4v2vses BSIM4v2states+ 9 +#define BSIM4v2vdes BSIM4v2states+ 10 + +#define BSIM4v2qb BSIM4v2states+ 11 +#define BSIM4v2cqb BSIM4v2states+ 12 +#define BSIM4v2qg BSIM4v2states+ 13 +#define BSIM4v2cqg BSIM4v2states+ 14 +#define BSIM4v2qd BSIM4v2states+ 15 +#define BSIM4v2cqd BSIM4v2states+ 16 +#define BSIM4v2qgmid BSIM4v2states+ 17 +#define BSIM4v2cqgmid BSIM4v2states+ 18 + +#define BSIM4v2qbs BSIM4v2states+ 19 +#define BSIM4v2cqbs BSIM4v2states+ 20 +#define BSIM4v2qbd BSIM4v2states+ 21 +#define BSIM4v2cqbd BSIM4v2states+ 22 + +#define BSIM4v2qcheq BSIM4v2states+ 23 +#define BSIM4v2cqcheq BSIM4v2states+ 24 +#define BSIM4v2qcdump BSIM4v2states+ 25 +#define BSIM4v2cqcdump BSIM4v2states+ 26 +#define BSIM4v2qdef BSIM4v2states+ 27 +#define BSIM4v2qs BSIM4v2states+ 28 + +#define BSIM4v2numStates 29 + + +/* indices to the array of BSIM4v2 NOISE SOURCES */ + +#define BSIM4v2RDNOIZ 0 +#define BSIM4v2RSNOIZ 1 +#define BSIM4v2RGNOIZ 2 +#define BSIM4v2RBPSNOIZ 3 +#define BSIM4v2RBPDNOIZ 4 +#define BSIM4v2RBPBNOIZ 5 +#define BSIM4v2RBSBNOIZ 6 +#define BSIM4v2RBDBNOIZ 7 +#define BSIM4v2IDNOIZ 8 +#define BSIM4v2FLNOIZ 9 +#define BSIM4v2IGSNOIZ 10 +#define BSIM4v2IGDNOIZ 11 +#define BSIM4v2IGBNOIZ 12 +#define BSIM4v2TOTNOIZ 13 + +#define BSIM4v2NSRCS 14 /* Number of BSIM4v2 noise sources */ + +#ifndef NONOISE + double BSIM4v2nVar[NSTATVARS][BSIM4v2NSRCS]; +#else /* NONOISE */ + double **BSIM4v2nVar; +#endif /* NONOISE */ + +} BSIM4v2instance ; + +struct bsim4SizeDependParam +{ + double Width; + double Length; + double NFinger; + + double BSIM4v2cdsc; + double BSIM4v2cdscb; + double BSIM4v2cdscd; + double BSIM4v2cit; + double BSIM4v2nfactor; + double BSIM4v2xj; + double BSIM4v2vsat; + double BSIM4v2at; + double BSIM4v2a0; + double BSIM4v2ags; + double BSIM4v2a1; + double BSIM4v2a2; + double BSIM4v2keta; + double BSIM4v2nsub; + double BSIM4v2ndep; + double BSIM4v2nsd; + double BSIM4v2phin; + double BSIM4v2ngate; + double BSIM4v2gamma1; + double BSIM4v2gamma2; + double BSIM4v2vbx; + double BSIM4v2vbi; + double BSIM4v2vbm; + double BSIM4v2vbsc; + double BSIM4v2xt; + double BSIM4v2phi; + double BSIM4v2litl; + double BSIM4v2k1; + double BSIM4v2kt1; + double BSIM4v2kt1l; + double BSIM4v2kt2; + double BSIM4v2k2; + double BSIM4v2k3; + double BSIM4v2k3b; + double BSIM4v2w0; + double BSIM4v2dvtp0; + double BSIM4v2dvtp1; + double BSIM4v2lpe0; + double BSIM4v2lpeb; + double BSIM4v2dvt0; + double BSIM4v2dvt1; + double BSIM4v2dvt2; + double BSIM4v2dvt0w; + double BSIM4v2dvt1w; + double BSIM4v2dvt2w; + double BSIM4v2drout; + double BSIM4v2dsub; + double BSIM4v2vth0; + double BSIM4v2ua; + double BSIM4v2ua1; + double BSIM4v2ub; + double BSIM4v2ub1; + double BSIM4v2uc; + double BSIM4v2uc1; + double BSIM4v2u0; + double BSIM4v2eu; + double BSIM4v2ute; + double BSIM4v2voff; + double BSIM4v2minv; + double BSIM4v2vfb; + double BSIM4v2delta; + double BSIM4v2rdsw; + double BSIM4v2rds0; + double BSIM4v2rs0; + double BSIM4v2rd0; + double BSIM4v2rsw; + double BSIM4v2rdw; + double BSIM4v2prwg; + double BSIM4v2prwb; + double BSIM4v2prt; + double BSIM4v2eta0; + double BSIM4v2etab; + double BSIM4v2pclm; + double BSIM4v2pdibl1; + double BSIM4v2pdibl2; + double BSIM4v2pdiblb; + double BSIM4v2fprout; + double BSIM4v2pdits; + double BSIM4v2pditsd; + double BSIM4v2pscbe1; + double BSIM4v2pscbe2; + double BSIM4v2pvag; + double BSIM4v2wr; + double BSIM4v2dwg; + double BSIM4v2dwb; + double BSIM4v2b0; + double BSIM4v2b1; + double BSIM4v2alpha0; + double BSIM4v2alpha1; + double BSIM4v2beta0; + double BSIM4v2agidl; + double BSIM4v2bgidl; + double BSIM4v2cgidl; + double BSIM4v2egidl; + double BSIM4v2aigc; + double BSIM4v2bigc; + double BSIM4v2cigc; + double BSIM4v2aigsd; + double BSIM4v2bigsd; + double BSIM4v2cigsd; + double BSIM4v2aigbacc; + double BSIM4v2bigbacc; + double BSIM4v2cigbacc; + double BSIM4v2aigbinv; + double BSIM4v2bigbinv; + double BSIM4v2cigbinv; + double BSIM4v2nigc; + double BSIM4v2nigbacc; + double BSIM4v2nigbinv; + double BSIM4v2ntox; + double BSIM4v2eigbinv; + double BSIM4v2pigcd; + double BSIM4v2poxedge; + double BSIM4v2xrcrg1; + double BSIM4v2xrcrg2; + double BSIM4v2fpkt; + double BSIM4v2plcr; + double BSIM4v2plcrl; + double BSIM4v2plcrd; + + + /* CV model */ + double BSIM4v2cgsl; + double BSIM4v2cgdl; + double BSIM4v2ckappas; + double BSIM4v2ckappad; + double BSIM4v2cf; + double BSIM4v2clc; + double BSIM4v2cle; + double BSIM4v2vfbcv; + double BSIM4v2noff; + double BSIM4v2voffcv; + double BSIM4v2acde; + double BSIM4v2moin; + +/* Pre-calculated constants */ + + double BSIM4v2dw; + double BSIM4v2dl; + double BSIM4v2leff; + double BSIM4v2weff; + + double BSIM4v2dwc; + double BSIM4v2dlc; + double BSIM4v2dlcig; + double BSIM4v2dwj; + double BSIM4v2leffCV; + double BSIM4v2weffCV; + double BSIM4v2weffCJ; + double BSIM4v2abulkCVfactor; + double BSIM4v2cgso; + double BSIM4v2cgdo; + double BSIM4v2cgbo; + + double BSIM4v2u0temp; + double BSIM4v2vsattemp; + double BSIM4v2sqrtPhi; + double BSIM4v2phis3; + double BSIM4v2Xdep0; + double BSIM4v2sqrtXdep0; + double BSIM4v2theta0vb0; + double BSIM4v2thetaRout; + double BSIM4v2mstar; + double BSIM4v2voffcbn; + double BSIM4v2rdswmin; + double BSIM4v2rdwmin; + double BSIM4v2rswmin; + double BSIM4v2vfbsd; + + double BSIM4v2cof1; + double BSIM4v2cof2; + double BSIM4v2cof3; + double BSIM4v2cof4; + double BSIM4v2cdep0; + double BSIM4v2vfbzb; + double BSIM4v2vtfbphi1; + double BSIM4v2vtfbphi2; + double BSIM4v2ToxRatio; + double BSIM4v2Aechvb; + double BSIM4v2Bechvb; + double BSIM4v2ToxRatioEdge; + double BSIM4v2AechvbEdge; + double BSIM4v2BechvbEdge; + double BSIM4v2ldeb; + double BSIM4v2k1ox; + double BSIM4v2k2ox; + + struct bsim4SizeDependParam *pNext; +}; + + +typedef struct sBSIM4v2model +{ + int BSIM4v2modType; + struct sBSIM4v2model *BSIM4v2nextModel; + BSIM4v2instance *BSIM4v2instances; + IFuid BSIM4v2modName; + int BSIM4v2type; + + int BSIM4v2mobMod; + int BSIM4v2capMod; + int BSIM4v2dioMod; + int BSIM4v2trnqsMod; + int BSIM4v2acnqsMod; + int BSIM4v2fnoiMod; + int BSIM4v2tnoiMod; + int BSIM4v2rdsMod; + int BSIM4v2rbodyMod; + int BSIM4v2rgateMod; + int BSIM4v2perMod; + int BSIM4v2geoMod; + int BSIM4v2igcMod; + int BSIM4v2igbMod; + int BSIM4v2binUnit; + int BSIM4v2paramChk; + char *BSIM4v2version; + double BSIM4v2toxe; + double BSIM4v2toxp; + double BSIM4v2toxm; + double BSIM4v2dtox; + double BSIM4v2epsrox; + double BSIM4v2cdsc; + double BSIM4v2cdscb; + double BSIM4v2cdscd; + double BSIM4v2cit; + double BSIM4v2nfactor; + double BSIM4v2xj; + double BSIM4v2vsat; + double BSIM4v2at; + double BSIM4v2a0; + double BSIM4v2ags; + double BSIM4v2a1; + double BSIM4v2a2; + double BSIM4v2keta; + double BSIM4v2nsub; + double BSIM4v2ndep; + double BSIM4v2nsd; + double BSIM4v2phin; + double BSIM4v2ngate; + double BSIM4v2gamma1; + double BSIM4v2gamma2; + double BSIM4v2vbx; + double BSIM4v2vbm; + double BSIM4v2xt; + double BSIM4v2k1; + double BSIM4v2kt1; + double BSIM4v2kt1l; + double BSIM4v2kt2; + double BSIM4v2k2; + double BSIM4v2k3; + double BSIM4v2k3b; + double BSIM4v2w0; + double BSIM4v2dvtp0; + double BSIM4v2dvtp1; + double BSIM4v2lpe0; + double BSIM4v2lpeb; + double BSIM4v2dvt0; + double BSIM4v2dvt1; + double BSIM4v2dvt2; + double BSIM4v2dvt0w; + double BSIM4v2dvt1w; + double BSIM4v2dvt2w; + double BSIM4v2drout; + double BSIM4v2dsub; + double BSIM4v2vth0; + double BSIM4v2eu; + double BSIM4v2ua; + double BSIM4v2ua1; + double BSIM4v2ub; + double BSIM4v2ub1; + double BSIM4v2uc; + double BSIM4v2uc1; + double BSIM4v2u0; + double BSIM4v2ute; + double BSIM4v2voff; + double BSIM4v2minv; + double BSIM4v2voffl; + double BSIM4v2delta; + double BSIM4v2rdsw; + double BSIM4v2rdswmin; + double BSIM4v2rdwmin; + double BSIM4v2rswmin; + double BSIM4v2rsw; + double BSIM4v2rdw; + double BSIM4v2prwg; + double BSIM4v2prwb; + double BSIM4v2prt; + double BSIM4v2eta0; + double BSIM4v2etab; + double BSIM4v2pclm; + double BSIM4v2pdibl1; + double BSIM4v2pdibl2; + double BSIM4v2pdiblb; + double BSIM4v2fprout; + double BSIM4v2pdits; + double BSIM4v2pditsd; + double BSIM4v2pditsl; + double BSIM4v2pscbe1; + double BSIM4v2pscbe2; + double BSIM4v2pvag; + double BSIM4v2wr; + double BSIM4v2dwg; + double BSIM4v2dwb; + double BSIM4v2b0; + double BSIM4v2b1; + double BSIM4v2alpha0; + double BSIM4v2alpha1; + double BSIM4v2beta0; + double BSIM4v2agidl; + double BSIM4v2bgidl; + double BSIM4v2cgidl; + double BSIM4v2egidl; + double BSIM4v2aigc; + double BSIM4v2bigc; + double BSIM4v2cigc; + double BSIM4v2aigsd; + double BSIM4v2bigsd; + double BSIM4v2cigsd; + double BSIM4v2aigbacc; + double BSIM4v2bigbacc; + double BSIM4v2cigbacc; + double BSIM4v2aigbinv; + double BSIM4v2bigbinv; + double BSIM4v2cigbinv; + double BSIM4v2nigc; + double BSIM4v2nigbacc; + double BSIM4v2nigbinv; + double BSIM4v2ntox; + double BSIM4v2eigbinv; + double BSIM4v2pigcd; + double BSIM4v2poxedge; + double BSIM4v2toxref; + double BSIM4v2ijthdfwd; + double BSIM4v2ijthsfwd; + double BSIM4v2ijthdrev; + double BSIM4v2ijthsrev; + double BSIM4v2xjbvd; + double BSIM4v2xjbvs; + double BSIM4v2bvd; + double BSIM4v2bvs; + double BSIM4v2xrcrg1; + double BSIM4v2xrcrg2; + + double BSIM4v2vfb; + double BSIM4v2gbmin; + double BSIM4v2rbdb; + double BSIM4v2rbsb; + double BSIM4v2rbpb; + double BSIM4v2rbps; + double BSIM4v2rbpd; + double BSIM4v2tnoia; + double BSIM4v2tnoib; + double BSIM4v2ntnoi; + + /* CV model and Parasitics */ + double BSIM4v2cgsl; + double BSIM4v2cgdl; + double BSIM4v2ckappas; + double BSIM4v2ckappad; + double BSIM4v2cf; + double BSIM4v2vfbcv; + double BSIM4v2clc; + double BSIM4v2cle; + double BSIM4v2dwc; + double BSIM4v2dlc; + double BSIM4v2xw; + double BSIM4v2xl; + double BSIM4v2dlcig; + double BSIM4v2dwj; + double BSIM4v2noff; + double BSIM4v2voffcv; + double BSIM4v2acde; + double BSIM4v2moin; + double BSIM4v2tcj; + double BSIM4v2tcjsw; + double BSIM4v2tcjswg; + double BSIM4v2tpb; + double BSIM4v2tpbsw; + double BSIM4v2tpbswg; + double BSIM4v2dmcg; + double BSIM4v2dmci; + double BSIM4v2dmdg; + double BSIM4v2dmcgt; + double BSIM4v2xgw; + double BSIM4v2xgl; + double BSIM4v2rshg; + double BSIM4v2ngcon; + + /* Length Dependence */ + double BSIM4v2lcdsc; + double BSIM4v2lcdscb; + double BSIM4v2lcdscd; + double BSIM4v2lcit; + double BSIM4v2lnfactor; + double BSIM4v2lxj; + double BSIM4v2lvsat; + double BSIM4v2lat; + double BSIM4v2la0; + double BSIM4v2lags; + double BSIM4v2la1; + double BSIM4v2la2; + double BSIM4v2lketa; + double BSIM4v2lnsub; + double BSIM4v2lndep; + double BSIM4v2lnsd; + double BSIM4v2lphin; + double BSIM4v2lngate; + double BSIM4v2lgamma1; + double BSIM4v2lgamma2; + double BSIM4v2lvbx; + double BSIM4v2lvbm; + double BSIM4v2lxt; + double BSIM4v2lk1; + double BSIM4v2lkt1; + double BSIM4v2lkt1l; + double BSIM4v2lkt2; + double BSIM4v2lk2; + double BSIM4v2lk3; + double BSIM4v2lk3b; + double BSIM4v2lw0; + double BSIM4v2ldvtp0; + double BSIM4v2ldvtp1; + double BSIM4v2llpe0; + double BSIM4v2llpeb; + double BSIM4v2ldvt0; + double BSIM4v2ldvt1; + double BSIM4v2ldvt2; + double BSIM4v2ldvt0w; + double BSIM4v2ldvt1w; + double BSIM4v2ldvt2w; + double BSIM4v2ldrout; + double BSIM4v2ldsub; + double BSIM4v2lvth0; + double BSIM4v2lua; + double BSIM4v2lua1; + double BSIM4v2lub; + double BSIM4v2lub1; + double BSIM4v2luc; + double BSIM4v2luc1; + double BSIM4v2lu0; + double BSIM4v2leu; + double BSIM4v2lute; + double BSIM4v2lvoff; + double BSIM4v2lminv; + double BSIM4v2ldelta; + double BSIM4v2lrdsw; + double BSIM4v2lrsw; + double BSIM4v2lrdw; + double BSIM4v2lprwg; + double BSIM4v2lprwb; + double BSIM4v2lprt; + double BSIM4v2leta0; + double BSIM4v2letab; + double BSIM4v2lpclm; + double BSIM4v2lpdibl1; + double BSIM4v2lpdibl2; + double BSIM4v2lpdiblb; + double BSIM4v2lfprout; + double BSIM4v2lpdits; + double BSIM4v2lpditsd; + double BSIM4v2lpscbe1; + double BSIM4v2lpscbe2; + double BSIM4v2lpvag; + double BSIM4v2lwr; + double BSIM4v2ldwg; + double BSIM4v2ldwb; + double BSIM4v2lb0; + double BSIM4v2lb1; + double BSIM4v2lalpha0; + double BSIM4v2lalpha1; + double BSIM4v2lbeta0; + double BSIM4v2lvfb; + double BSIM4v2lagidl; + double BSIM4v2lbgidl; + double BSIM4v2lcgidl; + double BSIM4v2legidl; + double BSIM4v2laigc; + double BSIM4v2lbigc; + double BSIM4v2lcigc; + double BSIM4v2laigsd; + double BSIM4v2lbigsd; + double BSIM4v2lcigsd; + double BSIM4v2laigbacc; + double BSIM4v2lbigbacc; + double BSIM4v2lcigbacc; + double BSIM4v2laigbinv; + double BSIM4v2lbigbinv; + double BSIM4v2lcigbinv; + double BSIM4v2lnigc; + double BSIM4v2lnigbacc; + double BSIM4v2lnigbinv; + double BSIM4v2lntox; + double BSIM4v2leigbinv; + double BSIM4v2lpigcd; + double BSIM4v2lpoxedge; + double BSIM4v2lxrcrg1; + double BSIM4v2lxrcrg2; + + /* CV model */ + double BSIM4v2lcgsl; + double BSIM4v2lcgdl; + double BSIM4v2lckappas; + double BSIM4v2lckappad; + double BSIM4v2lcf; + double BSIM4v2lclc; + double BSIM4v2lcle; + double BSIM4v2lvfbcv; + double BSIM4v2lnoff; + double BSIM4v2lvoffcv; + double BSIM4v2lacde; + double BSIM4v2lmoin; + + /* Width Dependence */ + double BSIM4v2wcdsc; + double BSIM4v2wcdscb; + double BSIM4v2wcdscd; + double BSIM4v2wcit; + double BSIM4v2wnfactor; + double BSIM4v2wxj; + double BSIM4v2wvsat; + double BSIM4v2wat; + double BSIM4v2wa0; + double BSIM4v2wags; + double BSIM4v2wa1; + double BSIM4v2wa2; + double BSIM4v2wketa; + double BSIM4v2wnsub; + double BSIM4v2wndep; + double BSIM4v2wnsd; + double BSIM4v2wphin; + double BSIM4v2wngate; + double BSIM4v2wgamma1; + double BSIM4v2wgamma2; + double BSIM4v2wvbx; + double BSIM4v2wvbm; + double BSIM4v2wxt; + double BSIM4v2wk1; + double BSIM4v2wkt1; + double BSIM4v2wkt1l; + double BSIM4v2wkt2; + double BSIM4v2wk2; + double BSIM4v2wk3; + double BSIM4v2wk3b; + double BSIM4v2ww0; + double BSIM4v2wdvtp0; + double BSIM4v2wdvtp1; + double BSIM4v2wlpe0; + double BSIM4v2wlpeb; + double BSIM4v2wdvt0; + double BSIM4v2wdvt1; + double BSIM4v2wdvt2; + double BSIM4v2wdvt0w; + double BSIM4v2wdvt1w; + double BSIM4v2wdvt2w; + double BSIM4v2wdrout; + double BSIM4v2wdsub; + double BSIM4v2wvth0; + double BSIM4v2wua; + double BSIM4v2wua1; + double BSIM4v2wub; + double BSIM4v2wub1; + double BSIM4v2wuc; + double BSIM4v2wuc1; + double BSIM4v2wu0; + double BSIM4v2weu; + double BSIM4v2wute; + double BSIM4v2wvoff; + double BSIM4v2wminv; + double BSIM4v2wdelta; + double BSIM4v2wrdsw; + double BSIM4v2wrsw; + double BSIM4v2wrdw; + double BSIM4v2wprwg; + double BSIM4v2wprwb; + double BSIM4v2wprt; + double BSIM4v2weta0; + double BSIM4v2wetab; + double BSIM4v2wpclm; + double BSIM4v2wpdibl1; + double BSIM4v2wpdibl2; + double BSIM4v2wpdiblb; + double BSIM4v2wfprout; + double BSIM4v2wpdits; + double BSIM4v2wpditsd; + double BSIM4v2wpscbe1; + double BSIM4v2wpscbe2; + double BSIM4v2wpvag; + double BSIM4v2wwr; + double BSIM4v2wdwg; + double BSIM4v2wdwb; + double BSIM4v2wb0; + double BSIM4v2wb1; + double BSIM4v2walpha0; + double BSIM4v2walpha1; + double BSIM4v2wbeta0; + double BSIM4v2wvfb; + double BSIM4v2wagidl; + double BSIM4v2wbgidl; + double BSIM4v2wcgidl; + double BSIM4v2wegidl; + double BSIM4v2waigc; + double BSIM4v2wbigc; + double BSIM4v2wcigc; + double BSIM4v2waigsd; + double BSIM4v2wbigsd; + double BSIM4v2wcigsd; + double BSIM4v2waigbacc; + double BSIM4v2wbigbacc; + double BSIM4v2wcigbacc; + double BSIM4v2waigbinv; + double BSIM4v2wbigbinv; + double BSIM4v2wcigbinv; + double BSIM4v2wnigc; + double BSIM4v2wnigbacc; + double BSIM4v2wnigbinv; + double BSIM4v2wntox; + double BSIM4v2weigbinv; + double BSIM4v2wpigcd; + double BSIM4v2wpoxedge; + double BSIM4v2wxrcrg1; + double BSIM4v2wxrcrg2; + + /* CV model */ + double BSIM4v2wcgsl; + double BSIM4v2wcgdl; + double BSIM4v2wckappas; + double BSIM4v2wckappad; + double BSIM4v2wcf; + double BSIM4v2wclc; + double BSIM4v2wcle; + double BSIM4v2wvfbcv; + double BSIM4v2wnoff; + double BSIM4v2wvoffcv; + double BSIM4v2wacde; + double BSIM4v2wmoin; + + /* Cross-term Dependence */ + double BSIM4v2pcdsc; + double BSIM4v2pcdscb; + double BSIM4v2pcdscd; + double BSIM4v2pcit; + double BSIM4v2pnfactor; + double BSIM4v2pxj; + double BSIM4v2pvsat; + double BSIM4v2pat; + double BSIM4v2pa0; + double BSIM4v2pags; + double BSIM4v2pa1; + double BSIM4v2pa2; + double BSIM4v2pketa; + double BSIM4v2pnsub; + double BSIM4v2pndep; + double BSIM4v2pnsd; + double BSIM4v2pphin; + double BSIM4v2pngate; + double BSIM4v2pgamma1; + double BSIM4v2pgamma2; + double BSIM4v2pvbx; + double BSIM4v2pvbm; + double BSIM4v2pxt; + double BSIM4v2pk1; + double BSIM4v2pkt1; + double BSIM4v2pkt1l; + double BSIM4v2pkt2; + double BSIM4v2pk2; + double BSIM4v2pk3; + double BSIM4v2pk3b; + double BSIM4v2pw0; + double BSIM4v2pdvtp0; + double BSIM4v2pdvtp1; + double BSIM4v2plpe0; + double BSIM4v2plpeb; + double BSIM4v2pdvt0; + double BSIM4v2pdvt1; + double BSIM4v2pdvt2; + double BSIM4v2pdvt0w; + double BSIM4v2pdvt1w; + double BSIM4v2pdvt2w; + double BSIM4v2pdrout; + double BSIM4v2pdsub; + double BSIM4v2pvth0; + double BSIM4v2pua; + double BSIM4v2pua1; + double BSIM4v2pub; + double BSIM4v2pub1; + double BSIM4v2puc; + double BSIM4v2puc1; + double BSIM4v2pu0; + double BSIM4v2peu; + double BSIM4v2pute; + double BSIM4v2pvoff; + double BSIM4v2pminv; + double BSIM4v2pdelta; + double BSIM4v2prdsw; + double BSIM4v2prsw; + double BSIM4v2prdw; + double BSIM4v2pprwg; + double BSIM4v2pprwb; + double BSIM4v2pprt; + double BSIM4v2peta0; + double BSIM4v2petab; + double BSIM4v2ppclm; + double BSIM4v2ppdibl1; + double BSIM4v2ppdibl2; + double BSIM4v2ppdiblb; + double BSIM4v2pfprout; + double BSIM4v2ppdits; + double BSIM4v2ppditsd; + double BSIM4v2ppscbe1; + double BSIM4v2ppscbe2; + double BSIM4v2ppvag; + double BSIM4v2pwr; + double BSIM4v2pdwg; + double BSIM4v2pdwb; + double BSIM4v2pb0; + double BSIM4v2pb1; + double BSIM4v2palpha0; + double BSIM4v2palpha1; + double BSIM4v2pbeta0; + double BSIM4v2pvfb; + double BSIM4v2pagidl; + double BSIM4v2pbgidl; + double BSIM4v2pcgidl; + double BSIM4v2pegidl; + double BSIM4v2paigc; + double BSIM4v2pbigc; + double BSIM4v2pcigc; + double BSIM4v2paigsd; + double BSIM4v2pbigsd; + double BSIM4v2pcigsd; + double BSIM4v2paigbacc; + double BSIM4v2pbigbacc; + double BSIM4v2pcigbacc; + double BSIM4v2paigbinv; + double BSIM4v2pbigbinv; + double BSIM4v2pcigbinv; + double BSIM4v2pnigc; + double BSIM4v2pnigbacc; + double BSIM4v2pnigbinv; + double BSIM4v2pntox; + double BSIM4v2peigbinv; + double BSIM4v2ppigcd; + double BSIM4v2ppoxedge; + double BSIM4v2pxrcrg1; + double BSIM4v2pxrcrg2; + + /* CV model */ + double BSIM4v2pcgsl; + double BSIM4v2pcgdl; + double BSIM4v2pckappas; + double BSIM4v2pckappad; + double BSIM4v2pcf; + double BSIM4v2pclc; + double BSIM4v2pcle; + double BSIM4v2pvfbcv; + double BSIM4v2pnoff; + double BSIM4v2pvoffcv; + double BSIM4v2pacde; + double BSIM4v2pmoin; + + double BSIM4v2tnom; + double BSIM4v2cgso; + double BSIM4v2cgdo; + double BSIM4v2cgbo; + double BSIM4v2xpart; + double BSIM4v2cFringOut; + double BSIM4v2cFringMax; + + double BSIM4v2sheetResistance; + double BSIM4v2SjctSatCurDensity; + double BSIM4v2DjctSatCurDensity; + double BSIM4v2SjctSidewallSatCurDensity; + double BSIM4v2DjctSidewallSatCurDensity; + double BSIM4v2SjctGateSidewallSatCurDensity; + double BSIM4v2DjctGateSidewallSatCurDensity; + double BSIM4v2SbulkJctPotential; + double BSIM4v2DbulkJctPotential; + double BSIM4v2SbulkJctBotGradingCoeff; + double BSIM4v2DbulkJctBotGradingCoeff; + double BSIM4v2SbulkJctSideGradingCoeff; + double BSIM4v2DbulkJctSideGradingCoeff; + double BSIM4v2SbulkJctGateSideGradingCoeff; + double BSIM4v2DbulkJctGateSideGradingCoeff; + double BSIM4v2SsidewallJctPotential; + double BSIM4v2DsidewallJctPotential; + double BSIM4v2SGatesidewallJctPotential; + double BSIM4v2DGatesidewallJctPotential; + double BSIM4v2SunitAreaJctCap; + double BSIM4v2DunitAreaJctCap; + double BSIM4v2SunitLengthSidewallJctCap; + double BSIM4v2DunitLengthSidewallJctCap; + double BSIM4v2SunitLengthGateSidewallJctCap; + double BSIM4v2DunitLengthGateSidewallJctCap; + double BSIM4v2SjctEmissionCoeff; + double BSIM4v2DjctEmissionCoeff; + double BSIM4v2SjctTempExponent; + double BSIM4v2DjctTempExponent; + + double BSIM4v2Lint; + double BSIM4v2Ll; + double BSIM4v2Llc; + double BSIM4v2Lln; + double BSIM4v2Lw; + double BSIM4v2Lwc; + double BSIM4v2Lwn; + double BSIM4v2Lwl; + double BSIM4v2Lwlc; + double BSIM4v2Lmin; + double BSIM4v2Lmax; + + double BSIM4v2Wint; + double BSIM4v2Wl; + double BSIM4v2Wlc; + double BSIM4v2Wln; + double BSIM4v2Ww; + double BSIM4v2Wwc; + double BSIM4v2Wwn; + double BSIM4v2Wwl; + double BSIM4v2Wwlc; + double BSIM4v2Wmin; + double BSIM4v2Wmax; + + +/* Pre-calculated constants + * move to size-dependent param */ + double BSIM4v2vtm; + double BSIM4v2coxe; + double BSIM4v2coxp; + double BSIM4v2cof1; + double BSIM4v2cof2; + double BSIM4v2cof3; + double BSIM4v2cof4; + double BSIM4v2vcrit; + double BSIM4v2factor1; + double BSIM4v2PhiBS; + double BSIM4v2PhiBSWS; + double BSIM4v2PhiBSWGS; + double BSIM4v2SjctTempSatCurDensity; + double BSIM4v2SjctSidewallTempSatCurDensity; + double BSIM4v2SjctGateSidewallTempSatCurDensity; + double BSIM4v2PhiBD; + double BSIM4v2PhiBSWD; + double BSIM4v2PhiBSWGD; + double BSIM4v2DjctTempSatCurDensity; + double BSIM4v2DjctSidewallTempSatCurDensity; + double BSIM4v2DjctGateSidewallTempSatCurDensity; + double BSIM4v2SunitAreaTempJctCap; + double BSIM4v2DunitAreaTempJctCap; + double BSIM4v2SunitLengthSidewallTempJctCap; + double BSIM4v2DunitLengthSidewallTempJctCap; + double BSIM4v2SunitLengthGateSidewallTempJctCap; + double BSIM4v2DunitLengthGateSidewallTempJctCap; + + double BSIM4v2oxideTrapDensityA; + double BSIM4v2oxideTrapDensityB; + double BSIM4v2oxideTrapDensityC; + double BSIM4v2em; + double BSIM4v2ef; + double BSIM4v2af; + double BSIM4v2kf; + + struct bsim4SizeDependParam *pSizeDependParamKnot; + + /* Flags */ + unsigned BSIM4v2mobModGiven :1; + unsigned BSIM4v2binUnitGiven :1; + unsigned BSIM4v2capModGiven :1; + unsigned BSIM4v2dioModGiven :1; + unsigned BSIM4v2rdsModGiven :1; + unsigned BSIM4v2rbodyModGiven :1; + unsigned BSIM4v2rgateModGiven :1; + unsigned BSIM4v2perModGiven :1; + unsigned BSIM4v2geoModGiven :1; + unsigned BSIM4v2paramChkGiven :1; + unsigned BSIM4v2trnqsModGiven :1; + unsigned BSIM4v2acnqsModGiven :1; + unsigned BSIM4v2fnoiModGiven :1; + unsigned BSIM4v2tnoiModGiven :1; + unsigned BSIM4v2igcModGiven :1; + unsigned BSIM4v2igbModGiven :1; + unsigned BSIM4v2typeGiven :1; + unsigned BSIM4v2toxrefGiven :1; + unsigned BSIM4v2toxeGiven :1; + unsigned BSIM4v2toxpGiven :1; + unsigned BSIM4v2toxmGiven :1; + unsigned BSIM4v2dtoxGiven :1; + unsigned BSIM4v2epsroxGiven :1; + unsigned BSIM4v2versionGiven :1; + unsigned BSIM4v2cdscGiven :1; + unsigned BSIM4v2cdscbGiven :1; + unsigned BSIM4v2cdscdGiven :1; + unsigned BSIM4v2citGiven :1; + unsigned BSIM4v2nfactorGiven :1; + unsigned BSIM4v2xjGiven :1; + unsigned BSIM4v2vsatGiven :1; + unsigned BSIM4v2atGiven :1; + unsigned BSIM4v2a0Given :1; + unsigned BSIM4v2agsGiven :1; + unsigned BSIM4v2a1Given :1; + unsigned BSIM4v2a2Given :1; + unsigned BSIM4v2ketaGiven :1; + unsigned BSIM4v2nsubGiven :1; + unsigned BSIM4v2ndepGiven :1; + unsigned BSIM4v2nsdGiven :1; + unsigned BSIM4v2phinGiven :1; + unsigned BSIM4v2ngateGiven :1; + unsigned BSIM4v2gamma1Given :1; + unsigned BSIM4v2gamma2Given :1; + unsigned BSIM4v2vbxGiven :1; + unsigned BSIM4v2vbmGiven :1; + unsigned BSIM4v2xtGiven :1; + unsigned BSIM4v2k1Given :1; + unsigned BSIM4v2kt1Given :1; + unsigned BSIM4v2kt1lGiven :1; + unsigned BSIM4v2kt2Given :1; + unsigned BSIM4v2k2Given :1; + unsigned BSIM4v2k3Given :1; + unsigned BSIM4v2k3bGiven :1; + unsigned BSIM4v2w0Given :1; + unsigned BSIM4v2dvtp0Given :1; + unsigned BSIM4v2dvtp1Given :1; + unsigned BSIM4v2lpe0Given :1; + unsigned BSIM4v2lpebGiven :1; + unsigned BSIM4v2dvt0Given :1; + unsigned BSIM4v2dvt1Given :1; + unsigned BSIM4v2dvt2Given :1; + unsigned BSIM4v2dvt0wGiven :1; + unsigned BSIM4v2dvt1wGiven :1; + unsigned BSIM4v2dvt2wGiven :1; + unsigned BSIM4v2droutGiven :1; + unsigned BSIM4v2dsubGiven :1; + unsigned BSIM4v2vth0Given :1; + unsigned BSIM4v2euGiven :1; + unsigned BSIM4v2uaGiven :1; + unsigned BSIM4v2ua1Given :1; + unsigned BSIM4v2ubGiven :1; + unsigned BSIM4v2ub1Given :1; + unsigned BSIM4v2ucGiven :1; + unsigned BSIM4v2uc1Given :1; + unsigned BSIM4v2u0Given :1; + unsigned BSIM4v2uteGiven :1; + unsigned BSIM4v2voffGiven :1; + unsigned BSIM4v2vofflGiven :1; + unsigned BSIM4v2minvGiven :1; + unsigned BSIM4v2rdswGiven :1; + unsigned BSIM4v2rdswminGiven :1; + unsigned BSIM4v2rdwminGiven :1; + unsigned BSIM4v2rswminGiven :1; + unsigned BSIM4v2rswGiven :1; + unsigned BSIM4v2rdwGiven :1; + unsigned BSIM4v2prwgGiven :1; + unsigned BSIM4v2prwbGiven :1; + unsigned BSIM4v2prtGiven :1; + unsigned BSIM4v2eta0Given :1; + unsigned BSIM4v2etabGiven :1; + unsigned BSIM4v2pclmGiven :1; + unsigned BSIM4v2pdibl1Given :1; + unsigned BSIM4v2pdibl2Given :1; + unsigned BSIM4v2pdiblbGiven :1; + unsigned BSIM4v2fproutGiven :1; + unsigned BSIM4v2pditsGiven :1; + unsigned BSIM4v2pditsdGiven :1; + unsigned BSIM4v2pditslGiven :1; + unsigned BSIM4v2pscbe1Given :1; + unsigned BSIM4v2pscbe2Given :1; + unsigned BSIM4v2pvagGiven :1; + unsigned BSIM4v2deltaGiven :1; + unsigned BSIM4v2wrGiven :1; + unsigned BSIM4v2dwgGiven :1; + unsigned BSIM4v2dwbGiven :1; + unsigned BSIM4v2b0Given :1; + unsigned BSIM4v2b1Given :1; + unsigned BSIM4v2alpha0Given :1; + unsigned BSIM4v2alpha1Given :1; + unsigned BSIM4v2beta0Given :1; + unsigned BSIM4v2agidlGiven :1; + unsigned BSIM4v2bgidlGiven :1; + unsigned BSIM4v2cgidlGiven :1; + unsigned BSIM4v2egidlGiven :1; + unsigned BSIM4v2aigcGiven :1; + unsigned BSIM4v2bigcGiven :1; + unsigned BSIM4v2cigcGiven :1; + unsigned BSIM4v2aigsdGiven :1; + unsigned BSIM4v2bigsdGiven :1; + unsigned BSIM4v2cigsdGiven :1; + unsigned BSIM4v2aigbaccGiven :1; + unsigned BSIM4v2bigbaccGiven :1; + unsigned BSIM4v2cigbaccGiven :1; + unsigned BSIM4v2aigbinvGiven :1; + unsigned BSIM4v2bigbinvGiven :1; + unsigned BSIM4v2cigbinvGiven :1; + unsigned BSIM4v2nigcGiven :1; + unsigned BSIM4v2nigbinvGiven :1; + unsigned BSIM4v2nigbaccGiven :1; + unsigned BSIM4v2ntoxGiven :1; + unsigned BSIM4v2eigbinvGiven :1; + unsigned BSIM4v2pigcdGiven :1; + unsigned BSIM4v2poxedgeGiven :1; + unsigned BSIM4v2ijthdfwdGiven :1; + unsigned BSIM4v2ijthsfwdGiven :1; + unsigned BSIM4v2ijthdrevGiven :1; + unsigned BSIM4v2ijthsrevGiven :1; + unsigned BSIM4v2xjbvdGiven :1; + unsigned BSIM4v2xjbvsGiven :1; + unsigned BSIM4v2bvdGiven :1; + unsigned BSIM4v2bvsGiven :1; + unsigned BSIM4v2vfbGiven :1; + unsigned BSIM4v2gbminGiven :1; + unsigned BSIM4v2rbdbGiven :1; + unsigned BSIM4v2rbsbGiven :1; + unsigned BSIM4v2rbpsGiven :1; + unsigned BSIM4v2rbpdGiven :1; + unsigned BSIM4v2rbpbGiven :1; + unsigned BSIM4v2xrcrg1Given :1; + unsigned BSIM4v2xrcrg2Given :1; + unsigned BSIM4v2tnoiaGiven :1; + unsigned BSIM4v2tnoibGiven :1; + unsigned BSIM4v2ntnoiGiven :1; + + /* CV model and parasitics */ + unsigned BSIM4v2cgslGiven :1; + unsigned BSIM4v2cgdlGiven :1; + unsigned BSIM4v2ckappasGiven :1; + unsigned BSIM4v2ckappadGiven :1; + unsigned BSIM4v2cfGiven :1; + unsigned BSIM4v2vfbcvGiven :1; + unsigned BSIM4v2clcGiven :1; + unsigned BSIM4v2cleGiven :1; + unsigned BSIM4v2dwcGiven :1; + unsigned BSIM4v2dlcGiven :1; + unsigned BSIM4v2xwGiven :1; + unsigned BSIM4v2xlGiven :1; + unsigned BSIM4v2dlcigGiven :1; + unsigned BSIM4v2dwjGiven :1; + unsigned BSIM4v2noffGiven :1; + unsigned BSIM4v2voffcvGiven :1; + unsigned BSIM4v2acdeGiven :1; + unsigned BSIM4v2moinGiven :1; + unsigned BSIM4v2tcjGiven :1; + unsigned BSIM4v2tcjswGiven :1; + unsigned BSIM4v2tcjswgGiven :1; + unsigned BSIM4v2tpbGiven :1; + unsigned BSIM4v2tpbswGiven :1; + unsigned BSIM4v2tpbswgGiven :1; + unsigned BSIM4v2dmcgGiven :1; + unsigned BSIM4v2dmciGiven :1; + unsigned BSIM4v2dmdgGiven :1; + unsigned BSIM4v2dmcgtGiven :1; + unsigned BSIM4v2xgwGiven :1; + unsigned BSIM4v2xglGiven :1; + unsigned BSIM4v2rshgGiven :1; + unsigned BSIM4v2ngconGiven :1; + + + /* Length dependence */ + unsigned BSIM4v2lcdscGiven :1; + unsigned BSIM4v2lcdscbGiven :1; + unsigned BSIM4v2lcdscdGiven :1; + unsigned BSIM4v2lcitGiven :1; + unsigned BSIM4v2lnfactorGiven :1; + unsigned BSIM4v2lxjGiven :1; + unsigned BSIM4v2lvsatGiven :1; + unsigned BSIM4v2latGiven :1; + unsigned BSIM4v2la0Given :1; + unsigned BSIM4v2lagsGiven :1; + unsigned BSIM4v2la1Given :1; + unsigned BSIM4v2la2Given :1; + unsigned BSIM4v2lketaGiven :1; + unsigned BSIM4v2lnsubGiven :1; + unsigned BSIM4v2lndepGiven :1; + unsigned BSIM4v2lnsdGiven :1; + unsigned BSIM4v2lphinGiven :1; + unsigned BSIM4v2lngateGiven :1; + unsigned BSIM4v2lgamma1Given :1; + unsigned BSIM4v2lgamma2Given :1; + unsigned BSIM4v2lvbxGiven :1; + unsigned BSIM4v2lvbmGiven :1; + unsigned BSIM4v2lxtGiven :1; + unsigned BSIM4v2lk1Given :1; + unsigned BSIM4v2lkt1Given :1; + unsigned BSIM4v2lkt1lGiven :1; + unsigned BSIM4v2lkt2Given :1; + unsigned BSIM4v2lk2Given :1; + unsigned BSIM4v2lk3Given :1; + unsigned BSIM4v2lk3bGiven :1; + unsigned BSIM4v2lw0Given :1; + unsigned BSIM4v2ldvtp0Given :1; + unsigned BSIM4v2ldvtp1Given :1; + unsigned BSIM4v2llpe0Given :1; + unsigned BSIM4v2llpebGiven :1; + unsigned BSIM4v2ldvt0Given :1; + unsigned BSIM4v2ldvt1Given :1; + unsigned BSIM4v2ldvt2Given :1; + unsigned BSIM4v2ldvt0wGiven :1; + unsigned BSIM4v2ldvt1wGiven :1; + unsigned BSIM4v2ldvt2wGiven :1; + unsigned BSIM4v2ldroutGiven :1; + unsigned BSIM4v2ldsubGiven :1; + unsigned BSIM4v2lvth0Given :1; + unsigned BSIM4v2luaGiven :1; + unsigned BSIM4v2lua1Given :1; + unsigned BSIM4v2lubGiven :1; + unsigned BSIM4v2lub1Given :1; + unsigned BSIM4v2lucGiven :1; + unsigned BSIM4v2luc1Given :1; + unsigned BSIM4v2lu0Given :1; + unsigned BSIM4v2leuGiven :1; + unsigned BSIM4v2luteGiven :1; + unsigned BSIM4v2lvoffGiven :1; + unsigned BSIM4v2lminvGiven :1; + unsigned BSIM4v2lrdswGiven :1; + unsigned BSIM4v2lrswGiven :1; + unsigned BSIM4v2lrdwGiven :1; + unsigned BSIM4v2lprwgGiven :1; + unsigned BSIM4v2lprwbGiven :1; + unsigned BSIM4v2lprtGiven :1; + unsigned BSIM4v2leta0Given :1; + unsigned BSIM4v2letabGiven :1; + unsigned BSIM4v2lpclmGiven :1; + unsigned BSIM4v2lpdibl1Given :1; + unsigned BSIM4v2lpdibl2Given :1; + unsigned BSIM4v2lpdiblbGiven :1; + unsigned BSIM4v2lfproutGiven :1; + unsigned BSIM4v2lpditsGiven :1; + unsigned BSIM4v2lpditsdGiven :1; + unsigned BSIM4v2lpscbe1Given :1; + unsigned BSIM4v2lpscbe2Given :1; + unsigned BSIM4v2lpvagGiven :1; + unsigned BSIM4v2ldeltaGiven :1; + unsigned BSIM4v2lwrGiven :1; + unsigned BSIM4v2ldwgGiven :1; + unsigned BSIM4v2ldwbGiven :1; + unsigned BSIM4v2lb0Given :1; + unsigned BSIM4v2lb1Given :1; + unsigned BSIM4v2lalpha0Given :1; + unsigned BSIM4v2lalpha1Given :1; + unsigned BSIM4v2lbeta0Given :1; + unsigned BSIM4v2lvfbGiven :1; + unsigned BSIM4v2lagidlGiven :1; + unsigned BSIM4v2lbgidlGiven :1; + unsigned BSIM4v2lcgidlGiven :1; + unsigned BSIM4v2legidlGiven :1; + unsigned BSIM4v2laigcGiven :1; + unsigned BSIM4v2lbigcGiven :1; + unsigned BSIM4v2lcigcGiven :1; + unsigned BSIM4v2laigsdGiven :1; + unsigned BSIM4v2lbigsdGiven :1; + unsigned BSIM4v2lcigsdGiven :1; + unsigned BSIM4v2laigbaccGiven :1; + unsigned BSIM4v2lbigbaccGiven :1; + unsigned BSIM4v2lcigbaccGiven :1; + unsigned BSIM4v2laigbinvGiven :1; + unsigned BSIM4v2lbigbinvGiven :1; + unsigned BSIM4v2lcigbinvGiven :1; + unsigned BSIM4v2lnigcGiven :1; + unsigned BSIM4v2lnigbinvGiven :1; + unsigned BSIM4v2lnigbaccGiven :1; + unsigned BSIM4v2lntoxGiven :1; + unsigned BSIM4v2leigbinvGiven :1; + unsigned BSIM4v2lpigcdGiven :1; + unsigned BSIM4v2lpoxedgeGiven :1; + unsigned BSIM4v2lxrcrg1Given :1; + unsigned BSIM4v2lxrcrg2Given :1; + + /* CV model */ + unsigned BSIM4v2lcgslGiven :1; + unsigned BSIM4v2lcgdlGiven :1; + unsigned BSIM4v2lckappasGiven :1; + unsigned BSIM4v2lckappadGiven :1; + unsigned BSIM4v2lcfGiven :1; + unsigned BSIM4v2lclcGiven :1; + unsigned BSIM4v2lcleGiven :1; + unsigned BSIM4v2lvfbcvGiven :1; + unsigned BSIM4v2lnoffGiven :1; + unsigned BSIM4v2lvoffcvGiven :1; + unsigned BSIM4v2lacdeGiven :1; + unsigned BSIM4v2lmoinGiven :1; + + /* Width dependence */ + unsigned BSIM4v2wcdscGiven :1; + unsigned BSIM4v2wcdscbGiven :1; + unsigned BSIM4v2wcdscdGiven :1; + unsigned BSIM4v2wcitGiven :1; + unsigned BSIM4v2wnfactorGiven :1; + unsigned BSIM4v2wxjGiven :1; + unsigned BSIM4v2wvsatGiven :1; + unsigned BSIM4v2watGiven :1; + unsigned BSIM4v2wa0Given :1; + unsigned BSIM4v2wagsGiven :1; + unsigned BSIM4v2wa1Given :1; + unsigned BSIM4v2wa2Given :1; + unsigned BSIM4v2wketaGiven :1; + unsigned BSIM4v2wnsubGiven :1; + unsigned BSIM4v2wndepGiven :1; + unsigned BSIM4v2wnsdGiven :1; + unsigned BSIM4v2wphinGiven :1; + unsigned BSIM4v2wngateGiven :1; + unsigned BSIM4v2wgamma1Given :1; + unsigned BSIM4v2wgamma2Given :1; + unsigned BSIM4v2wvbxGiven :1; + unsigned BSIM4v2wvbmGiven :1; + unsigned BSIM4v2wxtGiven :1; + unsigned BSIM4v2wk1Given :1; + unsigned BSIM4v2wkt1Given :1; + unsigned BSIM4v2wkt1lGiven :1; + unsigned BSIM4v2wkt2Given :1; + unsigned BSIM4v2wk2Given :1; + unsigned BSIM4v2wk3Given :1; + unsigned BSIM4v2wk3bGiven :1; + unsigned BSIM4v2ww0Given :1; + unsigned BSIM4v2wdvtp0Given :1; + unsigned BSIM4v2wdvtp1Given :1; + unsigned BSIM4v2wlpe0Given :1; + unsigned BSIM4v2wlpebGiven :1; + unsigned BSIM4v2wdvt0Given :1; + unsigned BSIM4v2wdvt1Given :1; + unsigned BSIM4v2wdvt2Given :1; + unsigned BSIM4v2wdvt0wGiven :1; + unsigned BSIM4v2wdvt1wGiven :1; + unsigned BSIM4v2wdvt2wGiven :1; + unsigned BSIM4v2wdroutGiven :1; + unsigned BSIM4v2wdsubGiven :1; + unsigned BSIM4v2wvth0Given :1; + unsigned BSIM4v2wuaGiven :1; + unsigned BSIM4v2wua1Given :1; + unsigned BSIM4v2wubGiven :1; + unsigned BSIM4v2wub1Given :1; + unsigned BSIM4v2wucGiven :1; + unsigned BSIM4v2wuc1Given :1; + unsigned BSIM4v2wu0Given :1; + unsigned BSIM4v2weuGiven :1; + unsigned BSIM4v2wuteGiven :1; + unsigned BSIM4v2wvoffGiven :1; + unsigned BSIM4v2wminvGiven :1; + unsigned BSIM4v2wrdswGiven :1; + unsigned BSIM4v2wrswGiven :1; + unsigned BSIM4v2wrdwGiven :1; + unsigned BSIM4v2wprwgGiven :1; + unsigned BSIM4v2wprwbGiven :1; + unsigned BSIM4v2wprtGiven :1; + unsigned BSIM4v2weta0Given :1; + unsigned BSIM4v2wetabGiven :1; + unsigned BSIM4v2wpclmGiven :1; + unsigned BSIM4v2wpdibl1Given :1; + unsigned BSIM4v2wpdibl2Given :1; + unsigned BSIM4v2wpdiblbGiven :1; + unsigned BSIM4v2wfproutGiven :1; + unsigned BSIM4v2wpditsGiven :1; + unsigned BSIM4v2wpditsdGiven :1; + unsigned BSIM4v2wpscbe1Given :1; + unsigned BSIM4v2wpscbe2Given :1; + unsigned BSIM4v2wpvagGiven :1; + unsigned BSIM4v2wdeltaGiven :1; + unsigned BSIM4v2wwrGiven :1; + unsigned BSIM4v2wdwgGiven :1; + unsigned BSIM4v2wdwbGiven :1; + unsigned BSIM4v2wb0Given :1; + unsigned BSIM4v2wb1Given :1; + unsigned BSIM4v2walpha0Given :1; + unsigned BSIM4v2walpha1Given :1; + unsigned BSIM4v2wbeta0Given :1; + unsigned BSIM4v2wvfbGiven :1; + unsigned BSIM4v2wagidlGiven :1; + unsigned BSIM4v2wbgidlGiven :1; + unsigned BSIM4v2wcgidlGiven :1; + unsigned BSIM4v2wegidlGiven :1; + unsigned BSIM4v2waigcGiven :1; + unsigned BSIM4v2wbigcGiven :1; + unsigned BSIM4v2wcigcGiven :1; + unsigned BSIM4v2waigsdGiven :1; + unsigned BSIM4v2wbigsdGiven :1; + unsigned BSIM4v2wcigsdGiven :1; + unsigned BSIM4v2waigbaccGiven :1; + unsigned BSIM4v2wbigbaccGiven :1; + unsigned BSIM4v2wcigbaccGiven :1; + unsigned BSIM4v2waigbinvGiven :1; + unsigned BSIM4v2wbigbinvGiven :1; + unsigned BSIM4v2wcigbinvGiven :1; + unsigned BSIM4v2wnigcGiven :1; + unsigned BSIM4v2wnigbinvGiven :1; + unsigned BSIM4v2wnigbaccGiven :1; + unsigned BSIM4v2wntoxGiven :1; + unsigned BSIM4v2weigbinvGiven :1; + unsigned BSIM4v2wpigcdGiven :1; + unsigned BSIM4v2wpoxedgeGiven :1; + unsigned BSIM4v2wxrcrg1Given :1; + unsigned BSIM4v2wxrcrg2Given :1; + + /* CV model */ + unsigned BSIM4v2wcgslGiven :1; + unsigned BSIM4v2wcgdlGiven :1; + unsigned BSIM4v2wckappasGiven :1; + unsigned BSIM4v2wckappadGiven :1; + unsigned BSIM4v2wcfGiven :1; + unsigned BSIM4v2wclcGiven :1; + unsigned BSIM4v2wcleGiven :1; + unsigned BSIM4v2wvfbcvGiven :1; + unsigned BSIM4v2wnoffGiven :1; + unsigned BSIM4v2wvoffcvGiven :1; + unsigned BSIM4v2wacdeGiven :1; + unsigned BSIM4v2wmoinGiven :1; + + /* Cross-term dependence */ + unsigned BSIM4v2pcdscGiven :1; + unsigned BSIM4v2pcdscbGiven :1; + unsigned BSIM4v2pcdscdGiven :1; + unsigned BSIM4v2pcitGiven :1; + unsigned BSIM4v2pnfactorGiven :1; + unsigned BSIM4v2pxjGiven :1; + unsigned BSIM4v2pvsatGiven :1; + unsigned BSIM4v2patGiven :1; + unsigned BSIM4v2pa0Given :1; + unsigned BSIM4v2pagsGiven :1; + unsigned BSIM4v2pa1Given :1; + unsigned BSIM4v2pa2Given :1; + unsigned BSIM4v2pketaGiven :1; + unsigned BSIM4v2pnsubGiven :1; + unsigned BSIM4v2pndepGiven :1; + unsigned BSIM4v2pnsdGiven :1; + unsigned BSIM4v2pphinGiven :1; + unsigned BSIM4v2pngateGiven :1; + unsigned BSIM4v2pgamma1Given :1; + unsigned BSIM4v2pgamma2Given :1; + unsigned BSIM4v2pvbxGiven :1; + unsigned BSIM4v2pvbmGiven :1; + unsigned BSIM4v2pxtGiven :1; + unsigned BSIM4v2pk1Given :1; + unsigned BSIM4v2pkt1Given :1; + unsigned BSIM4v2pkt1lGiven :1; + unsigned BSIM4v2pkt2Given :1; + unsigned BSIM4v2pk2Given :1; + unsigned BSIM4v2pk3Given :1; + unsigned BSIM4v2pk3bGiven :1; + unsigned BSIM4v2pw0Given :1; + unsigned BSIM4v2pdvtp0Given :1; + unsigned BSIM4v2pdvtp1Given :1; + unsigned BSIM4v2plpe0Given :1; + unsigned BSIM4v2plpebGiven :1; + unsigned BSIM4v2pdvt0Given :1; + unsigned BSIM4v2pdvt1Given :1; + unsigned BSIM4v2pdvt2Given :1; + unsigned BSIM4v2pdvt0wGiven :1; + unsigned BSIM4v2pdvt1wGiven :1; + unsigned BSIM4v2pdvt2wGiven :1; + unsigned BSIM4v2pdroutGiven :1; + unsigned BSIM4v2pdsubGiven :1; + unsigned BSIM4v2pvth0Given :1; + unsigned BSIM4v2puaGiven :1; + unsigned BSIM4v2pua1Given :1; + unsigned BSIM4v2pubGiven :1; + unsigned BSIM4v2pub1Given :1; + unsigned BSIM4v2pucGiven :1; + unsigned BSIM4v2puc1Given :1; + unsigned BSIM4v2pu0Given :1; + unsigned BSIM4v2peuGiven :1; + unsigned BSIM4v2puteGiven :1; + unsigned BSIM4v2pvoffGiven :1; + unsigned BSIM4v2pminvGiven :1; + unsigned BSIM4v2prdswGiven :1; + unsigned BSIM4v2prswGiven :1; + unsigned BSIM4v2prdwGiven :1; + unsigned BSIM4v2pprwgGiven :1; + unsigned BSIM4v2pprwbGiven :1; + unsigned BSIM4v2pprtGiven :1; + unsigned BSIM4v2peta0Given :1; + unsigned BSIM4v2petabGiven :1; + unsigned BSIM4v2ppclmGiven :1; + unsigned BSIM4v2ppdibl1Given :1; + unsigned BSIM4v2ppdibl2Given :1; + unsigned BSIM4v2ppdiblbGiven :1; + unsigned BSIM4v2pfproutGiven :1; + unsigned BSIM4v2ppditsGiven :1; + unsigned BSIM4v2ppditsdGiven :1; + unsigned BSIM4v2ppscbe1Given :1; + unsigned BSIM4v2ppscbe2Given :1; + unsigned BSIM4v2ppvagGiven :1; + unsigned BSIM4v2pdeltaGiven :1; + unsigned BSIM4v2pwrGiven :1; + unsigned BSIM4v2pdwgGiven :1; + unsigned BSIM4v2pdwbGiven :1; + unsigned BSIM4v2pb0Given :1; + unsigned BSIM4v2pb1Given :1; + unsigned BSIM4v2palpha0Given :1; + unsigned BSIM4v2palpha1Given :1; + unsigned BSIM4v2pbeta0Given :1; + unsigned BSIM4v2pvfbGiven :1; + unsigned BSIM4v2pagidlGiven :1; + unsigned BSIM4v2pbgidlGiven :1; + unsigned BSIM4v2pcgidlGiven :1; + unsigned BSIM4v2pegidlGiven :1; + unsigned BSIM4v2paigcGiven :1; + unsigned BSIM4v2pbigcGiven :1; + unsigned BSIM4v2pcigcGiven :1; + unsigned BSIM4v2paigsdGiven :1; + unsigned BSIM4v2pbigsdGiven :1; + unsigned BSIM4v2pcigsdGiven :1; + unsigned BSIM4v2paigbaccGiven :1; + unsigned BSIM4v2pbigbaccGiven :1; + unsigned BSIM4v2pcigbaccGiven :1; + unsigned BSIM4v2paigbinvGiven :1; + unsigned BSIM4v2pbigbinvGiven :1; + unsigned BSIM4v2pcigbinvGiven :1; + unsigned BSIM4v2pnigcGiven :1; + unsigned BSIM4v2pnigbinvGiven :1; + unsigned BSIM4v2pnigbaccGiven :1; + unsigned BSIM4v2pntoxGiven :1; + unsigned BSIM4v2peigbinvGiven :1; + unsigned BSIM4v2ppigcdGiven :1; + unsigned BSIM4v2ppoxedgeGiven :1; + unsigned BSIM4v2pxrcrg1Given :1; + unsigned BSIM4v2pxrcrg2Given :1; + + /* CV model */ + unsigned BSIM4v2pcgslGiven :1; + unsigned BSIM4v2pcgdlGiven :1; + unsigned BSIM4v2pckappasGiven :1; + unsigned BSIM4v2pckappadGiven :1; + unsigned BSIM4v2pcfGiven :1; + unsigned BSIM4v2pclcGiven :1; + unsigned BSIM4v2pcleGiven :1; + unsigned BSIM4v2pvfbcvGiven :1; + unsigned BSIM4v2pnoffGiven :1; + unsigned BSIM4v2pvoffcvGiven :1; + unsigned BSIM4v2pacdeGiven :1; + unsigned BSIM4v2pmoinGiven :1; + + unsigned BSIM4v2useFringeGiven :1; + + unsigned BSIM4v2tnomGiven :1; + unsigned BSIM4v2cgsoGiven :1; + unsigned BSIM4v2cgdoGiven :1; + unsigned BSIM4v2cgboGiven :1; + unsigned BSIM4v2xpartGiven :1; + unsigned BSIM4v2sheetResistanceGiven :1; + + unsigned BSIM4v2SjctSatCurDensityGiven :1; + unsigned BSIM4v2SjctSidewallSatCurDensityGiven :1; + unsigned BSIM4v2SjctGateSidewallSatCurDensityGiven :1; + unsigned BSIM4v2SbulkJctPotentialGiven :1; + unsigned BSIM4v2SbulkJctBotGradingCoeffGiven :1; + unsigned BSIM4v2SsidewallJctPotentialGiven :1; + unsigned BSIM4v2SGatesidewallJctPotentialGiven :1; + unsigned BSIM4v2SbulkJctSideGradingCoeffGiven :1; + unsigned BSIM4v2SunitAreaJctCapGiven :1; + unsigned BSIM4v2SunitLengthSidewallJctCapGiven :1; + unsigned BSIM4v2SbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM4v2SunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM4v2SjctEmissionCoeffGiven :1; + unsigned BSIM4v2SjctTempExponentGiven :1; + + unsigned BSIM4v2DjctSatCurDensityGiven :1; + unsigned BSIM4v2DjctSidewallSatCurDensityGiven :1; + unsigned BSIM4v2DjctGateSidewallSatCurDensityGiven :1; + unsigned BSIM4v2DbulkJctPotentialGiven :1; + unsigned BSIM4v2DbulkJctBotGradingCoeffGiven :1; + unsigned BSIM4v2DsidewallJctPotentialGiven :1; + unsigned BSIM4v2DGatesidewallJctPotentialGiven :1; + unsigned BSIM4v2DbulkJctSideGradingCoeffGiven :1; + unsigned BSIM4v2DunitAreaJctCapGiven :1; + unsigned BSIM4v2DunitLengthSidewallJctCapGiven :1; + unsigned BSIM4v2DbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM4v2DunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM4v2DjctEmissionCoeffGiven :1; + unsigned BSIM4v2DjctTempExponentGiven :1; + + unsigned BSIM4v2oxideTrapDensityAGiven :1; + unsigned BSIM4v2oxideTrapDensityBGiven :1; + unsigned BSIM4v2oxideTrapDensityCGiven :1; + unsigned BSIM4v2emGiven :1; + unsigned BSIM4v2efGiven :1; + unsigned BSIM4v2afGiven :1; + unsigned BSIM4v2kfGiven :1; + + unsigned BSIM4v2LintGiven :1; + unsigned BSIM4v2LlGiven :1; + unsigned BSIM4v2LlcGiven :1; + unsigned BSIM4v2LlnGiven :1; + unsigned BSIM4v2LwGiven :1; + unsigned BSIM4v2LwcGiven :1; + unsigned BSIM4v2LwnGiven :1; + unsigned BSIM4v2LwlGiven :1; + unsigned BSIM4v2LwlcGiven :1; + unsigned BSIM4v2LminGiven :1; + unsigned BSIM4v2LmaxGiven :1; + + unsigned BSIM4v2WintGiven :1; + unsigned BSIM4v2WlGiven :1; + unsigned BSIM4v2WlcGiven :1; + unsigned BSIM4v2WlnGiven :1; + unsigned BSIM4v2WwGiven :1; + unsigned BSIM4v2WwcGiven :1; + unsigned BSIM4v2WwnGiven :1; + unsigned BSIM4v2WwlGiven :1; + unsigned BSIM4v2WwlcGiven :1; + unsigned BSIM4v2WminGiven :1; + unsigned BSIM4v2WmaxGiven :1; + +} BSIM4v2model; + + +#ifndef NMOS +#define NMOS 1 +#define PMOS -1 +#endif /*NMOS*/ + + +/* Instance parameters */ +#define BSIM4v2_W 1 +#define BSIM4v2_L 2 +#define BSIM4v2_AS 3 +#define BSIM4v2_AD 4 +#define BSIM4v2_PS 5 +#define BSIM4v2_PD 6 +#define BSIM4v2_NRS 7 +#define BSIM4v2_NRD 8 +#define BSIM4v2_OFF 9 +#define BSIM4v2_IC 10 +#define BSIM4v2_IC_VDS 11 +#define BSIM4v2_IC_VGS 12 +#define BSIM4v2_IC_VBS 13 +#define BSIM4v2_TRNQSMOD 14 +#define BSIM4v2_RBODYMOD 15 +#define BSIM4v2_RGATEMOD 16 +#define BSIM4v2_GEOMOD 17 +#define BSIM4v2_RGEOMOD 18 +#define BSIM4v2_NF 19 +#define BSIM4v2_MIN 20 +#define BSIM4v2_ACNQSMOD 22 +#define BSIM4v2_RBDB 23 +#define BSIM4v2_RBSB 24 +#define BSIM4v2_RBPB 25 +#define BSIM4v2_RBPS 26 +#define BSIM4v2_RBPD 27 + + +/* Global parameters */ +#define BSIM4v2_MOD_IGCMOD 90 +#define BSIM4v2_MOD_IGBMOD 91 +#define BSIM4v2_MOD_ACNQSMOD 92 +#define BSIM4v2_MOD_FNOIMOD 93 +#define BSIM4v2_MOD_RDSMOD 94 +#define BSIM4v2_MOD_DIOMOD 96 +#define BSIM4v2_MOD_PERMOD 97 +#define BSIM4v2_MOD_GEOMOD 98 +#define BSIM4v2_MOD_RGATEMOD 99 +#define BSIM4v2_MOD_RBODYMOD 100 +#define BSIM4v2_MOD_CAPMOD 101 +#define BSIM4v2_MOD_TRNQSMOD 102 +#define BSIM4v2_MOD_MOBMOD 103 +#define BSIM4v2_MOD_TNOIMOD 104 +#define BSIM4v2_MOD_TOXE 105 +#define BSIM4v2_MOD_CDSC 106 +#define BSIM4v2_MOD_CDSCB 107 +#define BSIM4v2_MOD_CIT 108 +#define BSIM4v2_MOD_NFACTOR 109 +#define BSIM4v2_MOD_XJ 110 +#define BSIM4v2_MOD_VSAT 111 +#define BSIM4v2_MOD_AT 112 +#define BSIM4v2_MOD_A0 113 +#define BSIM4v2_MOD_A1 114 +#define BSIM4v2_MOD_A2 115 +#define BSIM4v2_MOD_KETA 116 +#define BSIM4v2_MOD_NSUB 117 +#define BSIM4v2_MOD_NDEP 118 +#define BSIM4v2_MOD_NGATE 120 +#define BSIM4v2_MOD_GAMMA1 121 +#define BSIM4v2_MOD_GAMMA2 122 +#define BSIM4v2_MOD_VBX 123 +#define BSIM4v2_MOD_BINUNIT 124 +#define BSIM4v2_MOD_VBM 125 +#define BSIM4v2_MOD_XT 126 +#define BSIM4v2_MOD_K1 129 +#define BSIM4v2_MOD_KT1 130 +#define BSIM4v2_MOD_KT1L 131 +#define BSIM4v2_MOD_K2 132 +#define BSIM4v2_MOD_KT2 133 +#define BSIM4v2_MOD_K3 134 +#define BSIM4v2_MOD_K3B 135 +#define BSIM4v2_MOD_W0 136 +#define BSIM4v2_MOD_LPE0 137 +#define BSIM4v2_MOD_DVT0 138 +#define BSIM4v2_MOD_DVT1 139 +#define BSIM4v2_MOD_DVT2 140 +#define BSIM4v2_MOD_DVT0W 141 +#define BSIM4v2_MOD_DVT1W 142 +#define BSIM4v2_MOD_DVT2W 143 +#define BSIM4v2_MOD_DROUT 144 +#define BSIM4v2_MOD_DSUB 145 +#define BSIM4v2_MOD_VTH0 146 +#define BSIM4v2_MOD_UA 147 +#define BSIM4v2_MOD_UA1 148 +#define BSIM4v2_MOD_UB 149 +#define BSIM4v2_MOD_UB1 150 +#define BSIM4v2_MOD_UC 151 +#define BSIM4v2_MOD_UC1 152 +#define BSIM4v2_MOD_U0 153 +#define BSIM4v2_MOD_UTE 154 +#define BSIM4v2_MOD_VOFF 155 +#define BSIM4v2_MOD_DELTA 156 +#define BSIM4v2_MOD_RDSW 157 +#define BSIM4v2_MOD_PRT 158 +#define BSIM4v2_MOD_LDD 159 +#define BSIM4v2_MOD_ETA 160 +#define BSIM4v2_MOD_ETA0 161 +#define BSIM4v2_MOD_ETAB 162 +#define BSIM4v2_MOD_PCLM 163 +#define BSIM4v2_MOD_PDIBL1 164 +#define BSIM4v2_MOD_PDIBL2 165 +#define BSIM4v2_MOD_PSCBE1 166 +#define BSIM4v2_MOD_PSCBE2 167 +#define BSIM4v2_MOD_PVAG 168 +#define BSIM4v2_MOD_WR 169 +#define BSIM4v2_MOD_DWG 170 +#define BSIM4v2_MOD_DWB 171 +#define BSIM4v2_MOD_B0 172 +#define BSIM4v2_MOD_B1 173 +#define BSIM4v2_MOD_ALPHA0 174 +#define BSIM4v2_MOD_BETA0 175 +#define BSIM4v2_MOD_PDIBLB 178 +#define BSIM4v2_MOD_PRWG 179 +#define BSIM4v2_MOD_PRWB 180 +#define BSIM4v2_MOD_CDSCD 181 +#define BSIM4v2_MOD_AGS 182 +#define BSIM4v2_MOD_FRINGE 184 +#define BSIM4v2_MOD_CGSL 186 +#define BSIM4v2_MOD_CGDL 187 +#define BSIM4v2_MOD_CKAPPAS 188 +#define BSIM4v2_MOD_CF 189 +#define BSIM4v2_MOD_CLC 190 +#define BSIM4v2_MOD_CLE 191 +#define BSIM4v2_MOD_PARAMCHK 192 +#define BSIM4v2_MOD_VERSION 193 +#define BSIM4v2_MOD_VFBCV 194 +#define BSIM4v2_MOD_ACDE 195 +#define BSIM4v2_MOD_MOIN 196 +#define BSIM4v2_MOD_NOFF 197 +#define BSIM4v2_MOD_IJTHDFWD 198 +#define BSIM4v2_MOD_ALPHA1 199 +#define BSIM4v2_MOD_VFB 200 +#define BSIM4v2_MOD_TOXM 201 +#define BSIM4v2_MOD_TCJ 202 +#define BSIM4v2_MOD_TCJSW 203 +#define BSIM4v2_MOD_TCJSWG 204 +#define BSIM4v2_MOD_TPB 205 +#define BSIM4v2_MOD_TPBSW 206 +#define BSIM4v2_MOD_TPBSWG 207 +#define BSIM4v2_MOD_VOFFCV 208 +#define BSIM4v2_MOD_GBMIN 209 +#define BSIM4v2_MOD_RBDB 210 +#define BSIM4v2_MOD_RBSB 211 +#define BSIM4v2_MOD_RBPB 212 +#define BSIM4v2_MOD_RBPS 213 +#define BSIM4v2_MOD_RBPD 214 +#define BSIM4v2_MOD_DMCG 215 +#define BSIM4v2_MOD_DMCI 216 +#define BSIM4v2_MOD_DMDG 217 +#define BSIM4v2_MOD_XGW 218 +#define BSIM4v2_MOD_XGL 219 +#define BSIM4v2_MOD_RSHG 220 +#define BSIM4v2_MOD_NGCON 221 +#define BSIM4v2_MOD_AGIDL 222 +#define BSIM4v2_MOD_BGIDL 223 +#define BSIM4v2_MOD_EGIDL 224 +#define BSIM4v2_MOD_IJTHSFWD 225 +#define BSIM4v2_MOD_XJBVD 226 +#define BSIM4v2_MOD_XJBVS 227 +#define BSIM4v2_MOD_BVD 228 +#define BSIM4v2_MOD_BVS 229 +#define BSIM4v2_MOD_TOXP 230 +#define BSIM4v2_MOD_DTOX 231 +#define BSIM4v2_MOD_XRCRG1 232 +#define BSIM4v2_MOD_XRCRG2 233 +#define BSIM4v2_MOD_EU 234 +#define BSIM4v2_MOD_IJTHSREV 235 +#define BSIM4v2_MOD_IJTHDREV 236 +#define BSIM4v2_MOD_MINV 237 +#define BSIM4v2_MOD_VOFFL 238 +#define BSIM4v2_MOD_PDITS 239 +#define BSIM4v2_MOD_PDITSD 240 +#define BSIM4v2_MOD_PDITSL 241 +#define BSIM4v2_MOD_TNOIA 242 +#define BSIM4v2_MOD_TNOIB 243 +#define BSIM4v2_MOD_NTNOI 244 +#define BSIM4v2_MOD_FPROUT 245 +#define BSIM4v2_MOD_LPEB 246 +#define BSIM4v2_MOD_DVTP0 247 +#define BSIM4v2_MOD_DVTP1 248 +#define BSIM4v2_MOD_CGIDL 249 +#define BSIM4v2_MOD_PHIN 250 +#define BSIM4v2_MOD_RDSWMIN 251 +#define BSIM4v2_MOD_RSW 252 +#define BSIM4v2_MOD_RDW 253 +#define BSIM4v2_MOD_RDWMIN 254 +#define BSIM4v2_MOD_RSWMIN 255 +#define BSIM4v2_MOD_NSD 256 +#define BSIM4v2_MOD_CKAPPAD 257 +#define BSIM4v2_MOD_DMCGT 258 +#define BSIM4v2_MOD_AIGC 259 +#define BSIM4v2_MOD_BIGC 260 +#define BSIM4v2_MOD_CIGC 261 +#define BSIM4v2_MOD_AIGBACC 262 +#define BSIM4v2_MOD_BIGBACC 263 +#define BSIM4v2_MOD_CIGBACC 264 +#define BSIM4v2_MOD_AIGBINV 265 +#define BSIM4v2_MOD_BIGBINV 266 +#define BSIM4v2_MOD_CIGBINV 267 +#define BSIM4v2_MOD_NIGC 268 +#define BSIM4v2_MOD_NIGBACC 269 +#define BSIM4v2_MOD_NIGBINV 270 +#define BSIM4v2_MOD_NTOX 271 +#define BSIM4v2_MOD_TOXREF 272 +#define BSIM4v2_MOD_EIGBINV 273 +#define BSIM4v2_MOD_PIGCD 274 +#define BSIM4v2_MOD_POXEDGE 275 +#define BSIM4v2_MOD_EPSROX 276 +#define BSIM4v2_MOD_AIGSD 277 +#define BSIM4v2_MOD_BIGSD 278 +#define BSIM4v2_MOD_CIGSD 279 +#define BSIM4v2_MOD_JSWGS 280 +#define BSIM4v2_MOD_JSWGD 281 + + +/* Length dependence */ +#define BSIM4v2_MOD_LCDSC 301 +#define BSIM4v2_MOD_LCDSCB 302 +#define BSIM4v2_MOD_LCIT 303 +#define BSIM4v2_MOD_LNFACTOR 304 +#define BSIM4v2_MOD_LXJ 305 +#define BSIM4v2_MOD_LVSAT 306 +#define BSIM4v2_MOD_LAT 307 +#define BSIM4v2_MOD_LA0 308 +#define BSIM4v2_MOD_LA1 309 +#define BSIM4v2_MOD_LA2 310 +#define BSIM4v2_MOD_LKETA 311 +#define BSIM4v2_MOD_LNSUB 312 +#define BSIM4v2_MOD_LNDEP 313 +#define BSIM4v2_MOD_LNGATE 315 +#define BSIM4v2_MOD_LGAMMA1 316 +#define BSIM4v2_MOD_LGAMMA2 317 +#define BSIM4v2_MOD_LVBX 318 +#define BSIM4v2_MOD_LVBM 320 +#define BSIM4v2_MOD_LXT 322 +#define BSIM4v2_MOD_LK1 325 +#define BSIM4v2_MOD_LKT1 326 +#define BSIM4v2_MOD_LKT1L 327 +#define BSIM4v2_MOD_LK2 328 +#define BSIM4v2_MOD_LKT2 329 +#define BSIM4v2_MOD_LK3 330 +#define BSIM4v2_MOD_LK3B 331 +#define BSIM4v2_MOD_LW0 332 +#define BSIM4v2_MOD_LLPE0 333 +#define BSIM4v2_MOD_LDVT0 334 +#define BSIM4v2_MOD_LDVT1 335 +#define BSIM4v2_MOD_LDVT2 336 +#define BSIM4v2_MOD_LDVT0W 337 +#define BSIM4v2_MOD_LDVT1W 338 +#define BSIM4v2_MOD_LDVT2W 339 +#define BSIM4v2_MOD_LDROUT 340 +#define BSIM4v2_MOD_LDSUB 341 +#define BSIM4v2_MOD_LVTH0 342 +#define BSIM4v2_MOD_LUA 343 +#define BSIM4v2_MOD_LUA1 344 +#define BSIM4v2_MOD_LUB 345 +#define BSIM4v2_MOD_LUB1 346 +#define BSIM4v2_MOD_LUC 347 +#define BSIM4v2_MOD_LUC1 348 +#define BSIM4v2_MOD_LU0 349 +#define BSIM4v2_MOD_LUTE 350 +#define BSIM4v2_MOD_LVOFF 351 +#define BSIM4v2_MOD_LDELTA 352 +#define BSIM4v2_MOD_LRDSW 353 +#define BSIM4v2_MOD_LPRT 354 +#define BSIM4v2_MOD_LLDD 355 +#define BSIM4v2_MOD_LETA 356 +#define BSIM4v2_MOD_LETA0 357 +#define BSIM4v2_MOD_LETAB 358 +#define BSIM4v2_MOD_LPCLM 359 +#define BSIM4v2_MOD_LPDIBL1 360 +#define BSIM4v2_MOD_LPDIBL2 361 +#define BSIM4v2_MOD_LPSCBE1 362 +#define BSIM4v2_MOD_LPSCBE2 363 +#define BSIM4v2_MOD_LPVAG 364 +#define BSIM4v2_MOD_LWR 365 +#define BSIM4v2_MOD_LDWG 366 +#define BSIM4v2_MOD_LDWB 367 +#define BSIM4v2_MOD_LB0 368 +#define BSIM4v2_MOD_LB1 369 +#define BSIM4v2_MOD_LALPHA0 370 +#define BSIM4v2_MOD_LBETA0 371 +#define BSIM4v2_MOD_LPDIBLB 374 +#define BSIM4v2_MOD_LPRWG 375 +#define BSIM4v2_MOD_LPRWB 376 +#define BSIM4v2_MOD_LCDSCD 377 +#define BSIM4v2_MOD_LAGS 378 + +#define BSIM4v2_MOD_LFRINGE 381 +#define BSIM4v2_MOD_LCGSL 383 +#define BSIM4v2_MOD_LCGDL 384 +#define BSIM4v2_MOD_LCKAPPAS 385 +#define BSIM4v2_MOD_LCF 386 +#define BSIM4v2_MOD_LCLC 387 +#define BSIM4v2_MOD_LCLE 388 +#define BSIM4v2_MOD_LVFBCV 389 +#define BSIM4v2_MOD_LACDE 390 +#define BSIM4v2_MOD_LMOIN 391 +#define BSIM4v2_MOD_LNOFF 392 +#define BSIM4v2_MOD_LALPHA1 394 +#define BSIM4v2_MOD_LVFB 395 +#define BSIM4v2_MOD_LVOFFCV 396 +#define BSIM4v2_MOD_LAGIDL 397 +#define BSIM4v2_MOD_LBGIDL 398 +#define BSIM4v2_MOD_LEGIDL 399 +#define BSIM4v2_MOD_LXRCRG1 400 +#define BSIM4v2_MOD_LXRCRG2 401 +#define BSIM4v2_MOD_LEU 402 +#define BSIM4v2_MOD_LMINV 403 +#define BSIM4v2_MOD_LPDITS 404 +#define BSIM4v2_MOD_LPDITSD 405 +#define BSIM4v2_MOD_LFPROUT 406 +#define BSIM4v2_MOD_LLPEB 407 +#define BSIM4v2_MOD_LDVTP0 408 +#define BSIM4v2_MOD_LDVTP1 409 +#define BSIM4v2_MOD_LCGIDL 410 +#define BSIM4v2_MOD_LPHIN 411 +#define BSIM4v2_MOD_LRSW 412 +#define BSIM4v2_MOD_LRDW 413 +#define BSIM4v2_MOD_LNSD 414 +#define BSIM4v2_MOD_LCKAPPAD 415 +#define BSIM4v2_MOD_LAIGC 416 +#define BSIM4v2_MOD_LBIGC 417 +#define BSIM4v2_MOD_LCIGC 418 +#define BSIM4v2_MOD_LAIGBACC 419 +#define BSIM4v2_MOD_LBIGBACC 420 +#define BSIM4v2_MOD_LCIGBACC 421 +#define BSIM4v2_MOD_LAIGBINV 422 +#define BSIM4v2_MOD_LBIGBINV 423 +#define BSIM4v2_MOD_LCIGBINV 424 +#define BSIM4v2_MOD_LNIGC 425 +#define BSIM4v2_MOD_LNIGBACC 426 +#define BSIM4v2_MOD_LNIGBINV 427 +#define BSIM4v2_MOD_LNTOX 428 +#define BSIM4v2_MOD_LEIGBINV 429 +#define BSIM4v2_MOD_LPIGCD 430 +#define BSIM4v2_MOD_LPOXEDGE 431 +#define BSIM4v2_MOD_LAIGSD 432 +#define BSIM4v2_MOD_LBIGSD 433 +#define BSIM4v2_MOD_LCIGSD 434 + + +/* Width dependence */ +#define BSIM4v2_MOD_WCDSC 481 +#define BSIM4v2_MOD_WCDSCB 482 +#define BSIM4v2_MOD_WCIT 483 +#define BSIM4v2_MOD_WNFACTOR 484 +#define BSIM4v2_MOD_WXJ 485 +#define BSIM4v2_MOD_WVSAT 486 +#define BSIM4v2_MOD_WAT 487 +#define BSIM4v2_MOD_WA0 488 +#define BSIM4v2_MOD_WA1 489 +#define BSIM4v2_MOD_WA2 490 +#define BSIM4v2_MOD_WKETA 491 +#define BSIM4v2_MOD_WNSUB 492 +#define BSIM4v2_MOD_WNDEP 493 +#define BSIM4v2_MOD_WNGATE 495 +#define BSIM4v2_MOD_WGAMMA1 496 +#define BSIM4v2_MOD_WGAMMA2 497 +#define BSIM4v2_MOD_WVBX 498 +#define BSIM4v2_MOD_WVBM 500 +#define BSIM4v2_MOD_WXT 502 +#define BSIM4v2_MOD_WK1 505 +#define BSIM4v2_MOD_WKT1 506 +#define BSIM4v2_MOD_WKT1L 507 +#define BSIM4v2_MOD_WK2 508 +#define BSIM4v2_MOD_WKT2 509 +#define BSIM4v2_MOD_WK3 510 +#define BSIM4v2_MOD_WK3B 511 +#define BSIM4v2_MOD_WW0 512 +#define BSIM4v2_MOD_WLPE0 513 +#define BSIM4v2_MOD_WDVT0 514 +#define BSIM4v2_MOD_WDVT1 515 +#define BSIM4v2_MOD_WDVT2 516 +#define BSIM4v2_MOD_WDVT0W 517 +#define BSIM4v2_MOD_WDVT1W 518 +#define BSIM4v2_MOD_WDVT2W 519 +#define BSIM4v2_MOD_WDROUT 520 +#define BSIM4v2_MOD_WDSUB 521 +#define BSIM4v2_MOD_WVTH0 522 +#define BSIM4v2_MOD_WUA 523 +#define BSIM4v2_MOD_WUA1 524 +#define BSIM4v2_MOD_WUB 525 +#define BSIM4v2_MOD_WUB1 526 +#define BSIM4v2_MOD_WUC 527 +#define BSIM4v2_MOD_WUC1 528 +#define BSIM4v2_MOD_WU0 529 +#define BSIM4v2_MOD_WUTE 530 +#define BSIM4v2_MOD_WVOFF 531 +#define BSIM4v2_MOD_WDELTA 532 +#define BSIM4v2_MOD_WRDSW 533 +#define BSIM4v2_MOD_WPRT 534 +#define BSIM4v2_MOD_WLDD 535 +#define BSIM4v2_MOD_WETA 536 +#define BSIM4v2_MOD_WETA0 537 +#define BSIM4v2_MOD_WETAB 538 +#define BSIM4v2_MOD_WPCLM 539 +#define BSIM4v2_MOD_WPDIBL1 540 +#define BSIM4v2_MOD_WPDIBL2 541 +#define BSIM4v2_MOD_WPSCBE1 542 +#define BSIM4v2_MOD_WPSCBE2 543 +#define BSIM4v2_MOD_WPVAG 544 +#define BSIM4v2_MOD_WWR 545 +#define BSIM4v2_MOD_WDWG 546 +#define BSIM4v2_MOD_WDWB 547 +#define BSIM4v2_MOD_WB0 548 +#define BSIM4v2_MOD_WB1 549 +#define BSIM4v2_MOD_WALPHA0 550 +#define BSIM4v2_MOD_WBETA0 551 +#define BSIM4v2_MOD_WPDIBLB 554 +#define BSIM4v2_MOD_WPRWG 555 +#define BSIM4v2_MOD_WPRWB 556 +#define BSIM4v2_MOD_WCDSCD 557 +#define BSIM4v2_MOD_WAGS 558 + +#define BSIM4v2_MOD_WFRINGE 561 +#define BSIM4v2_MOD_WCGSL 563 +#define BSIM4v2_MOD_WCGDL 564 +#define BSIM4v2_MOD_WCKAPPAS 565 +#define BSIM4v2_MOD_WCF 566 +#define BSIM4v2_MOD_WCLC 567 +#define BSIM4v2_MOD_WCLE 568 +#define BSIM4v2_MOD_WVFBCV 569 +#define BSIM4v2_MOD_WACDE 570 +#define BSIM4v2_MOD_WMOIN 571 +#define BSIM4v2_MOD_WNOFF 572 +#define BSIM4v2_MOD_WALPHA1 574 +#define BSIM4v2_MOD_WVFB 575 +#define BSIM4v2_MOD_WVOFFCV 576 +#define BSIM4v2_MOD_WAGIDL 577 +#define BSIM4v2_MOD_WBGIDL 578 +#define BSIM4v2_MOD_WEGIDL 579 +#define BSIM4v2_MOD_WXRCRG1 580 +#define BSIM4v2_MOD_WXRCRG2 581 +#define BSIM4v2_MOD_WEU 582 +#define BSIM4v2_MOD_WMINV 583 +#define BSIM4v2_MOD_WPDITS 584 +#define BSIM4v2_MOD_WPDITSD 585 +#define BSIM4v2_MOD_WFPROUT 586 +#define BSIM4v2_MOD_WLPEB 587 +#define BSIM4v2_MOD_WDVTP0 588 +#define BSIM4v2_MOD_WDVTP1 589 +#define BSIM4v2_MOD_WCGIDL 590 +#define BSIM4v2_MOD_WPHIN 591 +#define BSIM4v2_MOD_WRSW 592 +#define BSIM4v2_MOD_WRDW 593 +#define BSIM4v2_MOD_WNSD 594 +#define BSIM4v2_MOD_WCKAPPAD 595 +#define BSIM4v2_MOD_WAIGC 596 +#define BSIM4v2_MOD_WBIGC 597 +#define BSIM4v2_MOD_WCIGC 598 +#define BSIM4v2_MOD_WAIGBACC 599 +#define BSIM4v2_MOD_WBIGBACC 600 +#define BSIM4v2_MOD_WCIGBACC 601 +#define BSIM4v2_MOD_WAIGBINV 602 +#define BSIM4v2_MOD_WBIGBINV 603 +#define BSIM4v2_MOD_WCIGBINV 604 +#define BSIM4v2_MOD_WNIGC 605 +#define BSIM4v2_MOD_WNIGBACC 606 +#define BSIM4v2_MOD_WNIGBINV 607 +#define BSIM4v2_MOD_WNTOX 608 +#define BSIM4v2_MOD_WEIGBINV 609 +#define BSIM4v2_MOD_WPIGCD 610 +#define BSIM4v2_MOD_WPOXEDGE 611 +#define BSIM4v2_MOD_WAIGSD 612 +#define BSIM4v2_MOD_WBIGSD 613 +#define BSIM4v2_MOD_WCIGSD 614 + + +/* Cross-term dependence */ +#define BSIM4v2_MOD_PCDSC 661 +#define BSIM4v2_MOD_PCDSCB 662 +#define BSIM4v2_MOD_PCIT 663 +#define BSIM4v2_MOD_PNFACTOR 664 +#define BSIM4v2_MOD_PXJ 665 +#define BSIM4v2_MOD_PVSAT 666 +#define BSIM4v2_MOD_PAT 667 +#define BSIM4v2_MOD_PA0 668 +#define BSIM4v2_MOD_PA1 669 +#define BSIM4v2_MOD_PA2 670 +#define BSIM4v2_MOD_PKETA 671 +#define BSIM4v2_MOD_PNSUB 672 +#define BSIM4v2_MOD_PNDEP 673 +#define BSIM4v2_MOD_PNGATE 675 +#define BSIM4v2_MOD_PGAMMA1 676 +#define BSIM4v2_MOD_PGAMMA2 677 +#define BSIM4v2_MOD_PVBX 678 + +#define BSIM4v2_MOD_PVBM 680 + +#define BSIM4v2_MOD_PXT 682 +#define BSIM4v2_MOD_PK1 685 +#define BSIM4v2_MOD_PKT1 686 +#define BSIM4v2_MOD_PKT1L 687 +#define BSIM4v2_MOD_PK2 688 +#define BSIM4v2_MOD_PKT2 689 +#define BSIM4v2_MOD_PK3 690 +#define BSIM4v2_MOD_PK3B 691 +#define BSIM4v2_MOD_PW0 692 +#define BSIM4v2_MOD_PLPE0 693 + +#define BSIM4v2_MOD_PDVT0 694 +#define BSIM4v2_MOD_PDVT1 695 +#define BSIM4v2_MOD_PDVT2 696 + +#define BSIM4v2_MOD_PDVT0W 697 +#define BSIM4v2_MOD_PDVT1W 698 +#define BSIM4v2_MOD_PDVT2W 699 + +#define BSIM4v2_MOD_PDROUT 700 +#define BSIM4v2_MOD_PDSUB 701 +#define BSIM4v2_MOD_PVTH0 702 +#define BSIM4v2_MOD_PUA 703 +#define BSIM4v2_MOD_PUA1 704 +#define BSIM4v2_MOD_PUB 705 +#define BSIM4v2_MOD_PUB1 706 +#define BSIM4v2_MOD_PUC 707 +#define BSIM4v2_MOD_PUC1 708 +#define BSIM4v2_MOD_PU0 709 +#define BSIM4v2_MOD_PUTE 710 +#define BSIM4v2_MOD_PVOFF 711 +#define BSIM4v2_MOD_PDELTA 712 +#define BSIM4v2_MOD_PRDSW 713 +#define BSIM4v2_MOD_PPRT 714 +#define BSIM4v2_MOD_PLDD 715 +#define BSIM4v2_MOD_PETA 716 +#define BSIM4v2_MOD_PETA0 717 +#define BSIM4v2_MOD_PETAB 718 +#define BSIM4v2_MOD_PPCLM 719 +#define BSIM4v2_MOD_PPDIBL1 720 +#define BSIM4v2_MOD_PPDIBL2 721 +#define BSIM4v2_MOD_PPSCBE1 722 +#define BSIM4v2_MOD_PPSCBE2 723 +#define BSIM4v2_MOD_PPVAG 724 +#define BSIM4v2_MOD_PWR 725 +#define BSIM4v2_MOD_PDWG 726 +#define BSIM4v2_MOD_PDWB 727 +#define BSIM4v2_MOD_PB0 728 +#define BSIM4v2_MOD_PB1 729 +#define BSIM4v2_MOD_PALPHA0 730 +#define BSIM4v2_MOD_PBETA0 731 +#define BSIM4v2_MOD_PPDIBLB 734 + +#define BSIM4v2_MOD_PPRWG 735 +#define BSIM4v2_MOD_PPRWB 736 + +#define BSIM4v2_MOD_PCDSCD 737 +#define BSIM4v2_MOD_PAGS 738 + +#define BSIM4v2_MOD_PFRINGE 741 +#define BSIM4v2_MOD_PCGSL 743 +#define BSIM4v2_MOD_PCGDL 744 +#define BSIM4v2_MOD_PCKAPPAS 745 +#define BSIM4v2_MOD_PCF 746 +#define BSIM4v2_MOD_PCLC 747 +#define BSIM4v2_MOD_PCLE 748 +#define BSIM4v2_MOD_PVFBCV 749 +#define BSIM4v2_MOD_PACDE 750 +#define BSIM4v2_MOD_PMOIN 751 +#define BSIM4v2_MOD_PNOFF 752 +#define BSIM4v2_MOD_PALPHA1 754 +#define BSIM4v2_MOD_PVFB 755 +#define BSIM4v2_MOD_PVOFFCV 756 +#define BSIM4v2_MOD_PAGIDL 757 +#define BSIM4v2_MOD_PBGIDL 758 +#define BSIM4v2_MOD_PEGIDL 759 +#define BSIM4v2_MOD_PXRCRG1 760 +#define BSIM4v2_MOD_PXRCRG2 761 +#define BSIM4v2_MOD_PEU 762 +#define BSIM4v2_MOD_PMINV 763 +#define BSIM4v2_MOD_PPDITS 764 +#define BSIM4v2_MOD_PPDITSD 765 +#define BSIM4v2_MOD_PFPROUT 766 +#define BSIM4v2_MOD_PLPEB 767 +#define BSIM4v2_MOD_PDVTP0 768 +#define BSIM4v2_MOD_PDVTP1 769 +#define BSIM4v2_MOD_PCGIDL 770 +#define BSIM4v2_MOD_PPHIN 771 +#define BSIM4v2_MOD_PRSW 772 +#define BSIM4v2_MOD_PRDW 773 +#define BSIM4v2_MOD_PNSD 774 +#define BSIM4v2_MOD_PCKAPPAD 775 +#define BSIM4v2_MOD_PAIGC 776 +#define BSIM4v2_MOD_PBIGC 777 +#define BSIM4v2_MOD_PCIGC 778 +#define BSIM4v2_MOD_PAIGBACC 779 +#define BSIM4v2_MOD_PBIGBACC 780 +#define BSIM4v2_MOD_PCIGBACC 781 +#define BSIM4v2_MOD_PAIGBINV 782 +#define BSIM4v2_MOD_PBIGBINV 783 +#define BSIM4v2_MOD_PCIGBINV 784 +#define BSIM4v2_MOD_PNIGC 785 +#define BSIM4v2_MOD_PNIGBACC 786 +#define BSIM4v2_MOD_PNIGBINV 787 +#define BSIM4v2_MOD_PNTOX 788 +#define BSIM4v2_MOD_PEIGBINV 789 +#define BSIM4v2_MOD_PPIGCD 790 +#define BSIM4v2_MOD_PPOXEDGE 791 +#define BSIM4v2_MOD_PAIGSD 792 +#define BSIM4v2_MOD_PBIGSD 793 +#define BSIM4v2_MOD_PCIGSD 794 + +#define BSIM4v2_MOD_TNOM 831 +#define BSIM4v2_MOD_CGSO 832 +#define BSIM4v2_MOD_CGDO 833 +#define BSIM4v2_MOD_CGBO 834 +#define BSIM4v2_MOD_XPART 835 +#define BSIM4v2_MOD_RSH 836 +#define BSIM4v2_MOD_JSS 837 +#define BSIM4v2_MOD_PBS 838 +#define BSIM4v2_MOD_MJS 839 +#define BSIM4v2_MOD_PBSWS 840 +#define BSIM4v2_MOD_MJSWS 841 +#define BSIM4v2_MOD_CJS 842 +#define BSIM4v2_MOD_CJSWS 843 +#define BSIM4v2_MOD_NMOS 844 +#define BSIM4v2_MOD_PMOS 845 +#define BSIM4v2_MOD_NOIA 846 +#define BSIM4v2_MOD_NOIB 847 +#define BSIM4v2_MOD_NOIC 848 +#define BSIM4v2_MOD_LINT 849 +#define BSIM4v2_MOD_LL 850 +#define BSIM4v2_MOD_LLN 851 +#define BSIM4v2_MOD_LW 852 +#define BSIM4v2_MOD_LWN 853 +#define BSIM4v2_MOD_LWL 854 +#define BSIM4v2_MOD_LMIN 855 +#define BSIM4v2_MOD_LMAX 856 +#define BSIM4v2_MOD_WINT 857 +#define BSIM4v2_MOD_WL 858 +#define BSIM4v2_MOD_WLN 859 +#define BSIM4v2_MOD_WW 860 +#define BSIM4v2_MOD_WWN 861 +#define BSIM4v2_MOD_WWL 862 +#define BSIM4v2_MOD_WMIN 863 +#define BSIM4v2_MOD_WMAX 864 +#define BSIM4v2_MOD_DWC 865 +#define BSIM4v2_MOD_DLC 866 +#define BSIM4v2_MOD_XL 867 +#define BSIM4v2_MOD_XW 868 +#define BSIM4v2_MOD_EM 869 +#define BSIM4v2_MOD_EF 870 +#define BSIM4v2_MOD_AF 871 +#define BSIM4v2_MOD_KF 872 +#define BSIM4v2_MOD_NJS 873 +#define BSIM4v2_MOD_XTIS 874 +#define BSIM4v2_MOD_PBSWGS 875 +#define BSIM4v2_MOD_MJSWGS 876 +#define BSIM4v2_MOD_CJSWGS 877 +#define BSIM4v2_MOD_JSWS 878 +#define BSIM4v2_MOD_LLC 879 +#define BSIM4v2_MOD_LWC 880 +#define BSIM4v2_MOD_LWLC 881 +#define BSIM4v2_MOD_WLC 882 +#define BSIM4v2_MOD_WWC 883 +#define BSIM4v2_MOD_WWLC 884 +#define BSIM4v2_MOD_DWJ 885 +#define BSIM4v2_MOD_JSD 886 +#define BSIM4v2_MOD_PBD 887 +#define BSIM4v2_MOD_MJD 888 +#define BSIM4v2_MOD_PBSWD 889 +#define BSIM4v2_MOD_MJSWD 890 +#define BSIM4v2_MOD_CJD 891 +#define BSIM4v2_MOD_CJSWD 892 +#define BSIM4v2_MOD_NJD 893 +#define BSIM4v2_MOD_XTID 894 +#define BSIM4v2_MOD_PBSWGD 895 +#define BSIM4v2_MOD_MJSWGD 896 +#define BSIM4v2_MOD_CJSWGD 897 +#define BSIM4v2_MOD_JSWD 898 +#define BSIM4v2_MOD_DLCIG 899 + +/* device questions */ +#define BSIM4v2_DNODE 945 +#define BSIM4v2_GNODEEXT 946 +#define BSIM4v2_SNODE 947 +#define BSIM4v2_BNODE 948 +#define BSIM4v2_DNODEPRIME 949 +#define BSIM4v2_GNODEPRIME 950 +#define BSIM4v2_GNODEMIDE 951 +#define BSIM4v2_GNODEMID 952 +#define BSIM4v2_SNODEPRIME 953 +#define BSIM4v2_BNODEPRIME 954 +#define BSIM4v2_DBNODE 955 +#define BSIM4v2_SBNODE 956 +#define BSIM4v2_VBD 957 +#define BSIM4v2_VBS 958 +#define BSIM4v2_VGS 959 +#define BSIM4v2_VDS 960 +#define BSIM4v2_CD 961 +#define BSIM4v2_CBS 962 +#define BSIM4v2_CBD 963 +#define BSIM4v2_GM 964 +#define BSIM4v2_GDS 965 +#define BSIM4v2_GMBS 966 +#define BSIM4v2_GBD 967 +#define BSIM4v2_GBS 968 +#define BSIM4v2_QB 969 +#define BSIM4v2_CQB 970 +#define BSIM4v2_QG 971 +#define BSIM4v2_CQG 972 +#define BSIM4v2_QD 973 +#define BSIM4v2_CQD 974 +#define BSIM4v2_CGGB 975 +#define BSIM4v2_CGDB 976 +#define BSIM4v2_CGSB 977 +#define BSIM4v2_CBGB 978 +#define BSIM4v2_CAPBD 979 +#define BSIM4v2_CQBD 980 +#define BSIM4v2_CAPBS 981 +#define BSIM4v2_CQBS 982 +#define BSIM4v2_CDGB 983 +#define BSIM4v2_CDDB 984 +#define BSIM4v2_CDSB 985 +#define BSIM4v2_VON 986 +#define BSIM4v2_VDSAT 987 +#define BSIM4v2_QBS 988 +#define BSIM4v2_QBD 989 +#define BSIM4v2_SOURCECONDUCT 990 +#define BSIM4v2_DRAINCONDUCT 991 +#define BSIM4v2_CBDB 992 +#define BSIM4v2_CBSB 993 +#define BSIM4v2_CSUB 994 +#define BSIM4v2_QINV 995 +#define BSIM4v2_IGIDL 996 +#define BSIM4v2_CSGB 997 +#define BSIM4v2_CSDB 998 +#define BSIM4v2_CSSB 999 +#define BSIM4v2_CGBB 1000 +#define BSIM4v2_CDBB 1001 +#define BSIM4v2_CSBB 1002 +#define BSIM4v2_CBBB 1003 +#define BSIM4v2_QS 1004 +#define BSIM4v2_IGISL 1005 +#define BSIM4v2_IGS 1006 +#define BSIM4v2_IGD 1007 +#define BSIM4v2_IGB 1008 +#define BSIM4v2_IGCS 1009 +#define BSIM4v2_IGCD 1010 + + +# +#include "bsim4v2ext.h" + +#ifdef __STDC__ +extern void BSIM4v2evaluate(double,double,double,BSIM4v2instance*,BSIM4v2model*, + double*,double*,double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, CKTcircuit*); +extern int BSIM4v2debug(BSIM4v2model*, BSIM4v2instance*, CKTcircuit*, int); +extern int BSIM4v2checkModel(BSIM4v2model*, BSIM4v2instance*, CKTcircuit*); +#else /* stdc */ +extern void BSIM4v2evaluate(); +extern int BSIM4v2debug(); +extern int BSIM4v2checkModel(); +#endif /* stdc */ + +#endif /*BSIM4v2*/ diff --git a/src/spicelib/devices/bsim4v2/bsim4v2ext.h b/src/spicelib/devices/bsim4v2/bsim4v2ext.h new file mode 100644 index 000000000..4c46060bd --- /dev/null +++ b/src/spicelib/devices/bsim4v2/bsim4v2ext.h @@ -0,0 +1,54 @@ +/********** +Copyright 2001 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu +Author: 2001 Xuemei Xi +File: bsim4ext.h +**********/ + +#ifdef __STDC__ +extern int BSIM4v2acLoad(GENmodel *,CKTcircuit*); +extern int BSIM4v2ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); +extern int BSIM4v2convTest(GENmodel *,CKTcircuit*); +extern int BSIM4v2delete(GENmodel*,IFuid,GENinstance**); +extern void BSIM4v2destroy(GENmodel**); +extern int BSIM4v2getic(GENmodel*,CKTcircuit*); +extern int BSIM4v2load(GENmodel*,CKTcircuit*); +extern int BSIM4v2mAsk(CKTcircuit*,GENmodel *,int, IFvalue*); +extern int BSIM4v2mDelete(GENmodel**,IFuid,GENmodel*); +extern int BSIM4v2mParam(int,IFvalue*,GENmodel*); +extern void BSIM4v2mosCap(CKTcircuit*, double, double, double, double, + double, double, double, double, double, double, double, + double, double, double, double, double, double, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*); +extern int BSIM4v2param(int,IFvalue*,GENinstance*,IFvalue*); +extern int BSIM4v2pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); +extern int BSIM4v2setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); +extern int BSIM4v2temp(GENmodel*,CKTcircuit*); +extern int BSIM4v2trunc(GENmodel*,CKTcircuit*,double*); +extern int BSIM4v2noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*); +extern int BSIM4v2unsetup(GENmodel*,CKTcircuit*); + +#else /* stdc */ +extern int BSIM4v2acLoad(); +extern int BSIM4v2delete(); +extern void BSIM4v2destroy(); +extern int BSIM4v2getic(); +extern int BSIM4v2load(); +extern int BSIM4v2mDelete(); +extern int BSIM4v2ask(); +extern int BSIM4v2mAsk(); +extern int BSIM4v2convTest(); +extern int BSIM4v2temp(); +extern int BSIM4v2mParam(); +extern void BSIM4v2mosCap(); +extern int BSIM4v2param(); +extern int BSIM4v2pzLoad(); +extern int BSIM4v2setup(); +extern int BSIM4v2trunc(); +extern int BSIM4v2noise(); +extern int BSIM4v2unsetup(); + +#endif /* stdc */ + diff --git a/src/spicelib/devices/bsim4v2/bsim4v2init.c b/src/spicelib/devices/bsim4v2/bsim4v2init.c new file mode 100644 index 000000000..7255da165 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/bsim4v2init.c @@ -0,0 +1,64 @@ +#include + +#include + +#include "bsim4v2itf.h" +#include "bsim4v2ext.h" +#include "bsim4v2init.h" + + +SPICEdev BSIM4v2info = { + { + "BSIM4v2", + "Berkeley Short Channel IGFET Model-4", + + &BSIM4v2nSize, + &BSIM4v2nSize, + BSIM4v2names, + + &BSIM4v2pTSize, + BSIM4v2pTable, + + &BSIM4v2mPTSize, + BSIM4v2mPTable, + DEV_DEFAULT + }, + + DEVparam : BSIM4v2param, + DEVmodParam : BSIM4v2mParam, + DEVload : BSIM4v2load, + DEVsetup : BSIM4v2setup, + DEVunsetup : BSIM4v2unsetup, + DEVpzSetup : BSIM4v2setup, + DEVtemperature: BSIM4v2temp, + DEVtrunc : BSIM4v2trunc, + DEVfindBranch : NULL, + DEVacLoad : BSIM4v2acLoad, + DEVaccept : NULL, + DEVdestroy : BSIM4v2destroy, + DEVmodDelete : BSIM4v2mDelete, + DEVdelete : BSIM4v2delete, + DEVsetic : BSIM4v2getic, + DEVask : BSIM4v2ask, + DEVmodAsk : BSIM4v2mAsk, + DEVpzLoad : BSIM4v2pzLoad, + DEVconvTest : BSIM4v2convTest, + DEVsenSetup : NULL, + DEVsenLoad : NULL, + DEVsenUpdate : NULL, + DEVsenAcLoad : NULL, + DEVsenPrint : NULL, + DEVsenTrunc : NULL, + DEVdisto : NULL, + DEVnoise : BSIM4v2noise, + + DEVinstSize : &BSIM4v2iSize, + DEVmodSize : &BSIM4v2mSize +}; + + +SPICEdev * +get_bsim4v2_info(void) +{ + return &BSIM4v2info; +} diff --git a/src/spicelib/devices/bsim4v2/bsim4v2init.h b/src/spicelib/devices/bsim4v2/bsim4v2init.h new file mode 100644 index 000000000..554dab830 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/bsim4v2init.h @@ -0,0 +1,13 @@ +#ifndef _BSIM4V2INIT_H +#define _BSIM4V2INIT_H + +extern IFparm BSIM4v2pTable[ ]; +extern IFparm BSIM4v2mPTable[ ]; +extern char *BSIM4v2names[ ]; +extern int BSIM4v2pTSize; +extern int BSIM4v2mPTSize; +extern int BSIM4v2nSize; +extern int BSIM4v2iSize; +extern int BSIM4v2mSize; + +#endif diff --git a/src/spicelib/devices/bsim4v2/bsim4v2itf.h b/src/spicelib/devices/bsim4v2/bsim4v2itf.h new file mode 100644 index 000000000..bfcc49538 --- /dev/null +++ b/src/spicelib/devices/bsim4v2/bsim4v2itf.h @@ -0,0 +1,13 @@ +/********** +Copyright 2001 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu. +Author: 2001 Xuemei Xi +File: bsim4itf.h +**********/ + +#ifndef DEV_BSIM4V2 +#define DEV_BSIM4V2 + +SPICEdev *get_bsim4v2_info(void); + +#endif diff --git a/src/spicelib/devices/bsim4v3/B4TERMS_OF_USE b/src/spicelib/devices/bsim4v3/B4TERMS_OF_USE new file mode 100644 index 000000000..5cc4023bb --- /dev/null +++ b/src/spicelib/devices/bsim4v3/B4TERMS_OF_USE @@ -0,0 +1,33 @@ + +The terms under which the software is provided are as the following. + +Software is distributed as is, completely without warranty or service +support. The University of California and its employees are not liable +for the condition or performance of the software. + +The University owns the copyright but shall not be liable for any +infringement of copyright or other proprietary rights brought by third +parties against the users of the software. + +The University of California hereby disclaims all implied warranties. + +The University of California grants the users the right to modify, copy, +and redistribute the software and documentation, both within the user's +organization and externally, subject to the following restrictions: + +1. The users agree not to charge for the University of California code + itself but may charge for additions, extensions, or support. + +2. In any product based on the software, the users agree to acknowledge + the UC Berkeley BSIM Research Group that developed the software. This + acknowledgment shall appear in the product documentation. + +3. The users agree to obey all U.S. Government restrictions governing + redistribution or export of the software. + +4. The users agree to reproduce any copyright notice which appears on + the software on any copy or modification of such made available + to others. + +Chenming Hu, and Weidong Liu +Mar. 2000 diff --git a/src/spicelib/devices/bsim4v3/Makefile.am b/src/spicelib/devices/bsim4v3/Makefile.am new file mode 100644 index 000000000..c746d228e --- /dev/null +++ b/src/spicelib/devices/bsim4v3/Makefile.am @@ -0,0 +1,35 @@ +## Process this file with automake to produce Makefile.in + +noinst_LIBRARIES = libbsim4v3.a + +libbsim4v3_a_SOURCES = \ + b4v3.c \ + b4v3acld.c \ + b4v3ask.c \ + b4v3check.c \ + b4v3cvtest.c \ + b4v3del.c \ + b4v3dest.c \ + b4v3geo.c \ + b4v3getic.c \ + b4v3ld.c \ + b4v3mask.c \ + b4v3mdel.c \ + b4v3mpar.c \ + b4v3noi.c \ + b4v3par.c \ + b4v3pzld.c \ + b4v3set.c \ + b4v3temp.c \ + b4v3trunc.c \ + bsim4v3def.h \ + bsim4v3ext.h \ + bsim4v3init.c \ + bsim4v3init.h \ + bsim4v3itf.h + + + +INCLUDES = -I$(top_srcdir)/src/include + +MAINTAINERCLEANFILES = Makefile.in diff --git a/src/spicelib/devices/bsim4v3/b4v3.c b/src/spicelib/devices/bsim4v3/b4v3.c new file mode 100644 index 000000000..360ab1ef3 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3.c @@ -0,0 +1,786 @@ +/**** BSIM4.3.0 Released by Jane Xuemei Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include "devdefs.h" +#include "bsim4v3def.h" +#include "suffix.h" + +IFparm BSIM4v3pTable[] = { /* parameters */ +IOP( "l", BSIM4v3_L, IF_REAL , "Length"), +IOP( "w", BSIM4v3_W, IF_REAL , "Width"), +IOP( "nf", BSIM4v3_NF, IF_REAL , "Number of fingers"), +IOP( "sa", BSIM4v3_SA, IF_REAL , "distance between OD edge to poly of one side "), +IOP( "sb", BSIM4v3_SB, IF_REAL , "distance between OD edge to poly of the other side"), +IOP( "sd", BSIM4v3_SD, IF_REAL , "distance between neighbour fingers"), +IOP( "min", BSIM4v3_MIN, IF_INTEGER , "Minimize either D or S"), +IOP( "ad", BSIM4v3_AD, IF_REAL , "Drain area"), +IOP( "as", BSIM4v3_AS, IF_REAL , "Source area"), +IOP( "pd", BSIM4v3_PD, IF_REAL , "Drain perimeter"), +IOP( "ps", BSIM4v3_PS, IF_REAL , "Source perimeter"), +IOP( "nrd", BSIM4v3_NRD, IF_REAL , "Number of squares in drain"), +IOP( "nrs", BSIM4v3_NRS, IF_REAL , "Number of squares in source"), +IOP( "off", BSIM4v3_OFF, IF_FLAG , "Device is initially off"), +IOP( "rbdb", BSIM4v3_RBDB, IF_REAL , "Body resistance"), +IOP( "rbsb", BSIM4v3_RBSB, IF_REAL , "Body resistance"), +IOP( "rbpb", BSIM4v3_RBPB, IF_REAL , "Body resistance"), +IOP( "rbps", BSIM4v3_RBPS, IF_REAL , "Body resistance"), +IOP( "rbpd", BSIM4v3_RBPD, IF_REAL , "Body resistance"), +IOP( "trnqsmod", BSIM4v3_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"), +IOP( "acnqsmod", BSIM4v3_ACNQSMOD, IF_INTEGER, "AC NQS model selector"), +IOP( "rbodymod", BSIM4v3_RBODYMOD, IF_INTEGER, "Distributed body R model selector"), +IOP( "rgatemod", BSIM4v3_RGATEMOD, IF_INTEGER, "Gate resistance model selector"), +IOP( "geomod", BSIM4v3_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"), +IOP( "rgeomod", BSIM4v3_RGEOMOD, IF_INTEGER, "S/D resistance and contact model selector"), +IP( "ic", BSIM4v3_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"), +OP( "gmbs", BSIM4v3_GMBS, IF_REAL, "Gmb"), +OP( "gm", BSIM4v3_GM, IF_REAL, "Gm"), +OP( "gds", BSIM4v3_GDS, IF_REAL, "Gds"), +OP( "vdsat", BSIM4v3_VDSAT, IF_REAL, "Vdsat"), +OP( "vth", BSIM4v3_VON, IF_REAL, "Vth"), +OP( "id", BSIM4v3_CD, IF_REAL, "Ids"), +OP( "ibd", BSIM4v3_CBD, IF_REAL, "Ibd"), +OP( "ibs", BSIM4v3_CBS, IF_REAL, "Ibs"), +OP( "isub", BSIM4v3_CSUB, IF_REAL, "Isub"), +OP( "igidl", BSIM4v3_IGIDL, IF_REAL, "Igidl"), +OP( "igisl", BSIM4v3_IGISL, IF_REAL, "Igisl"), +OP( "igs", BSIM4v3_IGS, IF_REAL, "Igs"), +OP( "igd", BSIM4v3_IGD, IF_REAL, "Igd"), +OP( "igb", BSIM4v3_IGB, IF_REAL, "Igb"), +OP( "igcs", BSIM4v3_IGCS, IF_REAL, "Igcs"), +OP( "igcd", BSIM4v3_IGCD, IF_REAL, "Igcd"), +OP( "vbs", BSIM4v3_VBS, IF_REAL, "Vbs"), +OP( "vgs", BSIM4v3_VGS, IF_REAL, "Vgs"), +OP( "vds", BSIM4v3_VDS, IF_REAL, "Vds"), +OP( "cgg", BSIM4v3_CGGB, IF_REAL, "Cggb"), +OP( "cgs", BSIM4v3_CGSB, IF_REAL, "Cgsb"), +OP( "cgd", BSIM4v3_CGDB, IF_REAL, "Cgdb"), +OP( "cbg", BSIM4v3_CBGB, IF_REAL, "Cbgb"), +OP( "cbd", BSIM4v3_CBDB, IF_REAL, "Cbdb"), +OP( "cbs", BSIM4v3_CBSB, IF_REAL, "Cbsb"), +OP( "cdg", BSIM4v3_CDGB, IF_REAL, "Cdgb"), +OP( "cdd", BSIM4v3_CDDB, IF_REAL, "Cddb"), +OP( "cds", BSIM4v3_CDSB, IF_REAL, "Cdsb"), +OP( "csg", BSIM4v3_CSGB, IF_REAL, "Csgb"), +OP( "csd", BSIM4v3_CSDB, IF_REAL, "Csdb"), +OP( "css", BSIM4v3_CSSB, IF_REAL, "Cssb"), +OP( "cgb", BSIM4v3_CGBB, IF_REAL, "Cgbb"), +OP( "cdb", BSIM4v3_CDBB, IF_REAL, "Cdbb"), +OP( "csb", BSIM4v3_CSBB, IF_REAL, "Csbb"), +OP( "cbb", BSIM4v3_CBBB, IF_REAL, "Cbbb"), +OP( "capbd", BSIM4v3_CAPBD, IF_REAL, "Capbd"), +OP( "capbs", BSIM4v3_CAPBS, IF_REAL, "Capbs"), +OP( "qg", BSIM4v3_QG, IF_REAL, "Qgate"), +OP( "qb", BSIM4v3_QB, IF_REAL, "Qbulk"), +OP( "qd", BSIM4v3_QD, IF_REAL, "Qdrain"), +OP( "qs", BSIM4v3_QS, IF_REAL, "Qsource"), +OP( "qinv", BSIM4v3_QINV, IF_REAL, "Qinversion"), +}; + +IFparm BSIM4v3mPTable[] = { /* model parameters */ +IOP( "capmod", BSIM4v3_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"), +IOP( "diomod", BSIM4v3_MOD_DIOMOD, IF_INTEGER, "Diode IV model selector"), +IOP( "rdsmod", BSIM4v3_MOD_RDSMOD, IF_INTEGER, "Bias-dependent S/D resistance model selector"), +IOP( "trnqsmod", BSIM4v3_MOD_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"), +IOP( "acnqsmod", BSIM4v3_MOD_ACNQSMOD, IF_INTEGER, "AC NQS model selector"), +IOP( "mobmod", BSIM4v3_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"), +IOP( "rbodymod", BSIM4v3_MOD_RBODYMOD, IF_INTEGER, "Distributed body R model selector"), +IOP( "rgatemod", BSIM4v3_MOD_RGATEMOD, IF_INTEGER, "Gate R model selector"), +IOP( "permod", BSIM4v3_MOD_PERMOD, IF_INTEGER, "Pd and Ps model selector"), +IOP( "geomod", BSIM4v3_MOD_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"), +IOP( "fnoimod", BSIM4v3_MOD_FNOIMOD, IF_INTEGER, "Flicker noise model selector"), +IOP( "tnoimod", BSIM4v3_MOD_TNOIMOD, IF_INTEGER, "Thermal noise model selector"), +IOP( "igcmod", BSIM4v3_MOD_IGCMOD, IF_INTEGER, "Gate-to-channel Ig model selector"), +IOP( "igbmod", BSIM4v3_MOD_IGBMOD, IF_INTEGER, "Gate-to-body Ig model selector"), +IOP( "tempmod", BSIM4v3_MOD_TEMPMOD, IF_INTEGER, "Temperature model selector"), +IOP( "paramchk", BSIM4v3_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"), +IOP( "binunit", BSIM4v3_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"), +IOP( "version", BSIM4v3_MOD_VERSION, IF_STRING, "parameter for model version"), +IOP( "toxe", BSIM4v3_MOD_TOXE, IF_REAL, "Electrical gate oxide thickness in meters"), +IOP( "toxp", BSIM4v3_MOD_TOXP, IF_REAL, "Physical gate oxide thickness in meters"), +IOP( "toxm", BSIM4v3_MOD_TOXM, IF_REAL, "Gate oxide thickness at which parameters are extracted"), +IOP( "toxref", BSIM4v3_MOD_TOXREF, IF_REAL, "Target tox value"), +IOP( "dtox", BSIM4v3_MOD_DTOX, IF_REAL, "Defined as (toxe - toxp) "), +IOP( "epsrox", BSIM4v3_MOD_EPSROX, IF_REAL, "Dielectric constant of the gate oxide relative to vacuum"), +IOP( "cdsc", BSIM4v3_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), +IOP( "cdscb", BSIM4v3_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), +IOP( "cdscd", BSIM4v3_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), +IOP( "cit", BSIM4v3_MOD_CIT, IF_REAL, "Interface state capacitance"), +IOP( "nfactor", BSIM4v3_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), +IOP( "xj", BSIM4v3_MOD_XJ, IF_REAL, "Junction depth in meters"), +IOP( "vsat", BSIM4v3_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), +IOP( "at", BSIM4v3_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), +IOP( "a0", BSIM4v3_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), +IOP( "ags", BSIM4v3_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), +IOP( "a1", BSIM4v3_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), +IOP( "a2", BSIM4v3_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), +IOP( "keta", BSIM4v3_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), +IOP( "nsub", BSIM4v3_MOD_NSUB, IF_REAL, "Substrate doping concentration"), +IOP( "ndep", BSIM4v3_MOD_NDEP, IF_REAL, "Channel doping concentration at the depletion edge"), +IOP( "nsd", BSIM4v3_MOD_NSD, IF_REAL, "S/D doping concentration"), +IOP( "phin", BSIM4v3_MOD_PHIN, IF_REAL, "Adjusting parameter for surface potential due to non-uniform vertical doping"), +IOP( "ngate", BSIM4v3_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"), +IOP( "gamma1", BSIM4v3_MOD_GAMMA1, IF_REAL, "Vth body coefficient"), +IOP( "gamma2", BSIM4v3_MOD_GAMMA2, IF_REAL, "Vth body coefficient"), +IOP( "vbx", BSIM4v3_MOD_VBX, IF_REAL, "Vth transition body Voltage"), +IOP( "vbm", BSIM4v3_MOD_VBM, IF_REAL, "Maximum body voltage"), + +IOP( "xt", BSIM4v3_MOD_XT, IF_REAL, "Doping depth"), +IOP( "k1", BSIM4v3_MOD_K1, IF_REAL, "Bulk effect coefficient 1"), +IOP( "kt1", BSIM4v3_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt1l", BSIM4v3_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt2", BSIM4v3_MOD_KT2, IF_REAL, "Body-coefficient of kt1"), +IOP( "k2", BSIM4v3_MOD_K2, IF_REAL, "Bulk effect coefficient 2"), +IOP( "k3", BSIM4v3_MOD_K3, IF_REAL, "Narrow width effect coefficient"), +IOP( "k3b", BSIM4v3_MOD_K3B, IF_REAL, "Body effect coefficient of k3"), +IOP( "w0", BSIM4v3_MOD_W0, IF_REAL, "Narrow width effect parameter"), +IOP( "dvtp0", BSIM4v3_MOD_DVTP0, IF_REAL, "First parameter for Vth shift due to pocket"), +IOP( "dvtp1", BSIM4v3_MOD_DVTP1, IF_REAL, "Second parameter for Vth shift due to pocket"), +IOP( "lpe0", BSIM4v3_MOD_LPE0, IF_REAL, "Equivalent length of pocket region at zero bias"), +IOP( "lpeb", BSIM4v3_MOD_LPEB, IF_REAL, "Equivalent length of pocket region accounting for body bias"), +IOP( "dvt0", BSIM4v3_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"), +IOP( "dvt1", BSIM4v3_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"), +IOP( "dvt2", BSIM4v3_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"), +IOP( "dvt0w", BSIM4v3_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"), +IOP( "dvt1w", BSIM4v3_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"), +IOP( "dvt2w", BSIM4v3_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"), +IOP( "drout", BSIM4v3_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"), +IOP( "dsub", BSIM4v3_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"), +IOP( "vth0", BSIM4v3_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "vtho", BSIM4v3_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "ua", BSIM4v3_MOD_UA, IF_REAL, "Linear gate dependence of mobility"), +IOP( "ua1", BSIM4v3_MOD_UA1, IF_REAL, "Temperature coefficient of ua"), +IOP( "ub", BSIM4v3_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"), +IOP( "ub1", BSIM4v3_MOD_UB1, IF_REAL, "Temperature coefficient of ub"), +IOP( "uc", BSIM4v3_MOD_UC, IF_REAL, "Body-bias dependence of mobility"), +IOP( "uc1", BSIM4v3_MOD_UC1, IF_REAL, "Temperature coefficient of uc"), +IOP( "u0", BSIM4v3_MOD_U0, IF_REAL, "Low-field mobility at Tnom"), +IOP( "eu", BSIM4v3_MOD_EU, IF_REAL, "Mobility exponent"), +IOP( "ute", BSIM4v3_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"), +IOP( "voff", BSIM4v3_MOD_VOFF, IF_REAL, "Threshold voltage offset"), +IOP( "minv", BSIM4v3_MOD_MINV, IF_REAL, "Fitting parameter for moderate invversion in Vgsteff"), +IOP( "voffl", BSIM4v3_MOD_VOFFL, IF_REAL, "Length dependence parameter for Vth offset"), +IOP( "tnom", BSIM4v3_MOD_TNOM, IF_REAL, "Parameter measurement temperature"), +IOP( "cgso", BSIM4v3_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"), +IOP( "cgdo", BSIM4v3_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"), +IOP( "cgbo", BSIM4v3_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"), +IOP( "xpart", BSIM4v3_MOD_XPART, IF_REAL, "Channel charge partitioning"), +IOP( "delta", BSIM4v3_MOD_DELTA, IF_REAL, "Effective Vds parameter"), +IOP( "rsh", BSIM4v3_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), +IOP( "rdsw", BSIM4v3_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), +IOP( "rdswmin", BSIM4v3_MOD_RDSWMIN, IF_REAL, "Source-drain resistance per width at high Vg"), +IOP( "rsw", BSIM4v3_MOD_RSW, IF_REAL, "Source resistance per width"), +IOP( "rdw", BSIM4v3_MOD_RDW, IF_REAL, "Drain resistance per width"), +IOP( "rdwmin", BSIM4v3_MOD_RDWMIN, IF_REAL, "Drain resistance per width at high Vg"), +IOP( "rswmin", BSIM4v3_MOD_RSWMIN, IF_REAL, "Source resistance per width at high Vg"), + +IOP( "prwg", BSIM4v3_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), +IOP( "prwb", BSIM4v3_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), + +IOP( "prt", BSIM4v3_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), +IOP( "eta0", BSIM4v3_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "etab", BSIM4v3_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "pclm", BSIM4v3_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), +IOP( "pdiblc1", BSIM4v3_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblc2", BSIM4v3_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblcb", BSIM4v3_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), +IOP( "fprout", BSIM4v3_MOD_FPROUT, IF_REAL, "Rout degradation coefficient for pocket devices"), +IOP( "pdits", BSIM4v3_MOD_PDITS, IF_REAL, "Coefficient for drain-induced Vth shifts"), +IOP( "pditsl", BSIM4v3_MOD_PDITSL, IF_REAL, "Length dependence of drain-induced Vth shifts"), +IOP( "pditsd", BSIM4v3_MOD_PDITSD, IF_REAL, "Vds dependence of drain-induced Vth shifts"), +IOP( "pscbe1", BSIM4v3_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pscbe2", BSIM4v3_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pvag", BSIM4v3_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), + +IOP( "jss", BSIM4v3_MOD_JSS, IF_REAL, "Bottom source junction reverse saturation current density"), +IOP( "jsws", BSIM4v3_MOD_JSWS, IF_REAL, "Isolation edge sidewall source junction reverse saturation current density"), +IOP( "jswgs", BSIM4v3_MOD_JSWGS, IF_REAL, "Gate edge source junction reverse saturation current density"), +IOP( "pbs", BSIM4v3_MOD_PBS, IF_REAL, "Source junction built-in potential"), +IOP( "njs", BSIM4v3_MOD_NJS, IF_REAL, "Source junction emission coefficient"), +IOP( "xtis", BSIM4v3_MOD_XTIS, IF_REAL, "Source junction current temperature exponent"), +IOP( "mjs", BSIM4v3_MOD_MJS, IF_REAL, "Source bottom junction capacitance grading coefficient"), +IOP( "pbsws", BSIM4v3_MOD_PBSWS, IF_REAL, "Source sidewall junction capacitance built in potential"), +IOP( "mjsws", BSIM4v3_MOD_MJSWS, IF_REAL, "Source sidewall junction capacitance grading coefficient"), +IOP( "pbswgs", BSIM4v3_MOD_PBSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswgs", BSIM4v3_MOD_MJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cjs", BSIM4v3_MOD_CJS, IF_REAL, "Source bottom junction capacitance per unit area"), +IOP( "cjsws", BSIM4v3_MOD_CJSWS, IF_REAL, "Source sidewall junction capacitance per unit periphery"), +IOP( "cjswgs", BSIM4v3_MOD_CJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance per unit width"), + +IOP( "jsd", BSIM4v3_MOD_JSD, IF_REAL, "Bottom drain junction reverse saturation current density"), +IOP( "jswd", BSIM4v3_MOD_JSWD, IF_REAL, "Isolation edge sidewall drain junction reverse saturation current density"), +IOP( "jswgd", BSIM4v3_MOD_JSWGD, IF_REAL, "Gate edge drain junction reverse saturation current density"), +IOP( "pbd", BSIM4v3_MOD_PBD, IF_REAL, "Drain junction built-in potential"), +IOP( "njd", BSIM4v3_MOD_NJD, IF_REAL, "Drain junction emission coefficient"), +IOP( "xtid", BSIM4v3_MOD_XTID, IF_REAL, "Drainjunction current temperature exponent"), +IOP( "mjd", BSIM4v3_MOD_MJD, IF_REAL, "Drain bottom junction capacitance grading coefficient"), +IOP( "pbswd", BSIM4v3_MOD_PBSWD, IF_REAL, "Drain sidewall junction capacitance built in potential"), +IOP( "mjswd", BSIM4v3_MOD_MJSWD, IF_REAL, "Drain sidewall junction capacitance grading coefficient"), +IOP( "pbswgd", BSIM4v3_MOD_PBSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswgd", BSIM4v3_MOD_MJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cjd", BSIM4v3_MOD_CJD, IF_REAL, "Drain bottom junction capacitance per unit area"), +IOP( "cjswd", BSIM4v3_MOD_CJSWD, IF_REAL, "Drain sidewall junction capacitance per unit periphery"), +IOP( "cjswgd", BSIM4v3_MOD_CJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance per unit width"), + +IOP( "vfbcv", BSIM4v3_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"), +IOP( "vfb", BSIM4v3_MOD_VFB, IF_REAL, "Flat Band Voltage"), +IOP( "tpb", BSIM4v3_MOD_TPB, IF_REAL, "Temperature coefficient of pb"), +IOP( "tcj", BSIM4v3_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"), +IOP( "tpbsw", BSIM4v3_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"), +IOP( "tcjsw", BSIM4v3_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"), +IOP( "tpbswg", BSIM4v3_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"), +IOP( "tcjswg", BSIM4v3_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"), +IOP( "acde", BSIM4v3_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"), +IOP( "moin", BSIM4v3_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"), +IOP( "noff", BSIM4v3_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"), +IOP( "voffcv", BSIM4v3_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"), +IOP( "dmcg", BSIM4v3_MOD_DMCG, IF_REAL, "Distance of Mid-Contact to Gate edge"), +IOP( "dmci", BSIM4v3_MOD_DMCI, IF_REAL, "Distance of Mid-Contact to Isolation"), +IOP( "dmdg", BSIM4v3_MOD_DMDG, IF_REAL, "Distance of Mid-Diffusion to Gate edge"), +IOP( "dmcgt", BSIM4v3_MOD_DMCGT, IF_REAL, "Distance of Mid-Contact to Gate edge in Test structures"), +IOP( "xgw", BSIM4v3_MOD_XGW, IF_REAL, "Distance from gate contact center to device edge"), +IOP( "xgl", BSIM4v3_MOD_XGL, IF_REAL, "Variation in Ldrawn"), +IOP( "rshg", BSIM4v3_MOD_RSHG, IF_REAL, "Gate sheet resistance"), +IOP( "ngcon", BSIM4v3_MOD_NGCON, IF_REAL, "Number of gate contacts"), +IOP( "xrcrg1", BSIM4v3_MOD_XRCRG1, IF_REAL, "First fitting parameter the bias-dependent Rg"), +IOP( "xrcrg2", BSIM4v3_MOD_XRCRG2, IF_REAL, "Second fitting parameter the bias-dependent Rg"), +IOP( "lambda", BSIM4v3_MOD_LAMBDA, IF_REAL, " Velocity overshoot parameter"), +IOP( "vtl", BSIM4v3_MOD_VTL, IF_REAL, " thermal velocity"), +IOP( "lc", BSIM4v3_MOD_LC, IF_REAL, " back scattering parameter"), +IOP( "xn", BSIM4v3_MOD_XN, IF_REAL, " back scattering parameter"), +IOP( "lint", BSIM4v3_MOD_LINT, IF_REAL, "Length reduction parameter"), +IOP( "ll", BSIM4v3_MOD_LL, IF_REAL, "Length reduction parameter"), +IOP( "llc", BSIM4v3_MOD_LLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lln", BSIM4v3_MOD_LLN, IF_REAL, "Length reduction parameter"), +IOP( "lw", BSIM4v3_MOD_LW, IF_REAL, "Length reduction parameter"), +IOP( "lwc", BSIM4v3_MOD_LWC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lwn", BSIM4v3_MOD_LWN, IF_REAL, "Length reduction parameter"), +IOP( "lwl", BSIM4v3_MOD_LWL, IF_REAL, "Length reduction parameter"), +IOP( "lwlc", BSIM4v3_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lmin", BSIM4v3_MOD_LMIN, IF_REAL, "Minimum length for the model"), +IOP( "lmax", BSIM4v3_MOD_LMAX, IF_REAL, "Maximum length for the model"), + +IOP( "wr", BSIM4v3_MOD_WR, IF_REAL, "Width dependence of rds"), +IOP( "wint", BSIM4v3_MOD_WINT, IF_REAL, "Width reduction parameter"), +IOP( "dwg", BSIM4v3_MOD_DWG, IF_REAL, "Width reduction parameter"), +IOP( "dwb", BSIM4v3_MOD_DWB, IF_REAL, "Width reduction parameter"), + +IOP( "wl", BSIM4v3_MOD_WL, IF_REAL, "Width reduction parameter"), +IOP( "wlc", BSIM4v3_MOD_WLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wln", BSIM4v3_MOD_WLN, IF_REAL, "Width reduction parameter"), +IOP( "ww", BSIM4v3_MOD_WW, IF_REAL, "Width reduction parameter"), +IOP( "wwc", BSIM4v3_MOD_WWC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wwn", BSIM4v3_MOD_WWN, IF_REAL, "Width reduction parameter"), +IOP( "wwl", BSIM4v3_MOD_WWL, IF_REAL, "Width reduction parameter"), +IOP( "wwlc", BSIM4v3_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wmin", BSIM4v3_MOD_WMIN, IF_REAL, "Minimum width for the model"), +IOP( "wmax", BSIM4v3_MOD_WMAX, IF_REAL, "Maximum width for the model"), + +IOP( "b0", BSIM4v3_MOD_B0, IF_REAL, "Abulk narrow width parameter"), +IOP( "b1", BSIM4v3_MOD_B1, IF_REAL, "Abulk narrow width parameter"), + +IOP( "cgsl", BSIM4v3_MOD_CGSL, IF_REAL, "New C-V model parameter"), +IOP( "cgdl", BSIM4v3_MOD_CGDL, IF_REAL, "New C-V model parameter"), +IOP( "ckappas", BSIM4v3_MOD_CKAPPAS, IF_REAL, "S/G overlap C-V parameter "), +IOP( "ckappad", BSIM4v3_MOD_CKAPPAD, IF_REAL, "D/G overlap C-V parameter"), +IOP( "cf", BSIM4v3_MOD_CF, IF_REAL, "Fringe capacitance parameter"), +IOP( "clc", BSIM4v3_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "cle", BSIM4v3_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "dwc", BSIM4v3_MOD_DWC, IF_REAL, "Delta W for C-V model"), +IOP( "dlc", BSIM4v3_MOD_DLC, IF_REAL, "Delta L for C-V model"), +IOP( "xw", BSIM4v3_MOD_XW, IF_REAL, "W offset for channel width due to mask/etch effect"), +IOP( "xl", BSIM4v3_MOD_XL, IF_REAL, "L offset for channel length due to mask/etch effect"), +IOP( "dlcig", BSIM4v3_MOD_DLCIG, IF_REAL, "Delta L for Ig model"), +IOP( "dwj", BSIM4v3_MOD_DWJ, IF_REAL, "Delta W for S/D junctions"), + +IOP( "alpha0", BSIM4v3_MOD_ALPHA0, IF_REAL, "substrate current model parameter"), +IOP( "alpha1", BSIM4v3_MOD_ALPHA1, IF_REAL, "substrate current model parameter"), +IOP( "beta0", BSIM4v3_MOD_BETA0, IF_REAL, "substrate current model parameter"), +IOP( "agidl", BSIM4v3_MOD_AGIDL, IF_REAL, "Pre-exponential constant for GIDL"), +IOP( "bgidl", BSIM4v3_MOD_BGIDL, IF_REAL, "Exponential constant for GIDL"), +IOP( "cgidl", BSIM4v3_MOD_CGIDL, IF_REAL, "Parameter for body-bias dependence of GIDL"), +IOP( "egidl", BSIM4v3_MOD_EGIDL, IF_REAL, "Fitting parameter for Bandbending"), +IOP( "aigc", BSIM4v3_MOD_AIGC, IF_REAL, "Parameter for Igc"), +IOP( "bigc", BSIM4v3_MOD_BIGC, IF_REAL, "Parameter for Igc"), +IOP( "cigc", BSIM4v3_MOD_CIGC, IF_REAL, "Parameter for Igc"), +IOP( "aigsd", BSIM4v3_MOD_AIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "bigsd", BSIM4v3_MOD_BIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "cigsd", BSIM4v3_MOD_CIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "aigbacc", BSIM4v3_MOD_AIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "bigbacc", BSIM4v3_MOD_BIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "cigbacc", BSIM4v3_MOD_CIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "aigbinv", BSIM4v3_MOD_AIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "bigbinv", BSIM4v3_MOD_BIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "cigbinv", BSIM4v3_MOD_CIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "nigc", BSIM4v3_MOD_NIGC, IF_REAL, "Parameter for Igc slope"), +IOP( "nigbinv", BSIM4v3_MOD_NIGBINV, IF_REAL, "Parameter for Igbinv slope"), +IOP( "nigbacc", BSIM4v3_MOD_NIGBACC, IF_REAL, "Parameter for Igbacc slope"), +IOP( "ntox", BSIM4v3_MOD_NTOX, IF_REAL, "Exponent for Tox ratio"), +IOP( "eigbinv", BSIM4v3_MOD_EIGBINV, IF_REAL, "Parameter for the Si bandgap for Igbinv"), +IOP( "pigcd", BSIM4v3_MOD_PIGCD, IF_REAL, "Parameter for Igc partition"), +IOP( "poxedge", BSIM4v3_MOD_POXEDGE, IF_REAL, "Factor for the gate edge Tox"), + +IOP( "ijthdfwd", BSIM4v3_MOD_IJTHDFWD, IF_REAL, "Forward drain diode forward limiting current"), +IOP( "ijthsfwd", BSIM4v3_MOD_IJTHSFWD, IF_REAL, "Forward source diode forward limiting current"), +IOP( "ijthdrev", BSIM4v3_MOD_IJTHDREV, IF_REAL, "Reverse drain diode forward limiting current"), +IOP( "ijthsrev", BSIM4v3_MOD_IJTHSREV, IF_REAL, "Reverse source diode forward limiting current"), +IOP( "xjbvd", BSIM4v3_MOD_XJBVD, IF_REAL, "Fitting parameter for drain diode breakdown current"), +IOP( "xjbvs", BSIM4v3_MOD_XJBVS, IF_REAL, "Fitting parameter for source diode breakdown current"), +IOP( "bvd", BSIM4v3_MOD_BVD, IF_REAL, "Drain diode breakdown voltage"), +IOP( "bvs", BSIM4v3_MOD_BVS, IF_REAL, "Source diode breakdown voltage"), + +IOP( "gbmin", BSIM4v3_MOD_GBMIN, IF_REAL, "Minimum body conductance"), +IOP( "rbdb", BSIM4v3_MOD_RBDB, IF_REAL, "Resistance between bNode and dbNode"), +IOP( "rbpb", BSIM4v3_MOD_RBPB, IF_REAL, "Resistance between bNodePrime and bNode"), +IOP( "rbsb", BSIM4v3_MOD_RBSB, IF_REAL, "Resistance between bNode and sbNode"), +IOP( "rbps", BSIM4v3_MOD_RBPS, IF_REAL, "Resistance between bNodePrime and sbNode"), +IOP( "rbpd", BSIM4v3_MOD_RBPD, IF_REAL, "Resistance between bNodePrime and bNode"), + +IOP( "lcdsc", BSIM4v3_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"), +IOP( "lcdscb", BSIM4v3_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"), +IOP( "lcdscd", BSIM4v3_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"), +IOP( "lcit", BSIM4v3_MOD_LCIT, IF_REAL, "Length dependence of cit"), +IOP( "lnfactor", BSIM4v3_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"), +IOP( "lxj", BSIM4v3_MOD_LXJ, IF_REAL, "Length dependence of xj"), +IOP( "lvsat", BSIM4v3_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), +IOP( "lat", BSIM4v3_MOD_LAT, IF_REAL, "Length dependence of at"), +IOP( "la0", BSIM4v3_MOD_LA0, IF_REAL, "Length dependence of a0"), +IOP( "lags", BSIM4v3_MOD_LAGS, IF_REAL, "Length dependence of ags"), +IOP( "la1", BSIM4v3_MOD_LA1, IF_REAL, "Length dependence of a1"), +IOP( "la2", BSIM4v3_MOD_LA2, IF_REAL, "Length dependence of a2"), +IOP( "lketa", BSIM4v3_MOD_LKETA, IF_REAL, "Length dependence of keta"), +IOP( "lnsub", BSIM4v3_MOD_LNSUB, IF_REAL, "Length dependence of nsub"), +IOP( "lndep", BSIM4v3_MOD_LNDEP, IF_REAL, "Length dependence of ndep"), +IOP( "lnsd", BSIM4v3_MOD_LNSD, IF_REAL, "Length dependence of nsd"), +IOP( "lphin", BSIM4v3_MOD_LPHIN, IF_REAL, "Length dependence of phin"), +IOP( "lngate", BSIM4v3_MOD_LNGATE, IF_REAL, "Length dependence of ngate"), +IOP( "lgamma1", BSIM4v3_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"), +IOP( "lgamma2", BSIM4v3_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"), +IOP( "lvbx", BSIM4v3_MOD_LVBX, IF_REAL, "Length dependence of vbx"), +IOP( "lvbm", BSIM4v3_MOD_LVBM, IF_REAL, "Length dependence of vbm"), +IOP( "lxt", BSIM4v3_MOD_LXT, IF_REAL, "Length dependence of xt"), +IOP( "lk1", BSIM4v3_MOD_LK1, IF_REAL, "Length dependence of k1"), +IOP( "lkt1", BSIM4v3_MOD_LKT1, IF_REAL, "Length dependence of kt1"), +IOP( "lkt1l", BSIM4v3_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"), +IOP( "lkt2", BSIM4v3_MOD_LKT2, IF_REAL, "Length dependence of kt2"), +IOP( "lk2", BSIM4v3_MOD_LK2, IF_REAL, "Length dependence of k2"), +IOP( "lk3", BSIM4v3_MOD_LK3, IF_REAL, "Length dependence of k3"), +IOP( "lk3b", BSIM4v3_MOD_LK3B, IF_REAL, "Length dependence of k3b"), +IOP( "lw0", BSIM4v3_MOD_LW0, IF_REAL, "Length dependence of w0"), +IOP( "ldvtp0", BSIM4v3_MOD_LDVTP0, IF_REAL, "Length dependence of dvtp0"), +IOP( "ldvtp1", BSIM4v3_MOD_LDVTP1, IF_REAL, "Length dependence of dvtp1"), +IOP( "llpe0", BSIM4v3_MOD_LLPE0, IF_REAL, "Length dependence of lpe0"), +IOP( "llpeb", BSIM4v3_MOD_LLPEB, IF_REAL, "Length dependence of lpeb"), +IOP( "ldvt0", BSIM4v3_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"), +IOP( "ldvt1", BSIM4v3_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"), +IOP( "ldvt2", BSIM4v3_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"), +IOP( "ldvt0w", BSIM4v3_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"), +IOP( "ldvt1w", BSIM4v3_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"), +IOP( "ldvt2w", BSIM4v3_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"), +IOP( "ldrout", BSIM4v3_MOD_LDROUT, IF_REAL, "Length dependence of drout"), +IOP( "ldsub", BSIM4v3_MOD_LDSUB, IF_REAL, "Length dependence of dsub"), +IOP( "lvth0", BSIM4v3_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lvtho", BSIM4v3_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lua", BSIM4v3_MOD_LUA, IF_REAL, "Length dependence of ua"), +IOP( "lua1", BSIM4v3_MOD_LUA1, IF_REAL, "Length dependence of ua1"), +IOP( "lub", BSIM4v3_MOD_LUB, IF_REAL, "Length dependence of ub"), +IOP( "lub1", BSIM4v3_MOD_LUB1, IF_REAL, "Length dependence of ub1"), +IOP( "luc", BSIM4v3_MOD_LUC, IF_REAL, "Length dependence of uc"), +IOP( "luc1", BSIM4v3_MOD_LUC1, IF_REAL, "Length dependence of uc1"), +IOP( "lu0", BSIM4v3_MOD_LU0, IF_REAL, "Length dependence of u0"), +IOP( "lute", BSIM4v3_MOD_LUTE, IF_REAL, "Length dependence of ute"), +IOP( "lvoff", BSIM4v3_MOD_LVOFF, IF_REAL, "Length dependence of voff"), +IOP( "lminv", BSIM4v3_MOD_LMINV, IF_REAL, "Length dependence of minv"), +IOP( "ldelta", BSIM4v3_MOD_LDELTA, IF_REAL, "Length dependence of delta"), +IOP( "lrdsw", BSIM4v3_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), +IOP( "lrsw", BSIM4v3_MOD_LRSW, IF_REAL, "Length dependence of rsw"), +IOP( "lrdw", BSIM4v3_MOD_LRDW, IF_REAL, "Length dependence of rdw"), + +IOP( "lprwg", BSIM4v3_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), +IOP( "lprwb", BSIM4v3_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), + +IOP( "lprt", BSIM4v3_MOD_LPRT, IF_REAL, "Length dependence of prt "), +IOP( "leta0", BSIM4v3_MOD_LETA0, IF_REAL, "Length dependence of eta0"), +IOP( "letab", BSIM4v3_MOD_LETAB, IF_REAL, "Length dependence of etab"), +IOP( "lpclm", BSIM4v3_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), +IOP( "lpdiblc1", BSIM4v3_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), +IOP( "lpdiblc2", BSIM4v3_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), +IOP( "lpdiblcb", BSIM4v3_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lfprout", BSIM4v3_MOD_LFPROUT, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lpdits", BSIM4v3_MOD_LPDITS, IF_REAL, "Length dependence of pdits"), +IOP( "lpditsd", BSIM4v3_MOD_LPDITSD, IF_REAL, "Length dependence of pditsd"), +IOP( "lpscbe1", BSIM4v3_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), +IOP( "lpscbe2", BSIM4v3_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), +IOP( "lpvag", BSIM4v3_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), +IOP( "lwr", BSIM4v3_MOD_LWR, IF_REAL, "Length dependence of wr"), +IOP( "ldwg", BSIM4v3_MOD_LDWG, IF_REAL, "Length dependence of dwg"), +IOP( "ldwb", BSIM4v3_MOD_LDWB, IF_REAL, "Length dependence of dwb"), +IOP( "lb0", BSIM4v3_MOD_LB0, IF_REAL, "Length dependence of b0"), +IOP( "lb1", BSIM4v3_MOD_LB1, IF_REAL, "Length dependence of b1"), +IOP( "lcgsl", BSIM4v3_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"), +IOP( "lcgdl", BSIM4v3_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"), +IOP( "lckappas", BSIM4v3_MOD_LCKAPPAS, IF_REAL, "Length dependence of ckappas"), +IOP( "lckappad", BSIM4v3_MOD_LCKAPPAD, IF_REAL, "Length dependence of ckappad"), +IOP( "lcf", BSIM4v3_MOD_LCF, IF_REAL, "Length dependence of cf"), +IOP( "lclc", BSIM4v3_MOD_LCLC, IF_REAL, "Length dependence of clc"), +IOP( "lcle", BSIM4v3_MOD_LCLE, IF_REAL, "Length dependence of cle"), +IOP( "lalpha0", BSIM4v3_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"), +IOP( "lalpha1", BSIM4v3_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"), +IOP( "lbeta0", BSIM4v3_MOD_LBETA0, IF_REAL, "Length dependence of beta0"), +IOP( "lagidl", BSIM4v3_MOD_LAGIDL, IF_REAL, "Length dependence of agidl"), +IOP( "lbgidl", BSIM4v3_MOD_LBGIDL, IF_REAL, "Length dependence of bgidl"), +IOP( "lcgidl", BSIM4v3_MOD_LCGIDL, IF_REAL, "Length dependence of cgidl"), +IOP( "legidl", BSIM4v3_MOD_LEGIDL, IF_REAL, "Length dependence of egidl"), +IOP( "laigc", BSIM4v3_MOD_LAIGC, IF_REAL, "Length dependence of aigc"), +IOP( "lbigc", BSIM4v3_MOD_LBIGC, IF_REAL, "Length dependence of bigc"), +IOP( "lcigc", BSIM4v3_MOD_LCIGC, IF_REAL, "Length dependence of cigc"), +IOP( "laigsd", BSIM4v3_MOD_LAIGSD, IF_REAL, "Length dependence of aigsd"), +IOP( "lbigsd", BSIM4v3_MOD_LBIGSD, IF_REAL, "Length dependence of bigsd"), +IOP( "lcigsd", BSIM4v3_MOD_LCIGSD, IF_REAL, "Length dependence of cigsd"), +IOP( "laigbacc", BSIM4v3_MOD_LAIGBACC, IF_REAL, "Length dependence of aigbacc"), +IOP( "lbigbacc", BSIM4v3_MOD_LBIGBACC, IF_REAL, "Length dependence of bigbacc"), +IOP( "lcigbacc", BSIM4v3_MOD_LCIGBACC, IF_REAL, "Length dependence of cigbacc"), +IOP( "laigbinv", BSIM4v3_MOD_LAIGBINV, IF_REAL, "Length dependence of aigbinv"), +IOP( "lbigbinv", BSIM4v3_MOD_LBIGBINV, IF_REAL, "Length dependence of bigbinv"), +IOP( "lcigbinv", BSIM4v3_MOD_LCIGBINV, IF_REAL, "Length dependence of cigbinv"), +IOP( "lnigc", BSIM4v3_MOD_LNIGC, IF_REAL, "Length dependence of nigc"), +IOP( "lnigbinv", BSIM4v3_MOD_LNIGBINV, IF_REAL, "Length dependence of nigbinv"), +IOP( "lnigbacc", BSIM4v3_MOD_LNIGBACC, IF_REAL, "Length dependence of nigbacc"), +IOP( "lntox", BSIM4v3_MOD_LNTOX, IF_REAL, "Length dependence of ntox"), +IOP( "leigbinv", BSIM4v3_MOD_LEIGBINV, IF_REAL, "Length dependence for eigbinv"), +IOP( "lpigcd", BSIM4v3_MOD_LPIGCD, IF_REAL, "Length dependence for pigcd"), +IOP( "lpoxedge", BSIM4v3_MOD_LPOXEDGE, IF_REAL, "Length dependence for poxedge"), + +IOP( "lvfbcv", BSIM4v3_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"), +IOP( "lvfb", BSIM4v3_MOD_LVFB, IF_REAL, "Length dependence of vfb"), +IOP( "lacde", BSIM4v3_MOD_LACDE, IF_REAL, "Length dependence of acde"), +IOP( "lmoin", BSIM4v3_MOD_LMOIN, IF_REAL, "Length dependence of moin"), +IOP( "lnoff", BSIM4v3_MOD_LNOFF, IF_REAL, "Length dependence of noff"), +IOP( "lvoffcv", BSIM4v3_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"), +IOP( "lxrcrg1", BSIM4v3_MOD_LXRCRG1, IF_REAL, "Length dependence of xrcrg1"), +IOP( "lxrcrg2", BSIM4v3_MOD_LXRCRG2, IF_REAL, "Length dependence of xrcrg2"), +IOP( "llambda", BSIM4v3_MOD_LLAMBDA, IF_REAL, "Length dependence of lambda"), +IOP( "lvtl", BSIM4v3_MOD_LVTL, IF_REAL, " Length dependence of vtl"), +IOP( "lxn", BSIM4v3_MOD_LXN, IF_REAL, " Length dependence of xn"), +IOP( "leu", BSIM4v3_MOD_LEU, IF_REAL, "Length dependence of eu"), + +IOP( "wcdsc", BSIM4v3_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), +IOP( "wcdscb", BSIM4v3_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), +IOP( "wcdscd", BSIM4v3_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), +IOP( "wcit", BSIM4v3_MOD_WCIT, IF_REAL, "Width dependence of cit"), +IOP( "wnfactor", BSIM4v3_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), +IOP( "wxj", BSIM4v3_MOD_WXJ, IF_REAL, "Width dependence of xj"), +IOP( "wvsat", BSIM4v3_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), +IOP( "wat", BSIM4v3_MOD_WAT, IF_REAL, "Width dependence of at"), +IOP( "wa0", BSIM4v3_MOD_WA0, IF_REAL, "Width dependence of a0"), +IOP( "wags", BSIM4v3_MOD_WAGS, IF_REAL, "Width dependence of ags"), +IOP( "wa1", BSIM4v3_MOD_WA1, IF_REAL, "Width dependence of a1"), +IOP( "wa2", BSIM4v3_MOD_WA2, IF_REAL, "Width dependence of a2"), +IOP( "wketa", BSIM4v3_MOD_WKETA, IF_REAL, "Width dependence of keta"), +IOP( "wnsub", BSIM4v3_MOD_WNSUB, IF_REAL, "Width dependence of nsub"), +IOP( "wndep", BSIM4v3_MOD_WNDEP, IF_REAL, "Width dependence of ndep"), +IOP( "wnsd", BSIM4v3_MOD_WNSD, IF_REAL, "Width dependence of nsd"), +IOP( "wphin", BSIM4v3_MOD_WPHIN, IF_REAL, "Width dependence of phin"), +IOP( "wngate", BSIM4v3_MOD_WNGATE, IF_REAL, "Width dependence of ngate"), +IOP( "wgamma1", BSIM4v3_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"), +IOP( "wgamma2", BSIM4v3_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"), +IOP( "wvbx", BSIM4v3_MOD_WVBX, IF_REAL, "Width dependence of vbx"), +IOP( "wvbm", BSIM4v3_MOD_WVBM, IF_REAL, "Width dependence of vbm"), +IOP( "wxt", BSIM4v3_MOD_WXT, IF_REAL, "Width dependence of xt"), +IOP( "wk1", BSIM4v3_MOD_WK1, IF_REAL, "Width dependence of k1"), +IOP( "wkt1", BSIM4v3_MOD_WKT1, IF_REAL, "Width dependence of kt1"), +IOP( "wkt1l", BSIM4v3_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"), +IOP( "wkt2", BSIM4v3_MOD_WKT2, IF_REAL, "Width dependence of kt2"), +IOP( "wk2", BSIM4v3_MOD_WK2, IF_REAL, "Width dependence of k2"), +IOP( "wk3", BSIM4v3_MOD_WK3, IF_REAL, "Width dependence of k3"), +IOP( "wk3b", BSIM4v3_MOD_WK3B, IF_REAL, "Width dependence of k3b"), +IOP( "ww0", BSIM4v3_MOD_WW0, IF_REAL, "Width dependence of w0"), +IOP( "wdvtp0", BSIM4v3_MOD_WDVTP0, IF_REAL, "Width dependence of dvtp0"), +IOP( "wdvtp1", BSIM4v3_MOD_WDVTP1, IF_REAL, "Width dependence of dvtp1"), +IOP( "wlpe0", BSIM4v3_MOD_WLPE0, IF_REAL, "Width dependence of lpe0"), +IOP( "wlpeb", BSIM4v3_MOD_WLPEB, IF_REAL, "Width dependence of lpeb"), +IOP( "wdvt0", BSIM4v3_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"), +IOP( "wdvt1", BSIM4v3_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"), +IOP( "wdvt2", BSIM4v3_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"), +IOP( "wdvt0w", BSIM4v3_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"), +IOP( "wdvt1w", BSIM4v3_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"), +IOP( "wdvt2w", BSIM4v3_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"), +IOP( "wdrout", BSIM4v3_MOD_WDROUT, IF_REAL, "Width dependence of drout"), +IOP( "wdsub", BSIM4v3_MOD_WDSUB, IF_REAL, "Width dependence of dsub"), +IOP( "wvth0", BSIM4v3_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wvtho", BSIM4v3_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wua", BSIM4v3_MOD_WUA, IF_REAL, "Width dependence of ua"), +IOP( "wua1", BSIM4v3_MOD_WUA1, IF_REAL, "Width dependence of ua1"), +IOP( "wub", BSIM4v3_MOD_WUB, IF_REAL, "Width dependence of ub"), +IOP( "wub1", BSIM4v3_MOD_WUB1, IF_REAL, "Width dependence of ub1"), +IOP( "wuc", BSIM4v3_MOD_WUC, IF_REAL, "Width dependence of uc"), +IOP( "wuc1", BSIM4v3_MOD_WUC1, IF_REAL, "Width dependence of uc1"), +IOP( "wu0", BSIM4v3_MOD_WU0, IF_REAL, "Width dependence of u0"), +IOP( "wute", BSIM4v3_MOD_WUTE, IF_REAL, "Width dependence of ute"), +IOP( "wvoff", BSIM4v3_MOD_WVOFF, IF_REAL, "Width dependence of voff"), +IOP( "wminv", BSIM4v3_MOD_WMINV, IF_REAL, "Width dependence of minv"), +IOP( "wdelta", BSIM4v3_MOD_WDELTA, IF_REAL, "Width dependence of delta"), +IOP( "wrdsw", BSIM4v3_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "), +IOP( "wrsw", BSIM4v3_MOD_WRSW, IF_REAL, "Width dependence of rsw"), +IOP( "wrdw", BSIM4v3_MOD_WRDW, IF_REAL, "Width dependence of rdw"), + +IOP( "wprwg", BSIM4v3_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), +IOP( "wprwb", BSIM4v3_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), + +IOP( "wprt", BSIM4v3_MOD_WPRT, IF_REAL, "Width dependence of prt"), +IOP( "weta0", BSIM4v3_MOD_WETA0, IF_REAL, "Width dependence of eta0"), +IOP( "wetab", BSIM4v3_MOD_WETAB, IF_REAL, "Width dependence of etab"), +IOP( "wpclm", BSIM4v3_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), +IOP( "wpdiblc1", BSIM4v3_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), +IOP( "wpdiblc2", BSIM4v3_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), +IOP( "wpdiblcb", BSIM4v3_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wfprout", BSIM4v3_MOD_WFPROUT, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wpdits", BSIM4v3_MOD_WPDITS, IF_REAL, "Width dependence of pdits"), +IOP( "wpditsd", BSIM4v3_MOD_WPDITSD, IF_REAL, "Width dependence of pditsd"), +IOP( "wpscbe1", BSIM4v3_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), +IOP( "wpscbe2", BSIM4v3_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), +IOP( "wpvag", BSIM4v3_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), +IOP( "wwr", BSIM4v3_MOD_WWR, IF_REAL, "Width dependence of wr"), +IOP( "wdwg", BSIM4v3_MOD_WDWG, IF_REAL, "Width dependence of dwg"), +IOP( "wdwb", BSIM4v3_MOD_WDWB, IF_REAL, "Width dependence of dwb"), +IOP( "wb0", BSIM4v3_MOD_WB0, IF_REAL, "Width dependence of b0"), +IOP( "wb1", BSIM4v3_MOD_WB1, IF_REAL, "Width dependence of b1"), +IOP( "wcgsl", BSIM4v3_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"), +IOP( "wcgdl", BSIM4v3_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"), +IOP( "wckappas", BSIM4v3_MOD_WCKAPPAS, IF_REAL, "Width dependence of ckappas"), +IOP( "wckappad", BSIM4v3_MOD_WCKAPPAD, IF_REAL, "Width dependence of ckappad"), +IOP( "wcf", BSIM4v3_MOD_WCF, IF_REAL, "Width dependence of cf"), +IOP( "wclc", BSIM4v3_MOD_WCLC, IF_REAL, "Width dependence of clc"), +IOP( "wcle", BSIM4v3_MOD_WCLE, IF_REAL, "Width dependence of cle"), +IOP( "walpha0", BSIM4v3_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"), +IOP( "walpha1", BSIM4v3_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"), +IOP( "wbeta0", BSIM4v3_MOD_WBETA0, IF_REAL, "Width dependence of beta0"), +IOP( "wagidl", BSIM4v3_MOD_WAGIDL, IF_REAL, "Width dependence of agidl"), +IOP( "wbgidl", BSIM4v3_MOD_WBGIDL, IF_REAL, "Width dependence of bgidl"), +IOP( "wcgidl", BSIM4v3_MOD_WCGIDL, IF_REAL, "Width dependence of cgidl"), +IOP( "wegidl", BSIM4v3_MOD_WEGIDL, IF_REAL, "Width dependence of egidl"), +IOP( "waigc", BSIM4v3_MOD_WAIGC, IF_REAL, "Width dependence of aigc"), +IOP( "wbigc", BSIM4v3_MOD_WBIGC, IF_REAL, "Width dependence of bigc"), +IOP( "wcigc", BSIM4v3_MOD_WCIGC, IF_REAL, "Width dependence of cigc"), +IOP( "waigsd", BSIM4v3_MOD_WAIGSD, IF_REAL, "Width dependence of aigsd"), +IOP( "wbigsd", BSIM4v3_MOD_WBIGSD, IF_REAL, "Width dependence of bigsd"), +IOP( "wcigsd", BSIM4v3_MOD_WCIGSD, IF_REAL, "Width dependence of cigsd"), +IOP( "waigbacc", BSIM4v3_MOD_WAIGBACC, IF_REAL, "Width dependence of aigbacc"), +IOP( "wbigbacc", BSIM4v3_MOD_WBIGBACC, IF_REAL, "Width dependence of bigbacc"), +IOP( "wcigbacc", BSIM4v3_MOD_WCIGBACC, IF_REAL, "Width dependence of cigbacc"), +IOP( "waigbinv", BSIM4v3_MOD_WAIGBINV, IF_REAL, "Width dependence of aigbinv"), +IOP( "wbigbinv", BSIM4v3_MOD_WBIGBINV, IF_REAL, "Width dependence of bigbinv"), +IOP( "wcigbinv", BSIM4v3_MOD_WCIGBINV, IF_REAL, "Width dependence of cigbinv"), +IOP( "wnigc", BSIM4v3_MOD_WNIGC, IF_REAL, "Width dependence of nigc"), +IOP( "wnigbinv", BSIM4v3_MOD_WNIGBINV, IF_REAL, "Width dependence of nigbinv"), +IOP( "wnigbacc", BSIM4v3_MOD_WNIGBACC, IF_REAL, "Width dependence of nigbacc"), +IOP( "wntox", BSIM4v3_MOD_WNTOX, IF_REAL, "Width dependence of ntox"), +IOP( "weigbinv", BSIM4v3_MOD_WEIGBINV, IF_REAL, "Width dependence for eigbinv"), +IOP( "wpigcd", BSIM4v3_MOD_WPIGCD, IF_REAL, "Width dependence for pigcd"), +IOP( "wpoxedge", BSIM4v3_MOD_WPOXEDGE, IF_REAL, "Width dependence for poxedge"), +IOP( "wvfbcv", BSIM4v3_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"), +IOP( "wvfb", BSIM4v3_MOD_WVFB, IF_REAL, "Width dependence of vfb"), +IOP( "wacde", BSIM4v3_MOD_WACDE, IF_REAL, "Width dependence of acde"), +IOP( "wmoin", BSIM4v3_MOD_WMOIN, IF_REAL, "Width dependence of moin"), +IOP( "wnoff", BSIM4v3_MOD_WNOFF, IF_REAL, "Width dependence of noff"), +IOP( "wvoffcv", BSIM4v3_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"), +IOP( "wxrcrg1", BSIM4v3_MOD_WXRCRG1, IF_REAL, "Width dependence of xrcrg1"), +IOP( "wxrcrg2", BSIM4v3_MOD_WXRCRG2, IF_REAL, "Width dependence of xrcrg2"), +IOP( "wlambda", BSIM4v3_MOD_WLAMBDA, IF_REAL, "Width dependence of lambda"), +IOP( "wvtl", BSIM4v3_MOD_WVTL, IF_REAL, "Width dependence of vtl"), +IOP( "wxn", BSIM4v3_MOD_WXN, IF_REAL, "Width dependence of xn"), +IOP( "weu", BSIM4v3_MOD_WEU, IF_REAL, "Width dependence of eu"), + +IOP( "pcdsc", BSIM4v3_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), +IOP( "pcdscb", BSIM4v3_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), +IOP( "pcdscd", BSIM4v3_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), +IOP( "pcit", BSIM4v3_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), +IOP( "pnfactor", BSIM4v3_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), +IOP( "pxj", BSIM4v3_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), +IOP( "pvsat", BSIM4v3_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), +IOP( "pat", BSIM4v3_MOD_PAT, IF_REAL, "Cross-term dependence of at"), +IOP( "pa0", BSIM4v3_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), +IOP( "pags", BSIM4v3_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), +IOP( "pa1", BSIM4v3_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), +IOP( "pa2", BSIM4v3_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), +IOP( "pketa", BSIM4v3_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"), +IOP( "pnsub", BSIM4v3_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"), +IOP( "pndep", BSIM4v3_MOD_PNDEP, IF_REAL, "Cross-term dependence of ndep"), +IOP( "pnsd", BSIM4v3_MOD_PNSD, IF_REAL, "Cross-term dependence of nsd"), +IOP( "pphin", BSIM4v3_MOD_PPHIN, IF_REAL, "Cross-term dependence of phin"), +IOP( "pngate", BSIM4v3_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"), +IOP( "pgamma1", BSIM4v3_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"), +IOP( "pgamma2", BSIM4v3_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"), +IOP( "pvbx", BSIM4v3_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"), +IOP( "pvbm", BSIM4v3_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"), +IOP( "pxt", BSIM4v3_MOD_PXT, IF_REAL, "Cross-term dependence of xt"), +IOP( "pk1", BSIM4v3_MOD_PK1, IF_REAL, "Cross-term dependence of k1"), +IOP( "pkt1", BSIM4v3_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"), +IOP( "pkt1l", BSIM4v3_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"), +IOP( "pkt2", BSIM4v3_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"), +IOP( "pk2", BSIM4v3_MOD_PK2, IF_REAL, "Cross-term dependence of k2"), +IOP( "pk3", BSIM4v3_MOD_PK3, IF_REAL, "Cross-term dependence of k3"), +IOP( "pk3b", BSIM4v3_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"), +IOP( "pw0", BSIM4v3_MOD_PW0, IF_REAL, "Cross-term dependence of w0"), +IOP( "pdvtp0", BSIM4v3_MOD_PDVTP0, IF_REAL, "Cross-term dependence of dvtp0"), +IOP( "pdvtp1", BSIM4v3_MOD_PDVTP1, IF_REAL, "Cross-term dependence of dvtp1"), +IOP( "plpe0", BSIM4v3_MOD_PLPE0, IF_REAL, "Cross-term dependence of lpe0"), +IOP( "plpeb", BSIM4v3_MOD_PLPEB, IF_REAL, "Cross-term dependence of lpeb"), +IOP( "pdvt0", BSIM4v3_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"), +IOP( "pdvt1", BSIM4v3_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"), +IOP( "pdvt2", BSIM4v3_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"), +IOP( "pdvt0w", BSIM4v3_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"), +IOP( "pdvt1w", BSIM4v3_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"), +IOP( "pdvt2w", BSIM4v3_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"), +IOP( "pdrout", BSIM4v3_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"), +IOP( "pdsub", BSIM4v3_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"), +IOP( "pvth0", BSIM4v3_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pvtho", BSIM4v3_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pua", BSIM4v3_MOD_PUA, IF_REAL, "Cross-term dependence of ua"), +IOP( "pua1", BSIM4v3_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"), +IOP( "pub", BSIM4v3_MOD_PUB, IF_REAL, "Cross-term dependence of ub"), +IOP( "pub1", BSIM4v3_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"), +IOP( "puc", BSIM4v3_MOD_PUC, IF_REAL, "Cross-term dependence of uc"), +IOP( "puc1", BSIM4v3_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"), +IOP( "pu0", BSIM4v3_MOD_PU0, IF_REAL, "Cross-term dependence of u0"), +IOP( "pute", BSIM4v3_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), +IOP( "pvoff", BSIM4v3_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), +IOP( "pminv", BSIM4v3_MOD_PMINV, IF_REAL, "Cross-term dependence of minv"), +IOP( "pdelta", BSIM4v3_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), +IOP( "prdsw", BSIM4v3_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), +IOP( "prsw", BSIM4v3_MOD_PRSW, IF_REAL, "Cross-term dependence of rsw"), +IOP( "prdw", BSIM4v3_MOD_PRDW, IF_REAL, "Cross-term dependence of rdw"), + +IOP( "pprwg", BSIM4v3_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), +IOP( "pprwb", BSIM4v3_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), + +IOP( "pprt", BSIM4v3_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), +IOP( "peta0", BSIM4v3_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), +IOP( "petab", BSIM4v3_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"), +IOP( "ppclm", BSIM4v3_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"), +IOP( "ppdiblc1", BSIM4v3_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"), +IOP( "ppdiblc2", BSIM4v3_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"), +IOP( "ppdiblcb", BSIM4v3_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "pfprout", BSIM4v3_MOD_PFPROUT, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "ppdits", BSIM4v3_MOD_PPDITS, IF_REAL, "Cross-term dependence of pdits"), +IOP( "ppditsd", BSIM4v3_MOD_PPDITSD, IF_REAL, "Cross-term dependence of pditsd"), +IOP( "ppscbe1", BSIM4v3_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), +IOP( "ppscbe2", BSIM4v3_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), +IOP( "ppvag", BSIM4v3_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), +IOP( "pwr", BSIM4v3_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), +IOP( "pdwg", BSIM4v3_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), +IOP( "pdwb", BSIM4v3_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), +IOP( "pb0", BSIM4v3_MOD_PB0, IF_REAL, "Cross-term dependence of b0"), +IOP( "pb1", BSIM4v3_MOD_PB1, IF_REAL, "Cross-term dependence of b1"), +IOP( "pcgsl", BSIM4v3_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"), +IOP( "pcgdl", BSIM4v3_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"), +IOP( "pckappas", BSIM4v3_MOD_PCKAPPAS, IF_REAL, "Cross-term dependence of ckappas"), +IOP( "pckappad", BSIM4v3_MOD_PCKAPPAD, IF_REAL, "Cross-term dependence of ckappad"), +IOP( "pcf", BSIM4v3_MOD_PCF, IF_REAL, "Cross-term dependence of cf"), +IOP( "pclc", BSIM4v3_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"), +IOP( "pcle", BSIM4v3_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"), +IOP( "palpha0", BSIM4v3_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"), +IOP( "palpha1", BSIM4v3_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"), +IOP( "pbeta0", BSIM4v3_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"), +IOP( "pagidl", BSIM4v3_MOD_PAGIDL, IF_REAL, "Cross-term dependence of agidl"), +IOP( "pbgidl", BSIM4v3_MOD_PBGIDL, IF_REAL, "Cross-term dependence of bgidl"), +IOP( "pcgidl", BSIM4v3_MOD_PCGIDL, IF_REAL, "Cross-term dependence of cgidl"), +IOP( "pegidl", BSIM4v3_MOD_PEGIDL, IF_REAL, "Cross-term dependence of egidl"), +IOP( "paigc", BSIM4v3_MOD_PAIGC, IF_REAL, "Cross-term dependence of aigc"), +IOP( "pbigc", BSIM4v3_MOD_PBIGC, IF_REAL, "Cross-term dependence of bigc"), +IOP( "pcigc", BSIM4v3_MOD_PCIGC, IF_REAL, "Cross-term dependence of cigc"), +IOP( "paigsd", BSIM4v3_MOD_PAIGSD, IF_REAL, "Cross-term dependence of aigsd"), +IOP( "pbigsd", BSIM4v3_MOD_PBIGSD, IF_REAL, "Cross-term dependence of bigsd"), +IOP( "pcigsd", BSIM4v3_MOD_PCIGSD, IF_REAL, "Cross-term dependence of cigsd"), +IOP( "paigbacc", BSIM4v3_MOD_PAIGBACC, IF_REAL, "Cross-term dependence of aigbacc"), +IOP( "pbigbacc", BSIM4v3_MOD_PBIGBACC, IF_REAL, "Cross-term dependence of bigbacc"), +IOP( "pcigbacc", BSIM4v3_MOD_PCIGBACC, IF_REAL, "Cross-term dependence of cigbacc"), +IOP( "paigbinv", BSIM4v3_MOD_PAIGBINV, IF_REAL, "Cross-term dependence of aigbinv"), +IOP( "pbigbinv", BSIM4v3_MOD_PBIGBINV, IF_REAL, "Cross-term dependence of bigbinv"), +IOP( "pcigbinv", BSIM4v3_MOD_PCIGBINV, IF_REAL, "Cross-term dependence of cigbinv"), +IOP( "pnigc", BSIM4v3_MOD_PNIGC, IF_REAL, "Cross-term dependence of nigc"), +IOP( "pnigbinv", BSIM4v3_MOD_PNIGBINV, IF_REAL, "Cross-term dependence of nigbinv"), +IOP( "pnigbacc", BSIM4v3_MOD_PNIGBACC, IF_REAL, "Cross-term dependence of nigbacc"), +IOP( "pntox", BSIM4v3_MOD_PNTOX, IF_REAL, "Cross-term dependence of ntox"), +IOP( "peigbinv", BSIM4v3_MOD_PEIGBINV, IF_REAL, "Cross-term dependence for eigbinv"), +IOP( "ppigcd", BSIM4v3_MOD_PPIGCD, IF_REAL, "Cross-term dependence for pigcd"), +IOP( "ppoxedge", BSIM4v3_MOD_PPOXEDGE, IF_REAL, "Cross-term dependence for poxedge"), +IOP( "pvfbcv", BSIM4v3_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"), +IOP( "pvfb", BSIM4v3_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"), +IOP( "pacde", BSIM4v3_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"), +IOP( "pmoin", BSIM4v3_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"), +IOP( "pnoff", BSIM4v3_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"), +IOP( "pvoffcv", BSIM4v3_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"), +IOP( "pxrcrg1", BSIM4v3_MOD_PXRCRG1, IF_REAL, "Cross-term dependence of xrcrg1"), +IOP( "pxrcrg2", BSIM4v3_MOD_PXRCRG2, IF_REAL, "Cross-term dependence of xrcrg2"), +IOP( "plambda", BSIM4v3_MOD_PLAMBDA, IF_REAL, "Cross-term dependence of lambda"), +IOP( "pvtl", BSIM4v3_MOD_PVTL, IF_REAL, "Cross-term dependence of vtl"), +IOP( "pxn", BSIM4v3_MOD_PXN, IF_REAL, "Cross-term dependence of xn"), +IOP( "peu", BSIM4v3_MOD_PEU, IF_REAL, "Cross-term dependence of eu"), + +/* stress effect*/ +IOP( "saref", BSIM4v3_MOD_SAREF, IF_REAL, "Reference distance between OD edge to poly of one side"), +IOP( "sbref", BSIM4v3_MOD_SBREF, IF_REAL, "Reference distance between OD edge to poly of the other side"), +IOP( "wlod", BSIM4v3_MOD_WLOD, IF_REAL, "Width parameter for stress effect"), +IOP( "ku0", BSIM4v3_MOD_KU0, IF_REAL, "Mobility degradation/enhancement coefficient for LOD"), +IOP( "kvsat", BSIM4v3_MOD_KVSAT, IF_REAL, "Saturation velocity degradation/enhancement parameter for LOD"), +IOP( "kvth0", BSIM4v3_MOD_KVTH0, IF_REAL, "Threshold degradation/enhancement parameter for LOD"), +IOP( "tku0", BSIM4v3_MOD_TKU0, IF_REAL, "Temperature coefficient of KU0"), +IOP( "llodku0", BSIM4v3_MOD_LLODKU0, IF_REAL, "Length parameter for u0 LOD effect"), +IOP( "wlodku0", BSIM4v3_MOD_WLODKU0, IF_REAL, "Width parameter for u0 LOD effect"), +IOP( "llodvth", BSIM4v3_MOD_LLODVTH, IF_REAL, "Length parameter for vth LOD effect"), +IOP( "wlodvth", BSIM4v3_MOD_WLODVTH, IF_REAL, "Width parameter for vth LOD effect"), +IOP( "lku0", BSIM4v3_MOD_LKU0, IF_REAL, "Length dependence of ku0"), +IOP( "wku0", BSIM4v3_MOD_WKU0, IF_REAL, "Width dependence of ku0"), +IOP( "pku0", BSIM4v3_MOD_PKU0, IF_REAL, "Cross-term dependence of ku0"), +IOP( "lkvth0", BSIM4v3_MOD_LKVTH0, IF_REAL, "Length dependence of kvth0"), +IOP( "wkvth0", BSIM4v3_MOD_WKVTH0, IF_REAL, "Width dependence of kvth0"), +IOP( "pkvth0", BSIM4v3_MOD_PKVTH0, IF_REAL, "Cross-term dependence of kvth0"), +IOP( "stk2", BSIM4v3_MOD_STK2, IF_REAL, "K2 shift factor related to stress effect on vth"), +IOP( "lodk2", BSIM4v3_MOD_LODK2, IF_REAL, "K2 shift modification factor for stress effect"), +IOP( "steta0", BSIM4v3_MOD_STETA0, IF_REAL, "eta0 shift factor related to stress effect on vth"), +IOP( "lodeta0", BSIM4v3_MOD_LODETA0, IF_REAL, "eta0 shift modification factor for stress effect"), + + +IOP( "noia", BSIM4v3_MOD_NOIA, IF_REAL, "Flicker noise parameter"), +IOP( "noib", BSIM4v3_MOD_NOIB, IF_REAL, "Flicker noise parameter"), +IOP( "noic", BSIM4v3_MOD_NOIC, IF_REAL, "Flicker noise parameter"), +IOP( "tnoia", BSIM4v3_MOD_TNOIA, IF_REAL, "Thermal noise parameter"), +IOP( "tnoib", BSIM4v3_MOD_TNOIB, IF_REAL, "Thermal noise parameter"), +IOP( "rnoia", BSIM4v3_MOD_RNOIA, IF_REAL, "Thermal noise coefficient"), +IOP( "rnoib", BSIM4v3_MOD_RNOIB, IF_REAL, "Thermal noise coefficient"), +IOP( "ntnoi", BSIM4v3_MOD_NTNOI, IF_REAL, "Thermal noise parameter"), +IOP( "em", BSIM4v3_MOD_EM, IF_REAL, "Flicker noise parameter"), +IOP( "ef", BSIM4v3_MOD_EF, IF_REAL, "Flicker noise frequency exponent"), +IOP( "af", BSIM4v3_MOD_AF, IF_REAL, "Flicker noise exponent"), +IOP( "kf", BSIM4v3_MOD_KF, IF_REAL, "Flicker noise coefficient"), + +IP( "nmos", BSIM4v3_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"), +IP( "pmos", BSIM4v3_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"), +}; + +char *BSIM4v3names[] = { + "Drain", + "Gate", + "Source", + "Bulk", + "Charge" +}; + +int BSIM4v3nSize = NUMELEMS(BSIM4v3names); +int BSIM4v3pTSize = NUMELEMS(BSIM4v3pTable); +int BSIM4v3mPTSize = NUMELEMS(BSIM4v3mPTable); +int BSIM4v3iSize = sizeof(BSIM4v3instance); +int BSIM4v3mSize = sizeof(BSIM4v3model); diff --git a/src/spicelib/devices/bsim4v3/b4v3acld.c b/src/spicelib/devices/bsim4v3/b4v3acld.c new file mode 100644 index 000000000..7bb12a6f3 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3acld.c @@ -0,0 +1,668 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3acld.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "sperror.h" + + +int +BSIM4v3acLoad(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance *here; + +double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb; +double xcbgb, xcbdb, xcbsb, xcbbb; +double xcggbr, xcgdbr, xcgsbr, xcgbbr, xcggbi, xcgdbi, xcgsbi, xcgbbi; +double Cggr, Cgdr, Cgsr, Cgbr, Cggi, Cgdi, Cgsi, Cgbi; +double xcddbr, xcdgbr, xcdsbr, xcdbbr, xcsdbr, xcsgbr, xcssbr, xcsbbr; +double xcddbi, xcdgbi, xcdsbi, xcdbbi, xcsdbi, xcsgbi, xcssbi, xcsbbi; +double xcdbdb, xcsbsb, xcgmgmb, xcgmdb, xcgmsb, xcdgmb, xcsgmb; +double xcgmbb, xcbgmb; +double capbd, capbs, omega; +double gstot, gstotd, gstotg, gstots, gstotb, gspr; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double gIstotg, gIstotd, gIstots, gIstotb; +double gIdtotg, gIdtotd, gIdtots, gIdtotb; +double gIbtotg, gIbtotd, gIbtots, gIbtotb; +double gIgtotg, gIgtotd, gIgtots, gIgtotb; +double cgso, cgdo, cgbo; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11; +double Csg, Csd, Css, Csb; +double Cdgr, Cddr, Cdsr, Cdbr, Csgr, Csdr, Cssr, Csbr; +double Cdgi, Cddi, Cdsi, Cdbi, Csgi, Csdi, Cssi, Csbi; +double gmr, gmi, gmbsr, gmbsi, gdsr, gdsi; +double FwdSumr, RevSumr, Gmr, Gmbsr, Gdsr; +double FwdSumi, RevSumi, Gmi, Gmbsi, Gdsi; +struct bsim4v3SizeDependParam *pParam; +double ggidld, ggidlg, ggidlb,ggisld, ggislg, ggislb, ggisls; + + omega = ckt->CKTomega; + for (; model != NULL; model = model->BSIM4v3nextModel) + { for (here = model->BSIM4v3instances; here!= NULL; + here = here->BSIM4v3nextInstance) + { if (here->BSIM4v3owner != ARCHme) continue; + pParam = here->pParam; + capbd = here->BSIM4v3capbd; + capbs = here->BSIM4v3capbs; + cgso = here->BSIM4v3cgso; + cgdo = here->BSIM4v3cgdo; + cgbo = pParam->BSIM4v3cgbo; + + Csd = -(here->BSIM4v3cddb + here->BSIM4v3cgdb + here->BSIM4v3cbdb); + Csg = -(here->BSIM4v3cdgb + here->BSIM4v3cggb + here->BSIM4v3cbgb); + Css = -(here->BSIM4v3cdsb + here->BSIM4v3cgsb + here->BSIM4v3cbsb); + + if (here->BSIM4v3acnqsMod) + { T0 = omega * here->BSIM4v3taunet; + T1 = T0 * T0; + T2 = 1.0 / (1.0 + T1); + T3 = T0 * T2; + + gmr = here->BSIM4v3gm * T2; + gmbsr = here->BSIM4v3gmbs * T2; + gdsr = here->BSIM4v3gds * T2; + + gmi = -here->BSIM4v3gm * T3; + gmbsi = -here->BSIM4v3gmbs * T3; + gdsi = -here->BSIM4v3gds * T3; + + Cddr = here->BSIM4v3cddb * T2; + Cdgr = here->BSIM4v3cdgb * T2; + Cdsr = here->BSIM4v3cdsb * T2; + Cdbr = -(Cddr + Cdgr + Cdsr); + + /* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */ + Cddi = here->BSIM4v3cddb * T3 * omega; + Cdgi = here->BSIM4v3cdgb * T3 * omega; + Cdsi = here->BSIM4v3cdsb * T3 * omega; + Cdbi = -(Cddi + Cdgi + Cdsi); + + Csdr = Csd * T2; + Csgr = Csg * T2; + Cssr = Css * T2; + Csbr = -(Csdr + Csgr + Cssr); + + Csdi = Csd * T3 * omega; + Csgi = Csg * T3 * omega; + Cssi = Css * T3 * omega; + Csbi = -(Csdi + Csgi + Cssi); + + Cgdr = -(Cddr + Csdr + here->BSIM4v3cbdb); + Cggr = -(Cdgr + Csgr + here->BSIM4v3cbgb); + Cgsr = -(Cdsr + Cssr + here->BSIM4v3cbsb); + Cgbr = -(Cgdr + Cggr + Cgsr); + + Cgdi = -(Cddi + Csdi); + Cggi = -(Cdgi + Csgi); + Cgsi = -(Cdsi + Cssi); + Cgbi = -(Cgdi + Cggi + Cgsi); + } + else /* QS */ + { gmr = here->BSIM4v3gm; + gmbsr = here->BSIM4v3gmbs; + gdsr = here->BSIM4v3gds; + gmi = gmbsi = gdsi = 0.0; + + Cddr = here->BSIM4v3cddb; + Cdgr = here->BSIM4v3cdgb; + Cdsr = here->BSIM4v3cdsb; + Cdbr = -(Cddr + Cdgr + Cdsr); + Cddi = Cdgi = Cdsi = Cdbi = 0.0; + + Csdr = Csd; + Csgr = Csg; + Cssr = Css; + Csbr = -(Csdr + Csgr + Cssr); + Csdi = Csgi = Cssi = Csbi = 0.0; + + Cgdr = here->BSIM4v3cgdb; + Cggr = here->BSIM4v3cggb; + Cgsr = here->BSIM4v3cgsb; + Cgbr = -(Cgdr + Cggr + Cgsr); + Cgdi = Cggi = Cgsi = Cgbi = 0.0; + } + + + if (here->BSIM4v3mode >= 0) + { Gmr = gmr; + Gmbsr = gmbsr; + FwdSumr = Gmr + Gmbsr; + RevSumr = 0.0; + Gmi = gmi; + Gmbsi = gmbsi; + FwdSumi = Gmi + Gmbsi; + RevSumi = 0.0; + + gbbdp = -(here->BSIM4v3gbds); + gbbsp = here->BSIM4v3gbds + here->BSIM4v3gbgs + here->BSIM4v3gbbs; + gbdpg = here->BSIM4v3gbgs; + gbdpdp = here->BSIM4v3gbds; + gbdpb = here->BSIM4v3gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v3igcMod) + { gIstotg = here->BSIM4v3gIgsg + here->BSIM4v3gIgcsg; + gIstotd = here->BSIM4v3gIgcsd; + gIstots = here->BSIM4v3gIgss + here->BSIM4v3gIgcss; + gIstotb = here->BSIM4v3gIgcsb; + + gIdtotg = here->BSIM4v3gIgdg + here->BSIM4v3gIgcdg; + gIdtotd = here->BSIM4v3gIgdd + here->BSIM4v3gIgcdd; + gIdtots = here->BSIM4v3gIgcds; + gIdtotb = here->BSIM4v3gIgcdb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v3igbMod) + { gIbtotg = here->BSIM4v3gIgbg; + gIbtotd = here->BSIM4v3gIgbd; + gIbtots = here->BSIM4v3gIgbs; + gIbtotb = here->BSIM4v3gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v3rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vges) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + else if (here->BSIM4v3rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vgms) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + if (here->BSIM4v3rgateMod > 1) + { gcrgd = here->BSIM4v3gcrgd * T0; + gcrgg = here->BSIM4v3gcrgg * T0; + gcrgs = here->BSIM4v3gcrgs * T0; + gcrgb = here->BSIM4v3gcrgb * T0; + gcrgg -= here->BSIM4v3gcrg; + gcrg = here->BSIM4v3gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v3rgateMod == 3) + { xcgmgmb = (cgdo + cgso + pParam->BSIM4v3cgbo) * omega; + xcgmdb = -cgdo * omega; + xcgmsb = -cgso * omega; + xcgmbb = -pParam->BSIM4v3cgbo * omega; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggbr = Cggr * omega; + xcgdbr = Cgdr * omega; + xcgsbr = Cgsr * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = Cdgr * omega; + xcsgbr = Csgr * omega; + xcbgb = here->BSIM4v3cbgb * omega; + } + else + { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v3cgbo ) * omega; + xcgdbr = (Cgdr - cgdo) * omega; + xcgsbr = (Cgsr - cgso) * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = (Cdgr - cgdo) * omega; + xcsgbr = (Csgr - cgso) * omega; + xcbgb = (here->BSIM4v3cbgb - pParam->BSIM4v3cgbo) * omega; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddbr = (Cddr + here->BSIM4v3capbd + cgdo) * omega; + xcdsbr = Cdsr * omega; + xcsdbr = Csdr * omega; + xcssbr = (here->BSIM4v3capbs + cgso + Cssr) * omega; + + if (!here->BSIM4v3rbodyMod) + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb); + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb); + + xcbdb = (here->BSIM4v3cbdb - here->BSIM4v3capbd) * omega; + xcbsb = (here->BSIM4v3cbsb - here->BSIM4v3capbs) * omega; + xcdbdb = 0.0; + } + else + { xcdbbr = Cdbr * omega; + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb) + + here->BSIM4v3capbs * omega; + + xcbdb = here->BSIM4v3cbdb * omega; + xcbsb = here->BSIM4v3cbsb * omega; + + xcdbdb = -here->BSIM4v3capbd * omega; + xcsbsb = -here->BSIM4v3capbs * omega; + } + xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb); + + xcdgbi = Cdgi; + xcsgbi = Csgi; + xcddbi = Cddi; + xcdsbi = Cdsi; + xcsdbi = Csdi; + xcssbi = Cssi; + xcdbbi = Cdbi; + xcsbbi = Csbi; + xcggbi = Cggi; + xcgdbi = Cgdi; + xcgsbi = Cgsi; + xcgbbi = Cgbi; + } + else /* Reverse mode */ + { Gmr = -gmr; + Gmbsr = -gmbsr; + FwdSumr = 0.0; + RevSumr = -(Gmr + Gmbsr); + Gmi = -gmi; + Gmbsi = -gmbsi; + FwdSumi = 0.0; + RevSumi = -(Gmi + Gmbsi); + + gbbsp = -(here->BSIM4v3gbds); + gbbdp = here->BSIM4v3gbds + here->BSIM4v3gbgs + here->BSIM4v3gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v3gbgs; + gbspsp = here->BSIM4v3gbds; + gbspb = here->BSIM4v3gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v3igcMod) + { gIstotg = here->BSIM4v3gIgsg + here->BSIM4v3gIgcdg; + gIstotd = here->BSIM4v3gIgcds; + gIstots = here->BSIM4v3gIgss + here->BSIM4v3gIgcdd; + gIstotb = here->BSIM4v3gIgcdb; + + gIdtotg = here->BSIM4v3gIgdg + here->BSIM4v3gIgcsg; + gIdtotd = here->BSIM4v3gIgdd + here->BSIM4v3gIgcss; + gIdtots = here->BSIM4v3gIgcsd; + gIdtotb = here->BSIM4v3gIgcsb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v3igbMod) + { gIbtotg = here->BSIM4v3gIgbg; + gIbtotd = here->BSIM4v3gIgbs; + gIbtots = here->BSIM4v3gIgbd; + gIbtotb = here->BSIM4v3gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v3rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vges) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + else if (here->BSIM4v3rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vgms) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + if (here->BSIM4v3rgateMod > 1) + { gcrgd = here->BSIM4v3gcrgs * T0; + gcrgg = here->BSIM4v3gcrgg * T0; + gcrgs = here->BSIM4v3gcrgd * T0; + gcrgb = here->BSIM4v3gcrgb * T0; + gcrgg -= here->BSIM4v3gcrg; + gcrg = here->BSIM4v3gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v3rgateMod == 3) + { xcgmgmb = (cgdo + cgso + pParam->BSIM4v3cgbo) * omega; + xcgmdb = -cgdo * omega; + xcgmsb = -cgso * omega; + xcgmbb = -pParam->BSIM4v3cgbo * omega; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggbr = Cggr * omega; + xcgdbr = Cgsr * omega; + xcgsbr = Cgdr * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = Csgr * omega; + xcsgbr = Cdgr * omega; + xcbgb = here->BSIM4v3cbgb * omega; + } + else + { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v3cgbo ) * omega; + xcgdbr = (Cgsr - cgdo) * omega; + xcgsbr = (Cgdr - cgso) * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = (Csgr - cgdo) * omega; + xcsgbr = (Cdgr - cgso) * omega; + xcbgb = (here->BSIM4v3cbgb - pParam->BSIM4v3cgbo) * omega; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddbr = (here->BSIM4v3capbd + cgdo + Cssr) * omega; + xcdsbr = Csdr * omega; + xcsdbr = Cdsr * omega; + xcssbr = (Cddr + here->BSIM4v3capbs + cgso) * omega; + + if (!here->BSIM4v3rbodyMod) + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb); + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb); + + xcbdb = (here->BSIM4v3cbsb - here->BSIM4v3capbd) * omega; + xcbsb = (here->BSIM4v3cbdb - here->BSIM4v3capbs) * omega; + xcdbdb = 0.0; + } + else + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb) + + here->BSIM4v3capbd * omega; + xcsbbr = Cdbr * omega; + + xcbdb = here->BSIM4v3cbsb * omega; + xcbsb = here->BSIM4v3cbdb * omega; + xcdbdb = -here->BSIM4v3capbd * omega; + xcsbsb = -here->BSIM4v3capbs * omega; + } + xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb); + + xcdgbi = Csgi; + xcsgbi = Cdgi; + xcddbi = Cssi; + xcdsbi = Csdi; + xcsdbi = Cdsi; + xcssbi = Cddi; + xcdbbi = Csbi; + xcsbbi = Cdbi; + xcggbi = Cggi; + xcgdbi = Cgsi; + xcgsbi = Cgdi; + xcgbbi = Cgbi; + } + + if (model->BSIM4v3rdsMod == 1) + { gstot = here->BSIM4v3gstot; + gstotd = here->BSIM4v3gstotd; + gstotg = here->BSIM4v3gstotg; + gstots = here->BSIM4v3gstots - gstot; + gstotb = here->BSIM4v3gstotb; + + gdtot = here->BSIM4v3gdtot; + gdtotd = here->BSIM4v3gdtotd - gdtot; + gdtotg = here->BSIM4v3gdtotg; + gdtots = here->BSIM4v3gdtots; + gdtotb = here->BSIM4v3gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0; + } + + + /* + * Loading AC matrix + */ + + if (!model->BSIM4v3rdsMod) + { gdpr = here->BSIM4v3drainConductance; + gspr = here->BSIM4v3sourceConductance; + } + else + gdpr = gspr = 0.0; + + if (!here->BSIM4v3rbodyMod) + { gjbd = here->BSIM4v3gbd; + gjbs = here->BSIM4v3gbs; + } + else + gjbd = gjbs = 0.0; + + geltd = here->BSIM4v3grgeltd; + + if (here->BSIM4v3rgateMod == 1) + { *(here->BSIM4v3GEgePtr) += geltd; + *(here->BSIM4v3GPgePtr) -= geltd; + *(here->BSIM4v3GEgpPtr) -= geltd; + + *(here->BSIM4v3GPgpPtr +1) += xcggbr; + *(here->BSIM4v3GPgpPtr) += geltd + xcggbi + gIgtotg; + *(here->BSIM4v3GPdpPtr +1) += xcgdbr; + *(here->BSIM4v3GPdpPtr) += xcgdbi + gIgtotd; + *(here->BSIM4v3GPspPtr +1) += xcgsbr; + *(here->BSIM4v3GPspPtr) += xcgsbi + gIgtots; + *(here->BSIM4v3GPbpPtr +1) += xcgbbr; + *(here->BSIM4v3GPbpPtr) += xcgbbi + gIgtotb; + } /* WDLiu: gcrg already subtracted from all gcrgg below */ + else if (here->BSIM4v3rgateMod == 2) + { *(here->BSIM4v3GEgePtr) += gcrg; + *(here->BSIM4v3GEgpPtr) += gcrgg; + *(here->BSIM4v3GEdpPtr) += gcrgd; + *(here->BSIM4v3GEspPtr) += gcrgs; + *(here->BSIM4v3GEbpPtr) += gcrgb; + + *(here->BSIM4v3GPgePtr) -= gcrg; + *(here->BSIM4v3GPgpPtr +1) += xcggbr; + *(here->BSIM4v3GPgpPtr) -= gcrgg - xcggbi - gIgtotg; + *(here->BSIM4v3GPdpPtr +1) += xcgdbr; + *(here->BSIM4v3GPdpPtr) -= gcrgd - xcgdbi - gIgtotd; + *(here->BSIM4v3GPspPtr +1) += xcgsbr; + *(here->BSIM4v3GPspPtr) -= gcrgs - xcgsbi - gIgtots; + *(here->BSIM4v3GPbpPtr +1) += xcgbbr; + *(here->BSIM4v3GPbpPtr) -= gcrgb - xcgbbi - gIgtotb; + } + else if (here->BSIM4v3rgateMod == 3) + { *(here->BSIM4v3GEgePtr) += geltd; + *(here->BSIM4v3GEgmPtr) -= geltd; + *(here->BSIM4v3GMgePtr) -= geltd; + *(here->BSIM4v3GMgmPtr) += geltd + gcrg; + *(here->BSIM4v3GMgmPtr +1) += xcgmgmb; + + *(here->BSIM4v3GMdpPtr) += gcrgd; + *(here->BSIM4v3GMdpPtr +1) += xcgmdb; + *(here->BSIM4v3GMgpPtr) += gcrgg; + *(here->BSIM4v3GMspPtr) += gcrgs; + *(here->BSIM4v3GMspPtr +1) += xcgmsb; + *(here->BSIM4v3GMbpPtr) += gcrgb; + *(here->BSIM4v3GMbpPtr +1) += xcgmbb; + + *(here->BSIM4v3DPgmPtr +1) += xcdgmb; + *(here->BSIM4v3GPgmPtr) -= gcrg; + *(here->BSIM4v3SPgmPtr +1) += xcsgmb; + *(here->BSIM4v3BPgmPtr +1) += xcbgmb; + + *(here->BSIM4v3GPgpPtr) -= gcrgg - xcggbi - gIgtotg; + *(here->BSIM4v3GPgpPtr +1) += xcggbr; + *(here->BSIM4v3GPdpPtr) -= gcrgd - xcgdbi - gIgtotd; + *(here->BSIM4v3GPdpPtr +1) += xcgdbr; + *(here->BSIM4v3GPspPtr) -= gcrgs - xcgsbi - gIgtots; + *(here->BSIM4v3GPspPtr +1) += xcgsbr; + *(here->BSIM4v3GPbpPtr) -= gcrgb - xcgbbi - gIgtotb; + *(here->BSIM4v3GPbpPtr +1) += xcgbbr; + } + else + { *(here->BSIM4v3GPgpPtr +1) += xcggbr; + *(here->BSIM4v3GPgpPtr) += xcggbi + gIgtotg; + *(here->BSIM4v3GPdpPtr +1) += xcgdbr; + *(here->BSIM4v3GPdpPtr) += xcgdbi + gIgtotd; + *(here->BSIM4v3GPspPtr +1) += xcgsbr; + *(here->BSIM4v3GPspPtr) += xcgsbi + gIgtots; + *(here->BSIM4v3GPbpPtr +1) += xcgbbr; + *(here->BSIM4v3GPbpPtr) += xcgbbi + gIgtotb; + } + + if (model->BSIM4v3rdsMod) + { (*(here->BSIM4v3DgpPtr) += gdtotg); + (*(here->BSIM4v3DspPtr) += gdtots); + (*(here->BSIM4v3DbpPtr) += gdtotb); + (*(here->BSIM4v3SdpPtr) += gstotd); + (*(here->BSIM4v3SgpPtr) += gstotg); + (*(here->BSIM4v3SbpPtr) += gstotb); + } + + *(here->BSIM4v3DPdpPtr +1) += xcddbr + gdsi + RevSumi; + *(here->BSIM4v3DPdpPtr) += gdpr + xcddbi + gdsr + here->BSIM4v3gbd + - gdtotd + RevSumr + gbdpdp - gIdtotd; + *(here->BSIM4v3DPdPtr) -= gdpr + gdtot; + *(here->BSIM4v3DPgpPtr +1) += xcdgbr + Gmi; + *(here->BSIM4v3DPgpPtr) += Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg; + *(here->BSIM4v3DPspPtr +1) += xcdsbr - gdsi - FwdSumi; + *(here->BSIM4v3DPspPtr) -= gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots; + *(here->BSIM4v3DPbpPtr +1) += xcdbbr + Gmbsi; + *(here->BSIM4v3DPbpPtr) -= gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb; + + *(here->BSIM4v3DdpPtr) -= gdpr - gdtotd; + *(here->BSIM4v3DdPtr) += gdpr + gdtot; + + *(here->BSIM4v3SPdpPtr +1) += xcsdbr - gdsi - RevSumi; + *(here->BSIM4v3SPdpPtr) -= gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd; + *(here->BSIM4v3SPgpPtr +1) += xcsgbr - Gmi; + *(here->BSIM4v3SPgpPtr) -= Gmr - xcsgbi + gstotg - gbspg + gIstotg; + *(here->BSIM4v3SPspPtr +1) += xcssbr + gdsi + FwdSumi; + *(here->BSIM4v3SPspPtr) += gspr + xcssbi + gdsr + here->BSIM4v3gbs + - gstots + FwdSumr + gbspsp - gIstots; + *(here->BSIM4v3SPsPtr) -= gspr + gstot; + *(here->BSIM4v3SPbpPtr +1) += xcsbbr - Gmbsi; + *(here->BSIM4v3SPbpPtr) -= gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb; + + *(here->BSIM4v3SspPtr) -= gspr - gstots; + *(here->BSIM4v3SsPtr) += gspr + gstot; + + *(here->BSIM4v3BPdpPtr +1) += xcbdb; + *(here->BSIM4v3BPdpPtr) -= gjbd - gbbdp + gIbtotd; + *(here->BSIM4v3BPgpPtr +1) += xcbgb; + *(here->BSIM4v3BPgpPtr) -= here->BSIM4v3gbgs + gIbtotg; + *(here->BSIM4v3BPspPtr +1) += xcbsb; + *(here->BSIM4v3BPspPtr) -= gjbs - gbbsp + gIbtots; + *(here->BSIM4v3BPbpPtr +1) += xcbbb; + *(here->BSIM4v3BPbpPtr) += gjbd + gjbs - here->BSIM4v3gbbs + - gIbtotb; + ggidld = here->BSIM4v3ggidld; + ggidlg = here->BSIM4v3ggidlg; + ggidlb = here->BSIM4v3ggidlb; + ggislg = here->BSIM4v3ggislg; + ggisls = here->BSIM4v3ggisls; + ggislb = here->BSIM4v3ggislb; + + /* stamp gidl */ + (*(here->BSIM4v3DPdpPtr) += ggidld); + (*(here->BSIM4v3DPgpPtr) += ggidlg); + (*(here->BSIM4v3DPspPtr) -= (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v3DPbpPtr) += ggidlb); + (*(here->BSIM4v3BPdpPtr) -= ggidld); + (*(here->BSIM4v3BPgpPtr) -= ggidlg); + (*(here->BSIM4v3BPspPtr) += (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v3BPbpPtr) -= ggidlb); + /* stamp gisl */ + (*(here->BSIM4v3SPdpPtr) -= (ggisls + ggislg) + ggislb); + (*(here->BSIM4v3SPgpPtr) += ggislg); + (*(here->BSIM4v3SPspPtr) += ggisls); + (*(here->BSIM4v3SPbpPtr) += ggislb); + (*(here->BSIM4v3BPdpPtr) += (ggislg + ggisls) + ggislb); + (*(here->BSIM4v3BPgpPtr) -= ggislg); + (*(here->BSIM4v3BPspPtr) -= ggisls); + (*(here->BSIM4v3BPbpPtr) -= ggislb); + + if (here->BSIM4v3rbodyMod) + { (*(here->BSIM4v3DPdbPtr +1) += xcdbdb); + (*(here->BSIM4v3DPdbPtr) -= here->BSIM4v3gbd); + (*(here->BSIM4v3SPsbPtr +1) += xcsbsb); + (*(here->BSIM4v3SPsbPtr) -= here->BSIM4v3gbs); + + (*(here->BSIM4v3DBdpPtr +1) += xcdbdb); + (*(here->BSIM4v3DBdpPtr) -= here->BSIM4v3gbd); + (*(here->BSIM4v3DBdbPtr +1) -= xcdbdb); + (*(here->BSIM4v3DBdbPtr) += here->BSIM4v3gbd + here->BSIM4v3grbpd + + here->BSIM4v3grbdb); + (*(here->BSIM4v3DBbpPtr) -= here->BSIM4v3grbpd); + (*(here->BSIM4v3DBbPtr) -= here->BSIM4v3grbdb); + + (*(here->BSIM4v3BPdbPtr) -= here->BSIM4v3grbpd); + (*(here->BSIM4v3BPbPtr) -= here->BSIM4v3grbpb); + (*(here->BSIM4v3BPsbPtr) -= here->BSIM4v3grbps); + (*(here->BSIM4v3BPbpPtr) += here->BSIM4v3grbpd + here->BSIM4v3grbps + + here->BSIM4v3grbpb); + /* WDLiu: (-here->BSIM4v3gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v3SBspPtr +1) += xcsbsb); + (*(here->BSIM4v3SBspPtr) -= here->BSIM4v3gbs); + (*(here->BSIM4v3SBbpPtr) -= here->BSIM4v3grbps); + (*(here->BSIM4v3SBbPtr) -= here->BSIM4v3grbsb); + (*(here->BSIM4v3SBsbPtr +1) -= xcsbsb); + (*(here->BSIM4v3SBsbPtr) += here->BSIM4v3gbs + + here->BSIM4v3grbps + here->BSIM4v3grbsb); + + (*(here->BSIM4v3BdbPtr) -= here->BSIM4v3grbdb); + (*(here->BSIM4v3BbpPtr) -= here->BSIM4v3grbpb); + (*(here->BSIM4v3BsbPtr) -= here->BSIM4v3grbsb); + (*(here->BSIM4v3BbPtr) += here->BSIM4v3grbsb + here->BSIM4v3grbdb + + here->BSIM4v3grbpb); + } + + + /* + * WDLiu: The internal charge node generated for transient NQS is not needed for + * AC NQS. The following is not doing a real job, but we have to keep it; + * otherwise a singular AC NQS matrix may occur if the transient NQS is on. + * The charge node is isolated from the instance. + */ + if (here->BSIM4v3trnqsMod) + { (*(here->BSIM4v3QqPtr) += 1.0); + (*(here->BSIM4v3QgpPtr) += 0.0); + (*(here->BSIM4v3QdpPtr) += 0.0); + (*(here->BSIM4v3QspPtr) += 0.0); + (*(here->BSIM4v3QbpPtr) += 0.0); + + (*(here->BSIM4v3DPqPtr) += 0.0); + (*(here->BSIM4v3SPqPtr) += 0.0); + (*(here->BSIM4v3GPqPtr) += 0.0); + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3ask.c b/src/spicelib/devices/bsim4v3/b4v3ask.c new file mode 100644 index 000000000..b2d2b40be --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3ask.c @@ -0,0 +1,309 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3ask.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim4v3def.h" +#include "sperror.h" + +int +BSIM4v3ask(ckt,inst,which,value,select) +CKTcircuit *ckt; +GENinstance *inst; +int which; +IFvalue *value; +IFvalue *select; +{ +BSIM4v3instance *here = (BSIM4v3instance*)inst; + + switch(which) + { case BSIM4v3_L: + value->rValue = here->BSIM4v3l; + return(OK); + case BSIM4v3_W: + value->rValue = here->BSIM4v3w; + return(OK); + case BSIM4v3_NF: + value->rValue = here->BSIM4v3nf; + return(OK); + case BSIM4v3_MIN: + value->iValue = here->BSIM4v3min; + return(OK); + case BSIM4v3_AS: + value->rValue = here->BSIM4v3sourceArea; + return(OK); + case BSIM4v3_AD: + value->rValue = here->BSIM4v3drainArea; + return(OK); + case BSIM4v3_PS: + value->rValue = here->BSIM4v3sourcePerimeter; + return(OK); + case BSIM4v3_PD: + value->rValue = here->BSIM4v3drainPerimeter; + return(OK); + case BSIM4v3_NRS: + value->rValue = here->BSIM4v3sourceSquares; + return(OK); + case BSIM4v3_NRD: + value->rValue = here->BSIM4v3drainSquares; + return(OK); + case BSIM4v3_OFF: + value->rValue = here->BSIM4v3off; + return(OK); + case BSIM4v3_SA: + value->rValue = here->BSIM4v3sa ; + return(OK); + case BSIM4v3_SB: + value->rValue = here->BSIM4v3sb ; + return(OK); + case BSIM4v3_SD: + value->rValue = here->BSIM4v3sd ; + return(OK); + case BSIM4v3_RBSB: + value->rValue = here->BSIM4v3rbsb; + return(OK); + case BSIM4v3_RBDB: + value->rValue = here->BSIM4v3rbdb; + return(OK); + case BSIM4v3_RBPB: + value->rValue = here->BSIM4v3rbpb; + return(OK); + case BSIM4v3_RBPS: + value->rValue = here->BSIM4v3rbps; + return(OK); + case BSIM4v3_RBPD: + value->rValue = here->BSIM4v3rbpd; + return(OK); + case BSIM4v3_TRNQSMOD: + value->iValue = here->BSIM4v3trnqsMod; + return(OK); + case BSIM4v3_ACNQSMOD: + value->iValue = here->BSIM4v3acnqsMod; + return(OK); + case BSIM4v3_RBODYMOD: + value->iValue = here->BSIM4v3rbodyMod; + return(OK); + case BSIM4v3_RGATEMOD: + value->iValue = here->BSIM4v3rgateMod; + return(OK); + case BSIM4v3_GEOMOD: + value->iValue = here->BSIM4v3geoMod; + return(OK); + case BSIM4v3_RGEOMOD: + value->iValue = here->BSIM4v3rgeoMod; + return(OK); + case BSIM4v3_IC_VDS: + value->rValue = here->BSIM4v3icVDS; + return(OK); + case BSIM4v3_IC_VGS: + value->rValue = here->BSIM4v3icVGS; + return(OK); + case BSIM4v3_IC_VBS: + value->rValue = here->BSIM4v3icVBS; + return(OK); + case BSIM4v3_DNODE: + value->iValue = here->BSIM4v3dNode; + return(OK); + case BSIM4v3_GNODEEXT: + value->iValue = here->BSIM4v3gNodeExt; + return(OK); + case BSIM4v3_SNODE: + value->iValue = here->BSIM4v3sNode; + return(OK); + case BSIM4v3_BNODE: + value->iValue = here->BSIM4v3bNode; + return(OK); + case BSIM4v3_DNODEPRIME: + value->iValue = here->BSIM4v3dNodePrime; + return(OK); + case BSIM4v3_GNODEPRIME: + value->iValue = here->BSIM4v3gNodePrime; + return(OK); + case BSIM4v3_GNODEMID: + value->iValue = here->BSIM4v3gNodeMid; + return(OK); + case BSIM4v3_SNODEPRIME: + value->iValue = here->BSIM4v3sNodePrime; + return(OK); + case BSIM4v3_DBNODE: + value->iValue = here->BSIM4v3dbNode; + return(OK); + case BSIM4v3_BNODEPRIME: + value->iValue = here->BSIM4v3bNodePrime; + return(OK); + case BSIM4v3_SBNODE: + value->iValue = here->BSIM4v3sbNode; + return(OK); + case BSIM4v3_SOURCECONDUCT: + value->rValue = here->BSIM4v3sourceConductance; + return(OK); + case BSIM4v3_DRAINCONDUCT: + value->rValue = here->BSIM4v3drainConductance; + return(OK); + case BSIM4v3_VBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3vbd); + return(OK); + case BSIM4v3_VBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3vbs); + return(OK); + case BSIM4v3_VGS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3vgs); + return(OK); + case BSIM4v3_VDS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3vds); + return(OK); + case BSIM4v3_CD: + value->rValue = here->BSIM4v3cd; + return(OK); + case BSIM4v3_CBS: + value->rValue = here->BSIM4v3cbs; + return(OK); + case BSIM4v3_CBD: + value->rValue = here->BSIM4v3cbd; + return(OK); + case BSIM4v3_CSUB: + value->rValue = here->BSIM4v3csub; + return(OK); + case BSIM4v3_IGIDL: + value->rValue = here->BSIM4v3Igidl; + return(OK); + case BSIM4v3_IGISL: + value->rValue = here->BSIM4v3Igisl; + return(OK); + case BSIM4v3_IGS: + value->rValue = here->BSIM4v3Igs; + return(OK); + case BSIM4v3_IGD: + value->rValue = here->BSIM4v3Igd; + return(OK); + case BSIM4v3_IGB: + value->rValue = here->BSIM4v3Igb; + return(OK); + case BSIM4v3_IGCS: + value->rValue = here->BSIM4v3Igcs; + return(OK); + case BSIM4v3_IGCD: + value->rValue = here->BSIM4v3Igcd; + return(OK); + case BSIM4v3_GM: + value->rValue = here->BSIM4v3gm; + return(OK); + case BSIM4v3_GDS: + value->rValue = here->BSIM4v3gds; + return(OK); + case BSIM4v3_GMBS: + value->rValue = here->BSIM4v3gmbs; + return(OK); + case BSIM4v3_GBD: + value->rValue = here->BSIM4v3gbd; + return(OK); + case BSIM4v3_GBS: + value->rValue = here->BSIM4v3gbs; + return(OK); + case BSIM4v3_QB: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3qb); + return(OK); + case BSIM4v3_CQB: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3cqb); + return(OK); + case BSIM4v3_QG: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3qg); + return(OK); + case BSIM4v3_CQG: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3cqg); + return(OK); + case BSIM4v3_QD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3qd); + return(OK); + case BSIM4v3_CQD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3cqd); + return(OK); + case BSIM4v3_QS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3qs); + return(OK); + case BSIM4v3_CGGB: + value->rValue = here->BSIM4v3cggb; + return(OK); + case BSIM4v3_CGDB: + value->rValue = here->BSIM4v3cgdb; + return(OK); + case BSIM4v3_CGSB: + value->rValue = here->BSIM4v3cgsb; + return(OK); + case BSIM4v3_CDGB: + value->rValue = here->BSIM4v3cdgb; + return(OK); + case BSIM4v3_CDDB: + value->rValue = here->BSIM4v3cddb; + return(OK); + case BSIM4v3_CDSB: + value->rValue = here->BSIM4v3cdsb; + return(OK); + case BSIM4v3_CBGB: + value->rValue = here->BSIM4v3cbgb; + return(OK); + case BSIM4v3_CBDB: + value->rValue = here->BSIM4v3cbdb; + return(OK); + case BSIM4v3_CBSB: + value->rValue = here->BSIM4v3cbsb; + return(OK); + case BSIM4v3_CSGB: + value->rValue = here->BSIM4v3csgb; + return(OK); + case BSIM4v3_CSDB: + value->rValue = here->BSIM4v3csdb; + return(OK); + case BSIM4v3_CSSB: + value->rValue = here->BSIM4v3cssb; + return(OK); + case BSIM4v3_CGBB: + value->rValue = here->BSIM4v3cgbb; + return(OK); + case BSIM4v3_CDBB: + value->rValue = here->BSIM4v3cdbb; + return(OK); + case BSIM4v3_CSBB: + value->rValue = here->BSIM4v3csbb; + return(OK); + case BSIM4v3_CBBB: + value->rValue = here->BSIM4v3cbbb; + return(OK); + case BSIM4v3_CAPBD: + value->rValue = here->BSIM4v3capbd; + return(OK); + case BSIM4v3_CAPBS: + value->rValue = here->BSIM4v3capbs; + return(OK); + case BSIM4v3_VON: + value->rValue = here->BSIM4v3von; + return(OK); + case BSIM4v3_VDSAT: + value->rValue = here->BSIM4v3vdsat; + return(OK); + case BSIM4v3_QBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3qbs); + return(OK); + case BSIM4v3_QBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v3qbd); + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + diff --git a/src/spicelib/devices/bsim4v3/b4v3check.c b/src/spicelib/devices/bsim4v3/b4v3check.c new file mode 100644 index 000000000..976e526cc --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3check.c @@ -0,0 +1,663 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3check.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" + +int +BSIM4v3checkModel(model, here, ckt) +BSIM4v3model *model; +BSIM4v3instance *here; +CKTcircuit *ckt; +{ +struct bsim4v3SizeDependParam *pParam; +int Fatal_Flag = 0; +FILE *fplog; + + if ((fplog = fopen("bsim4v3.out", "w")) != NULL) + { pParam = here->pParam; + fprintf(fplog, "BSIM4v3: Berkeley Short Channel IGFET Model-4\n"); + fprintf(fplog, "Developed by Xuemei (Jane) Xi, Jin He, Mohan Dunga, Prof. Ali Niknejad and Prof. Chenming Hu in 2003.\n"); + fprintf(fplog, "\n"); + fprintf(fplog, "++++++++++ BSIM4v3 PARAMETER CHECKING BELOW ++++++++++\n"); + + if (strcmp(model->BSIM4v3version, "4.3.0") != 0) + { fprintf(fplog, "Warning: This model is BSIM4.3.0; you specified a wrong version number.\n"); + printf("Warning: This model is BSIM4.3.0; you specified a wrong version number.\n"); + } + fprintf(fplog, "Model = %s\n", model->BSIM4v3modName); + + + if ((here->BSIM4v3rgateMod == 2) || (here->BSIM4v3rgateMod == 3)) + { if ((here->BSIM4v3trnqsMod == 1) || (here->BSIM4v3acnqsMod == 1)) + { fprintf(fplog, "Warning: You've selected both Rg and charge deficit NQS; select one only.\n"); + printf("Warning: You've selected both Rg and charge deficit NQS; select one only.\n"); + } + } + + + if (model->BSIM4v3toxe <= 0.0) + { fprintf(fplog, "Fatal: Toxe = %g is not positive.\n", + model->BSIM4v3toxe); + printf("Fatal: Toxe = %g is not positive.\n", model->BSIM4v3toxe); + Fatal_Flag = 1; + } + if (model->BSIM4v3toxp <= 0.0) + { fprintf(fplog, "Fatal: Toxp = %g is not positive.\n", + model->BSIM4v3toxp); + printf("Fatal: Toxp = %g is not positive.\n", model->BSIM4v3toxp); + Fatal_Flag = 1; + } + + if (model->BSIM4v3toxm <= 0.0) + { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", + model->BSIM4v3toxm); + printf("Fatal: Toxm = %g is not positive.\n", model->BSIM4v3toxm); + Fatal_Flag = 1; + } + + if (model->BSIM4v3toxref <= 0.0) + { fprintf(fplog, "Fatal: Toxref = %g is not positive.\n", + model->BSIM4v3toxref); + printf("Fatal: Toxref = %g is not positive.\n", model->BSIM4v3toxref); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3lpe0 < -pParam->BSIM4v3leff) + { fprintf(fplog, "Fatal: Lpe0 = %g is less than -Leff.\n", + pParam->BSIM4v3lpe0); + printf("Fatal: Lpe0 = %g is less than -Leff.\n", + pParam->BSIM4v3lpe0); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3lpeb < -pParam->BSIM4v3leff) + { fprintf(fplog, "Fatal: Lpeb = %g is less than -Leff.\n", + pParam->BSIM4v3lpeb); + printf("Fatal: Lpeb = %g is less than -Leff.\n", + pParam->BSIM4v3lpeb); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3phin < -0.4) + { fprintf(fplog, "Fatal: Phin = %g is less than -0.4.\n", + pParam->BSIM4v3phin); + printf("Fatal: Phin = %g is less than -0.4.\n", + pParam->BSIM4v3phin); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3ndep <= 0.0) + { fprintf(fplog, "Fatal: Ndep = %g is not positive.\n", + pParam->BSIM4v3ndep); + printf("Fatal: Ndep = %g is not positive.\n", + pParam->BSIM4v3ndep); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3nsub <= 0.0) + { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", + pParam->BSIM4v3nsub); + printf("Fatal: Nsub = %g is not positive.\n", + pParam->BSIM4v3nsub); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3ngate < 0.0) + { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", + pParam->BSIM4v3ngate); + printf("Fatal: Ngate = %g Ngate is not positive.\n", + pParam->BSIM4v3ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3ngate > 1.e25) + { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", + pParam->BSIM4v3ngate); + printf("Fatal: Ngate = %g Ngate is too high\n", + pParam->BSIM4v3ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3xj <= 0.0) + { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", + pParam->BSIM4v3xj); + printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM4v3xj); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3dvt1 < 0.0) + { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", + pParam->BSIM4v3dvt1); + printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM4v3dvt1); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3dvt1w < 0.0) + { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", + pParam->BSIM4v3dvt1w); + printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM4v3dvt1w); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3w0 == -pParam->BSIM4v3weff) + { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3dsub < 0.0) + { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM4v3dsub); + printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM4v3dsub); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3b1 == -pParam->BSIM4v3weff) + { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3u0temp <= 0.0) + { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM4v3u0temp); + printf("Fatal: u0 at current temperature = %g is not positive.\n", + pParam->BSIM4v3u0temp); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3delta < 0.0) + { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", + pParam->BSIM4v3delta); + printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM4v3delta); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3vsattemp <= 0.0) + { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM4v3vsattemp); + printf("Fatal: Vsat at current temperature = %g is not positive.\n", + pParam->BSIM4v3vsattemp); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3pclm <= 0.0) + { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM4v3pclm); + printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM4v3pclm); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3drout < 0.0) + { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM4v3drout); + printf("Fatal: Drout = %g is negative.\n", pParam->BSIM4v3drout); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3pscbe2 <= 0.0) + { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", + pParam->BSIM4v3pscbe2); + printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM4v3pscbe2); + } + + if (here->BSIM4v3nf < 1.0) + { fprintf(fplog, "Fatal: Number of finger = %g is smaller than one.\n", here->BSIM4v3nf); + printf("Fatal: Number of finger = %g is smaller than one.\n", here->BSIM4v3nf); + Fatal_Flag = 1; + } + + if((here->BSIM4v3sa > 0.0) && (here->BSIM4v3sb > 0.0) && + ((here->BSIM4v3nf == 1.0) || ((here->BSIM4v3nf > 1.0) && (here->BSIM4v3sd > 0.0))) ) + { if (model->BSIM4v3saref <= 0.0) + { fprintf(fplog, "Fatal: SAref = %g is not positive.\n",model->BSIM4v3saref); + printf("Fatal: SAref = %g is not positive.\n",model->BSIM4v3saref); + Fatal_Flag = 1; + } + if (model->BSIM4v3sbref <= 0.0) + { fprintf(fplog, "Fatal: SBref = %g is not positive.\n",model->BSIM4v3sbref); + printf("Fatal: SBref = %g is not positive.\n",model->BSIM4v3sbref); + Fatal_Flag = 1; + } + if (model->BSIM4v3wlod < 0.0) + { fprintf(fplog, "Warning: WLOD = %g is less than 0. Set to 0.0\n",model->BSIM4v3wlod); + printf("Warning: WLOD = %g is less than 0.\n",model->BSIM4v3wlod); + model->BSIM4v3wlod = 0.0; + } + if (model->BSIM4v3kvsat < -1.0 ) + { fprintf(fplog, "Warning: KVSAT = %g is too small; Reset to -1.0.\n",model->BSIM4v3kvsat); + printf("Warning: KVSAT = %g is is too small; Reset to -1.0.\n",model->BSIM4v3kvsat); + model->BSIM4v3kvsat = -1.0; + } + if (model->BSIM4v3kvsat > 1.0) + { fprintf(fplog, "Warning: KVSAT = %g is too big; Reset to 1.0.\n",model->BSIM4v3kvsat); + printf("Warning: KVSAT = %g is too big; Reset to 1.0.\n",model->BSIM4v3kvsat); + model->BSIM4v3kvsat = 1.0; + } + if (model->BSIM4v3lodk2 <= 0.0) + { fprintf(fplog, "Warning: LODK2 = %g is not positive.\n",model->BSIM4v3lodk2); + printf("Warning: LODK2 = %g is not positive.\n",model->BSIM4v3lodk2); + } + if (model->BSIM4v3lodeta0 <= 0.0) + { fprintf(fplog, "Warning: LODETA0 = %g is not positive.\n",model->BSIM4v3lodeta0); + printf("Warning: LODETA0 = %g is not positive.\n",model->BSIM4v3lodeta0); + } + } + + if ((here->BSIM4v3l + model->BSIM4v3xl) <= model->BSIM4v3xgl) + { fprintf(fplog, "Fatal: The parameter xgl must be smaller than Ldrawn+XL.\n"); + printf("Fatal: The parameter xgl must be smaller than Ldrawn+XL.\n"); + Fatal_Flag = 1; + } + if (model->BSIM4v3ngcon < 1.0) + { fprintf(fplog, "Fatal: The parameter ngcon cannot be smaller than one.\n"); + printf("Fatal: The parameter ngcon cannot be smaller than one.\n"); + Fatal_Flag = 1; + } + if ((model->BSIM4v3ngcon != 1.0) && (model->BSIM4v3ngcon != 2.0)) + { model->BSIM4v3ngcon = 1.0; + fprintf(fplog, "Warning: Ngcon must be equal to one or two; reset to 1.0.\n"); + printf("Warning: Ngcon must be equal to one or two; reset to 1.0.\n"); + } + + if (model->BSIM4v3gbmin < 1.0e-20) + { fprintf(fplog, "Warning: Gbmin = %g is too small.\n", + model->BSIM4v3gbmin); + printf("Warning: Gbmin = %g is too small.\n", model->BSIM4v3gbmin); + } + + if (pParam->BSIM4v3noff < 0.1) + { fprintf(fplog, "Warning: Noff = %g is too small.\n", + pParam->BSIM4v3noff); + printf("Warning: Noff = %g is too small.\n", pParam->BSIM4v3noff); + } + + if (pParam->BSIM4v3voffcv < -0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too small.\n", + pParam->BSIM4v3voffcv); + printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM4v3voffcv); + } + + /* Check capacitance parameters */ + if (pParam->BSIM4v3clc < 0.0) + { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM4v3clc); + printf("Fatal: Clc = %g is negative.\n", pParam->BSIM4v3clc); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3moin < 5.0) + { fprintf(fplog, "Warning: Moin = %g is too small.\n", + pParam->BSIM4v3moin); + printf("Warning: Moin = %g is too small.\n", pParam->BSIM4v3moin); + } + if (pParam->BSIM4v3moin > 25.0) + { fprintf(fplog, "Warning: Moin = %g is too large.\n", + pParam->BSIM4v3moin); + printf("Warning: Moin = %g is too large.\n", pParam->BSIM4v3moin); + } + if(model->BSIM4v3capMod ==2) { + if (pParam->BSIM4v3acde < 0.1) + { fprintf(fplog, "Warning: Acde = %g is too small.\n", + pParam->BSIM4v3acde); + printf("Warning: Acde = %g is too small.\n", pParam->BSIM4v3acde); + } + if (pParam->BSIM4v3acde > 1.6) + { fprintf(fplog, "Warning: Acde = %g is too large.\n", + pParam->BSIM4v3acde); + printf("Warning: Acde = %g is too large.\n", pParam->BSIM4v3acde); + } + } + + /* Check overlap capacitance parameters */ + if (pParam->BSIM4v3ckappas < 0.02) + { fprintf(fplog, "Warning: ckappas = %g is too small. Set to 0.02\n", + pParam->BSIM4v3ckappas); + printf("Warning: ckappas = %g is too small.\n", pParam->BSIM4v3ckappas); + pParam->BSIM4v3ckappas = 0.02; + } + if (pParam->BSIM4v3ckappad < 0.02) + { fprintf(fplog, "Warning: ckappad = %g is too small. Set to 0.02\n", + pParam->BSIM4v3ckappad); + printf("Warning: ckappad = %g is too small.\n", pParam->BSIM4v3ckappad); + pParam->BSIM4v3ckappad = 0.02; + } + + if (model->BSIM4v3paramChk ==1) + { +/* Check L and W parameters */ + if (pParam->BSIM4v3leff <= 1.0e-9) + { fprintf(fplog, "Warning: Leff = %g <= 1.0e-9. Recommended Leff >= 1e-8 \n", + pParam->BSIM4v3leff); + printf("Warning: Leff = %g <= 1.0e-9. Recommended Leff >= 1e-8 \n", + pParam->BSIM4v3leff); + } + + if (pParam->BSIM4v3leffCV <= 1.0e-9) + { fprintf(fplog, "Warning: Leff for CV = %g <= 1.0e-9. Recommended LeffCV >=1e-8 \n", + pParam->BSIM4v3leffCV); + printf("Warning: Leff for CV = %g <= 1.0e-9. Recommended LeffCV >=1e-8 \n", + pParam->BSIM4v3leffCV); + } + + if (pParam->BSIM4v3weff <= 1.0e-9) + { fprintf(fplog, "Warning: Weff = %g <= 1.0e-9. Recommended Weff >=1e-7 \n", + pParam->BSIM4v3weff); + printf("Warning: Weff = %g <= 1.0e-9. Recommended Weff >=1e-7 \n", + pParam->BSIM4v3weff); + } + + if (pParam->BSIM4v3weffCV <= 1.0e-9) + { fprintf(fplog, "Warning: Weff for CV = %g <= 1.0e-9. Recommended WeffCV >= 1e-7 \n", + pParam->BSIM4v3weffCV); + printf("Warning: Weff for CV = %g <= 1.0e-9. Recommended WeffCV >= 1e-7 \n", + pParam->BSIM4v3weffCV); + } + + /* Check threshold voltage parameters */ + if (model->BSIM4v3toxe < 1.0e-10) + { fprintf(fplog, "Warning: Toxe = %g is less than 1A. Recommended Toxe >= 5A\n", + model->BSIM4v3toxe); + printf("Warning: Toxe = %g is less than 1A. Recommended Toxe >= 5A\n", model->BSIM4v3toxe); + } + if (model->BSIM4v3toxp < 1.0e-10) + { fprintf(fplog, "Warning: Toxp = %g is less than 1A. Recommended Toxp >= 5A\n", + model->BSIM4v3toxp); + printf("Warning: Toxp = %g is less than 1A. Recommended Toxp >= 5A\n", model->BSIM4v3toxp); + } + if (model->BSIM4v3toxm < 1.0e-10) + { fprintf(fplog, "Warning: Toxm = %g is less than 1A. Recommended Toxm >= 5A\n", + model->BSIM4v3toxm); + printf("Warning: Toxm = %g is less than 1A. Recommended Toxm >= 5A\n", model->BSIM4v3toxm); + } + + if (pParam->BSIM4v3ndep <= 1.0e12) + { fprintf(fplog, "Warning: Ndep = %g may be too small.\n", + pParam->BSIM4v3ndep); + printf("Warning: Ndep = %g may be too small.\n", + pParam->BSIM4v3ndep); + } + else if (pParam->BSIM4v3ndep >= 1.0e21) + { fprintf(fplog, "Warning: Ndep = %g may be too large.\n", + pParam->BSIM4v3ndep); + printf("Warning: Ndep = %g may be too large.\n", + pParam->BSIM4v3ndep); + } + + if (pParam->BSIM4v3nsub <= 1.0e14) + { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", + pParam->BSIM4v3nsub); + printf("Warning: Nsub = %g may be too small.\n", + pParam->BSIM4v3nsub); + } + else if (pParam->BSIM4v3nsub >= 1.0e21) + { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", + pParam->BSIM4v3nsub); + printf("Warning: Nsub = %g may be too large.\n", + pParam->BSIM4v3nsub); + } + + if ((pParam->BSIM4v3ngate > 0.0) && + (pParam->BSIM4v3ngate <= 1.e18)) + { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM4v3ngate); + printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM4v3ngate); + } + + if (pParam->BSIM4v3dvt0 < 0.0) + { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", + pParam->BSIM4v3dvt0); + printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM4v3dvt0); + } + + if (fabs(1.0e-6 / (pParam->BSIM4v3w0 + pParam->BSIM4v3weff)) > 10.0) + { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); + printf("Warning: (W0 + Weff) may be too small.\n"); + } + +/* Check subthreshold parameters */ + if (pParam->BSIM4v3nfactor < 0.0) + { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", + pParam->BSIM4v3nfactor); + printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM4v3nfactor); + } + if (pParam->BSIM4v3cdsc < 0.0) + { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", + pParam->BSIM4v3cdsc); + printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM4v3cdsc); + } + if (pParam->BSIM4v3cdscd < 0.0) + { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", + pParam->BSIM4v3cdscd); + printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM4v3cdscd); + } +/* Check DIBL parameters */ + if (pParam->BSIM4v3eta0 < 0.0) + { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", + pParam->BSIM4v3eta0); + printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM4v3eta0); + } + +/* Check Abulk parameters */ + if (fabs(1.0e-6 / (pParam->BSIM4v3b1 + pParam->BSIM4v3weff)) > 10.0) + { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); + printf("Warning: (B1 + Weff) may be too small.\n"); + } + + +/* Check Saturation parameters */ + if (pParam->BSIM4v3a2 < 0.01) + { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM4v3a2); + printf("Warning: A2 = %g is too small. Set to 0.01.\n", + pParam->BSIM4v3a2); + pParam->BSIM4v3a2 = 0.01; + } + else if (pParam->BSIM4v3a2 > 1.0) + { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM4v3a2); + printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM4v3a2); + pParam->BSIM4v3a2 = 1.0; + pParam->BSIM4v3a1 = 0.0; + + } + + if (pParam->BSIM4v3prwg < 0.0) + { fprintf(fplog, "Warning: Prwg = %g is negative. Set to zero.\n", + pParam->BSIM4v3prwg); + printf("Warning: Prwg = %g is negative. Set to zero.\n", + pParam->BSIM4v3prwg); + pParam->BSIM4v3prwg = 0.0; + } + if (pParam->BSIM4v3rdsw < 0.0) + { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM4v3rdsw); + printf("Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM4v3rdsw); + pParam->BSIM4v3rdsw = 0.0; + pParam->BSIM4v3rds0 = 0.0; + } + if (pParam->BSIM4v3rds0 < 0.0) + { fprintf(fplog, "Warning: Rds at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v3rds0); + printf("Warning: Rds at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v3rds0); + pParam->BSIM4v3rds0 = 0.0; + } + + if (pParam->BSIM4v3rdswmin < 0.0) + { fprintf(fplog, "Warning: Rdswmin at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v3rdswmin); + printf("Warning: Rdswmin at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v3rdswmin); + pParam->BSIM4v3rdswmin = 0.0; + } + + if (pParam->BSIM4v3vsattemp < 1.0e3) + { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM4v3vsattemp); + printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM4v3vsattemp); + } + + if((model->BSIM4v3lambdaGiven) && (pParam->BSIM4v3lambda > 0.0) ) + { + if (pParam->BSIM4v3lambda > 1.0e-9) + { fprintf(fplog, "Warning: Lambda = %g may be too large.\n", pParam->BSIM4v3lambda); + printf("Warning: Lambda = %g may be too large.\n", pParam->BSIM4v3lambda); + } + } + + if((model->BSIM4v3vtlGiven) && (pParam->BSIM4v3vtl > 0.0) ) + { + if (pParam->BSIM4v3vtl < 6.0e4) + { fprintf(fplog, "Warning: Thermal velocity vtl = %g may be too small.\n", pParam->BSIM4v3vtl); + printf("Warning: Thermal velocity vtl = %g may be too small.\n", pParam->BSIM4v3vtl); + } + + if (pParam->BSIM4v3xn < 3.0) + { fprintf(fplog, "Warning: back scattering coeff xn = %g is too small.\n", pParam->BSIM4v3xn); + printf("Warning: back scattering coeff xn = %g is too small. Reset to 3.0 \n", pParam->BSIM4v3xn); + pParam->BSIM4v3xn = 3.0; + + } + if (model->BSIM4v3lc < 0.0) + { fprintf(fplog, "Warning: back scattering coeff lc = %g is too small.\n", model->BSIM4v3lc); + printf("Warning: back scattering coeff lc = %g is too small. Reset to 0.0\n", model->BSIM4v3lc); + pParam->BSIM4v3lc = 0.0; + } + } + + if (pParam->BSIM4v3fprout < 0.0) + { fprintf(fplog, "Fatal: fprout = %g is negative.\n", + pParam->BSIM4v3fprout); + printf("Fatal: fprout = %g is negative.\n", pParam->BSIM4v3fprout); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3pdits < 0.0) + { fprintf(fplog, "Fatal: pdits = %g is negative.\n", + pParam->BSIM4v3pdits); + printf("Fatal: pdits = %g is negative.\n", pParam->BSIM4v3pdits); + Fatal_Flag = 1; + } + if (model->BSIM4v3pditsl < 0.0) + { fprintf(fplog, "Fatal: pditsl = %g is negative.\n", + model->BSIM4v3pditsl); + printf("Fatal: pditsl = %g is negative.\n", model->BSIM4v3pditsl); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v3pdibl1 < 0.0) + { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", + pParam->BSIM4v3pdibl1); + printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM4v3pdibl1); + } + if (pParam->BSIM4v3pdibl2 < 0.0) + { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", + pParam->BSIM4v3pdibl2); + printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM4v3pdibl2); + } + + if (pParam->BSIM4v3nigbinv <= 0.0) + { fprintf(fplog, "Fatal: nigbinv = %g is non-positive.\n", + pParam->BSIM4v3nigbinv); + printf("Fatal: nigbinv = %g is non-positive.\n", pParam->BSIM4v3nigbinv); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3nigbacc <= 0.0) + { fprintf(fplog, "Fatal: nigbacc = %g is non-positive.\n", + pParam->BSIM4v3nigbacc); + printf("Fatal: nigbacc = %g is non-positive.\n", pParam->BSIM4v3nigbacc); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3nigc <= 0.0) + { fprintf(fplog, "Fatal: nigc = %g is non-positive.\n", + pParam->BSIM4v3nigc); + printf("Fatal: nigc = %g is non-positive.\n", pParam->BSIM4v3nigc); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3poxedge <= 0.0) + { fprintf(fplog, "Fatal: poxedge = %g is non-positive.\n", + pParam->BSIM4v3poxedge); + printf("Fatal: poxedge = %g is non-positive.\n", pParam->BSIM4v3poxedge); + Fatal_Flag = 1; + } + if (pParam->BSIM4v3pigcd <= 0.0) + { fprintf(fplog, "Fatal: pigcd = %g is non-positive.\n", + pParam->BSIM4v3pigcd); + printf("Fatal: pigcd = %g is non-positive.\n", pParam->BSIM4v3pigcd); + Fatal_Flag = 1; + } + +/* Check gate resistance parameters */ + if (here->BSIM4v3rgateMod == 1) + { if (model->BSIM4v3rshg <= 0.0) + printf("Warning: rshg should be positive for rgateMod = 1.\n"); + } + else if (here->BSIM4v3rgateMod == 2) + { if (model->BSIM4v3rshg <= 0.0) + printf("Warning: rshg <= 0.0 for rgateMod = 2.\n"); + else if (pParam->BSIM4v3xrcrg1 <= 0.0) + printf("Warning: xrcrg1 <= 0.0 for rgateMod = 2.\n"); + } + if (here->BSIM4v3rgateMod == 3) + { if (model->BSIM4v3rshg <= 0.0) + printf("Warning: rshg should be positive for rgateMod = 3.\n"); + else if (pParam->BSIM4v3xrcrg1 <= 0.0) + printf("Warning: xrcrg1 should be positive for rgateMod = 3.\n"); + } + +/* Check overlap capacitance parameters */ + if (model->BSIM4v3cgdo < 0.0) + { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM4v3cgdo); + printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM4v3cgdo); + model->BSIM4v3cgdo = 0.0; + } + if (model->BSIM4v3cgso < 0.0) + { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM4v3cgso); + printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM4v3cgso); + model->BSIM4v3cgso = 0.0; + } + + if (model->BSIM4v3tnoia < 0.0) + { fprintf(fplog, "Warning: tnoia = %g is negative. Set to zero.\n", model->BSIM4v3tnoia); + printf("Warning: tnoia = %g is negative. Set to zero.\n", model->BSIM4v3tnoia); + model->BSIM4v3tnoia = 0.0; + } + if (model->BSIM4v3tnoib < 0.0) + { fprintf(fplog, "Warning: tnoib = %g is negative. Set to zero.\n", model->BSIM4v3tnoib); + printf("Warning: tnoib = %g is negative. Set to zero.\n", model->BSIM4v3tnoib); + model->BSIM4v3tnoib = 0.0; + } + + if (model->BSIM4v3rnoia < 0.0) + { fprintf(fplog, "Warning: rnoia = %g is negative. Set to zero.\n", model->BSIM4v3rnoia); + printf("Warning: rnoia = %g is negative. Set to zero.\n", model->BSIM4v3rnoia); + model->BSIM4v3rnoia = 0.0; + } + if (model->BSIM4v3rnoib < 0.0) + { fprintf(fplog, "Warning: rnoib = %g is negative. Set to zero.\n", model->BSIM4v3rnoib); + printf("Warning: rnoib = %g is negative. Set to zero.\n", model->BSIM4v3rnoib); + model->BSIM4v3rnoib = 0.0; + } + + if (model->BSIM4v3ntnoi < 0.0) + { fprintf(fplog, "Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4v3ntnoi); + printf("Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4v3ntnoi); + model->BSIM4v3ntnoi = 0.0; + } + + }/* loop for the parameter check for warning messages */ + fclose(fplog); + } + else + { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); + } + + return(Fatal_Flag); +} + diff --git a/src/spicelib/devices/bsim4v3/b4v3cvtest.c b/src/spicelib/devices/bsim4v3/b4v3cvtest.c new file mode 100644 index 000000000..99eb0c1c2 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3cvtest.c @@ -0,0 +1,201 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3cvtest.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "trandefs.h" +#include "const.h" +#include "devdefs.h" +#include "sperror.h" + + +int +BSIM4v3convTest(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance *here; +double delvbd, delvbs, delvds, delvgd, delvgs; +double delvdbd, delvsbs; +double delvbd_jct, delvbs_jct; +double vds, vgs, vgd, vgdo, vbs, vbd; +double vdbd, vdbs, vsbs; +double cbhat, cdhat, Idtot, Ibtot; +double vses, vdes, vdedo, delvses, delvded, delvdes; +double Isestot, cseshat, Idedtot, cdedhat; +double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat; +double tol0, tol1, tol2, tol3, tol4, tol5, tol6; + + for (; model != NULL; model = model->BSIM4v3nextModel) + { for (here = model->BSIM4v3instances; here != NULL ; + here=here->BSIM4v3nextInstance) + { + if (here->BSIM4v3owner != ARCHme) continue; + + vds = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vgs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3gNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vbs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3bNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vdbs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3dbNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vsbs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3sbNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vses = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3sNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vdes = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3dNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + + vgdo = *(ckt->CKTstate0 + here->BSIM4v3vgs) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + vbd = vbs - vds; + vdbd = vdbs - vds; + vgd = vgs - vds; + + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v3vbd); + delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v3vdbd); + delvgd = vgd - vgdo; + + delvds = vds - *(ckt->CKTstate0 + here->BSIM4v3vds); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v3vgs); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v3vbs); + delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v3vsbs); + + delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v3vses)); + vdedo = *(ckt->CKTstate0 + here->BSIM4v3vdes) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v3vdes); + delvded = vdes - vds - vdedo; + + delvbd_jct = (!here->BSIM4v3rbodyMod) ? delvbd : delvdbd; + delvbs_jct = (!here->BSIM4v3rbodyMod) ? delvbs : delvsbs; + + if (here->BSIM4v3mode >= 0) + { Idtot = here->BSIM4v3cd + here->BSIM4v3csub - here->BSIM4v3cbd + + here->BSIM4v3Igidl; + cdhat = Idtot - here->BSIM4v3gbd * delvbd_jct + + (here->BSIM4v3gmbs + here->BSIM4v3gbbs + here->BSIM4v3ggidlb) * delvbs + + (here->BSIM4v3gm + here->BSIM4v3gbgs + here->BSIM4v3ggidlg) * delvgs + + (here->BSIM4v3gds + here->BSIM4v3gbds + here->BSIM4v3ggidld) * delvds; + + Igstot = here->BSIM4v3Igs + here->BSIM4v3Igcs; + cgshat = Igstot + (here->BSIM4v3gIgsg + here->BSIM4v3gIgcsg) * delvgs + + here->BSIM4v3gIgcsd * delvds + here->BSIM4v3gIgcsb * delvbs; + + Igdtot = here->BSIM4v3Igd + here->BSIM4v3Igcd; + cgdhat = Igdtot + here->BSIM4v3gIgdg * delvgd + here->BSIM4v3gIgcdg * delvgs + + here->BSIM4v3gIgcdd * delvds + here->BSIM4v3gIgcdb * delvbs; + + Igbtot = here->BSIM4v3Igb; + cgbhat = here->BSIM4v3Igb + here->BSIM4v3gIgbg * delvgs + here->BSIM4v3gIgbd + * delvds + here->BSIM4v3gIgbb * delvbs; + } + else + { Idtot = here->BSIM4v3cd + here->BSIM4v3cbd - here->BSIM4v3Igidl; /* bugfix */ + cdhat = Idtot + here->BSIM4v3gbd * delvbd_jct + here->BSIM4v3gmbs + * delvbd + here->BSIM4v3gm * delvgd + - (here->BSIM4v3gds + here->BSIM4v3ggidls) * delvds + - here->BSIM4v3ggidlg * delvgs - here->BSIM4v3ggidlb * delvbs; + + Igstot = here->BSIM4v3Igs + here->BSIM4v3Igcd; + cgshat = Igstot + here->BSIM4v3gIgsg * delvgs + here->BSIM4v3gIgcdg * delvgd + - here->BSIM4v3gIgcdd * delvds + here->BSIM4v3gIgcdb * delvbd; + + Igdtot = here->BSIM4v3Igd + here->BSIM4v3Igcs; + cgdhat = Igdtot + (here->BSIM4v3gIgdg + here->BSIM4v3gIgcsg) * delvgd + - here->BSIM4v3gIgcsd * delvds + here->BSIM4v3gIgcsb * delvbd; + + Igbtot = here->BSIM4v3Igb; + cgbhat = here->BSIM4v3Igb + here->BSIM4v3gIgbg * delvgd - here->BSIM4v3gIgbd + * delvds + here->BSIM4v3gIgbb * delvbd; + } + + Isestot = here->BSIM4v3gstot * (*(ckt->CKTstate0 + here->BSIM4v3vses)); + cseshat = Isestot + here->BSIM4v3gstot * delvses + + here->BSIM4v3gstotd * delvds + here->BSIM4v3gstotg * delvgs + + here->BSIM4v3gstotb * delvbs; + + Idedtot = here->BSIM4v3gdtot * vdedo; + cdedhat = Idedtot + here->BSIM4v3gdtot * delvded + + here->BSIM4v3gdtotd * delvds + here->BSIM4v3gdtotg * delvgs + + here->BSIM4v3gdtotb * delvbs; + + /* + * Check convergence + */ + + if ((here->BSIM4v3off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot)) + + ckt->CKTabstol; + tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot)) + + ckt->CKTabstol; + tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot)) + + ckt->CKTabstol; + tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot)) + + ckt->CKTabstol; + tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot)) + + ckt->CKTabstol; + tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot)) + + ckt->CKTabstol; + + if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1) + || (fabs(cdedhat - Idedtot) >= tol2)) + { ckt->CKTnoncon++; + return(OK); + } + + if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4) + || (fabs(cgbhat - Igbtot) >= tol5)) + { ckt->CKTnoncon++; + return(OK); + } + + Ibtot = here->BSIM4v3cbs + here->BSIM4v3cbd + - here->BSIM4v3Igidl - here->BSIM4v3Igisl - here->BSIM4v3csub; + if (here->BSIM4v3mode >= 0) + { cbhat = Ibtot + here->BSIM4v3gbd * delvbd_jct + + here->BSIM4v3gbs * delvbs_jct - (here->BSIM4v3gbbs + here->BSIM4v3ggidlb) + * delvbs - (here->BSIM4v3gbgs + here->BSIM4v3ggidlg) * delvgs + - (here->BSIM4v3gbds + here->BSIM4v3ggidld) * delvds + - here->BSIM4v3ggislg * delvgd - here->BSIM4v3ggislb* delvbd + here->BSIM4v3ggisls * delvds ; + } + else + { cbhat = Ibtot + here->BSIM4v3gbs * delvbs_jct + here->BSIM4v3gbd + * delvbd_jct - (here->BSIM4v3gbbs + here->BSIM4v3ggislb) * delvbd + - (here->BSIM4v3gbgs + here->BSIM4v3ggislg) * delvgd + + (here->BSIM4v3gbds + here->BSIM4v3ggisld - here->BSIM4v3ggidls) * delvds + - here->BSIM4v3ggidlg * delvgs - here->BSIM4v3ggidlb * delvbs; + } + tol6 = ckt->CKTreltol * MAX(fabs(cbhat), + fabs(Ibtot)) + ckt->CKTabstol; + if (fabs(cbhat - Ibtot) > tol6) + { ckt->CKTnoncon++; + return(OK); + } + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3del.c b/src/spicelib/devices/bsim4v3/b4v3del.c new file mode 100644 index 000000000..913b354db --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3del.c @@ -0,0 +1,41 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3del.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v3def.h" +#include "sperror.h" +#include "gendefs.h" + + +int +BSIM4v3delete(inModel,name,inInst) +GENmodel *inModel; +IFuid name; +GENinstance **inInst; +{ +BSIM4v3instance **fast = (BSIM4v3instance**)inInst; +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance **prev = NULL; +BSIM4v3instance *here; + + for (; model ; model = model->BSIM4v3nextModel) + { prev = &(model->BSIM4v3instances); + for (here = *prev; here ; here = *prev) + { if (here->BSIM4v3name == name || (fast && here==*fast)) + { *prev= here->BSIM4v3nextInstance; + FREE(here); + return(OK); + } + prev = &(here->BSIM4v3nextInstance); + } + } + return(E_NODEV); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3dest.c b/src/spicelib/devices/bsim4v3/b4v3dest.c new file mode 100644 index 000000000..45505b031 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3dest.c @@ -0,0 +1,38 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3dest.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v3def.h" + +void +BSIM4v3destroy(inModel) +GENmodel **inModel; +{ +BSIM4v3model **model = (BSIM4v3model**)inModel; +BSIM4v3instance *here; +BSIM4v3instance *prev = NULL; +BSIM4v3model *mod = *model; +BSIM4v3model *oldmod = NULL; + + for (; mod ; mod = mod->BSIM4v3nextModel) + { if(oldmod) FREE(oldmod); + oldmod = mod; + prev = (BSIM4v3instance *)NULL; + for (here = mod->BSIM4v3instances; here; here = here->BSIM4v3nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + } + if(oldmod) FREE(oldmod); + *model = NULL; + return; +} diff --git a/src/spicelib/devices/bsim4v3/b4v3geo.c b/src/spicelib/devices/bsim4v3/b4v3geo.c new file mode 100644 index 000000000..52b72e074 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3geo.c @@ -0,0 +1,382 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3geo.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include + +/* + * WDLiu: + * This subrutine is a special module to process the geometry dependent + * parasitics for BSIM4v3, which calculates Ps, Pd, As, Ad, and Rs and Rd + * for multi-fingers and varous GEO and RGEO options. + */ + +int +BSIM4v3NumFingerDiff(nf, minSD, nuIntD, nuEndD, nuIntS, nuEndS) +int minSD; +double nf, *nuIntD, *nuEndD, *nuIntS, *nuEndS; +{ +int NF; + NF = (int)nf; + if ((NF%2) != 0) + { *nuEndD = *nuEndS = 1.0; + *nuIntD = *nuIntS = 2.0 * MAX((nf - 1.0) / 2.0, 0.0); + } + else + { if (minSD == 1) /* minimize # of source */ + { *nuEndD = 2.0; + *nuIntD = 2.0 * MAX((nf / 2.0 - 1.0), 0.0); + *nuEndS = 0.0; + *nuIntS = nf; + } + else + { *nuEndD = 0.0; + *nuIntD = nf; + *nuEndS = 2.0; + *nuIntS = 2.0 * MAX((nf / 2.0 - 1.0), 0.0); + } + } +return 0; +} + + +int +BSIM4v3PAeffGeo(nf, geo, minSD, Weffcj, DMCG, DMCI, DMDG, Ps, Pd, As, Ad) +int geo, minSD; +double Weffcj, DMCG, DMCI, DMDG; +double nf, *Ps, *Pd, *As, *Ad; +{ +double T0, T1, T2; +double ADiso, ADsha, ADmer, ASiso, ASsha, ASmer; +double PDiso, PDsha, PDmer, PSiso, PSsha, PSmer; +double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0; + + if (geo < 9) /* For geo = 9 and 10, the numbers of S/D diffusions already known */ + BSIM4v3NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS); + + T0 = DMCG + DMCI; + T1 = DMCG + DMCG; + T2 = DMDG + DMDG; + + PSiso = PDiso = T0 + T0 + Weffcj; + PSsha = PDsha = T1; + PSmer = PDmer = T2; + + ASiso = ADiso = T0 * Weffcj; + ASsha = ADsha = DMCG * Weffcj; + ASmer = ADmer = DMDG * Weffcj; + + switch(geo) + { case 0: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 1: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 2: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 3: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 4: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 5: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 6: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 7: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 8: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 9: /* geo = 9 and 10 happen only when nf = even */ + *Ps = PSiso + (nf - 1.0) * PSsha; + *Pd = nf * PDsha; + *As = ASiso + (nf - 1.0) * ASsha; + *Ad = nf * ADsha; + break; + case 10: + *Ps = nf * PSsha; + *Pd = PDiso + (nf - 1.0) * PDsha; + *As = nf * ASsha; + *Ad = ADiso + (nf - 1.0) * ADsha; + break; + default: + printf("Warning: Specified GEO = %d not matched\n", geo); + } +return 0; +} + + +int +BSIM4v3RdseffGeo(nf, geo, rgeo, minSD, Weffcj, Rsh, DMCG, DMCI, DMDG, Type, Rtot) +int geo, rgeo, minSD, Type; +double nf, Weffcj, Rsh, DMCG, DMCI, DMDG; +double *Rtot; +{ +double Rint, Rend = 0.0; +double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0; + + if (geo < 9) /* since geo = 9 and 10 only happen when nf = even */ + { BSIM4v3NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS); + + /* Internal S/D resistance -- assume shared S or D and all wide contacts */ + if (Type == 1) + { if (nuIntS == 0.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / ( Weffcj * nuIntS); + } + else + { if (nuIntD == 0.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / ( Weffcj * nuIntD); + } + } + + /* End S/D resistance -- geo dependent */ + switch(geo) + { case 0: + if (Type == 1) BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 1: + if (Type == 1) BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 2: + if (Type == 1) BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 3: + if (Type == 1) BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 4: + if (Type == 1) BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else Rend = Rsh * DMDG / Weffcj; + break; + case 5: + if (Type == 1) BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else Rend = Rsh * DMDG / (Weffcj * nuEndD); + break; + case 6: + if (Type == 1) Rend = Rsh * DMDG / Weffcj; + else BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 7: + if (Type == 1) Rend = Rsh * DMDG / (Weffcj * nuEndS); + else BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 8: + Rend = Rsh * DMDG / Weffcj; + break; + case 9: /* all wide contacts assumed for geo = 9 and 10 */ + if (Type == 1) + { Rend = 0.5 * Rsh * DMCG / Weffcj; + if (nf == 2.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / (Weffcj * (nf - 2.0)); + } + else + { Rend = 0.0; + Rint = Rsh * DMCG / (Weffcj * nf); + } + break; + case 10: + if (Type == 1) + { Rend = 0.0; + Rint = Rsh * DMCG / (Weffcj * nf); + } + else + { Rend = 0.5 * Rsh * DMCG / Weffcj;; + if (nf == 2.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / (Weffcj * (nf - 2.0)); + } + break; + default: + printf("Warning: Specified GEO = %d not matched\n", geo); + } + + if (Rint <= 0.0) + *Rtot = Rend; + else if (Rend <= 0.0) + *Rtot = Rint; + else + *Rtot = Rint * Rend / (Rint + Rend); +if(*Rtot==0.0) + printf("Warning: Zero resistance returned from RdseffGeo\n"); +return 0; +} + + +int +BSIM4v3RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend) +double Weffcj, Rsh, DMCG, DMCI, DMDG; +int rgeo, Type; +double nuEnd, *Rend; +{ + if (Type == 1) + { switch(rgeo) + { case 1: + case 2: + case 5: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 3: + case 4: + case 6: + if ((DMCG + DMCI) == 0.0) + printf("(DMCG + DMCI) can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI)); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } + else + { switch(rgeo) + { case 1: + case 3: + case 7: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 2: + case 4: + case 8: + if ((DMCG + DMCI) == 0.0) + printf("(DMCG + DMCI) can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI)); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } +return 0; +} + + +int +BSIM4v3RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend) +double Weffcj, Rsh, DMCG, DMCI, DMDG; +int rgeo, Type; +double nuEnd, *Rend; +{ + if (Type == 1) + { switch(rgeo) + { case 1: + case 2: + case 5: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 3: + case 4: + case 6: + if (DMCG == 0.0) + printf("DMCG can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } + else + { switch(rgeo) + { case 1: + case 3: + case 7: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 2: + case 4: + case 8: + if (DMCG == 0.0) + printf("DMCG can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } +return 0; +} diff --git a/src/spicelib/devices/bsim4v3/b4v3getic.c b/src/spicelib/devices/bsim4v3/b4v3getic.c new file mode 100644 index 000000000..3a948059d --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3getic.c @@ -0,0 +1,44 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3getic.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "sperror.h" + + +int +BSIM4v3getic(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance *here; + + for (; model ; model = model->BSIM4v3nextModel) + { for (here = model->BSIM4v3instances; here; here = here->BSIM4v3nextInstance) + { if (here->BSIM4v3owner != ARCHme) continue; + if (!here->BSIM4v3icVDSGiven) + { here->BSIM4v3icVDS = *(ckt->CKTrhs + here->BSIM4v3dNode) + - *(ckt->CKTrhs + here->BSIM4v3sNode); + } + if (!here->BSIM4v3icVGSGiven) + { here->BSIM4v3icVGS = *(ckt->CKTrhs + here->BSIM4v3gNodeExt) + - *(ckt->CKTrhs + here->BSIM4v3sNode); + } + if(!here->BSIM4v3icVBSGiven) + { here->BSIM4v3icVBS = *(ckt->CKTrhs + here->BSIM4v3bNode) + - *(ckt->CKTrhs + here->BSIM4v3sNode); + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3ld.c b/src/spicelib/devices/bsim4v3/b4v3ld.c new file mode 100644 index 000000000..219d68b20 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3ld.c @@ -0,0 +1,4612 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3ld.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPSSI 1.03594e-10 +#define Charge_q 1.60219e-19 +#define DELTA_1 0.02 +#define DELTA_2 0.02 +#define DELTA_3 0.02 +#define DELTA_4 0.02 +#define MM 3 /* smooth coeff */ + +int BSIM4v3polyDepletion(double phi, double ngate,double coxe, double Vgs, double *Vgs_eff, double *dVgs_eff_dVg); + +int +BSIM4v3load(inModel,ckt) +GENmodel *inModel; +register CKTcircuit *ckt; +{ +register BSIM4v3model *model = (BSIM4v3model*)inModel; +register BSIM4v3instance *here; + +double ceqgstot, dgstot_dvd, dgstot_dvg, dgstot_dvs, dgstot_dvb; +double ceqgdtot, dgdtot_dvd, dgdtot_dvg, dgdtot_dvs, dgdtot_dvb; +double gstot, gstotd, gstotg, gstots, gstotb, gspr, Rs, Rd; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double vgs_eff, vgd_eff, dvgs_eff_dvg, dvgd_eff_dvg; +double dRs_dvg, dRd_dvg, dRs_dvb, dRd_dvb; +double dT0_dvg, dT1_dvb, dT3_dvg, dT3_dvb; +double vses, vdes, vdedo, delvses, delvded, delvdes; +double Isestot, cseshat, Idedtot, cdedhat; +double tol0, tol1, tol2, tol3, tol4, tol5, tol6; + +double geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb, ceqgcrg; +double vges, vgms, vgedo, vgmdo, vged, vgmd, delvged, delvgmd; +double delvges, delvgms, vgmb; +double gcgmgmb, gcgmdb, gcgmsb, gcdgmb, gcsgmb; +double gcgmbb, gcbgmb, qgmb, qgmid, ceqqgmid; + +double vbd, vbs, vds, vgb, vgd, vgs, vgdo, xfact; +double vdbs, vdbd, vsbs, vsbdo, vsbd; +double delvdbs, delvdbd, delvsbs; +double delvbd_jct, delvbs_jct, vbs_jct, vbd_jct; + +double SourceSatCurrent, DrainSatCurrent; +double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst; +double ceqqb, ceqqd, ceqqg, ceqqjd, ceqqjs, ceq, geq; +double cdrain, cdhat, ceqdrn, ceqbd, ceqbs, ceqjd, ceqjs, gjbd, gjbs; +double czbd, czbdsw, czbdswg, czbs, czbssw, czbsswg, evbd, evbs, arg, sarg; +double delvbd, delvbs, delvds, delvgd, delvgs; +double Vfbeff, dVfbeff_dVg, dVfbeff_dVb, V3, V4; +double gcbdb, gcbgb, gcbsb, gcddb, gcdgb, gcdsb, gcgdb, gcggb, gcgsb, gcsdb; +double gcgbb, gcdbb, gcsbb, gcbbb; +double gcdbdb, gcsbsb; +double gcsgb, gcssb, MJD, MJSWD, MJSWGD, MJS, MJSWS, MJSWGS; +double qgate, qbulk, qdrn, qsrc, cqgate, cqbody, cqdrn; +double Vdb, Vds, Vgs, Vbs, Gmbs, FwdSum, RevSum; +double Igidl, Ggidld, Ggidlg, Ggidlb; +double Voxacc, dVoxacc_dVg, dVoxacc_dVb; +double Voxdepinv, dVoxdepinv_dVg, dVoxdepinv_dVd, dVoxdepinv_dVb; +double VxNVt, ExpVxNVt, Vaux, dVaux_dVg, dVaux_dVd, dVaux_dVb; +double Igc, dIgc_dVg, dIgc_dVd, dIgc_dVb; +double Igcs, dIgcs_dVg, dIgcs_dVd, dIgcs_dVb; +double Igcd, dIgcd_dVg, dIgcd_dVd, dIgcd_dVb; +double Igs, dIgs_dVg, dIgs_dVs, Igd, dIgd_dVg, dIgd_dVd; +double Igbacc, dIgbacc_dVg, dIgbacc_dVd, dIgbacc_dVb; +double Igbinv, dIgbinv_dVg, dIgbinv_dVd, dIgbinv_dVb; +double Igb, dIgb_dVg, dIgb_dVd, dIgb_dVb; +double Pigcd, dPigcd_dVg, dPigcd_dVd, dPigcd_dVb; +double Istoteq, gIstotg, gIstotd, gIstots, gIstotb; +double Idtoteq, gIdtotg, gIdtotd, gIdtots, gIdtotb; +double Ibtoteq, gIbtotg, gIbtotd, gIbtots, gIbtotb; +double Igtoteq, gIgtotg, gIgtotd, gIgtots, gIgtotb; +double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat; +double Vgs_eff, Vfb, dVbs_dVb, Vth_NarrowW; +double Phis, dPhis_dVb, sqrtPhis, dsqrtPhis_dVb, Vth, dVth_dVb, dVth_dVd; +double Vgst, dVgst_dVg, dVgst_dVb, dVgs_eff_dVg, Nvtms, Nvtmd; +double Vgdt, Vgsaddvth, Vgsaddvth2, Vgsaddvth1o3, Vtm; +double n, dn_dVb, dn_dVd, voffcv, noff, dnoff_dVd, dnoff_dVb; +double ExpArg, ExpArg1, V0, CoxWLcen, QovCox, LINK; +double DeltaPhi, dDeltaPhi_dVg; +double Cox, Tox, Tcen, dTcen_dVg, dTcen_dVd, dTcen_dVb; +double Ccen, Coxeff, dCoxeff_dVd, dCoxeff_dVg, dCoxeff_dVb; +double Denomi, dDenomi_dVg, dDenomi_dVd, dDenomi_dVb; +double ueff, dueff_dVg, dueff_dVd, dueff_dVb; +double Esat, dEsat_dVg, dEsat_dVd, dEsat_dVb, Vdsat, Vdsat0; +double EsatL, dEsatL_dVg, dEsatL_dVd, dEsatL_dVb; +double Ilimit, Iexp, dIexp_dVg, dIexp_dVd, dIexp_dVb; +double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; +double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, Va2, dVa_dVd, dVa_dVg, dVa_dVb; +double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; +double Arg1, Arg2, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; +double T0, dT0_dVg, dT0_dVd, dT0_dVb; +double T1, dT1_dVg, dT1_dVd, dT1_dVb; +double T2, dT2_dVg, dT2_dVd, dT2_dVb; +double T3, dT3_dVg, dT3_dVd, dT3_dVb; +double T4, dT4_dVg, dT4_dVd, dT4_dVb; +double T5, dT5_dVg, dT5_dVd, dT5_dVb; +double T6, dT6_dVg, dT6_dVd, dT6_dVb; +double T7, dT7_dVg, dT7_dVd, dT7_dVb; +double T8, dT8_dVg, dT8_dVd, dT8_dVb; +double T9, dT9_dVg, dT9_dVd, dT9_dVb; +double T10, dT10_dVg, dT10_dVb, dT10_dVd; +double T11, T12, T13, T14; +double tmp, Abulk, dAbulk_dVb, Abulk0, dAbulk0_dVb; +double Cclm, dCclm_dVg, dCclm_dVd, dCclm_dVb; +double FP, dFP_dVg, PvagTerm, dPvagTerm_dVg, dPvagTerm_dVd, dPvagTerm_dVb; +double VADITS, dVADITS_dVg, dVADITS_dVd; +double Lpe_Vb, DITS_Sft, dDITS_Sft_dVb, dDITS_Sft_dVd; +double VACLM, dVACLM_dVg, dVACLM_dVd, dVACLM_dVb; +double VADIBL, dVADIBL_dVg, dVADIBL_dVd, dVADIBL_dVb; +double Xdep, dXdep_dVb, lt1, dlt1_dVb, ltw, dltw_dVb, Delt_vth, dDelt_vth_dVb; +double Theta0, dTheta0_dVb, Theta1, dTheta1_dVb; +double Thetarout, dThetarout_dVb, TempRatio, tmp1, tmp2, tmp3, tmp4; +double DIBL_Sft, dDIBL_Sft_dVd, DIBL_fact, Lambda, dLambda_dVg; +double Idtot, Ibtot, a1, ScalingFactor; + +double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; +double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; +double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; +double diffVds, diffVdsCV, dAbulk_dVg; +double beta, dbeta_dVg, dbeta_dVd, dbeta_dVb; +double gche, dgche_dVg, dgche_dVd, dgche_dVb; +double fgche1, dfgche1_dVg, dfgche1_dVd, dfgche1_dVb; +double fgche2, dfgche2_dVg, dfgche2_dVd, dfgche2_dVb; +double Idl, dIdl_dVg, dIdl_dVd, dIdl_dVb; +double Idsa, dIdsa_dVg, dIdsa_dVd, dIdsa_dVb; +double Ids, Gm, Gds, Gmb, devbs_dvb, devbd_dvb; +double Isub, Gbd, Gbg, Gbb; +double VASCBE, dVASCBE_dVg, dVASCBE_dVd, dVASCBE_dVb; +double CoxeffWovL; +double Rds, dRds_dVg, dRds_dVb, WVCox, WVCoxRds; +double Vgst2Vtm, VdsatCV, dVdsatCV_dVd, dVdsatCV_dVg, dVdsatCV_dVb; +double Leff, Weff, dWeff_dVg, dWeff_dVb; +double AbulkCV, dAbulkCV_dVb; +double qcheq, qdef, gqdef, cqdef, cqcheq; +double gcqdb, gcqsb, gcqgb, gcqbb; +double dxpart, sxpart, ggtg, ggtd, ggts, ggtb; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; +double gbdpdp, gbdpg, gbdpb, gbdpsp; +double qgdo, qgso, cgdo, cgso, cqbs, cqbd; +double Cgg, Cgd, Cgs, Cgb, Cdg, Cdd, Cds, Cdb, Qg, Qd; +double Csg, Csd, Css, Csb, Cbg, Cbd, Cbs, Cbb, Qs, Qb; +double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Csg1, Csd1, Csb1, Qac0, Qsub0; +double dQac0_dVg, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb; +double ggidld, ggidlg, ggidlb,ggisld, ggislg, ggislb, ggisls; +double Igisl, Ggisld, Ggislg, Ggislb, Ggisls; + +double vs, Fsevl, dvs_dVg, dvs_dVd, dvs_dVb, dFsevl_dVg, dFsevl_dVd, dFsevl_dVb; + +struct bsim4v3SizeDependParam *pParam; +int ByPass, ChargeComputationNeeded, error, Check, Check1, Check2; + +ScalingFactor = 1.0e-9; +ChargeComputationNeeded = + ((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || + ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) + ? 1 : 0; + + +for (; model != NULL; model = model->BSIM4v3nextModel) +{ for (here = model->BSIM4v3instances; here != NULL; + here = here->BSIM4v3nextInstance) + { if (here->BSIM4v3owner != ARCHme) continue; + Check = Check1 = Check2 = 1; + ByPass = 0; + pParam = here->pParam; + + if ((ckt->CKTmode & MODEINITSMSIG)) + { vds = *(ckt->CKTstate0 + here->BSIM4v3vds); + vgs = *(ckt->CKTstate0 + here->BSIM4v3vgs); + vbs = *(ckt->CKTstate0 + here->BSIM4v3vbs); + vges = *(ckt->CKTstate0 + here->BSIM4v3vges); + vgms = *(ckt->CKTstate0 + here->BSIM4v3vgms); + vdbs = *(ckt->CKTstate0 + here->BSIM4v3vdbs); + vsbs = *(ckt->CKTstate0 + here->BSIM4v3vsbs); + vses = *(ckt->CKTstate0 + here->BSIM4v3vses); + vdes = *(ckt->CKTstate0 + here->BSIM4v3vdes); + + qdef = *(ckt->CKTstate0 + here->BSIM4v3qdef); + } + else if ((ckt->CKTmode & MODEINITTRAN)) + { vds = *(ckt->CKTstate1 + here->BSIM4v3vds); + vgs = *(ckt->CKTstate1 + here->BSIM4v3vgs); + vbs = *(ckt->CKTstate1 + here->BSIM4v3vbs); + vges = *(ckt->CKTstate1 + here->BSIM4v3vges); + vgms = *(ckt->CKTstate1 + here->BSIM4v3vgms); + vdbs = *(ckt->CKTstate1 + here->BSIM4v3vdbs); + vsbs = *(ckt->CKTstate1 + here->BSIM4v3vsbs); + vses = *(ckt->CKTstate1 + here->BSIM4v3vses); + vdes = *(ckt->CKTstate1 + here->BSIM4v3vdes); + + qdef = *(ckt->CKTstate1 + here->BSIM4v3qdef); + } + else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM4v3off) + { vds = model->BSIM4v3type * here->BSIM4v3icVDS; + vgs = vges = vgms = model->BSIM4v3type * here->BSIM4v3icVGS; + vbs = vdbs = vsbs = model->BSIM4v3type * here->BSIM4v3icVBS; + if (vds > 0.0) + { vdes = vds + 0.01; + vses = -0.01; + } + else if (vds < 0.0) + { vdes = vds - 0.01; + vses = 0.01; + } + else + vdes = vses = 0.0; + + qdef = 0.0; + + if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && + ((ckt->CKTmode & (MODETRAN | MODEAC|MODEDCOP | + MODEDCTRANCURVE)) || (!(ckt->CKTmode & MODEUIC)))) + { vds = 0.1; + vdes = 0.11; + vses = -0.01; + vgs = vges = vgms = model->BSIM4v3type + * pParam->BSIM4v3vth0 + 0.1; + vbs = vdbs = vsbs = 0.0; + } + } + else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && + (here->BSIM4v3off)) + { vds = vgs = vbs = vges = vgms = 0.0; + vdbs = vsbs = vdes = vses = qdef = 0.0; + } + else + { +#ifndef PREDICTOR + if ((ckt->CKTmode & MODEINITPRED)) + { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; + *(ckt->CKTstate0 + here->BSIM4v3vds) = + *(ckt->CKTstate1 + here->BSIM4v3vds); + vds = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vds)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vds))); + *(ckt->CKTstate0 + here->BSIM4v3vgs) = + *(ckt->CKTstate1 + here->BSIM4v3vgs); + vgs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vgs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vgs))); + *(ckt->CKTstate0 + here->BSIM4v3vges) = + *(ckt->CKTstate1 + here->BSIM4v3vges); + vges = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vges)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vges))); + *(ckt->CKTstate0 + here->BSIM4v3vgms) = + *(ckt->CKTstate1 + here->BSIM4v3vgms); + vgms = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vgms)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vgms))); + *(ckt->CKTstate0 + here->BSIM4v3vbs) = + *(ckt->CKTstate1 + here->BSIM4v3vbs); + vbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vbs))); + *(ckt->CKTstate0 + here->BSIM4v3vbd) = + *(ckt->CKTstate0 + here->BSIM4v3vbs) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + *(ckt->CKTstate0 + here->BSIM4v3vdbs) = + *(ckt->CKTstate1 + here->BSIM4v3vdbs); + vdbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vdbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vdbs))); + *(ckt->CKTstate0 + here->BSIM4v3vdbd) = + *(ckt->CKTstate0 + here->BSIM4v3vdbs) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + *(ckt->CKTstate0 + here->BSIM4v3vsbs) = + *(ckt->CKTstate1 + here->BSIM4v3vsbs); + vsbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vsbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vsbs))); + *(ckt->CKTstate0 + here->BSIM4v3vses) = + *(ckt->CKTstate1 + here->BSIM4v3vses); + vses = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vses)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vses))); + *(ckt->CKTstate0 + here->BSIM4v3vdes) = + *(ckt->CKTstate1 + here->BSIM4v3vdes); + vdes = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3vdes)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v3vdes))); + + *(ckt->CKTstate0 + here->BSIM4v3qdef) = + *(ckt->CKTstate1 + here->BSIM4v3qdef); + qdef = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v3qdef)) + -(xfact * (*(ckt->CKTstate2 + here->BSIM4v3qdef))); + } + else + { +#endif /* PREDICTOR */ + vds = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vgs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3gNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vbs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3bNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vges = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3gNodeExt) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vgms = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3gNodeMid) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vdbs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3dbNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vsbs = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3sbNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vses = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3sNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + vdes = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3dNode) + - *(ckt->CKTrhsOld + here->BSIM4v3sNodePrime)); + qdef = model->BSIM4v3type + * (*(ckt->CKTrhsOld + here->BSIM4v3qNode)); +#ifndef PREDICTOR + } +#endif /* PREDICTOR */ + + vgdo = *(ckt->CKTstate0 + here->BSIM4v3vgs) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + vgedo = *(ckt->CKTstate0 + here->BSIM4v3vges) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + vgmdo = *(ckt->CKTstate0 + here->BSIM4v3vgms) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + + vbd = vbs - vds; + vdbd = vdbs - vds; + vgd = vgs - vds; + vged = vges - vds; + vgmd = vgms - vds; + + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v3vbd); + delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v3vdbd); + delvgd = vgd - vgdo; + delvged = vged - vgedo; + delvgmd = vgmd - vgmdo; + + delvds = vds - *(ckt->CKTstate0 + here->BSIM4v3vds); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v3vgs); + delvges = vges - *(ckt->CKTstate0 + here->BSIM4v3vges); + delvgms = vgms - *(ckt->CKTstate0 + here->BSIM4v3vgms); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v3vbs); + delvdbs = vdbs - *(ckt->CKTstate0 + here->BSIM4v3vdbs); + delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v3vsbs); + + delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v3vses)); + vdedo = *(ckt->CKTstate0 + here->BSIM4v3vdes) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v3vdes); + delvded = vdes - vds - vdedo; + + delvbd_jct = (!here->BSIM4v3rbodyMod) ? delvbd : delvdbd; + delvbs_jct = (!here->BSIM4v3rbodyMod) ? delvbs : delvsbs; + if (here->BSIM4v3mode >= 0) + { Idtot = here->BSIM4v3cd + here->BSIM4v3csub - here->BSIM4v3cbd + + here->BSIM4v3Igidl; + cdhat = Idtot - here->BSIM4v3gbd * delvbd_jct + + (here->BSIM4v3gmbs + here->BSIM4v3gbbs + here->BSIM4v3ggidlb) * delvbs + + (here->BSIM4v3gm + here->BSIM4v3gbgs + here->BSIM4v3ggidlg) * delvgs + + (here->BSIM4v3gds + here->BSIM4v3gbds + here->BSIM4v3ggidld) * delvds; + Ibtot = here->BSIM4v3cbs + here->BSIM4v3cbd + - here->BSIM4v3Igidl - here->BSIM4v3Igisl - here->BSIM4v3csub; + cbhat = Ibtot + here->BSIM4v3gbd * delvbd_jct + + here->BSIM4v3gbs * delvbs_jct - (here->BSIM4v3gbbs + here->BSIM4v3ggidlb) + * delvbs - (here->BSIM4v3gbgs + here->BSIM4v3ggidlg) * delvgs + - (here->BSIM4v3gbds + here->BSIM4v3ggidld - here->BSIM4v3ggisls) * delvds + - here->BSIM4v3ggislg * delvgd - here->BSIM4v3ggislb* delvbd; + + Igstot = here->BSIM4v3Igs + here->BSIM4v3Igcs; + cgshat = Igstot + (here->BSIM4v3gIgsg + here->BSIM4v3gIgcsg) * delvgs + + here->BSIM4v3gIgcsd * delvds + here->BSIM4v3gIgcsb * delvbs; + + Igdtot = here->BSIM4v3Igd + here->BSIM4v3Igcd; + cgdhat = Igdtot + here->BSIM4v3gIgdg * delvgd + here->BSIM4v3gIgcdg * delvgs + + here->BSIM4v3gIgcdd * delvds + here->BSIM4v3gIgcdb * delvbs; + + Igbtot = here->BSIM4v3Igb; + cgbhat = here->BSIM4v3Igb + here->BSIM4v3gIgbg * delvgs + here->BSIM4v3gIgbd + * delvds + here->BSIM4v3gIgbb * delvbs; + } + else + { Idtot = here->BSIM4v3cd + here->BSIM4v3cbd - here->BSIM4v3Igidl; /* bugfix */ + cdhat = Idtot + here->BSIM4v3gbd * delvbd_jct + here->BSIM4v3gmbs + * delvbd + here->BSIM4v3gm * delvgd + - (here->BSIM4v3gds + here->BSIM4v3ggidls) * delvds + - here->BSIM4v3ggidlg * delvgs - here->BSIM4v3ggidlb * delvbs; + Ibtot = here->BSIM4v3cbs + here->BSIM4v3cbd + - here->BSIM4v3Igidl - here->BSIM4v3Igisl - here->BSIM4v3csub; + cbhat = Ibtot + here->BSIM4v3gbs * delvbs_jct + here->BSIM4v3gbd + * delvbd_jct - (here->BSIM4v3gbbs + here->BSIM4v3ggislb) * delvbd + - (here->BSIM4v3gbgs + here->BSIM4v3ggislg) * delvgd + + (here->BSIM4v3gbds + here->BSIM4v3ggisld - here->BSIM4v3ggidls) * delvds + - here->BSIM4v3ggidlg * delvgs - here->BSIM4v3ggidlb * delvbs; + + Igstot = here->BSIM4v3Igs + here->BSIM4v3Igcd; + cgshat = Igstot + here->BSIM4v3gIgsg * delvgs + here->BSIM4v3gIgcdg * delvgd + - here->BSIM4v3gIgcdd * delvds + here->BSIM4v3gIgcdb * delvbd; + + Igdtot = here->BSIM4v3Igd + here->BSIM4v3Igcs; + cgdhat = Igdtot + (here->BSIM4v3gIgdg + here->BSIM4v3gIgcsg) * delvgd + - here->BSIM4v3gIgcsd * delvds + here->BSIM4v3gIgcsb * delvbd; + + Igbtot = here->BSIM4v3Igb; + cgbhat = here->BSIM4v3Igb + here->BSIM4v3gIgbg * delvgd - here->BSIM4v3gIgbd + * delvds + here->BSIM4v3gIgbb * delvbd; + } + + Isestot = here->BSIM4v3gstot * (*(ckt->CKTstate0 + here->BSIM4v3vses)); + cseshat = Isestot + here->BSIM4v3gstot * delvses + + here->BSIM4v3gstotd * delvds + here->BSIM4v3gstotg * delvgs + + here->BSIM4v3gstotb * delvbs; + + Idedtot = here->BSIM4v3gdtot * vdedo; + cdedhat = Idedtot + here->BSIM4v3gdtot * delvded + + here->BSIM4v3gdtotd * delvds + here->BSIM4v3gdtotg * delvgs + + here->BSIM4v3gdtotb * delvbs; + + +#ifndef NOBYPASS + /* Following should be one IF statement, but some C compilers + * can't handle that all at once, so we split it into several + * successive IF's */ + + if ((!(ckt->CKTmode & MODEINITPRED)) && (ckt->CKTbypass)) + if ((fabs(delvds) < (ckt->CKTreltol * MAX(fabs(vds), + fabs(*(ckt->CKTstate0 + here->BSIM4v3vds))) + ckt->CKTvoltTol))) + if ((fabs(delvgs) < (ckt->CKTreltol * MAX(fabs(vgs), + fabs(*(ckt->CKTstate0 + here->BSIM4v3vgs))) + ckt->CKTvoltTol))) + if ((fabs(delvbs) < (ckt->CKTreltol * MAX(fabs(vbs), + fabs(*(ckt->CKTstate0 + here->BSIM4v3vbs))) + ckt->CKTvoltTol))) + if ((fabs(delvbd) < (ckt->CKTreltol * MAX(fabs(vbd), + fabs(*(ckt->CKTstate0 + here->BSIM4v3vbd))) + ckt->CKTvoltTol))) + if ((here->BSIM4v3rgateMod == 0) || (here->BSIM4v3rgateMod == 1) + || (fabs(delvges) < (ckt->CKTreltol * MAX(fabs(vges), + fabs(*(ckt->CKTstate0 + here->BSIM4v3vges))) + ckt->CKTvoltTol))) + if ((here->BSIM4v3rgateMod != 3) || (fabs(delvgms) < (ckt->CKTreltol + * MAX(fabs(vgms), fabs(*(ckt->CKTstate0 + here->BSIM4v3vgms))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v3rbodyMod) || (fabs(delvdbs) < (ckt->CKTreltol + * MAX(fabs(vdbs), fabs(*(ckt->CKTstate0 + here->BSIM4v3vdbs))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v3rbodyMod) || (fabs(delvdbd) < (ckt->CKTreltol + * MAX(fabs(vdbd), fabs(*(ckt->CKTstate0 + here->BSIM4v3vdbd))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v3rbodyMod) || (fabs(delvsbs) < (ckt->CKTreltol + * MAX(fabs(vsbs), fabs(*(ckt->CKTstate0 + here->BSIM4v3vsbs))) + + ckt->CKTvoltTol))) + if ((!model->BSIM4v3rdsMod) || (fabs(delvses) < (ckt->CKTreltol + * MAX(fabs(vses), fabs(*(ckt->CKTstate0 + here->BSIM4v3vses))) + + ckt->CKTvoltTol))) + if ((!model->BSIM4v3rdsMod) || (fabs(delvdes) < (ckt->CKTreltol + * MAX(fabs(vdes), fabs(*(ckt->CKTstate0 + here->BSIM4v3vdes))) + + ckt->CKTvoltTol))) + if ((fabs(cdhat - Idtot) < ckt->CKTreltol + * MAX(fabs(cdhat), fabs(Idtot)) + ckt->CKTabstol)) + if ((fabs(cbhat - Ibtot) < ckt->CKTreltol + * MAX(fabs(cbhat), fabs(Ibtot)) + ckt->CKTabstol)) + if ((!model->BSIM4v3igcMod) || ((fabs(cgshat - Igstot) < ckt->CKTreltol + * MAX(fabs(cgshat), fabs(Igstot)) + ckt->CKTabstol))) + if ((!model->BSIM4v3igcMod) || ((fabs(cgdhat - Igdtot) < ckt->CKTreltol + * MAX(fabs(cgdhat), fabs(Igdtot)) + ckt->CKTabstol))) + if ((!model->BSIM4v3igbMod) || ((fabs(cgbhat - Igbtot) < ckt->CKTreltol + * MAX(fabs(cgbhat), fabs(Igbtot)) + ckt->CKTabstol))) + if ((!model->BSIM4v3rdsMod) || ((fabs(cseshat - Isestot) < ckt->CKTreltol + * MAX(fabs(cseshat), fabs(Isestot)) + ckt->CKTabstol))) + if ((!model->BSIM4v3rdsMod) || ((fabs(cdedhat - Idedtot) < ckt->CKTreltol + * MAX(fabs(cdedhat), fabs(Idedtot)) + ckt->CKTabstol))) + { vds = *(ckt->CKTstate0 + here->BSIM4v3vds); + vgs = *(ckt->CKTstate0 + here->BSIM4v3vgs); + vbs = *(ckt->CKTstate0 + here->BSIM4v3vbs); + vges = *(ckt->CKTstate0 + here->BSIM4v3vges); + vgms = *(ckt->CKTstate0 + here->BSIM4v3vgms); + + vbd = *(ckt->CKTstate0 + here->BSIM4v3vbd); + vdbs = *(ckt->CKTstate0 + here->BSIM4v3vdbs); + vdbd = *(ckt->CKTstate0 + here->BSIM4v3vdbd); + vsbs = *(ckt->CKTstate0 + here->BSIM4v3vsbs); + vses = *(ckt->CKTstate0 + here->BSIM4v3vses); + vdes = *(ckt->CKTstate0 + here->BSIM4v3vdes); + + vgd = vgs - vds; + vgb = vgs - vbs; + vged = vges - vds; + vgmd = vgms - vds; + vgmb = vgms - vbs; + + vbs_jct = (!here->BSIM4v3rbodyMod) ? vbs : vsbs; + vbd_jct = (!here->BSIM4v3rbodyMod) ? vbd : vdbd; + +/*** qdef should not be kept fixed even if vgs, vds & vbs has converged +**** qdef = *(ckt->CKTstate0 + here->BSIM4v3qdef); +***/ + cdrain = here->BSIM4v3cd; + + if ((ckt->CKTmode & (MODETRAN | MODEAC)) || + ((ckt->CKTmode & MODETRANOP) && + (ckt->CKTmode & MODEUIC))) + { ByPass = 1; + + qgate = here->BSIM4v3qgate; + qbulk = here->BSIM4v3qbulk; + qdrn = here->BSIM4v3qdrn; + cgdo = here->BSIM4v3cgdo; + qgdo = here->BSIM4v3qgdo; + cgso = here->BSIM4v3cgso; + qgso = here->BSIM4v3qgso; + + goto line755; + } + else + goto line850; + } +#endif /*NOBYPASS*/ + + von = here->BSIM4v3von; + if (*(ckt->CKTstate0 + here->BSIM4v3vds) >= 0.0) + { vgs = DEVfetlim(vgs, *(ckt->CKTstate0 + here->BSIM4v3vgs), von); + vds = vgs - vgd; + vds = DEVlimvds(vds, *(ckt->CKTstate0 + here->BSIM4v3vds)); + vgd = vgs - vds; + if (here->BSIM4v3rgateMod == 3) + { vges = DEVfetlim(vges, *(ckt->CKTstate0 + here->BSIM4v3vges), von); + vgms = DEVfetlim(vgms, *(ckt->CKTstate0 + here->BSIM4v3vgms), von); + vged = vges - vds; + vgmd = vgms - vds; + } + else if ((here->BSIM4v3rgateMod == 1) || (here->BSIM4v3rgateMod == 2)) + { vges = DEVfetlim(vges, *(ckt->CKTstate0 + here->BSIM4v3vges), von); + vged = vges - vds; + } + + if (model->BSIM4v3rdsMod) + { vdes = DEVlimvds(vdes, *(ckt->CKTstate0 + here->BSIM4v3vdes)); + vses = -DEVlimvds(-vses, -(*(ckt->CKTstate0 + here->BSIM4v3vses))); + } + + } + else + { vgd = DEVfetlim(vgd, vgdo, von); + vds = vgs - vgd; + vds = -DEVlimvds(-vds, -(*(ckt->CKTstate0 + here->BSIM4v3vds))); + vgs = vgd + vds; + + if (here->BSIM4v3rgateMod == 3) + { vged = DEVfetlim(vged, vgedo, von); + vges = vged + vds; + vgmd = DEVfetlim(vgmd, vgmdo, von); + vgms = vgmd + vds; + } + if ((here->BSIM4v3rgateMod == 1) || (here->BSIM4v3rgateMod == 2)) + { vged = DEVfetlim(vged, vgedo, von); + vges = vged + vds; + } + + if (model->BSIM4v3rdsMod) + { vdes = -DEVlimvds(-vdes, -(*(ckt->CKTstate0 + here->BSIM4v3vdes))); + vses = DEVlimvds(vses, *(ckt->CKTstate0 + here->BSIM4v3vses)); + } + } + + if (vds >= 0.0) + { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM4v3vbs), + CONSTvt0, model->BSIM4v3vcrit, &Check); + vbd = vbs - vds; + if (here->BSIM4v3rbodyMod) + { vdbs = DEVpnjlim(vdbs, *(ckt->CKTstate0 + here->BSIM4v3vdbs), + CONSTvt0, model->BSIM4v3vcrit, &Check1); + vdbd = vdbs - vds; + vsbs = DEVpnjlim(vsbs, *(ckt->CKTstate0 + here->BSIM4v3vsbs), + CONSTvt0, model->BSIM4v3vcrit, &Check2); + if ((Check1 == 0) && (Check2 == 0)) + Check = 0; + else + Check = 1; + } + } + else + { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM4v3vbd), + CONSTvt0, model->BSIM4v3vcrit, &Check); + vbs = vbd + vds; + if (here->BSIM4v3rbodyMod) + { vdbd = DEVpnjlim(vdbd, *(ckt->CKTstate0 + here->BSIM4v3vdbd), + CONSTvt0, model->BSIM4v3vcrit, &Check1); + vdbs = vdbd + vds; + vsbdo = *(ckt->CKTstate0 + here->BSIM4v3vsbs) + - *(ckt->CKTstate0 + here->BSIM4v3vds); + vsbd = vsbs - vds; + vsbd = DEVpnjlim(vsbd, vsbdo, CONSTvt0, model->BSIM4v3vcrit, &Check2); + vsbs = vsbd + vds; + if ((Check1 == 0) && (Check2 == 0)) + Check = 0; + else + Check = 1; + } + } + } + + /* Calculate DC currents and their derivatives */ + vbd = vbs - vds; + vgd = vgs - vds; + vgb = vgs - vbs; + vged = vges - vds; + vgmd = vgms - vds; + vgmb = vgms - vbs; + vdbd = vdbs - vds; + + vbs_jct = (!here->BSIM4v3rbodyMod) ? vbs : vsbs; + vbd_jct = (!here->BSIM4v3rbodyMod) ? vbd : vdbd; + + /* Source/drain junction diode DC model begins */ + Nvtms = model->BSIM4v3vtm * model->BSIM4v3SjctEmissionCoeff; + if ((here->BSIM4v3Aseff <= 0.0) && (here->BSIM4v3Pseff <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM4v3Aseff * model->BSIM4v3SjctTempSatCurDensity + + here->BSIM4v3Pseff * model->BSIM4v3SjctSidewallTempSatCurDensity + + pParam->BSIM4v3weffCJ * here->BSIM4v3nf + * model->BSIM4v3SjctGateSidewallTempSatCurDensity; + } + + if (SourceSatCurrent <= 0.0) + { here->BSIM4v3gbs = ckt->CKTgmin; + here->BSIM4v3cbs = here->BSIM4v3gbs * vbs_jct; + } + else + { switch(model->BSIM4v3dioMod) + { case 0: + evbs = exp(vbs_jct / Nvtms); + T1 = model->BSIM4v3xjbvs * exp(-(model->BSIM4v3bvs + vbs_jct) / Nvtms); + /* WDLiu: Magic T1 in this form; different from BSIM4v3 beta. */ + here->BSIM4v3gbs = SourceSatCurrent * (evbs + T1) / Nvtms + ckt->CKTgmin; + here->BSIM4v3cbs = SourceSatCurrent * (evbs + here->BSIM4v3XExpBVS + - T1 - 1.0) + ckt->CKTgmin * vbs_jct; + break; + case 1: + T2 = vbs_jct / Nvtms; + if (T2 < -EXP_THRESHOLD) + { here->BSIM4v3gbs = ckt->CKTgmin; + here->BSIM4v3cbs = SourceSatCurrent * (MIN_EXP - 1.0) + + ckt->CKTgmin * vbs_jct; + } + else if (vbs_jct <= here->BSIM4v3vjsmFwd) + { evbs = exp(T2); + here->BSIM4v3gbs = SourceSatCurrent * evbs / Nvtms + ckt->CKTgmin; + here->BSIM4v3cbs = SourceSatCurrent * (evbs - 1.0) + + ckt->CKTgmin * vbs_jct; + } + else + { T0 = here->BSIM4v3IVjsmFwd / Nvtms; + here->BSIM4v3gbs = T0 + ckt->CKTgmin; + here->BSIM4v3cbs = here->BSIM4v3IVjsmFwd - SourceSatCurrent + T0 + * (vbs_jct - here->BSIM4v3vjsmFwd) + ckt->CKTgmin * vbs_jct; + } + break; + case 2: + if (vbs_jct < here->BSIM4v3vjsmRev) + { T0 = vbs_jct / Nvtms; + if (T0 < -EXP_THRESHOLD) + { evbs = MIN_EXP; + devbs_dvb = 0.0; + } + else + { evbs = exp(T0); + devbs_dvb = evbs / Nvtms; + } + + T1 = evbs - 1.0; + T2 = here->BSIM4v3IVjsmRev + here->BSIM4v3SslpRev + * (vbs_jct - here->BSIM4v3vjsmRev); + here->BSIM4v3gbs = devbs_dvb * T2 + T1 * here->BSIM4v3SslpRev + ckt->CKTgmin; + here->BSIM4v3cbs = T1 * T2 + ckt->CKTgmin * vbs_jct; + } + else if (vbs_jct <= here->BSIM4v3vjsmFwd) + { T0 = vbs_jct / Nvtms; + if (T0 < -EXP_THRESHOLD) + { evbs = MIN_EXP; + devbs_dvb = 0.0; + } + else + { evbs = exp(T0); + devbs_dvb = evbs / Nvtms; + } + + T1 = (model->BSIM4v3bvs + vbs_jct) / Nvtms; + if (T1 > EXP_THRESHOLD) + { T2 = MIN_EXP; + T3 = 0.0; + } + else + { T2 = exp(-T1); + T3 = -T2 /Nvtms; + } + here->BSIM4v3gbs = SourceSatCurrent * (devbs_dvb - model->BSIM4v3xjbvs * T3) + + ckt->CKTgmin; + here->BSIM4v3cbs = SourceSatCurrent * (evbs + here->BSIM4v3XExpBVS - 1.0 + - model->BSIM4v3xjbvs * T2) + ckt->CKTgmin * vbs_jct; + } + else + { here->BSIM4v3gbs = here->BSIM4v3SslpFwd + ckt->CKTgmin; + here->BSIM4v3cbs = here->BSIM4v3IVjsmFwd + here->BSIM4v3SslpFwd * (vbs_jct + - here->BSIM4v3vjsmFwd) + ckt->CKTgmin * vbs_jct; + } + break; + default: break; + } + } + + Nvtmd = model->BSIM4v3vtm * model->BSIM4v3DjctEmissionCoeff; + if ((here->BSIM4v3Adeff <= 0.0) && (here->BSIM4v3Pdeff <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM4v3Adeff * model->BSIM4v3DjctTempSatCurDensity + + here->BSIM4v3Pdeff * model->BSIM4v3DjctSidewallTempSatCurDensity + + pParam->BSIM4v3weffCJ * here->BSIM4v3nf + * model->BSIM4v3DjctGateSidewallTempSatCurDensity; + } + + if (DrainSatCurrent <= 0.0) + { here->BSIM4v3gbd = ckt->CKTgmin; + here->BSIM4v3cbd = here->BSIM4v3gbd * vbd_jct; + } + else + { switch(model->BSIM4v3dioMod) + { case 0: + evbd = exp(vbd_jct / Nvtmd); + T1 = model->BSIM4v3xjbvd * exp(-(model->BSIM4v3bvd + vbd_jct) / Nvtmd); + /* WDLiu: Magic T1 in this form; different from BSIM4v3 beta. */ + here->BSIM4v3gbd = DrainSatCurrent * (evbd + T1) / Nvtmd + ckt->CKTgmin; + here->BSIM4v3cbd = DrainSatCurrent * (evbd + here->BSIM4v3XExpBVD + - T1 - 1.0) + ckt->CKTgmin * vbd_jct; + break; + case 1: + T2 = vbd_jct / Nvtmd; + if (T2 < -EXP_THRESHOLD) + { here->BSIM4v3gbd = ckt->CKTgmin; + here->BSIM4v3cbd = DrainSatCurrent * (MIN_EXP - 1.0) + + ckt->CKTgmin * vbd_jct; + } + else if (vbd_jct <= here->BSIM4v3vjdmFwd) + { evbd = exp(T2); + here->BSIM4v3gbd = DrainSatCurrent * evbd / Nvtmd + ckt->CKTgmin; + here->BSIM4v3cbd = DrainSatCurrent * (evbd - 1.0) + + ckt->CKTgmin * vbd_jct; + } + else + { T0 = here->BSIM4v3IVjdmFwd / Nvtmd; + here->BSIM4v3gbd = T0 + ckt->CKTgmin; + here->BSIM4v3cbd = here->BSIM4v3IVjdmFwd - DrainSatCurrent + T0 + * (vbd_jct - here->BSIM4v3vjdmFwd) + ckt->CKTgmin * vbd_jct; + } + break; + case 2: + if (vbd_jct < here->BSIM4v3vjdmRev) + { T0 = vbd_jct / Nvtmd; + if (T0 < -EXP_THRESHOLD) + { evbd = MIN_EXP; + devbd_dvb = 0.0; + } + else + { evbd = exp(T0); + devbd_dvb = evbd / Nvtmd; + } + + T1 = evbd - 1.0; + T2 = here->BSIM4v3IVjdmRev + here->BSIM4v3DslpRev + * (vbd_jct - here->BSIM4v3vjdmRev); + here->BSIM4v3gbd = devbd_dvb * T2 + T1 * here->BSIM4v3DslpRev + ckt->CKTgmin; + here->BSIM4v3cbd = T1 * T2 + ckt->CKTgmin * vbd_jct; + } + else if (vbd_jct <= here->BSIM4v3vjdmFwd) + { T0 = vbd_jct / Nvtmd; + if (T0 < -EXP_THRESHOLD) + { evbd = MIN_EXP; + devbd_dvb = 0.0; + } + else + { evbd = exp(T0); + devbd_dvb = evbd / Nvtmd; + } + + T1 = (model->BSIM4v3bvd + vbd_jct) / Nvtmd; + if (T1 > EXP_THRESHOLD) + { T2 = MIN_EXP; + T3 = 0.0; + } + else + { T2 = exp(-T1); + T3 = -T2 /Nvtmd; + } + here->BSIM4v3gbd = DrainSatCurrent * (devbd_dvb - model->BSIM4v3xjbvd * T3) + + ckt->CKTgmin; + here->BSIM4v3cbd = DrainSatCurrent * (evbd + here->BSIM4v3XExpBVS - 1.0 + - model->BSIM4v3xjbvd * T2) + ckt->CKTgmin * vbd_jct; + } + else + { here->BSIM4v3gbd = here->BSIM4v3DslpFwd + ckt->CKTgmin; + here->BSIM4v3cbd = here->BSIM4v3IVjdmFwd + here->BSIM4v3DslpFwd * (vbd_jct + - here->BSIM4v3vjdmFwd) + ckt->CKTgmin * vbd_jct; + } + break; + default: break; + } + } /* End of diode DC model */ + + if (vds >= 0.0) + { here->BSIM4v3mode = 1; + Vds = vds; + Vgs = vgs; + Vbs = vbs; + Vdb = vds - vbs; /* WDLiu: for GIDL */ + } + else + { here->BSIM4v3mode = -1; + Vds = -vds; + Vgs = vgd; + Vbs = vbd; + Vdb = -vbs; + } + + T0 = Vbs - pParam->BSIM4v3vbsc - 0.001; + T1 = sqrt(T0 * T0 - 0.004 * pParam->BSIM4v3vbsc); + if (T0 >= 0.0) + { Vbseff = pParam->BSIM4v3vbsc + 0.5 * (T0 + T1); + dVbseff_dVb = 0.5 * (1.0 + T0 / T1); + } + else + { T2 = -0.002 / (T1 - T0); + Vbseff = pParam->BSIM4v3vbsc * (1.0 + T2); + dVbseff_dVb = T2 * pParam->BSIM4v3vbsc / T1; + } + + /* JX: Correction to forward body bias */ + T9 = 0.95 * pParam->BSIM4v3phi; + T0 = T9 - Vbseff - 0.001; + T1 = sqrt(T0 * T0 + 0.004 * T9); + Vbseff = T9 - 0.5 * (T0 + T1); + dVbseff_dVb *= 0.5 * (1.0 + T0 / T1); + + Phis = pParam->BSIM4v3phi - Vbseff; + dPhis_dVb = -1.0; + sqrtPhis = sqrt(Phis); + dsqrtPhis_dVb = -0.5 / sqrtPhis; + + + Xdep = pParam->BSIM4v3Xdep0 * sqrtPhis / pParam->BSIM4v3sqrtPhi; + dXdep_dVb = (pParam->BSIM4v3Xdep0 / pParam->BSIM4v3sqrtPhi) + * dsqrtPhis_dVb; + + Leff = pParam->BSIM4v3leff; + Vtm = model->BSIM4v3vtm; + + /* Vth Calculation */ + T3 = sqrt(Xdep); + V0 = pParam->BSIM4v3vbi - pParam->BSIM4v3phi; + + T0 = pParam->BSIM4v3dvt2 * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM4v3dvt2; + } + else + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM4v3dvt2 * T4 * T4; + } + lt1 = model->BSIM4v3factor1 * T3 * T1; + dlt1_dVb = model->BSIM4v3factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM4v3dvt2w * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM4v3dvt2w; + } + else + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM4v3dvt2w * T4 * T4; + } + ltw = model->BSIM4v3factor1 * T3 * T1; + dltw_dVb = model->BSIM4v3factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM4v3dvt1 * Leff / lt1; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + Theta0 = T1 / T4; + dT1_dVb = -T0 * T1 * dlt1_dVb / lt1; + dTheta0_dVb = dT1_dVb * (T4 - 2.0 * T1 * (T2 + MIN_EXP)) / T4 / T4; + } + else + { Theta0 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + dTheta0_dVb = 0.0; + } + here->BSIM4v3thetavth = pParam->BSIM4v3dvt0 * Theta0; + Delt_vth = here->BSIM4v3thetavth * V0; + dDelt_vth_dVb = pParam->BSIM4v3dvt0 * dTheta0_dVb * V0; + + T0 = pParam->BSIM4v3dvt1w * pParam->BSIM4v3weff * Leff / ltw; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T5 = T1 / T4; + dT1_dVb = -T0 * T1 * dltw_dVb / ltw; + dT5_dVb = dT1_dVb * (T4 - 2.0 * T1 * (T2 + MIN_EXP)) / T4 / T4; + } + else + { T5 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + dT5_dVb = 0.0; + } + T0 = pParam->BSIM4v3dvt0w * T5; + T2 = T0 * V0; + dT2_dVb = pParam->BSIM4v3dvt0w * dT5_dVb * V0; + + TempRatio = ckt->CKTtemp / model->BSIM4v3tnom - 1.0; + T0 = sqrt(1.0 + pParam->BSIM4v3lpe0 / Leff); + T1 = pParam->BSIM4v3k1ox * (T0 - 1.0) * pParam->BSIM4v3sqrtPhi + + (pParam->BSIM4v3kt1 + pParam->BSIM4v3kt1l / Leff + + pParam->BSIM4v3kt2 * Vbseff) * TempRatio; + Vth_NarrowW = model->BSIM4v3toxe * pParam->BSIM4v3phi + / (pParam->BSIM4v3weff + pParam->BSIM4v3w0); + + T3 = pParam->BSIM4v3eta0 + pParam->BSIM4v3etab * Vbseff; + if (T3 < 1.0e-4) + { T9 = 1.0 / (3.0 - 2.0e4 * T3); + T3 = (2.0e-4 - T3) * T9; + T4 = T9 * T9; + } + else + { T4 = 1.0; + } + dDIBL_Sft_dVd = T3 * pParam->BSIM4v3theta0vb0; + DIBL_Sft = dDIBL_Sft_dVd * Vds; + + Lpe_Vb = sqrt(1.0 + pParam->BSIM4v3lpeb / Leff); + + Vth = model->BSIM4v3type * pParam->BSIM4v3vth0 + (pParam->BSIM4v3k1ox * sqrtPhis + - pParam->BSIM4v3k1 * pParam->BSIM4v3sqrtPhi) * Lpe_Vb + - pParam->BSIM4v3k2ox * Vbseff - Delt_vth - T2 + (pParam->BSIM4v3k3 + + pParam->BSIM4v3k3b * Vbseff) * Vth_NarrowW + T1 - DIBL_Sft; + + dVth_dVb = Lpe_Vb * pParam->BSIM4v3k1ox * dsqrtPhis_dVb - pParam->BSIM4v3k2ox + - dDelt_vth_dVb - dT2_dVb + pParam->BSIM4v3k3b * Vth_NarrowW + - pParam->BSIM4v3etab * Vds * pParam->BSIM4v3theta0vb0 * T4 + + pParam->BSIM4v3kt2 * TempRatio; + dVth_dVd = -dDIBL_Sft_dVd; + + + /* Calculate n */ + tmp1 = EPSSI / Xdep; + here->BSIM4v3nstar = model->BSIM4v3vtm / Charge_q * (model->BSIM4v3coxe + + tmp1 + pParam->BSIM4v3cit); + tmp2 = pParam->BSIM4v3nfactor * tmp1; + tmp3 = pParam->BSIM4v3cdsc + pParam->BSIM4v3cdscb * Vbseff + + pParam->BSIM4v3cdscd * Vds; + tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM4v3cit) / model->BSIM4v3coxe; + if (tmp4 >= -0.5) + { n = 1.0 + tmp4; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM4v3cdscb * Theta0) / model->BSIM4v3coxe; + dn_dVd = pParam->BSIM4v3cdscd * Theta0 / model->BSIM4v3coxe; + } + else + { T0 = 1.0 / (3.0 + 8.0 * tmp4); + n = (1.0 + 3.0 * tmp4) * T0; + T0 *= T0; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM4v3cdscb * Theta0) / model->BSIM4v3coxe * T0; + dn_dVd = pParam->BSIM4v3cdscd * Theta0 / model->BSIM4v3coxe * T0; + } + + + /* Vth correction for Pocket implant */ + if (pParam->BSIM4v3dvtp0 > 0.0) + { T0 = -pParam->BSIM4v3dvtp1 * Vds; + if (T0 < -EXP_THRESHOLD) + { T2 = MIN_EXP; + dT2_dVd = 0.0; + } + else + { T2 = exp(T0); + dT2_dVd = -pParam->BSIM4v3dvtp1 * T2; + } + + T3 = Leff + pParam->BSIM4v3dvtp0 * (1.0 + T2); + dT3_dVd = pParam->BSIM4v3dvtp0 * dT2_dVd; + T4 = Vtm * log(Leff / T3); + dT4_dVd = -Vtm * dT3_dVd / T3; + dDITS_Sft_dVd = dn_dVd * T4 + n * dT4_dVd; + dDITS_Sft_dVb = T4 * dn_dVb; + + Vth -= n * T4; + dVth_dVd -= dDITS_Sft_dVd; + dVth_dVb -= dDITS_Sft_dVb; + } + here->BSIM4v3von = Vth; + + + /* Poly Gate Si Depletion Effect */ + T0 = pParam->BSIM4v3vfb + pParam->BSIM4v3phi; + + BSIM4v3polyDepletion(T0, pParam->BSIM4v3ngate, model->BSIM4v3coxe, vgs, &vgs_eff, &dvgs_eff_dvg); + + BSIM4v3polyDepletion(T0, pParam->BSIM4v3ngate, model->BSIM4v3coxe, vgd, &vgd_eff, &dvgd_eff_dvg); + + if(here->BSIM4v3mode>0) { + Vgs_eff = vgs_eff; + dVgs_eff_dVg = dvgs_eff_dvg; + } else { + Vgs_eff = vgd_eff; + dVgs_eff_dVg = dvgd_eff_dvg; + } + here->BSIM4v3vgs_eff = vgs_eff; + here->BSIM4v3vgd_eff = vgd_eff; + here->BSIM4v3dvgs_eff_dvg = dvgs_eff_dvg; + here->BSIM4v3dvgd_eff_dvg = dvgd_eff_dvg; + + + Vgst = Vgs_eff - Vth; + + /* Calculate Vgsteff */ + T0 = n * Vtm; + T1 = pParam->BSIM4v3mstar * Vgst; + T2 = T1 / T0; + if (T2 > EXP_THRESHOLD) + { T10 = T1; + dT10_dVg = pParam->BSIM4v3mstar * dVgs_eff_dVg; + dT10_dVd = -dVth_dVd * pParam->BSIM4v3mstar; + dT10_dVb = -dVth_dVb * pParam->BSIM4v3mstar; + } + else if (T2 < -EXP_THRESHOLD) + { T10 = Vtm * log(1.0 + MIN_EXP); + dT10_dVg = 0.0; + dT10_dVd = T10 * dn_dVd; + dT10_dVb = T10 * dn_dVb; + T10 *= n; + } + else + { ExpVgst = exp(T2); + T3 = Vtm * log(1.0 + ExpVgst); + T10 = n * T3; + dT10_dVg = pParam->BSIM4v3mstar * ExpVgst / (1.0 + ExpVgst); + dT10_dVb = T3 * dn_dVb - dT10_dVg * (dVth_dVb + Vgst * dn_dVb / n); + dT10_dVd = T3 * dn_dVd - dT10_dVg * (dVth_dVd + Vgst * dn_dVd / n); + dT10_dVg *= dVgs_eff_dVg; + } + + T1 = pParam->BSIM4v3voffcbn - (1.0 - pParam->BSIM4v3mstar) * Vgst; + T2 = T1 / T0; + if (T2 < -EXP_THRESHOLD) + { T3 = model->BSIM4v3coxe * MIN_EXP / pParam->BSIM4v3cdep0; + T9 = pParam->BSIM4v3mstar + T3 * n; + dT9_dVg = 0.0; + dT9_dVd = dn_dVd * T3; + dT9_dVb = dn_dVb * T3; + } + else if (T2 > EXP_THRESHOLD) + { T3 = model->BSIM4v3coxe * MAX_EXP / pParam->BSIM4v3cdep0; + T9 = pParam->BSIM4v3mstar + T3 * n; + dT9_dVg = 0.0; + dT9_dVd = dn_dVd * T3; + dT9_dVb = dn_dVb * T3; + } + else + { ExpVgst = exp(T2); + T3 = model->BSIM4v3coxe / pParam->BSIM4v3cdep0; + T4 = T3 * ExpVgst; + T5 = T1 * T4 / T0; + T9 = pParam->BSIM4v3mstar + n * T4; + dT9_dVg = T3 * (pParam->BSIM4v3mstar - 1.0) * ExpVgst / Vtm; + dT9_dVb = T4 * dn_dVb - dT9_dVg * dVth_dVb - T5 * dn_dVb; + dT9_dVd = T4 * dn_dVd - dT9_dVg * dVth_dVd - T5 * dn_dVd; + dT9_dVg *= dVgs_eff_dVg; + } + + here->BSIM4v3Vgsteff = Vgsteff = T10 / T9; + T11 = T9 * T9; + dVgsteff_dVg = (T9 * dT10_dVg - T10 * dT9_dVg) / T11; + dVgsteff_dVd = (T9 * dT10_dVd - T10 * dT9_dVd) / T11; + dVgsteff_dVb = (T9 * dT10_dVb - T10 * dT9_dVb) / T11; + + /* Calculate Effective Channel Geometry */ + T9 = sqrtPhis - pParam->BSIM4v3sqrtPhi; + Weff = pParam->BSIM4v3weff - 2.0 * (pParam->BSIM4v3dwg * Vgsteff + + pParam->BSIM4v3dwb * T9); + dWeff_dVg = -2.0 * pParam->BSIM4v3dwg; + dWeff_dVb = -2.0 * pParam->BSIM4v3dwb * dsqrtPhis_dVb; + + if (Weff < 2.0e-8) /* to avoid the discontinuity problem due to Weff*/ + { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); + Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; + T0 *= T0 * 4.0e-16; + dWeff_dVg *= T0; + dWeff_dVb *= T0; + } + + if (model->BSIM4v3rdsMod == 1) + Rds = dRds_dVg = dRds_dVb = 0.0; + else + { T0 = 1.0 + pParam->BSIM4v3prwg * Vgsteff; + dT0_dVg = -pParam->BSIM4v3prwg / T0 / T0; + T1 = pParam->BSIM4v3prwb * T9; + dT1_dVb = pParam->BSIM4v3prwb * dsqrtPhis_dVb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); /* 0.01 = 4.0 * 0.05 * 0.05 */ + dT3_dVg = 1.0 + T2 / (T3 - T2); + dT3_dVb = dT3_dVg * dT1_dVb; + dT3_dVg *= dT0_dVg; + + T4 = pParam->BSIM4v3rds0 * 0.5; + Rds = pParam->BSIM4v3rdswmin + T3 * T4; + dRds_dVg = T4 * dT3_dVg; + dRds_dVb = T4 * dT3_dVb; + + if (Rds > 0.0) + here->BSIM4v3grdsw = 1.0 / Rds * here->BSIM4v3nf; /* bugfix */ + else + here->BSIM4v3grdsw = 0.0; + } + + /* Calculate Abulk */ + T9 = 0.5 * pParam->BSIM4v3k1ox * Lpe_Vb / sqrtPhis; + T1 = T9 + pParam->BSIM4v3k2ox - pParam->BSIM4v3k3b * Vth_NarrowW; + dT1_dVb = -T9 / sqrtPhis * dsqrtPhis_dVb; + + T9 = sqrt(pParam->BSIM4v3xj * Xdep); + tmp1 = Leff + 2.0 * T9; + T5 = Leff / tmp1; + tmp2 = pParam->BSIM4v3a0 * T5; + tmp3 = pParam->BSIM4v3weff + pParam->BSIM4v3b1; + tmp4 = pParam->BSIM4v3b0 / tmp3; + T2 = tmp2 + tmp4; + dT2_dVb = -T9 / tmp1 / Xdep * dXdep_dVb; + T6 = T5 * T5; + T7 = T5 * T6; + + Abulk0 = 1.0 + T1 * T2; + dAbulk0_dVb = T1 * tmp2 * dT2_dVb + T2 * dT1_dVb; + + T8 = pParam->BSIM4v3ags * pParam->BSIM4v3a0 * T7; + dAbulk_dVg = -T1 * T8; + Abulk = Abulk0 + dAbulk_dVg * Vgsteff; + dAbulk_dVb = dAbulk0_dVb - T8 * Vgsteff * (dT1_dVb + + 3.0 * T1 * dT2_dVb); + + if (Abulk0 < 0.1) /* added to avoid the problems caused by Abulk0 */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk0); + Abulk0 = (0.2 - Abulk0) * T9; + dAbulk0_dVb *= T9 * T9; + } + + if (Abulk < 0.1) + { T9 = 1.0 / (3.0 - 20.0 * Abulk); + Abulk = (0.2 - Abulk) * T9; + T10 = T9 * T9; + dAbulk_dVb *= T10; + dAbulk_dVg *= T10; + } + here->BSIM4v3Abulk = Abulk; + + T2 = pParam->BSIM4v3keta * Vbseff; + if (T2 >= -0.9) + { T0 = 1.0 / (1.0 + T2); + dT0_dVb = -pParam->BSIM4v3keta * T0 * T0; + } + else + { T1 = 1.0 / (0.8 + T2); + T0 = (17.0 + 20.0 * T2) * T1; + dT0_dVb = -pParam->BSIM4v3keta * T1 * T1; + } + dAbulk_dVg *= T0; + dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; + dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; + Abulk *= T0; + Abulk0 *= T0; + + /* Mobility calculation */ + if (model->BSIM4v3mobMod == 0) + { T0 = Vgsteff + Vth + Vth; + T2 = pParam->BSIM4v3ua + pParam->BSIM4v3uc * Vbseff; + T3 = T0 / model->BSIM4v3toxe; + T5 = T3 * (T2 + pParam->BSIM4v3ub * T3); + dDenomi_dVg = (T2 + 2.0 * pParam->BSIM4v3ub * T3) / model->BSIM4v3toxe; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4v3uc * T3; + } + else if (model->BSIM4v3mobMod == 1) + { T0 = Vgsteff + Vth + Vth; + T2 = 1.0 + pParam->BSIM4v3uc * Vbseff; + T3 = T0 / model->BSIM4v3toxe; + T4 = T3 * (pParam->BSIM4v3ua + pParam->BSIM4v3ub * T3); + T5 = T4 * T2; + dDenomi_dVg = (pParam->BSIM4v3ua + 2.0 * pParam->BSIM4v3ub * T3) * T2 + / model->BSIM4v3toxe; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4v3uc * T4; + } + else + { T0 = (Vgsteff + pParam->BSIM4v3vtfbphi1) / model->BSIM4v3toxe; + T1 = exp(pParam->BSIM4v3eu * log(T0)); + dT1_dVg = T1 * pParam->BSIM4v3eu / T0 / model->BSIM4v3toxe; + T2 = pParam->BSIM4v3ua + pParam->BSIM4v3uc * Vbseff; + T5 = T1 * T2; + dDenomi_dVg = T2 * dT1_dVg; + dDenomi_dVd = 0.0; + dDenomi_dVb = T1 * pParam->BSIM4v3uc; + } + + if (T5 >= -0.8) + { Denomi = 1.0 + T5; + } + else + { T9 = 1.0 / (7.0 + 10.0 * T5); + Denomi = (0.6 + T5) * T9; + T9 *= T9; + dDenomi_dVg *= T9; + dDenomi_dVd *= T9; + dDenomi_dVb *= T9; + } + + here->BSIM4v3ueff = ueff = pParam->BSIM4v3u0temp / Denomi; + T9 = -ueff / Denomi; + dueff_dVg = T9 * dDenomi_dVg; + dueff_dVd = T9 * dDenomi_dVd; + dueff_dVb = T9 * dDenomi_dVb; + + /* Saturation Drain Voltage Vdsat */ + WVCox = Weff * pParam->BSIM4v3vsattemp * model->BSIM4v3coxe; + WVCoxRds = WVCox * Rds; + + Esat = 2.0 * pParam->BSIM4v3vsattemp / ueff; + here->BSIM4v3EsatL = EsatL = Esat * Leff; + T0 = -EsatL /ueff; + dEsatL_dVg = T0 * dueff_dVg; + dEsatL_dVd = T0 * dueff_dVd; + dEsatL_dVb = T0 * dueff_dVb; + + /* Sqrt() */ + a1 = pParam->BSIM4v3a1; + if (a1 == 0.0) + { Lambda = pParam->BSIM4v3a2; + dLambda_dVg = 0.0; + } + else if (a1 > 0.0) + { T0 = 1.0 - pParam->BSIM4v3a2; + T1 = T0 - pParam->BSIM4v3a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * T0); + Lambda = pParam->BSIM4v3a2 + T0 - 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM4v3a1 * (1.0 + T1 / T2); + } + else + { T1 = pParam->BSIM4v3a2 + pParam->BSIM4v3a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM4v3a2); + Lambda = 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM4v3a1 * (1.0 + T1 / T2); + } + + Vgst2Vtm = Vgsteff + 2.0 * Vtm; + if (Rds > 0) + { tmp2 = dRds_dVg / Rds + dWeff_dVg / Weff; + tmp3 = dRds_dVb / Rds + dWeff_dVb / Weff; + } + else + { tmp2 = dWeff_dVg / Weff; + tmp3 = dWeff_dVb / Weff; + } + if ((Rds == 0.0) && (Lambda == 1.0)) + { T0 = 1.0 / (Abulk * EsatL + Vgst2Vtm); + tmp1 = 0.0; + T1 = T0 * T0; + T2 = Vgst2Vtm * T0; + T3 = EsatL * Vgst2Vtm; + Vdsat = T3 * T0; + + dT0_dVg = -(Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 1.0) * T1; + dT0_dVd = -(Abulk * dEsatL_dVd) * T1; + dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; + + dVdsat_dVg = T3 * dT0_dVg + T2 * dEsatL_dVg + EsatL * T0; + dVdsat_dVd = T3 * dT0_dVd + T2 * dEsatL_dVd; + dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; + } + else + { tmp1 = dLambda_dVg / (Lambda * Lambda); + T9 = Abulk * WVCoxRds; + T8 = Abulk * T9; + T7 = Vgst2Vtm * T9; + T6 = Vgst2Vtm * WVCoxRds; + T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); + dT0_dVg = 2.0 * (T8 * tmp2 - Abulk * tmp1 + + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); + + dT0_dVb = 2.0 * (T8 * (2.0 / Abulk * dAbulk_dVb + tmp3) + + (1.0 / Lambda - 1.0) * dAbulk_dVb); + dT0_dVd = 0.0; + T1 = Vgst2Vtm * (2.0 / Lambda - 1.0) + Abulk * EsatL + 3.0 * T7; + + dT1_dVg = (2.0 / Lambda - 1.0) - 2.0 * Vgst2Vtm * tmp1 + + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 + + T7 * tmp2 + T6 * dAbulk_dVg); + dT1_dVb = Abulk * dEsatL_dVb + EsatL * dAbulk_dVb + + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); + dT1_dVd = Abulk * dEsatL_dVd; + + T2 = Vgst2Vtm * (EsatL + 2.0 * T6); + dT2_dVg = EsatL + Vgst2Vtm * dEsatL_dVg + + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); + dT2_dVb = Vgst2Vtm * (dEsatL_dVb + 2.0 * T6 * tmp3); + dT2_dVd = Vgst2Vtm * dEsatL_dVd; + + T3 = sqrt(T1 * T1 - 2.0 * T0 * T2); + Vdsat = (T1 - T3) / T0; + + dT3_dVg = (T1 * dT1_dVg - 2.0 * (T0 * dT2_dVg + T2 * dT0_dVg)) + / T3; + dT3_dVd = (T1 * dT1_dVd - 2.0 * (T0 * dT2_dVd + T2 * dT0_dVd)) + / T3; + dT3_dVb = (T1 * dT1_dVb - 2.0 * (T0 * dT2_dVb + T2 * dT0_dVb)) + / T3; + + dVdsat_dVg = (dT1_dVg - (T1 * dT1_dVg - dT0_dVg * T2 + - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; + dVdsat_dVb = (dT1_dVb - (T1 * dT1_dVb - dT0_dVb * T2 + - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; + dVdsat_dVd = (dT1_dVd - (T1 * dT1_dVd - T0 * dT2_dVd) / T3) / T0; + } + here->BSIM4v3vdsat = Vdsat; + + /* Calculate Vdseff */ + T1 = Vdsat - Vds - pParam->BSIM4v3delta; + dT1_dVg = dVdsat_dVg; + dT1_dVd = dVdsat_dVd - 1.0; + dT1_dVb = dVdsat_dVb; + + T2 = sqrt(T1 * T1 + 4.0 * pParam->BSIM4v3delta * Vdsat); + T0 = T1 / T2; + T9 = 2.0 * pParam->BSIM4v3delta; + T3 = T9 / T2; + dT2_dVg = T0 * dT1_dVg + T3 * dVdsat_dVg; + dT2_dVd = T0 * dT1_dVd + T3 * dVdsat_dVd; + dT2_dVb = T0 * dT1_dVb + T3 * dVdsat_dVb; + + if (T1 >= 0.0) + { Vdseff = Vdsat - 0.5 * (T1 + T2); + dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); + dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); + dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); + } + else + { T4 = T9 / (T2 - T1); + T5 = 1.0 - T4; + T6 = Vdsat * T4 / (T2 - T1); + Vdseff = Vdsat * T5; + dVdseff_dVg = dVdsat_dVg * T5 + T6 * (dT2_dVg - dT1_dVg); + dVdseff_dVd = dVdsat_dVd * T5 + T6 * (dT2_dVd - dT1_dVd); + dVdseff_dVb = dVdsat_dVb * T5 + T6 * (dT2_dVb - dT1_dVb); + } + + if (Vds == 0.0) + { Vdseff = 0.0; + dVdseff_dVg = 0.0; + dVdseff_dVb = 0.0; + } + + if (Vdseff > Vds) + Vdseff = Vds; + diffVds = Vds - Vdseff; + here->BSIM4v3Vdseff = Vdseff; + + /* Velocity Overshoot */ + if((model->BSIM4v3lambdaGiven) && (model->BSIM4v3lambda > 0.0) ) + { + T1 = Leff * ueff; + T2 = pParam->BSIM4v3lambda / T1; + T3 = -T2 / T1 * Leff; + dT2_dVd = T3 * dueff_dVd; + dT2_dVg = T3 * dueff_dVg; + dT2_dVb = T3 * dueff_dVb; + T5 = 1.0 / (Esat * pParam->BSIM4v3litl); + T4 = -T5 / EsatL; + dT5_dVg = dEsatL_dVg * T4; + dT5_dVd = dEsatL_dVd * T4; + dT5_dVb = dEsatL_dVb * T4; + T6 = 1.0 + diffVds * T5; + dT6_dVg = dT5_dVg * diffVds - dVdseff_dVg * T5; + dT6_dVd = dT5_dVd * diffVds + (1.0 - dVdseff_dVd) * T5; + dT6_dVb = dT5_dVb * diffVds - dVdseff_dVb * T5; + T7 = 2.0 / (T6 * T6 + 1.0); + T8 = 1.0 - T7; + T9 = T6 * T7 * T7; + dT8_dVg = T9 * dT6_dVg; + dT8_dVd = T9 * dT6_dVd; + dT8_dVb = T9 * dT6_dVb; + T10 = 1.0 + T2 * T8; + dT10_dVg = dT2_dVg * T8 + T2 * dT8_dVg; + dT10_dVd = dT2_dVd * T8 + T2 * dT8_dVd; + dT10_dVb = dT2_dVb * T8 + T2 * dT8_dVb; + if(T10 == 1.0) + dT10_dVg = dT10_dVd = dT10_dVb = 0.0; + + dEsatL_dVg *= T10; + dEsatL_dVg += EsatL * dT10_dVg; + dEsatL_dVd *= T10; + dEsatL_dVd += EsatL * dT10_dVd; + dEsatL_dVb *= T10; + dEsatL_dVb += EsatL * dT10_dVb; + EsatL *= T10; + here->BSIM4v3EsatL = EsatL; + } + + /* Calculate Vasat */ + tmp4 = 1.0 - 0.5 * Abulk * Vdsat / Vgst2Vtm; + T9 = WVCoxRds * Vgsteff; + T8 = T9 / Vgst2Vtm; + T0 = EsatL + Vdsat + 2.0 * T9 * tmp4; + + T7 = 2.0 * WVCoxRds * tmp4; + dT0_dVg = dEsatL_dVg + dVdsat_dVg + T7 * (1.0 + tmp2 * Vgsteff) + - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm + + Vdsat * dAbulk_dVg); + + dT0_dVb = dEsatL_dVb + dVdsat_dVb + T7 * tmp3 * Vgsteff + - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = dEsatL_dVd + dVdsat_dVd - T8 * Abulk * dVdsat_dVd; + + T9 = WVCoxRds * Abulk; + T1 = 2.0 / Lambda - 1.0 + T9; + dT1_dVg = -2.0 * tmp1 + WVCoxRds * (Abulk * tmp2 + dAbulk_dVg); + dT1_dVb = dAbulk_dVb * WVCoxRds + T9 * tmp3; + + Vasat = T0 / T1; + dVasat_dVg = (dT0_dVg - Vasat * dT1_dVg) / T1; + dVasat_dVb = (dT0_dVb - Vasat * dT1_dVb) / T1; + dVasat_dVd = dT0_dVd / T1; + + /* Calculate Idl first */ + tmp1 = pParam->BSIM4v3vtfbphi2; + tmp2 = 2.0e8 * model->BSIM4v3toxp; + dT0_dVg = 1.0 / tmp2; + T0 = (Vgsteff + tmp1) * dT0_dVg; + + tmp3 = exp(0.7 * log(T0)); + T1 = 1.0 + tmp3; + T2 = 0.7 * tmp3 / T0; + Tcen = 1.9e-9 / T1; + dTcen_dVg = -Tcen * T2 * dT0_dVg / T1; + + Coxeff = EPSSI * model->BSIM4v3coxp + / (EPSSI + model->BSIM4v3coxp * Tcen); + dCoxeff_dVg = -Coxeff * Coxeff * dTcen_dVg / EPSSI; + + CoxeffWovL = Coxeff * Weff / Leff; + beta = ueff * CoxeffWovL; + T3 = ueff / Leff; + dbeta_dVg = CoxeffWovL * dueff_dVg + T3 + * (Weff * dCoxeff_dVg + Coxeff * dWeff_dVg); + dbeta_dVd = CoxeffWovL * dueff_dVd; + dbeta_dVb = CoxeffWovL * dueff_dVb + T3 * Coxeff * dWeff_dVb; + + here->BSIM4v3AbovVgst2Vtm = Abulk / Vgst2Vtm; + T0 = 1.0 - 0.5 * Vdseff * here->BSIM4v3AbovVgst2Vtm; + dT0_dVg = -0.5 * (Abulk * dVdseff_dVg + - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; + dT0_dVd = -0.5 * Abulk * dVdseff_dVd / Vgst2Vtm; + dT0_dVb = -0.5 * (Abulk * dVdseff_dVb + dAbulk_dVb * Vdseff) + / Vgst2Vtm; + + fgche1 = Vgsteff * T0; + dfgche1_dVg = Vgsteff * dT0_dVg + T0; + dfgche1_dVd = Vgsteff * dT0_dVd; + dfgche1_dVb = Vgsteff * dT0_dVb; + + T9 = Vdseff / EsatL; + fgche2 = 1.0 + T9; + dfgche2_dVg = (dVdseff_dVg - T9 * dEsatL_dVg) / EsatL; + dfgche2_dVd = (dVdseff_dVd - T9 * dEsatL_dVd) / EsatL; + dfgche2_dVb = (dVdseff_dVb - T9 * dEsatL_dVb) / EsatL; + + gche = beta * fgche1 / fgche2; + dgche_dVg = (beta * dfgche1_dVg + fgche1 * dbeta_dVg + - gche * dfgche2_dVg) / fgche2; + dgche_dVd = (beta * dfgche1_dVd + fgche1 * dbeta_dVd + - gche * dfgche2_dVd) / fgche2; + dgche_dVb = (beta * dfgche1_dVb + fgche1 * dbeta_dVb + - gche * dfgche2_dVb) / fgche2; + + T0 = 1.0 + gche * Rds; + Idl = gche / T0; + T1 = (1.0 - Idl * Rds) / T0; + T2 = Idl * Idl; + dIdl_dVg = T1 * dgche_dVg - T2 * dRds_dVg; + dIdl_dVd = T1 * dgche_dVd; + dIdl_dVb = T1 * dgche_dVb - T2 * dRds_dVb; + + /* Calculate degradation factor due to pocket implant */ + + if (pParam->BSIM4v3fprout <= 0.0) + { FP = 1.0; + dFP_dVg = 0.0; + } + else + { T9 = pParam->BSIM4v3fprout * sqrt(Leff) / Vgst2Vtm; + FP = 1.0 / (1.0 + T9); + dFP_dVg = FP * FP * T9 / Vgst2Vtm; + } + + /* Calculate VACLM */ + T8 = pParam->BSIM4v3pvag / EsatL; + T9 = T8 * Vgsteff; + if (T9 > -0.9) + { PvagTerm = 1.0 + T9; + dPvagTerm_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL); + dPvagTerm_dVb = -T9 * dEsatL_dVb / EsatL; + dPvagTerm_dVd = -T9 * dEsatL_dVd / EsatL; + } + else + { T4 = 1.0 / (17.0 + 20.0 * T9); + PvagTerm = (0.8 + T9) * T4; + T4 *= T4; + dPvagTerm_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL) * T4; + T9 *= T4 / EsatL; + dPvagTerm_dVb = -T9 * dEsatL_dVb; + dPvagTerm_dVd = -T9 * dEsatL_dVd; + } + + if ((pParam->BSIM4v3pclm > 0.0) && (diffVds > 1.0e-10)) + { T0 = 1.0 + Rds * Idl; + dT0_dVg = dRds_dVg * Idl + Rds * dIdl_dVg; + dT0_dVd = Rds * dIdl_dVd; + dT0_dVb = dRds_dVb * Idl + Rds * dIdl_dVb; + + T2 = Vdsat / Esat; + T1 = Leff + T2; + dT1_dVg = (dVdsat_dVg - T2 * dEsatL_dVg / Leff) / Esat; + dT1_dVd = (dVdsat_dVd - T2 * dEsatL_dVd / Leff) / Esat; + dT1_dVb = (dVdsat_dVb - T2 * dEsatL_dVb / Leff) / Esat; + + Cclm = FP * PvagTerm * T0 * T1 / (pParam->BSIM4v3pclm * pParam->BSIM4v3litl); + dCclm_dVg = Cclm * (dFP_dVg / FP + dPvagTerm_dVg / PvagTerm + + dT0_dVg / T0 + dT1_dVg / T1); + dCclm_dVb = Cclm * (dPvagTerm_dVb / PvagTerm + dT0_dVb / T0 + + dT1_dVb / T1); + dCclm_dVd = Cclm * (dPvagTerm_dVd / PvagTerm + dT0_dVd / T0 + + dT1_dVd / T1); + VACLM = Cclm * diffVds; + + dVACLM_dVg = dCclm_dVg * diffVds - dVdseff_dVg * Cclm; + dVACLM_dVb = dCclm_dVb * diffVds - dVdseff_dVb * Cclm; + dVACLM_dVd = dCclm_dVd * diffVds + (1.0 - dVdseff_dVd) * Cclm; + } + else + { VACLM = Cclm = MAX_EXP; + dVACLM_dVd = dVACLM_dVg = dVACLM_dVb = 0.0; + dCclm_dVd = dCclm_dVg = dCclm_dVb = 0.0; + } + + /* Calculate VADIBL */ + if (pParam->BSIM4v3thetaRout > 0.0) + { T8 = Abulk * Vdsat; + T0 = Vgst2Vtm * T8; + dT0_dVg = Vgst2Vtm * Abulk * dVdsat_dVg + T8 + + Vgst2Vtm * Vdsat * dAbulk_dVg; + dT0_dVb = Vgst2Vtm * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = Vgst2Vtm * Abulk * dVdsat_dVd; + + T1 = Vgst2Vtm + T8; + dT1_dVg = 1.0 + Abulk * dVdsat_dVg + Vdsat * dAbulk_dVg; + dT1_dVb = Abulk * dVdsat_dVb + dAbulk_dVb * Vdsat; + dT1_dVd = Abulk * dVdsat_dVd; + + T9 = T1 * T1; + T2 = pParam->BSIM4v3thetaRout; + VADIBL = (Vgst2Vtm - T0 / T1) / T2; + dVADIBL_dVg = (1.0 - dT0_dVg / T1 + T0 * dT1_dVg / T9) / T2; + dVADIBL_dVb = (-dT0_dVb / T1 + T0 * dT1_dVb / T9) / T2; + dVADIBL_dVd = (-dT0_dVd / T1 + T0 * dT1_dVd / T9) / T2; + + T7 = pParam->BSIM4v3pdiblb * Vbseff; + if (T7 >= -0.9) + { T3 = 1.0 / (1.0 + T7); + VADIBL *= T3; + dVADIBL_dVg *= T3; + dVADIBL_dVb = (dVADIBL_dVb - VADIBL * pParam->BSIM4v3pdiblb) + * T3; + dVADIBL_dVd *= T3; + } + else + { T4 = 1.0 / (0.8 + T7); + T3 = (17.0 + 20.0 * T7) * T4; + dVADIBL_dVg *= T3; + dVADIBL_dVb = dVADIBL_dVb * T3 + - VADIBL * pParam->BSIM4v3pdiblb * T4 * T4; + dVADIBL_dVd *= T3; + VADIBL *= T3; + } + + dVADIBL_dVg = dVADIBL_dVg * PvagTerm + VADIBL * dPvagTerm_dVg; + dVADIBL_dVb = dVADIBL_dVb * PvagTerm + VADIBL * dPvagTerm_dVb; + dVADIBL_dVd = dVADIBL_dVd * PvagTerm + VADIBL * dPvagTerm_dVd; + VADIBL *= PvagTerm; + } + else + { VADIBL = MAX_EXP; + dVADIBL_dVd = dVADIBL_dVg = dVADIBL_dVb = 0.0; + } + + /* Calculate Va */ + Va = Vasat + VACLM; + dVa_dVg = dVasat_dVg + dVACLM_dVg; + dVa_dVb = dVasat_dVb + dVACLM_dVb; + dVa_dVd = dVasat_dVd + dVACLM_dVd; + + /* Calculate VADITS */ + T0 = pParam->BSIM4v3pditsd * Vds; + if (T0 > EXP_THRESHOLD) + { T1 = MAX_EXP; + dT1_dVd = 0; + } + else + { T1 = exp(T0); + dT1_dVd = T1 * pParam->BSIM4v3pditsd; + } + + if (pParam->BSIM4v3pdits > 0.0) + { T2 = 1.0 + model->BSIM4v3pditsl * Leff; + VADITS = (1.0 + T2 * T1) / pParam->BSIM4v3pdits; + dVADITS_dVg = VADITS * dFP_dVg; + dVADITS_dVd = FP * T2 * dT1_dVd / pParam->BSIM4v3pdits; + VADITS *= FP; + } + else + { VADITS = MAX_EXP; + dVADITS_dVg = dVADITS_dVd = 0; + } + + /* Calculate VASCBE */ + if (pParam->BSIM4v3pscbe2 > 0.0) + { if (diffVds > pParam->BSIM4v3pscbe1 * pParam->BSIM4v3litl + / EXP_THRESHOLD) + { T0 = pParam->BSIM4v3pscbe1 * pParam->BSIM4v3litl / diffVds; + VASCBE = Leff * exp(T0) / pParam->BSIM4v3pscbe2; + T1 = T0 * VASCBE / diffVds; + dVASCBE_dVg = T1 * dVdseff_dVg; + dVASCBE_dVd = -T1 * (1.0 - dVdseff_dVd); + dVASCBE_dVb = T1 * dVdseff_dVb; + } + else + { VASCBE = MAX_EXP * Leff/pParam->BSIM4v3pscbe2; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + } + else + { VASCBE = MAX_EXP; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + + /* Add DIBL to Ids */ + T9 = diffVds / VADIBL; + T0 = 1.0 + T9; + Idsa = Idl * T0; + dIdsa_dVg = T0 * dIdl_dVg - Idl * (dVdseff_dVg + T9 * dVADIBL_dVg) / VADIBL; + dIdsa_dVd = T0 * dIdl_dVd + Idl + * (1.0 - dVdseff_dVd - T9 * dVADIBL_dVd) / VADIBL; + dIdsa_dVb = T0 * dIdl_dVb - Idl * (dVdseff_dVb + T9 * dVADIBL_dVb) / VADIBL; + + /* Add DITS to Ids */ + T9 = diffVds / VADITS; + T0 = 1.0 + T9; + dIdsa_dVg = T0 * dIdsa_dVg - Idsa * (dVdseff_dVg + T9 * dVADITS_dVg) / VADITS; + dIdsa_dVd = T0 * dIdsa_dVd + Idsa + * (1.0 - dVdseff_dVd - T9 * dVADITS_dVd) / VADITS; + dIdsa_dVb = T0 * dIdsa_dVb - Idsa * dVdseff_dVb / VADITS; + Idsa *= T0; + + /* Add CLM to Ids */ + T0 = log(Va / Vasat); + dT0_dVg = dVa_dVg / Va - dVasat_dVg / Vasat; + dT0_dVb = dVa_dVb / Va - dVasat_dVb / Vasat; + dT0_dVd = dVa_dVd / Va - dVasat_dVd / Vasat; + T1 = T0 / Cclm; + T9 = 1.0 + T1; + dT9_dVg = (dT0_dVg - T1 * dCclm_dVg) / Cclm; + dT9_dVb = (dT0_dVb - T1 * dCclm_dVb) / Cclm; + dT9_dVd = (dT0_dVd - T1 * dCclm_dVd) / Cclm; + + dIdsa_dVg = dIdsa_dVg * T9 + Idsa * dT9_dVg; + dIdsa_dVb = dIdsa_dVb * T9 + Idsa * dT9_dVb; + dIdsa_dVd = dIdsa_dVd * T9 + Idsa * dT9_dVd; + Idsa *= T9; + + /* Substrate current begins */ + tmp = pParam->BSIM4v3alpha0 + pParam->BSIM4v3alpha1 * Leff; + if ((tmp <= 0.0) || (pParam->BSIM4v3beta0 <= 0.0)) + { Isub = Gbd = Gbb = Gbg = 0.0; + } + else + { T2 = tmp / Leff; + if (diffVds > pParam->BSIM4v3beta0 / EXP_THRESHOLD) + { T0 = -pParam->BSIM4v3beta0 / diffVds; + T1 = T2 * diffVds * exp(T0); + T3 = T1 / diffVds * (T0 - 1.0); + dT1_dVg = T3 * dVdseff_dVg; + dT1_dVd = T3 * (dVdseff_dVd - 1.0); + dT1_dVb = T3 * dVdseff_dVb; + } + else + { T3 = T2 * MIN_EXP; + T1 = T3 * diffVds; + dT1_dVg = -T3 * dVdseff_dVg; + dT1_dVd = T3 * (1.0 - dVdseff_dVd); + dT1_dVb = -T3 * dVdseff_dVb; + } + T4 = Idsa * Vdseff; + Isub = T1 * T4; + Gbg = T1 * (dIdsa_dVg * Vdseff + Idsa * dVdseff_dVg) + + T4 * dT1_dVg; + Gbd = T1 * (dIdsa_dVd * Vdseff + Idsa * dVdseff_dVd) + + T4 * dT1_dVd; + Gbb = T1 * (dIdsa_dVb * Vdseff + Idsa * dVdseff_dVb) + + T4 * dT1_dVb; + + Gbd += Gbg * dVgsteff_dVd; + Gbb += Gbg * dVgsteff_dVb; + Gbg *= dVgsteff_dVg; + Gbb *= dVbseff_dVb; + } + here->BSIM4v3csub = Isub; + here->BSIM4v3gbbs = Gbb; + here->BSIM4v3gbgs = Gbg; + here->BSIM4v3gbds = Gbd; + + /* Add SCBE to Ids */ + T9 = diffVds / VASCBE; + T0 = 1.0 + T9; + Ids = Idsa * T0; + + Gm = T0 * dIdsa_dVg - Idsa + * (dVdseff_dVg + T9 * dVASCBE_dVg) / VASCBE; + Gds = T0 * dIdsa_dVd + Idsa + * (1.0 - dVdseff_dVd - T9 * dVASCBE_dVd) / VASCBE; + Gmb = T0 * dIdsa_dVb - Idsa + * (dVdseff_dVb + T9 * dVASCBE_dVb) / VASCBE; + + + tmp1 = Gds + Gm * dVgsteff_dVd; + tmp2 = Gmb + Gm * dVgsteff_dVb; + tmp3 = Gm; + + Gm = (Ids * dVdseff_dVg + Vdseff * tmp3) * dVgsteff_dVg; + Gds = Ids * (dVdseff_dVd + dVdseff_dVg * dVgsteff_dVd) + + Vdseff * tmp1; + Gmb = (Ids * (dVdseff_dVb + dVdseff_dVg * dVgsteff_dVb) + + Vdseff * tmp2) * dVbseff_dVb; + + cdrain = Ids * Vdseff; + + /* Source End Velocity Limit */ + if((model->BSIM4v3vtlGiven) && (model->BSIM4v3vtl > 0.0) ) { + T12 = 1.0 / Leff / CoxeffWovL; + T11 = T12 / Vgsteff; + T10 = -T11 / Vgsteff; + vs = cdrain * T11; /* vs */ + dvs_dVg = Gm * T11 + cdrain * T10 * dVgsteff_dVg; + dvs_dVd = Gds * T11 + cdrain * T10 * dVgsteff_dVd; + dvs_dVb = Gmb * T11 + cdrain * T10 * dVgsteff_dVb; + T0 = 2 * MM; + T1 = vs / (pParam->BSIM4v3vtl * pParam->BSIM4v3tfactor); + T2 = 1.0 + exp(T0 * log(T1)); + if(vs == 0.0) T3 = 0.0; + else T3 = (T2 - 1.0) * T0 / vs; + dT2_dVg = T3 * dvs_dVg; + dT2_dVd = T3 * dvs_dVd; + dT2_dVb = T3 * dvs_dVb; + Fsevl = 1.0 / exp(log(T2)/ T0); + T4 = -1.0 / T0 * Fsevl / T2; + dFsevl_dVg = T4 * dT2_dVg; + dFsevl_dVd = T4 * dT2_dVd; + dFsevl_dVb = T4 * dT2_dVb; + Gm *=Fsevl; + Gm += cdrain * dFsevl_dVg; + Gmb *=Fsevl; + Gmb += cdrain * dFsevl_dVb; + Gds *=Fsevl; + Gds += cdrain * dFsevl_dVd; + + cdrain *= Fsevl; + } + + here->BSIM4v3gds = Gds; + here->BSIM4v3gm = Gm; + here->BSIM4v3gmbs = Gmb; + here->BSIM4v3IdovVds = Ids; + + /* Calculate Rg */ + if ((here->BSIM4v3rgateMod > 1) || + (here->BSIM4v3trnqsMod != 0) || (here->BSIM4v3acnqsMod != 0)) + { T9 = pParam->BSIM4v3xrcrg2 * model->BSIM4v3vtm; + T0 = T9 * beta; + dT0_dVd = (dbeta_dVd + dbeta_dVg * dVgsteff_dVd) * T9; + dT0_dVb = (dbeta_dVb + dbeta_dVg * dVgsteff_dVb) * T9; + dT0_dVg = dbeta_dVg * T9; + + here->BSIM4v3gcrg = pParam->BSIM4v3xrcrg1 * ( T0 + Ids); + here->BSIM4v3gcrgd = pParam->BSIM4v3xrcrg1 * (dT0_dVd + tmp1); + here->BSIM4v3gcrgb = pParam->BSIM4v3xrcrg1 * (dT0_dVb + tmp2) + * dVbseff_dVb; + here->BSIM4v3gcrgg = pParam->BSIM4v3xrcrg1 * (dT0_dVg + tmp3) + * dVgsteff_dVg; + + if (here->BSIM4v3nf != 1.0) + { here->BSIM4v3gcrg *= here->BSIM4v3nf; + here->BSIM4v3gcrgg *= here->BSIM4v3nf; + here->BSIM4v3gcrgd *= here->BSIM4v3nf; + here->BSIM4v3gcrgb *= here->BSIM4v3nf; + } + + if (here->BSIM4v3rgateMod == 2) + { T10 = here->BSIM4v3grgeltd * here->BSIM4v3grgeltd; + T11 = here->BSIM4v3grgeltd + here->BSIM4v3gcrg; + here->BSIM4v3gcrg = here->BSIM4v3grgeltd * here->BSIM4v3gcrg / T11; + T12 = T10 / T11 / T11; + here->BSIM4v3gcrgg *= T12; + here->BSIM4v3gcrgd *= T12; + here->BSIM4v3gcrgb *= T12; + } + here->BSIM4v3gcrgs = -(here->BSIM4v3gcrgg + here->BSIM4v3gcrgd + + here->BSIM4v3gcrgb); + } + + + /* Calculate bias-dependent external S/D resistance */ + if (model->BSIM4v3rdsMod) + { /* Rs(V) */ + T0 = vgs - pParam->BSIM4v3vfbsd; + T1 = sqrt(T0 * T0 + 1.0e-4); + vgs_eff = 0.5 * (T0 + T1); + dvgs_eff_dvg = vgs_eff / T1; + + T0 = 1.0 + pParam->BSIM4v3prwg * vgs_eff; + dT0_dvg = -pParam->BSIM4v3prwg / T0 / T0 * dvgs_eff_dvg; + T1 = -pParam->BSIM4v3prwb * vbs; + dT1_dvb = -pParam->BSIM4v3prwb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); + dT3_dvg = T3 / (T3 - T2); + dT3_dvb = dT3_dvg * dT1_dvb; + dT3_dvg *= dT0_dvg; + + T4 = pParam->BSIM4v3rs0 * 0.5; + Rs = pParam->BSIM4v3rswmin + T3 * T4; + dRs_dvg = T4 * dT3_dvg; + dRs_dvb = T4 * dT3_dvb; + + T0 = 1.0 + here->BSIM4v3sourceConductance * Rs; + here->BSIM4v3gstot = here->BSIM4v3sourceConductance / T0; + T0 = -here->BSIM4v3gstot * here->BSIM4v3gstot; + dgstot_dvd = 0.0; /* place holder */ + dgstot_dvg = T0 * dRs_dvg; + dgstot_dvb = T0 * dRs_dvb; + dgstot_dvs = -(dgstot_dvg + dgstot_dvb + dgstot_dvd); + + /* Rd(V) */ + T0 = vgd - pParam->BSIM4v3vfbsd; + T1 = sqrt(T0 * T0 + 1.0e-4); + vgd_eff = 0.5 * (T0 + T1); + dvgd_eff_dvg = vgd_eff / T1; + + T0 = 1.0 + pParam->BSIM4v3prwg * vgd_eff; + dT0_dvg = -pParam->BSIM4v3prwg / T0 / T0 * dvgd_eff_dvg; + T1 = -pParam->BSIM4v3prwb * vbd; + dT1_dvb = -pParam->BSIM4v3prwb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); + dT3_dvg = T3 / (T3 - T2); + dT3_dvb = dT3_dvg * dT1_dvb; + dT3_dvg *= dT0_dvg; + + T4 = pParam->BSIM4v3rd0 * 0.5; + Rd = pParam->BSIM4v3rdwmin + T3 * T4; + dRd_dvg = T4 * dT3_dvg; + dRd_dvb = T4 * dT3_dvb; + + T0 = 1.0 + here->BSIM4v3drainConductance * Rd; + here->BSIM4v3gdtot = here->BSIM4v3drainConductance / T0; + T0 = -here->BSIM4v3gdtot * here->BSIM4v3gdtot; + dgdtot_dvs = 0.0; + dgdtot_dvg = T0 * dRd_dvg; + dgdtot_dvb = T0 * dRd_dvb; + dgdtot_dvd = -(dgdtot_dvg + dgdtot_dvb + dgdtot_dvs); + + here->BSIM4v3gstotd = vses * dgstot_dvd; + here->BSIM4v3gstotg = vses * dgstot_dvg; + here->BSIM4v3gstots = vses * dgstot_dvs; + here->BSIM4v3gstotb = vses * dgstot_dvb; + + T2 = vdes - vds; + here->BSIM4v3gdtotd = T2 * dgdtot_dvd; + here->BSIM4v3gdtotg = T2 * dgdtot_dvg; + here->BSIM4v3gdtots = T2 * dgdtot_dvs; + here->BSIM4v3gdtotb = T2 * dgdtot_dvb; + } + else /* WDLiu: for bypass */ + { here->BSIM4v3gstot = here->BSIM4v3gstotd = here->BSIM4v3gstotg = 0.0; + here->BSIM4v3gstots = here->BSIM4v3gstotb = 0.0; + here->BSIM4v3gdtot = here->BSIM4v3gdtotd = here->BSIM4v3gdtotg = 0.0; + here->BSIM4v3gdtots = here->BSIM4v3gdtotb = 0.0; + } + + /* Calculate GIDL current */ + vgs_eff = here->BSIM4v3vgs_eff; + dvgs_eff_dvg = here->BSIM4v3dvgs_eff_dvg; + T0 = 3.0 * model->BSIM4v3toxe; + + T1 = (vds - vgs_eff - pParam->BSIM4v3egidl ) / T0; + if ((pParam->BSIM4v3agidl <= 0.0) || (pParam->BSIM4v3bgidl <= 0.0) + || (T1 <= 0.0) || (pParam->BSIM4v3cgidl <= 0.0) || (vbd > 0.0)) + Igidl = Ggidld = Ggidlg = Ggidlb = 0.0; + else { + dT1_dVd = 1.0 / T0; + dT1_dVg = -dvgs_eff_dvg * dT1_dVd; + T2 = pParam->BSIM4v3bgidl / T1; + if (T2 < 100.0) + { Igidl = pParam->BSIM4v3agidl * pParam->BSIM4v3weffCJ * T1 * exp(-T2); + T3 = Igidl * (1.0 + T2) / T1; + Ggidld = T3 * dT1_dVd; + Ggidlg = T3 * dT1_dVg; + } + else + { Igidl = pParam->BSIM4v3agidl * pParam->BSIM4v3weffCJ * 3.720075976e-44; + Ggidld = Igidl * dT1_dVd; + Ggidlg = Igidl * dT1_dVg; + Igidl *= T1; + } + + T4 = vbd * vbd; + T5 = -vbd * T4; + T6 = pParam->BSIM4v3cgidl + T5; + T7 = T5 / T6; + T8 = 3.0 * pParam->BSIM4v3cgidl * T4 / T6 / T6; + Ggidld = Ggidld * T7 + Igidl * T8; + Ggidlg = Ggidlg * T7; + Ggidlb = -Igidl * T8; + Igidl *= T7; + } + here->BSIM4v3Igidl = Igidl; + here->BSIM4v3ggidld = Ggidld; + here->BSIM4v3ggidlg = Ggidlg; + here->BSIM4v3ggidlb = Ggidlb; + + /* Calculate GISL current */ + vgd_eff = here->BSIM4v3vgd_eff; + dvgd_eff_dvg = here->BSIM4v3dvgd_eff_dvg; + + T1 = (-vds - vgd_eff - pParam->BSIM4v3egidl ) / T0; + + if ((pParam->BSIM4v3agidl <= 0.0) || (pParam->BSIM4v3bgidl <= 0.0) + || (T1 <= 0.0) || (pParam->BSIM4v3cgidl <= 0.0) || (vbs > 0.0)) + Igisl = Ggisls = Ggislg = Ggislb = 0.0; + else { + dT1_dVd = 1.0 / T0; + dT1_dVg = -dvgd_eff_dvg * dT1_dVd; + T2 = pParam->BSIM4v3bgidl / T1; + if (T2 < 100.0) + { Igisl = pParam->BSIM4v3agidl * pParam->BSIM4v3weffCJ * T1 * exp(-T2); + T3 = Igisl * (1.0 + T2) / T1; + Ggisls = T3 * dT1_dVd; + Ggislg = T3 * dT1_dVg; + } + else + { Igisl = pParam->BSIM4v3agidl * pParam->BSIM4v3weffCJ * 3.720075976e-44; + Ggisls = Igisl * dT1_dVd; + Ggislg = Igisl * dT1_dVg; + Igisl *= T1; + } + + T4 = vbs * vbs; + T5 = -vbs * T4; + T6 = pParam->BSIM4v3cgidl + T5; + T7 = T5 / T6; + T8 = 3.0 * pParam->BSIM4v3cgidl * T4 / T6 / T6; + Ggisls = Ggisls * T7 + Igisl * T8; + Ggislg = Ggislg * T7; + Ggislb = -Igisl * T8; + Igisl *= T7; + } + here->BSIM4v3Igisl = Igisl; + here->BSIM4v3ggisls = Ggisls; + here->BSIM4v3ggislg = Ggislg; + here->BSIM4v3ggislb = Ggislb; + + + /* Calculate gate tunneling current */ + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { Vfb = pParam->BSIM4v3vfbzb; + V3 = Vfb - Vgs_eff + Vbseff - DELTA_3; + if (Vfb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1; /* WDLiu: -No surprise? No. -Good! */ + + Voxacc = Vfb - Vfbeff; + dVoxacc_dVg = -dVfbeff_dVg; + dVoxacc_dVb = -dVfbeff_dVb; + if (Voxacc < 0.0) /* WDLiu: Avoiding numerical instability. */ + Voxacc = dVoxacc_dVg = dVoxacc_dVb = 0.0; + + T0 = 0.5 * pParam->BSIM4v3k1ox; + T3 = Vgs_eff - Vfbeff - Vbseff - Vgsteff; + if (pParam->BSIM4v3k1ox == 0.0) + Voxdepinv = dVoxdepinv_dVg = dVoxdepinv_dVd + = dVoxdepinv_dVb = 0.0; + else if (T3 < 0.0) + { Voxdepinv = -T3; + dVoxdepinv_dVg = -dVgs_eff_dVg + dVfbeff_dVg + + dVgsteff_dVg; + dVoxdepinv_dVd = dVgsteff_dVd; + dVoxdepinv_dVb = dVfbeff_dVb + 1.0 + dVgsteff_dVb; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = T0 / T1; + Voxdepinv = pParam->BSIM4v3k1ox * (T1 - T0); + dVoxdepinv_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg + - dVgsteff_dVg); + dVoxdepinv_dVd = -T2 * dVgsteff_dVd; + dVoxdepinv_dVb = -T2 * (dVfbeff_dVb + 1.0 + dVgsteff_dVb); + } + + Voxdepinv += Vgsteff; + dVoxdepinv_dVg += dVgsteff_dVg; + dVoxdepinv_dVd += dVgsteff_dVd; + dVoxdepinv_dVb += dVgsteff_dVb; + } + + if (model->BSIM4v3igcMod) + { T0 = Vtm * pParam->BSIM4v3nigc; + VxNVt = (Vgs_eff - model->BSIM4v3type * pParam->BSIM4v3vth0) / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = Vgs_eff - model->BSIM4v3type * pParam->BSIM4v3vth0; + dVaux_dVg = dVgs_eff_dVg; + dVaux_dVd = 0.0; + dVaux_dVb = 0.0; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVd = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVg = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVd = 0.0; + dVaux_dVb = 0.0; + dVaux_dVg *= dVgs_eff_dVg; + } + + T2 = Vgs_eff * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + Vgs_eff * dVaux_dVg; + dT2_dVd = Vgs_eff * dVaux_dVd; + dT2_dVb = Vgs_eff * dVaux_dVb; + + T11 = pParam->BSIM4v3Aechvb; + T12 = pParam->BSIM4v3Bechvb; + T3 = pParam->BSIM4v3aigc * pParam->BSIM4v3cigc + - pParam->BSIM4v3bigc; + T4 = pParam->BSIM4v3bigc * pParam->BSIM4v3cigc; + T5 = T12 * (pParam->BSIM4v3aigc + T3 * Voxdepinv + - T4 * Voxdepinv * Voxdepinv); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxdepinv); + dT6_dVd = dT6_dVg * dVoxdepinv_dVd; + dT6_dVb = dT6_dVg * dVoxdepinv_dVb; + dT6_dVg *= dVoxdepinv_dVg; + } + + Igc = T11 * T2 * T6; + dIgc_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgc_dVd = T11 * (T2 * dT6_dVd + T6 * dT2_dVd); + dIgc_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + if (model->BSIM4v3pigcdGiven) + { Pigcd = pParam->BSIM4v3pigcd; + dPigcd_dVg = dPigcd_dVd = dPigcd_dVb = 0.0; + } + else + { T11 = pParam->BSIM4v3Bechvb * model->BSIM4v3toxe; + T12 = Vgsteff + 1.0e-20; + T13 = T11 / T12 / T12; + T14 = -T13 / T12; + Pigcd = T13 * (1.0 - 0.5 * Vdseff / T12); + dPigcd_dVg = T14 * (2.0 + 0.5 * (dVdseff_dVg + * Vgsteff - 3.0 * Vdseff) / T12); + dPigcd_dVd = 0.5 * T14 * dVdseff_dVd + + dPigcd_dVg * dVgsteff_dVd; + dPigcd_dVb = 0.5 * T14 * dVdseff_dVb + + dPigcd_dVg * dVgsteff_dVb; + dPigcd_dVg *= dVgsteff_dVg; + } + + T7 = -Pigcd * Vdseff; /* bugfix */ + dT7_dVg = -Vdseff * dPigcd_dVg - Pigcd * dVdseff_dVg; + dT7_dVd = -Vdseff * dPigcd_dVd - Pigcd * dVdseff_dVd + dT7_dVg * dVgsteff_dVd; + dT7_dVb = -Vdseff * dPigcd_dVb - Pigcd * dVdseff_dVb + dT7_dVg * dVgsteff_dVb; + dT7_dVg *= dVgsteff_dVg; + dT7_dVb *= dVbseff_dVb; + T8 = T7 * T7 + 2.0e-4; + dT8_dVg = 2.0 * T7; + dT8_dVd = dT8_dVg * dT7_dVd; + dT8_dVb = dT8_dVg * dT7_dVb; + dT8_dVg *= dT7_dVg; + + if (T7 > EXP_THRESHOLD) + { T9 = MAX_EXP; + dT9_dVg = dT9_dVd = dT9_dVb = 0.0; + } + else if (T7 < -EXP_THRESHOLD) + { T9 = MIN_EXP; + dT9_dVg = dT9_dVd = dT9_dVb = 0.0; + } + else + { T9 = exp(T7); + dT9_dVg = T9 * dT7_dVg; + dT9_dVd = T9 * dT7_dVd; + dT9_dVb = T9 * dT7_dVb; + } + + T0 = T8 * T8; + T1 = T9 - 1.0 + 1.0e-4; + T10 = (T1 - T7) / T8; + dT10_dVg = (dT9_dVg - dT7_dVg - T10 * dT8_dVg) / T8; + dT10_dVd = (dT9_dVd - dT7_dVd - T10 * dT8_dVd) / T8; + dT10_dVb = (dT9_dVb - dT7_dVb - T10 * dT8_dVb) / T8; + + Igcs = Igc * T10; + dIgcs_dVg = dIgc_dVg * T10 + Igc * dT10_dVg; + dIgcs_dVd = dIgc_dVd * T10 + Igc * dT10_dVd; + dIgcs_dVb = dIgc_dVb * T10 + Igc * dT10_dVb; + + T1 = T9 - 1.0 - 1.0e-4; + T10 = (T7 * T9 - T1) / T8; + dT10_dVg = (dT7_dVg * T9 + (T7 - 1.0) * dT9_dVg + - T10 * dT8_dVg) / T8; + dT10_dVd = (dT7_dVd * T9 + (T7 - 1.0) * dT9_dVd + - T10 * dT8_dVd) / T8; + dT10_dVb = (dT7_dVb * T9 + (T7 - 1.0) * dT9_dVb + - T10 * dT8_dVb) / T8; + Igcd = Igc * T10; + dIgcd_dVg = dIgc_dVg * T10 + Igc * dT10_dVg; + dIgcd_dVd = dIgc_dVd * T10 + Igc * dT10_dVd; + dIgcd_dVb = dIgc_dVb * T10 + Igc * dT10_dVb; + + here->BSIM4v3Igcs = Igcs; + here->BSIM4v3gIgcsg = dIgcs_dVg; + here->BSIM4v3gIgcsd = dIgcs_dVd; + here->BSIM4v3gIgcsb = dIgcs_dVb * dVbseff_dVb; + here->BSIM4v3Igcd = Igcd; + here->BSIM4v3gIgcdg = dIgcd_dVg; + here->BSIM4v3gIgcdd = dIgcd_dVd; + here->BSIM4v3gIgcdb = dIgcd_dVb * dVbseff_dVb; + + T0 = vgs - pParam->BSIM4v3vfbsd; + vgs_eff = sqrt(T0 * T0 + 1.0e-4); + dvgs_eff_dvg = T0 / vgs_eff; + + T2 = vgs * vgs_eff; + dT2_dVg = vgs * dvgs_eff_dvg + vgs_eff; + T11 = pParam->BSIM4v3AechvbEdge; + T12 = pParam->BSIM4v3BechvbEdge; + T3 = pParam->BSIM4v3aigsd * pParam->BSIM4v3cigsd + - pParam->BSIM4v3bigsd; + T4 = pParam->BSIM4v3bigsd * pParam->BSIM4v3cigsd; + T5 = T12 * (pParam->BSIM4v3aigsd + T3 * vgs_eff + - T4 * vgs_eff * vgs_eff); + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * vgs_eff) + * dvgs_eff_dvg; + } + Igs = T11 * T2 * T6; + dIgs_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgs_dVs = -dIgs_dVg; + + + T0 = vgd - pParam->BSIM4v3vfbsd; + vgd_eff = sqrt(T0 * T0 + 1.0e-4); + dvgd_eff_dvg = T0 / vgd_eff; + + T2 = vgd * vgd_eff; + dT2_dVg = vgd * dvgd_eff_dvg + vgd_eff; + T5 = T12 * (pParam->BSIM4v3aigsd + T3 * vgd_eff + - T4 * vgd_eff * vgd_eff); + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * vgd_eff) + * dvgd_eff_dvg; + } + Igd = T11 * T2 * T6; + dIgd_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgd_dVd = -dIgd_dVg; + + here->BSIM4v3Igs = Igs; + here->BSIM4v3gIgsg = dIgs_dVg; + here->BSIM4v3gIgss = dIgs_dVs; + here->BSIM4v3Igd = Igd; + here->BSIM4v3gIgdg = dIgd_dVg; + here->BSIM4v3gIgdd = dIgd_dVd; + } + else + { here->BSIM4v3Igcs = here->BSIM4v3gIgcsg = here->BSIM4v3gIgcsd + = here->BSIM4v3gIgcsb = 0.0; + here->BSIM4v3Igcd = here->BSIM4v3gIgcdg = here->BSIM4v3gIgcdd + = here->BSIM4v3gIgcdb = 0.0; + here->BSIM4v3Igs = here->BSIM4v3gIgsg = here->BSIM4v3gIgss = 0.0; + here->BSIM4v3Igd = here->BSIM4v3gIgdg = here->BSIM4v3gIgdd = 0.0; + } + + if (model->BSIM4v3igbMod) + { T0 = Vtm * pParam->BSIM4v3nigbacc; + T1 = -Vgs_eff + Vbseff + Vfb; + VxNVt = T1 / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = T1; + dVaux_dVg = -dVgs_eff_dVg; + dVaux_dVb = 1.0; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVb = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVg = -dVaux_dVb * dVgs_eff_dVg; + } + + T2 = (Vgs_eff - Vbseff) * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + (Vgs_eff - Vbseff) * dVaux_dVg; + dT2_dVb = -Vaux + (Vgs_eff - Vbseff) * dVaux_dVb; + + T11 = 4.97232e-7 * pParam->BSIM4v3weff + * pParam->BSIM4v3leff * pParam->BSIM4v3ToxRatio; + T12 = -7.45669e11 * model->BSIM4v3toxe; + T3 = pParam->BSIM4v3aigbacc * pParam->BSIM4v3cigbacc + - pParam->BSIM4v3bigbacc; + T4 = pParam->BSIM4v3bigbacc * pParam->BSIM4v3cigbacc; + T5 = T12 * (pParam->BSIM4v3aigbacc + T3 * Voxacc + - T4 * Voxacc * Voxacc); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxacc); + dT6_dVb = dT6_dVg * dVoxacc_dVb; + dT6_dVg *= dVoxacc_dVg; + } + + Igbacc = T11 * T2 * T6; + dIgbacc_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgbacc_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + + T0 = Vtm * pParam->BSIM4v3nigbinv; + T1 = Voxdepinv - pParam->BSIM4v3eigbinv; + VxNVt = T1 / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = T1; + dVaux_dVg = dVoxdepinv_dVg; + dVaux_dVd = dVoxdepinv_dVd; + dVaux_dVb = dVoxdepinv_dVb; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVd = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVg = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVd = dVaux_dVg * dVoxdepinv_dVd; + dVaux_dVb = dVaux_dVg * dVoxdepinv_dVb; + dVaux_dVg *= dVoxdepinv_dVg; + } + + T2 = (Vgs_eff - Vbseff) * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + (Vgs_eff - Vbseff) * dVaux_dVg; + dT2_dVd = (Vgs_eff - Vbseff) * dVaux_dVd; + dT2_dVb = -Vaux + (Vgs_eff - Vbseff) * dVaux_dVb; + + T11 *= 0.75610; + T12 *= 1.31724; + T3 = pParam->BSIM4v3aigbinv * pParam->BSIM4v3cigbinv + - pParam->BSIM4v3bigbinv; + T4 = pParam->BSIM4v3bigbinv * pParam->BSIM4v3cigbinv; + T5 = T12 * (pParam->BSIM4v3aigbinv + T3 * Voxdepinv + - T4 * Voxdepinv * Voxdepinv); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxdepinv); + dT6_dVd = dT6_dVg * dVoxdepinv_dVd; + dT6_dVb = dT6_dVg * dVoxdepinv_dVb; + dT6_dVg *= dVoxdepinv_dVg; + } + + Igbinv = T11 * T2 * T6; + dIgbinv_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgbinv_dVd = T11 * (T2 * dT6_dVd + T6 * dT2_dVd); + dIgbinv_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + here->BSIM4v3Igb = Igbinv + Igbacc; + here->BSIM4v3gIgbg = dIgbinv_dVg + dIgbacc_dVg; + here->BSIM4v3gIgbd = dIgbinv_dVd; + here->BSIM4v3gIgbb = (dIgbinv_dVb + dIgbacc_dVb) * dVbseff_dVb; + } + else + { here->BSIM4v3Igb = here->BSIM4v3gIgbg = here->BSIM4v3gIgbd + = here->BSIM4v3gIgbs = here->BSIM4v3gIgbb = 0.0; + } /* End of Gate current */ + + if (here->BSIM4v3nf != 1.0) + { cdrain *= here->BSIM4v3nf; + here->BSIM4v3gds *= here->BSIM4v3nf; + here->BSIM4v3gm *= here->BSIM4v3nf; + here->BSIM4v3gmbs *= here->BSIM4v3nf; + here->BSIM4v3IdovVds *= here->BSIM4v3nf; + + here->BSIM4v3gbbs *= here->BSIM4v3nf; + here->BSIM4v3gbgs *= here->BSIM4v3nf; + here->BSIM4v3gbds *= here->BSIM4v3nf; + here->BSIM4v3csub *= here->BSIM4v3nf; + + here->BSIM4v3Igidl *= here->BSIM4v3nf; + here->BSIM4v3ggidld *= here->BSIM4v3nf; + here->BSIM4v3ggidlg *= here->BSIM4v3nf; + here->BSIM4v3ggidlb *= here->BSIM4v3nf; + + here->BSIM4v3Igisl *= here->BSIM4v3nf; + here->BSIM4v3ggisls *= here->BSIM4v3nf; + here->BSIM4v3ggislg *= here->BSIM4v3nf; + here->BSIM4v3ggislb *= here->BSIM4v3nf; + + here->BSIM4v3Igcs *= here->BSIM4v3nf; + here->BSIM4v3gIgcsg *= here->BSIM4v3nf; + here->BSIM4v3gIgcsd *= here->BSIM4v3nf; + here->BSIM4v3gIgcsb *= here->BSIM4v3nf; + here->BSIM4v3Igcd *= here->BSIM4v3nf; + here->BSIM4v3gIgcdg *= here->BSIM4v3nf; + here->BSIM4v3gIgcdd *= here->BSIM4v3nf; + here->BSIM4v3gIgcdb *= here->BSIM4v3nf; + + here->BSIM4v3Igs *= here->BSIM4v3nf; + here->BSIM4v3gIgsg *= here->BSIM4v3nf; + here->BSIM4v3gIgss *= here->BSIM4v3nf; + here->BSIM4v3Igd *= here->BSIM4v3nf; + here->BSIM4v3gIgdg *= here->BSIM4v3nf; + here->BSIM4v3gIgdd *= here->BSIM4v3nf; + + here->BSIM4v3Igb *= here->BSIM4v3nf; + here->BSIM4v3gIgbg *= here->BSIM4v3nf; + here->BSIM4v3gIgbd *= here->BSIM4v3nf; + here->BSIM4v3gIgbb *= here->BSIM4v3nf; + } + + here->BSIM4v3ggidls = -(here->BSIM4v3ggidld + here->BSIM4v3ggidlg + + here->BSIM4v3ggidlb); + here->BSIM4v3ggisld = -(here->BSIM4v3ggisls + here->BSIM4v3ggislg + + here->BSIM4v3ggislb); + here->BSIM4v3gIgbs = -(here->BSIM4v3gIgbg + here->BSIM4v3gIgbd + + here->BSIM4v3gIgbb); + here->BSIM4v3gIgcss = -(here->BSIM4v3gIgcsg + here->BSIM4v3gIgcsd + + here->BSIM4v3gIgcsb); + here->BSIM4v3gIgcds = -(here->BSIM4v3gIgcdg + here->BSIM4v3gIgcdd + + here->BSIM4v3gIgcdb); + here->BSIM4v3cd = cdrain; + + + if (model->BSIM4v3tnoiMod == 0) + { Abulk = Abulk0 * pParam->BSIM4v3abulkCVfactor; + Vdsat = Vgsteff / Abulk; + T0 = Vdsat - Vds - DELTA_4; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * Vdsat); + if (T0 >= 0.0) + Vdseff = Vdsat - 0.5 * (T0 + T1); + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = Vdsat * T3 / (T1 - T0); + Vdseff = Vdsat * T4; + } + if (Vds == 0.0) + Vdseff = 0.0; + + T0 = Abulk * Vdseff; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.0e-20); + T2 = Vdseff / T1; + T3 = T0 * T2; + here->BSIM4v3qinv = Coxeff * pParam->BSIM4v3weffCV * here->BSIM4v3nf + * pParam->BSIM4v3leffCV + * (Vgsteff - 0.5 * T0 + Abulk * T3); + } + + /* + * BSIM4v3 C-V begins + */ + + if ((model->BSIM4v3xpart < 0) || (!ChargeComputationNeeded)) + { qgate = qdrn = qsrc = qbulk = 0.0; + here->BSIM4v3cggb = here->BSIM4v3cgsb = here->BSIM4v3cgdb = 0.0; + here->BSIM4v3cdgb = here->BSIM4v3cdsb = here->BSIM4v3cddb = 0.0; + here->BSIM4v3cbgb = here->BSIM4v3cbsb = here->BSIM4v3cbdb = 0.0; + here->BSIM4v3csgb = here->BSIM4v3cssb = here->BSIM4v3csdb = 0.0; + here->BSIM4v3cgbb = here->BSIM4v3csbb = here->BSIM4v3cdbb = here->BSIM4v3cbbb = 0.0; + here->BSIM4v3cqdb = here->BSIM4v3cqsb = here->BSIM4v3cqgb + = here->BSIM4v3cqbb = 0.0; + here->BSIM4v3gtau = 0.0; + goto finished; + } + else if (model->BSIM4v3capMod == 0) + { + if (Vbseff < 0.0) + { Vbseff = Vbs; + dVbseff_dVb = 1.0; + } + else + { Vbseff = pParam->BSIM4v3phi - Phis; + dVbseff_dVb = -dPhis_dVb; + } + + Vfb = pParam->BSIM4v3vfbcv; + Vth = Vfb + pParam->BSIM4v3phi + pParam->BSIM4v3k1ox * sqrtPhis; + Vgst = Vgs_eff - Vth; + dVth_dVb = pParam->BSIM4v3k1ox * dsqrtPhis_dVb; + dVgst_dVb = -dVth_dVb; + dVgst_dVg = dVgs_eff_dVg; + + CoxWL = model->BSIM4v3coxe * pParam->BSIM4v3weffCV + * pParam->BSIM4v3leffCV * here->BSIM4v3nf; + Arg1 = Vgs_eff - Vbseff - Vfb; + + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + qbulk = -qgate; + qdrn = 0.0; + + here->BSIM4v3cggb = CoxWL * dVgs_eff_dVg; + here->BSIM4v3cgdb = 0.0; + here->BSIM4v3cgsb = CoxWL * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM4v3cdgb = 0.0; + here->BSIM4v3cddb = 0.0; + here->BSIM4v3cdsb = 0.0; + + here->BSIM4v3cbgb = -CoxWL * dVgs_eff_dVg; + here->BSIM4v3cbdb = 0.0; + here->BSIM4v3cbsb = -here->BSIM4v3cgsb; + } /* Arg1 <= 0.0, end of accumulation */ + else if (Vgst <= 0.0) + { T1 = 0.5 * pParam->BSIM4v3k1ox; + T2 = sqrt(T1 * T1 + Arg1); + qgate = CoxWL * pParam->BSIM4v3k1ox * (T2 - T1); + qbulk = -qgate; + qdrn = 0.0; + + T0 = CoxWL * T1 / T2; + here->BSIM4v3cggb = T0 * dVgs_eff_dVg; + here->BSIM4v3cgdb = 0.0; + here->BSIM4v3cgsb = T0 * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM4v3cdgb = 0.0; + here->BSIM4v3cddb = 0.0; + here->BSIM4v3cdsb = 0.0; + + here->BSIM4v3cbgb = -here->BSIM4v3cggb; + here->BSIM4v3cbdb = 0.0; + here->BSIM4v3cbsb = -here->BSIM4v3cgsb; + } /* Vgst <= 0.0, end of depletion */ + else + { One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + + AbulkCV = Abulk0 * pParam->BSIM4v3abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v3abulkCVfactor * dAbulk0_dVb; + Vdsat = Vgst / AbulkCV; + dVdsat_dVg = dVgs_eff_dVg / AbulkCV; + dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; + + if (model->BSIM4v3xpart > 0.5) + { /* 0/100 Charge partition model */ + if (Vdsat <= Vds) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v3phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.0; + + here->BSIM4v3cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v3cgsb = -(here->BSIM4v3cggb + T2); + here->BSIM4v3cgdb = 0.0; + + here->BSIM4v3cdgb = 0.0; + here->BSIM4v3cddb = 0.0; + here->BSIM4v3cdsb = 0.0; + + here->BSIM4v3cbgb = -(here->BSIM4v3cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v3cbsb = -(here->BSIM4v3cbgb + T3); + here->BSIM4v3cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + T7 = 2.0 * Vds - T1 - 3.0 * T3; + T8 = T3 - T1 - 2.0 * Vds; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v3phi - 0.5 * (Vds - T3)); + T10 = T4 * T8; + qdrn = T4 * T7; + qbulk = -(qgate + qdrn + T10); + + T5 = T3 / T1; + here->BSIM4v3cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v3cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v3cgsb = -(here->BSIM4v3cggb + T11 + + here->BSIM4v3cgdb); + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + T7 = T9 * T7; + T8 = T9 * T8; + T9 = 2.0 * T4 * (1.0 - 3.0 * T5); + here->BSIM4v3cdgb = (T7 * dAlphaz_dVg - T9 + * dVdsat_dVg) * dVgs_eff_dVg; + T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb; + here->BSIM4v3cddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5); + here->BSIM4v3cdsb = -(here->BSIM4v3cdgb + T12 + + here->BSIM4v3cddb); + + T9 = 2.0 * T4 * (1.0 + T5); + T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb; + T12 = T4 * (2.0 * T2 + T5 - 1.0); + T0 = -(T10 + T11 + T12); + + here->BSIM4v3cbgb = -(here->BSIM4v3cggb + + here->BSIM4v3cdgb + T10); + here->BSIM4v3cbdb = -(here->BSIM4v3cgdb + + here->BSIM4v3cddb + T12); + here->BSIM4v3cbsb = -(here->BSIM4v3cgsb + + here->BSIM4v3cdsb + T0); + } + } + else if (model->BSIM4v3xpart < 0.5) + { /* 40/60 Charge partition model */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v3phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.4 * T2; + + here->BSIM4v3cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v3cgsb = -(here->BSIM4v3cggb + T2); + here->BSIM4v3cgdb = 0.0; + + T3 = 0.4 * Two_Third_CoxWL; + here->BSIM4v3cdgb = -T3 * dVgs_eff_dVg; + here->BSIM4v3cddb = 0.0; + T4 = T3 * dVth_dVb; + here->BSIM4v3cdsb = -(T4 + here->BSIM4v3cdgb); + + here->BSIM4v3cbgb = -(here->BSIM4v3cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v3cbsb = -(here->BSIM4v3cbgb + T3); + here->BSIM4v3cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM4v3phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM4v3cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v3cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v3cgsb = -(here->BSIM4v3cggb + + here->BSIM4v3cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds + + 1.2 * Vds * Vds; + T8 = T2 / T1; + T7 = Vds - T1 - T8 * T6; + qdrn = T4 * T7; + T7 *= T9; + tmp = T8 / T1; + tmp1 = T4 * (2.0 - 4.0 * tmp * T6 + + T8 * (16.0 * Vdsat - 6.0 * Vds)); + + here->BSIM4v3cdgb = (T7 * dAlphaz_dVg - tmp1 + * dVdsat_dVg) * dVgs_eff_dVg; + T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb; + here->BSIM4v3cddb = T4 * (2.0 - (1.0 / (3.0 * T1 + * T1) + 2.0 * tmp) * T6 + T8 + * (6.0 * Vdsat - 2.4 * Vds)); + here->BSIM4v3cdsb = -(here->BSIM4v3cdgb + + T10 + here->BSIM4v3cddb); + + T7 = 2.0 * (T1 + T3); + qbulk = -(qgate - T4 * T7); + T7 *= T9; + T0 = 4.0 * T4 * (1.0 - T5); + T12 = (-T7 * dAlphaz_dVg - here->BSIM4v3cdgb + - T0 * dVdsat_dVg) * dVgs_eff_dVg; + T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; + T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) + - here->BSIM4v3cddb; + tmp = -(T10 + T11 + T12); + + here->BSIM4v3cbgb = -(here->BSIM4v3cggb + + here->BSIM4v3cdgb + T12); + here->BSIM4v3cbdb = -(here->BSIM4v3cgdb + + here->BSIM4v3cddb + T10); + here->BSIM4v3cbsb = -(here->BSIM4v3cgsb + + here->BSIM4v3cdsb + tmp); + } + } + else + { /* 50/50 partitioning */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v3phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.5 * T2; + + here->BSIM4v3cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v3cgsb = -(here->BSIM4v3cggb + T2); + here->BSIM4v3cgdb = 0.0; + + here->BSIM4v3cdgb = -One_Third_CoxWL * dVgs_eff_dVg; + here->BSIM4v3cddb = 0.0; + T4 = One_Third_CoxWL * dVth_dVb; + here->BSIM4v3cdsb = -(T4 + here->BSIM4v3cdgb); + + here->BSIM4v3cbgb = -(here->BSIM4v3cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v3cbsb = -(here->BSIM4v3cbgb + T3); + here->BSIM4v3cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM4v3phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM4v3cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v3cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v3cgsb = -(here->BSIM4v3cggb + + here->BSIM4v3cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T7 = T1 + T3; + qdrn = -T4 * T7; + qbulk = - (qgate + qdrn + qdrn); + T7 *= T9; + T0 = T4 * (2.0 * T5 - 2.0); + + here->BSIM4v3cdgb = (T0 * dVdsat_dVg - T7 + * dAlphaz_dVg) * dVgs_eff_dVg; + T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; + here->BSIM4v3cddb = T4 * (1.0 - 2.0 * T2 - T5); + here->BSIM4v3cdsb = -(here->BSIM4v3cdgb + T12 + + here->BSIM4v3cddb); + + here->BSIM4v3cbgb = -(here->BSIM4v3cggb + + 2.0 * here->BSIM4v3cdgb); + here->BSIM4v3cbdb = -(here->BSIM4v3cgdb + + 2.0 * here->BSIM4v3cddb); + here->BSIM4v3cbsb = -(here->BSIM4v3cgsb + + 2.0 * here->BSIM4v3cdsb); + } /* end of linear region */ + } /* end of 50/50 partition */ + } /* end of inversion */ + } /* end of capMod=0 */ + else + { if (Vbseff < 0.0) + { VbseffCV = Vbseff; + dVbseffCV_dVb = 1.0; + } + else + { VbseffCV = pParam->BSIM4v3phi - Phis; + dVbseffCV_dVb = -dPhis_dVb; + } + + CoxWL = model->BSIM4v3coxe * pParam->BSIM4v3weffCV + * pParam->BSIM4v3leffCV * here->BSIM4v3nf; + + /* Seperate VgsteffCV with noff and voffcv */ + noff = n * pParam->BSIM4v3noff; + dnoff_dVd = pParam->BSIM4v3noff * dn_dVd; + dnoff_dVb = pParam->BSIM4v3noff * dn_dVb; + T0 = Vtm * noff; + voffcv = pParam->BSIM4v3voffcv; + VgstNVt = (Vgst - voffcv) / T0; + + if (VgstNVt > EXP_THRESHOLD) + { Vgsteff = Vgst - voffcv; + dVgsteff_dVg = dVgs_eff_dVg; + dVgsteff_dVd = -dVth_dVd; + dVgsteff_dVb = -dVth_dVb; + } + else if (VgstNVt < -EXP_THRESHOLD) + { Vgsteff = T0 * log(1.0 + MIN_EXP); + dVgsteff_dVg = 0.0; + dVgsteff_dVd = Vgsteff / noff; + dVgsteff_dVb = dVgsteff_dVd * dnoff_dVb; + dVgsteff_dVd *= dnoff_dVd; + } + else + { ExpVgst = exp(VgstNVt); + Vgsteff = T0 * log(1.0 + ExpVgst); + dVgsteff_dVg = ExpVgst / (1.0 + ExpVgst); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + (Vgst - voffcv) + / noff * dnoff_dVd) + Vgsteff / noff * dnoff_dVd; + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + (Vgst - voffcv) + / noff * dnoff_dVb) + Vgsteff / noff * dnoff_dVb; + dVgsteff_dVg *= dVgs_eff_dVg; + } /* End of VgsteffCV */ + + + if (model->BSIM4v3capMod == 1) + { Vfb = pParam->BSIM4v3vfbzb; + V3 = Vfb - Vgs_eff + VbseffCV - DELTA_3; + if (Vfb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + Qac0 = CoxWL * (Vfbeff - Vfb); + dQac0_dVg = CoxWL * dVfbeff_dVg; + dQac0_dVb = CoxWL * dVfbeff_dVb; + + T0 = 0.5 * pParam->BSIM4v3k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM4v3k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM4v3k1ox; + T2 = CoxWL; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWL * T0 / T1; + } + + Qsub0 = CoxWL * pParam->BSIM4v3k1ox * (T1 - T0); + + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg); + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + + dVgsteff_dVb); + + AbulkCV = Abulk0 * pParam->BSIM4v3abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v3abulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + + T0 = VdsatCV - Vds - DELTA_4; + dT0_dVg = 1.0 / AbulkCV; + dT0_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * VdsatCV); + dT1_dVg = (T0 + DELTA_4 + DELTA_4) / T1; + dT1_dVd = -T0 / T1; + dT1_dVb = dT1_dVg * dT0_dVb; + dT1_dVg *= dT0_dVg; + if (T0 >= 0.0) + { VdseffCV = VdsatCV - 0.5 * (T0 + T1); + dVdseffCV_dVg = 0.5 * (dT0_dVg - dT1_dVg); + dVdseffCV_dVd = 0.5 * (1.0 - dT1_dVd); + dVdseffCV_dVb = 0.5 * (dT0_dVb - dT1_dVb); + } + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = VdsatCV * T3 / (T1 - T0); + VdseffCV = VdsatCV * T4; + dVdseffCV_dVg = dT0_dVg * T4 + T5 * (dT1_dVg - dT0_dVg); + dVdseffCV_dVd = T5 * (dT1_dVd + 1.0); + dVdseffCV_dVb = dT0_dVb * (1.0 - T5) + T5 * dT1_dVb; + } + + if (Vds == 0.0) + { VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + + T0 = AbulkCV * VdseffCV; /* bugfix */ + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.0e-20); + T2 = T0 / T1; + T3 = T0 * T2; + + T4 = (1.0 - 12.0 * T2 * T2); + T7 = T2 * (2.0 + 6.0 * T2) - 0.5; + T5 = T7 * AbulkCV; + T6 = T7 * VdseffCV; + + qgate = CoxWL * (Vgsteff - 0.5 * T0 + T3); + Cgg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cgd1 = CoxWL * T5 * dVdseffCV_dVd + Cgg1 * dVgsteff_dVd; + Cgb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb; + Cgg1 *= dVgsteff_dVg; + + T7 = 1.0 - AbulkCV; + qbulk = CoxWL * T7 * (0.5 * VdseffCV - T3); + T4 = -T7 * (T4 - 1.0); + T5 = -T7 * T5; + T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); + Cbg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cbd1 = CoxWL * T5 * dVdseffCV_dVd + Cbg1 * dVgsteff_dVd; + Cbb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbg1 *= dVgsteff_dVg; + + if (model->BSIM4v3xpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + T7 = (4.0 * Vgsteff - T0) / (T1 * T1); + T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); + T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); + T6 = -(0.25 * VdseffCV - 12.0 * T0 * VdseffCV * T7); + Csg = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWL * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM4v3xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + T5 = (qsrc / T1 + T2 * T7) * AbulkCV; + T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); + Csg = (T4 + T5 * dVdseffCV_dVg); + Csd = T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + + qgate += Qac0 + Qsub0; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; + Cgd = dQsub0_dVd + Cgd1; + Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM4v3cggb = Cgg; + here->BSIM4v3cgsb = -(Cgg + Cgd + Cgb); + here->BSIM4v3cgdb = Cgd; + here->BSIM4v3cdgb = -(Cgg + Cbg + Csg); + here->BSIM4v3cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM4v3cddb = -(Cgd + Cbd + Csd); + here->BSIM4v3cbgb = Cbg; + here->BSIM4v3cbsb = -(Cbg + Cbd + Cbb); + here->BSIM4v3cbdb = Cbd; + } + + /* Charge-Thickness capMod (CTM) begins */ + else if (model->BSIM4v3capMod == 2) + { V3 = pParam->BSIM4v3vfbzb - Vgs_eff + VbseffCV - DELTA_3; + if (pParam->BSIM4v3vfbzb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * pParam->BSIM4v3vfbzb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * pParam->BSIM4v3vfbzb); + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = pParam->BSIM4v3vfbzb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + + Cox = model->BSIM4v3coxp; + Tox = 1.0e8 * model->BSIM4v3toxp; + T0 = (Vgs_eff - VbseffCV - pParam->BSIM4v3vfbzb) / Tox; + dT0_dVg = dVgs_eff_dVg / Tox; + dT0_dVb = -dVbseffCV_dVb / Tox; + + tmp = T0 * pParam->BSIM4v3acde; + if ((-EXP_THRESHOLD < tmp) && (tmp < EXP_THRESHOLD)) + { Tcen = pParam->BSIM4v3ldeb * exp(tmp); + dTcen_dVg = pParam->BSIM4v3acde * Tcen; + dTcen_dVb = dTcen_dVg * dT0_dVb; + dTcen_dVg *= dT0_dVg; + } + else if (tmp <= -EXP_THRESHOLD) + { Tcen = pParam->BSIM4v3ldeb * MIN_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + else + { Tcen = pParam->BSIM4v3ldeb * MAX_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + + LINK = 1.0e-3 * model->BSIM4v3toxp; + V3 = pParam->BSIM4v3ldeb - Tcen - LINK; + V4 = sqrt(V3 * V3 + 4.0 * LINK * pParam->BSIM4v3ldeb); + Tcen = pParam->BSIM4v3ldeb - 0.5 * (V3 + V4); + T1 = 0.5 * (1.0 + V3 / V4); + dTcen_dVg *= T1; + dTcen_dVb *= T1; + + Ccen = EPSSI / Tcen; + T2 = Cox / (Cox + Ccen); + Coxeff = T2 * Ccen; + T3 = -Ccen / Tcen; + dCoxeff_dVg = T2 * T2 * T3; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / model->BSIM4v3coxe; + + Qac0 = CoxWLcen * (Vfbeff - pParam->BSIM4v3vfbzb); + QovCox = Qac0 / Coxeff; + dQac0_dVg = CoxWLcen * dVfbeff_dVg + + QovCox * dCoxeff_dVg; + dQac0_dVb = CoxWLcen * dVfbeff_dVb + + QovCox * dCoxeff_dVb; + + T0 = 0.5 * pParam->BSIM4v3k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM4v3k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM4v3k1ox; + T2 = CoxWLcen; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWLcen * T0 / T1; + } + + Qsub0 = CoxWLcen * pParam->BSIM4v3k1ox * (T1 - T0); + QovCox = Qsub0 / Coxeff; + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg) + + QovCox * dCoxeff_dVg; + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + dVgsteff_dVb) + + QovCox * dCoxeff_dVb; + + /* Gate-bias dependent delta Phis begins */ + if (pParam->BSIM4v3k1ox <= 0.0) + { Denomi = 0.25 * pParam->BSIM4v3moin * Vtm; + T0 = 0.5 * pParam->BSIM4v3sqrtPhi; + } + else + { Denomi = pParam->BSIM4v3moin * Vtm + * pParam->BSIM4v3k1ox * pParam->BSIM4v3k1ox; + T0 = pParam->BSIM4v3k1ox * pParam->BSIM4v3sqrtPhi; + } + T1 = 2.0 * T0 + Vgsteff; + + DeltaPhi = Vtm * log(1.0 + T1 * Vgsteff / Denomi); + dDeltaPhi_dVg = 2.0 * Vtm * (T1 -T0) / (Denomi + T1 * Vgsteff); + /* End of delta Phis */ + + Tox += Tox; /* WDLiu: Tcen reevaluated below due to different Vgsteff */ + T0 = (Vgsteff + pParam->BSIM4v3vtfbphi2) / Tox; + tmp = exp(0.7 * log(T0)); + T1 = 1.0 + tmp; + T2 = 0.7 * tmp / (T0 * Tox); + Tcen = 1.9e-9 / T1; + dTcen_dVg = -Tcen * T2 / T1; + dTcen_dVd = dTcen_dVg * dVgsteff_dVd; + dTcen_dVb = dTcen_dVg * dVgsteff_dVb; + dTcen_dVg *= dVgsteff_dVg; + + Ccen = EPSSI / Tcen; + T0 = Cox / (Cox + Ccen); + Coxeff = T0 * Ccen; + T1 = -Ccen / Tcen; + dCoxeff_dVg = T0 * T0 * T1; + dCoxeff_dVd = dCoxeff_dVg * dTcen_dVd; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / model->BSIM4v3coxe; + + AbulkCV = Abulk0 * pParam->BSIM4v3abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v3abulkCVfactor * dAbulk0_dVb; + VdsatCV = (Vgsteff - DeltaPhi) / AbulkCV; + + T0 = VdsatCV - Vds - DELTA_4; + dT0_dVg = (1.0 - dDeltaPhi_dVg) / AbulkCV; + dT0_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * VdsatCV); + dT1_dVg = (T0 + DELTA_4 + DELTA_4) / T1; + dT1_dVd = -T0 / T1; + dT1_dVb = dT1_dVg * dT0_dVb; + dT1_dVg *= dT0_dVg; + if (T0 >= 0.0) + { VdseffCV = VdsatCV - 0.5 * (T0 + T1); + dVdseffCV_dVg = 0.5 * (dT0_dVg - dT1_dVg); + dVdseffCV_dVd = 0.5 * (1.0 - dT1_dVd); + dVdseffCV_dVb = 0.5 * (dT0_dVb - dT1_dVb); + } + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = VdsatCV * T3 / (T1 - T0); + VdseffCV = VdsatCV * T4; + dVdseffCV_dVg = dT0_dVg * T4 + T5 * (dT1_dVg - dT0_dVg); + dVdseffCV_dVd = T5 * (dT1_dVd + 1.0); + dVdseffCV_dVb = dT0_dVb * (1.0 - T5) + T5 * dT1_dVb; + } + + if (Vds == 0.0) + { VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + + T0 = AbulkCV * VdseffCV; + T1 = Vgsteff - DeltaPhi; + T2 = 12.0 * (T1 - 0.5 * T0 + 1.0e-20); + T3 = T0 / T2; + T4 = 1.0 - 12.0 * T3 * T3; + T5 = AbulkCV * (6.0 * T0 * (4.0 * T1 - T0) / (T2 * T2) - 0.5); + T6 = T5 * VdseffCV / AbulkCV; + + qgate = CoxWLcen * (T1 - T0 * (0.5 - T3)); + QovCox = qgate / Coxeff; + Cgg1 = CoxWLcen * (T4 * (1.0 - dDeltaPhi_dVg) + + T5 * dVdseffCV_dVg); + Cgd1 = CoxWLcen * T5 * dVdseffCV_dVd + Cgg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cgb1 = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cgg1 = Cgg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + + T7 = 1.0 - AbulkCV; + T8 = T2 * T2; + T9 = 12.0 * T7 * T0 * T0 / (T8 * AbulkCV); + T10 = T9 * (1.0 - dDeltaPhi_dVg); + T11 = -T7 * T5 / AbulkCV; + T12 = -(T9 * T1 / AbulkCV + VdseffCV * (0.5 - T0 / T2)); + + qbulk = CoxWLcen * T7 * (0.5 * VdseffCV - T0 * VdseffCV / T2); + QovCox = qbulk / Coxeff; + Cbg1 = CoxWLcen * (T10 + T11 * dVdseffCV_dVg); + Cbd1 = CoxWLcen * T11 * dVdseffCV_dVd + Cbg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cbb1 = CoxWLcen * (T11 * dVdseffCV_dVb + T12 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cbg1 = Cbg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + if (model->BSIM4v3xpart > 0.5) + { /* 0/100 partition */ + qsrc = -CoxWLcen * (T1 / 2.0 + T0 / 4.0 + - 0.5 * T0 * T0 / T2); + QovCox = qsrc / Coxeff; + T2 += T2; + T3 = T2 * T2; + T7 = -(0.25 - 12.0 * T0 * (4.0 * T1 - T0) / T3); + T4 = -(0.5 + 24.0 * T0 * T0 / T3) * (1.0 - dDeltaPhi_dVg); + T5 = T7 * AbulkCV; + T6 = T7 * VdseffCV; + + Csg = CoxWLcen * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWLcen * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd + + QovCox * dCoxeff_dVd; + Csb = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else if (model->BSIM4v3xpart < 0.5) + { /* 40/60 partition */ + T2 = T2 / 12.0; + T3 = 0.5 * CoxWLcen / (T2 * T2); + T4 = T1 * (2.0 * T0 * T0 / 3.0 + T1 * (T1 - 4.0 + * T0 / 3.0)) - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T3 * T4; + QovCox = qsrc / Coxeff; + T8 = 4.0 / 3.0 * T1 * (T1 - T0) + 0.4 * T0 * T0; + T5 = -2.0 * qsrc / T2 - T3 * (T1 * (3.0 * T1 - 8.0 + * T0 / 3.0) + 2.0 * T0 * T0 / 3.0); + T6 = AbulkCV * (qsrc / T2 + T3 * T8); + T7 = T6 * VdseffCV / AbulkCV; + + Csg = T5 * (1.0 - dDeltaPhi_dVg) + T6 * dVdseffCV_dVg; + Csd = Csg * dVgsteff_dVd + T6 * dVdseffCV_dVd + + QovCox * dCoxeff_dVd; + Csb = Csg * dVgsteff_dVb + T6 * dVdseffCV_dVb + + T7 * dAbulkCV_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else + { /* 50/50 partition */ + qsrc = -0.5 * qgate; + Csg = -0.5 * Cgg1; + Csd = -0.5 * Cgd1; + Csb = -0.5 * Cgb1; + } + + qgate += Qac0 + Qsub0 - qbulk; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgg = Cgg1 - Cbg; + Cgd = Cgd1 - Cbd; + Cgb = Cgb1 - Cbb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM4v3cggb = Cgg; + here->BSIM4v3cgsb = -(Cgg + Cgd + Cgb); + here->BSIM4v3cgdb = Cgd; + here->BSIM4v3cdgb = -(Cgg + Cbg + Csg); + here->BSIM4v3cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM4v3cddb = -(Cgd + Cbd + Csd); + here->BSIM4v3cbgb = Cbg; + here->BSIM4v3cbsb = -(Cbg + Cbd + Cbb); + here->BSIM4v3cbdb = Cbd; + } /* End of CTM */ + } + + here->BSIM4v3csgb = - here->BSIM4v3cggb - here->BSIM4v3cdgb - here->BSIM4v3cbgb; + here->BSIM4v3csdb = - here->BSIM4v3cgdb - here->BSIM4v3cddb - here->BSIM4v3cbdb; + here->BSIM4v3cssb = - here->BSIM4v3cgsb - here->BSIM4v3cdsb - here->BSIM4v3cbsb; + here->BSIM4v3cgbb = - here->BSIM4v3cgdb - here->BSIM4v3cggb - here->BSIM4v3cgsb; + here->BSIM4v3cdbb = - here->BSIM4v3cddb - here->BSIM4v3cdgb - here->BSIM4v3cdsb; + here->BSIM4v3cbbb = - here->BSIM4v3cbgb - here->BSIM4v3cbdb - here->BSIM4v3cbsb; + here->BSIM4v3csbb = - here->BSIM4v3cgbb - here->BSIM4v3cdbb - here->BSIM4v3cbbb; + here->BSIM4v3qgate = qgate; + here->BSIM4v3qbulk = qbulk; + here->BSIM4v3qdrn = qdrn; + here->BSIM4v3qsrc = -(qgate + qbulk + qdrn); + + /* NQS begins */ + if ((here->BSIM4v3trnqsMod) || (here->BSIM4v3acnqsMod)) + { here->BSIM4v3qchqs = qcheq = -(qbulk + qgate); + here->BSIM4v3cqgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb); + here->BSIM4v3cqdb = -(here->BSIM4v3cgdb + here->BSIM4v3cbdb); + here->BSIM4v3cqsb = -(here->BSIM4v3cgsb + here->BSIM4v3cbsb); + here->BSIM4v3cqbb = -(here->BSIM4v3cqgb + here->BSIM4v3cqdb + + here->BSIM4v3cqsb); + + CoxWL = model->BSIM4v3coxe * pParam->BSIM4v3weffCV * here->BSIM4v3nf + * pParam->BSIM4v3leffCV; + T1 = here->BSIM4v3gcrg / CoxWL; /* 1 / tau */ + here->BSIM4v3gtau = T1 * ScalingFactor; + + if (here->BSIM4v3acnqsMod) + here->BSIM4v3taunet = 1.0 / T1; + + *(ckt->CKTstate0 + here->BSIM4v3qcheq) = qcheq; + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM4v3qcheq) = + *(ckt->CKTstate0 + here->BSIM4v3qcheq); + if (here->BSIM4v3trnqsMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qcheq); + if (error) + return(error); + } + } + + +finished: + + /* Calculate junction C-V */ + if (ChargeComputationNeeded) + { czbd = model->BSIM4v3DunitAreaTempJctCap * here->BSIM4v3Adeff; /* bug fix */ + czbs = model->BSIM4v3SunitAreaTempJctCap * here->BSIM4v3Aseff; + czbdsw = model->BSIM4v3DunitLengthSidewallTempJctCap * here->BSIM4v3Pdeff; + czbdswg = model->BSIM4v3DunitLengthGateSidewallTempJctCap + * pParam->BSIM4v3weffCJ * here->BSIM4v3nf; + czbssw = model->BSIM4v3SunitLengthSidewallTempJctCap * here->BSIM4v3Pseff; + czbsswg = model->BSIM4v3SunitLengthGateSidewallTempJctCap + * pParam->BSIM4v3weffCJ * here->BSIM4v3nf; + + MJS = model->BSIM4v3SbulkJctBotGradingCoeff; + MJSWS = model->BSIM4v3SbulkJctSideGradingCoeff; + MJSWGS = model->BSIM4v3SbulkJctGateSideGradingCoeff; + + MJD = model->BSIM4v3DbulkJctBotGradingCoeff; + MJSWD = model->BSIM4v3DbulkJctSideGradingCoeff; + MJSWGD = model->BSIM4v3DbulkJctGateSideGradingCoeff; + + /* Source Bulk Junction */ + if (vbs_jct == 0.0) + { *(ckt->CKTstate0 + here->BSIM4v3qbs) = 0.0; + here->BSIM4v3capbs = czbs + czbssw + czbsswg; + } + else if (vbs_jct < 0.0) + { if (czbs > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v3PhiBS; + if (MJS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v3qbs) = model->BSIM4v3PhiBS * czbs + * (1.0 - arg * sarg) / (1.0 - MJS); + here->BSIM4v3capbs = czbs * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM4v3qbs) = 0.0; + here->BSIM4v3capbs = 0.0; + } + if (czbssw > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v3PhiBSWS; + if (MJSWS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v3qbs) += model->BSIM4v3PhiBSWS * czbssw + * (1.0 - arg * sarg) / (1.0 - MJSWS); + here->BSIM4v3capbs += czbssw * sarg; + } + if (czbsswg > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v3PhiBSWGS; + if (MJSWGS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWGS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v3qbs) += model->BSIM4v3PhiBSWGS * czbsswg + * (1.0 - arg * sarg) / (1.0 - MJSWGS); + here->BSIM4v3capbs += czbsswg * sarg; + } + + } + else + { T0 = czbs + czbssw + czbsswg; + T1 = vbs_jct * (czbs * MJS / model->BSIM4v3PhiBS + czbssw * MJSWS + / model->BSIM4v3PhiBSWS + czbsswg * MJSWGS / model->BSIM4v3PhiBSWGS); + *(ckt->CKTstate0 + here->BSIM4v3qbs) = vbs_jct * (T0 + 0.5 * T1); + here->BSIM4v3capbs = T0 + T1; + } + + /* Drain Bulk Junction */ + if (vbd_jct == 0.0) + { *(ckt->CKTstate0 + here->BSIM4v3qbd) = 0.0; + here->BSIM4v3capbd = czbd + czbdsw + czbdswg; + } + else if (vbd_jct < 0.0) + { if (czbd > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v3PhiBD; + if (MJD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v3qbd) = model->BSIM4v3PhiBD* czbd + * (1.0 - arg * sarg) / (1.0 - MJD); + here->BSIM4v3capbd = czbd * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM4v3qbd) = 0.0; + here->BSIM4v3capbd = 0.0; + } + if (czbdsw > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v3PhiBSWD; + if (MJSWD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v3qbd) += model->BSIM4v3PhiBSWD * czbdsw + * (1.0 - arg * sarg) / (1.0 - MJSWD); + here->BSIM4v3capbd += czbdsw * sarg; + } + if (czbdswg > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v3PhiBSWGD; + if (MJSWGD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWGD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v3qbd) += model->BSIM4v3PhiBSWGD * czbdswg + * (1.0 - arg * sarg) / (1.0 - MJSWGD); + here->BSIM4v3capbd += czbdswg * sarg; + } + } + else + { T0 = czbd + czbdsw + czbdswg; + T1 = vbd_jct * (czbd * MJD / model->BSIM4v3PhiBD + czbdsw * MJSWD + / model->BSIM4v3PhiBSWD + czbdswg * MJSWGD / model->BSIM4v3PhiBSWGD); + *(ckt->CKTstate0 + here->BSIM4v3qbd) = vbd_jct * (T0 + 0.5 * T1); + here->BSIM4v3capbd = T0 + T1; + } + } + + + /* + * check convergence + */ + + if ((here->BSIM4v3off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { if (Check == 1) + { ckt->CKTnoncon++; +#ifndef NEWCONV + } + else + { if (here->BSIM4v3mode >= 0) + { Idtot = here->BSIM4v3cd + here->BSIM4v3csub + + here->BSIM4v3Igidl - here->BSIM4v3cbd; + } + else + { Idtot = here->BSIM4v3cd + here->BSIM4v3cbd - here->BSIM4v3Igidl; /* bugfix */ + } + tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot)) + + ckt->CKTabstol; + tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot)) + + ckt->CKTabstol; + tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot)) + + ckt->CKTabstol; + tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot)) + + ckt->CKTabstol; + tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot)) + + ckt->CKTabstol; + tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot)) + + ckt->CKTabstol; + if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1) + || (fabs(cdedhat - Idedtot) >= tol2)) + { ckt->CKTnoncon++; + } + else if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4) + || (fabs(cgbhat - Igbtot) >= tol5)) + { ckt->CKTnoncon++; + } + else + { Ibtot = here->BSIM4v3cbs + here->BSIM4v3cbd + - here->BSIM4v3Igidl - here->BSIM4v3Igisl - here->BSIM4v3csub; + tol6 = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot)) + + ckt->CKTabstol; + if (fabs(cbhat - Ibtot) > tol6) + { ckt->CKTnoncon++; + } + } +#endif /* NEWCONV */ + } + } + *(ckt->CKTstate0 + here->BSIM4v3vds) = vds; + *(ckt->CKTstate0 + here->BSIM4v3vgs) = vgs; + *(ckt->CKTstate0 + here->BSIM4v3vbs) = vbs; + *(ckt->CKTstate0 + here->BSIM4v3vbd) = vbd; + *(ckt->CKTstate0 + here->BSIM4v3vges) = vges; + *(ckt->CKTstate0 + here->BSIM4v3vgms) = vgms; + *(ckt->CKTstate0 + here->BSIM4v3vdbs) = vdbs; + *(ckt->CKTstate0 + here->BSIM4v3vdbd) = vdbd; + *(ckt->CKTstate0 + here->BSIM4v3vsbs) = vsbs; + *(ckt->CKTstate0 + here->BSIM4v3vses) = vses; + *(ckt->CKTstate0 + here->BSIM4v3vdes) = vdes; + *(ckt->CKTstate0 + here->BSIM4v3qdef) = qdef; + + + if (!ChargeComputationNeeded) + goto line850; + + if (model->BSIM4v3capMod == 0) /* code merge -JX */ + { + cgdo = pParam->BSIM4v3cgdo; + qgdo = pParam->BSIM4v3cgdo * vgd; + cgso = pParam->BSIM4v3cgso; + qgso = pParam->BSIM4v3cgso * vgs; + } + else /* For both capMod == 1 and 2 */ + { T0 = vgd + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + + T3 = pParam->BSIM4v3weffCV * pParam->BSIM4v3cgdl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM4v3ckappad); + cgdo = pParam->BSIM4v3cgdo + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgdo = (pParam->BSIM4v3cgdo + T3) * vgd - T3 * (T2 + + 0.5 * pParam->BSIM4v3ckappad * (T4 - 1.0)); + + T0 = vgs + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + T3 = pParam->BSIM4v3weffCV * pParam->BSIM4v3cgsl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM4v3ckappas); + cgso = pParam->BSIM4v3cgso + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgso = (pParam->BSIM4v3cgso + T3) * vgs - T3 * (T2 + + 0.5 * pParam->BSIM4v3ckappas * (T4 - 1.0)); + } + + if (here->BSIM4v3nf != 1.0) + { cgdo *= here->BSIM4v3nf; + cgso *= here->BSIM4v3nf; + qgdo *= here->BSIM4v3nf; + qgso *= here->BSIM4v3nf; + } + here->BSIM4v3cgdo = cgdo; + here->BSIM4v3qgdo = qgdo; + here->BSIM4v3cgso = cgso; + here->BSIM4v3qgso = qgso; + + +line755: + ag0 = ckt->CKTag[0]; + if (here->BSIM4v3mode > 0) + { if (here->BSIM4v3trnqsMod == 0) + { qdrn -= qgdo; + if (here->BSIM4v3rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v3cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v3cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcggb = here->BSIM4v3cggb * ag0; + gcgdb = here->BSIM4v3cgdb * ag0; + gcgsb = here->BSIM4v3cgsb * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = here->BSIM4v3cdgb * ag0; + gcsgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb) * ag0; + gcbgb = here->BSIM4v3cbgb * ag0; + + qgmb = pParam->BSIM4v3cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qbulk -= qgmb; + qsrc = -(qgate + qgmid + qbulk + qdrn); + } + else + { gcggb = (here->BSIM4v3cggb + cgdo + cgso + + pParam->BSIM4v3cgbo ) * ag0; + gcgdb = (here->BSIM4v3cgdb - cgdo) * ag0; + gcgsb = (here->BSIM4v3cgsb - cgso) * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = (here->BSIM4v3cdgb - cgdo) * ag0; + gcsgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb + cgso) * ag0; + gcbgb = (here->BSIM4v3cbgb - pParam->BSIM4v3cgbo) * ag0; + + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v3cgbo * vgb; + qgate += qgdo + qgso + qgb; + qbulk -= qgb; + qsrc = -(qgate + qbulk + qdrn); + } + gcddb = (here->BSIM4v3cddb + here->BSIM4v3capbd + cgdo) * ag0; + gcdsb = here->BSIM4v3cdsb * ag0; + + gcsdb = -(here->BSIM4v3cgdb + here->BSIM4v3cbdb + + here->BSIM4v3cddb) * ag0; + gcssb = (here->BSIM4v3capbs + cgso - (here->BSIM4v3cgsb + + here->BSIM4v3cbsb + here->BSIM4v3cdsb)) * ag0; + + if (!here->BSIM4v3rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb); + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb); + gcbdb = (here->BSIM4v3cbdb - here->BSIM4v3capbd) * ag0; + gcbsb = (here->BSIM4v3cbsb - here->BSIM4v3capbs) * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = -(here->BSIM4v3cddb + here->BSIM4v3cdgb + + here->BSIM4v3cdsb) * ag0; + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb) + + here->BSIM4v3capbs * ag0; + gcbdb = here->BSIM4v3cbdb * ag0; + gcbsb = here->BSIM4v3cbsb * ag0; + + gcdbdb = -here->BSIM4v3capbd * ag0; + gcsbsb = -here->BSIM4v3capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { qcheq = here->BSIM4v3qchqs; + CoxWL = model->BSIM4v3coxe * pParam->BSIM4v3weffCV * here->BSIM4v3nf + * pParam->BSIM4v3leffCV; + T0 = qdef * ScalingFactor / CoxWL; + + ggtg = here->BSIM4v3gtg = T0 * here->BSIM4v3gcrgg; + ggtd = here->BSIM4v3gtd = T0 * here->BSIM4v3gcrgd; + ggts = here->BSIM4v3gts = T0 * here->BSIM4v3gcrgs; + ggtb = here->BSIM4v3gtb = T0 * here->BSIM4v3gcrgb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM4v3cqgb * ag0; + gcqdb = here->BSIM4v3cqdb * ag0; + gcqsb = here->BSIM4v3cqsb * ag0; + gcqbb = here->BSIM4v3cqbb * ag0; + + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v3xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM4v3xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = qdrn / qcheq; + Cdd = here->BSIM4v3cddb; + Csd = -(here->BSIM4v3cgdb + here->BSIM4v3cddb + + here->BSIM4v3cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM4v3cdgb; + Csg = -(here->BSIM4v3cggb + here->BSIM4v3cdgb + + here->BSIM4v3cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM4v3cdsb; + Css = -(here->BSIM4v3cgsb + here->BSIM4v3cdsb + + here->BSIM4v3cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + + if (here->BSIM4v3rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v3cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v3cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcdgb = gcsgb = gcbgb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + + qgmb = pParam->BSIM4v3cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qgate = 0.0; + qbulk = -qgmb; + qdrn = -qgdo; + qsrc = -(qgmid + qbulk + qdrn); + } + else + { gcggb = (cgdo + cgso + pParam->BSIM4v3cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + gcgbb = -pParam->BSIM4v3cgbo * ag0; + + gcdgb = gcgdb; + gcsgb = gcgsb; + gcbgb = gcgbb; + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v3cgbo * vgb; + qgate = qgdo + qgso + qgb; + qbulk = -qgb; + qdrn = -qgdo; + qsrc = -(qgate + qbulk + qdrn); + } + + gcddb = (here->BSIM4v3capbd + cgdo) * ag0; + gcdsb = gcsdb = 0.0; + gcssb = (here->BSIM4v3capbs + cgso) * ag0; + + if (!here->BSIM4v3rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdgmb); + gcsbb = -(gcsgb + gcssb + gcsgmb); + gcbdb = -here->BSIM4v3capbd * ag0; + gcbsb = -here->BSIM4v3capbs * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = gcsbb = gcbdb = gcbsb = 0.0; + gcdbdb = -here->BSIM4v3capbd * ag0; + gcsbsb = -here->BSIM4v3capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + } + } + else + { if (here->BSIM4v3trnqsMod == 0) + { qsrc = qdrn - qgso; + if (here->BSIM4v3rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v3cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v3cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcggb = here->BSIM4v3cggb * ag0; + gcgdb = here->BSIM4v3cgsb * ag0; + gcgsb = here->BSIM4v3cgdb * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb) * ag0; + gcsgb = here->BSIM4v3cdgb * ag0; + gcbgb = here->BSIM4v3cbgb * ag0; + + qgmb = pParam->BSIM4v3cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qbulk -= qgmb; + qdrn = -(qgate + qgmid + qbulk + qsrc); + } + else + { gcggb = (here->BSIM4v3cggb + cgdo + cgso + + pParam->BSIM4v3cgbo ) * ag0; + gcgdb = (here->BSIM4v3cgsb - cgdo) * ag0; + gcgsb = (here->BSIM4v3cgdb - cgso) * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb + cgdo) * ag0; + gcsgb = (here->BSIM4v3cdgb - cgso) * ag0; + gcbgb = (here->BSIM4v3cbgb - pParam->BSIM4v3cgbo) * ag0; + + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v3cgbo * vgb; + qgate += qgdo + qgso + qgb; + qbulk -= qgb; + qdrn = -(qgate + qbulk + qsrc); + } + gcddb = (here->BSIM4v3capbd + cgdo - (here->BSIM4v3cgsb + + here->BSIM4v3cbsb + here->BSIM4v3cdsb)) * ag0; + gcdsb = -(here->BSIM4v3cgdb + here->BSIM4v3cbdb + + here->BSIM4v3cddb) * ag0; + + gcsdb = here->BSIM4v3cdsb * ag0; + gcssb = (here->BSIM4v3cddb + here->BSIM4v3capbs + cgso) * ag0; + + if (!here->BSIM4v3rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb); + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb); + gcbdb = (here->BSIM4v3cbsb - here->BSIM4v3capbd) * ag0; + gcbsb = (here->BSIM4v3cbdb - here->BSIM4v3capbs) * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb) + + here->BSIM4v3capbd * ag0; + gcsbb = -(here->BSIM4v3cddb + here->BSIM4v3cdgb + + here->BSIM4v3cdsb) * ag0; + gcbdb = here->BSIM4v3cbsb * ag0; + gcbsb = here->BSIM4v3cbdb * ag0; + gcdbdb = -here->BSIM4v3capbd * ag0; + gcsbsb = -here->BSIM4v3capbs * ag0; + } + gcbbb = -(gcbgb + gcbdb + gcbsb + gcbgmb); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { qcheq = here->BSIM4v3qchqs; + CoxWL = model->BSIM4v3coxe * pParam->BSIM4v3weffCV * here->BSIM4v3nf + * pParam->BSIM4v3leffCV; + T0 = qdef * ScalingFactor / CoxWL; + ggtg = here->BSIM4v3gtg = T0 * here->BSIM4v3gcrgg; + ggts = here->BSIM4v3gtd = T0 * here->BSIM4v3gcrgs; + ggtd = here->BSIM4v3gts = T0 * here->BSIM4v3gcrgd; + ggtb = here->BSIM4v3gtb = T0 * here->BSIM4v3gcrgb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM4v3cqgb * ag0; + gcqdb = here->BSIM4v3cqsb * ag0; + gcqsb = here->BSIM4v3cqdb * ag0; + gcqbb = here->BSIM4v3cqbb * ag0; + + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v3xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM4v3xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = qdrn / qcheq; + Css = here->BSIM4v3cddb; + Cds = -(here->BSIM4v3cgdb + here->BSIM4v3cddb + + here->BSIM4v3cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM4v3cdgb; + Cdg = -(here->BSIM4v3cggb + here->BSIM4v3cdgb + + here->BSIM4v3cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM4v3cdsb; + Cdd = -(here->BSIM4v3cgsb + here->BSIM4v3cdsb + + here->BSIM4v3cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + + if (here->BSIM4v3rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v3cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v3cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcdgb = gcsgb = gcbgb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + + qgmb = pParam->BSIM4v3cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qgate = 0.0; + qbulk = -qgmb; + qdrn = -qgdo; + qsrc = -qgso; + } + else + { gcggb = (cgdo + cgso + pParam->BSIM4v3cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + gcgbb = -pParam->BSIM4v3cgbo * ag0; + + gcdgb = gcgdb; + gcsgb = gcgsb; + gcbgb = gcgbb; + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v3cgbo * vgb; + qgate = qgdo + qgso + qgb; + qbulk = -qgb; + qdrn = -qgdo; + qsrc = -qgso; + } + + gcddb = (here->BSIM4v3capbd + cgdo) * ag0; + gcdsb = gcsdb = 0.0; + gcssb = (here->BSIM4v3capbs + cgso) * ag0; + if (!here->BSIM4v3rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdgmb); + gcsbb = -(gcsgb + gcssb + gcsgmb); + gcbdb = -here->BSIM4v3capbd * ag0; + gcbsb = -here->BSIM4v3capbs * ag0; + gcdbdb = 0.0; + } + else + { gcdbb = gcsbb = gcbdb = gcbsb = 0.0; + gcdbdb = -here->BSIM4v3capbd * ag0; + gcsbsb = -here->BSIM4v3capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + } + } + + + if (here->BSIM4v3trnqsMod) + { *(ckt->CKTstate0 + here->BSIM4v3qcdump) = qdef * ScalingFactor; + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM4v3qcdump) = + *(ckt->CKTstate0 + here->BSIM4v3qcdump); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qcdump); + if (error) + return(error); + } + + if (ByPass) goto line860; + + *(ckt->CKTstate0 + here->BSIM4v3qg) = qgate; + *(ckt->CKTstate0 + here->BSIM4v3qd) = qdrn + - *(ckt->CKTstate0 + here->BSIM4v3qbd); + *(ckt->CKTstate0 + here->BSIM4v3qs) = qsrc + - *(ckt->CKTstate0 + here->BSIM4v3qbs); + if (here->BSIM4v3rgateMod == 3) + *(ckt->CKTstate0 + here->BSIM4v3qgmid) = qgmid; + + if (!here->BSIM4v3rbodyMod) + { *(ckt->CKTstate0 + here->BSIM4v3qb) = qbulk + + *(ckt->CKTstate0 + here->BSIM4v3qbd) + + *(ckt->CKTstate0 + here->BSIM4v3qbs); + } + else + *(ckt->CKTstate0 + here->BSIM4v3qb) = qbulk; + + + /* Store small signal parameters */ + if (ckt->CKTmode & MODEINITSMSIG) + { goto line1000; + } + + if (!ChargeComputationNeeded) + goto line850; + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM4v3qb) = + *(ckt->CKTstate0 + here->BSIM4v3qb); + *(ckt->CKTstate1 + here->BSIM4v3qg) = + *(ckt->CKTstate0 + here->BSIM4v3qg); + *(ckt->CKTstate1 + here->BSIM4v3qd) = + *(ckt->CKTstate0 + here->BSIM4v3qd); + if (here->BSIM4v3rgateMod == 3) + *(ckt->CKTstate1 + here->BSIM4v3qgmid) = + *(ckt->CKTstate0 + here->BSIM4v3qgmid); + if (here->BSIM4v3rbodyMod) + { *(ckt->CKTstate1 + here->BSIM4v3qbs) = + *(ckt->CKTstate0 + here->BSIM4v3qbs); + *(ckt->CKTstate1 + here->BSIM4v3qbd) = + *(ckt->CKTstate0 + here->BSIM4v3qbd); + } + } + + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qb); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qg); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qd); + if (error) + return(error); + + if (here->BSIM4v3rgateMod == 3) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qgmid); + if (error) return(error); + } + + if (here->BSIM4v3rbodyMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qbs); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v3qbd); + if (error) + return(error); + } + + goto line860; + + +line850: + /* Zero gcap and ceqcap if (!ChargeComputationNeeded) */ + ceqqg = ceqqb = ceqqd = 0.0; + ceqqjd = ceqqjs = 0.0; + cqcheq = cqdef = 0.0; + + gcdgb = gcddb = gcdsb = gcdbb = 0.0; + gcsgb = gcsdb = gcssb = gcsbb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + gcbdb = gcbgb = gcbsb = gcbbb = 0.0; + + gcgmgmb = gcgmdb = gcgmsb = gcgmbb = 0.0; + gcdgmb = gcsgmb = gcbgmb = ceqqgmid = 0.0; + gcdbdb = gcsbsb = 0.0; + + gqdef = gcqgb = gcqdb = gcqsb = gcqbb = 0.0; + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = (1.0 - (dxpart = (here->BSIM4v3mode > 0) ? 0.4 : 0.6)); + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + + if (here->BSIM4v3trnqsMod) + { CoxWL = model->BSIM4v3coxe * pParam->BSIM4v3weffCV * here->BSIM4v3nf + * pParam->BSIM4v3leffCV; + T1 = here->BSIM4v3gcrg / CoxWL; + here->BSIM4v3gtau = T1 * ScalingFactor; + } + else + here->BSIM4v3gtau = 0.0; + + goto line900; + + +line860: + /* Calculate equivalent charge current */ + + cqgate = *(ckt->CKTstate0 + here->BSIM4v3cqg); + cqbody = *(ckt->CKTstate0 + here->BSIM4v3cqb); + cqdrn = *(ckt->CKTstate0 + here->BSIM4v3cqd); + + ceqqg = cqgate - gcggb * vgb + gcgdb * vbd + gcgsb * vbs; + ceqqd = cqdrn - gcdgb * vgb - gcdgmb * vgmb + (gcddb + gcdbdb) + * vbd - gcdbdb * vbd_jct + gcdsb * vbs; + ceqqb = cqbody - gcbgb * vgb - gcbgmb * vgmb + + gcbdb * vbd + gcbsb * vbs; + + + if (here->BSIM4v3rgateMod == 3) + ceqqgmid = *(ckt->CKTstate0 + here->BSIM4v3cqgmid) + + gcgmdb * vbd + gcgmsb * vbs - gcgmgmb * vgmb; + else + ceqqgmid = 0.0; + + if (here->BSIM4v3rbodyMod) + { ceqqjs = *(ckt->CKTstate0 + here->BSIM4v3cqbs) + gcsbsb * vbs_jct; + ceqqjd = *(ckt->CKTstate0 + here->BSIM4v3cqbd) + gcdbdb * vbd_jct; + } + + if (here->BSIM4v3trnqsMod) + { T0 = ggtg * vgb - ggtd * vbd - ggts * vbs; + ceqqg += T0; + T1 = qdef * here->BSIM4v3gtau; + ceqqd -= dxpart * T0 + T1 * (ddxpart_dVg * vgb - ddxpart_dVd + * vbd - ddxpart_dVs * vbs); + cqdef = *(ckt->CKTstate0 + here->BSIM4v3cqcdump) - gqdef * qdef; + cqcheq = *(ckt->CKTstate0 + here->BSIM4v3cqcheq) + - (gcqgb * vgb - gcqdb * vbd - gcqsb * vbs) + T0; + } + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM4v3cqb) = + *(ckt->CKTstate0 + here->BSIM4v3cqb); + *(ckt->CKTstate1 + here->BSIM4v3cqg) = + *(ckt->CKTstate0 + here->BSIM4v3cqg); + *(ckt->CKTstate1 + here->BSIM4v3cqd) = + *(ckt->CKTstate0 + here->BSIM4v3cqd); + + if (here->BSIM4v3rgateMod == 3) + *(ckt->CKTstate1 + here->BSIM4v3cqgmid) = + *(ckt->CKTstate0 + here->BSIM4v3cqgmid); + + if (here->BSIM4v3rbodyMod) + { *(ckt->CKTstate1 + here->BSIM4v3cqbs) = + *(ckt->CKTstate0 + here->BSIM4v3cqbs); + *(ckt->CKTstate1 + here->BSIM4v3cqbd) = + *(ckt->CKTstate0 + here->BSIM4v3cqbd); + } + } + + + /* + * Load current vector + */ + +line900: + if (here->BSIM4v3mode >= 0) + { Gm = here->BSIM4v3gm; + Gmbs = here->BSIM4v3gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + ceqdrn = model->BSIM4v3type * (cdrain - here->BSIM4v3gds * vds + - Gm * vgs - Gmbs * vbs); + ceqbd = model->BSIM4v3type * (here->BSIM4v3csub + here->BSIM4v3Igidl + - (here->BSIM4v3gbds + here->BSIM4v3ggidld) * vds + - (here->BSIM4v3gbgs + here->BSIM4v3ggidlg) * vgs + - (here->BSIM4v3gbbs + here->BSIM4v3ggidlb) * vbs); + ceqbs = model->BSIM4v3type * (here->BSIM4v3Igisl + here->BSIM4v3ggisls * vds + - here->BSIM4v3ggislg * vgd - here->BSIM4v3ggislb * vbd); + + gbbdp = -(here->BSIM4v3gbds); + gbbsp = here->BSIM4v3gbds + here->BSIM4v3gbgs + here->BSIM4v3gbbs; + + gbdpg = here->BSIM4v3gbgs; + gbdpdp = here->BSIM4v3gbds; + gbdpb = here->BSIM4v3gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspg = 0.0; + gbspdp = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v3igcMod) + { gIstotg = here->BSIM4v3gIgsg + here->BSIM4v3gIgcsg; + gIstotd = here->BSIM4v3gIgcsd; + gIstots = here->BSIM4v3gIgss + here->BSIM4v3gIgcss; + gIstotb = here->BSIM4v3gIgcsb; + Istoteq = model->BSIM4v3type * (here->BSIM4v3Igs + here->BSIM4v3Igcs + - gIstotg * vgs - here->BSIM4v3gIgcsd * vds + - here->BSIM4v3gIgcsb * vbs); + + gIdtotg = here->BSIM4v3gIgdg + here->BSIM4v3gIgcdg; + gIdtotd = here->BSIM4v3gIgdd + here->BSIM4v3gIgcdd; + gIdtots = here->BSIM4v3gIgcds; + gIdtotb = here->BSIM4v3gIgcdb; + Idtoteq = model->BSIM4v3type * (here->BSIM4v3Igd + here->BSIM4v3Igcd + - here->BSIM4v3gIgdg * vgd - here->BSIM4v3gIgcdg * vgs + - here->BSIM4v3gIgcdd * vds - here->BSIM4v3gIgcdb * vbs); + } + else + { gIstotg = gIstotd = gIstots = gIstotb = Istoteq = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = Idtoteq = 0.0; + } + + if (model->BSIM4v3igbMod) + { gIbtotg = here->BSIM4v3gIgbg; + gIbtotd = here->BSIM4v3gIgbd; + gIbtots = here->BSIM4v3gIgbs; + gIbtotb = here->BSIM4v3gIgbb; + Ibtoteq = model->BSIM4v3type * (here->BSIM4v3Igb + - here->BSIM4v3gIgbg * vgs - here->BSIM4v3gIgbd * vds + - here->BSIM4v3gIgbb * vbs); + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = Ibtoteq = 0.0; + + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + Igtoteq = Istoteq + Idtoteq + Ibtoteq; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = Igtoteq = 0.0; + + + if (here->BSIM4v3rgateMod == 2) + T0 = vges - vgs; + else if (here->BSIM4v3rgateMod == 3) + T0 = vgms - vgs; + if (here->BSIM4v3rgateMod > 1) + { gcrgd = here->BSIM4v3gcrgd * T0; + gcrgg = here->BSIM4v3gcrgg * T0; + gcrgs = here->BSIM4v3gcrgs * T0; + gcrgb = here->BSIM4v3gcrgb * T0; + ceqgcrg = -(gcrgd * vds + gcrgg * vgs + + gcrgb * vbs); + gcrgg -= here->BSIM4v3gcrg; + gcrg = here->BSIM4v3gcrg; + } + else + ceqgcrg = gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + } + else + { Gm = -here->BSIM4v3gm; + Gmbs = -here->BSIM4v3gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + ceqdrn = -model->BSIM4v3type * (cdrain + here->BSIM4v3gds * vds + + Gm * vgd + Gmbs * vbd); + + ceqbs = model->BSIM4v3type * (here->BSIM4v3csub + here->BSIM4v3Igisl + + (here->BSIM4v3gbds + here->BSIM4v3ggisls) * vds + - (here->BSIM4v3gbgs + here->BSIM4v3ggislg) * vgd + - (here->BSIM4v3gbbs + here->BSIM4v3ggislb) * vbd); + ceqbd = model->BSIM4v3type * (here->BSIM4v3Igidl - here->BSIM4v3ggidld * vds + - here->BSIM4v3ggidlg * vgs - here->BSIM4v3ggidlb * vbs); + + gbbsp = -(here->BSIM4v3gbds); + gbbdp = here->BSIM4v3gbds + here->BSIM4v3gbgs + here->BSIM4v3gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v3gbgs; + gbspsp = here->BSIM4v3gbds; + gbspb = here->BSIM4v3gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v3igcMod) + { gIstotg = here->BSIM4v3gIgsg + here->BSIM4v3gIgcdg; + gIstotd = here->BSIM4v3gIgcds; + gIstots = here->BSIM4v3gIgss + here->BSIM4v3gIgcdd; + gIstotb = here->BSIM4v3gIgcdb; + Istoteq = model->BSIM4v3type * (here->BSIM4v3Igs + here->BSIM4v3Igcd + - here->BSIM4v3gIgsg * vgs - here->BSIM4v3gIgcdg * vgd + + here->BSIM4v3gIgcdd * vds - here->BSIM4v3gIgcdb * vbd); + + gIdtotg = here->BSIM4v3gIgdg + here->BSIM4v3gIgcsg; + gIdtotd = here->BSIM4v3gIgdd + here->BSIM4v3gIgcss; + gIdtots = here->BSIM4v3gIgcsd; + gIdtotb = here->BSIM4v3gIgcsb; + Idtoteq = model->BSIM4v3type * (here->BSIM4v3Igd + here->BSIM4v3Igcs + - (here->BSIM4v3gIgdg + here->BSIM4v3gIgcsg) * vgd + + here->BSIM4v3gIgcsd * vds - here->BSIM4v3gIgcsb * vbd); + } + else + { gIstotg = gIstotd = gIstots = gIstotb = Istoteq = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = Idtoteq = 0.0; + } + + if (model->BSIM4v3igbMod) + { gIbtotg = here->BSIM4v3gIgbg; + gIbtotd = here->BSIM4v3gIgbs; + gIbtots = here->BSIM4v3gIgbd; + gIbtotb = here->BSIM4v3gIgbb; + Ibtoteq = model->BSIM4v3type * (here->BSIM4v3Igb + - here->BSIM4v3gIgbg * vgd + here->BSIM4v3gIgbd * vds + - here->BSIM4v3gIgbb * vbd); + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = Ibtoteq = 0.0; + + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + Igtoteq = Istoteq + Idtoteq + Ibtoteq; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = Igtoteq = 0.0; + + + if (here->BSIM4v3rgateMod == 2) + T0 = vges - vgs; + else if (here->BSIM4v3rgateMod == 3) + T0 = vgms - vgs; + if (here->BSIM4v3rgateMod > 1) + { gcrgd = here->BSIM4v3gcrgs * T0; + gcrgg = here->BSIM4v3gcrgg * T0; + gcrgs = here->BSIM4v3gcrgd * T0; + gcrgb = here->BSIM4v3gcrgb * T0; + ceqgcrg = -(gcrgg * vgd - gcrgs * vds + + gcrgb * vbd); + gcrgg -= here->BSIM4v3gcrg; + gcrg = here->BSIM4v3gcrg; + } + else + ceqgcrg = gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + } + + if (model->BSIM4v3rdsMod == 1) + { ceqgstot = model->BSIM4v3type * (here->BSIM4v3gstotd * vds + + here->BSIM4v3gstotg * vgs + here->BSIM4v3gstotb * vbs); + /* WDLiu: ceqgstot flowing away from sNodePrime */ + gstot = here->BSIM4v3gstot; + gstotd = here->BSIM4v3gstotd; + gstotg = here->BSIM4v3gstotg; + gstots = here->BSIM4v3gstots - gstot; + gstotb = here->BSIM4v3gstotb; + + ceqgdtot = -model->BSIM4v3type * (here->BSIM4v3gdtotd * vds + + here->BSIM4v3gdtotg * vgs + here->BSIM4v3gdtotb * vbs); + /* WDLiu: ceqgdtot defined as flowing into dNodePrime */ + gdtot = here->BSIM4v3gdtot; + gdtotd = here->BSIM4v3gdtotd - gdtot; + gdtotg = here->BSIM4v3gdtotg; + gdtots = here->BSIM4v3gdtots; + gdtotb = here->BSIM4v3gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = ceqgstot = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = ceqgdtot = 0.0; + } + + if (model->BSIM4v3type > 0) + { ceqjs = (here->BSIM4v3cbs - here->BSIM4v3gbs * vbs_jct); + ceqjd = (here->BSIM4v3cbd - here->BSIM4v3gbd * vbd_jct); + } + else + { ceqjs = -(here->BSIM4v3cbs - here->BSIM4v3gbs * vbs_jct); + ceqjd = -(here->BSIM4v3cbd - here->BSIM4v3gbd * vbd_jct); + ceqqg = -ceqqg; + ceqqd = -ceqqd; + ceqqb = -ceqqb; + ceqgcrg = -ceqgcrg; + + if (here->BSIM4v3trnqsMod) + { cqdef = -cqdef; + cqcheq = -cqcheq; + } + + if (here->BSIM4v3rbodyMod) + { ceqqjs = -ceqqjs; + ceqqjd = -ceqqjd; + } + + if (here->BSIM4v3rgateMod == 3) + ceqqgmid = -ceqqgmid; + } + + + /* + * Loading RHS + */ + + + (*(ckt->CKTrhs + here->BSIM4v3dNodePrime) += (ceqjd - ceqbd + ceqgdtot + - ceqdrn - ceqqd + Idtoteq)); + (*(ckt->CKTrhs + here->BSIM4v3gNodePrime) -= ceqqg - ceqgcrg + Igtoteq); + + if (here->BSIM4v3rgateMod == 2) + (*(ckt->CKTrhs + here->BSIM4v3gNodeExt) -= ceqgcrg); + else if (here->BSIM4v3rgateMod == 3) + (*(ckt->CKTrhs + here->BSIM4v3gNodeMid) -= ceqqgmid + ceqgcrg); + + if (!here->BSIM4v3rbodyMod) + { (*(ckt->CKTrhs + here->BSIM4v3bNodePrime) += (ceqbd + ceqbs - ceqjd + - ceqjs - ceqqb + Ibtoteq)); + (*(ckt->CKTrhs + here->BSIM4v3sNodePrime) += (ceqdrn - ceqbs + ceqjs + + ceqqg + ceqqb + ceqqd + ceqqgmid - ceqgstot + Istoteq)); + } + else + { (*(ckt->CKTrhs + here->BSIM4v3dbNode) -= (ceqjd + ceqqjd)); + (*(ckt->CKTrhs + here->BSIM4v3bNodePrime) += (ceqbd + ceqbs - ceqqb + Ibtoteq)); + (*(ckt->CKTrhs + here->BSIM4v3sbNode) -= (ceqjs + ceqqjs)); + (*(ckt->CKTrhs + here->BSIM4v3sNodePrime) += (ceqdrn - ceqbs + ceqjs + ceqqd + + ceqqg + ceqqb + ceqqjd + ceqqjs + ceqqgmid - ceqgstot + Istoteq)); + } + + if (model->BSIM4v3rdsMod) + { (*(ckt->CKTrhs + here->BSIM4v3dNode) -= ceqgdtot); + (*(ckt->CKTrhs + here->BSIM4v3sNode) += ceqgstot); + } + + if (here->BSIM4v3trnqsMod) + *(ckt->CKTrhs + here->BSIM4v3qNode) += (cqcheq - cqdef); + + + /* + * Loading matrix + */ + + if (!here->BSIM4v3rbodyMod) + { gjbd = here->BSIM4v3gbd; + gjbs = here->BSIM4v3gbs; + } + else + gjbd = gjbs = 0.0; + + if (!model->BSIM4v3rdsMod) + { gdpr = here->BSIM4v3drainConductance; + gspr = here->BSIM4v3sourceConductance; + } + else + gdpr = gspr = 0.0; + + geltd = here->BSIM4v3grgeltd; + + T1 = qdef * here->BSIM4v3gtau; + + if (here->BSIM4v3rgateMod == 1) + { (*(here->BSIM4v3GEgePtr) += geltd); + (*(here->BSIM4v3GPgePtr) -= geltd); + (*(here->BSIM4v3GEgpPtr) -= geltd); + (*(here->BSIM4v3GPgpPtr) += gcggb + geltd - ggtg + gIgtotg); + (*(here->BSIM4v3GPdpPtr) += gcgdb - ggtd + gIgtotd); + (*(here->BSIM4v3GPspPtr) += gcgsb - ggts + gIgtots); + (*(here->BSIM4v3GPbpPtr) += gcgbb - ggtb + gIgtotb); + } /* WDLiu: gcrg already subtracted from all gcrgg below */ + else if (here->BSIM4v3rgateMod == 2) + { (*(here->BSIM4v3GEgePtr) += gcrg); + (*(here->BSIM4v3GEgpPtr) += gcrgg); + (*(here->BSIM4v3GEdpPtr) += gcrgd); + (*(here->BSIM4v3GEspPtr) += gcrgs); + (*(here->BSIM4v3GEbpPtr) += gcrgb); + + (*(here->BSIM4v3GPgePtr) -= gcrg); + (*(here->BSIM4v3GPgpPtr) += gcggb - gcrgg - ggtg + gIgtotg); + (*(here->BSIM4v3GPdpPtr) += gcgdb - gcrgd - ggtd + gIgtotd); + (*(here->BSIM4v3GPspPtr) += gcgsb - gcrgs - ggts + gIgtots); + (*(here->BSIM4v3GPbpPtr) += gcgbb - gcrgb - ggtb + gIgtotb); + } + else if (here->BSIM4v3rgateMod == 3) + { (*(here->BSIM4v3GEgePtr) += geltd); + (*(here->BSIM4v3GEgmPtr) -= geltd); + (*(here->BSIM4v3GMgePtr) -= geltd); + (*(here->BSIM4v3GMgmPtr) += geltd + gcrg + gcgmgmb); + + (*(here->BSIM4v3GMdpPtr) += gcrgd + gcgmdb); + (*(here->BSIM4v3GMgpPtr) += gcrgg); + (*(here->BSIM4v3GMspPtr) += gcrgs + gcgmsb); + (*(here->BSIM4v3GMbpPtr) += gcrgb + gcgmbb); + + (*(here->BSIM4v3DPgmPtr) += gcdgmb); + (*(here->BSIM4v3GPgmPtr) -= gcrg); + (*(here->BSIM4v3SPgmPtr) += gcsgmb); + (*(here->BSIM4v3BPgmPtr) += gcbgmb); + + (*(here->BSIM4v3GPgpPtr) += gcggb - gcrgg - ggtg + gIgtotg); + (*(here->BSIM4v3GPdpPtr) += gcgdb - gcrgd - ggtd + gIgtotd); + (*(here->BSIM4v3GPspPtr) += gcgsb - gcrgs - ggts + gIgtots); + (*(here->BSIM4v3GPbpPtr) += gcgbb - gcrgb - ggtb + gIgtotb); + } + else + { (*(here->BSIM4v3GPgpPtr) += gcggb - ggtg + gIgtotg); + (*(here->BSIM4v3GPdpPtr) += gcgdb - ggtd + gIgtotd); + (*(here->BSIM4v3GPspPtr) += gcgsb - ggts + gIgtots); + (*(here->BSIM4v3GPbpPtr) += gcgbb - ggtb + gIgtotb); + } + + if (model->BSIM4v3rdsMod) + { (*(here->BSIM4v3DgpPtr) += gdtotg); + (*(here->BSIM4v3DspPtr) += gdtots); + (*(here->BSIM4v3DbpPtr) += gdtotb); + (*(here->BSIM4v3SdpPtr) += gstotd); + (*(here->BSIM4v3SgpPtr) += gstotg); + (*(here->BSIM4v3SbpPtr) += gstotb); + } + + (*(here->BSIM4v3DPdpPtr) += gdpr + here->BSIM4v3gds + here->BSIM4v3gbd + T1 * ddxpart_dVd + - gdtotd + RevSum + gcddb + gbdpdp + dxpart * ggtd - gIdtotd); + (*(here->BSIM4v3DPdPtr) -= gdpr + gdtot); + (*(here->BSIM4v3DPgpPtr) += Gm + gcdgb - gdtotg + gbdpg - gIdtotg + + dxpart * ggtg + T1 * ddxpart_dVg); + (*(here->BSIM4v3DPspPtr) -= here->BSIM4v3gds + gdtots - dxpart * ggts + gIdtots + - T1 * ddxpart_dVs + FwdSum - gcdsb - gbdpsp); + (*(here->BSIM4v3DPbpPtr) -= gjbd + gdtotb - Gmbs - gcdbb - gbdpb + gIdtotb + - T1 * ddxpart_dVb - dxpart * ggtb); + + (*(here->BSIM4v3DdpPtr) -= gdpr - gdtotd); + (*(here->BSIM4v3DdPtr) += gdpr + gdtot); + + (*(here->BSIM4v3SPdpPtr) -= here->BSIM4v3gds + gstotd + RevSum - gcsdb - gbspdp + - T1 * dsxpart_dVd - sxpart * ggtd + gIstotd); + (*(here->BSIM4v3SPgpPtr) += gcsgb - Gm - gstotg + gbspg + sxpart * ggtg + + T1 * dsxpart_dVg - gIstotg); + (*(here->BSIM4v3SPspPtr) += gspr + here->BSIM4v3gds + here->BSIM4v3gbs + T1 * dsxpart_dVs + - gstots + FwdSum + gcssb + gbspsp + sxpart * ggts - gIstots); + (*(here->BSIM4v3SPsPtr) -= gspr + gstot); + (*(here->BSIM4v3SPbpPtr) -= gjbs + gstotb + Gmbs - gcsbb - gbspb - sxpart * ggtb + - T1 * dsxpart_dVb + gIstotb); + + (*(here->BSIM4v3SspPtr) -= gspr - gstots); + (*(here->BSIM4v3SsPtr) += gspr + gstot); + + (*(here->BSIM4v3BPdpPtr) += gcbdb - gjbd + gbbdp - gIbtotd); + (*(here->BSIM4v3BPgpPtr) += gcbgb - here->BSIM4v3gbgs - gIbtotg); + (*(here->BSIM4v3BPspPtr) += gcbsb - gjbs + gbbsp - gIbtots); + (*(here->BSIM4v3BPbpPtr) += gjbd + gjbs + gcbbb - here->BSIM4v3gbbs + - gIbtotb); + + ggidld = here->BSIM4v3ggidld; + ggidlg = here->BSIM4v3ggidlg; + ggidlb = here->BSIM4v3ggidlb; + ggislg = here->BSIM4v3ggislg; + ggisls = here->BSIM4v3ggisls; + ggislb = here->BSIM4v3ggislb; + + /* stamp gidl */ + (*(here->BSIM4v3DPdpPtr) += ggidld); + (*(here->BSIM4v3DPgpPtr) += ggidlg); + (*(here->BSIM4v3DPspPtr) -= (ggidlg + ggidld + ggidlb)); + (*(here->BSIM4v3DPbpPtr) += ggidlb); + (*(here->BSIM4v3BPdpPtr) -= ggidld); + (*(here->BSIM4v3BPgpPtr) -= ggidlg); + (*(here->BSIM4v3BPspPtr) += (ggidlg + ggidld + ggidlb)); + (*(here->BSIM4v3BPbpPtr) -= ggidlb); + /* stamp gisl */ + (*(here->BSIM4v3SPdpPtr) -= (ggisls + ggislg + ggislb)); + (*(here->BSIM4v3SPgpPtr) += ggislg); + (*(here->BSIM4v3SPspPtr) += ggisls); + (*(here->BSIM4v3SPbpPtr) += ggislb); + (*(here->BSIM4v3BPdpPtr) += (ggislg + ggisls + ggislb)); + (*(here->BSIM4v3BPgpPtr) -= ggislg); + (*(here->BSIM4v3BPspPtr) -= ggisls); + (*(here->BSIM4v3BPbpPtr) -= ggislb); + + + if (here->BSIM4v3rbodyMod) + { (*(here->BSIM4v3DPdbPtr) += gcdbdb - here->BSIM4v3gbd); + (*(here->BSIM4v3SPsbPtr) -= here->BSIM4v3gbs - gcsbsb); + + (*(here->BSIM4v3DBdpPtr) += gcdbdb - here->BSIM4v3gbd); + (*(here->BSIM4v3DBdbPtr) += here->BSIM4v3gbd - gcdbdb + + here->BSIM4v3grbpd + here->BSIM4v3grbdb); + (*(here->BSIM4v3DBbpPtr) -= here->BSIM4v3grbpd); + (*(here->BSIM4v3DBbPtr) -= here->BSIM4v3grbdb); + + (*(here->BSIM4v3BPdbPtr) -= here->BSIM4v3grbpd); + (*(here->BSIM4v3BPbPtr) -= here->BSIM4v3grbpb); + (*(here->BSIM4v3BPsbPtr) -= here->BSIM4v3grbps); + (*(here->BSIM4v3BPbpPtr) += here->BSIM4v3grbpd + here->BSIM4v3grbps + + here->BSIM4v3grbpb); + /* WDLiu: (gcbbb - here->BSIM4v3gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v3SBspPtr) += gcsbsb - here->BSIM4v3gbs); + (*(here->BSIM4v3SBbpPtr) -= here->BSIM4v3grbps); + (*(here->BSIM4v3SBbPtr) -= here->BSIM4v3grbsb); + (*(here->BSIM4v3SBsbPtr) += here->BSIM4v3gbs - gcsbsb + + here->BSIM4v3grbps + here->BSIM4v3grbsb); + + (*(here->BSIM4v3BdbPtr) -= here->BSIM4v3grbdb); + (*(here->BSIM4v3BbpPtr) -= here->BSIM4v3grbpb); + (*(here->BSIM4v3BsbPtr) -= here->BSIM4v3grbsb); + (*(here->BSIM4v3BbPtr) += here->BSIM4v3grbsb + here->BSIM4v3grbdb + + here->BSIM4v3grbpb); + } + + if (here->BSIM4v3trnqsMod) + { (*(here->BSIM4v3QqPtr) += gqdef + here->BSIM4v3gtau); + (*(here->BSIM4v3QgpPtr) += ggtg - gcqgb); + (*(here->BSIM4v3QdpPtr) += ggtd - gcqdb); + (*(here->BSIM4v3QspPtr) += ggts - gcqsb); + (*(here->BSIM4v3QbpPtr) += ggtb - gcqbb); + + (*(here->BSIM4v3DPqPtr) += dxpart * here->BSIM4v3gtau); + (*(here->BSIM4v3SPqPtr) += sxpart * here->BSIM4v3gtau); + (*(here->BSIM4v3GPqPtr) -= here->BSIM4v3gtau); + } + +line1000: ; + + } /* End of MOSFET Instance */ +} /* End of Model Instance */ + +return(OK); +} + +/* function to compute poly depletion effect */ +int BSIM4v3polyDepletion( + double phi, + double ngate, + double coxe, + double Vgs, + double *Vgs_eff, + double *dVgs_eff_dVg) +{ + double T1, T2, T3, T4, T5, T6, T7, T8; + + /* Poly Gate Si Depletion Effect */ + if ((ngate > 1.0e18) && + (ngate < 1.0e25) && (Vgs > phi)) { + T1 = 1.0e6 * CHARGE * EPSSI * ngate / (coxe * coxe); + T8 = Vgs - phi; + T4 = sqrt(1.0 + 2.0 * T8 / T1); + T2 = 2.0 * T8 / (T4 + 1.0); + T3 = 0.5 * T2 * T2 / T1; /* T3 = Vpoly */ + T7 = 1.12 - T3 - 0.05; + T6 = sqrt(T7 * T7 + 0.224); + T5 = 1.12 - 0.5 * (T7 + T6); + *Vgs_eff = Vgs - T5; + *dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); + } + else { + *Vgs_eff = Vgs; + *dVgs_eff_dVg = 1.0; + } + return(0); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3mask.c b/src/spicelib/devices/bsim4v3/b4v3mask.c new file mode 100644 index 000000000..bb6bd4c0f --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3mask.c @@ -0,0 +1,1967 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3mask.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + + +#include "ngspice.h" +#include +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim4v3def.h" +#include "sperror.h" + +int +BSIM4v3mAsk(ckt,inst,which,value) +CKTcircuit *ckt; +GENmodel *inst; +int which; +IFvalue *value; +{ + BSIM4v3model *model = (BSIM4v3model *)inst; + switch(which) + { case BSIM4v3_MOD_MOBMOD : + value->iValue = model->BSIM4v3mobMod; + return(OK); + case BSIM4v3_MOD_PARAMCHK : + value->iValue = model->BSIM4v3paramChk; + return(OK); + case BSIM4v3_MOD_BINUNIT : + value->iValue = model->BSIM4v3binUnit; + return(OK); + case BSIM4v3_MOD_CAPMOD : + value->iValue = model->BSIM4v3capMod; + return(OK); + case BSIM4v3_MOD_DIOMOD : + value->iValue = model->BSIM4v3dioMod; + return(OK); + case BSIM4v3_MOD_TRNQSMOD : + value->iValue = model->BSIM4v3trnqsMod; + return(OK); + case BSIM4v3_MOD_ACNQSMOD : + value->iValue = model->BSIM4v3acnqsMod; + return(OK); + case BSIM4v3_MOD_FNOIMOD : + value->iValue = model->BSIM4v3fnoiMod; + return(OK); + case BSIM4v3_MOD_TNOIMOD : + value->iValue = model->BSIM4v3tnoiMod; + return(OK); + case BSIM4v3_MOD_RDSMOD : + value->iValue = model->BSIM4v3rdsMod; + return(OK); + case BSIM4v3_MOD_RBODYMOD : + value->iValue = model->BSIM4v3rbodyMod; + return(OK); + case BSIM4v3_MOD_RGATEMOD : + value->iValue = model->BSIM4v3rgateMod; + return(OK); + case BSIM4v3_MOD_PERMOD : + value->iValue = model->BSIM4v3perMod; + return(OK); + case BSIM4v3_MOD_GEOMOD : + value->iValue = model->BSIM4v3geoMod; + return(OK); + case BSIM4v3_MOD_IGCMOD : + value->iValue = model->BSIM4v3igcMod; + return(OK); + case BSIM4v3_MOD_IGBMOD : + value->iValue = model->BSIM4v3igbMod; + return(OK); + case BSIM4v3_MOD_TEMPMOD : + value->iValue = model->BSIM4v3tempMod; + return(OK); + case BSIM4v3_MOD_VERSION : + value->sValue = model->BSIM4v3version; + return(OK); + case BSIM4v3_MOD_TOXREF : + value->rValue = model->BSIM4v3toxref; + return(OK); + case BSIM4v3_MOD_TOXE : + value->rValue = model->BSIM4v3toxe; + return(OK); + case BSIM4v3_MOD_TOXP : + value->rValue = model->BSIM4v3toxp; + return(OK); + case BSIM4v3_MOD_TOXM : + value->rValue = model->BSIM4v3toxm; + return(OK); + case BSIM4v3_MOD_DTOX : + value->rValue = model->BSIM4v3dtox; + return(OK); + case BSIM4v3_MOD_EPSROX : + value->rValue = model->BSIM4v3epsrox; + return(OK); + case BSIM4v3_MOD_CDSC : + value->rValue = model->BSIM4v3cdsc; + return(OK); + case BSIM4v3_MOD_CDSCB : + value->rValue = model->BSIM4v3cdscb; + return(OK); + + case BSIM4v3_MOD_CDSCD : + value->rValue = model->BSIM4v3cdscd; + return(OK); + + case BSIM4v3_MOD_CIT : + value->rValue = model->BSIM4v3cit; + return(OK); + case BSIM4v3_MOD_NFACTOR : + value->rValue = model->BSIM4v3nfactor; + return(OK); + case BSIM4v3_MOD_XJ: + value->rValue = model->BSIM4v3xj; + return(OK); + case BSIM4v3_MOD_VSAT: + value->rValue = model->BSIM4v3vsat; + return(OK); + case BSIM4v3_MOD_VTL: + value->rValue = model->BSIM4v3vtl; + return(OK); + case BSIM4v3_MOD_XN: + value->rValue = model->BSIM4v3xn; + return(OK); + case BSIM4v3_MOD_LC: + value->rValue = model->BSIM4v3lc; + return(OK); + case BSIM4v3_MOD_LAMBDA: + value->rValue = model->BSIM4v3lambda; + return(OK); + case BSIM4v3_MOD_AT: + value->rValue = model->BSIM4v3at; + return(OK); + case BSIM4v3_MOD_A0: + value->rValue = model->BSIM4v3a0; + return(OK); + + case BSIM4v3_MOD_AGS: + value->rValue = model->BSIM4v3ags; + return(OK); + + case BSIM4v3_MOD_A1: + value->rValue = model->BSIM4v3a1; + return(OK); + case BSIM4v3_MOD_A2: + value->rValue = model->BSIM4v3a2; + return(OK); + case BSIM4v3_MOD_KETA: + value->rValue = model->BSIM4v3keta; + return(OK); + case BSIM4v3_MOD_NSUB: + value->rValue = model->BSIM4v3nsub; + return(OK); + case BSIM4v3_MOD_NDEP: + value->rValue = model->BSIM4v3ndep; + return(OK); + case BSIM4v3_MOD_NSD: + value->rValue = model->BSIM4v3nsd; + return(OK); + case BSIM4v3_MOD_NGATE: + value->rValue = model->BSIM4v3ngate; + return(OK); + case BSIM4v3_MOD_GAMMA1: + value->rValue = model->BSIM4v3gamma1; + return(OK); + case BSIM4v3_MOD_GAMMA2: + value->rValue = model->BSIM4v3gamma2; + return(OK); + case BSIM4v3_MOD_VBX: + value->rValue = model->BSIM4v3vbx; + return(OK); + case BSIM4v3_MOD_VBM: + value->rValue = model->BSIM4v3vbm; + return(OK); + case BSIM4v3_MOD_XT: + value->rValue = model->BSIM4v3xt; + return(OK); + case BSIM4v3_MOD_K1: + value->rValue = model->BSIM4v3k1; + return(OK); + case BSIM4v3_MOD_KT1: + value->rValue = model->BSIM4v3kt1; + return(OK); + case BSIM4v3_MOD_KT1L: + value->rValue = model->BSIM4v3kt1l; + return(OK); + case BSIM4v3_MOD_KT2 : + value->rValue = model->BSIM4v3kt2; + return(OK); + case BSIM4v3_MOD_K2 : + value->rValue = model->BSIM4v3k2; + return(OK); + case BSIM4v3_MOD_K3: + value->rValue = model->BSIM4v3k3; + return(OK); + case BSIM4v3_MOD_K3B: + value->rValue = model->BSIM4v3k3b; + return(OK); + case BSIM4v3_MOD_W0: + value->rValue = model->BSIM4v3w0; + return(OK); + case BSIM4v3_MOD_LPE0: + value->rValue = model->BSIM4v3lpe0; + return(OK); + case BSIM4v3_MOD_LPEB: + value->rValue = model->BSIM4v3lpeb; + return(OK); + case BSIM4v3_MOD_DVTP0: + value->rValue = model->BSIM4v3dvtp0; + return(OK); + case BSIM4v3_MOD_DVTP1: + value->rValue = model->BSIM4v3dvtp1; + return(OK); + case BSIM4v3_MOD_DVT0 : + value->rValue = model->BSIM4v3dvt0; + return(OK); + case BSIM4v3_MOD_DVT1 : + value->rValue = model->BSIM4v3dvt1; + return(OK); + case BSIM4v3_MOD_DVT2 : + value->rValue = model->BSIM4v3dvt2; + return(OK); + case BSIM4v3_MOD_DVT0W : + value->rValue = model->BSIM4v3dvt0w; + return(OK); + case BSIM4v3_MOD_DVT1W : + value->rValue = model->BSIM4v3dvt1w; + return(OK); + case BSIM4v3_MOD_DVT2W : + value->rValue = model->BSIM4v3dvt2w; + return(OK); + case BSIM4v3_MOD_DROUT : + value->rValue = model->BSIM4v3drout; + return(OK); + case BSIM4v3_MOD_DSUB : + value->rValue = model->BSIM4v3dsub; + return(OK); + case BSIM4v3_MOD_VTH0: + value->rValue = model->BSIM4v3vth0; + return(OK); + case BSIM4v3_MOD_EU: + value->rValue = model->BSIM4v3eu; + return(OK); + case BSIM4v3_MOD_UA: + value->rValue = model->BSIM4v3ua; + return(OK); + case BSIM4v3_MOD_UA1: + value->rValue = model->BSIM4v3ua1; + return(OK); + case BSIM4v3_MOD_UB: + value->rValue = model->BSIM4v3ub; + return(OK); + case BSIM4v3_MOD_UB1: + value->rValue = model->BSIM4v3ub1; + return(OK); + case BSIM4v3_MOD_UC: + value->rValue = model->BSIM4v3uc; + return(OK); + case BSIM4v3_MOD_UC1: + value->rValue = model->BSIM4v3uc1; + return(OK); + case BSIM4v3_MOD_U0: + value->rValue = model->BSIM4v3u0; + return(OK); + case BSIM4v3_MOD_UTE: + value->rValue = model->BSIM4v3ute; + return(OK); + case BSIM4v3_MOD_VOFF: + value->rValue = model->BSIM4v3voff; + return(OK); + case BSIM4v3_MOD_VOFFL: + value->rValue = model->BSIM4v3voffl; + return(OK); + case BSIM4v3_MOD_MINV: + value->rValue = model->BSIM4v3minv; + return(OK); + case BSIM4v3_MOD_FPROUT: + value->rValue = model->BSIM4v3fprout; + return(OK); + case BSIM4v3_MOD_PDITS: + value->rValue = model->BSIM4v3pdits; + return(OK); + case BSIM4v3_MOD_PDITSD: + value->rValue = model->BSIM4v3pditsd; + return(OK); + case BSIM4v3_MOD_PDITSL: + value->rValue = model->BSIM4v3pditsl; + return(OK); + case BSIM4v3_MOD_DELTA: + value->rValue = model->BSIM4v3delta; + return(OK); + case BSIM4v3_MOD_RDSW: + value->rValue = model->BSIM4v3rdsw; + return(OK); + case BSIM4v3_MOD_RDSWMIN: + value->rValue = model->BSIM4v3rdswmin; + return(OK); + case BSIM4v3_MOD_RDWMIN: + value->rValue = model->BSIM4v3rdwmin; + return(OK); + case BSIM4v3_MOD_RSWMIN: + value->rValue = model->BSIM4v3rswmin; + return(OK); + case BSIM4v3_MOD_RDW: + value->rValue = model->BSIM4v3rdw; + return(OK); + case BSIM4v3_MOD_RSW: + value->rValue = model->BSIM4v3rsw; + return(OK); + case BSIM4v3_MOD_PRWG: + value->rValue = model->BSIM4v3prwg; + return(OK); + case BSIM4v3_MOD_PRWB: + value->rValue = model->BSIM4v3prwb; + return(OK); + case BSIM4v3_MOD_PRT: + value->rValue = model->BSIM4v3prt; + return(OK); + case BSIM4v3_MOD_ETA0: + value->rValue = model->BSIM4v3eta0; + return(OK); + case BSIM4v3_MOD_ETAB: + value->rValue = model->BSIM4v3etab; + return(OK); + case BSIM4v3_MOD_PCLM: + value->rValue = model->BSIM4v3pclm; + return(OK); + case BSIM4v3_MOD_PDIBL1: + value->rValue = model->BSIM4v3pdibl1; + return(OK); + case BSIM4v3_MOD_PDIBL2: + value->rValue = model->BSIM4v3pdibl2; + return(OK); + case BSIM4v3_MOD_PDIBLB: + value->rValue = model->BSIM4v3pdiblb; + return(OK); + case BSIM4v3_MOD_PSCBE1: + value->rValue = model->BSIM4v3pscbe1; + return(OK); + case BSIM4v3_MOD_PSCBE2: + value->rValue = model->BSIM4v3pscbe2; + return(OK); + case BSIM4v3_MOD_PVAG: + value->rValue = model->BSIM4v3pvag; + return(OK); + case BSIM4v3_MOD_WR: + value->rValue = model->BSIM4v3wr; + return(OK); + case BSIM4v3_MOD_DWG: + value->rValue = model->BSIM4v3dwg; + return(OK); + case BSIM4v3_MOD_DWB: + value->rValue = model->BSIM4v3dwb; + return(OK); + case BSIM4v3_MOD_B0: + value->rValue = model->BSIM4v3b0; + return(OK); + case BSIM4v3_MOD_B1: + value->rValue = model->BSIM4v3b1; + return(OK); + case BSIM4v3_MOD_ALPHA0: + value->rValue = model->BSIM4v3alpha0; + return(OK); + case BSIM4v3_MOD_ALPHA1: + value->rValue = model->BSIM4v3alpha1; + return(OK); + case BSIM4v3_MOD_BETA0: + value->rValue = model->BSIM4v3beta0; + return(OK); + case BSIM4v3_MOD_AGIDL: + value->rValue = model->BSIM4v3agidl; + return(OK); + case BSIM4v3_MOD_BGIDL: + value->rValue = model->BSIM4v3bgidl; + return(OK); + case BSIM4v3_MOD_CGIDL: + value->rValue = model->BSIM4v3cgidl; + return(OK); + case BSIM4v3_MOD_EGIDL: + value->rValue = model->BSIM4v3egidl; + return(OK); + case BSIM4v3_MOD_AIGC: + value->rValue = model->BSIM4v3aigc; + return(OK); + case BSIM4v3_MOD_BIGC: + value->rValue = model->BSIM4v3bigc; + return(OK); + case BSIM4v3_MOD_CIGC: + value->rValue = model->BSIM4v3cigc; + return(OK); + case BSIM4v3_MOD_AIGSD: + value->rValue = model->BSIM4v3aigsd; + return(OK); + case BSIM4v3_MOD_BIGSD: + value->rValue = model->BSIM4v3bigsd; + return(OK); + case BSIM4v3_MOD_CIGSD: + value->rValue = model->BSIM4v3cigsd; + return(OK); + case BSIM4v3_MOD_AIGBACC: + value->rValue = model->BSIM4v3aigbacc; + return(OK); + case BSIM4v3_MOD_BIGBACC: + value->rValue = model->BSIM4v3bigbacc; + return(OK); + case BSIM4v3_MOD_CIGBACC: + value->rValue = model->BSIM4v3cigbacc; + return(OK); + case BSIM4v3_MOD_AIGBINV: + value->rValue = model->BSIM4v3aigbinv; + return(OK); + case BSIM4v3_MOD_BIGBINV: + value->rValue = model->BSIM4v3bigbinv; + return(OK); + case BSIM4v3_MOD_CIGBINV: + value->rValue = model->BSIM4v3cigbinv; + return(OK); + case BSIM4v3_MOD_NIGC: + value->rValue = model->BSIM4v3nigc; + return(OK); + case BSIM4v3_MOD_NIGBACC: + value->rValue = model->BSIM4v3nigbacc; + return(OK); + case BSIM4v3_MOD_NIGBINV: + value->rValue = model->BSIM4v3nigbinv; + return(OK); + case BSIM4v3_MOD_NTOX: + value->rValue = model->BSIM4v3ntox; + return(OK); + case BSIM4v3_MOD_EIGBINV: + value->rValue = model->BSIM4v3eigbinv; + return(OK); + case BSIM4v3_MOD_PIGCD: + value->rValue = model->BSIM4v3pigcd; + return(OK); + case BSIM4v3_MOD_POXEDGE: + value->rValue = model->BSIM4v3poxedge; + return(OK); + case BSIM4v3_MOD_PHIN: + value->rValue = model->BSIM4v3phin; + return(OK); + case BSIM4v3_MOD_XRCRG1: + value->rValue = model->BSIM4v3xrcrg1; + return(OK); + case BSIM4v3_MOD_XRCRG2: + value->rValue = model->BSIM4v3xrcrg2; + return(OK); + case BSIM4v3_MOD_TNOIA: + value->rValue = model->BSIM4v3tnoia; + return(OK); + case BSIM4v3_MOD_TNOIB: + value->rValue = model->BSIM4v3tnoib; + return(OK); + case BSIM4v3_MOD_RNOIA: + value->rValue = model->BSIM4v3rnoia; + return(OK); + case BSIM4v3_MOD_RNOIB: + value->rValue = model->BSIM4v3rnoib; + return(OK); + case BSIM4v3_MOD_NTNOI: + value->rValue = model->BSIM4v3ntnoi; + return(OK); + case BSIM4v3_MOD_IJTHDFWD: + value->rValue = model->BSIM4v3ijthdfwd; + return(OK); + case BSIM4v3_MOD_IJTHSFWD: + value->rValue = model->BSIM4v3ijthsfwd; + return(OK); + case BSIM4v3_MOD_IJTHDREV: + value->rValue = model->BSIM4v3ijthdrev; + return(OK); + case BSIM4v3_MOD_IJTHSREV: + value->rValue = model->BSIM4v3ijthsrev; + return(OK); + case BSIM4v3_MOD_XJBVD: + value->rValue = model->BSIM4v3xjbvd; + return(OK); + case BSIM4v3_MOD_XJBVS: + value->rValue = model->BSIM4v3xjbvs; + return(OK); + case BSIM4v3_MOD_BVD: + value->rValue = model->BSIM4v3bvd; + return(OK); + case BSIM4v3_MOD_BVS: + value->rValue = model->BSIM4v3bvs; + return(OK); + case BSIM4v3_MOD_VFB: + value->rValue = model->BSIM4v3vfb; + return(OK); + + case BSIM4v3_MOD_GBMIN: + value->rValue = model->BSIM4v3gbmin; + return(OK); + case BSIM4v3_MOD_RBDB: + value->rValue = model->BSIM4v3rbdb; + return(OK); + case BSIM4v3_MOD_RBPB: + value->rValue = model->BSIM4v3rbpb; + return(OK); + case BSIM4v3_MOD_RBSB: + value->rValue = model->BSIM4v3rbsb; + return(OK); + case BSIM4v3_MOD_RBPS: + value->rValue = model->BSIM4v3rbps; + return(OK); + case BSIM4v3_MOD_RBPD: + value->rValue = model->BSIM4v3rbpd; + return(OK); + + case BSIM4v3_MOD_CGSL: + value->rValue = model->BSIM4v3cgsl; + return(OK); + case BSIM4v3_MOD_CGDL: + value->rValue = model->BSIM4v3cgdl; + return(OK); + case BSIM4v3_MOD_CKAPPAS: + value->rValue = model->BSIM4v3ckappas; + return(OK); + case BSIM4v3_MOD_CKAPPAD: + value->rValue = model->BSIM4v3ckappad; + return(OK); + case BSIM4v3_MOD_CF: + value->rValue = model->BSIM4v3cf; + return(OK); + case BSIM4v3_MOD_CLC: + value->rValue = model->BSIM4v3clc; + return(OK); + case BSIM4v3_MOD_CLE: + value->rValue = model->BSIM4v3cle; + return(OK); + case BSIM4v3_MOD_DWC: + value->rValue = model->BSIM4v3dwc; + return(OK); + case BSIM4v3_MOD_DLC: + value->rValue = model->BSIM4v3dlc; + return(OK); + case BSIM4v3_MOD_XW: + value->rValue = model->BSIM4v3xw; + return(OK); + case BSIM4v3_MOD_XL: + value->rValue = model->BSIM4v3xl; + return(OK); + case BSIM4v3_MOD_DLCIG: + value->rValue = model->BSIM4v3dlcig; + return(OK); + case BSIM4v3_MOD_DWJ: + value->rValue = model->BSIM4v3dwj; + return(OK); + case BSIM4v3_MOD_VFBCV: + value->rValue = model->BSIM4v3vfbcv; + return(OK); + case BSIM4v3_MOD_ACDE: + value->rValue = model->BSIM4v3acde; + return(OK); + case BSIM4v3_MOD_MOIN: + value->rValue = model->BSIM4v3moin; + return(OK); + case BSIM4v3_MOD_NOFF: + value->rValue = model->BSIM4v3noff; + return(OK); + case BSIM4v3_MOD_VOFFCV: + value->rValue = model->BSIM4v3voffcv; + return(OK); + case BSIM4v3_MOD_DMCG: + value->rValue = model->BSIM4v3dmcg; + return(OK); + case BSIM4v3_MOD_DMCI: + value->rValue = model->BSIM4v3dmci; + return(OK); + case BSIM4v3_MOD_DMDG: + value->rValue = model->BSIM4v3dmdg; + return(OK); + case BSIM4v3_MOD_DMCGT: + value->rValue = model->BSIM4v3dmcgt; + return(OK); + case BSIM4v3_MOD_XGW: + value->rValue = model->BSIM4v3xgw; + return(OK); + case BSIM4v3_MOD_XGL: + value->rValue = model->BSIM4v3xgl; + return(OK); + case BSIM4v3_MOD_RSHG: + value->rValue = model->BSIM4v3rshg; + return(OK); + case BSIM4v3_MOD_NGCON: + value->rValue = model->BSIM4v3ngcon; + return(OK); + case BSIM4v3_MOD_TCJ: + value->rValue = model->BSIM4v3tcj; + return(OK); + case BSIM4v3_MOD_TPB: + value->rValue = model->BSIM4v3tpb; + return(OK); + case BSIM4v3_MOD_TCJSW: + value->rValue = model->BSIM4v3tcjsw; + return(OK); + case BSIM4v3_MOD_TPBSW: + value->rValue = model->BSIM4v3tpbsw; + return(OK); + case BSIM4v3_MOD_TCJSWG: + value->rValue = model->BSIM4v3tcjswg; + return(OK); + case BSIM4v3_MOD_TPBSWG: + value->rValue = model->BSIM4v3tpbswg; + return(OK); + + /* Length dependence */ + case BSIM4v3_MOD_LCDSC : + value->rValue = model->BSIM4v3lcdsc; + return(OK); + case BSIM4v3_MOD_LCDSCB : + value->rValue = model->BSIM4v3lcdscb; + return(OK); + case BSIM4v3_MOD_LCDSCD : + value->rValue = model->BSIM4v3lcdscd; + return(OK); + case BSIM4v3_MOD_LCIT : + value->rValue = model->BSIM4v3lcit; + return(OK); + case BSIM4v3_MOD_LNFACTOR : + value->rValue = model->BSIM4v3lnfactor; + return(OK); + case BSIM4v3_MOD_LXJ: + value->rValue = model->BSIM4v3lxj; + return(OK); + case BSIM4v3_MOD_LVSAT: + value->rValue = model->BSIM4v3lvsat; + return(OK); + case BSIM4v3_MOD_LAT: + value->rValue = model->BSIM4v3lat; + return(OK); + case BSIM4v3_MOD_LA0: + value->rValue = model->BSIM4v3la0; + return(OK); + case BSIM4v3_MOD_LAGS: + value->rValue = model->BSIM4v3lags; + return(OK); + case BSIM4v3_MOD_LA1: + value->rValue = model->BSIM4v3la1; + return(OK); + case BSIM4v3_MOD_LA2: + value->rValue = model->BSIM4v3la2; + return(OK); + case BSIM4v3_MOD_LKETA: + value->rValue = model->BSIM4v3lketa; + return(OK); + case BSIM4v3_MOD_LNSUB: + value->rValue = model->BSIM4v3lnsub; + return(OK); + case BSIM4v3_MOD_LNDEP: + value->rValue = model->BSIM4v3lndep; + return(OK); + case BSIM4v3_MOD_LNSD: + value->rValue = model->BSIM4v3lnsd; + return(OK); + case BSIM4v3_MOD_LNGATE: + value->rValue = model->BSIM4v3lngate; + return(OK); + case BSIM4v3_MOD_LGAMMA1: + value->rValue = model->BSIM4v3lgamma1; + return(OK); + case BSIM4v3_MOD_LGAMMA2: + value->rValue = model->BSIM4v3lgamma2; + return(OK); + case BSIM4v3_MOD_LVBX: + value->rValue = model->BSIM4v3lvbx; + return(OK); + case BSIM4v3_MOD_LVBM: + value->rValue = model->BSIM4v3lvbm; + return(OK); + case BSIM4v3_MOD_LXT: + value->rValue = model->BSIM4v3lxt; + return(OK); + case BSIM4v3_MOD_LK1: + value->rValue = model->BSIM4v3lk1; + return(OK); + case BSIM4v3_MOD_LKT1: + value->rValue = model->BSIM4v3lkt1; + return(OK); + case BSIM4v3_MOD_LKT1L: + value->rValue = model->BSIM4v3lkt1l; + return(OK); + case BSIM4v3_MOD_LKT2 : + value->rValue = model->BSIM4v3lkt2; + return(OK); + case BSIM4v3_MOD_LK2 : + value->rValue = model->BSIM4v3lk2; + return(OK); + case BSIM4v3_MOD_LK3: + value->rValue = model->BSIM4v3lk3; + return(OK); + case BSIM4v3_MOD_LK3B: + value->rValue = model->BSIM4v3lk3b; + return(OK); + case BSIM4v3_MOD_LW0: + value->rValue = model->BSIM4v3lw0; + return(OK); + case BSIM4v3_MOD_LLPE0: + value->rValue = model->BSIM4v3llpe0; + return(OK); + case BSIM4v3_MOD_LLPEB: + value->rValue = model->BSIM4v3llpeb; + return(OK); + case BSIM4v3_MOD_LDVTP0: + value->rValue = model->BSIM4v3ldvtp0; + return(OK); + case BSIM4v3_MOD_LDVTP1: + value->rValue = model->BSIM4v3ldvtp1; + return(OK); + case BSIM4v3_MOD_LDVT0: + value->rValue = model->BSIM4v3ldvt0; + return(OK); + case BSIM4v3_MOD_LDVT1 : + value->rValue = model->BSIM4v3ldvt1; + return(OK); + case BSIM4v3_MOD_LDVT2 : + value->rValue = model->BSIM4v3ldvt2; + return(OK); + case BSIM4v3_MOD_LDVT0W : + value->rValue = model->BSIM4v3ldvt0w; + return(OK); + case BSIM4v3_MOD_LDVT1W : + value->rValue = model->BSIM4v3ldvt1w; + return(OK); + case BSIM4v3_MOD_LDVT2W : + value->rValue = model->BSIM4v3ldvt2w; + return(OK); + case BSIM4v3_MOD_LDROUT : + value->rValue = model->BSIM4v3ldrout; + return(OK); + case BSIM4v3_MOD_LDSUB : + value->rValue = model->BSIM4v3ldsub; + return(OK); + case BSIM4v3_MOD_LVTH0: + value->rValue = model->BSIM4v3lvth0; + return(OK); + case BSIM4v3_MOD_LUA: + value->rValue = model->BSIM4v3lua; + return(OK); + case BSIM4v3_MOD_LUA1: + value->rValue = model->BSIM4v3lua1; + return(OK); + case BSIM4v3_MOD_LUB: + value->rValue = model->BSIM4v3lub; + return(OK); + case BSIM4v3_MOD_LUB1: + value->rValue = model->BSIM4v3lub1; + return(OK); + case BSIM4v3_MOD_LUC: + value->rValue = model->BSIM4v3luc; + return(OK); + case BSIM4v3_MOD_LUC1: + value->rValue = model->BSIM4v3luc1; + return(OK); + case BSIM4v3_MOD_LU0: + value->rValue = model->BSIM4v3lu0; + return(OK); + case BSIM4v3_MOD_LUTE: + value->rValue = model->BSIM4v3lute; + return(OK); + case BSIM4v3_MOD_LVOFF: + value->rValue = model->BSIM4v3lvoff; + return(OK); + case BSIM4v3_MOD_LMINV: + value->rValue = model->BSIM4v3lminv; + return(OK); + case BSIM4v3_MOD_LFPROUT: + value->rValue = model->BSIM4v3lfprout; + return(OK); + case BSIM4v3_MOD_LPDITS: + value->rValue = model->BSIM4v3lpdits; + return(OK); + case BSIM4v3_MOD_LPDITSD: + value->rValue = model->BSIM4v3lpditsd; + return(OK); + case BSIM4v3_MOD_LDELTA: + value->rValue = model->BSIM4v3ldelta; + return(OK); + case BSIM4v3_MOD_LRDSW: + value->rValue = model->BSIM4v3lrdsw; + return(OK); + case BSIM4v3_MOD_LRDW: + value->rValue = model->BSIM4v3lrdw; + return(OK); + case BSIM4v3_MOD_LRSW: + value->rValue = model->BSIM4v3lrsw; + return(OK); + case BSIM4v3_MOD_LPRWB: + value->rValue = model->BSIM4v3lprwb; + return(OK); + case BSIM4v3_MOD_LPRWG: + value->rValue = model->BSIM4v3lprwg; + return(OK); + case BSIM4v3_MOD_LPRT: + value->rValue = model->BSIM4v3lprt; + return(OK); + case BSIM4v3_MOD_LETA0: + value->rValue = model->BSIM4v3leta0; + return(OK); + case BSIM4v3_MOD_LETAB: + value->rValue = model->BSIM4v3letab; + return(OK); + case BSIM4v3_MOD_LPCLM: + value->rValue = model->BSIM4v3lpclm; + return(OK); + case BSIM4v3_MOD_LPDIBL1: + value->rValue = model->BSIM4v3lpdibl1; + return(OK); + case BSIM4v3_MOD_LPDIBL2: + value->rValue = model->BSIM4v3lpdibl2; + return(OK); + case BSIM4v3_MOD_LPDIBLB: + value->rValue = model->BSIM4v3lpdiblb; + return(OK); + case BSIM4v3_MOD_LPSCBE1: + value->rValue = model->BSIM4v3lpscbe1; + return(OK); + case BSIM4v3_MOD_LPSCBE2: + value->rValue = model->BSIM4v3lpscbe2; + return(OK); + case BSIM4v3_MOD_LPVAG: + value->rValue = model->BSIM4v3lpvag; + return(OK); + case BSIM4v3_MOD_LWR: + value->rValue = model->BSIM4v3lwr; + return(OK); + case BSIM4v3_MOD_LDWG: + value->rValue = model->BSIM4v3ldwg; + return(OK); + case BSIM4v3_MOD_LDWB: + value->rValue = model->BSIM4v3ldwb; + return(OK); + case BSIM4v3_MOD_LB0: + value->rValue = model->BSIM4v3lb0; + return(OK); + case BSIM4v3_MOD_LB1: + value->rValue = model->BSIM4v3lb1; + return(OK); + case BSIM4v3_MOD_LALPHA0: + value->rValue = model->BSIM4v3lalpha0; + return(OK); + case BSIM4v3_MOD_LALPHA1: + value->rValue = model->BSIM4v3lalpha1; + return(OK); + case BSIM4v3_MOD_LBETA0: + value->rValue = model->BSIM4v3lbeta0; + return(OK); + case BSIM4v3_MOD_LAGIDL: + value->rValue = model->BSIM4v3lagidl; + return(OK); + case BSIM4v3_MOD_LBGIDL: + value->rValue = model->BSIM4v3lbgidl; + return(OK); + case BSIM4v3_MOD_LCGIDL: + value->rValue = model->BSIM4v3lcgidl; + return(OK); + case BSIM4v3_MOD_LEGIDL: + value->rValue = model->BSIM4v3legidl; + return(OK); + case BSIM4v3_MOD_LAIGC: + value->rValue = model->BSIM4v3laigc; + return(OK); + case BSIM4v3_MOD_LBIGC: + value->rValue = model->BSIM4v3lbigc; + return(OK); + case BSIM4v3_MOD_LCIGC: + value->rValue = model->BSIM4v3lcigc; + return(OK); + case BSIM4v3_MOD_LAIGSD: + value->rValue = model->BSIM4v3laigsd; + return(OK); + case BSIM4v3_MOD_LBIGSD: + value->rValue = model->BSIM4v3lbigsd; + return(OK); + case BSIM4v3_MOD_LCIGSD: + value->rValue = model->BSIM4v3lcigsd; + return(OK); + case BSIM4v3_MOD_LAIGBACC: + value->rValue = model->BSIM4v3laigbacc; + return(OK); + case BSIM4v3_MOD_LBIGBACC: + value->rValue = model->BSIM4v3lbigbacc; + return(OK); + case BSIM4v3_MOD_LCIGBACC: + value->rValue = model->BSIM4v3lcigbacc; + return(OK); + case BSIM4v3_MOD_LAIGBINV: + value->rValue = model->BSIM4v3laigbinv; + return(OK); + case BSIM4v3_MOD_LBIGBINV: + value->rValue = model->BSIM4v3lbigbinv; + return(OK); + case BSIM4v3_MOD_LCIGBINV: + value->rValue = model->BSIM4v3lcigbinv; + return(OK); + case BSIM4v3_MOD_LNIGC: + value->rValue = model->BSIM4v3lnigc; + return(OK); + case BSIM4v3_MOD_LNIGBACC: + value->rValue = model->BSIM4v3lnigbacc; + return(OK); + case BSIM4v3_MOD_LNIGBINV: + value->rValue = model->BSIM4v3lnigbinv; + return(OK); + case BSIM4v3_MOD_LNTOX: + value->rValue = model->BSIM4v3lntox; + return(OK); + case BSIM4v3_MOD_LEIGBINV: + value->rValue = model->BSIM4v3leigbinv; + return(OK); + case BSIM4v3_MOD_LPIGCD: + value->rValue = model->BSIM4v3lpigcd; + return(OK); + case BSIM4v3_MOD_LPOXEDGE: + value->rValue = model->BSIM4v3lpoxedge; + return(OK); + case BSIM4v3_MOD_LPHIN: + value->rValue = model->BSIM4v3lphin; + return(OK); + case BSIM4v3_MOD_LXRCRG1: + value->rValue = model->BSIM4v3lxrcrg1; + return(OK); + case BSIM4v3_MOD_LXRCRG2: + value->rValue = model->BSIM4v3lxrcrg2; + return(OK); + case BSIM4v3_MOD_LEU: + value->rValue = model->BSIM4v3leu; + return(OK); + case BSIM4v3_MOD_LVFB: + value->rValue = model->BSIM4v3lvfb; + return(OK); + + case BSIM4v3_MOD_LCGSL: + value->rValue = model->BSIM4v3lcgsl; + return(OK); + case BSIM4v3_MOD_LCGDL: + value->rValue = model->BSIM4v3lcgdl; + return(OK); + case BSIM4v3_MOD_LCKAPPAS: + value->rValue = model->BSIM4v3lckappas; + return(OK); + case BSIM4v3_MOD_LCKAPPAD: + value->rValue = model->BSIM4v3lckappad; + return(OK); + case BSIM4v3_MOD_LCF: + value->rValue = model->BSIM4v3lcf; + return(OK); + case BSIM4v3_MOD_LCLC: + value->rValue = model->BSIM4v3lclc; + return(OK); + case BSIM4v3_MOD_LCLE: + value->rValue = model->BSIM4v3lcle; + return(OK); + case BSIM4v3_MOD_LVFBCV: + value->rValue = model->BSIM4v3lvfbcv; + return(OK); + case BSIM4v3_MOD_LACDE: + value->rValue = model->BSIM4v3lacde; + return(OK); + case BSIM4v3_MOD_LMOIN: + value->rValue = model->BSIM4v3lmoin; + return(OK); + case BSIM4v3_MOD_LNOFF: + value->rValue = model->BSIM4v3lnoff; + return(OK); + case BSIM4v3_MOD_LVOFFCV: + value->rValue = model->BSIM4v3lvoffcv; + return(OK); + + /* Width dependence */ + case BSIM4v3_MOD_WCDSC : + value->rValue = model->BSIM4v3wcdsc; + return(OK); + case BSIM4v3_MOD_WCDSCB : + value->rValue = model->BSIM4v3wcdscb; + return(OK); + case BSIM4v3_MOD_WCDSCD : + value->rValue = model->BSIM4v3wcdscd; + return(OK); + case BSIM4v3_MOD_WCIT : + value->rValue = model->BSIM4v3wcit; + return(OK); + case BSIM4v3_MOD_WNFACTOR : + value->rValue = model->BSIM4v3wnfactor; + return(OK); + case BSIM4v3_MOD_WXJ: + value->rValue = model->BSIM4v3wxj; + return(OK); + case BSIM4v3_MOD_WVSAT: + value->rValue = model->BSIM4v3wvsat; + return(OK); + case BSIM4v3_MOD_WAT: + value->rValue = model->BSIM4v3wat; + return(OK); + case BSIM4v3_MOD_WA0: + value->rValue = model->BSIM4v3wa0; + return(OK); + case BSIM4v3_MOD_WAGS: + value->rValue = model->BSIM4v3wags; + return(OK); + case BSIM4v3_MOD_WA1: + value->rValue = model->BSIM4v3wa1; + return(OK); + case BSIM4v3_MOD_WA2: + value->rValue = model->BSIM4v3wa2; + return(OK); + case BSIM4v3_MOD_WKETA: + value->rValue = model->BSIM4v3wketa; + return(OK); + case BSIM4v3_MOD_WNSUB: + value->rValue = model->BSIM4v3wnsub; + return(OK); + case BSIM4v3_MOD_WNDEP: + value->rValue = model->BSIM4v3wndep; + return(OK); + case BSIM4v3_MOD_WNSD: + value->rValue = model->BSIM4v3wnsd; + return(OK); + case BSIM4v3_MOD_WNGATE: + value->rValue = model->BSIM4v3wngate; + return(OK); + case BSIM4v3_MOD_WGAMMA1: + value->rValue = model->BSIM4v3wgamma1; + return(OK); + case BSIM4v3_MOD_WGAMMA2: + value->rValue = model->BSIM4v3wgamma2; + return(OK); + case BSIM4v3_MOD_WVBX: + value->rValue = model->BSIM4v3wvbx; + return(OK); + case BSIM4v3_MOD_WVBM: + value->rValue = model->BSIM4v3wvbm; + return(OK); + case BSIM4v3_MOD_WXT: + value->rValue = model->BSIM4v3wxt; + return(OK); + case BSIM4v3_MOD_WK1: + value->rValue = model->BSIM4v3wk1; + return(OK); + case BSIM4v3_MOD_WKT1: + value->rValue = model->BSIM4v3wkt1; + return(OK); + case BSIM4v3_MOD_WKT1L: + value->rValue = model->BSIM4v3wkt1l; + return(OK); + case BSIM4v3_MOD_WKT2 : + value->rValue = model->BSIM4v3wkt2; + return(OK); + case BSIM4v3_MOD_WK2 : + value->rValue = model->BSIM4v3wk2; + return(OK); + case BSIM4v3_MOD_WK3: + value->rValue = model->BSIM4v3wk3; + return(OK); + case BSIM4v3_MOD_WK3B: + value->rValue = model->BSIM4v3wk3b; + return(OK); + case BSIM4v3_MOD_WW0: + value->rValue = model->BSIM4v3ww0; + return(OK); + case BSIM4v3_MOD_WLPE0: + value->rValue = model->BSIM4v3wlpe0; + return(OK); + case BSIM4v3_MOD_WDVTP0: + value->rValue = model->BSIM4v3wdvtp0; + return(OK); + case BSIM4v3_MOD_WDVTP1: + value->rValue = model->BSIM4v3wdvtp1; + return(OK); + case BSIM4v3_MOD_WLPEB: + value->rValue = model->BSIM4v3wlpeb; + return(OK); + case BSIM4v3_MOD_WDVT0: + value->rValue = model->BSIM4v3wdvt0; + return(OK); + case BSIM4v3_MOD_WDVT1 : + value->rValue = model->BSIM4v3wdvt1; + return(OK); + case BSIM4v3_MOD_WDVT2 : + value->rValue = model->BSIM4v3wdvt2; + return(OK); + case BSIM4v3_MOD_WDVT0W : + value->rValue = model->BSIM4v3wdvt0w; + return(OK); + case BSIM4v3_MOD_WDVT1W : + value->rValue = model->BSIM4v3wdvt1w; + return(OK); + case BSIM4v3_MOD_WDVT2W : + value->rValue = model->BSIM4v3wdvt2w; + return(OK); + case BSIM4v3_MOD_WDROUT : + value->rValue = model->BSIM4v3wdrout; + return(OK); + case BSIM4v3_MOD_WDSUB : + value->rValue = model->BSIM4v3wdsub; + return(OK); + case BSIM4v3_MOD_WVTH0: + value->rValue = model->BSIM4v3wvth0; + return(OK); + case BSIM4v3_MOD_WUA: + value->rValue = model->BSIM4v3wua; + return(OK); + case BSIM4v3_MOD_WUA1: + value->rValue = model->BSIM4v3wua1; + return(OK); + case BSIM4v3_MOD_WUB: + value->rValue = model->BSIM4v3wub; + return(OK); + case BSIM4v3_MOD_WUB1: + value->rValue = model->BSIM4v3wub1; + return(OK); + case BSIM4v3_MOD_WUC: + value->rValue = model->BSIM4v3wuc; + return(OK); + case BSIM4v3_MOD_WUC1: + value->rValue = model->BSIM4v3wuc1; + return(OK); + case BSIM4v3_MOD_WU0: + value->rValue = model->BSIM4v3wu0; + return(OK); + case BSIM4v3_MOD_WUTE: + value->rValue = model->BSIM4v3wute; + return(OK); + case BSIM4v3_MOD_WVOFF: + value->rValue = model->BSIM4v3wvoff; + return(OK); + case BSIM4v3_MOD_WMINV: + value->rValue = model->BSIM4v3wminv; + return(OK); + case BSIM4v3_MOD_WFPROUT: + value->rValue = model->BSIM4v3wfprout; + return(OK); + case BSIM4v3_MOD_WPDITS: + value->rValue = model->BSIM4v3wpdits; + return(OK); + case BSIM4v3_MOD_WPDITSD: + value->rValue = model->BSIM4v3wpditsd; + return(OK); + case BSIM4v3_MOD_WDELTA: + value->rValue = model->BSIM4v3wdelta; + return(OK); + case BSIM4v3_MOD_WRDSW: + value->rValue = model->BSIM4v3wrdsw; + return(OK); + case BSIM4v3_MOD_WRDW: + value->rValue = model->BSIM4v3wrdw; + return(OK); + case BSIM4v3_MOD_WRSW: + value->rValue = model->BSIM4v3wrsw; + return(OK); + case BSIM4v3_MOD_WPRWB: + value->rValue = model->BSIM4v3wprwb; + return(OK); + case BSIM4v3_MOD_WPRWG: + value->rValue = model->BSIM4v3wprwg; + return(OK); + case BSIM4v3_MOD_WPRT: + value->rValue = model->BSIM4v3wprt; + return(OK); + case BSIM4v3_MOD_WETA0: + value->rValue = model->BSIM4v3weta0; + return(OK); + case BSIM4v3_MOD_WETAB: + value->rValue = model->BSIM4v3wetab; + return(OK); + case BSIM4v3_MOD_WPCLM: + value->rValue = model->BSIM4v3wpclm; + return(OK); + case BSIM4v3_MOD_WPDIBL1: + value->rValue = model->BSIM4v3wpdibl1; + return(OK); + case BSIM4v3_MOD_WPDIBL2: + value->rValue = model->BSIM4v3wpdibl2; + return(OK); + case BSIM4v3_MOD_WPDIBLB: + value->rValue = model->BSIM4v3wpdiblb; + return(OK); + case BSIM4v3_MOD_WPSCBE1: + value->rValue = model->BSIM4v3wpscbe1; + return(OK); + case BSIM4v3_MOD_WPSCBE2: + value->rValue = model->BSIM4v3wpscbe2; + return(OK); + case BSIM4v3_MOD_WPVAG: + value->rValue = model->BSIM4v3wpvag; + return(OK); + case BSIM4v3_MOD_WWR: + value->rValue = model->BSIM4v3wwr; + return(OK); + case BSIM4v3_MOD_WDWG: + value->rValue = model->BSIM4v3wdwg; + return(OK); + case BSIM4v3_MOD_WDWB: + value->rValue = model->BSIM4v3wdwb; + return(OK); + case BSIM4v3_MOD_WB0: + value->rValue = model->BSIM4v3wb0; + return(OK); + case BSIM4v3_MOD_WB1: + value->rValue = model->BSIM4v3wb1; + return(OK); + case BSIM4v3_MOD_WALPHA0: + value->rValue = model->BSIM4v3walpha0; + return(OK); + case BSIM4v3_MOD_WALPHA1: + value->rValue = model->BSIM4v3walpha1; + return(OK); + case BSIM4v3_MOD_WBETA0: + value->rValue = model->BSIM4v3wbeta0; + return(OK); + case BSIM4v3_MOD_WAGIDL: + value->rValue = model->BSIM4v3wagidl; + return(OK); + case BSIM4v3_MOD_WBGIDL: + value->rValue = model->BSIM4v3wbgidl; + return(OK); + case BSIM4v3_MOD_WCGIDL: + value->rValue = model->BSIM4v3wcgidl; + return(OK); + case BSIM4v3_MOD_WEGIDL: + value->rValue = model->BSIM4v3wegidl; + return(OK); + case BSIM4v3_MOD_WAIGC: + value->rValue = model->BSIM4v3waigc; + return(OK); + case BSIM4v3_MOD_WBIGC: + value->rValue = model->BSIM4v3wbigc; + return(OK); + case BSIM4v3_MOD_WCIGC: + value->rValue = model->BSIM4v3wcigc; + return(OK); + case BSIM4v3_MOD_WAIGSD: + value->rValue = model->BSIM4v3waigsd; + return(OK); + case BSIM4v3_MOD_WBIGSD: + value->rValue = model->BSIM4v3wbigsd; + return(OK); + case BSIM4v3_MOD_WCIGSD: + value->rValue = model->BSIM4v3wcigsd; + return(OK); + case BSIM4v3_MOD_WAIGBACC: + value->rValue = model->BSIM4v3waigbacc; + return(OK); + case BSIM4v3_MOD_WBIGBACC: + value->rValue = model->BSIM4v3wbigbacc; + return(OK); + case BSIM4v3_MOD_WCIGBACC: + value->rValue = model->BSIM4v3wcigbacc; + return(OK); + case BSIM4v3_MOD_WAIGBINV: + value->rValue = model->BSIM4v3waigbinv; + return(OK); + case BSIM4v3_MOD_WBIGBINV: + value->rValue = model->BSIM4v3wbigbinv; + return(OK); + case BSIM4v3_MOD_WCIGBINV: + value->rValue = model->BSIM4v3wcigbinv; + return(OK); + case BSIM4v3_MOD_WNIGC: + value->rValue = model->BSIM4v3wnigc; + return(OK); + case BSIM4v3_MOD_WNIGBACC: + value->rValue = model->BSIM4v3wnigbacc; + return(OK); + case BSIM4v3_MOD_WNIGBINV: + value->rValue = model->BSIM4v3wnigbinv; + return(OK); + case BSIM4v3_MOD_WNTOX: + value->rValue = model->BSIM4v3wntox; + return(OK); + case BSIM4v3_MOD_WEIGBINV: + value->rValue = model->BSIM4v3weigbinv; + return(OK); + case BSIM4v3_MOD_WPIGCD: + value->rValue = model->BSIM4v3wpigcd; + return(OK); + case BSIM4v3_MOD_WPOXEDGE: + value->rValue = model->BSIM4v3wpoxedge; + return(OK); + case BSIM4v3_MOD_WPHIN: + value->rValue = model->BSIM4v3wphin; + return(OK); + case BSIM4v3_MOD_WXRCRG1: + value->rValue = model->BSIM4v3wxrcrg1; + return(OK); + case BSIM4v3_MOD_WXRCRG2: + value->rValue = model->BSIM4v3wxrcrg2; + return(OK); + case BSIM4v3_MOD_WEU: + value->rValue = model->BSIM4v3weu; + return(OK); + case BSIM4v3_MOD_WVFB: + value->rValue = model->BSIM4v3wvfb; + return(OK); + + case BSIM4v3_MOD_WCGSL: + value->rValue = model->BSIM4v3wcgsl; + return(OK); + case BSIM4v3_MOD_WCGDL: + value->rValue = model->BSIM4v3wcgdl; + return(OK); + case BSIM4v3_MOD_WCKAPPAS: + value->rValue = model->BSIM4v3wckappas; + return(OK); + case BSIM4v3_MOD_WCKAPPAD: + value->rValue = model->BSIM4v3wckappad; + return(OK); + case BSIM4v3_MOD_WCF: + value->rValue = model->BSIM4v3wcf; + return(OK); + case BSIM4v3_MOD_WCLC: + value->rValue = model->BSIM4v3wclc; + return(OK); + case BSIM4v3_MOD_WCLE: + value->rValue = model->BSIM4v3wcle; + return(OK); + case BSIM4v3_MOD_WVFBCV: + value->rValue = model->BSIM4v3wvfbcv; + return(OK); + case BSIM4v3_MOD_WACDE: + value->rValue = model->BSIM4v3wacde; + return(OK); + case BSIM4v3_MOD_WMOIN: + value->rValue = model->BSIM4v3wmoin; + return(OK); + case BSIM4v3_MOD_WNOFF: + value->rValue = model->BSIM4v3wnoff; + return(OK); + case BSIM4v3_MOD_WVOFFCV: + value->rValue = model->BSIM4v3wvoffcv; + return(OK); + + /* Cross-term dependence */ + case BSIM4v3_MOD_PCDSC : + value->rValue = model->BSIM4v3pcdsc; + return(OK); + case BSIM4v3_MOD_PCDSCB : + value->rValue = model->BSIM4v3pcdscb; + return(OK); + case BSIM4v3_MOD_PCDSCD : + value->rValue = model->BSIM4v3pcdscd; + return(OK); + case BSIM4v3_MOD_PCIT : + value->rValue = model->BSIM4v3pcit; + return(OK); + case BSIM4v3_MOD_PNFACTOR : + value->rValue = model->BSIM4v3pnfactor; + return(OK); + case BSIM4v3_MOD_PXJ: + value->rValue = model->BSIM4v3pxj; + return(OK); + case BSIM4v3_MOD_PVSAT: + value->rValue = model->BSIM4v3pvsat; + return(OK); + case BSIM4v3_MOD_PAT: + value->rValue = model->BSIM4v3pat; + return(OK); + case BSIM4v3_MOD_PA0: + value->rValue = model->BSIM4v3pa0; + return(OK); + case BSIM4v3_MOD_PAGS: + value->rValue = model->BSIM4v3pags; + return(OK); + case BSIM4v3_MOD_PA1: + value->rValue = model->BSIM4v3pa1; + return(OK); + case BSIM4v3_MOD_PA2: + value->rValue = model->BSIM4v3pa2; + return(OK); + case BSIM4v3_MOD_PKETA: + value->rValue = model->BSIM4v3pketa; + return(OK); + case BSIM4v3_MOD_PNSUB: + value->rValue = model->BSIM4v3pnsub; + return(OK); + case BSIM4v3_MOD_PNDEP: + value->rValue = model->BSIM4v3pndep; + return(OK); + case BSIM4v3_MOD_PNSD: + value->rValue = model->BSIM4v3pnsd; + return(OK); + case BSIM4v3_MOD_PNGATE: + value->rValue = model->BSIM4v3pngate; + return(OK); + case BSIM4v3_MOD_PGAMMA1: + value->rValue = model->BSIM4v3pgamma1; + return(OK); + case BSIM4v3_MOD_PGAMMA2: + value->rValue = model->BSIM4v3pgamma2; + return(OK); + case BSIM4v3_MOD_PVBX: + value->rValue = model->BSIM4v3pvbx; + return(OK); + case BSIM4v3_MOD_PVBM: + value->rValue = model->BSIM4v3pvbm; + return(OK); + case BSIM4v3_MOD_PXT: + value->rValue = model->BSIM4v3pxt; + return(OK); + case BSIM4v3_MOD_PK1: + value->rValue = model->BSIM4v3pk1; + return(OK); + case BSIM4v3_MOD_PKT1: + value->rValue = model->BSIM4v3pkt1; + return(OK); + case BSIM4v3_MOD_PKT1L: + value->rValue = model->BSIM4v3pkt1l; + return(OK); + case BSIM4v3_MOD_PKT2 : + value->rValue = model->BSIM4v3pkt2; + return(OK); + case BSIM4v3_MOD_PK2 : + value->rValue = model->BSIM4v3pk2; + return(OK); + case BSIM4v3_MOD_PK3: + value->rValue = model->BSIM4v3pk3; + return(OK); + case BSIM4v3_MOD_PK3B: + value->rValue = model->BSIM4v3pk3b; + return(OK); + case BSIM4v3_MOD_PW0: + value->rValue = model->BSIM4v3pw0; + return(OK); + case BSIM4v3_MOD_PLPE0: + value->rValue = model->BSIM4v3plpe0; + return(OK); + case BSIM4v3_MOD_PLPEB: + value->rValue = model->BSIM4v3plpeb; + return(OK); + case BSIM4v3_MOD_PDVTP0: + value->rValue = model->BSIM4v3pdvtp0; + return(OK); + case BSIM4v3_MOD_PDVTP1: + value->rValue = model->BSIM4v3pdvtp1; + return(OK); + case BSIM4v3_MOD_PDVT0 : + value->rValue = model->BSIM4v3pdvt0; + return(OK); + case BSIM4v3_MOD_PDVT1 : + value->rValue = model->BSIM4v3pdvt1; + return(OK); + case BSIM4v3_MOD_PDVT2 : + value->rValue = model->BSIM4v3pdvt2; + return(OK); + case BSIM4v3_MOD_PDVT0W : + value->rValue = model->BSIM4v3pdvt0w; + return(OK); + case BSIM4v3_MOD_PDVT1W : + value->rValue = model->BSIM4v3pdvt1w; + return(OK); + case BSIM4v3_MOD_PDVT2W : + value->rValue = model->BSIM4v3pdvt2w; + return(OK); + case BSIM4v3_MOD_PDROUT : + value->rValue = model->BSIM4v3pdrout; + return(OK); + case BSIM4v3_MOD_PDSUB : + value->rValue = model->BSIM4v3pdsub; + return(OK); + case BSIM4v3_MOD_PVTH0: + value->rValue = model->BSIM4v3pvth0; + return(OK); + case BSIM4v3_MOD_PUA: + value->rValue = model->BSIM4v3pua; + return(OK); + case BSIM4v3_MOD_PUA1: + value->rValue = model->BSIM4v3pua1; + return(OK); + case BSIM4v3_MOD_PUB: + value->rValue = model->BSIM4v3pub; + return(OK); + case BSIM4v3_MOD_PUB1: + value->rValue = model->BSIM4v3pub1; + return(OK); + case BSIM4v3_MOD_PUC: + value->rValue = model->BSIM4v3puc; + return(OK); + case BSIM4v3_MOD_PUC1: + value->rValue = model->BSIM4v3puc1; + return(OK); + case BSIM4v3_MOD_PU0: + value->rValue = model->BSIM4v3pu0; + return(OK); + case BSIM4v3_MOD_PUTE: + value->rValue = model->BSIM4v3pute; + return(OK); + case BSIM4v3_MOD_PVOFF: + value->rValue = model->BSIM4v3pvoff; + return(OK); + case BSIM4v3_MOD_PMINV: + value->rValue = model->BSIM4v3pminv; + return(OK); + case BSIM4v3_MOD_PFPROUT: + value->rValue = model->BSIM4v3pfprout; + return(OK); + case BSIM4v3_MOD_PPDITS: + value->rValue = model->BSIM4v3ppdits; + return(OK); + case BSIM4v3_MOD_PPDITSD: + value->rValue = model->BSIM4v3ppditsd; + return(OK); + case BSIM4v3_MOD_PDELTA: + value->rValue = model->BSIM4v3pdelta; + return(OK); + case BSIM4v3_MOD_PRDSW: + value->rValue = model->BSIM4v3prdsw; + return(OK); + case BSIM4v3_MOD_PRDW: + value->rValue = model->BSIM4v3prdw; + return(OK); + case BSIM4v3_MOD_PRSW: + value->rValue = model->BSIM4v3prsw; + return(OK); + case BSIM4v3_MOD_PPRWB: + value->rValue = model->BSIM4v3pprwb; + return(OK); + case BSIM4v3_MOD_PPRWG: + value->rValue = model->BSIM4v3pprwg; + return(OK); + case BSIM4v3_MOD_PPRT: + value->rValue = model->BSIM4v3pprt; + return(OK); + case BSIM4v3_MOD_PETA0: + value->rValue = model->BSIM4v3peta0; + return(OK); + case BSIM4v3_MOD_PETAB: + value->rValue = model->BSIM4v3petab; + return(OK); + case BSIM4v3_MOD_PPCLM: + value->rValue = model->BSIM4v3ppclm; + return(OK); + case BSIM4v3_MOD_PPDIBL1: + value->rValue = model->BSIM4v3ppdibl1; + return(OK); + case BSIM4v3_MOD_PPDIBL2: + value->rValue = model->BSIM4v3ppdibl2; + return(OK); + case BSIM4v3_MOD_PPDIBLB: + value->rValue = model->BSIM4v3ppdiblb; + return(OK); + case BSIM4v3_MOD_PPSCBE1: + value->rValue = model->BSIM4v3ppscbe1; + return(OK); + case BSIM4v3_MOD_PPSCBE2: + value->rValue = model->BSIM4v3ppscbe2; + return(OK); + case BSIM4v3_MOD_PPVAG: + value->rValue = model->BSIM4v3ppvag; + return(OK); + case BSIM4v3_MOD_PWR: + value->rValue = model->BSIM4v3pwr; + return(OK); + case BSIM4v3_MOD_PDWG: + value->rValue = model->BSIM4v3pdwg; + return(OK); + case BSIM4v3_MOD_PDWB: + value->rValue = model->BSIM4v3pdwb; + return(OK); + case BSIM4v3_MOD_PB0: + value->rValue = model->BSIM4v3pb0; + return(OK); + case BSIM4v3_MOD_PB1: + value->rValue = model->BSIM4v3pb1; + return(OK); + case BSIM4v3_MOD_PALPHA0: + value->rValue = model->BSIM4v3palpha0; + return(OK); + case BSIM4v3_MOD_PALPHA1: + value->rValue = model->BSIM4v3palpha1; + return(OK); + case BSIM4v3_MOD_PBETA0: + value->rValue = model->BSIM4v3pbeta0; + return(OK); + case BSIM4v3_MOD_PAGIDL: + value->rValue = model->BSIM4v3pagidl; + return(OK); + case BSIM4v3_MOD_PBGIDL: + value->rValue = model->BSIM4v3pbgidl; + return(OK); + case BSIM4v3_MOD_PCGIDL: + value->rValue = model->BSIM4v3pcgidl; + return(OK); + case BSIM4v3_MOD_PEGIDL: + value->rValue = model->BSIM4v3pegidl; + return(OK); + case BSIM4v3_MOD_PAIGC: + value->rValue = model->BSIM4v3paigc; + return(OK); + case BSIM4v3_MOD_PBIGC: + value->rValue = model->BSIM4v3pbigc; + return(OK); + case BSIM4v3_MOD_PCIGC: + value->rValue = model->BSIM4v3pcigc; + return(OK); + case BSIM4v3_MOD_PAIGSD: + value->rValue = model->BSIM4v3paigsd; + return(OK); + case BSIM4v3_MOD_PBIGSD: + value->rValue = model->BSIM4v3pbigsd; + return(OK); + case BSIM4v3_MOD_PCIGSD: + value->rValue = model->BSIM4v3pcigsd; + return(OK); + case BSIM4v3_MOD_PAIGBACC: + value->rValue = model->BSIM4v3paigbacc; + return(OK); + case BSIM4v3_MOD_PBIGBACC: + value->rValue = model->BSIM4v3pbigbacc; + return(OK); + case BSIM4v3_MOD_PCIGBACC: + value->rValue = model->BSIM4v3pcigbacc; + return(OK); + case BSIM4v3_MOD_PAIGBINV: + value->rValue = model->BSIM4v3paigbinv; + return(OK); + case BSIM4v3_MOD_PBIGBINV: + value->rValue = model->BSIM4v3pbigbinv; + return(OK); + case BSIM4v3_MOD_PCIGBINV: + value->rValue = model->BSIM4v3pcigbinv; + return(OK); + case BSIM4v3_MOD_PNIGC: + value->rValue = model->BSIM4v3pnigc; + return(OK); + case BSIM4v3_MOD_PNIGBACC: + value->rValue = model->BSIM4v3pnigbacc; + return(OK); + case BSIM4v3_MOD_PNIGBINV: + value->rValue = model->BSIM4v3pnigbinv; + return(OK); + case BSIM4v3_MOD_PNTOX: + value->rValue = model->BSIM4v3pntox; + return(OK); + case BSIM4v3_MOD_PEIGBINV: + value->rValue = model->BSIM4v3peigbinv; + return(OK); + case BSIM4v3_MOD_PPIGCD: + value->rValue = model->BSIM4v3ppigcd; + return(OK); + case BSIM4v3_MOD_PPOXEDGE: + value->rValue = model->BSIM4v3ppoxedge; + return(OK); + case BSIM4v3_MOD_PPHIN: + value->rValue = model->BSIM4v3pphin; + return(OK); + case BSIM4v3_MOD_PXRCRG1: + value->rValue = model->BSIM4v3pxrcrg1; + return(OK); + case BSIM4v3_MOD_PXRCRG2: + value->rValue = model->BSIM4v3pxrcrg2; + return(OK); + case BSIM4v3_MOD_PEU: + value->rValue = model->BSIM4v3peu; + return(OK); + case BSIM4v3_MOD_PVFB: + value->rValue = model->BSIM4v3pvfb; + return(OK); + + case BSIM4v3_MOD_PCGSL: + value->rValue = model->BSIM4v3pcgsl; + return(OK); + case BSIM4v3_MOD_PCGDL: + value->rValue = model->BSIM4v3pcgdl; + return(OK); + case BSIM4v3_MOD_PCKAPPAS: + value->rValue = model->BSIM4v3pckappas; + return(OK); + case BSIM4v3_MOD_PCKAPPAD: + value->rValue = model->BSIM4v3pckappad; + return(OK); + case BSIM4v3_MOD_PCF: + value->rValue = model->BSIM4v3pcf; + return(OK); + case BSIM4v3_MOD_PCLC: + value->rValue = model->BSIM4v3pclc; + return(OK); + case BSIM4v3_MOD_PCLE: + value->rValue = model->BSIM4v3pcle; + return(OK); + case BSIM4v3_MOD_PVFBCV: + value->rValue = model->BSIM4v3pvfbcv; + return(OK); + case BSIM4v3_MOD_PACDE: + value->rValue = model->BSIM4v3pacde; + return(OK); + case BSIM4v3_MOD_PMOIN: + value->rValue = model->BSIM4v3pmoin; + return(OK); + case BSIM4v3_MOD_PNOFF: + value->rValue = model->BSIM4v3pnoff; + return(OK); + case BSIM4v3_MOD_PVOFFCV: + value->rValue = model->BSIM4v3pvoffcv; + return(OK); + + case BSIM4v3_MOD_TNOM : + value->rValue = model->BSIM4v3tnom; + return(OK); + case BSIM4v3_MOD_CGSO: + value->rValue = model->BSIM4v3cgso; + return(OK); + case BSIM4v3_MOD_CGDO: + value->rValue = model->BSIM4v3cgdo; + return(OK); + case BSIM4v3_MOD_CGBO: + value->rValue = model->BSIM4v3cgbo; + return(OK); + case BSIM4v3_MOD_XPART: + value->rValue = model->BSIM4v3xpart; + return(OK); + case BSIM4v3_MOD_RSH: + value->rValue = model->BSIM4v3sheetResistance; + return(OK); + case BSIM4v3_MOD_JSS: + value->rValue = model->BSIM4v3SjctSatCurDensity; + return(OK); + case BSIM4v3_MOD_JSWS: + value->rValue = model->BSIM4v3SjctSidewallSatCurDensity; + return(OK); + case BSIM4v3_MOD_JSWGS: + value->rValue = model->BSIM4v3SjctGateSidewallSatCurDensity; + return(OK); + case BSIM4v3_MOD_PBS: + value->rValue = model->BSIM4v3SbulkJctPotential; + return(OK); + case BSIM4v3_MOD_MJS: + value->rValue = model->BSIM4v3SbulkJctBotGradingCoeff; + return(OK); + case BSIM4v3_MOD_PBSWS: + value->rValue = model->BSIM4v3SsidewallJctPotential; + return(OK); + case BSIM4v3_MOD_MJSWS: + value->rValue = model->BSIM4v3SbulkJctSideGradingCoeff; + return(OK); + case BSIM4v3_MOD_CJS: + value->rValue = model->BSIM4v3SunitAreaJctCap; + return(OK); + case BSIM4v3_MOD_CJSWS: + value->rValue = model->BSIM4v3SunitLengthSidewallJctCap; + return(OK); + case BSIM4v3_MOD_PBSWGS: + value->rValue = model->BSIM4v3SGatesidewallJctPotential; + return(OK); + case BSIM4v3_MOD_MJSWGS: + value->rValue = model->BSIM4v3SbulkJctGateSideGradingCoeff; + return(OK); + case BSIM4v3_MOD_CJSWGS: + value->rValue = model->BSIM4v3SunitLengthGateSidewallJctCap; + return(OK); + case BSIM4v3_MOD_NJS: + value->rValue = model->BSIM4v3SjctEmissionCoeff; + return(OK); + case BSIM4v3_MOD_XTIS: + value->rValue = model->BSIM4v3SjctTempExponent; + return(OK); + case BSIM4v3_MOD_JSD: + value->rValue = model->BSIM4v3DjctSatCurDensity; + return(OK); + case BSIM4v3_MOD_JSWD: + value->rValue = model->BSIM4v3DjctSidewallSatCurDensity; + return(OK); + case BSIM4v3_MOD_JSWGD: + value->rValue = model->BSIM4v3DjctGateSidewallSatCurDensity; + return(OK); + case BSIM4v3_MOD_PBD: + value->rValue = model->BSIM4v3DbulkJctPotential; + return(OK); + case BSIM4v3_MOD_MJD: + value->rValue = model->BSIM4v3DbulkJctBotGradingCoeff; + return(OK); + case BSIM4v3_MOD_PBSWD: + value->rValue = model->BSIM4v3DsidewallJctPotential; + return(OK); + case BSIM4v3_MOD_MJSWD: + value->rValue = model->BSIM4v3DbulkJctSideGradingCoeff; + return(OK); + case BSIM4v3_MOD_CJD: + value->rValue = model->BSIM4v3DunitAreaJctCap; + return(OK); + case BSIM4v3_MOD_CJSWD: + value->rValue = model->BSIM4v3DunitLengthSidewallJctCap; + return(OK); + case BSIM4v3_MOD_PBSWGD: + value->rValue = model->BSIM4v3DGatesidewallJctPotential; + return(OK); + case BSIM4v3_MOD_MJSWGD: + value->rValue = model->BSIM4v3DbulkJctGateSideGradingCoeff; + return(OK); + case BSIM4v3_MOD_CJSWGD: + value->rValue = model->BSIM4v3DunitLengthGateSidewallJctCap; + return(OK); + case BSIM4v3_MOD_NJD: + value->rValue = model->BSIM4v3DjctEmissionCoeff; + return(OK); + case BSIM4v3_MOD_XTID: + value->rValue = model->BSIM4v3DjctTempExponent; + return(OK); + case BSIM4v3_MOD_LINT: + value->rValue = model->BSIM4v3Lint; + return(OK); + case BSIM4v3_MOD_LL: + value->rValue = model->BSIM4v3Ll; + return(OK); + case BSIM4v3_MOD_LLC: + value->rValue = model->BSIM4v3Llc; + return(OK); + case BSIM4v3_MOD_LLN: + value->rValue = model->BSIM4v3Lln; + return(OK); + case BSIM4v3_MOD_LW: + value->rValue = model->BSIM4v3Lw; + return(OK); + case BSIM4v3_MOD_LWC: + value->rValue = model->BSIM4v3Lwc; + return(OK); + case BSIM4v3_MOD_LWN: + value->rValue = model->BSIM4v3Lwn; + return(OK); + case BSIM4v3_MOD_LWL: + value->rValue = model->BSIM4v3Lwl; + return(OK); + case BSIM4v3_MOD_LWLC: + value->rValue = model->BSIM4v3Lwlc; + return(OK); + case BSIM4v3_MOD_LMIN: + value->rValue = model->BSIM4v3Lmin; + return(OK); + case BSIM4v3_MOD_LMAX: + value->rValue = model->BSIM4v3Lmax; + return(OK); + case BSIM4v3_MOD_WINT: + value->rValue = model->BSIM4v3Wint; + return(OK); + case BSIM4v3_MOD_WL: + value->rValue = model->BSIM4v3Wl; + return(OK); + case BSIM4v3_MOD_WLC: + value->rValue = model->BSIM4v3Wlc; + return(OK); + case BSIM4v3_MOD_WLN: + value->rValue = model->BSIM4v3Wln; + return(OK); + case BSIM4v3_MOD_WW: + value->rValue = model->BSIM4v3Ww; + return(OK); + case BSIM4v3_MOD_WWC: + value->rValue = model->BSIM4v3Wwc; + return(OK); + case BSIM4v3_MOD_WWN: + value->rValue = model->BSIM4v3Wwn; + return(OK); + case BSIM4v3_MOD_WWL: + value->rValue = model->BSIM4v3Wwl; + return(OK); + case BSIM4v3_MOD_WWLC: + value->rValue = model->BSIM4v3Wwlc; + return(OK); + case BSIM4v3_MOD_WMIN: + value->rValue = model->BSIM4v3Wmin; + return(OK); + case BSIM4v3_MOD_WMAX: + value->rValue = model->BSIM4v3Wmax; + return(OK); + + /* stress effect */ + case BSIM4v3_MOD_SAREF: + value->rValue = model->BSIM4v3saref; + return(OK); + case BSIM4v3_MOD_SBREF: + value->rValue = model->BSIM4v3sbref; + return(OK); + case BSIM4v3_MOD_WLOD: + value->rValue = model->BSIM4v3wlod; + return(OK); + case BSIM4v3_MOD_KU0: + value->rValue = model->BSIM4v3ku0; + return(OK); + case BSIM4v3_MOD_KVSAT: + value->rValue = model->BSIM4v3kvsat; + return(OK); + case BSIM4v3_MOD_KVTH0: + value->rValue = model->BSIM4v3kvth0; + return(OK); + case BSIM4v3_MOD_TKU0: + value->rValue = model->BSIM4v3tku0; + return(OK); + case BSIM4v3_MOD_LLODKU0: + value->rValue = model->BSIM4v3llodku0; + return(OK); + case BSIM4v3_MOD_WLODKU0: + value->rValue = model->BSIM4v3wlodku0; + return(OK); + case BSIM4v3_MOD_LLODVTH: + value->rValue = model->BSIM4v3llodvth; + return(OK); + case BSIM4v3_MOD_WLODVTH: + value->rValue = model->BSIM4v3wlodvth; + return(OK); + case BSIM4v3_MOD_LKU0: + value->rValue = model->BSIM4v3lku0; + return(OK); + case BSIM4v3_MOD_WKU0: + value->rValue = model->BSIM4v3wku0; + return(OK); + case BSIM4v3_MOD_PKU0: + value->rValue = model->BSIM4v3pku0; + return(OK); + case BSIM4v3_MOD_LKVTH0: + value->rValue = model->BSIM4v3lkvth0; + return(OK); + case BSIM4v3_MOD_WKVTH0: + value->rValue = model->BSIM4v3wkvth0; + return(OK); + case BSIM4v3_MOD_PKVTH0: + value->rValue = model->BSIM4v3pkvth0; + return(OK); + case BSIM4v3_MOD_STK2: + value->rValue = model->BSIM4v3stk2; + return(OK); + case BSIM4v3_MOD_LODK2: + value->rValue = model->BSIM4v3lodk2; + return(OK); + case BSIM4v3_MOD_STETA0: + value->rValue = model->BSIM4v3steta0; + return(OK); + case BSIM4v3_MOD_LODETA0: + value->rValue = model->BSIM4v3lodeta0; + return(OK); + + case BSIM4v3_MOD_NOIA: + value->rValue = model->BSIM4v3oxideTrapDensityA; + return(OK); + case BSIM4v3_MOD_NOIB: + value->rValue = model->BSIM4v3oxideTrapDensityB; + return(OK); + case BSIM4v3_MOD_NOIC: + value->rValue = model->BSIM4v3oxideTrapDensityC; + return(OK); + case BSIM4v3_MOD_EM: + value->rValue = model->BSIM4v3em; + return(OK); + case BSIM4v3_MOD_EF: + value->rValue = model->BSIM4v3ef; + return(OK); + case BSIM4v3_MOD_AF: + value->rValue = model->BSIM4v3af; + return(OK); + case BSIM4v3_MOD_KF: + value->rValue = model->BSIM4v3kf; + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + + + diff --git a/src/spicelib/devices/bsim4v3/b4v3mdel.c b/src/spicelib/devices/bsim4v3/b4v3mdel.c new file mode 100644 index 000000000..0bf14ab51 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3mdel.c @@ -0,0 +1,46 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3mdel.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v3def.h" +#include "sperror.h" + +int +BSIM4v3mDelete(inModel,modname,kill) +GENmodel **inModel; +IFuid modname; +GENmodel *kill; +{ +BSIM4v3model **model = (BSIM4v3model**)inModel; +BSIM4v3model *modfast = (BSIM4v3model*)kill; +BSIM4v3instance *here; +BSIM4v3instance *prev = NULL; +BSIM4v3model **oldmod; + + oldmod = model; + for (; *model ; model = &((*model)->BSIM4v3nextModel)) + { if ((*model)->BSIM4v3modName == modname || + (modfast && *model == modfast)) + goto delgot; + oldmod = model; + } + return(E_NOMOD); + +delgot: + *oldmod = (*model)->BSIM4v3nextModel; /* cut deleted device out of list */ + for (here = (*model)->BSIM4v3instances; here; here = here->BSIM4v3nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + FREE(*model); + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3mpar.c b/src/spicelib/devices/bsim4v3/b4v3mpar.c new file mode 100644 index 000000000..e53ef1ac2 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3mpar.c @@ -0,0 +1,2682 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3mpar.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include "bsim4v3def.h" +#include "ifsim.h" +#include "sperror.h" +#include "const.h" + +int +BSIM4v3mParam(param,value,inMod) +int param; +IFvalue *value; +GENmodel *inMod; +{ + BSIM4v3model *mod = (BSIM4v3model*)inMod; + switch(param) + { case BSIM4v3_MOD_MOBMOD : + mod->BSIM4v3mobMod = value->iValue; + mod->BSIM4v3mobModGiven = TRUE; + break; + case BSIM4v3_MOD_BINUNIT : + mod->BSIM4v3binUnit = value->iValue; + mod->BSIM4v3binUnitGiven = TRUE; + break; + case BSIM4v3_MOD_PARAMCHK : + mod->BSIM4v3paramChk = value->iValue; + mod->BSIM4v3paramChkGiven = TRUE; + break; + case BSIM4v3_MOD_CAPMOD : + mod->BSIM4v3capMod = value->iValue; + mod->BSIM4v3capModGiven = TRUE; + break; + case BSIM4v3_MOD_DIOMOD : + mod->BSIM4v3dioMod = value->iValue; + mod->BSIM4v3dioModGiven = TRUE; + break; + case BSIM4v3_MOD_RDSMOD : + mod->BSIM4v3rdsMod = value->iValue; + mod->BSIM4v3rdsModGiven = TRUE; + break; + case BSIM4v3_MOD_TRNQSMOD : + mod->BSIM4v3trnqsMod = value->iValue; + mod->BSIM4v3trnqsModGiven = TRUE; + break; + case BSIM4v3_MOD_ACNQSMOD : + mod->BSIM4v3acnqsMod = value->iValue; + mod->BSIM4v3acnqsModGiven = TRUE; + break; + case BSIM4v3_MOD_RBODYMOD : + mod->BSIM4v3rbodyMod = value->iValue; + mod->BSIM4v3rbodyModGiven = TRUE; + break; + case BSIM4v3_MOD_RGATEMOD : + mod->BSIM4v3rgateMod = value->iValue; + mod->BSIM4v3rgateModGiven = TRUE; + break; + case BSIM4v3_MOD_PERMOD : + mod->BSIM4v3perMod = value->iValue; + mod->BSIM4v3perModGiven = TRUE; + break; + case BSIM4v3_MOD_GEOMOD : + mod->BSIM4v3geoMod = value->iValue; + mod->BSIM4v3geoModGiven = TRUE; + break; + case BSIM4v3_MOD_FNOIMOD : + mod->BSIM4v3fnoiMod = value->iValue; + mod->BSIM4v3fnoiModGiven = TRUE; + break; + case BSIM4v3_MOD_TNOIMOD : + mod->BSIM4v3tnoiMod = value->iValue; + mod->BSIM4v3tnoiModGiven = TRUE; + break; + case BSIM4v3_MOD_IGCMOD : + mod->BSIM4v3igcMod = value->iValue; + mod->BSIM4v3igcModGiven = TRUE; + break; + case BSIM4v3_MOD_IGBMOD : + mod->BSIM4v3igbMod = value->iValue; + mod->BSIM4v3igbModGiven = TRUE; + break; + case BSIM4v3_MOD_TEMPMOD : + mod->BSIM4v3tempMod = value->iValue; + mod->BSIM4v3tempModGiven = TRUE; + break; + case BSIM4v3_MOD_VERSION : + mod->BSIM4v3version = value->sValue; + mod->BSIM4v3versionGiven = TRUE; + break; + case BSIM4v3_MOD_TOXREF : + mod->BSIM4v3toxref = value->rValue; + mod->BSIM4v3toxrefGiven = TRUE; + break; + case BSIM4v3_MOD_TOXE : + mod->BSIM4v3toxe = value->rValue; + mod->BSIM4v3toxeGiven = TRUE; + break; + case BSIM4v3_MOD_TOXP : + mod->BSIM4v3toxp = value->rValue; + mod->BSIM4v3toxpGiven = TRUE; + break; + case BSIM4v3_MOD_TOXM : + mod->BSIM4v3toxm = value->rValue; + mod->BSIM4v3toxmGiven = TRUE; + break; + case BSIM4v3_MOD_DTOX : + mod->BSIM4v3dtox = value->rValue; + mod->BSIM4v3dtoxGiven = TRUE; + break; + case BSIM4v3_MOD_EPSROX : + mod->BSIM4v3epsrox = value->rValue; + mod->BSIM4v3epsroxGiven = TRUE; + break; + + case BSIM4v3_MOD_CDSC : + mod->BSIM4v3cdsc = value->rValue; + mod->BSIM4v3cdscGiven = TRUE; + break; + case BSIM4v3_MOD_CDSCB : + mod->BSIM4v3cdscb = value->rValue; + mod->BSIM4v3cdscbGiven = TRUE; + break; + + case BSIM4v3_MOD_CDSCD : + mod->BSIM4v3cdscd = value->rValue; + mod->BSIM4v3cdscdGiven = TRUE; + break; + + case BSIM4v3_MOD_CIT : + mod->BSIM4v3cit = value->rValue; + mod->BSIM4v3citGiven = TRUE; + break; + case BSIM4v3_MOD_NFACTOR : + mod->BSIM4v3nfactor = value->rValue; + mod->BSIM4v3nfactorGiven = TRUE; + break; + case BSIM4v3_MOD_XJ: + mod->BSIM4v3xj = value->rValue; + mod->BSIM4v3xjGiven = TRUE; + break; + case BSIM4v3_MOD_VSAT: + mod->BSIM4v3vsat = value->rValue; + mod->BSIM4v3vsatGiven = TRUE; + break; + case BSIM4v3_MOD_A0: + mod->BSIM4v3a0 = value->rValue; + mod->BSIM4v3a0Given = TRUE; + break; + + case BSIM4v3_MOD_AGS: + mod->BSIM4v3ags= value->rValue; + mod->BSIM4v3agsGiven = TRUE; + break; + + case BSIM4v3_MOD_A1: + mod->BSIM4v3a1 = value->rValue; + mod->BSIM4v3a1Given = TRUE; + break; + case BSIM4v3_MOD_A2: + mod->BSIM4v3a2 = value->rValue; + mod->BSIM4v3a2Given = TRUE; + break; + case BSIM4v3_MOD_AT: + mod->BSIM4v3at = value->rValue; + mod->BSIM4v3atGiven = TRUE; + break; + case BSIM4v3_MOD_KETA: + mod->BSIM4v3keta = value->rValue; + mod->BSIM4v3ketaGiven = TRUE; + break; + case BSIM4v3_MOD_NSUB: + mod->BSIM4v3nsub = value->rValue; + mod->BSIM4v3nsubGiven = TRUE; + break; + case BSIM4v3_MOD_NDEP: + mod->BSIM4v3ndep = value->rValue; + mod->BSIM4v3ndepGiven = TRUE; + if (mod->BSIM4v3ndep > 1.0e20) + mod->BSIM4v3ndep *= 1.0e-6; + break; + case BSIM4v3_MOD_NSD: + mod->BSIM4v3nsd = value->rValue; + mod->BSIM4v3nsdGiven = TRUE; + if (mod->BSIM4v3nsd > 1.0e23) + mod->BSIM4v3nsd *= 1.0e-6; + break; + case BSIM4v3_MOD_NGATE: + mod->BSIM4v3ngate = value->rValue; + mod->BSIM4v3ngateGiven = TRUE; + if (mod->BSIM4v3ngate > 1.0e23) + mod->BSIM4v3ngate *= 1.0e-6; + break; + case BSIM4v3_MOD_GAMMA1: + mod->BSIM4v3gamma1 = value->rValue; + mod->BSIM4v3gamma1Given = TRUE; + break; + case BSIM4v3_MOD_GAMMA2: + mod->BSIM4v3gamma2 = value->rValue; + mod->BSIM4v3gamma2Given = TRUE; + break; + case BSIM4v3_MOD_VBX: + mod->BSIM4v3vbx = value->rValue; + mod->BSIM4v3vbxGiven = TRUE; + break; + case BSIM4v3_MOD_VBM: + mod->BSIM4v3vbm = value->rValue; + mod->BSIM4v3vbmGiven = TRUE; + break; + case BSIM4v3_MOD_XT: + mod->BSIM4v3xt = value->rValue; + mod->BSIM4v3xtGiven = TRUE; + break; + case BSIM4v3_MOD_K1: + mod->BSIM4v3k1 = value->rValue; + mod->BSIM4v3k1Given = TRUE; + break; + case BSIM4v3_MOD_KT1: + mod->BSIM4v3kt1 = value->rValue; + mod->BSIM4v3kt1Given = TRUE; + break; + case BSIM4v3_MOD_KT1L: + mod->BSIM4v3kt1l = value->rValue; + mod->BSIM4v3kt1lGiven = TRUE; + break; + case BSIM4v3_MOD_KT2: + mod->BSIM4v3kt2 = value->rValue; + mod->BSIM4v3kt2Given = TRUE; + break; + case BSIM4v3_MOD_K2: + mod->BSIM4v3k2 = value->rValue; + mod->BSIM4v3k2Given = TRUE; + break; + case BSIM4v3_MOD_K3: + mod->BSIM4v3k3 = value->rValue; + mod->BSIM4v3k3Given = TRUE; + break; + case BSIM4v3_MOD_K3B: + mod->BSIM4v3k3b = value->rValue; + mod->BSIM4v3k3bGiven = TRUE; + break; + case BSIM4v3_MOD_LPE0: + mod->BSIM4v3lpe0 = value->rValue; + mod->BSIM4v3lpe0Given = TRUE; + break; + case BSIM4v3_MOD_LPEB: + mod->BSIM4v3lpeb = value->rValue; + mod->BSIM4v3lpebGiven = TRUE; + break; + case BSIM4v3_MOD_DVTP0: + mod->BSIM4v3dvtp0 = value->rValue; + mod->BSIM4v3dvtp0Given = TRUE; + break; + case BSIM4v3_MOD_DVTP1: + mod->BSIM4v3dvtp1 = value->rValue; + mod->BSIM4v3dvtp1Given = TRUE; + break; + case BSIM4v3_MOD_W0: + mod->BSIM4v3w0 = value->rValue; + mod->BSIM4v3w0Given = TRUE; + break; + case BSIM4v3_MOD_DVT0: + mod->BSIM4v3dvt0 = value->rValue; + mod->BSIM4v3dvt0Given = TRUE; + break; + case BSIM4v3_MOD_DVT1: + mod->BSIM4v3dvt1 = value->rValue; + mod->BSIM4v3dvt1Given = TRUE; + break; + case BSIM4v3_MOD_DVT2: + mod->BSIM4v3dvt2 = value->rValue; + mod->BSIM4v3dvt2Given = TRUE; + break; + case BSIM4v3_MOD_DVT0W: + mod->BSIM4v3dvt0w = value->rValue; + mod->BSIM4v3dvt0wGiven = TRUE; + break; + case BSIM4v3_MOD_DVT1W: + mod->BSIM4v3dvt1w = value->rValue; + mod->BSIM4v3dvt1wGiven = TRUE; + break; + case BSIM4v3_MOD_DVT2W: + mod->BSIM4v3dvt2w = value->rValue; + mod->BSIM4v3dvt2wGiven = TRUE; + break; + case BSIM4v3_MOD_DROUT: + mod->BSIM4v3drout = value->rValue; + mod->BSIM4v3droutGiven = TRUE; + break; + case BSIM4v3_MOD_DSUB: + mod->BSIM4v3dsub = value->rValue; + mod->BSIM4v3dsubGiven = TRUE; + break; + case BSIM4v3_MOD_VTH0: + mod->BSIM4v3vth0 = value->rValue; + mod->BSIM4v3vth0Given = TRUE; + break; + case BSIM4v3_MOD_EU: + mod->BSIM4v3eu = value->rValue; + mod->BSIM4v3euGiven = TRUE; + break; + case BSIM4v3_MOD_UA: + mod->BSIM4v3ua = value->rValue; + mod->BSIM4v3uaGiven = TRUE; + break; + case BSIM4v3_MOD_UA1: + mod->BSIM4v3ua1 = value->rValue; + mod->BSIM4v3ua1Given = TRUE; + break; + case BSIM4v3_MOD_UB: + mod->BSIM4v3ub = value->rValue; + mod->BSIM4v3ubGiven = TRUE; + break; + case BSIM4v3_MOD_UB1: + mod->BSIM4v3ub1 = value->rValue; + mod->BSIM4v3ub1Given = TRUE; + break; + case BSIM4v3_MOD_UC: + mod->BSIM4v3uc = value->rValue; + mod->BSIM4v3ucGiven = TRUE; + break; + case BSIM4v3_MOD_UC1: + mod->BSIM4v3uc1 = value->rValue; + mod->BSIM4v3uc1Given = TRUE; + break; + case BSIM4v3_MOD_U0 : + mod->BSIM4v3u0 = value->rValue; + mod->BSIM4v3u0Given = TRUE; + break; + case BSIM4v3_MOD_UTE : + mod->BSIM4v3ute = value->rValue; + mod->BSIM4v3uteGiven = TRUE; + break; + case BSIM4v3_MOD_VOFF: + mod->BSIM4v3voff = value->rValue; + mod->BSIM4v3voffGiven = TRUE; + break; + case BSIM4v3_MOD_VOFFL: + mod->BSIM4v3voffl = value->rValue; + mod->BSIM4v3vofflGiven = TRUE; + break; + case BSIM4v3_MOD_MINV: + mod->BSIM4v3minv = value->rValue; + mod->BSIM4v3minvGiven = TRUE; + break; + case BSIM4v3_MOD_FPROUT: + mod->BSIM4v3fprout = value->rValue; + mod->BSIM4v3fproutGiven = TRUE; + break; + case BSIM4v3_MOD_PDITS: + mod->BSIM4v3pdits = value->rValue; + mod->BSIM4v3pditsGiven = TRUE; + break; + case BSIM4v3_MOD_PDITSD: + mod->BSIM4v3pditsd = value->rValue; + mod->BSIM4v3pditsdGiven = TRUE; + break; + case BSIM4v3_MOD_PDITSL: + mod->BSIM4v3pditsl = value->rValue; + mod->BSIM4v3pditslGiven = TRUE; + break; + case BSIM4v3_MOD_DELTA : + mod->BSIM4v3delta = value->rValue; + mod->BSIM4v3deltaGiven = TRUE; + break; + case BSIM4v3_MOD_RDSW: + mod->BSIM4v3rdsw = value->rValue; + mod->BSIM4v3rdswGiven = TRUE; + break; + case BSIM4v3_MOD_RDSWMIN: + mod->BSIM4v3rdswmin = value->rValue; + mod->BSIM4v3rdswminGiven = TRUE; + break; + case BSIM4v3_MOD_RDWMIN: + mod->BSIM4v3rdwmin = value->rValue; + mod->BSIM4v3rdwminGiven = TRUE; + break; + case BSIM4v3_MOD_RSWMIN: + mod->BSIM4v3rswmin = value->rValue; + mod->BSIM4v3rswminGiven = TRUE; + break; + case BSIM4v3_MOD_RDW: + mod->BSIM4v3rdw = value->rValue; + mod->BSIM4v3rdwGiven = TRUE; + break; + case BSIM4v3_MOD_RSW: + mod->BSIM4v3rsw = value->rValue; + mod->BSIM4v3rswGiven = TRUE; + break; + case BSIM4v3_MOD_PRWG: + mod->BSIM4v3prwg = value->rValue; + mod->BSIM4v3prwgGiven = TRUE; + break; + case BSIM4v3_MOD_PRWB: + mod->BSIM4v3prwb = value->rValue; + mod->BSIM4v3prwbGiven = TRUE; + break; + case BSIM4v3_MOD_PRT: + mod->BSIM4v3prt = value->rValue; + mod->BSIM4v3prtGiven = TRUE; + break; + case BSIM4v3_MOD_ETA0: + mod->BSIM4v3eta0 = value->rValue; + mod->BSIM4v3eta0Given = TRUE; + break; + case BSIM4v3_MOD_ETAB: + mod->BSIM4v3etab = value->rValue; + mod->BSIM4v3etabGiven = TRUE; + break; + case BSIM4v3_MOD_PCLM: + mod->BSIM4v3pclm = value->rValue; + mod->BSIM4v3pclmGiven = TRUE; + break; + case BSIM4v3_MOD_PDIBL1: + mod->BSIM4v3pdibl1 = value->rValue; + mod->BSIM4v3pdibl1Given = TRUE; + break; + case BSIM4v3_MOD_PDIBL2: + mod->BSIM4v3pdibl2 = value->rValue; + mod->BSIM4v3pdibl2Given = TRUE; + break; + case BSIM4v3_MOD_PDIBLB: + mod->BSIM4v3pdiblb = value->rValue; + mod->BSIM4v3pdiblbGiven = TRUE; + break; + case BSIM4v3_MOD_PSCBE1: + mod->BSIM4v3pscbe1 = value->rValue; + mod->BSIM4v3pscbe1Given = TRUE; + break; + case BSIM4v3_MOD_PSCBE2: + mod->BSIM4v3pscbe2 = value->rValue; + mod->BSIM4v3pscbe2Given = TRUE; + break; + case BSIM4v3_MOD_PVAG: + mod->BSIM4v3pvag = value->rValue; + mod->BSIM4v3pvagGiven = TRUE; + break; + case BSIM4v3_MOD_WR : + mod->BSIM4v3wr = value->rValue; + mod->BSIM4v3wrGiven = TRUE; + break; + case BSIM4v3_MOD_DWG : + mod->BSIM4v3dwg = value->rValue; + mod->BSIM4v3dwgGiven = TRUE; + break; + case BSIM4v3_MOD_DWB : + mod->BSIM4v3dwb = value->rValue; + mod->BSIM4v3dwbGiven = TRUE; + break; + case BSIM4v3_MOD_B0 : + mod->BSIM4v3b0 = value->rValue; + mod->BSIM4v3b0Given = TRUE; + break; + case BSIM4v3_MOD_B1 : + mod->BSIM4v3b1 = value->rValue; + mod->BSIM4v3b1Given = TRUE; + break; + case BSIM4v3_MOD_ALPHA0 : + mod->BSIM4v3alpha0 = value->rValue; + mod->BSIM4v3alpha0Given = TRUE; + break; + case BSIM4v3_MOD_ALPHA1 : + mod->BSIM4v3alpha1 = value->rValue; + mod->BSIM4v3alpha1Given = TRUE; + break; + case BSIM4v3_MOD_AGIDL : + mod->BSIM4v3agidl = value->rValue; + mod->BSIM4v3agidlGiven = TRUE; + break; + case BSIM4v3_MOD_BGIDL : + mod->BSIM4v3bgidl = value->rValue; + mod->BSIM4v3bgidlGiven = TRUE; + break; + case BSIM4v3_MOD_CGIDL : + mod->BSIM4v3cgidl = value->rValue; + mod->BSIM4v3cgidlGiven = TRUE; + break; + case BSIM4v3_MOD_PHIN : + mod->BSIM4v3phin = value->rValue; + mod->BSIM4v3phinGiven = TRUE; + break; + case BSIM4v3_MOD_EGIDL : + mod->BSIM4v3egidl = value->rValue; + mod->BSIM4v3egidlGiven = TRUE; + break; + case BSIM4v3_MOD_AIGC : + mod->BSIM4v3aigc = value->rValue; + mod->BSIM4v3aigcGiven = TRUE; + break; + case BSIM4v3_MOD_BIGC : + mod->BSIM4v3bigc = value->rValue; + mod->BSIM4v3bigcGiven = TRUE; + break; + case BSIM4v3_MOD_CIGC : + mod->BSIM4v3cigc = value->rValue; + mod->BSIM4v3cigcGiven = TRUE; + break; + case BSIM4v3_MOD_AIGSD : + mod->BSIM4v3aigsd = value->rValue; + mod->BSIM4v3aigsdGiven = TRUE; + break; + case BSIM4v3_MOD_BIGSD : + mod->BSIM4v3bigsd = value->rValue; + mod->BSIM4v3bigsdGiven = TRUE; + break; + case BSIM4v3_MOD_CIGSD : + mod->BSIM4v3cigsd = value->rValue; + mod->BSIM4v3cigsdGiven = TRUE; + break; + case BSIM4v3_MOD_AIGBACC : + mod->BSIM4v3aigbacc = value->rValue; + mod->BSIM4v3aigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_BIGBACC : + mod->BSIM4v3bigbacc = value->rValue; + mod->BSIM4v3bigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_CIGBACC : + mod->BSIM4v3cigbacc = value->rValue; + mod->BSIM4v3cigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_AIGBINV : + mod->BSIM4v3aigbinv = value->rValue; + mod->BSIM4v3aigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_BIGBINV : + mod->BSIM4v3bigbinv = value->rValue; + mod->BSIM4v3bigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_CIGBINV : + mod->BSIM4v3cigbinv = value->rValue; + mod->BSIM4v3cigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_NIGC : + mod->BSIM4v3nigc = value->rValue; + mod->BSIM4v3nigcGiven = TRUE; + break; + case BSIM4v3_MOD_NIGBINV : + mod->BSIM4v3nigbinv = value->rValue; + mod->BSIM4v3nigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_NIGBACC : + mod->BSIM4v3nigbacc = value->rValue; + mod->BSIM4v3nigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_NTOX : + mod->BSIM4v3ntox = value->rValue; + mod->BSIM4v3ntoxGiven = TRUE; + break; + case BSIM4v3_MOD_EIGBINV : + mod->BSIM4v3eigbinv = value->rValue; + mod->BSIM4v3eigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_PIGCD : + mod->BSIM4v3pigcd = value->rValue; + mod->BSIM4v3pigcdGiven = TRUE; + break; + case BSIM4v3_MOD_POXEDGE : + mod->BSIM4v3poxedge = value->rValue; + mod->BSIM4v3poxedgeGiven = TRUE; + break; + case BSIM4v3_MOD_XRCRG1 : + mod->BSIM4v3xrcrg1 = value->rValue; + mod->BSIM4v3xrcrg1Given = TRUE; + break; + case BSIM4v3_MOD_XRCRG2 : + mod->BSIM4v3xrcrg2 = value->rValue; + mod->BSIM4v3xrcrg2Given = TRUE; + break; + case BSIM4v3_MOD_LAMBDA : + mod->BSIM4v3lambda = value->rValue; + mod->BSIM4v3lambdaGiven = TRUE; + break; + case BSIM4v3_MOD_VTL : + mod->BSIM4v3vtl = value->rValue; + mod->BSIM4v3vtlGiven = TRUE; + break; + case BSIM4v3_MOD_XN: + mod->BSIM4v3xn = value->rValue; + mod->BSIM4v3xnGiven = TRUE; + break; + case BSIM4v3_MOD_LC: + mod->BSIM4v3lc = value->rValue; + mod->BSIM4v3lcGiven = TRUE; + break; + case BSIM4v3_MOD_TNOIA : + mod->BSIM4v3tnoia = value->rValue; + mod->BSIM4v3tnoiaGiven = TRUE; + break; + case BSIM4v3_MOD_TNOIB : + mod->BSIM4v3tnoib = value->rValue; + mod->BSIM4v3tnoibGiven = TRUE; + break; + case BSIM4v3_MOD_RNOIA : + mod->BSIM4v3rnoia = value->rValue; + mod->BSIM4v3rnoiaGiven = TRUE; + break; + case BSIM4v3_MOD_RNOIB : + mod->BSIM4v3rnoib = value->rValue; + mod->BSIM4v3rnoibGiven = TRUE; + break; + case BSIM4v3_MOD_NTNOI : + mod->BSIM4v3ntnoi = value->rValue; + mod->BSIM4v3ntnoiGiven = TRUE; + break; + + /* stress effect */ + case BSIM4v3_MOD_SAREF : + mod->BSIM4v3saref = value->rValue; + mod->BSIM4v3sarefGiven = TRUE; + break; + case BSIM4v3_MOD_SBREF : + mod->BSIM4v3sbref = value->rValue; + mod->BSIM4v3sbrefGiven = TRUE; + break; + case BSIM4v3_MOD_WLOD : + mod->BSIM4v3wlod = value->rValue; + mod->BSIM4v3wlodGiven = TRUE; + break; + case BSIM4v3_MOD_KU0 : + mod->BSIM4v3ku0 = value->rValue; + mod->BSIM4v3ku0Given = TRUE; + break; + case BSIM4v3_MOD_KVSAT : + mod->BSIM4v3kvsat = value->rValue; + mod->BSIM4v3kvsatGiven = TRUE; + break; + case BSIM4v3_MOD_KVTH0 : + mod->BSIM4v3kvth0 = value->rValue; + mod->BSIM4v3kvth0Given = TRUE; + break; + case BSIM4v3_MOD_TKU0 : + mod->BSIM4v3tku0 = value->rValue; + mod->BSIM4v3tku0Given = TRUE; + break; + case BSIM4v3_MOD_LLODKU0 : + mod->BSIM4v3llodku0 = value->rValue; + mod->BSIM4v3llodku0Given = TRUE; + break; + case BSIM4v3_MOD_WLODKU0 : + mod->BSIM4v3wlodku0 = value->rValue; + mod->BSIM4v3wlodku0Given = TRUE; + break; + case BSIM4v3_MOD_LLODVTH : + mod->BSIM4v3llodvth = value->rValue; + mod->BSIM4v3llodvthGiven = TRUE; + break; + case BSIM4v3_MOD_WLODVTH : + mod->BSIM4v3wlodvth = value->rValue; + mod->BSIM4v3wlodvthGiven = TRUE; + break; + case BSIM4v3_MOD_LKU0 : + mod->BSIM4v3lku0 = value->rValue; + mod->BSIM4v3lku0Given = TRUE; + break; + case BSIM4v3_MOD_WKU0 : + mod->BSIM4v3wku0 = value->rValue; + mod->BSIM4v3wku0Given = TRUE; + break; + case BSIM4v3_MOD_PKU0 : + mod->BSIM4v3pku0 = value->rValue; + mod->BSIM4v3pku0Given = TRUE; + break; + case BSIM4v3_MOD_LKVTH0 : + mod->BSIM4v3lkvth0 = value->rValue; + mod->BSIM4v3lkvth0Given = TRUE; + break; + case BSIM4v3_MOD_WKVTH0 : + mod->BSIM4v3wkvth0 = value->rValue; + mod->BSIM4v3wkvth0Given = TRUE; + break; + case BSIM4v3_MOD_PKVTH0 : + mod->BSIM4v3pkvth0 = value->rValue; + mod->BSIM4v3pkvth0Given = TRUE; + break; + case BSIM4v3_MOD_STK2 : + mod->BSIM4v3stk2 = value->rValue; + mod->BSIM4v3stk2Given = TRUE; + break; + case BSIM4v3_MOD_LODK2 : + mod->BSIM4v3lodk2 = value->rValue; + mod->BSIM4v3lodk2Given = TRUE; + break; + case BSIM4v3_MOD_STETA0 : + mod->BSIM4v3steta0 = value->rValue; + mod->BSIM4v3steta0Given = TRUE; + break; + case BSIM4v3_MOD_LODETA0 : + mod->BSIM4v3lodeta0 = value->rValue; + mod->BSIM4v3lodeta0Given = TRUE; + break; + + case BSIM4v3_MOD_BETA0 : + mod->BSIM4v3beta0 = value->rValue; + mod->BSIM4v3beta0Given = TRUE; + break; + case BSIM4v3_MOD_IJTHDFWD : + mod->BSIM4v3ijthdfwd = value->rValue; + mod->BSIM4v3ijthdfwdGiven = TRUE; + break; + case BSIM4v3_MOD_IJTHSFWD : + mod->BSIM4v3ijthsfwd = value->rValue; + mod->BSIM4v3ijthsfwdGiven = TRUE; + break; + case BSIM4v3_MOD_IJTHDREV : + mod->BSIM4v3ijthdrev = value->rValue; + mod->BSIM4v3ijthdrevGiven = TRUE; + break; + case BSIM4v3_MOD_IJTHSREV : + mod->BSIM4v3ijthsrev = value->rValue; + mod->BSIM4v3ijthsrevGiven = TRUE; + break; + case BSIM4v3_MOD_XJBVD : + mod->BSIM4v3xjbvd = value->rValue; + mod->BSIM4v3xjbvdGiven = TRUE; + break; + case BSIM4v3_MOD_XJBVS : + mod->BSIM4v3xjbvs = value->rValue; + mod->BSIM4v3xjbvsGiven = TRUE; + break; + case BSIM4v3_MOD_BVD : + mod->BSIM4v3bvd = value->rValue; + mod->BSIM4v3bvdGiven = TRUE; + break; + case BSIM4v3_MOD_BVS : + mod->BSIM4v3bvs = value->rValue; + mod->BSIM4v3bvsGiven = TRUE; + break; + case BSIM4v3_MOD_VFB : + mod->BSIM4v3vfb = value->rValue; + mod->BSIM4v3vfbGiven = TRUE; + break; + + case BSIM4v3_MOD_GBMIN : + mod->BSIM4v3gbmin = value->rValue; + mod->BSIM4v3gbminGiven = TRUE; + break; + case BSIM4v3_MOD_RBDB : + mod->BSIM4v3rbdb = value->rValue; + mod->BSIM4v3rbdbGiven = TRUE; + break; + case BSIM4v3_MOD_RBPB : + mod->BSIM4v3rbpb = value->rValue; + mod->BSIM4v3rbpbGiven = TRUE; + break; + case BSIM4v3_MOD_RBSB : + mod->BSIM4v3rbsb = value->rValue; + mod->BSIM4v3rbsbGiven = TRUE; + break; + case BSIM4v3_MOD_RBPS : + mod->BSIM4v3rbps = value->rValue; + mod->BSIM4v3rbpsGiven = TRUE; + break; + case BSIM4v3_MOD_RBPD : + mod->BSIM4v3rbpd = value->rValue; + mod->BSIM4v3rbpdGiven = TRUE; + break; + + case BSIM4v3_MOD_CGSL : + mod->BSIM4v3cgsl = value->rValue; + mod->BSIM4v3cgslGiven = TRUE; + break; + case BSIM4v3_MOD_CGDL : + mod->BSIM4v3cgdl = value->rValue; + mod->BSIM4v3cgdlGiven = TRUE; + break; + case BSIM4v3_MOD_CKAPPAS : + mod->BSIM4v3ckappas = value->rValue; + mod->BSIM4v3ckappasGiven = TRUE; + break; + case BSIM4v3_MOD_CKAPPAD : + mod->BSIM4v3ckappad = value->rValue; + mod->BSIM4v3ckappadGiven = TRUE; + break; + case BSIM4v3_MOD_CF : + mod->BSIM4v3cf = value->rValue; + mod->BSIM4v3cfGiven = TRUE; + break; + case BSIM4v3_MOD_CLC : + mod->BSIM4v3clc = value->rValue; + mod->BSIM4v3clcGiven = TRUE; + break; + case BSIM4v3_MOD_CLE : + mod->BSIM4v3cle = value->rValue; + mod->BSIM4v3cleGiven = TRUE; + break; + case BSIM4v3_MOD_DWC : + mod->BSIM4v3dwc = value->rValue; + mod->BSIM4v3dwcGiven = TRUE; + break; + case BSIM4v3_MOD_DLC : + mod->BSIM4v3dlc = value->rValue; + mod->BSIM4v3dlcGiven = TRUE; + break; + case BSIM4v3_MOD_XW : + mod->BSIM4v3xw = value->rValue; + mod->BSIM4v3xwGiven = TRUE; + break; + case BSIM4v3_MOD_XL : + mod->BSIM4v3xl = value->rValue; + mod->BSIM4v3xlGiven = TRUE; + break; + case BSIM4v3_MOD_DLCIG : + mod->BSIM4v3dlcig = value->rValue; + mod->BSIM4v3dlcigGiven = TRUE; + break; + case BSIM4v3_MOD_DWJ : + mod->BSIM4v3dwj = value->rValue; + mod->BSIM4v3dwjGiven = TRUE; + break; + case BSIM4v3_MOD_VFBCV : + mod->BSIM4v3vfbcv = value->rValue; + mod->BSIM4v3vfbcvGiven = TRUE; + break; + case BSIM4v3_MOD_ACDE : + mod->BSIM4v3acde = value->rValue; + mod->BSIM4v3acdeGiven = TRUE; + break; + case BSIM4v3_MOD_MOIN : + mod->BSIM4v3moin = value->rValue; + mod->BSIM4v3moinGiven = TRUE; + break; + case BSIM4v3_MOD_NOFF : + mod->BSIM4v3noff = value->rValue; + mod->BSIM4v3noffGiven = TRUE; + break; + case BSIM4v3_MOD_VOFFCV : + mod->BSIM4v3voffcv = value->rValue; + mod->BSIM4v3voffcvGiven = TRUE; + break; + case BSIM4v3_MOD_DMCG : + mod->BSIM4v3dmcg = value->rValue; + mod->BSIM4v3dmcgGiven = TRUE; + break; + case BSIM4v3_MOD_DMCI : + mod->BSIM4v3dmci = value->rValue; + mod->BSIM4v3dmciGiven = TRUE; + break; + case BSIM4v3_MOD_DMDG : + mod->BSIM4v3dmdg = value->rValue; + mod->BSIM4v3dmdgGiven = TRUE; + break; + case BSIM4v3_MOD_DMCGT : + mod->BSIM4v3dmcgt = value->rValue; + mod->BSIM4v3dmcgtGiven = TRUE; + break; + case BSIM4v3_MOD_XGW : + mod->BSIM4v3xgw = value->rValue; + mod->BSIM4v3xgwGiven = TRUE; + break; + case BSIM4v3_MOD_XGL : + mod->BSIM4v3xgl = value->rValue; + mod->BSIM4v3xglGiven = TRUE; + break; + case BSIM4v3_MOD_RSHG : + mod->BSIM4v3rshg = value->rValue; + mod->BSIM4v3rshgGiven = TRUE; + break; + case BSIM4v3_MOD_NGCON : + mod->BSIM4v3ngcon = value->rValue; + mod->BSIM4v3ngconGiven = TRUE; + break; + case BSIM4v3_MOD_TCJ : + mod->BSIM4v3tcj = value->rValue; + mod->BSIM4v3tcjGiven = TRUE; + break; + case BSIM4v3_MOD_TPB : + mod->BSIM4v3tpb = value->rValue; + mod->BSIM4v3tpbGiven = TRUE; + break; + case BSIM4v3_MOD_TCJSW : + mod->BSIM4v3tcjsw = value->rValue; + mod->BSIM4v3tcjswGiven = TRUE; + break; + case BSIM4v3_MOD_TPBSW : + mod->BSIM4v3tpbsw = value->rValue; + mod->BSIM4v3tpbswGiven = TRUE; + break; + case BSIM4v3_MOD_TCJSWG : + mod->BSIM4v3tcjswg = value->rValue; + mod->BSIM4v3tcjswgGiven = TRUE; + break; + case BSIM4v3_MOD_TPBSWG : + mod->BSIM4v3tpbswg = value->rValue; + mod->BSIM4v3tpbswgGiven = TRUE; + break; + + /* Length dependence */ + case BSIM4v3_MOD_LCDSC : + mod->BSIM4v3lcdsc = value->rValue; + mod->BSIM4v3lcdscGiven = TRUE; + break; + + + case BSIM4v3_MOD_LCDSCB : + mod->BSIM4v3lcdscb = value->rValue; + mod->BSIM4v3lcdscbGiven = TRUE; + break; + case BSIM4v3_MOD_LCDSCD : + mod->BSIM4v3lcdscd = value->rValue; + mod->BSIM4v3lcdscdGiven = TRUE; + break; + case BSIM4v3_MOD_LCIT : + mod->BSIM4v3lcit = value->rValue; + mod->BSIM4v3lcitGiven = TRUE; + break; + case BSIM4v3_MOD_LNFACTOR : + mod->BSIM4v3lnfactor = value->rValue; + mod->BSIM4v3lnfactorGiven = TRUE; + break; + case BSIM4v3_MOD_LXJ: + mod->BSIM4v3lxj = value->rValue; + mod->BSIM4v3lxjGiven = TRUE; + break; + case BSIM4v3_MOD_LVSAT: + mod->BSIM4v3lvsat = value->rValue; + mod->BSIM4v3lvsatGiven = TRUE; + break; + + + case BSIM4v3_MOD_LA0: + mod->BSIM4v3la0 = value->rValue; + mod->BSIM4v3la0Given = TRUE; + break; + case BSIM4v3_MOD_LAGS: + mod->BSIM4v3lags = value->rValue; + mod->BSIM4v3lagsGiven = TRUE; + break; + case BSIM4v3_MOD_LA1: + mod->BSIM4v3la1 = value->rValue; + mod->BSIM4v3la1Given = TRUE; + break; + case BSIM4v3_MOD_LA2: + mod->BSIM4v3la2 = value->rValue; + mod->BSIM4v3la2Given = TRUE; + break; + case BSIM4v3_MOD_LAT: + mod->BSIM4v3lat = value->rValue; + mod->BSIM4v3latGiven = TRUE; + break; + case BSIM4v3_MOD_LKETA: + mod->BSIM4v3lketa = value->rValue; + mod->BSIM4v3lketaGiven = TRUE; + break; + case BSIM4v3_MOD_LNSUB: + mod->BSIM4v3lnsub = value->rValue; + mod->BSIM4v3lnsubGiven = TRUE; + break; + case BSIM4v3_MOD_LNDEP: + mod->BSIM4v3lndep = value->rValue; + mod->BSIM4v3lndepGiven = TRUE; + if (mod->BSIM4v3lndep > 1.0e20) + mod->BSIM4v3lndep *= 1.0e-6; + break; + case BSIM4v3_MOD_LNSD: + mod->BSIM4v3lnsd = value->rValue; + mod->BSIM4v3lnsdGiven = TRUE; + if (mod->BSIM4v3lnsd > 1.0e23) + mod->BSIM4v3lnsd *= 1.0e-6; + break; + case BSIM4v3_MOD_LNGATE: + mod->BSIM4v3lngate = value->rValue; + mod->BSIM4v3lngateGiven = TRUE; + if (mod->BSIM4v3lngate > 1.0e23) + mod->BSIM4v3lngate *= 1.0e-6; + break; + case BSIM4v3_MOD_LGAMMA1: + mod->BSIM4v3lgamma1 = value->rValue; + mod->BSIM4v3lgamma1Given = TRUE; + break; + case BSIM4v3_MOD_LGAMMA2: + mod->BSIM4v3lgamma2 = value->rValue; + mod->BSIM4v3lgamma2Given = TRUE; + break; + case BSIM4v3_MOD_LVBX: + mod->BSIM4v3lvbx = value->rValue; + mod->BSIM4v3lvbxGiven = TRUE; + break; + case BSIM4v3_MOD_LVBM: + mod->BSIM4v3lvbm = value->rValue; + mod->BSIM4v3lvbmGiven = TRUE; + break; + case BSIM4v3_MOD_LXT: + mod->BSIM4v3lxt = value->rValue; + mod->BSIM4v3lxtGiven = TRUE; + break; + case BSIM4v3_MOD_LK1: + mod->BSIM4v3lk1 = value->rValue; + mod->BSIM4v3lk1Given = TRUE; + break; + case BSIM4v3_MOD_LKT1: + mod->BSIM4v3lkt1 = value->rValue; + mod->BSIM4v3lkt1Given = TRUE; + break; + case BSIM4v3_MOD_LKT1L: + mod->BSIM4v3lkt1l = value->rValue; + mod->BSIM4v3lkt1lGiven = TRUE; + break; + case BSIM4v3_MOD_LKT2: + mod->BSIM4v3lkt2 = value->rValue; + mod->BSIM4v3lkt2Given = TRUE; + break; + case BSIM4v3_MOD_LK2: + mod->BSIM4v3lk2 = value->rValue; + mod->BSIM4v3lk2Given = TRUE; + break; + case BSIM4v3_MOD_LK3: + mod->BSIM4v3lk3 = value->rValue; + mod->BSIM4v3lk3Given = TRUE; + break; + case BSIM4v3_MOD_LK3B: + mod->BSIM4v3lk3b = value->rValue; + mod->BSIM4v3lk3bGiven = TRUE; + break; + case BSIM4v3_MOD_LLPE0: + mod->BSIM4v3llpe0 = value->rValue; + mod->BSIM4v3llpe0Given = TRUE; + break; + case BSIM4v3_MOD_LLPEB: + mod->BSIM4v3llpeb = value->rValue; + mod->BSIM4v3llpebGiven = TRUE; + break; + case BSIM4v3_MOD_LDVTP0: + mod->BSIM4v3ldvtp0 = value->rValue; + mod->BSIM4v3ldvtp0Given = TRUE; + break; + case BSIM4v3_MOD_LDVTP1: + mod->BSIM4v3ldvtp1 = value->rValue; + mod->BSIM4v3ldvtp1Given = TRUE; + break; + case BSIM4v3_MOD_LW0: + mod->BSIM4v3lw0 = value->rValue; + mod->BSIM4v3lw0Given = TRUE; + break; + case BSIM4v3_MOD_LDVT0: + mod->BSIM4v3ldvt0 = value->rValue; + mod->BSIM4v3ldvt0Given = TRUE; + break; + case BSIM4v3_MOD_LDVT1: + mod->BSIM4v3ldvt1 = value->rValue; + mod->BSIM4v3ldvt1Given = TRUE; + break; + case BSIM4v3_MOD_LDVT2: + mod->BSIM4v3ldvt2 = value->rValue; + mod->BSIM4v3ldvt2Given = TRUE; + break; + case BSIM4v3_MOD_LDVT0W: + mod->BSIM4v3ldvt0w = value->rValue; + mod->BSIM4v3ldvt0wGiven = TRUE; + break; + case BSIM4v3_MOD_LDVT1W: + mod->BSIM4v3ldvt1w = value->rValue; + mod->BSIM4v3ldvt1wGiven = TRUE; + break; + case BSIM4v3_MOD_LDVT2W: + mod->BSIM4v3ldvt2w = value->rValue; + mod->BSIM4v3ldvt2wGiven = TRUE; + break; + case BSIM4v3_MOD_LDROUT: + mod->BSIM4v3ldrout = value->rValue; + mod->BSIM4v3ldroutGiven = TRUE; + break; + case BSIM4v3_MOD_LDSUB: + mod->BSIM4v3ldsub = value->rValue; + mod->BSIM4v3ldsubGiven = TRUE; + break; + case BSIM4v3_MOD_LVTH0: + mod->BSIM4v3lvth0 = value->rValue; + mod->BSIM4v3lvth0Given = TRUE; + break; + case BSIM4v3_MOD_LUA: + mod->BSIM4v3lua = value->rValue; + mod->BSIM4v3luaGiven = TRUE; + break; + case BSIM4v3_MOD_LUA1: + mod->BSIM4v3lua1 = value->rValue; + mod->BSIM4v3lua1Given = TRUE; + break; + case BSIM4v3_MOD_LUB: + mod->BSIM4v3lub = value->rValue; + mod->BSIM4v3lubGiven = TRUE; + break; + case BSIM4v3_MOD_LUB1: + mod->BSIM4v3lub1 = value->rValue; + mod->BSIM4v3lub1Given = TRUE; + break; + case BSIM4v3_MOD_LUC: + mod->BSIM4v3luc = value->rValue; + mod->BSIM4v3lucGiven = TRUE; + break; + case BSIM4v3_MOD_LUC1: + mod->BSIM4v3luc1 = value->rValue; + mod->BSIM4v3luc1Given = TRUE; + break; + case BSIM4v3_MOD_LU0 : + mod->BSIM4v3lu0 = value->rValue; + mod->BSIM4v3lu0Given = TRUE; + break; + case BSIM4v3_MOD_LUTE : + mod->BSIM4v3lute = value->rValue; + mod->BSIM4v3luteGiven = TRUE; + break; + case BSIM4v3_MOD_LVOFF: + mod->BSIM4v3lvoff = value->rValue; + mod->BSIM4v3lvoffGiven = TRUE; + break; + case BSIM4v3_MOD_LMINV: + mod->BSIM4v3lminv = value->rValue; + mod->BSIM4v3lminvGiven = TRUE; + break; + case BSIM4v3_MOD_LFPROUT: + mod->BSIM4v3lfprout = value->rValue; + mod->BSIM4v3lfproutGiven = TRUE; + break; + case BSIM4v3_MOD_LPDITS: + mod->BSIM4v3lpdits = value->rValue; + mod->BSIM4v3lpditsGiven = TRUE; + break; + case BSIM4v3_MOD_LPDITSD: + mod->BSIM4v3lpditsd = value->rValue; + mod->BSIM4v3lpditsdGiven = TRUE; + break; + case BSIM4v3_MOD_LDELTA : + mod->BSIM4v3ldelta = value->rValue; + mod->BSIM4v3ldeltaGiven = TRUE; + break; + case BSIM4v3_MOD_LRDSW: + mod->BSIM4v3lrdsw = value->rValue; + mod->BSIM4v3lrdswGiven = TRUE; + break; + case BSIM4v3_MOD_LRDW: + mod->BSIM4v3lrdw = value->rValue; + mod->BSIM4v3lrdwGiven = TRUE; + break; + case BSIM4v3_MOD_LRSW: + mod->BSIM4v3lrsw = value->rValue; + mod->BSIM4v3lrswGiven = TRUE; + break; + case BSIM4v3_MOD_LPRWB: + mod->BSIM4v3lprwb = value->rValue; + mod->BSIM4v3lprwbGiven = TRUE; + break; + case BSIM4v3_MOD_LPRWG: + mod->BSIM4v3lprwg = value->rValue; + mod->BSIM4v3lprwgGiven = TRUE; + break; + case BSIM4v3_MOD_LPRT: + mod->BSIM4v3lprt = value->rValue; + mod->BSIM4v3lprtGiven = TRUE; + break; + case BSIM4v3_MOD_LETA0: + mod->BSIM4v3leta0 = value->rValue; + mod->BSIM4v3leta0Given = TRUE; + break; + case BSIM4v3_MOD_LETAB: + mod->BSIM4v3letab = value->rValue; + mod->BSIM4v3letabGiven = TRUE; + break; + case BSIM4v3_MOD_LPCLM: + mod->BSIM4v3lpclm = value->rValue; + mod->BSIM4v3lpclmGiven = TRUE; + break; + case BSIM4v3_MOD_LPDIBL1: + mod->BSIM4v3lpdibl1 = value->rValue; + mod->BSIM4v3lpdibl1Given = TRUE; + break; + case BSIM4v3_MOD_LPDIBL2: + mod->BSIM4v3lpdibl2 = value->rValue; + mod->BSIM4v3lpdibl2Given = TRUE; + break; + case BSIM4v3_MOD_LPDIBLB: + mod->BSIM4v3lpdiblb = value->rValue; + mod->BSIM4v3lpdiblbGiven = TRUE; + break; + case BSIM4v3_MOD_LPSCBE1: + mod->BSIM4v3lpscbe1 = value->rValue; + mod->BSIM4v3lpscbe1Given = TRUE; + break; + case BSIM4v3_MOD_LPSCBE2: + mod->BSIM4v3lpscbe2 = value->rValue; + mod->BSIM4v3lpscbe2Given = TRUE; + break; + case BSIM4v3_MOD_LPVAG: + mod->BSIM4v3lpvag = value->rValue; + mod->BSIM4v3lpvagGiven = TRUE; + break; + case BSIM4v3_MOD_LWR : + mod->BSIM4v3lwr = value->rValue; + mod->BSIM4v3lwrGiven = TRUE; + break; + case BSIM4v3_MOD_LDWG : + mod->BSIM4v3ldwg = value->rValue; + mod->BSIM4v3ldwgGiven = TRUE; + break; + case BSIM4v3_MOD_LDWB : + mod->BSIM4v3ldwb = value->rValue; + mod->BSIM4v3ldwbGiven = TRUE; + break; + case BSIM4v3_MOD_LB0 : + mod->BSIM4v3lb0 = value->rValue; + mod->BSIM4v3lb0Given = TRUE; + break; + case BSIM4v3_MOD_LB1 : + mod->BSIM4v3lb1 = value->rValue; + mod->BSIM4v3lb1Given = TRUE; + break; + case BSIM4v3_MOD_LALPHA0 : + mod->BSIM4v3lalpha0 = value->rValue; + mod->BSIM4v3lalpha0Given = TRUE; + break; + case BSIM4v3_MOD_LALPHA1 : + mod->BSIM4v3lalpha1 = value->rValue; + mod->BSIM4v3lalpha1Given = TRUE; + break; + case BSIM4v3_MOD_LBETA0 : + mod->BSIM4v3lbeta0 = value->rValue; + mod->BSIM4v3lbeta0Given = TRUE; + break; + case BSIM4v3_MOD_LAGIDL : + mod->BSIM4v3lagidl = value->rValue; + mod->BSIM4v3lagidlGiven = TRUE; + break; + case BSIM4v3_MOD_LBGIDL : + mod->BSIM4v3lbgidl = value->rValue; + mod->BSIM4v3lbgidlGiven = TRUE; + break; + case BSIM4v3_MOD_LCGIDL : + mod->BSIM4v3lcgidl = value->rValue; + mod->BSIM4v3lcgidlGiven = TRUE; + break; + case BSIM4v3_MOD_LPHIN : + mod->BSIM4v3lphin = value->rValue; + mod->BSIM4v3lphinGiven = TRUE; + break; + case BSIM4v3_MOD_LEGIDL : + mod->BSIM4v3legidl = value->rValue; + mod->BSIM4v3legidlGiven = TRUE; + break; + case BSIM4v3_MOD_LAIGC : + mod->BSIM4v3laigc = value->rValue; + mod->BSIM4v3laigcGiven = TRUE; + break; + case BSIM4v3_MOD_LBIGC : + mod->BSIM4v3lbigc = value->rValue; + mod->BSIM4v3lbigcGiven = TRUE; + break; + case BSIM4v3_MOD_LCIGC : + mod->BSIM4v3lcigc = value->rValue; + mod->BSIM4v3lcigcGiven = TRUE; + break; + case BSIM4v3_MOD_LAIGSD : + mod->BSIM4v3laigsd = value->rValue; + mod->BSIM4v3laigsdGiven = TRUE; + break; + case BSIM4v3_MOD_LBIGSD : + mod->BSIM4v3lbigsd = value->rValue; + mod->BSIM4v3lbigsdGiven = TRUE; + break; + case BSIM4v3_MOD_LCIGSD : + mod->BSIM4v3lcigsd = value->rValue; + mod->BSIM4v3lcigsdGiven = TRUE; + break; + case BSIM4v3_MOD_LAIGBACC : + mod->BSIM4v3laigbacc = value->rValue; + mod->BSIM4v3laigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_LBIGBACC : + mod->BSIM4v3lbigbacc = value->rValue; + mod->BSIM4v3lbigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_LCIGBACC : + mod->BSIM4v3lcigbacc = value->rValue; + mod->BSIM4v3lcigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_LAIGBINV : + mod->BSIM4v3laigbinv = value->rValue; + mod->BSIM4v3laigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_LBIGBINV : + mod->BSIM4v3lbigbinv = value->rValue; + mod->BSIM4v3lbigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_LCIGBINV : + mod->BSIM4v3lcigbinv = value->rValue; + mod->BSIM4v3lcigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_LNIGC : + mod->BSIM4v3lnigc = value->rValue; + mod->BSIM4v3lnigcGiven = TRUE; + break; + case BSIM4v3_MOD_LNIGBINV : + mod->BSIM4v3lnigbinv = value->rValue; + mod->BSIM4v3lnigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_LNIGBACC : + mod->BSIM4v3lnigbacc = value->rValue; + mod->BSIM4v3lnigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_LNTOX : + mod->BSIM4v3lntox = value->rValue; + mod->BSIM4v3lntoxGiven = TRUE; + break; + case BSIM4v3_MOD_LEIGBINV : + mod->BSIM4v3leigbinv = value->rValue; + mod->BSIM4v3leigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_LPIGCD : + mod->BSIM4v3lpigcd = value->rValue; + mod->BSIM4v3lpigcdGiven = TRUE; + break; + case BSIM4v3_MOD_LPOXEDGE : + mod->BSIM4v3lpoxedge = value->rValue; + mod->BSIM4v3lpoxedgeGiven = TRUE; + break; + case BSIM4v3_MOD_LXRCRG1 : + mod->BSIM4v3lxrcrg1 = value->rValue; + mod->BSIM4v3lxrcrg1Given = TRUE; + break; + case BSIM4v3_MOD_LXRCRG2 : + mod->BSIM4v3lxrcrg2 = value->rValue; + mod->BSIM4v3lxrcrg2Given = TRUE; + break; + case BSIM4v3_MOD_LLAMBDA : + mod->BSIM4v3llambda = value->rValue; + mod->BSIM4v3llambdaGiven = TRUE; + break; + case BSIM4v3_MOD_LVTL : + mod->BSIM4v3lvtl = value->rValue; + mod->BSIM4v3lvtlGiven = TRUE; + break; + case BSIM4v3_MOD_LXN: + mod->BSIM4v3lxn = value->rValue; + mod->BSIM4v3lxnGiven = TRUE; + break; + case BSIM4v3_MOD_LEU : + mod->BSIM4v3leu = value->rValue; + mod->BSIM4v3leuGiven = TRUE; + break; + case BSIM4v3_MOD_LVFB : + mod->BSIM4v3lvfb = value->rValue; + mod->BSIM4v3lvfbGiven = TRUE; + break; + case BSIM4v3_MOD_LCGSL : + mod->BSIM4v3lcgsl = value->rValue; + mod->BSIM4v3lcgslGiven = TRUE; + break; + case BSIM4v3_MOD_LCGDL : + mod->BSIM4v3lcgdl = value->rValue; + mod->BSIM4v3lcgdlGiven = TRUE; + break; + case BSIM4v3_MOD_LCKAPPAS : + mod->BSIM4v3lckappas = value->rValue; + mod->BSIM4v3lckappasGiven = TRUE; + break; + case BSIM4v3_MOD_LCKAPPAD : + mod->BSIM4v3lckappad = value->rValue; + mod->BSIM4v3lckappadGiven = TRUE; + break; + case BSIM4v3_MOD_LCF : + mod->BSIM4v3lcf = value->rValue; + mod->BSIM4v3lcfGiven = TRUE; + break; + case BSIM4v3_MOD_LCLC : + mod->BSIM4v3lclc = value->rValue; + mod->BSIM4v3lclcGiven = TRUE; + break; + case BSIM4v3_MOD_LCLE : + mod->BSIM4v3lcle = value->rValue; + mod->BSIM4v3lcleGiven = TRUE; + break; + case BSIM4v3_MOD_LVFBCV : + mod->BSIM4v3lvfbcv = value->rValue; + mod->BSIM4v3lvfbcvGiven = TRUE; + break; + case BSIM4v3_MOD_LACDE : + mod->BSIM4v3lacde = value->rValue; + mod->BSIM4v3lacdeGiven = TRUE; + break; + case BSIM4v3_MOD_LMOIN : + mod->BSIM4v3lmoin = value->rValue; + mod->BSIM4v3lmoinGiven = TRUE; + break; + case BSIM4v3_MOD_LNOFF : + mod->BSIM4v3lnoff = value->rValue; + mod->BSIM4v3lnoffGiven = TRUE; + break; + case BSIM4v3_MOD_LVOFFCV : + mod->BSIM4v3lvoffcv = value->rValue; + mod->BSIM4v3lvoffcvGiven = TRUE; + break; + + /* Width dependence */ + case BSIM4v3_MOD_WCDSC : + mod->BSIM4v3wcdsc = value->rValue; + mod->BSIM4v3wcdscGiven = TRUE; + break; + + + case BSIM4v3_MOD_WCDSCB : + mod->BSIM4v3wcdscb = value->rValue; + mod->BSIM4v3wcdscbGiven = TRUE; + break; + case BSIM4v3_MOD_WCDSCD : + mod->BSIM4v3wcdscd = value->rValue; + mod->BSIM4v3wcdscdGiven = TRUE; + break; + case BSIM4v3_MOD_WCIT : + mod->BSIM4v3wcit = value->rValue; + mod->BSIM4v3wcitGiven = TRUE; + break; + case BSIM4v3_MOD_WNFACTOR : + mod->BSIM4v3wnfactor = value->rValue; + mod->BSIM4v3wnfactorGiven = TRUE; + break; + case BSIM4v3_MOD_WXJ: + mod->BSIM4v3wxj = value->rValue; + mod->BSIM4v3wxjGiven = TRUE; + break; + case BSIM4v3_MOD_WVSAT: + mod->BSIM4v3wvsat = value->rValue; + mod->BSIM4v3wvsatGiven = TRUE; + break; + + + case BSIM4v3_MOD_WA0: + mod->BSIM4v3wa0 = value->rValue; + mod->BSIM4v3wa0Given = TRUE; + break; + case BSIM4v3_MOD_WAGS: + mod->BSIM4v3wags = value->rValue; + mod->BSIM4v3wagsGiven = TRUE; + break; + case BSIM4v3_MOD_WA1: + mod->BSIM4v3wa1 = value->rValue; + mod->BSIM4v3wa1Given = TRUE; + break; + case BSIM4v3_MOD_WA2: + mod->BSIM4v3wa2 = value->rValue; + mod->BSIM4v3wa2Given = TRUE; + break; + case BSIM4v3_MOD_WAT: + mod->BSIM4v3wat = value->rValue; + mod->BSIM4v3watGiven = TRUE; + break; + case BSIM4v3_MOD_WKETA: + mod->BSIM4v3wketa = value->rValue; + mod->BSIM4v3wketaGiven = TRUE; + break; + case BSIM4v3_MOD_WNSUB: + mod->BSIM4v3wnsub = value->rValue; + mod->BSIM4v3wnsubGiven = TRUE; + break; + case BSIM4v3_MOD_WNDEP: + mod->BSIM4v3wndep = value->rValue; + mod->BSIM4v3wndepGiven = TRUE; + if (mod->BSIM4v3wndep > 1.0e20) + mod->BSIM4v3wndep *= 1.0e-6; + break; + case BSIM4v3_MOD_WNSD: + mod->BSIM4v3wnsd = value->rValue; + mod->BSIM4v3wnsdGiven = TRUE; + if (mod->BSIM4v3wnsd > 1.0e23) + mod->BSIM4v3wnsd *= 1.0e-6; + break; + case BSIM4v3_MOD_WNGATE: + mod->BSIM4v3wngate = value->rValue; + mod->BSIM4v3wngateGiven = TRUE; + if (mod->BSIM4v3wngate > 1.0e23) + mod->BSIM4v3wngate *= 1.0e-6; + break; + case BSIM4v3_MOD_WGAMMA1: + mod->BSIM4v3wgamma1 = value->rValue; + mod->BSIM4v3wgamma1Given = TRUE; + break; + case BSIM4v3_MOD_WGAMMA2: + mod->BSIM4v3wgamma2 = value->rValue; + mod->BSIM4v3wgamma2Given = TRUE; + break; + case BSIM4v3_MOD_WVBX: + mod->BSIM4v3wvbx = value->rValue; + mod->BSIM4v3wvbxGiven = TRUE; + break; + case BSIM4v3_MOD_WVBM: + mod->BSIM4v3wvbm = value->rValue; + mod->BSIM4v3wvbmGiven = TRUE; + break; + case BSIM4v3_MOD_WXT: + mod->BSIM4v3wxt = value->rValue; + mod->BSIM4v3wxtGiven = TRUE; + break; + case BSIM4v3_MOD_WK1: + mod->BSIM4v3wk1 = value->rValue; + mod->BSIM4v3wk1Given = TRUE; + break; + case BSIM4v3_MOD_WKT1: + mod->BSIM4v3wkt1 = value->rValue; + mod->BSIM4v3wkt1Given = TRUE; + break; + case BSIM4v3_MOD_WKT1L: + mod->BSIM4v3wkt1l = value->rValue; + mod->BSIM4v3wkt1lGiven = TRUE; + break; + case BSIM4v3_MOD_WKT2: + mod->BSIM4v3wkt2 = value->rValue; + mod->BSIM4v3wkt2Given = TRUE; + break; + case BSIM4v3_MOD_WK2: + mod->BSIM4v3wk2 = value->rValue; + mod->BSIM4v3wk2Given = TRUE; + break; + case BSIM4v3_MOD_WK3: + mod->BSIM4v3wk3 = value->rValue; + mod->BSIM4v3wk3Given = TRUE; + break; + case BSIM4v3_MOD_WK3B: + mod->BSIM4v3wk3b = value->rValue; + mod->BSIM4v3wk3bGiven = TRUE; + break; + case BSIM4v3_MOD_WLPE0: + mod->BSIM4v3wlpe0 = value->rValue; + mod->BSIM4v3wlpe0Given = TRUE; + break; + case BSIM4v3_MOD_WLPEB: + mod->BSIM4v3wlpeb = value->rValue; + mod->BSIM4v3wlpebGiven = TRUE; + break; + case BSIM4v3_MOD_WDVTP0: + mod->BSIM4v3wdvtp0 = value->rValue; + mod->BSIM4v3wdvtp0Given = TRUE; + break; + case BSIM4v3_MOD_WDVTP1: + mod->BSIM4v3wdvtp1 = value->rValue; + mod->BSIM4v3wdvtp1Given = TRUE; + break; + case BSIM4v3_MOD_WW0: + mod->BSIM4v3ww0 = value->rValue; + mod->BSIM4v3ww0Given = TRUE; + break; + case BSIM4v3_MOD_WDVT0: + mod->BSIM4v3wdvt0 = value->rValue; + mod->BSIM4v3wdvt0Given = TRUE; + break; + case BSIM4v3_MOD_WDVT1: + mod->BSIM4v3wdvt1 = value->rValue; + mod->BSIM4v3wdvt1Given = TRUE; + break; + case BSIM4v3_MOD_WDVT2: + mod->BSIM4v3wdvt2 = value->rValue; + mod->BSIM4v3wdvt2Given = TRUE; + break; + case BSIM4v3_MOD_WDVT0W: + mod->BSIM4v3wdvt0w = value->rValue; + mod->BSIM4v3wdvt0wGiven = TRUE; + break; + case BSIM4v3_MOD_WDVT1W: + mod->BSIM4v3wdvt1w = value->rValue; + mod->BSIM4v3wdvt1wGiven = TRUE; + break; + case BSIM4v3_MOD_WDVT2W: + mod->BSIM4v3wdvt2w = value->rValue; + mod->BSIM4v3wdvt2wGiven = TRUE; + break; + case BSIM4v3_MOD_WDROUT: + mod->BSIM4v3wdrout = value->rValue; + mod->BSIM4v3wdroutGiven = TRUE; + break; + case BSIM4v3_MOD_WDSUB: + mod->BSIM4v3wdsub = value->rValue; + mod->BSIM4v3wdsubGiven = TRUE; + break; + case BSIM4v3_MOD_WVTH0: + mod->BSIM4v3wvth0 = value->rValue; + mod->BSIM4v3wvth0Given = TRUE; + break; + case BSIM4v3_MOD_WUA: + mod->BSIM4v3wua = value->rValue; + mod->BSIM4v3wuaGiven = TRUE; + break; + case BSIM4v3_MOD_WUA1: + mod->BSIM4v3wua1 = value->rValue; + mod->BSIM4v3wua1Given = TRUE; + break; + case BSIM4v3_MOD_WUB: + mod->BSIM4v3wub = value->rValue; + mod->BSIM4v3wubGiven = TRUE; + break; + case BSIM4v3_MOD_WUB1: + mod->BSIM4v3wub1 = value->rValue; + mod->BSIM4v3wub1Given = TRUE; + break; + case BSIM4v3_MOD_WUC: + mod->BSIM4v3wuc = value->rValue; + mod->BSIM4v3wucGiven = TRUE; + break; + case BSIM4v3_MOD_WUC1: + mod->BSIM4v3wuc1 = value->rValue; + mod->BSIM4v3wuc1Given = TRUE; + break; + case BSIM4v3_MOD_WU0 : + mod->BSIM4v3wu0 = value->rValue; + mod->BSIM4v3wu0Given = TRUE; + break; + case BSIM4v3_MOD_WUTE : + mod->BSIM4v3wute = value->rValue; + mod->BSIM4v3wuteGiven = TRUE; + break; + case BSIM4v3_MOD_WVOFF: + mod->BSIM4v3wvoff = value->rValue; + mod->BSIM4v3wvoffGiven = TRUE; + break; + case BSIM4v3_MOD_WMINV: + mod->BSIM4v3wminv = value->rValue; + mod->BSIM4v3wminvGiven = TRUE; + break; + case BSIM4v3_MOD_WFPROUT: + mod->BSIM4v3wfprout = value->rValue; + mod->BSIM4v3wfproutGiven = TRUE; + break; + case BSIM4v3_MOD_WPDITS: + mod->BSIM4v3wpdits = value->rValue; + mod->BSIM4v3wpditsGiven = TRUE; + break; + case BSIM4v3_MOD_WPDITSD: + mod->BSIM4v3wpditsd = value->rValue; + mod->BSIM4v3wpditsdGiven = TRUE; + break; + case BSIM4v3_MOD_WDELTA : + mod->BSIM4v3wdelta = value->rValue; + mod->BSIM4v3wdeltaGiven = TRUE; + break; + case BSIM4v3_MOD_WRDSW: + mod->BSIM4v3wrdsw = value->rValue; + mod->BSIM4v3wrdswGiven = TRUE; + break; + case BSIM4v3_MOD_WRDW: + mod->BSIM4v3wrdw = value->rValue; + mod->BSIM4v3wrdwGiven = TRUE; + break; + case BSIM4v3_MOD_WRSW: + mod->BSIM4v3wrsw = value->rValue; + mod->BSIM4v3wrswGiven = TRUE; + break; + case BSIM4v3_MOD_WPRWB: + mod->BSIM4v3wprwb = value->rValue; + mod->BSIM4v3wprwbGiven = TRUE; + break; + case BSIM4v3_MOD_WPRWG: + mod->BSIM4v3wprwg = value->rValue; + mod->BSIM4v3wprwgGiven = TRUE; + break; + case BSIM4v3_MOD_WPRT: + mod->BSIM4v3wprt = value->rValue; + mod->BSIM4v3wprtGiven = TRUE; + break; + case BSIM4v3_MOD_WETA0: + mod->BSIM4v3weta0 = value->rValue; + mod->BSIM4v3weta0Given = TRUE; + break; + case BSIM4v3_MOD_WETAB: + mod->BSIM4v3wetab = value->rValue; + mod->BSIM4v3wetabGiven = TRUE; + break; + case BSIM4v3_MOD_WPCLM: + mod->BSIM4v3wpclm = value->rValue; + mod->BSIM4v3wpclmGiven = TRUE; + break; + case BSIM4v3_MOD_WPDIBL1: + mod->BSIM4v3wpdibl1 = value->rValue; + mod->BSIM4v3wpdibl1Given = TRUE; + break; + case BSIM4v3_MOD_WPDIBL2: + mod->BSIM4v3wpdibl2 = value->rValue; + mod->BSIM4v3wpdibl2Given = TRUE; + break; + case BSIM4v3_MOD_WPDIBLB: + mod->BSIM4v3wpdiblb = value->rValue; + mod->BSIM4v3wpdiblbGiven = TRUE; + break; + case BSIM4v3_MOD_WPSCBE1: + mod->BSIM4v3wpscbe1 = value->rValue; + mod->BSIM4v3wpscbe1Given = TRUE; + break; + case BSIM4v3_MOD_WPSCBE2: + mod->BSIM4v3wpscbe2 = value->rValue; + mod->BSIM4v3wpscbe2Given = TRUE; + break; + case BSIM4v3_MOD_WPVAG: + mod->BSIM4v3wpvag = value->rValue; + mod->BSIM4v3wpvagGiven = TRUE; + break; + case BSIM4v3_MOD_WWR : + mod->BSIM4v3wwr = value->rValue; + mod->BSIM4v3wwrGiven = TRUE; + break; + case BSIM4v3_MOD_WDWG : + mod->BSIM4v3wdwg = value->rValue; + mod->BSIM4v3wdwgGiven = TRUE; + break; + case BSIM4v3_MOD_WDWB : + mod->BSIM4v3wdwb = value->rValue; + mod->BSIM4v3wdwbGiven = TRUE; + break; + case BSIM4v3_MOD_WB0 : + mod->BSIM4v3wb0 = value->rValue; + mod->BSIM4v3wb0Given = TRUE; + break; + case BSIM4v3_MOD_WB1 : + mod->BSIM4v3wb1 = value->rValue; + mod->BSIM4v3wb1Given = TRUE; + break; + case BSIM4v3_MOD_WALPHA0 : + mod->BSIM4v3walpha0 = value->rValue; + mod->BSIM4v3walpha0Given = TRUE; + break; + case BSIM4v3_MOD_WALPHA1 : + mod->BSIM4v3walpha1 = value->rValue; + mod->BSIM4v3walpha1Given = TRUE; + break; + case BSIM4v3_MOD_WBETA0 : + mod->BSIM4v3wbeta0 = value->rValue; + mod->BSIM4v3wbeta0Given = TRUE; + break; + case BSIM4v3_MOD_WAGIDL : + mod->BSIM4v3wagidl = value->rValue; + mod->BSIM4v3wagidlGiven = TRUE; + break; + case BSIM4v3_MOD_WBGIDL : + mod->BSIM4v3wbgidl = value->rValue; + mod->BSIM4v3wbgidlGiven = TRUE; + break; + case BSIM4v3_MOD_WCGIDL : + mod->BSIM4v3wcgidl = value->rValue; + mod->BSIM4v3wcgidlGiven = TRUE; + break; + case BSIM4v3_MOD_WPHIN : + mod->BSIM4v3wphin = value->rValue; + mod->BSIM4v3wphinGiven = TRUE; + break; + case BSIM4v3_MOD_WEGIDL : + mod->BSIM4v3wegidl = value->rValue; + mod->BSIM4v3wegidlGiven = TRUE; + break; + case BSIM4v3_MOD_WAIGC : + mod->BSIM4v3waigc = value->rValue; + mod->BSIM4v3waigcGiven = TRUE; + break; + case BSIM4v3_MOD_WBIGC : + mod->BSIM4v3wbigc = value->rValue; + mod->BSIM4v3wbigcGiven = TRUE; + break; + case BSIM4v3_MOD_WCIGC : + mod->BSIM4v3wcigc = value->rValue; + mod->BSIM4v3wcigcGiven = TRUE; + break; + case BSIM4v3_MOD_WAIGSD : + mod->BSIM4v3waigsd = value->rValue; + mod->BSIM4v3waigsdGiven = TRUE; + break; + case BSIM4v3_MOD_WBIGSD : + mod->BSIM4v3wbigsd = value->rValue; + mod->BSIM4v3wbigsdGiven = TRUE; + break; + case BSIM4v3_MOD_WCIGSD : + mod->BSIM4v3wcigsd = value->rValue; + mod->BSIM4v3wcigsdGiven = TRUE; + break; + case BSIM4v3_MOD_WAIGBACC : + mod->BSIM4v3waigbacc = value->rValue; + mod->BSIM4v3waigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_WBIGBACC : + mod->BSIM4v3wbigbacc = value->rValue; + mod->BSIM4v3wbigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_WCIGBACC : + mod->BSIM4v3wcigbacc = value->rValue; + mod->BSIM4v3wcigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_WAIGBINV : + mod->BSIM4v3waigbinv = value->rValue; + mod->BSIM4v3waigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_WBIGBINV : + mod->BSIM4v3wbigbinv = value->rValue; + mod->BSIM4v3wbigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_WCIGBINV : + mod->BSIM4v3wcigbinv = value->rValue; + mod->BSIM4v3wcigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_WNIGC : + mod->BSIM4v3wnigc = value->rValue; + mod->BSIM4v3wnigcGiven = TRUE; + break; + case BSIM4v3_MOD_WNIGBINV : + mod->BSIM4v3wnigbinv = value->rValue; + mod->BSIM4v3wnigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_WNIGBACC : + mod->BSIM4v3wnigbacc = value->rValue; + mod->BSIM4v3wnigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_WNTOX : + mod->BSIM4v3wntox = value->rValue; + mod->BSIM4v3wntoxGiven = TRUE; + break; + case BSIM4v3_MOD_WEIGBINV : + mod->BSIM4v3weigbinv = value->rValue; + mod->BSIM4v3weigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_WPIGCD : + mod->BSIM4v3wpigcd = value->rValue; + mod->BSIM4v3wpigcdGiven = TRUE; + break; + case BSIM4v3_MOD_WPOXEDGE : + mod->BSIM4v3wpoxedge = value->rValue; + mod->BSIM4v3wpoxedgeGiven = TRUE; + break; + case BSIM4v3_MOD_WXRCRG1 : + mod->BSIM4v3wxrcrg1 = value->rValue; + mod->BSIM4v3wxrcrg1Given = TRUE; + break; + case BSIM4v3_MOD_WXRCRG2 : + mod->BSIM4v3wxrcrg2 = value->rValue; + mod->BSIM4v3wxrcrg2Given = TRUE; + break; + case BSIM4v3_MOD_WLAMBDA : + mod->BSIM4v3wlambda = value->rValue; + mod->BSIM4v3wlambdaGiven = TRUE; + break; + case BSIM4v3_MOD_WVTL : + mod->BSIM4v3wvtl = value->rValue; + mod->BSIM4v3wvtlGiven = TRUE; + break; + case BSIM4v3_MOD_WXN: + mod->BSIM4v3wxn = value->rValue; + mod->BSIM4v3wxnGiven = TRUE; + break; + case BSIM4v3_MOD_WEU : + mod->BSIM4v3weu = value->rValue; + mod->BSIM4v3weuGiven = TRUE; + break; + case BSIM4v3_MOD_WVFB : + mod->BSIM4v3wvfb = value->rValue; + mod->BSIM4v3wvfbGiven = TRUE; + break; + case BSIM4v3_MOD_WCGSL : + mod->BSIM4v3wcgsl = value->rValue; + mod->BSIM4v3wcgslGiven = TRUE; + break; + case BSIM4v3_MOD_WCGDL : + mod->BSIM4v3wcgdl = value->rValue; + mod->BSIM4v3wcgdlGiven = TRUE; + break; + case BSIM4v3_MOD_WCKAPPAS : + mod->BSIM4v3wckappas = value->rValue; + mod->BSIM4v3wckappasGiven = TRUE; + break; + case BSIM4v3_MOD_WCKAPPAD : + mod->BSIM4v3wckappad = value->rValue; + mod->BSIM4v3wckappadGiven = TRUE; + break; + case BSIM4v3_MOD_WCF : + mod->BSIM4v3wcf = value->rValue; + mod->BSIM4v3wcfGiven = TRUE; + break; + case BSIM4v3_MOD_WCLC : + mod->BSIM4v3wclc = value->rValue; + mod->BSIM4v3wclcGiven = TRUE; + break; + case BSIM4v3_MOD_WCLE : + mod->BSIM4v3wcle = value->rValue; + mod->BSIM4v3wcleGiven = TRUE; + break; + case BSIM4v3_MOD_WVFBCV : + mod->BSIM4v3wvfbcv = value->rValue; + mod->BSIM4v3wvfbcvGiven = TRUE; + break; + case BSIM4v3_MOD_WACDE : + mod->BSIM4v3wacde = value->rValue; + mod->BSIM4v3wacdeGiven = TRUE; + break; + case BSIM4v3_MOD_WMOIN : + mod->BSIM4v3wmoin = value->rValue; + mod->BSIM4v3wmoinGiven = TRUE; + break; + case BSIM4v3_MOD_WNOFF : + mod->BSIM4v3wnoff = value->rValue; + mod->BSIM4v3wnoffGiven = TRUE; + break; + case BSIM4v3_MOD_WVOFFCV : + mod->BSIM4v3wvoffcv = value->rValue; + mod->BSIM4v3wvoffcvGiven = TRUE; + break; + + /* Cross-term dependence */ + case BSIM4v3_MOD_PCDSC : + mod->BSIM4v3pcdsc = value->rValue; + mod->BSIM4v3pcdscGiven = TRUE; + break; + + + case BSIM4v3_MOD_PCDSCB : + mod->BSIM4v3pcdscb = value->rValue; + mod->BSIM4v3pcdscbGiven = TRUE; + break; + case BSIM4v3_MOD_PCDSCD : + mod->BSIM4v3pcdscd = value->rValue; + mod->BSIM4v3pcdscdGiven = TRUE; + break; + case BSIM4v3_MOD_PCIT : + mod->BSIM4v3pcit = value->rValue; + mod->BSIM4v3pcitGiven = TRUE; + break; + case BSIM4v3_MOD_PNFACTOR : + mod->BSIM4v3pnfactor = value->rValue; + mod->BSIM4v3pnfactorGiven = TRUE; + break; + case BSIM4v3_MOD_PXJ: + mod->BSIM4v3pxj = value->rValue; + mod->BSIM4v3pxjGiven = TRUE; + break; + case BSIM4v3_MOD_PVSAT: + mod->BSIM4v3pvsat = value->rValue; + mod->BSIM4v3pvsatGiven = TRUE; + break; + + + case BSIM4v3_MOD_PA0: + mod->BSIM4v3pa0 = value->rValue; + mod->BSIM4v3pa0Given = TRUE; + break; + case BSIM4v3_MOD_PAGS: + mod->BSIM4v3pags = value->rValue; + mod->BSIM4v3pagsGiven = TRUE; + break; + case BSIM4v3_MOD_PA1: + mod->BSIM4v3pa1 = value->rValue; + mod->BSIM4v3pa1Given = TRUE; + break; + case BSIM4v3_MOD_PA2: + mod->BSIM4v3pa2 = value->rValue; + mod->BSIM4v3pa2Given = TRUE; + break; + case BSIM4v3_MOD_PAT: + mod->BSIM4v3pat = value->rValue; + mod->BSIM4v3patGiven = TRUE; + break; + case BSIM4v3_MOD_PKETA: + mod->BSIM4v3pketa = value->rValue; + mod->BSIM4v3pketaGiven = TRUE; + break; + case BSIM4v3_MOD_PNSUB: + mod->BSIM4v3pnsub = value->rValue; + mod->BSIM4v3pnsubGiven = TRUE; + break; + case BSIM4v3_MOD_PNDEP: + mod->BSIM4v3pndep = value->rValue; + mod->BSIM4v3pndepGiven = TRUE; + if (mod->BSIM4v3pndep > 1.0e20) + mod->BSIM4v3pndep *= 1.0e-6; + break; + case BSIM4v3_MOD_PNSD: + mod->BSIM4v3pnsd = value->rValue; + mod->BSIM4v3pnsdGiven = TRUE; + if (mod->BSIM4v3pnsd > 1.0e23) + mod->BSIM4v3pnsd *= 1.0e-6; + break; + case BSIM4v3_MOD_PNGATE: + mod->BSIM4v3pngate = value->rValue; + mod->BSIM4v3pngateGiven = TRUE; + if (mod->BSIM4v3pngate > 1.0e23) + mod->BSIM4v3pngate *= 1.0e-6; + break; + case BSIM4v3_MOD_PGAMMA1: + mod->BSIM4v3pgamma1 = value->rValue; + mod->BSIM4v3pgamma1Given = TRUE; + break; + case BSIM4v3_MOD_PGAMMA2: + mod->BSIM4v3pgamma2 = value->rValue; + mod->BSIM4v3pgamma2Given = TRUE; + break; + case BSIM4v3_MOD_PVBX: + mod->BSIM4v3pvbx = value->rValue; + mod->BSIM4v3pvbxGiven = TRUE; + break; + case BSIM4v3_MOD_PVBM: + mod->BSIM4v3pvbm = value->rValue; + mod->BSIM4v3pvbmGiven = TRUE; + break; + case BSIM4v3_MOD_PXT: + mod->BSIM4v3pxt = value->rValue; + mod->BSIM4v3pxtGiven = TRUE; + break; + case BSIM4v3_MOD_PK1: + mod->BSIM4v3pk1 = value->rValue; + mod->BSIM4v3pk1Given = TRUE; + break; + case BSIM4v3_MOD_PKT1: + mod->BSIM4v3pkt1 = value->rValue; + mod->BSIM4v3pkt1Given = TRUE; + break; + case BSIM4v3_MOD_PKT1L: + mod->BSIM4v3pkt1l = value->rValue; + mod->BSIM4v3pkt1lGiven = TRUE; + break; + case BSIM4v3_MOD_PKT2: + mod->BSIM4v3pkt2 = value->rValue; + mod->BSIM4v3pkt2Given = TRUE; + break; + case BSIM4v3_MOD_PK2: + mod->BSIM4v3pk2 = value->rValue; + mod->BSIM4v3pk2Given = TRUE; + break; + case BSIM4v3_MOD_PK3: + mod->BSIM4v3pk3 = value->rValue; + mod->BSIM4v3pk3Given = TRUE; + break; + case BSIM4v3_MOD_PK3B: + mod->BSIM4v3pk3b = value->rValue; + mod->BSIM4v3pk3bGiven = TRUE; + break; + case BSIM4v3_MOD_PLPE0: + mod->BSIM4v3plpe0 = value->rValue; + mod->BSIM4v3plpe0Given = TRUE; + break; + case BSIM4v3_MOD_PLPEB: + mod->BSIM4v3plpeb = value->rValue; + mod->BSIM4v3plpebGiven = TRUE; + break; + case BSIM4v3_MOD_PDVTP0: + mod->BSIM4v3pdvtp0 = value->rValue; + mod->BSIM4v3pdvtp0Given = TRUE; + break; + case BSIM4v3_MOD_PDVTP1: + mod->BSIM4v3pdvtp1 = value->rValue; + mod->BSIM4v3pdvtp1Given = TRUE; + break; + case BSIM4v3_MOD_PW0: + mod->BSIM4v3pw0 = value->rValue; + mod->BSIM4v3pw0Given = TRUE; + break; + case BSIM4v3_MOD_PDVT0: + mod->BSIM4v3pdvt0 = value->rValue; + mod->BSIM4v3pdvt0Given = TRUE; + break; + case BSIM4v3_MOD_PDVT1: + mod->BSIM4v3pdvt1 = value->rValue; + mod->BSIM4v3pdvt1Given = TRUE; + break; + case BSIM4v3_MOD_PDVT2: + mod->BSIM4v3pdvt2 = value->rValue; + mod->BSIM4v3pdvt2Given = TRUE; + break; + case BSIM4v3_MOD_PDVT0W: + mod->BSIM4v3pdvt0w = value->rValue; + mod->BSIM4v3pdvt0wGiven = TRUE; + break; + case BSIM4v3_MOD_PDVT1W: + mod->BSIM4v3pdvt1w = value->rValue; + mod->BSIM4v3pdvt1wGiven = TRUE; + break; + case BSIM4v3_MOD_PDVT2W: + mod->BSIM4v3pdvt2w = value->rValue; + mod->BSIM4v3pdvt2wGiven = TRUE; + break; + case BSIM4v3_MOD_PDROUT: + mod->BSIM4v3pdrout = value->rValue; + mod->BSIM4v3pdroutGiven = TRUE; + break; + case BSIM4v3_MOD_PDSUB: + mod->BSIM4v3pdsub = value->rValue; + mod->BSIM4v3pdsubGiven = TRUE; + break; + case BSIM4v3_MOD_PVTH0: + mod->BSIM4v3pvth0 = value->rValue; + mod->BSIM4v3pvth0Given = TRUE; + break; + case BSIM4v3_MOD_PUA: + mod->BSIM4v3pua = value->rValue; + mod->BSIM4v3puaGiven = TRUE; + break; + case BSIM4v3_MOD_PUA1: + mod->BSIM4v3pua1 = value->rValue; + mod->BSIM4v3pua1Given = TRUE; + break; + case BSIM4v3_MOD_PUB: + mod->BSIM4v3pub = value->rValue; + mod->BSIM4v3pubGiven = TRUE; + break; + case BSIM4v3_MOD_PUB1: + mod->BSIM4v3pub1 = value->rValue; + mod->BSIM4v3pub1Given = TRUE; + break; + case BSIM4v3_MOD_PUC: + mod->BSIM4v3puc = value->rValue; + mod->BSIM4v3pucGiven = TRUE; + break; + case BSIM4v3_MOD_PUC1: + mod->BSIM4v3puc1 = value->rValue; + mod->BSIM4v3puc1Given = TRUE; + break; + case BSIM4v3_MOD_PU0 : + mod->BSIM4v3pu0 = value->rValue; + mod->BSIM4v3pu0Given = TRUE; + break; + case BSIM4v3_MOD_PUTE : + mod->BSIM4v3pute = value->rValue; + mod->BSIM4v3puteGiven = TRUE; + break; + case BSIM4v3_MOD_PVOFF: + mod->BSIM4v3pvoff = value->rValue; + mod->BSIM4v3pvoffGiven = TRUE; + break; + case BSIM4v3_MOD_PMINV: + mod->BSIM4v3pminv = value->rValue; + mod->BSIM4v3pminvGiven = TRUE; + break; + case BSIM4v3_MOD_PFPROUT: + mod->BSIM4v3pfprout = value->rValue; + mod->BSIM4v3pfproutGiven = TRUE; + break; + case BSIM4v3_MOD_PPDITS: + mod->BSIM4v3ppdits = value->rValue; + mod->BSIM4v3ppditsGiven = TRUE; + break; + case BSIM4v3_MOD_PPDITSD: + mod->BSIM4v3ppditsd = value->rValue; + mod->BSIM4v3ppditsdGiven = TRUE; + break; + case BSIM4v3_MOD_PDELTA : + mod->BSIM4v3pdelta = value->rValue; + mod->BSIM4v3pdeltaGiven = TRUE; + break; + case BSIM4v3_MOD_PRDSW: + mod->BSIM4v3prdsw = value->rValue; + mod->BSIM4v3prdswGiven = TRUE; + break; + case BSIM4v3_MOD_PRDW: + mod->BSIM4v3prdw = value->rValue; + mod->BSIM4v3prdwGiven = TRUE; + break; + case BSIM4v3_MOD_PRSW: + mod->BSIM4v3prsw = value->rValue; + mod->BSIM4v3prswGiven = TRUE; + break; + case BSIM4v3_MOD_PPRWB: + mod->BSIM4v3pprwb = value->rValue; + mod->BSIM4v3pprwbGiven = TRUE; + break; + case BSIM4v3_MOD_PPRWG: + mod->BSIM4v3pprwg = value->rValue; + mod->BSIM4v3pprwgGiven = TRUE; + break; + case BSIM4v3_MOD_PPRT: + mod->BSIM4v3pprt = value->rValue; + mod->BSIM4v3pprtGiven = TRUE; + break; + case BSIM4v3_MOD_PETA0: + mod->BSIM4v3peta0 = value->rValue; + mod->BSIM4v3peta0Given = TRUE; + break; + case BSIM4v3_MOD_PETAB: + mod->BSIM4v3petab = value->rValue; + mod->BSIM4v3petabGiven = TRUE; + break; + case BSIM4v3_MOD_PPCLM: + mod->BSIM4v3ppclm = value->rValue; + mod->BSIM4v3ppclmGiven = TRUE; + break; + case BSIM4v3_MOD_PPDIBL1: + mod->BSIM4v3ppdibl1 = value->rValue; + mod->BSIM4v3ppdibl1Given = TRUE; + break; + case BSIM4v3_MOD_PPDIBL2: + mod->BSIM4v3ppdibl2 = value->rValue; + mod->BSIM4v3ppdibl2Given = TRUE; + break; + case BSIM4v3_MOD_PPDIBLB: + mod->BSIM4v3ppdiblb = value->rValue; + mod->BSIM4v3ppdiblbGiven = TRUE; + break; + case BSIM4v3_MOD_PPSCBE1: + mod->BSIM4v3ppscbe1 = value->rValue; + mod->BSIM4v3ppscbe1Given = TRUE; + break; + case BSIM4v3_MOD_PPSCBE2: + mod->BSIM4v3ppscbe2 = value->rValue; + mod->BSIM4v3ppscbe2Given = TRUE; + break; + case BSIM4v3_MOD_PPVAG: + mod->BSIM4v3ppvag = value->rValue; + mod->BSIM4v3ppvagGiven = TRUE; + break; + case BSIM4v3_MOD_PWR : + mod->BSIM4v3pwr = value->rValue; + mod->BSIM4v3pwrGiven = TRUE; + break; + case BSIM4v3_MOD_PDWG : + mod->BSIM4v3pdwg = value->rValue; + mod->BSIM4v3pdwgGiven = TRUE; + break; + case BSIM4v3_MOD_PDWB : + mod->BSIM4v3pdwb = value->rValue; + mod->BSIM4v3pdwbGiven = TRUE; + break; + case BSIM4v3_MOD_PB0 : + mod->BSIM4v3pb0 = value->rValue; + mod->BSIM4v3pb0Given = TRUE; + break; + case BSIM4v3_MOD_PB1 : + mod->BSIM4v3pb1 = value->rValue; + mod->BSIM4v3pb1Given = TRUE; + break; + case BSIM4v3_MOD_PALPHA0 : + mod->BSIM4v3palpha0 = value->rValue; + mod->BSIM4v3palpha0Given = TRUE; + break; + case BSIM4v3_MOD_PALPHA1 : + mod->BSIM4v3palpha1 = value->rValue; + mod->BSIM4v3palpha1Given = TRUE; + break; + case BSIM4v3_MOD_PBETA0 : + mod->BSIM4v3pbeta0 = value->rValue; + mod->BSIM4v3pbeta0Given = TRUE; + break; + case BSIM4v3_MOD_PAGIDL : + mod->BSIM4v3pagidl = value->rValue; + mod->BSIM4v3pagidlGiven = TRUE; + break; + case BSIM4v3_MOD_PBGIDL : + mod->BSIM4v3pbgidl = value->rValue; + mod->BSIM4v3pbgidlGiven = TRUE; + break; + case BSIM4v3_MOD_PCGIDL : + mod->BSIM4v3pcgidl = value->rValue; + mod->BSIM4v3pcgidlGiven = TRUE; + break; + case BSIM4v3_MOD_PPHIN : + mod->BSIM4v3pphin = value->rValue; + mod->BSIM4v3pphinGiven = TRUE; + break; + case BSIM4v3_MOD_PEGIDL : + mod->BSIM4v3pegidl = value->rValue; + mod->BSIM4v3pegidlGiven = TRUE; + break; + case BSIM4v3_MOD_PAIGC : + mod->BSIM4v3paigc = value->rValue; + mod->BSIM4v3paigcGiven = TRUE; + break; + case BSIM4v3_MOD_PBIGC : + mod->BSIM4v3pbigc = value->rValue; + mod->BSIM4v3pbigcGiven = TRUE; + break; + case BSIM4v3_MOD_PCIGC : + mod->BSIM4v3pcigc = value->rValue; + mod->BSIM4v3pcigcGiven = TRUE; + break; + case BSIM4v3_MOD_PAIGSD : + mod->BSIM4v3paigsd = value->rValue; + mod->BSIM4v3paigsdGiven = TRUE; + break; + case BSIM4v3_MOD_PBIGSD : + mod->BSIM4v3pbigsd = value->rValue; + mod->BSIM4v3pbigsdGiven = TRUE; + break; + case BSIM4v3_MOD_PCIGSD : + mod->BSIM4v3pcigsd = value->rValue; + mod->BSIM4v3pcigsdGiven = TRUE; + break; + case BSIM4v3_MOD_PAIGBACC : + mod->BSIM4v3paigbacc = value->rValue; + mod->BSIM4v3paigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_PBIGBACC : + mod->BSIM4v3pbigbacc = value->rValue; + mod->BSIM4v3pbigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_PCIGBACC : + mod->BSIM4v3pcigbacc = value->rValue; + mod->BSIM4v3pcigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_PAIGBINV : + mod->BSIM4v3paigbinv = value->rValue; + mod->BSIM4v3paigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_PBIGBINV : + mod->BSIM4v3pbigbinv = value->rValue; + mod->BSIM4v3pbigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_PCIGBINV : + mod->BSIM4v3pcigbinv = value->rValue; + mod->BSIM4v3pcigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_PNIGC : + mod->BSIM4v3pnigc = value->rValue; + mod->BSIM4v3pnigcGiven = TRUE; + break; + case BSIM4v3_MOD_PNIGBINV : + mod->BSIM4v3pnigbinv = value->rValue; + mod->BSIM4v3pnigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_PNIGBACC : + mod->BSIM4v3pnigbacc = value->rValue; + mod->BSIM4v3pnigbaccGiven = TRUE; + break; + case BSIM4v3_MOD_PNTOX : + mod->BSIM4v3pntox = value->rValue; + mod->BSIM4v3pntoxGiven = TRUE; + break; + case BSIM4v3_MOD_PEIGBINV : + mod->BSIM4v3peigbinv = value->rValue; + mod->BSIM4v3peigbinvGiven = TRUE; + break; + case BSIM4v3_MOD_PPIGCD : + mod->BSIM4v3ppigcd = value->rValue; + mod->BSIM4v3ppigcdGiven = TRUE; + break; + case BSIM4v3_MOD_PPOXEDGE : + mod->BSIM4v3ppoxedge = value->rValue; + mod->BSIM4v3ppoxedgeGiven = TRUE; + break; + case BSIM4v3_MOD_PXRCRG1 : + mod->BSIM4v3pxrcrg1 = value->rValue; + mod->BSIM4v3pxrcrg1Given = TRUE; + break; + case BSIM4v3_MOD_PXRCRG2 : + mod->BSIM4v3pxrcrg2 = value->rValue; + mod->BSIM4v3pxrcrg2Given = TRUE; + break; + case BSIM4v3_MOD_PLAMBDA : + mod->BSIM4v3plambda = value->rValue; + mod->BSIM4v3plambdaGiven = TRUE; + break; + case BSIM4v3_MOD_PVTL : + mod->BSIM4v3pvtl = value->rValue; + mod->BSIM4v3pvtlGiven = TRUE; + break; + case BSIM4v3_MOD_PXN: + mod->BSIM4v3pxn = value->rValue; + mod->BSIM4v3pxnGiven = TRUE; + break; + case BSIM4v3_MOD_PEU : + mod->BSIM4v3peu = value->rValue; + mod->BSIM4v3peuGiven = TRUE; + break; + case BSIM4v3_MOD_PVFB : + mod->BSIM4v3pvfb = value->rValue; + mod->BSIM4v3pvfbGiven = TRUE; + break; + case BSIM4v3_MOD_PCGSL : + mod->BSIM4v3pcgsl = value->rValue; + mod->BSIM4v3pcgslGiven = TRUE; + break; + case BSIM4v3_MOD_PCGDL : + mod->BSIM4v3pcgdl = value->rValue; + mod->BSIM4v3pcgdlGiven = TRUE; + break; + case BSIM4v3_MOD_PCKAPPAS : + mod->BSIM4v3pckappas = value->rValue; + mod->BSIM4v3pckappasGiven = TRUE; + break; + case BSIM4v3_MOD_PCKAPPAD : + mod->BSIM4v3pckappad = value->rValue; + mod->BSIM4v3pckappadGiven = TRUE; + break; + case BSIM4v3_MOD_PCF : + mod->BSIM4v3pcf = value->rValue; + mod->BSIM4v3pcfGiven = TRUE; + break; + case BSIM4v3_MOD_PCLC : + mod->BSIM4v3pclc = value->rValue; + mod->BSIM4v3pclcGiven = TRUE; + break; + case BSIM4v3_MOD_PCLE : + mod->BSIM4v3pcle = value->rValue; + mod->BSIM4v3pcleGiven = TRUE; + break; + case BSIM4v3_MOD_PVFBCV : + mod->BSIM4v3pvfbcv = value->rValue; + mod->BSIM4v3pvfbcvGiven = TRUE; + break; + case BSIM4v3_MOD_PACDE : + mod->BSIM4v3pacde = value->rValue; + mod->BSIM4v3pacdeGiven = TRUE; + break; + case BSIM4v3_MOD_PMOIN : + mod->BSIM4v3pmoin = value->rValue; + mod->BSIM4v3pmoinGiven = TRUE; + break; + case BSIM4v3_MOD_PNOFF : + mod->BSIM4v3pnoff = value->rValue; + mod->BSIM4v3pnoffGiven = TRUE; + break; + case BSIM4v3_MOD_PVOFFCV : + mod->BSIM4v3pvoffcv = value->rValue; + mod->BSIM4v3pvoffcvGiven = TRUE; + break; + + case BSIM4v3_MOD_TNOM : + mod->BSIM4v3tnom = value->rValue + CONSTCtoK; + mod->BSIM4v3tnomGiven = TRUE; + break; + case BSIM4v3_MOD_CGSO : + mod->BSIM4v3cgso = value->rValue; + mod->BSIM4v3cgsoGiven = TRUE; + break; + case BSIM4v3_MOD_CGDO : + mod->BSIM4v3cgdo = value->rValue; + mod->BSIM4v3cgdoGiven = TRUE; + break; + case BSIM4v3_MOD_CGBO : + mod->BSIM4v3cgbo = value->rValue; + mod->BSIM4v3cgboGiven = TRUE; + break; + case BSIM4v3_MOD_XPART : + mod->BSIM4v3xpart = value->rValue; + mod->BSIM4v3xpartGiven = TRUE; + break; + case BSIM4v3_MOD_RSH : + mod->BSIM4v3sheetResistance = value->rValue; + mod->BSIM4v3sheetResistanceGiven = TRUE; + break; + case BSIM4v3_MOD_JSS : + mod->BSIM4v3SjctSatCurDensity = value->rValue; + mod->BSIM4v3SjctSatCurDensityGiven = TRUE; + break; + case BSIM4v3_MOD_JSWS : + mod->BSIM4v3SjctSidewallSatCurDensity = value->rValue; + mod->BSIM4v3SjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v3_MOD_JSWGS : + mod->BSIM4v3SjctGateSidewallSatCurDensity = value->rValue; + mod->BSIM4v3SjctGateSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v3_MOD_PBS : + mod->BSIM4v3SbulkJctPotential = value->rValue; + mod->BSIM4v3SbulkJctPotentialGiven = TRUE; + break; + case BSIM4v3_MOD_MJS : + mod->BSIM4v3SbulkJctBotGradingCoeff = value->rValue; + mod->BSIM4v3SbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_PBSWS : + mod->BSIM4v3SsidewallJctPotential = value->rValue; + mod->BSIM4v3SsidewallJctPotentialGiven = TRUE; + break; + case BSIM4v3_MOD_MJSWS : + mod->BSIM4v3SbulkJctSideGradingCoeff = value->rValue; + mod->BSIM4v3SbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_CJS : + mod->BSIM4v3SunitAreaJctCap = value->rValue; + mod->BSIM4v3SunitAreaJctCapGiven = TRUE; + break; + case BSIM4v3_MOD_CJSWS : + mod->BSIM4v3SunitLengthSidewallJctCap = value->rValue; + mod->BSIM4v3SunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM4v3_MOD_NJS : + mod->BSIM4v3SjctEmissionCoeff = value->rValue; + mod->BSIM4v3SjctEmissionCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_PBSWGS : + mod->BSIM4v3SGatesidewallJctPotential = value->rValue; + mod->BSIM4v3SGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM4v3_MOD_MJSWGS : + mod->BSIM4v3SbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM4v3SbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_CJSWGS : + mod->BSIM4v3SunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM4v3SunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM4v3_MOD_XTIS : + mod->BSIM4v3SjctTempExponent = value->rValue; + mod->BSIM4v3SjctTempExponentGiven = TRUE; + break; + case BSIM4v3_MOD_JSD : + mod->BSIM4v3DjctSatCurDensity = value->rValue; + mod->BSIM4v3DjctSatCurDensityGiven = TRUE; + break; + case BSIM4v3_MOD_JSWD : + mod->BSIM4v3DjctSidewallSatCurDensity = value->rValue; + mod->BSIM4v3DjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v3_MOD_JSWGD : + mod->BSIM4v3DjctGateSidewallSatCurDensity = value->rValue; + mod->BSIM4v3DjctGateSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v3_MOD_PBD : + mod->BSIM4v3DbulkJctPotential = value->rValue; + mod->BSIM4v3DbulkJctPotentialGiven = TRUE; + break; + case BSIM4v3_MOD_MJD : + mod->BSIM4v3DbulkJctBotGradingCoeff = value->rValue; + mod->BSIM4v3DbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_PBSWD : + mod->BSIM4v3DsidewallJctPotential = value->rValue; + mod->BSIM4v3DsidewallJctPotentialGiven = TRUE; + break; + case BSIM4v3_MOD_MJSWD : + mod->BSIM4v3DbulkJctSideGradingCoeff = value->rValue; + mod->BSIM4v3DbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_CJD : + mod->BSIM4v3DunitAreaJctCap = value->rValue; + mod->BSIM4v3DunitAreaJctCapGiven = TRUE; + break; + case BSIM4v3_MOD_CJSWD : + mod->BSIM4v3DunitLengthSidewallJctCap = value->rValue; + mod->BSIM4v3DunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM4v3_MOD_NJD : + mod->BSIM4v3DjctEmissionCoeff = value->rValue; + mod->BSIM4v3DjctEmissionCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_PBSWGD : + mod->BSIM4v3DGatesidewallJctPotential = value->rValue; + mod->BSIM4v3DGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM4v3_MOD_MJSWGD : + mod->BSIM4v3DbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM4v3DbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM4v3_MOD_CJSWGD : + mod->BSIM4v3DunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM4v3DunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM4v3_MOD_XTID : + mod->BSIM4v3DjctTempExponent = value->rValue; + mod->BSIM4v3DjctTempExponentGiven = TRUE; + break; + case BSIM4v3_MOD_LINT : + mod->BSIM4v3Lint = value->rValue; + mod->BSIM4v3LintGiven = TRUE; + break; + case BSIM4v3_MOD_LL : + mod->BSIM4v3Ll = value->rValue; + mod->BSIM4v3LlGiven = TRUE; + break; + case BSIM4v3_MOD_LLC : + mod->BSIM4v3Llc = value->rValue; + mod->BSIM4v3LlcGiven = TRUE; + break; + case BSIM4v3_MOD_LLN : + mod->BSIM4v3Lln = value->rValue; + mod->BSIM4v3LlnGiven = TRUE; + break; + case BSIM4v3_MOD_LW : + mod->BSIM4v3Lw = value->rValue; + mod->BSIM4v3LwGiven = TRUE; + break; + case BSIM4v3_MOD_LWC : + mod->BSIM4v3Lwc = value->rValue; + mod->BSIM4v3LwcGiven = TRUE; + break; + case BSIM4v3_MOD_LWN : + mod->BSIM4v3Lwn = value->rValue; + mod->BSIM4v3LwnGiven = TRUE; + break; + case BSIM4v3_MOD_LWL : + mod->BSIM4v3Lwl = value->rValue; + mod->BSIM4v3LwlGiven = TRUE; + break; + case BSIM4v3_MOD_LWLC : + mod->BSIM4v3Lwlc = value->rValue; + mod->BSIM4v3LwlcGiven = TRUE; + break; + case BSIM4v3_MOD_LMIN : + mod->BSIM4v3Lmin = value->rValue; + mod->BSIM4v3LminGiven = TRUE; + break; + case BSIM4v3_MOD_LMAX : + mod->BSIM4v3Lmax = value->rValue; + mod->BSIM4v3LmaxGiven = TRUE; + break; + case BSIM4v3_MOD_WINT : + mod->BSIM4v3Wint = value->rValue; + mod->BSIM4v3WintGiven = TRUE; + break; + case BSIM4v3_MOD_WL : + mod->BSIM4v3Wl = value->rValue; + mod->BSIM4v3WlGiven = TRUE; + break; + case BSIM4v3_MOD_WLC : + mod->BSIM4v3Wlc = value->rValue; + mod->BSIM4v3WlcGiven = TRUE; + break; + case BSIM4v3_MOD_WLN : + mod->BSIM4v3Wln = value->rValue; + mod->BSIM4v3WlnGiven = TRUE; + break; + case BSIM4v3_MOD_WW : + mod->BSIM4v3Ww = value->rValue; + mod->BSIM4v3WwGiven = TRUE; + break; + case BSIM4v3_MOD_WWC : + mod->BSIM4v3Wwc = value->rValue; + mod->BSIM4v3WwcGiven = TRUE; + break; + case BSIM4v3_MOD_WWN : + mod->BSIM4v3Wwn = value->rValue; + mod->BSIM4v3WwnGiven = TRUE; + break; + case BSIM4v3_MOD_WWL : + mod->BSIM4v3Wwl = value->rValue; + mod->BSIM4v3WwlGiven = TRUE; + break; + case BSIM4v3_MOD_WWLC : + mod->BSIM4v3Wwlc = value->rValue; + mod->BSIM4v3WwlcGiven = TRUE; + break; + case BSIM4v3_MOD_WMIN : + mod->BSIM4v3Wmin = value->rValue; + mod->BSIM4v3WminGiven = TRUE; + break; + case BSIM4v3_MOD_WMAX : + mod->BSIM4v3Wmax = value->rValue; + mod->BSIM4v3WmaxGiven = TRUE; + break; + + case BSIM4v3_MOD_NOIA : + mod->BSIM4v3oxideTrapDensityA = value->rValue; + mod->BSIM4v3oxideTrapDensityAGiven = TRUE; + break; + case BSIM4v3_MOD_NOIB : + mod->BSIM4v3oxideTrapDensityB = value->rValue; + mod->BSIM4v3oxideTrapDensityBGiven = TRUE; + break; + case BSIM4v3_MOD_NOIC : + mod->BSIM4v3oxideTrapDensityC = value->rValue; + mod->BSIM4v3oxideTrapDensityCGiven = TRUE; + break; + case BSIM4v3_MOD_EM : + mod->BSIM4v3em = value->rValue; + mod->BSIM4v3emGiven = TRUE; + break; + case BSIM4v3_MOD_EF : + mod->BSIM4v3ef = value->rValue; + mod->BSIM4v3efGiven = TRUE; + break; + case BSIM4v3_MOD_AF : + mod->BSIM4v3af = value->rValue; + mod->BSIM4v3afGiven = TRUE; + break; + case BSIM4v3_MOD_KF : + mod->BSIM4v3kf = value->rValue; + mod->BSIM4v3kfGiven = TRUE; + break; + case BSIM4v3_MOD_NMOS : + if(value->iValue) { + mod->BSIM4v3type = 1; + mod->BSIM4v3typeGiven = TRUE; + } + break; + case BSIM4v3_MOD_PMOS : + if(value->iValue) { + mod->BSIM4v3type = - 1; + mod->BSIM4v3typeGiven = TRUE; + } + break; + default: + return(E_BADPARM); + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim4v3/b4v3noi.c b/src/spicelib/devices/bsim4v3/b4v3noi.c new file mode 100644 index 000000000..76f936202 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3noi.c @@ -0,0 +1,486 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3noi.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "bsim4v3def.h" +#include "cktdefs.h" +#include "iferrmsg.h" +#include "noisedef.h" +#include "const.h" + + +extern void NevalSrc(); +extern double Nintegrate(); + +/* + * WDL: 1/f noise model has been smoothed out and enhanced with + * bulk charge effect as well as physical N* equ. and necessary + * conversion into the SI unit system. + */ + +static double +BSIM4v3Eval1ovFNoise(Vds, model, here, freq, temp) +double Vds, freq, temp; +BSIM4v3model *model; +BSIM4v3instance *here; +{ +struct bsim4v3SizeDependParam *pParam; +double cd, esat, DelClm, EffFreq, N0, Nl; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13, Ssi; + + pParam = here->pParam; + cd = fabs(here->BSIM4v3cd); + esat = 2.0 * pParam->BSIM4v3vsattemp / here->BSIM4v3ueff; + if(model->BSIM4v3em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */ + else { + T0 = ((((Vds - here->BSIM4v3Vdseff) / pParam->BSIM4v3litl) + + model->BSIM4v3em) / esat); + DelClm = pParam->BSIM4v3litl * log (MAX(T0, N_MINLOG)); + } + EffFreq = pow(freq, model->BSIM4v3ef); + T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4v3ueff; + T2 = 1.0e10 * EffFreq * here->BSIM4v3Abulk * model->BSIM4v3coxe + * pParam->BSIM4v3leff * pParam->BSIM4v3leff; + N0 = model->BSIM4v3coxe * here->BSIM4v3Vgsteff / CHARGE; + Nl = model->BSIM4v3coxe * here->BSIM4v3Vgsteff + * (1.0 - here->BSIM4v3AbovVgst2Vtm * here->BSIM4v3Vdseff) / CHARGE; + + T3 = model->BSIM4v3oxideTrapDensityA + * log(MAX(((N0 + here->BSIM4v3nstar) / (Nl + here->BSIM4v3nstar)), N_MINLOG)); + T4 = model->BSIM4v3oxideTrapDensityB * (N0 - Nl); + T5 = model->BSIM4v3oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); + + T6 = CONSTboltz * temp * cd * cd; + T7 = 1.0e10 * EffFreq * pParam->BSIM4v3leff + * pParam->BSIM4v3leff * pParam->BSIM4v3weff; + T8 = model->BSIM4v3oxideTrapDensityA + model->BSIM4v3oxideTrapDensityB * Nl + + model->BSIM4v3oxideTrapDensityC * Nl * Nl; + T9 = (Nl + here->BSIM4v3nstar) * (Nl + here->BSIM4v3nstar); + Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; + return Ssi; +} + + +int +BSIM4v3noise (mode, operation, inModel, ckt, data, OnDens) +int mode, operation; +GENmodel *inModel; +CKTcircuit *ckt; +Ndata *data; +double *OnDens; +{ +BSIM4v3model *model = (BSIM4v3model *)inModel; +BSIM4v3instance *here; +struct bsim4v3SizeDependParam *pParam; +char name[N_MXVLNTH]; +double tempOnoise; +double tempInoise; +double noizDens[BSIM4v3NSRCS]; +double lnNdens[BSIM4v3NSRCS]; + +double N0, Nl; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13; +double Vds, n, ExpArg, Ssi, Swi; +double tmp, gdpr, gspr, npart_theta, npart_beta, igsquare; + +int error, i; + + /* define the names of the noise sources */ + static char *BSIM4v3nNames[BSIM4v3NSRCS] = + { /* Note that we have to keep the order */ + ".rd", /* noise due to rd */ + ".rs", /* noise due to rs */ + ".rg", /* noise due to rgeltd */ + ".rbps", /* noise due to rbps */ + ".rbpd", /* noise due to rbpd */ + ".rbpb", /* noise due to rbpb */ + ".rbsb", /* noise due to rbsb */ + ".rbdb", /* noise due to rbdb */ + ".id", /* noise due to id */ + ".1overf", /* flicker (1/f) noise */ + ".igs", /* shot noise due to IGS */ + ".igd", /* shot noise due to IGD */ + ".igb", /* shot noise due to IGB */ + "" /* total transistor noise */ + }; + + for (; model != NULL; model = model->BSIM4v3nextModel) + { for (here = model->BSIM4v3instances; here != NULL; + here = here->BSIM4v3nextInstance) + { pParam = here->pParam; + switch (operation) + { case N_OPEN: + /* see if we have to to produce a summary report */ + /* if so, name all the noise generators */ + + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { switch (mode) + { case N_DENS: + for (i = 0; i < BSIM4v3NSRCS; i++) + { (void) sprintf(name, "onoise.%s%s", + here->BSIM4v3name, + BSIM4v3nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + } + break; + case INT_NOIZ: + for (i = 0; i < BSIM4v3NSRCS; i++) + { (void) sprintf(name, "onoise_total.%s%s", + here->BSIM4v3name, + BSIM4v3nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + + (void) sprintf(name, "inoise_total.%s%s", + here->BSIM4v3name, + BSIM4v3nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **)NULL); + /* we've added one more plot */ + } + break; + } + } + break; + case N_CALC: + switch (mode) + { case N_DENS: + if (model->BSIM4v3tnoiMod == 0) + { if (model->BSIM4v3rdsMod == 0) + { gspr = here->BSIM4v3sourceConductance; + gdpr = here->BSIM4v3drainConductance; + if (here->BSIM4v3grdsw > 0.0) + tmp = 1.0 / here->BSIM4v3grdsw; /* tmp used below */ + else + tmp = 0.0; + } + else + { gspr = here->BSIM4v3gstot; + gdpr = here->BSIM4v3gdtot; + tmp = 0.0; + } + } + else + { T5 = here->BSIM4v3Vgsteff / here->BSIM4v3EsatL; + T5 *= T5; + npart_beta = model->BSIM4v3rnoia * (1.0 + T5 + * model->BSIM4v3tnoia * pParam->BSIM4v3leff); + npart_theta = model->BSIM4v3rnoib * (1.0 + T5 + * model->BSIM4v3tnoib * pParam->BSIM4v3leff); + + if (model->BSIM4v3rdsMod == 0) + { gspr = here->BSIM4v3sourceConductance; + gdpr = here->BSIM4v3drainConductance; + } + else + { gspr = here->BSIM4v3gstot; + gdpr = here->BSIM4v3gdtot; + } + + if ((*(ckt->CKTstates[0] + here->BSIM4v3vds)) >= 0.0) + gspr = gspr / (1.0 + npart_theta * npart_theta * gspr + / here->BSIM4v3IdovVds); /* bugfix */ + else + gdpr = gdpr / (1.0 + npart_theta * npart_theta * gdpr + / here->BSIM4v3IdovVds); + } + + NevalSrc(&noizDens[BSIM4v3RDNOIZ], + &lnNdens[BSIM4v3RDNOIZ], ckt, THERMNOISE, + here->BSIM4v3dNodePrime, here->BSIM4v3dNode, + gdpr); + + NevalSrc(&noizDens[BSIM4v3RSNOIZ], + &lnNdens[BSIM4v3RSNOIZ], ckt, THERMNOISE, + here->BSIM4v3sNodePrime, here->BSIM4v3sNode, + gspr); + + + if ((here->BSIM4v3rgateMod == 1) || (here->BSIM4v3rgateMod == 2)) + { NevalSrc(&noizDens[BSIM4v3RGNOIZ], + &lnNdens[BSIM4v3RGNOIZ], ckt, THERMNOISE, + here->BSIM4v3gNodePrime, here->BSIM4v3gNodeExt, + here->BSIM4v3grgeltd); + } + else if (here->BSIM4v3rgateMod == 3) + { NevalSrc(&noizDens[BSIM4v3RGNOIZ], + &lnNdens[BSIM4v3RGNOIZ], ckt, THERMNOISE, + here->BSIM4v3gNodeMid, here->BSIM4v3gNodeExt, + here->BSIM4v3grgeltd); + } + else + { noizDens[BSIM4v3RGNOIZ] = 0.0; + lnNdens[BSIM4v3RGNOIZ] = + log(MAX(noizDens[BSIM4v3RGNOIZ], N_MINLOG)); + } + + + if (here->BSIM4v3rbodyMod) + { NevalSrc(&noizDens[BSIM4v3RBPSNOIZ], + &lnNdens[BSIM4v3RBPSNOIZ], ckt, THERMNOISE, + here->BSIM4v3bNodePrime, here->BSIM4v3sbNode, + here->BSIM4v3grbps); + NevalSrc(&noizDens[BSIM4v3RBPDNOIZ], + &lnNdens[BSIM4v3RBPDNOIZ], ckt, THERMNOISE, + here->BSIM4v3bNodePrime, here->BSIM4v3dbNode, + here->BSIM4v3grbpd); + NevalSrc(&noizDens[BSIM4v3RBPBNOIZ], + &lnNdens[BSIM4v3RBPBNOIZ], ckt, THERMNOISE, + here->BSIM4v3bNodePrime, here->BSIM4v3bNode, + here->BSIM4v3grbpb); + NevalSrc(&noizDens[BSIM4v3RBSBNOIZ], + &lnNdens[BSIM4v3RBSBNOIZ], ckt, THERMNOISE, + here->BSIM4v3bNode, here->BSIM4v3sbNode, + here->BSIM4v3grbsb); + NevalSrc(&noizDens[BSIM4v3RBDBNOIZ], + &lnNdens[BSIM4v3RBDBNOIZ], ckt, THERMNOISE, + here->BSIM4v3bNode, here->BSIM4v3dbNode, + here->BSIM4v3grbdb); + } + else + { noizDens[BSIM4v3RBPSNOIZ] = noizDens[BSIM4v3RBPDNOIZ] = 0.0; + noizDens[BSIM4v3RBPBNOIZ] = 0.0; + noizDens[BSIM4v3RBSBNOIZ] = noizDens[BSIM4v3RBDBNOIZ] = 0.0; + lnNdens[BSIM4v3RBPSNOIZ] = + log(MAX(noizDens[BSIM4v3RBPSNOIZ], N_MINLOG)); + lnNdens[BSIM4v3RBPDNOIZ] = + log(MAX(noizDens[BSIM4v3RBPDNOIZ], N_MINLOG)); + lnNdens[BSIM4v3RBPBNOIZ] = + log(MAX(noizDens[BSIM4v3RBPBNOIZ], N_MINLOG)); + lnNdens[BSIM4v3RBSBNOIZ] = + log(MAX(noizDens[BSIM4v3RBSBNOIZ], N_MINLOG)); + lnNdens[BSIM4v3RBDBNOIZ] = + log(MAX(noizDens[BSIM4v3RBDBNOIZ], N_MINLOG)); + } + + + switch(model->BSIM4v3tnoiMod) + { case 0: + T0 = here->BSIM4v3ueff * fabs(here->BSIM4v3qinv); + T1 = T0 * tmp + pParam->BSIM4v3leff + * pParam->BSIM4v3leff; + NevalSrc(&noizDens[BSIM4v3IDNOIZ], + &lnNdens[BSIM4v3IDNOIZ], ckt, + THERMNOISE, here->BSIM4v3dNodePrime, + here->BSIM4v3sNodePrime, + (T0 / T1) * model->BSIM4v3ntnoi); + break; + case 1: + T0 = here->BSIM4v3gm + here->BSIM4v3gmbs + here->BSIM4v3gds; + T0 *= T0; + igsquare = npart_theta * npart_theta * T0 / here->BSIM4v3IdovVds; + T1 = npart_beta * (here->BSIM4v3gm + + here->BSIM4v3gmbs) + here->BSIM4v3gds; + T2 = T1 * T1 / here->BSIM4v3IdovVds; + NevalSrc(&noizDens[BSIM4v3IDNOIZ], + &lnNdens[BSIM4v3IDNOIZ], ckt, + THERMNOISE, here->BSIM4v3dNodePrime, + here->BSIM4v3sNodePrime, (T2 - igsquare)); + break; + } + + NevalSrc(&noizDens[BSIM4v3FLNOIZ], (double*) NULL, + ckt, N_GAIN, here->BSIM4v3dNodePrime, + here->BSIM4v3sNodePrime, (double) 0.0); + + switch(model->BSIM4v3fnoiMod) + { case 0: + noizDens[BSIM4v3FLNOIZ] *= model->BSIM4v3kf + * exp(model->BSIM4v3af + * log(MAX(fabs(here->BSIM4v3cd), + N_MINLOG))) + / (pow(data->freq, model->BSIM4v3ef) + * pParam->BSIM4v3leff + * pParam->BSIM4v3leff + * model->BSIM4v3coxe); + break; + case 1: + Vds = *(ckt->CKTstates[0] + here->BSIM4v3vds); + if (Vds < 0.0) + Vds = -Vds; + + Ssi = BSIM4v3Eval1ovFNoise(Vds, model, here, + data->freq, ckt->CKTtemp); + T10 = model->BSIM4v3oxideTrapDensityA + * CONSTboltz * ckt->CKTtemp; + T11 = pParam->BSIM4v3weff * pParam->BSIM4v3leff + * pow(data->freq, model->BSIM4v3ef) * 1.0e10 + * here->BSIM4v3nstar * here->BSIM4v3nstar; + Swi = T10 / T11 * here->BSIM4v3cd + * here->BSIM4v3cd; + T1 = Swi + Ssi; + if (T1 > 0.0) + noizDens[BSIM4v3FLNOIZ] *= (Ssi * Swi) / T1; + else + noizDens[BSIM4v3FLNOIZ] *= 0.0; + break; + } + + lnNdens[BSIM4v3FLNOIZ] = + log(MAX(noizDens[BSIM4v3FLNOIZ], N_MINLOG)); + + + if(here->BSIM4v3mode >= 0) { /* bugfix */ + NevalSrc(&noizDens[BSIM4v3IGSNOIZ], + &lnNdens[BSIM4v3IGSNOIZ], ckt, SHOTNOISE, + here->BSIM4v3gNodePrime, here->BSIM4v3sNodePrime, + (here->BSIM4v3Igs + here->BSIM4v3Igcs)); + NevalSrc(&noizDens[BSIM4v3IGDNOIZ], + &lnNdens[BSIM4v3IGDNOIZ], ckt, SHOTNOISE, + here->BSIM4v3gNodePrime, here->BSIM4v3dNodePrime, + (here->BSIM4v3Igd + here->BSIM4v3Igcd)); + } else { + NevalSrc(&noizDens[BSIM4v3IGSNOIZ], + &lnNdens[BSIM4v3IGSNOIZ], ckt, SHOTNOISE, + here->BSIM4v3gNodePrime, here->BSIM4v3sNodePrime, + (here->BSIM4v3Igs + here->BSIM4v3Igcd)); + NevalSrc(&noizDens[BSIM4v3IGDNOIZ], + &lnNdens[BSIM4v3IGDNOIZ], ckt, SHOTNOISE, + here->BSIM4v3gNodePrime, here->BSIM4v3dNodePrime, + (here->BSIM4v3Igd + here->BSIM4v3Igcs)); + } + NevalSrc(&noizDens[BSIM4v3IGBNOIZ], + &lnNdens[BSIM4v3IGBNOIZ], ckt, SHOTNOISE, + here->BSIM4v3gNodePrime, here->BSIM4v3bNodePrime, + here->BSIM4v3Igb); + + + noizDens[BSIM4v3TOTNOIZ] = noizDens[BSIM4v3RDNOIZ] + + noizDens[BSIM4v3RSNOIZ] + noizDens[BSIM4v3RGNOIZ] + + noizDens[BSIM4v3RBPSNOIZ] + noizDens[BSIM4v3RBPDNOIZ] + + noizDens[BSIM4v3RBPBNOIZ] + + noizDens[BSIM4v3RBSBNOIZ] + noizDens[BSIM4v3RBDBNOIZ] + + noizDens[BSIM4v3IDNOIZ] + noizDens[BSIM4v3FLNOIZ] + + noizDens[BSIM4v3IGSNOIZ] + noizDens[BSIM4v3IGDNOIZ] + + noizDens[BSIM4v3IGBNOIZ]; + lnNdens[BSIM4v3TOTNOIZ] = + log(MAX(noizDens[BSIM4v3TOTNOIZ], N_MINLOG)); + + *OnDens += noizDens[BSIM4v3TOTNOIZ]; + + if (data->delFreq == 0.0) + { /* if we haven't done any previous + integration, we need to initialize our + "history" variables. + */ + + for (i = 0; i < BSIM4v3NSRCS; i++) + { here->BSIM4v3nVar[LNLSTDENS][i] = + lnNdens[i]; + } + + /* clear out our integration variables + if it's the first pass + */ + if (data->freq == + ((NOISEAN*) ckt->CKTcurJob)->NstartFreq) + { for (i = 0; i < BSIM4v3NSRCS; i++) + { here->BSIM4v3nVar[OUTNOIZ][i] = 0.0; + here->BSIM4v3nVar[INNOIZ][i] = 0.0; + } + } + } + else + { /* data->delFreq != 0.0, + we have to integrate. + */ + for (i = 0; i < BSIM4v3NSRCS; i++) + { if (i != BSIM4v3TOTNOIZ) + { tempOnoise = Nintegrate(noizDens[i], + lnNdens[i], + here->BSIM4v3nVar[LNLSTDENS][i], + data); + tempInoise = Nintegrate(noizDens[i] + * data->GainSqInv, lnNdens[i] + + data->lnGainInv, + here->BSIM4v3nVar[LNLSTDENS][i] + + data->lnGainInv, data); + here->BSIM4v3nVar[LNLSTDENS][i] = + lnNdens[i]; + data->outNoiz += tempOnoise; + data->inNoise += tempInoise; + if (((NOISEAN*) + ckt->CKTcurJob)->NStpsSm != 0) + { here->BSIM4v3nVar[OUTNOIZ][i] + += tempOnoise; + here->BSIM4v3nVar[OUTNOIZ][BSIM4v3TOTNOIZ] + += tempOnoise; + here->BSIM4v3nVar[INNOIZ][i] + += tempInoise; + here->BSIM4v3nVar[INNOIZ][BSIM4v3TOTNOIZ] + += tempInoise; + } + } + } + } + if (data->prtSummary) + { for (i = 0; i < BSIM4v3NSRCS; i++) + { /* print a summary report */ + data->outpVector[data->outNumber++] + = noizDens[i]; + } + } + break; + case INT_NOIZ: + /* already calculated, just output */ + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { for (i = 0; i < BSIM4v3NSRCS; i++) + { data->outpVector[data->outNumber++] + = here->BSIM4v3nVar[OUTNOIZ][i]; + data->outpVector[data->outNumber++] + = here->BSIM4v3nVar[INNOIZ][i]; + } + } + break; + } + break; + case N_CLOSE: + /* do nothing, the main calling routine will close */ + return (OK); + break; /* the plots */ + } /* switch (operation) */ + } /* for here */ + } /* for model */ + + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3par.c b/src/spicelib/devices/bsim4v3/b4v3par.c new file mode 100644 index 000000000..2ccc7530b --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3par.c @@ -0,0 +1,165 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3par.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include "ifsim.h" +#include "bsim4v3def.h" +#include "sperror.h" +#include "fteext.h" + +int +BSIM4v3param(param,value,inst,select) +int param; +IFvalue *value; +GENinstance *inst; +IFvalue *select; +{ + double scale; + + if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1; + + BSIM4v3instance *here = (BSIM4v3instance*)inst; + switch(param) + { case BSIM4v3_W: + here->BSIM4v3w = value->rValue*scale; + here->BSIM4v3wGiven = TRUE; + break; + case BSIM4v3_L: + here->BSIM4v3l = value->rValue*scale; + here->BSIM4v3lGiven = TRUE; + break; + case BSIM4v3_NF: + here->BSIM4v3nf = value->rValue; + here->BSIM4v3nfGiven = TRUE; + break; + case BSIM4v3_MIN: + here->BSIM4v3min = value->iValue; + here->BSIM4v3minGiven = TRUE; + break; + case BSIM4v3_AS: + here->BSIM4v3sourceArea = value->rValue*scale*scale; + here->BSIM4v3sourceAreaGiven = TRUE; + break; + case BSIM4v3_AD: + here->BSIM4v3drainArea = value->rValue*scale*scale; + here->BSIM4v3drainAreaGiven = TRUE; + break; + case BSIM4v3_PS: + here->BSIM4v3sourcePerimeter = value->rValue*scale; + here->BSIM4v3sourcePerimeterGiven = TRUE; + break; + case BSIM4v3_PD: + here->BSIM4v3drainPerimeter = value->rValue*scale; + here->BSIM4v3drainPerimeterGiven = TRUE; + break; + case BSIM4v3_NRS: + here->BSIM4v3sourceSquares = value->rValue; + here->BSIM4v3sourceSquaresGiven = TRUE; + break; + case BSIM4v3_NRD: + here->BSIM4v3drainSquares = value->rValue; + here->BSIM4v3drainSquaresGiven = TRUE; + break; + case BSIM4v3_OFF: + here->BSIM4v3off = value->iValue; + break; + case BSIM4v3_SA: + here->BSIM4v3sa = value->rValue; + here->BSIM4v3saGiven = TRUE; + break; + case BSIM4v3_SB: + here->BSIM4v3sb = value->rValue; + here->BSIM4v3sbGiven = TRUE; + break; + case BSIM4v3_SD: + here->BSIM4v3sd = value->rValue; + here->BSIM4v3sdGiven = TRUE; + break; + case BSIM4v3_RBSB: + here->BSIM4v3rbsb = value->rValue; + here->BSIM4v3rbsbGiven = TRUE; + break; + case BSIM4v3_RBDB: + here->BSIM4v3rbdb = value->rValue; + here->BSIM4v3rbdbGiven = TRUE; + break; + case BSIM4v3_RBPB: + here->BSIM4v3rbpb = value->rValue; + here->BSIM4v3rbpbGiven = TRUE; + break; + case BSIM4v3_RBPS: + here->BSIM4v3rbps = value->rValue; + here->BSIM4v3rbpsGiven = TRUE; + break; + case BSIM4v3_RBPD: + here->BSIM4v3rbpd = value->rValue; + here->BSIM4v3rbpdGiven = TRUE; + break; + case BSIM4v3_TRNQSMOD: + here->BSIM4v3trnqsMod = value->iValue; + here->BSIM4v3trnqsModGiven = TRUE; + break; + case BSIM4v3_ACNQSMOD: + here->BSIM4v3acnqsMod = value->iValue; + here->BSIM4v3acnqsModGiven = TRUE; + break; + case BSIM4v3_RBODYMOD: + here->BSIM4v3rbodyMod = value->iValue; + here->BSIM4v3rbodyModGiven = TRUE; + break; + case BSIM4v3_RGATEMOD: + here->BSIM4v3rgateMod = value->iValue; + here->BSIM4v3rgateModGiven = TRUE; + break; + case BSIM4v3_GEOMOD: + here->BSIM4v3geoMod = value->iValue; + here->BSIM4v3geoModGiven = TRUE; + break; + case BSIM4v3_RGEOMOD: + here->BSIM4v3rgeoMod = value->iValue; + here->BSIM4v3rgeoModGiven = TRUE; + break; + case BSIM4v3_IC_VDS: + here->BSIM4v3icVDS = value->rValue; + here->BSIM4v3icVDSGiven = TRUE; + break; + case BSIM4v3_IC_VGS: + here->BSIM4v3icVGS = value->rValue; + here->BSIM4v3icVGSGiven = TRUE; + break; + case BSIM4v3_IC_VBS: + here->BSIM4v3icVBS = value->rValue; + here->BSIM4v3icVBSGiven = TRUE; + break; + case BSIM4v3_IC: + switch(value->v.numValue) + { case 3: + here->BSIM4v3icVBS = *(value->v.vec.rVec+2); + here->BSIM4v3icVBSGiven = TRUE; + case 2: + here->BSIM4v3icVGS = *(value->v.vec.rVec+1); + here->BSIM4v3icVGSGiven = TRUE; + case 1: + here->BSIM4v3icVDS = *(value->v.vec.rVec); + here->BSIM4v3icVDSGiven = TRUE; + break; + default: + return(E_BADPARM); + } + break; + default: + return(E_BADPARM); + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3pzld.c b/src/spicelib/devices/bsim4v3/b4v3pzld.c new file mode 100644 index 000000000..ac3ef6675 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3pzld.c @@ -0,0 +1,755 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3pzld.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include +#include "cktdefs.h" +#include "complex.h" +#include "sperror.h" +#include "bsim4v3def.h" + +int +BSIM4v3pzLoad(inModel,ckt,s) +GENmodel *inModel; +CKTcircuit *ckt; +SPcomplex *s; +{ +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance *here; + +double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb; +double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb; +double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb; +double gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs; +double gstot, gstotd, gstotg, gstots, gstotb, gspr; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double gIstotg, gIstotd, gIstots, gIstotb; +double gIdtotg, gIdtotd, gIdtots, gIdtotb; +double gIbtotg, gIbtotd, gIbtots, gIbtotb; +double gIgtotg, gIgtotd, gIgtots, gIgtotb; +double cgso, cgdo, cgbo; +double xcdbdb, xcsbsb, xcgmgmb, xcgmdb, xcgmsb, xcdgmb, xcsgmb; +double xcgmbb, xcbgmb; +double dxpart, sxpart, xgtg, xgtd, xgts, xgtb, xcqgb, xcqdb, xcqsb, xcqbb; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double T0, T1, CoxWL, qcheq, Cdg, Cdd, Cds, Cdb, Csg, Csd, Css, Csb; +double ScalingFactor = 1.0e-9; +struct bsim4v3SizeDependParam *pParam; +double ggidld, ggidlg, ggidlb,ggisld, ggislg, ggislb, ggisls; + + + for (; model != NULL; model = model->BSIM4v3nextModel) + { for (here = model->BSIM4v3instances; here!= NULL; + here = here->BSIM4v3nextInstance) + { if (here->BSIM4v3owner != ARCHme) continue; + pParam = here->pParam; + capbd = here->BSIM4v3capbd; + capbs = here->BSIM4v3capbs; + cgso = here->BSIM4v3cgso; + cgdo = here->BSIM4v3cgdo; + cgbo = pParam->BSIM4v3cgbo; + + if (here->BSIM4v3mode >= 0) + { Gm = here->BSIM4v3gm; + Gmbs = here->BSIM4v3gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + gbbdp = -(here->BSIM4v3gbds); + gbbsp = here->BSIM4v3gbds + here->BSIM4v3gbgs + here->BSIM4v3gbbs; + gbdpg = here->BSIM4v3gbgs; + gbdpdp = here->BSIM4v3gbds; + gbdpb = here->BSIM4v3gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v3igcMod) + { gIstotg = here->BSIM4v3gIgsg + here->BSIM4v3gIgcsg; + gIstotd = here->BSIM4v3gIgcsd; + gIstots = here->BSIM4v3gIgss + here->BSIM4v3gIgcss; + gIstotb = here->BSIM4v3gIgcsb; + + gIdtotg = here->BSIM4v3gIgdg + here->BSIM4v3gIgcdg; + gIdtotd = here->BSIM4v3gIgdd + here->BSIM4v3gIgcdd; + gIdtots = here->BSIM4v3gIgcds; + gIdtotb = here->BSIM4v3gIgcdb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v3igbMod) + { gIbtotg = here->BSIM4v3gIgbg; + gIbtotd = here->BSIM4v3gIgbd; + gIbtots = here->BSIM4v3gIgbs; + gIbtotb = here->BSIM4v3gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v3rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vges) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + else if (here->BSIM4v3rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vgms) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + if (here->BSIM4v3rgateMod > 1) + { gcrgd = here->BSIM4v3gcrgd * T0; + gcrgg = here->BSIM4v3gcrgg * T0; + gcrgs = here->BSIM4v3gcrgs * T0; + gcrgb = here->BSIM4v3gcrgb * T0; + gcrgg -= here->BSIM4v3gcrg; + gcrg = here->BSIM4v3gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v3acnqsMod == 0) + { if (here->BSIM4v3rgateMod == 3) + { xcgmgmb = cgdo + cgso + pParam->BSIM4v3cgbo; + xcgmdb = -cgdo; + xcgmsb = -cgso; + xcgmbb = -pParam->BSIM4v3cgbo; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggb = here->BSIM4v3cggb; + xcgdb = here->BSIM4v3cgdb; + xcgsb = here->BSIM4v3cgsb; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = here->BSIM4v3cdgb; + xcsgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb); + xcbgb = here->BSIM4v3cbgb; + } + else + { xcggb = here->BSIM4v3cggb + cgdo + cgso + + pParam->BSIM4v3cgbo; + xcgdb = here->BSIM4v3cgdb - cgdo; + xcgsb = here->BSIM4v3cgsb - cgso; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = here->BSIM4v3cdgb - cgdo; + xcsgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb + cgso); + xcbgb = here->BSIM4v3cbgb - pParam->BSIM4v3cgbo; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddb = here->BSIM4v3cddb + here->BSIM4v3capbd + cgdo; + xcdsb = here->BSIM4v3cdsb; + + xcsdb = -(here->BSIM4v3cgdb + here->BSIM4v3cbdb + + here->BSIM4v3cddb); + xcssb = here->BSIM4v3capbs + cgso - (here->BSIM4v3cgsb + + here->BSIM4v3cbsb + here->BSIM4v3cdsb); + + if (!here->BSIM4v3rbodyMod) + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb); + xcbdb = here->BSIM4v3cbdb - here->BSIM4v3capbd; + xcbsb = here->BSIM4v3cbsb - here->BSIM4v3capbs; + xcdbdb = 0.0; + } + else + { xcdbb = -(here->BSIM4v3cddb + here->BSIM4v3cdgb + + here->BSIM4v3cdsb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb) + + here->BSIM4v3capbs; + xcbdb = here->BSIM4v3cbdb; + xcbsb = here->BSIM4v3cbsb; + + xcdbdb = -here->BSIM4v3capbd; + xcsbsb = -here->BSIM4v3capbs; + } + xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { xcggb = xcgdb = xcgsb = xcgbb = 0.0; + xcbgb = xcbdb = xcbsb = xcbbb = 0.0; + xcdgb = xcddb = xcdsb = xcdbb = 0.0; + xcsgb = xcsdb = xcssb = xcsbb = 0.0; + + xgtg = here->BSIM4v3gtg; + xgtd = here->BSIM4v3gtd; + xgts = here->BSIM4v3gts; + xgtb = here->BSIM4v3gtb; + + xcqgb = here->BSIM4v3cqgb; + xcqdb = here->BSIM4v3cqdb; + xcqsb = here->BSIM4v3cqsb; + xcqbb = here->BSIM4v3cqbb; + + CoxWL = model->BSIM4v3coxe * here->pParam->BSIM4v3weffCV + * here->BSIM4v3nf * here->pParam->BSIM4v3leffCV; + qcheq = -(here->BSIM4v3qgate + here->BSIM4v3qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v3xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM4v3xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM4v3qdrn / qcheq; + Cdd = here->BSIM4v3cddb; + Csd = -(here->BSIM4v3cgdb + here->BSIM4v3cddb + + here->BSIM4v3cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM4v3cdgb; + Csg = -(here->BSIM4v3cggb + here->BSIM4v3cdgb + + here->BSIM4v3cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM4v3cdsb; + Css = -(here->BSIM4v3cgsb + here->BSIM4v3cdsb + + here->BSIM4v3cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + } + else + { Gm = -here->BSIM4v3gm; + Gmbs = -here->BSIM4v3gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + gbbsp = -(here->BSIM4v3gbds); + gbbdp = here->BSIM4v3gbds + here->BSIM4v3gbgs + here->BSIM4v3gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v3gbgs; + gbspsp = here->BSIM4v3gbds; + gbspb = here->BSIM4v3gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v3igcMod) + { gIstotg = here->BSIM4v3gIgsg + here->BSIM4v3gIgcdg; + gIstotd = here->BSIM4v3gIgcds; + gIstots = here->BSIM4v3gIgss + here->BSIM4v3gIgcdd; + gIstotb = here->BSIM4v3gIgcdb; + + gIdtotg = here->BSIM4v3gIgdg + here->BSIM4v3gIgcsg; + gIdtotd = here->BSIM4v3gIgdd + here->BSIM4v3gIgcss; + gIdtots = here->BSIM4v3gIgcsd; + gIdtotb = here->BSIM4v3gIgcsb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v3igbMod) + { gIbtotg = here->BSIM4v3gIgbg; + gIbtotd = here->BSIM4v3gIgbs; + gIbtots = here->BSIM4v3gIgbd; + gIbtotb = here->BSIM4v3gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v3igcMod != 0) || (model->BSIM4v3igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v3rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vges) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + else if (here->BSIM4v3rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v3vgms) + - *(ckt->CKTstates[0] + here->BSIM4v3vgs); + if (here->BSIM4v3rgateMod > 1) + { gcrgd = here->BSIM4v3gcrgs * T0; + gcrgg = here->BSIM4v3gcrgg * T0; + gcrgs = here->BSIM4v3gcrgd * T0; + gcrgb = here->BSIM4v3gcrgb * T0; + gcrgg -= here->BSIM4v3gcrg; + gcrg = here->BSIM4v3gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v3acnqsMod == 0) + { if (here->BSIM4v3rgateMod == 3) + { xcgmgmb = cgdo + cgso + pParam->BSIM4v3cgbo; + xcgmdb = -cgdo; + xcgmsb = -cgso; + xcgmbb = -pParam->BSIM4v3cgbo; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggb = here->BSIM4v3cggb; + xcgdb = here->BSIM4v3cgsb; + xcgsb = here->BSIM4v3cgdb; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb); + xcsgb = here->BSIM4v3cdgb; + xcbgb = here->BSIM4v3cbgb; + } + else + { xcggb = here->BSIM4v3cggb + cgdo + cgso + + pParam->BSIM4v3cgbo; + xcgdb = here->BSIM4v3cgsb - cgdo; + xcgsb = here->BSIM4v3cgdb - cgso; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = -(here->BSIM4v3cggb + here->BSIM4v3cbgb + + here->BSIM4v3cdgb + cgdo); + xcsgb = here->BSIM4v3cdgb - cgso; + xcbgb = here->BSIM4v3cbgb - pParam->BSIM4v3cgbo; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddb = here->BSIM4v3capbd + cgdo - (here->BSIM4v3cgsb + + here->BSIM4v3cbsb + here->BSIM4v3cdsb); + xcdsb = -(here->BSIM4v3cgdb + here->BSIM4v3cbdb + + here->BSIM4v3cddb); + + xcsdb = here->BSIM4v3cdsb; + xcssb = here->BSIM4v3cddb + here->BSIM4v3capbs + cgso; + + if (!here->BSIM4v3rbodyMod) + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb); + xcbdb = here->BSIM4v3cbsb - here->BSIM4v3capbd; + xcbsb = here->BSIM4v3cbdb - here->BSIM4v3capbs; + xcdbdb = 0.0; + } + else + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb) + + here->BSIM4v3capbd; + xcsbb = -(here->BSIM4v3cddb + here->BSIM4v3cdgb + + here->BSIM4v3cdsb); + xcbdb = here->BSIM4v3cbsb; + xcbsb = here->BSIM4v3cbdb; + xcdbdb = -here->BSIM4v3capbd; + xcsbsb = -here->BSIM4v3capbs; + } + xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { xcggb = xcgdb = xcgsb = xcgbb = 0.0; + xcbgb = xcbdb = xcbsb = xcbbb = 0.0; + xcdgb = xcddb = xcdsb = xcdbb = 0.0; + xcsgb = xcsdb = xcssb = xcsbb = 0.0; + + xgtg = here->BSIM4v3gtg; + xgtd = here->BSIM4v3gts; + xgts = here->BSIM4v3gtd; + xgtb = here->BSIM4v3gtb; + + xcqgb = here->BSIM4v3cqgb; + xcqdb = here->BSIM4v3cqsb; + xcqsb = here->BSIM4v3cqdb; + xcqbb = here->BSIM4v3cqbb; + + CoxWL = model->BSIM4v3coxe * here->pParam->BSIM4v3weffCV + * here->BSIM4v3nf * here->pParam->BSIM4v3leffCV; + qcheq = -(here->BSIM4v3qgate + here->BSIM4v3qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v3xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM4v3xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM4v3qdrn / qcheq; + Css = here->BSIM4v3cddb; + Cds = -(here->BSIM4v3cgdb + here->BSIM4v3cddb + + here->BSIM4v3cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM4v3cdgb; + Cdg = -(here->BSIM4v3cggb + here->BSIM4v3cdgb + + here->BSIM4v3cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM4v3cdsb; + Cdd = -(here->BSIM4v3cgsb + here->BSIM4v3cdsb + + here->BSIM4v3cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + } + + if (model->BSIM4v3rdsMod == 1) + { gstot = here->BSIM4v3gstot; + gstotd = here->BSIM4v3gstotd; + gstotg = here->BSIM4v3gstotg; + gstots = here->BSIM4v3gstots - gstot; + gstotb = here->BSIM4v3gstotb; + + gdtot = here->BSIM4v3gdtot; + gdtotd = here->BSIM4v3gdtotd - gdtot; + gdtotg = here->BSIM4v3gdtotg; + gdtots = here->BSIM4v3gdtots; + gdtotb = here->BSIM4v3gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0; + } + + + T1 = *(ckt->CKTstate0 + here->BSIM4v3qdef) * here->BSIM4v3gtau; + gds = here->BSIM4v3gds; + + /* + * Loading PZ matrix + */ + + if (!model->BSIM4v3rdsMod) + { gdpr = here->BSIM4v3drainConductance; + gspr = here->BSIM4v3sourceConductance; + } + else + gdpr = gspr = 0.0; + + if (!here->BSIM4v3rbodyMod) + { gjbd = here->BSIM4v3gbd; + gjbs = here->BSIM4v3gbs; + } + else + gjbd = gjbs = 0.0; + + geltd = here->BSIM4v3grgeltd; + + if (here->BSIM4v3rgateMod == 1) + { *(here->BSIM4v3GEgePtr) += geltd; + *(here->BSIM4v3GPgePtr) -= geltd; + *(here->BSIM4v3GEgpPtr) -= geltd; + + *(here->BSIM4v3GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v3GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v3GPgpPtr) += geltd - xgtg + gIgtotg; + *(here->BSIM4v3GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v3GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v3GPdpPtr) -= xgtd - gIgtotd; + *(here->BSIM4v3GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v3GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v3GPspPtr) -= xgts - gIgtots; + *(here->BSIM4v3GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v3GPbpPtr +1) += xcgbb * s->imag; + *(here->BSIM4v3GPbpPtr) -= xgtb - gIgtotb; + } + else if (here->BSIM4v3rgateMod == 2) + { *(here->BSIM4v3GEgePtr) += gcrg; + *(here->BSIM4v3GEgpPtr) += gcrgg; + *(here->BSIM4v3GEdpPtr) += gcrgd; + *(here->BSIM4v3GEspPtr) += gcrgs; + *(here->BSIM4v3GEbpPtr) += gcrgb; + + *(here->BSIM4v3GPgePtr) -= gcrg; + *(here->BSIM4v3GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v3GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v3GPgpPtr) -= gcrgg + xgtg - gIgtotg; + *(here->BSIM4v3GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v3GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v3GPdpPtr) -= gcrgd + xgtd - gIgtotd; + *(here->BSIM4v3GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v3GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v3GPspPtr) -= gcrgs + xgts - gIgtots; + *(here->BSIM4v3GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v3GPbpPtr +1) += xcgbb * s->imag; + *(here->BSIM4v3GPbpPtr) -= gcrgb + xgtb - gIgtotb; + } + else if (here->BSIM4v3rgateMod == 3) + { *(here->BSIM4v3GEgePtr) += geltd; + *(here->BSIM4v3GEgmPtr) -= geltd; + *(here->BSIM4v3GMgePtr) -= geltd; + *(here->BSIM4v3GMgmPtr) += geltd + gcrg; + *(here->BSIM4v3GMgmPtr ) += xcgmgmb * s->real; + *(here->BSIM4v3GMgmPtr +1) += xcgmgmb * s->imag; + + *(here->BSIM4v3GMdpPtr) += gcrgd; + *(here->BSIM4v3GMdpPtr ) += xcgmdb * s->real; + *(here->BSIM4v3GMdpPtr +1) += xcgmdb * s->imag; + *(here->BSIM4v3GMgpPtr) += gcrgg; + *(here->BSIM4v3GMspPtr) += gcrgs; + *(here->BSIM4v3GMspPtr ) += xcgmsb * s->real; + *(here->BSIM4v3GMspPtr +1) += xcgmsb * s->imag; + *(here->BSIM4v3GMbpPtr) += gcrgb; + *(here->BSIM4v3GMbpPtr ) += xcgmbb * s->real; + *(here->BSIM4v3GMbpPtr +1) += xcgmbb * s->imag; + + *(here->BSIM4v3DPgmPtr ) += xcdgmb * s->real; + *(here->BSIM4v3DPgmPtr +1) += xcdgmb * s->imag; + *(here->BSIM4v3GPgmPtr) -= gcrg; + *(here->BSIM4v3SPgmPtr ) += xcsgmb * s->real; + *(here->BSIM4v3SPgmPtr +1) += xcsgmb * s->imag; + *(here->BSIM4v3BPgmPtr ) += xcbgmb * s->real; + *(here->BSIM4v3BPgmPtr +1) += xcbgmb * s->imag; + + *(here->BSIM4v3GPgpPtr) -= gcrgg + xgtg - gIgtotg; + *(here->BSIM4v3GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v3GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v3GPdpPtr) -= gcrgd + xgtd - gIgtotd; + *(here->BSIM4v3GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v3GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v3GPspPtr) -= gcrgs + xgts - gIgtots; + *(here->BSIM4v3GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v3GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v3GPbpPtr) -= gcrgb + xgtb - gIgtotb; + *(here->BSIM4v3GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v3GPbpPtr +1) += xcgbb * s->imag; + } + else + { *(here->BSIM4v3GPdpPtr ) += xcgdb * s->real; + *(here->BSIM4v3GPdpPtr +1) += xcgdb * s->imag; + *(here->BSIM4v3GPdpPtr) -= xgtd - gIgtotd; + *(here->BSIM4v3GPgpPtr ) += xcggb * s->real; + *(here->BSIM4v3GPgpPtr +1) += xcggb * s->imag; + *(here->BSIM4v3GPgpPtr) -= xgtg - gIgtotg; + *(here->BSIM4v3GPspPtr ) += xcgsb * s->real; + *(here->BSIM4v3GPspPtr +1) += xcgsb * s->imag; + *(here->BSIM4v3GPspPtr) -= xgts - gIgtots; + *(here->BSIM4v3GPbpPtr ) += xcgbb * s->real; + *(here->BSIM4v3GPbpPtr +1) += xcgbb * s->imag; + *(here->BSIM4v3GPbpPtr) -= xgtb - gIgtotb; + } + + if (model->BSIM4v3rdsMod) + { (*(here->BSIM4v3DgpPtr) += gdtotg); + (*(here->BSIM4v3DspPtr) += gdtots); + (*(here->BSIM4v3DbpPtr) += gdtotb); + (*(here->BSIM4v3SdpPtr) += gstotd); + (*(here->BSIM4v3SgpPtr) += gstotg); + (*(here->BSIM4v3SbpPtr) += gstotb); + } + + *(here->BSIM4v3DPdpPtr ) += xcddb * s->real; + *(here->BSIM4v3DPdpPtr +1) += xcddb * s->imag; + *(here->BSIM4v3DPdpPtr) += gdpr + gds + here->BSIM4v3gbd + - gdtotd + RevSum + gbdpdp - gIdtotd + + dxpart * xgtd + T1 * ddxpart_dVd; + *(here->BSIM4v3DPdPtr) -= gdpr + gdtot; + *(here->BSIM4v3DPgpPtr ) += xcdgb * s->real; + *(here->BSIM4v3DPgpPtr +1) += xcdgb * s->imag; + *(here->BSIM4v3DPgpPtr) += Gm - gdtotg + gbdpg - gIdtotg + + T1 * ddxpart_dVg + dxpart * xgtg; + *(here->BSIM4v3DPspPtr ) += xcdsb * s->real; + *(here->BSIM4v3DPspPtr +1) += xcdsb * s->imag; + *(here->BSIM4v3DPspPtr) -= gds + FwdSum + gdtots - gbdpsp + gIdtots + - T1 * ddxpart_dVs - dxpart * xgts; + *(here->BSIM4v3DPbpPtr ) += xcdbb * s->real; + *(here->BSIM4v3DPbpPtr +1) += xcdbb * s->imag; + *(here->BSIM4v3DPbpPtr) -= gjbd + gdtotb - Gmbs - gbdpb + gIdtotb + - T1 * ddxpart_dVb - dxpart * xgtb; + + *(here->BSIM4v3DdpPtr) -= gdpr - gdtotd; + *(here->BSIM4v3DdPtr) += gdpr + gdtot; + + *(here->BSIM4v3SPdpPtr ) += xcsdb * s->real; + *(here->BSIM4v3SPdpPtr +1) += xcsdb * s->imag; + *(here->BSIM4v3SPdpPtr) -= gds + gstotd + RevSum - gbspdp + gIstotd + - T1 * dsxpart_dVd - sxpart * xgtd; + *(here->BSIM4v3SPgpPtr ) += xcsgb * s->real; + *(here->BSIM4v3SPgpPtr +1) += xcsgb * s->imag; + *(here->BSIM4v3SPgpPtr) -= Gm + gstotg - gbspg + gIstotg + - T1 * dsxpart_dVg - sxpart * xgtg; + *(here->BSIM4v3SPspPtr ) += xcssb * s->real; + *(here->BSIM4v3SPspPtr +1) += xcssb * s->imag; + *(here->BSIM4v3SPspPtr) += gspr + gds + here->BSIM4v3gbs - gIstots + - gstots + FwdSum + gbspsp + + sxpart * xgts + T1 * dsxpart_dVs; + *(here->BSIM4v3SPsPtr) -= gspr + gstot; + *(here->BSIM4v3SPbpPtr ) += xcsbb * s->real; + *(here->BSIM4v3SPbpPtr +1) += xcsbb * s->imag; + *(here->BSIM4v3SPbpPtr) -= gjbs + gstotb + Gmbs - gbspb + gIstotb + - T1 * dsxpart_dVb - sxpart * xgtb; + + *(here->BSIM4v3SspPtr) -= gspr - gstots; + *(here->BSIM4v3SsPtr) += gspr + gstot; + + *(here->BSIM4v3BPdpPtr ) += xcbdb * s->real; + *(here->BSIM4v3BPdpPtr +1) += xcbdb * s->imag; + *(here->BSIM4v3BPdpPtr) -= gjbd - gbbdp + gIbtotd; + *(here->BSIM4v3BPgpPtr ) += xcbgb * s->real; + *(here->BSIM4v3BPgpPtr +1) += xcbgb * s->imag; + *(here->BSIM4v3BPgpPtr) -= here->BSIM4v3gbgs + gIbtotg; + *(here->BSIM4v3BPspPtr ) += xcbsb * s->real; + *(here->BSIM4v3BPspPtr +1) += xcbsb * s->imag; + *(here->BSIM4v3BPspPtr) -= gjbs - gbbsp + gIbtots; + *(here->BSIM4v3BPbpPtr ) += xcbbb * s->real; + *(here->BSIM4v3BPbpPtr +1) += xcbbb * s->imag; + *(here->BSIM4v3BPbpPtr) += gjbd + gjbs - here->BSIM4v3gbbs + - gIbtotb; + ggidld = here->BSIM4v3ggidld; + ggidlg = here->BSIM4v3ggidlg; + ggidlb = here->BSIM4v3ggidlb; + ggislg = here->BSIM4v3ggislg; + ggisls = here->BSIM4v3ggisls; + ggislb = here->BSIM4v3ggislb; + + /* stamp gidl */ + (*(here->BSIM4v3DPdpPtr) += ggidld); + (*(here->BSIM4v3DPgpPtr) += ggidlg); + (*(here->BSIM4v3DPspPtr) -= (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v3DPbpPtr) += ggidlb); + (*(here->BSIM4v3BPdpPtr) -= ggidld); + (*(here->BSIM4v3BPgpPtr) -= ggidlg); + (*(here->BSIM4v3BPspPtr) += (ggidlg + ggidld) + ggidlb); + (*(here->BSIM4v3BPbpPtr) -= ggidlb); + /* stamp gisl */ + (*(here->BSIM4v3SPdpPtr) -= (ggisls + ggislg) + ggislb); + (*(here->BSIM4v3SPgpPtr) += ggislg); + (*(here->BSIM4v3SPspPtr) += ggisls); + (*(here->BSIM4v3SPbpPtr) += ggislb); + (*(here->BSIM4v3BPdpPtr) += (ggislg + ggisls) + ggislb); + (*(here->BSIM4v3BPgpPtr) -= ggislg); + (*(here->BSIM4v3BPspPtr) -= ggisls); + (*(here->BSIM4v3BPbpPtr) -= ggislb); + + if (here->BSIM4v3rbodyMod) + { (*(here->BSIM4v3DPdbPtr ) += xcdbdb * s->real); + (*(here->BSIM4v3DPdbPtr +1) += xcdbdb * s->imag); + (*(here->BSIM4v3DPdbPtr) -= here->BSIM4v3gbd); + (*(here->BSIM4v3SPsbPtr ) += xcsbsb * s->real); + (*(here->BSIM4v3SPsbPtr +1) += xcsbsb * s->imag); + (*(here->BSIM4v3SPsbPtr) -= here->BSIM4v3gbs); + + (*(here->BSIM4v3DBdpPtr ) += xcdbdb * s->real); + (*(here->BSIM4v3DBdpPtr +1) += xcdbdb * s->imag); + (*(here->BSIM4v3DBdpPtr) -= here->BSIM4v3gbd); + (*(here->BSIM4v3DBdbPtr ) -= xcdbdb * s->real); + (*(here->BSIM4v3DBdbPtr +1) -= xcdbdb * s->imag); + (*(here->BSIM4v3DBdbPtr) += here->BSIM4v3gbd + here->BSIM4v3grbpd + + here->BSIM4v3grbdb); + (*(here->BSIM4v3DBbpPtr) -= here->BSIM4v3grbpd); + (*(here->BSIM4v3DBbPtr) -= here->BSIM4v3grbdb); + + (*(here->BSIM4v3BPdbPtr) -= here->BSIM4v3grbpd); + (*(here->BSIM4v3BPbPtr) -= here->BSIM4v3grbpb); + (*(here->BSIM4v3BPsbPtr) -= here->BSIM4v3grbps); + (*(here->BSIM4v3BPbpPtr) += here->BSIM4v3grbpd + here->BSIM4v3grbps + + here->BSIM4v3grbpb); + /* WDL: (-here->BSIM4v3gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v3SBspPtr ) += xcsbsb * s->real); + (*(here->BSIM4v3SBspPtr +1) += xcsbsb * s->imag); + (*(here->BSIM4v3SBspPtr) -= here->BSIM4v3gbs); + (*(here->BSIM4v3SBbpPtr) -= here->BSIM4v3grbps); + (*(here->BSIM4v3SBbPtr) -= here->BSIM4v3grbsb); + (*(here->BSIM4v3SBsbPtr ) -= xcsbsb * s->real); + (*(here->BSIM4v3SBsbPtr +1) -= xcsbsb * s->imag); + (*(here->BSIM4v3SBsbPtr) += here->BSIM4v3gbs + + here->BSIM4v3grbps + here->BSIM4v3grbsb); + + (*(here->BSIM4v3BdbPtr) -= here->BSIM4v3grbdb); + (*(here->BSIM4v3BbpPtr) -= here->BSIM4v3grbpb); + (*(here->BSIM4v3BsbPtr) -= here->BSIM4v3grbsb); + (*(here->BSIM4v3BbPtr) += here->BSIM4v3grbsb + here->BSIM4v3grbdb + + here->BSIM4v3grbpb); + } + + if (here->BSIM4v3acnqsMod) + { *(here->BSIM4v3QqPtr ) += s->real * ScalingFactor; + *(here->BSIM4v3QqPtr +1) += s->imag * ScalingFactor; + *(here->BSIM4v3QgpPtr ) -= xcqgb * s->real; + *(here->BSIM4v3QgpPtr +1) -= xcqgb * s->imag; + *(here->BSIM4v3QdpPtr ) -= xcqdb * s->real; + *(here->BSIM4v3QdpPtr +1) -= xcqdb * s->imag; + *(here->BSIM4v3QbpPtr ) -= xcqbb * s->real; + *(here->BSIM4v3QbpPtr +1) -= xcqbb * s->imag; + *(here->BSIM4v3QspPtr ) -= xcqsb * s->real; + *(here->BSIM4v3QspPtr +1) -= xcqsb * s->imag; + + *(here->BSIM4v3GPqPtr) -= here->BSIM4v3gtau; + *(here->BSIM4v3DPqPtr) += dxpart * here->BSIM4v3gtau; + *(here->BSIM4v3SPqPtr) += sxpart * here->BSIM4v3gtau; + + *(here->BSIM4v3QqPtr) += here->BSIM4v3gtau; + *(here->BSIM4v3QgpPtr) += xgtg; + *(here->BSIM4v3QdpPtr) += xgtd; + *(here->BSIM4v3QbpPtr) += xgtb; + *(here->BSIM4v3QspPtr) += xgts; + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3set.c b/src/spicelib/devices/bsim4v3/b4v3set.c new file mode 100644 index 000000000..0c68c4178 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3set.c @@ -0,0 +1,1763 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3set.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "jobdefs.h" +#include "ftedefs.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "const.h" +#include "sperror.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPS0 8.85418e-12 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define Charge_q 1.60219e-19 + +int +BSIM4v3setup(matrix,inModel,ckt,states) +SMPmatrix *matrix; +GENmodel *inModel; +CKTcircuit *ckt; +int *states; +{ +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance *here; +int error; +CKTnode *tmp; +double tmp1, tmp2; +int noiseAnalGiven = 0, createNode; /* Criteria for new node creation */ +double Rtot, DMCGeff, DMCIeff, DMDGeff; +JOB *job; + + /* Search for a noise analysis request */ + for (job = ((TSKtask *)ft_curckt->ci_curTask)->jobs;job;job = job->JOBnextJob) { + if(strcmp(job->JOBname,"Noise Analysis")==0) { + noiseAnalGiven = 1; + break; + } + } + + /* loop through all the BSIM4v3 device models */ + for( ; model != NULL; model = model->BSIM4v3nextModel ) + { /* process defaults of model parameters */ + if (!model->BSIM4v3typeGiven) + model->BSIM4v3type = NMOS; + + if (!model->BSIM4v3mobModGiven) + model->BSIM4v3mobMod = 0; + else if ((model->BSIM4v3mobMod != 0) && (model->BSIM4v3mobMod != 1) + && (model->BSIM4v3mobMod != 2)) + { model->BSIM4v3mobMod = 0; + printf("Warning: mobMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v3binUnitGiven) + model->BSIM4v3binUnit = 1; + if (!model->BSIM4v3paramChkGiven) + model->BSIM4v3paramChk = 1; + + if (!model->BSIM4v3dioModGiven) + model->BSIM4v3dioMod = 1; + else if ((model->BSIM4v3dioMod != 0) && (model->BSIM4v3dioMod != 1) + && (model->BSIM4v3dioMod != 2)) + { model->BSIM4v3dioMod = 1; + printf("Warning: dioMod has been set to its default value: 1.\n"); + } + + if (!model->BSIM4v3capModGiven) + model->BSIM4v3capMod = 2; + else if ((model->BSIM4v3capMod != 0) && (model->BSIM4v3capMod != 1) + && (model->BSIM4v3capMod != 2)) + { model->BSIM4v3capMod = 2; + printf("Warning: capMod has been set to its default value: 2.\n"); + } + + if (!model->BSIM4v3rdsModGiven) + model->BSIM4v3rdsMod = 0; + else if ((model->BSIM4v3rdsMod != 0) && (model->BSIM4v3rdsMod != 1)) + { model->BSIM4v3rdsMod = 0; + printf("Warning: rdsMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v3rbodyModGiven) + model->BSIM4v3rbodyMod = 0; + else if ((model->BSIM4v3rbodyMod != 0) && (model->BSIM4v3rbodyMod != 1)) + { model->BSIM4v3rbodyMod = 0; + printf("Warning: rbodyMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v3rgateModGiven) + model->BSIM4v3rgateMod = 0; + else if ((model->BSIM4v3rgateMod != 0) && (model->BSIM4v3rgateMod != 1) + && (model->BSIM4v3rgateMod != 2) && (model->BSIM4v3rgateMod != 3)) + { model->BSIM4v3rgateMod = 0; + printf("Warning: rgateMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v3perModGiven) + model->BSIM4v3perMod = 1; + else if ((model->BSIM4v3perMod != 0) && (model->BSIM4v3perMod != 1)) + { model->BSIM4v3perMod = 1; + printf("Warning: perMod has been set to its default value: 1.\n"); + } + + if (!model->BSIM4v3geoModGiven) + model->BSIM4v3geoMod = 0; + + if (!model->BSIM4v3fnoiModGiven) + model->BSIM4v3fnoiMod = 1; + else if ((model->BSIM4v3fnoiMod != 0) && (model->BSIM4v3fnoiMod != 1)) + { model->BSIM4v3fnoiMod = 1; + printf("Warning: fnoiMod has been set to its default value: 1.\n"); + } + if (!model->BSIM4v3tnoiModGiven) + model->BSIM4v3tnoiMod = 0; /* WDLiu: tnoiMod=1 needs to set internal S/D nodes */ + else if ((model->BSIM4v3tnoiMod != 0) && (model->BSIM4v3tnoiMod != 1)) + { model->BSIM4v3tnoiMod = 0; + printf("Warning: tnoiMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v3trnqsModGiven) + model->BSIM4v3trnqsMod = 0; + else if ((model->BSIM4v3trnqsMod != 0) && (model->BSIM4v3trnqsMod != 1)) + { model->BSIM4v3trnqsMod = 0; + printf("Warning: trnqsMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v3acnqsModGiven) + model->BSIM4v3acnqsMod = 0; + else if ((model->BSIM4v3acnqsMod != 0) && (model->BSIM4v3acnqsMod != 1)) + { model->BSIM4v3acnqsMod = 0; + printf("Warning: acnqsMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v3igcModGiven) + model->BSIM4v3igcMod = 0; + else if ((model->BSIM4v3igcMod != 0) && (model->BSIM4v3igcMod != 1)) + { model->BSIM4v3igcMod = 0; + printf("Warning: igcMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v3igbModGiven) + model->BSIM4v3igbMod = 0; + else if ((model->BSIM4v3igbMod != 0) && (model->BSIM4v3igbMod != 1)) + { model->BSIM4v3igbMod = 0; + printf("Warning: igbMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v3tempModGiven) + model->BSIM4v3tempMod = 0; + else if ((model->BSIM4v3tempMod != 0) && (model->BSIM4v3tempMod != 1)) + { model->BSIM4v3tempMod = 0; + printf("Warning: tempMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v3versionGiven) + model->BSIM4v3version = "4.3.0"; + if (!model->BSIM4v3toxrefGiven) + model->BSIM4v3toxref = 30.0e-10; + if (!model->BSIM4v3toxeGiven) + model->BSIM4v3toxe = 30.0e-10; + if (!model->BSIM4v3toxpGiven) + model->BSIM4v3toxp = model->BSIM4v3toxe; + if (!model->BSIM4v3toxmGiven) + model->BSIM4v3toxm = model->BSIM4v3toxe; + if (!model->BSIM4v3dtoxGiven) + model->BSIM4v3dtox = 0.0; + if (!model->BSIM4v3epsroxGiven) + model->BSIM4v3epsrox = 3.9; + + if (!model->BSIM4v3cdscGiven) + model->BSIM4v3cdsc = 2.4e-4; /* unit Q/V/m^2 */ + if (!model->BSIM4v3cdscbGiven) + model->BSIM4v3cdscb = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v3cdscdGiven) + model->BSIM4v3cdscd = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v3citGiven) + model->BSIM4v3cit = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v3nfactorGiven) + model->BSIM4v3nfactor = 1.0; + if (!model->BSIM4v3xjGiven) + model->BSIM4v3xj = .15e-6; + if (!model->BSIM4v3vsatGiven) + model->BSIM4v3vsat = 8.0e4; /* unit m/s */ + if (!model->BSIM4v3atGiven) + model->BSIM4v3at = 3.3e4; /* unit m/s */ + if (!model->BSIM4v3a0Given) + model->BSIM4v3a0 = 1.0; + if (!model->BSIM4v3agsGiven) + model->BSIM4v3ags = 0.0; + if (!model->BSIM4v3a1Given) + model->BSIM4v3a1 = 0.0; + if (!model->BSIM4v3a2Given) + model->BSIM4v3a2 = 1.0; + if (!model->BSIM4v3ketaGiven) + model->BSIM4v3keta = -0.047; /* unit / V */ + if (!model->BSIM4v3nsubGiven) + model->BSIM4v3nsub = 6.0e16; /* unit 1/cm3 */ + if (!model->BSIM4v3ndepGiven) + model->BSIM4v3ndep = 1.7e17; /* unit 1/cm3 */ + if (!model->BSIM4v3nsdGiven) + model->BSIM4v3nsd = 1.0e20; /* unit 1/cm3 */ + if (!model->BSIM4v3phinGiven) + model->BSIM4v3phin = 0.0; /* unit V */ + if (!model->BSIM4v3ngateGiven) + model->BSIM4v3ngate = 0; /* unit 1/cm3 */ + if (!model->BSIM4v3vbmGiven) + model->BSIM4v3vbm = -3.0; + if (!model->BSIM4v3xtGiven) + model->BSIM4v3xt = 1.55e-7; + if (!model->BSIM4v3kt1Given) + model->BSIM4v3kt1 = -0.11; /* unit V */ + if (!model->BSIM4v3kt1lGiven) + model->BSIM4v3kt1l = 0.0; /* unit V*m */ + if (!model->BSIM4v3kt2Given) + model->BSIM4v3kt2 = 0.022; /* No unit */ + if (!model->BSIM4v3k3Given) + model->BSIM4v3k3 = 80.0; + if (!model->BSIM4v3k3bGiven) + model->BSIM4v3k3b = 0.0; + if (!model->BSIM4v3w0Given) + model->BSIM4v3w0 = 2.5e-6; + if (!model->BSIM4v3lpe0Given) + model->BSIM4v3lpe0 = 1.74e-7; + if (!model->BSIM4v3lpebGiven) + model->BSIM4v3lpeb = 0.0; + if (!model->BSIM4v3dvtp0Given) + model->BSIM4v3dvtp0 = 0.0; + if (!model->BSIM4v3dvtp1Given) + model->BSIM4v3dvtp1 = 0.0; + if (!model->BSIM4v3dvt0Given) + model->BSIM4v3dvt0 = 2.2; + if (!model->BSIM4v3dvt1Given) + model->BSIM4v3dvt1 = 0.53; + if (!model->BSIM4v3dvt2Given) + model->BSIM4v3dvt2 = -0.032; /* unit 1 / V */ + + if (!model->BSIM4v3dvt0wGiven) + model->BSIM4v3dvt0w = 0.0; + if (!model->BSIM4v3dvt1wGiven) + model->BSIM4v3dvt1w = 5.3e6; + if (!model->BSIM4v3dvt2wGiven) + model->BSIM4v3dvt2w = -0.032; + + if (!model->BSIM4v3droutGiven) + model->BSIM4v3drout = 0.56; + if (!model->BSIM4v3dsubGiven) + model->BSIM4v3dsub = model->BSIM4v3drout; + if (!model->BSIM4v3vth0Given) + model->BSIM4v3vth0 = (model->BSIM4v3type == NMOS) ? 0.7 : -0.7; + if (!model->BSIM4v3euGiven) + model->BSIM4v3eu = (model->BSIM4v3type == NMOS) ? 1.67 : 1.0;; + if (!model->BSIM4v3uaGiven) + model->BSIM4v3ua = (model->BSIM4v3mobMod == 2) ? 1.0e-15 : 1.0e-9; /* unit m/V */ + if (!model->BSIM4v3ua1Given) + model->BSIM4v3ua1 = 1.0e-9; /* unit m/V */ + if (!model->BSIM4v3ubGiven) + model->BSIM4v3ub = 1.0e-19; /* unit (m/V)**2 */ + if (!model->BSIM4v3ub1Given) + model->BSIM4v3ub1 = -1.0e-18; /* unit (m/V)**2 */ + if (!model->BSIM4v3ucGiven) + model->BSIM4v3uc = (model->BSIM4v3mobMod == 1) ? -0.0465 : -0.0465e-9; + if (!model->BSIM4v3uc1Given) + model->BSIM4v3uc1 = (model->BSIM4v3mobMod == 1) ? -0.056 : -0.056e-9; + if (!model->BSIM4v3u0Given) + model->BSIM4v3u0 = (model->BSIM4v3type == NMOS) ? 0.067 : 0.025; + if (!model->BSIM4v3uteGiven) + model->BSIM4v3ute = -1.5; + if (!model->BSIM4v3voffGiven) + model->BSIM4v3voff = -0.08; + if (!model->BSIM4v3vofflGiven) + model->BSIM4v3voffl = 0.0; + if (!model->BSIM4v3minvGiven) + model->BSIM4v3minv = 0.0; + if (!model->BSIM4v3fproutGiven) + model->BSIM4v3fprout = 0.0; + if (!model->BSIM4v3pditsGiven) + model->BSIM4v3pdits = 0.0; + if (!model->BSIM4v3pditsdGiven) + model->BSIM4v3pditsd = 0.0; + if (!model->BSIM4v3pditslGiven) + model->BSIM4v3pditsl = 0.0; + if (!model->BSIM4v3deltaGiven) + model->BSIM4v3delta = 0.01; + if (!model->BSIM4v3rdswminGiven) + model->BSIM4v3rdswmin = 0.0; + if (!model->BSIM4v3rdwminGiven) + model->BSIM4v3rdwmin = 0.0; + if (!model->BSIM4v3rswminGiven) + model->BSIM4v3rswmin = 0.0; + if (!model->BSIM4v3rdswGiven) + model->BSIM4v3rdsw = 200.0; /* in ohm*um */ + if (!model->BSIM4v3rdwGiven) + model->BSIM4v3rdw = 100.0; + if (!model->BSIM4v3rswGiven) + model->BSIM4v3rsw = 100.0; + if (!model->BSIM4v3prwgGiven) + model->BSIM4v3prwg = 1.0; /* in 1/V */ + if (!model->BSIM4v3prwbGiven) + model->BSIM4v3prwb = 0.0; + if (!model->BSIM4v3prtGiven) + if (!model->BSIM4v3prtGiven) + model->BSIM4v3prt = 0.0; + if (!model->BSIM4v3eta0Given) + model->BSIM4v3eta0 = 0.08; /* no unit */ + if (!model->BSIM4v3etabGiven) + model->BSIM4v3etab = -0.07; /* unit 1/V */ + if (!model->BSIM4v3pclmGiven) + model->BSIM4v3pclm = 1.3; /* no unit */ + if (!model->BSIM4v3pdibl1Given) + model->BSIM4v3pdibl1 = 0.39; /* no unit */ + if (!model->BSIM4v3pdibl2Given) + model->BSIM4v3pdibl2 = 0.0086; /* no unit */ + if (!model->BSIM4v3pdiblbGiven) + model->BSIM4v3pdiblb = 0.0; /* 1/V */ + if (!model->BSIM4v3pscbe1Given) + model->BSIM4v3pscbe1 = 4.24e8; + if (!model->BSIM4v3pscbe2Given) + model->BSIM4v3pscbe2 = 1.0e-5; + if (!model->BSIM4v3pvagGiven) + model->BSIM4v3pvag = 0.0; + if (!model->BSIM4v3wrGiven) + model->BSIM4v3wr = 1.0; + if (!model->BSIM4v3dwgGiven) + model->BSIM4v3dwg = 0.0; + if (!model->BSIM4v3dwbGiven) + model->BSIM4v3dwb = 0.0; + if (!model->BSIM4v3b0Given) + model->BSIM4v3b0 = 0.0; + if (!model->BSIM4v3b1Given) + model->BSIM4v3b1 = 0.0; + if (!model->BSIM4v3alpha0Given) + model->BSIM4v3alpha0 = 0.0; + if (!model->BSIM4v3alpha1Given) + model->BSIM4v3alpha1 = 0.0; + if (!model->BSIM4v3beta0Given) + model->BSIM4v3beta0 = 30.0; + if (!model->BSIM4v3agidlGiven) + model->BSIM4v3agidl = 0.0; + if (!model->BSIM4v3bgidlGiven) + model->BSIM4v3bgidl = 2.3e9; /* V/m */ + if (!model->BSIM4v3cgidlGiven) + model->BSIM4v3cgidl = 0.5; /* V^3 */ + if (!model->BSIM4v3egidlGiven) + model->BSIM4v3egidl = 0.8; /* V */ + if (!model->BSIM4v3aigcGiven) + model->BSIM4v3aigc = (model->BSIM4v3type == NMOS) ? 0.43 : 0.31; + if (!model->BSIM4v3bigcGiven) + model->BSIM4v3bigc = (model->BSIM4v3type == NMOS) ? 0.054 : 0.024; + if (!model->BSIM4v3cigcGiven) + model->BSIM4v3cigc = (model->BSIM4v3type == NMOS) ? 0.075 : 0.03; + if (!model->BSIM4v3aigsdGiven) + model->BSIM4v3aigsd = (model->BSIM4v3type == NMOS) ? 0.43 : 0.31; + if (!model->BSIM4v3bigsdGiven) + model->BSIM4v3bigsd = (model->BSIM4v3type == NMOS) ? 0.054 : 0.024; + if (!model->BSIM4v3cigsdGiven) + model->BSIM4v3cigsd = (model->BSIM4v3type == NMOS) ? 0.075 : 0.03; + if (!model->BSIM4v3aigbaccGiven) + model->BSIM4v3aigbacc = 0.43; + if (!model->BSIM4v3bigbaccGiven) + model->BSIM4v3bigbacc = 0.054; + if (!model->BSIM4v3cigbaccGiven) + model->BSIM4v3cigbacc = 0.075; + if (!model->BSIM4v3aigbinvGiven) + model->BSIM4v3aigbinv = 0.35; + if (!model->BSIM4v3bigbinvGiven) + model->BSIM4v3bigbinv = 0.03; + if (!model->BSIM4v3cigbinvGiven) + model->BSIM4v3cigbinv = 0.006; + if (!model->BSIM4v3nigcGiven) + model->BSIM4v3nigc = 1.0; + if (!model->BSIM4v3nigbinvGiven) + model->BSIM4v3nigbinv = 3.0; + if (!model->BSIM4v3nigbaccGiven) + model->BSIM4v3nigbacc = 1.0; + if (!model->BSIM4v3ntoxGiven) + model->BSIM4v3ntox = 1.0; + if (!model->BSIM4v3eigbinvGiven) + model->BSIM4v3eigbinv = 1.1; + if (!model->BSIM4v3pigcdGiven) + model->BSIM4v3pigcd = 1.0; + if (!model->BSIM4v3poxedgeGiven) + model->BSIM4v3poxedge = 1.0; + if (!model->BSIM4v3xrcrg1Given) + model->BSIM4v3xrcrg1 = 12.0; + if (!model->BSIM4v3xrcrg2Given) + model->BSIM4v3xrcrg2 = 1.0; + if (!model->BSIM4v3ijthsfwdGiven) + model->BSIM4v3ijthsfwd = 0.1; /* unit A */ + if (!model->BSIM4v3ijthdfwdGiven) + model->BSIM4v3ijthdfwd = model->BSIM4v3ijthsfwd; + if (!model->BSIM4v3ijthsrevGiven) + model->BSIM4v3ijthsrev = 0.1; /* unit A */ + if (!model->BSIM4v3ijthdrevGiven) + model->BSIM4v3ijthdrev = model->BSIM4v3ijthsrev; + if (!model->BSIM4v3tnoiaGiven) + model->BSIM4v3tnoia = 1.5; + if (!model->BSIM4v3tnoibGiven) + model->BSIM4v3tnoib = 3.5; + if (!model->BSIM4v3rnoiaGiven) + model->BSIM4v3rnoia = 0.577; + if (!model->BSIM4v3rnoibGiven) + model->BSIM4v3rnoib = 0.37; + if (!model->BSIM4v3ntnoiGiven) + model->BSIM4v3ntnoi = 1.0; + if (!model->BSIM4v3lambdaGiven) + model->BSIM4v3lambda = 0.0; + if (!model->BSIM4v3vtlGiven) + model->BSIM4v3vtl = 2.0e5; /* unit m/s */ + if (!model->BSIM4v3xnGiven) + model->BSIM4v3xn = 3.0; + if (!model->BSIM4v3lcGiven) + model->BSIM4v3lc = 5.0e-9; + + if (!model->BSIM4v3xjbvsGiven) + model->BSIM4v3xjbvs = 1.0; /* no unit */ + if (!model->BSIM4v3xjbvdGiven) + model->BSIM4v3xjbvd = model->BSIM4v3xjbvs; + if (!model->BSIM4v3bvsGiven) + model->BSIM4v3bvs = 10.0; /* V */ + if (!model->BSIM4v3bvdGiven) + model->BSIM4v3bvd = model->BSIM4v3bvs; + if (!model->BSIM4v3gbminGiven) + model->BSIM4v3gbmin = 1.0e-12; /* in mho */ + if (!model->BSIM4v3rbdbGiven) + model->BSIM4v3rbdb = 50.0; /* in ohm */ + if (!model->BSIM4v3rbpbGiven) + model->BSIM4v3rbpb = 50.0; + if (!model->BSIM4v3rbsbGiven) + model->BSIM4v3rbsb = 50.0; + if (!model->BSIM4v3rbpsGiven) + model->BSIM4v3rbps = 50.0; + if (!model->BSIM4v3rbpdGiven) + model->BSIM4v3rbpd = 50.0; + + if (!model->BSIM4v3cgslGiven) + model->BSIM4v3cgsl = 0.0; + if (!model->BSIM4v3cgdlGiven) + model->BSIM4v3cgdl = 0.0; + if (!model->BSIM4v3ckappasGiven) + model->BSIM4v3ckappas = 0.6; + if (!model->BSIM4v3ckappadGiven) + model->BSIM4v3ckappad = model->BSIM4v3ckappas; + if (!model->BSIM4v3clcGiven) + model->BSIM4v3clc = 0.1e-6; + if (!model->BSIM4v3cleGiven) + model->BSIM4v3cle = 0.6; + if (!model->BSIM4v3vfbcvGiven) + model->BSIM4v3vfbcv = -1.0; + if (!model->BSIM4v3acdeGiven) + model->BSIM4v3acde = 1.0; + if (!model->BSIM4v3moinGiven) + model->BSIM4v3moin = 15.0; + if (!model->BSIM4v3noffGiven) + model->BSIM4v3noff = 1.0; + if (!model->BSIM4v3voffcvGiven) + model->BSIM4v3voffcv = 0.0; + if (!model->BSIM4v3dmcgGiven) + model->BSIM4v3dmcg = 0.0; + if (!model->BSIM4v3dmciGiven) + model->BSIM4v3dmci = model->BSIM4v3dmcg; + if (!model->BSIM4v3dmdgGiven) + model->BSIM4v3dmdg = 0.0; + if (!model->BSIM4v3dmcgtGiven) + model->BSIM4v3dmcgt = 0.0; + if (!model->BSIM4v3xgwGiven) + model->BSIM4v3xgw = 0.0; + if (!model->BSIM4v3xglGiven) + model->BSIM4v3xgl = 0.0; + if (!model->BSIM4v3rshgGiven) + model->BSIM4v3rshg = 0.1; + if (!model->BSIM4v3ngconGiven) + model->BSIM4v3ngcon = 1.0; + if (!model->BSIM4v3tcjGiven) + model->BSIM4v3tcj = 0.0; + if (!model->BSIM4v3tpbGiven) + model->BSIM4v3tpb = 0.0; + if (!model->BSIM4v3tcjswGiven) + model->BSIM4v3tcjsw = 0.0; + if (!model->BSIM4v3tpbswGiven) + model->BSIM4v3tpbsw = 0.0; + if (!model->BSIM4v3tcjswgGiven) + model->BSIM4v3tcjswg = 0.0; + if (!model->BSIM4v3tpbswgGiven) + model->BSIM4v3tpbswg = 0.0; + + /* Length dependence */ + if (!model->BSIM4v3lcdscGiven) + model->BSIM4v3lcdsc = 0.0; + if (!model->BSIM4v3lcdscbGiven) + model->BSIM4v3lcdscb = 0.0; + if (!model->BSIM4v3lcdscdGiven) + model->BSIM4v3lcdscd = 0.0; + if (!model->BSIM4v3lcitGiven) + model->BSIM4v3lcit = 0.0; + if (!model->BSIM4v3lnfactorGiven) + model->BSIM4v3lnfactor = 0.0; + if (!model->BSIM4v3lxjGiven) + model->BSIM4v3lxj = 0.0; + if (!model->BSIM4v3lvsatGiven) + model->BSIM4v3lvsat = 0.0; + if (!model->BSIM4v3latGiven) + model->BSIM4v3lat = 0.0; + if (!model->BSIM4v3la0Given) + model->BSIM4v3la0 = 0.0; + if (!model->BSIM4v3lagsGiven) + model->BSIM4v3lags = 0.0; + if (!model->BSIM4v3la1Given) + model->BSIM4v3la1 = 0.0; + if (!model->BSIM4v3la2Given) + model->BSIM4v3la2 = 0.0; + if (!model->BSIM4v3lketaGiven) + model->BSIM4v3lketa = 0.0; + if (!model->BSIM4v3lnsubGiven) + model->BSIM4v3lnsub = 0.0; + if (!model->BSIM4v3lndepGiven) + model->BSIM4v3lndep = 0.0; + if (!model->BSIM4v3lnsdGiven) + model->BSIM4v3lnsd = 0.0; + if (!model->BSIM4v3lphinGiven) + model->BSIM4v3lphin = 0.0; + if (!model->BSIM4v3lngateGiven) + model->BSIM4v3lngate = 0.0; + if (!model->BSIM4v3lvbmGiven) + model->BSIM4v3lvbm = 0.0; + if (!model->BSIM4v3lxtGiven) + model->BSIM4v3lxt = 0.0; + if (!model->BSIM4v3lkt1Given) + model->BSIM4v3lkt1 = 0.0; + if (!model->BSIM4v3lkt1lGiven) + model->BSIM4v3lkt1l = 0.0; + if (!model->BSIM4v3lkt2Given) + model->BSIM4v3lkt2 = 0.0; + if (!model->BSIM4v3lk3Given) + model->BSIM4v3lk3 = 0.0; + if (!model->BSIM4v3lk3bGiven) + model->BSIM4v3lk3b = 0.0; + if (!model->BSIM4v3lw0Given) + model->BSIM4v3lw0 = 0.0; + if (!model->BSIM4v3llpe0Given) + model->BSIM4v3llpe0 = 0.0; + if (!model->BSIM4v3llpebGiven) + model->BSIM4v3llpeb = model->BSIM4v3llpe0; + if (!model->BSIM4v3ldvtp0Given) + model->BSIM4v3ldvtp0 = 0.0; + if (!model->BSIM4v3ldvtp1Given) + model->BSIM4v3ldvtp1 = 0.0; + if (!model->BSIM4v3ldvt0Given) + model->BSIM4v3ldvt0 = 0.0; + if (!model->BSIM4v3ldvt1Given) + model->BSIM4v3ldvt1 = 0.0; + if (!model->BSIM4v3ldvt2Given) + model->BSIM4v3ldvt2 = 0.0; + if (!model->BSIM4v3ldvt0wGiven) + model->BSIM4v3ldvt0w = 0.0; + if (!model->BSIM4v3ldvt1wGiven) + model->BSIM4v3ldvt1w = 0.0; + if (!model->BSIM4v3ldvt2wGiven) + model->BSIM4v3ldvt2w = 0.0; + if (!model->BSIM4v3ldroutGiven) + model->BSIM4v3ldrout = 0.0; + if (!model->BSIM4v3ldsubGiven) + model->BSIM4v3ldsub = 0.0; + if (!model->BSIM4v3lvth0Given) + model->BSIM4v3lvth0 = 0.0; + if (!model->BSIM4v3luaGiven) + model->BSIM4v3lua = 0.0; + if (!model->BSIM4v3lua1Given) + model->BSIM4v3lua1 = 0.0; + if (!model->BSIM4v3lubGiven) + model->BSIM4v3lub = 0.0; + if (!model->BSIM4v3lub1Given) + model->BSIM4v3lub1 = 0.0; + if (!model->BSIM4v3lucGiven) + model->BSIM4v3luc = 0.0; + if (!model->BSIM4v3luc1Given) + model->BSIM4v3luc1 = 0.0; + if (!model->BSIM4v3lu0Given) + model->BSIM4v3lu0 = 0.0; + if (!model->BSIM4v3luteGiven) + model->BSIM4v3lute = 0.0; + if (!model->BSIM4v3lvoffGiven) + model->BSIM4v3lvoff = 0.0; + if (!model->BSIM4v3lminvGiven) + model->BSIM4v3lminv = 0.0; + if (!model->BSIM4v3lfproutGiven) + model->BSIM4v3lfprout = 0.0; + if (!model->BSIM4v3lpditsGiven) + model->BSIM4v3lpdits = 0.0; + if (!model->BSIM4v3lpditsdGiven) + model->BSIM4v3lpditsd = 0.0; + if (!model->BSIM4v3ldeltaGiven) + model->BSIM4v3ldelta = 0.0; + if (!model->BSIM4v3lrdswGiven) + model->BSIM4v3lrdsw = 0.0; + if (!model->BSIM4v3lrdwGiven) + model->BSIM4v3lrdw = 0.0; + if (!model->BSIM4v3lrswGiven) + model->BSIM4v3lrsw = 0.0; + if (!model->BSIM4v3lprwbGiven) + model->BSIM4v3lprwb = 0.0; + if (!model->BSIM4v3lprwgGiven) + model->BSIM4v3lprwg = 0.0; + if (!model->BSIM4v3lprtGiven) + model->BSIM4v3lprt = 0.0; + if (!model->BSIM4v3leta0Given) + model->BSIM4v3leta0 = 0.0; + if (!model->BSIM4v3letabGiven) + model->BSIM4v3letab = -0.0; + if (!model->BSIM4v3lpclmGiven) + model->BSIM4v3lpclm = 0.0; + if (!model->BSIM4v3lpdibl1Given) + model->BSIM4v3lpdibl1 = 0.0; + if (!model->BSIM4v3lpdibl2Given) + model->BSIM4v3lpdibl2 = 0.0; + if (!model->BSIM4v3lpdiblbGiven) + model->BSIM4v3lpdiblb = 0.0; + if (!model->BSIM4v3lpscbe1Given) + model->BSIM4v3lpscbe1 = 0.0; + if (!model->BSIM4v3lpscbe2Given) + model->BSIM4v3lpscbe2 = 0.0; + if (!model->BSIM4v3lpvagGiven) + model->BSIM4v3lpvag = 0.0; + if (!model->BSIM4v3lwrGiven) + model->BSIM4v3lwr = 0.0; + if (!model->BSIM4v3ldwgGiven) + model->BSIM4v3ldwg = 0.0; + if (!model->BSIM4v3ldwbGiven) + model->BSIM4v3ldwb = 0.0; + if (!model->BSIM4v3lb0Given) + model->BSIM4v3lb0 = 0.0; + if (!model->BSIM4v3lb1Given) + model->BSIM4v3lb1 = 0.0; + if (!model->BSIM4v3lalpha0Given) + model->BSIM4v3lalpha0 = 0.0; + if (!model->BSIM4v3lalpha1Given) + model->BSIM4v3lalpha1 = 0.0; + if (!model->BSIM4v3lbeta0Given) + model->BSIM4v3lbeta0 = 0.0; + if (!model->BSIM4v3lagidlGiven) + model->BSIM4v3lagidl = 0.0; + if (!model->BSIM4v3lbgidlGiven) + model->BSIM4v3lbgidl = 0.0; + if (!model->BSIM4v3lcgidlGiven) + model->BSIM4v3lcgidl = 0.0; + if (!model->BSIM4v3legidlGiven) + model->BSIM4v3legidl = 0.0; + if (!model->BSIM4v3laigcGiven) + model->BSIM4v3laigc = 0.0; + if (!model->BSIM4v3lbigcGiven) + model->BSIM4v3lbigc = 0.0; + if (!model->BSIM4v3lcigcGiven) + model->BSIM4v3lcigc = 0.0; + if (!model->BSIM4v3laigsdGiven) + model->BSIM4v3laigsd = 0.0; + if (!model->BSIM4v3lbigsdGiven) + model->BSIM4v3lbigsd = 0.0; + if (!model->BSIM4v3lcigsdGiven) + model->BSIM4v3lcigsd = 0.0; + if (!model->BSIM4v3laigbaccGiven) + model->BSIM4v3laigbacc = 0.0; + if (!model->BSIM4v3lbigbaccGiven) + model->BSIM4v3lbigbacc = 0.0; + if (!model->BSIM4v3lcigbaccGiven) + model->BSIM4v3lcigbacc = 0.0; + if (!model->BSIM4v3laigbinvGiven) + model->BSIM4v3laigbinv = 0.0; + if (!model->BSIM4v3lbigbinvGiven) + model->BSIM4v3lbigbinv = 0.0; + if (!model->BSIM4v3lcigbinvGiven) + model->BSIM4v3lcigbinv = 0.0; + if (!model->BSIM4v3lnigcGiven) + model->BSIM4v3lnigc = 0.0; + if (!model->BSIM4v3lnigbinvGiven) + model->BSIM4v3lnigbinv = 0.0; + if (!model->BSIM4v3lnigbaccGiven) + model->BSIM4v3lnigbacc = 0.0; + if (!model->BSIM4v3lntoxGiven) + model->BSIM4v3lntox = 0.0; + if (!model->BSIM4v3leigbinvGiven) + model->BSIM4v3leigbinv = 0.0; + if (!model->BSIM4v3lpigcdGiven) + model->BSIM4v3lpigcd = 0.0; + if (!model->BSIM4v3lpoxedgeGiven) + model->BSIM4v3lpoxedge = 0.0; + if (!model->BSIM4v3lxrcrg1Given) + model->BSIM4v3lxrcrg1 = 0.0; + if (!model->BSIM4v3lxrcrg2Given) + model->BSIM4v3lxrcrg2 = 0.0; + if (!model->BSIM4v3leuGiven) + model->BSIM4v3leu = 0.0; + if (!model->BSIM4v3lvfbGiven) + model->BSIM4v3lvfb = 0.0; + if (!model->BSIM4v3llambdaGiven) + model->BSIM4v3llambda = 0.0; + if (!model->BSIM4v3lvtlGiven) + model->BSIM4v3lvtl = 0.0; + if (!model->BSIM4v3lxnGiven) + model->BSIM4v3lxn = 0.0; + + if (!model->BSIM4v3lcgslGiven) + model->BSIM4v3lcgsl = 0.0; + if (!model->BSIM4v3lcgdlGiven) + model->BSIM4v3lcgdl = 0.0; + if (!model->BSIM4v3lckappasGiven) + model->BSIM4v3lckappas = 0.0; + if (!model->BSIM4v3lckappadGiven) + model->BSIM4v3lckappad = 0.0; + if (!model->BSIM4v3lclcGiven) + model->BSIM4v3lclc = 0.0; + if (!model->BSIM4v3lcleGiven) + model->BSIM4v3lcle = 0.0; + if (!model->BSIM4v3lcfGiven) + model->BSIM4v3lcf = 0.0; + if (!model->BSIM4v3lvfbcvGiven) + model->BSIM4v3lvfbcv = 0.0; + if (!model->BSIM4v3lacdeGiven) + model->BSIM4v3lacde = 0.0; + if (!model->BSIM4v3lmoinGiven) + model->BSIM4v3lmoin = 0.0; + if (!model->BSIM4v3lnoffGiven) + model->BSIM4v3lnoff = 0.0; + if (!model->BSIM4v3lvoffcvGiven) + model->BSIM4v3lvoffcv = 0.0; + + /* Width dependence */ + if (!model->BSIM4v3wcdscGiven) + model->BSIM4v3wcdsc = 0.0; + if (!model->BSIM4v3wcdscbGiven) + model->BSIM4v3wcdscb = 0.0; + if (!model->BSIM4v3wcdscdGiven) + model->BSIM4v3wcdscd = 0.0; + if (!model->BSIM4v3wcitGiven) + model->BSIM4v3wcit = 0.0; + if (!model->BSIM4v3wnfactorGiven) + model->BSIM4v3wnfactor = 0.0; + if (!model->BSIM4v3wxjGiven) + model->BSIM4v3wxj = 0.0; + if (!model->BSIM4v3wvsatGiven) + model->BSIM4v3wvsat = 0.0; + if (!model->BSIM4v3watGiven) + model->BSIM4v3wat = 0.0; + if (!model->BSIM4v3wa0Given) + model->BSIM4v3wa0 = 0.0; + if (!model->BSIM4v3wagsGiven) + model->BSIM4v3wags = 0.0; + if (!model->BSIM4v3wa1Given) + model->BSIM4v3wa1 = 0.0; + if (!model->BSIM4v3wa2Given) + model->BSIM4v3wa2 = 0.0; + if (!model->BSIM4v3wketaGiven) + model->BSIM4v3wketa = 0.0; + if (!model->BSIM4v3wnsubGiven) + model->BSIM4v3wnsub = 0.0; + if (!model->BSIM4v3wndepGiven) + model->BSIM4v3wndep = 0.0; + if (!model->BSIM4v3wnsdGiven) + model->BSIM4v3wnsd = 0.0; + if (!model->BSIM4v3wphinGiven) + model->BSIM4v3wphin = 0.0; + if (!model->BSIM4v3wngateGiven) + model->BSIM4v3wngate = 0.0; + if (!model->BSIM4v3wvbmGiven) + model->BSIM4v3wvbm = 0.0; + if (!model->BSIM4v3wxtGiven) + model->BSIM4v3wxt = 0.0; + if (!model->BSIM4v3wkt1Given) + model->BSIM4v3wkt1 = 0.0; + if (!model->BSIM4v3wkt1lGiven) + model->BSIM4v3wkt1l = 0.0; + if (!model->BSIM4v3wkt2Given) + model->BSIM4v3wkt2 = 0.0; + if (!model->BSIM4v3wk3Given) + model->BSIM4v3wk3 = 0.0; + if (!model->BSIM4v3wk3bGiven) + model->BSIM4v3wk3b = 0.0; + if (!model->BSIM4v3ww0Given) + model->BSIM4v3ww0 = 0.0; + if (!model->BSIM4v3wlpe0Given) + model->BSIM4v3wlpe0 = 0.0; + if (!model->BSIM4v3wlpebGiven) + model->BSIM4v3wlpeb = model->BSIM4v3wlpe0; + if (!model->BSIM4v3wdvtp0Given) + model->BSIM4v3wdvtp0 = 0.0; + if (!model->BSIM4v3wdvtp1Given) + model->BSIM4v3wdvtp1 = 0.0; + if (!model->BSIM4v3wdvt0Given) + model->BSIM4v3wdvt0 = 0.0; + if (!model->BSIM4v3wdvt1Given) + model->BSIM4v3wdvt1 = 0.0; + if (!model->BSIM4v3wdvt2Given) + model->BSIM4v3wdvt2 = 0.0; + if (!model->BSIM4v3wdvt0wGiven) + model->BSIM4v3wdvt0w = 0.0; + if (!model->BSIM4v3wdvt1wGiven) + model->BSIM4v3wdvt1w = 0.0; + if (!model->BSIM4v3wdvt2wGiven) + model->BSIM4v3wdvt2w = 0.0; + if (!model->BSIM4v3wdroutGiven) + model->BSIM4v3wdrout = 0.0; + if (!model->BSIM4v3wdsubGiven) + model->BSIM4v3wdsub = 0.0; + if (!model->BSIM4v3wvth0Given) + model->BSIM4v3wvth0 = 0.0; + if (!model->BSIM4v3wuaGiven) + model->BSIM4v3wua = 0.0; + if (!model->BSIM4v3wua1Given) + model->BSIM4v3wua1 = 0.0; + if (!model->BSIM4v3wubGiven) + model->BSIM4v3wub = 0.0; + if (!model->BSIM4v3wub1Given) + model->BSIM4v3wub1 = 0.0; + if (!model->BSIM4v3wucGiven) + model->BSIM4v3wuc = 0.0; + if (!model->BSIM4v3wuc1Given) + model->BSIM4v3wuc1 = 0.0; + if (!model->BSIM4v3wu0Given) + model->BSIM4v3wu0 = 0.0; + if (!model->BSIM4v3wuteGiven) + model->BSIM4v3wute = 0.0; + if (!model->BSIM4v3wvoffGiven) + model->BSIM4v3wvoff = 0.0; + if (!model->BSIM4v3wminvGiven) + model->BSIM4v3wminv = 0.0; + if (!model->BSIM4v3wfproutGiven) + model->BSIM4v3wfprout = 0.0; + if (!model->BSIM4v3wpditsGiven) + model->BSIM4v3wpdits = 0.0; + if (!model->BSIM4v3wpditsdGiven) + model->BSIM4v3wpditsd = 0.0; + if (!model->BSIM4v3wdeltaGiven) + model->BSIM4v3wdelta = 0.0; + if (!model->BSIM4v3wrdswGiven) + model->BSIM4v3wrdsw = 0.0; + if (!model->BSIM4v3wrdwGiven) + model->BSIM4v3wrdw = 0.0; + if (!model->BSIM4v3wrswGiven) + model->BSIM4v3wrsw = 0.0; + if (!model->BSIM4v3wprwbGiven) + model->BSIM4v3wprwb = 0.0; + if (!model->BSIM4v3wprwgGiven) + model->BSIM4v3wprwg = 0.0; + if (!model->BSIM4v3wprtGiven) + model->BSIM4v3wprt = 0.0; + if (!model->BSIM4v3weta0Given) + model->BSIM4v3weta0 = 0.0; + if (!model->BSIM4v3wetabGiven) + model->BSIM4v3wetab = 0.0; + if (!model->BSIM4v3wpclmGiven) + model->BSIM4v3wpclm = 0.0; + if (!model->BSIM4v3wpdibl1Given) + model->BSIM4v3wpdibl1 = 0.0; + if (!model->BSIM4v3wpdibl2Given) + model->BSIM4v3wpdibl2 = 0.0; + if (!model->BSIM4v3wpdiblbGiven) + model->BSIM4v3wpdiblb = 0.0; + if (!model->BSIM4v3wpscbe1Given) + model->BSIM4v3wpscbe1 = 0.0; + if (!model->BSIM4v3wpscbe2Given) + model->BSIM4v3wpscbe2 = 0.0; + if (!model->BSIM4v3wpvagGiven) + model->BSIM4v3wpvag = 0.0; + if (!model->BSIM4v3wwrGiven) + model->BSIM4v3wwr = 0.0; + if (!model->BSIM4v3wdwgGiven) + model->BSIM4v3wdwg = 0.0; + if (!model->BSIM4v3wdwbGiven) + model->BSIM4v3wdwb = 0.0; + if (!model->BSIM4v3wb0Given) + model->BSIM4v3wb0 = 0.0; + if (!model->BSIM4v3wb1Given) + model->BSIM4v3wb1 = 0.0; + if (!model->BSIM4v3walpha0Given) + model->BSIM4v3walpha0 = 0.0; + if (!model->BSIM4v3walpha1Given) + model->BSIM4v3walpha1 = 0.0; + if (!model->BSIM4v3wbeta0Given) + model->BSIM4v3wbeta0 = 0.0; + if (!model->BSIM4v3wagidlGiven) + model->BSIM4v3wagidl = 0.0; + if (!model->BSIM4v3wbgidlGiven) + model->BSIM4v3wbgidl = 0.0; + if (!model->BSIM4v3wcgidlGiven) + model->BSIM4v3wcgidl = 0.0; + if (!model->BSIM4v3wegidlGiven) + model->BSIM4v3wegidl = 0.0; + if (!model->BSIM4v3waigcGiven) + model->BSIM4v3waigc = 0.0; + if (!model->BSIM4v3wbigcGiven) + model->BSIM4v3wbigc = 0.0; + if (!model->BSIM4v3wcigcGiven) + model->BSIM4v3wcigc = 0.0; + if (!model->BSIM4v3waigsdGiven) + model->BSIM4v3waigsd = 0.0; + if (!model->BSIM4v3wbigsdGiven) + model->BSIM4v3wbigsd = 0.0; + if (!model->BSIM4v3wcigsdGiven) + model->BSIM4v3wcigsd = 0.0; + if (!model->BSIM4v3waigbaccGiven) + model->BSIM4v3waigbacc = 0.0; + if (!model->BSIM4v3wbigbaccGiven) + model->BSIM4v3wbigbacc = 0.0; + if (!model->BSIM4v3wcigbaccGiven) + model->BSIM4v3wcigbacc = 0.0; + if (!model->BSIM4v3waigbinvGiven) + model->BSIM4v3waigbinv = 0.0; + if (!model->BSIM4v3wbigbinvGiven) + model->BSIM4v3wbigbinv = 0.0; + if (!model->BSIM4v3wcigbinvGiven) + model->BSIM4v3wcigbinv = 0.0; + if (!model->BSIM4v3wnigcGiven) + model->BSIM4v3wnigc = 0.0; + if (!model->BSIM4v3wnigbinvGiven) + model->BSIM4v3wnigbinv = 0.0; + if (!model->BSIM4v3wnigbaccGiven) + model->BSIM4v3wnigbacc = 0.0; + if (!model->BSIM4v3wntoxGiven) + model->BSIM4v3wntox = 0.0; + if (!model->BSIM4v3weigbinvGiven) + model->BSIM4v3weigbinv = 0.0; + if (!model->BSIM4v3wpigcdGiven) + model->BSIM4v3wpigcd = 0.0; + if (!model->BSIM4v3wpoxedgeGiven) + model->BSIM4v3wpoxedge = 0.0; + if (!model->BSIM4v3wxrcrg1Given) + model->BSIM4v3wxrcrg1 = 0.0; + if (!model->BSIM4v3wxrcrg2Given) + model->BSIM4v3wxrcrg2 = 0.0; + if (!model->BSIM4v3weuGiven) + model->BSIM4v3weu = 0.0; + if (!model->BSIM4v3wvfbGiven) + model->BSIM4v3wvfb = 0.0; + if (!model->BSIM4v3wlambdaGiven) + model->BSIM4v3wlambda = 0.0; + if (!model->BSIM4v3wvtlGiven) + model->BSIM4v3wvtl = 0.0; + if (!model->BSIM4v3wxnGiven) + model->BSIM4v3wxn = 0.0; + + if (!model->BSIM4v3wcgslGiven) + model->BSIM4v3wcgsl = 0.0; + if (!model->BSIM4v3wcgdlGiven) + model->BSIM4v3wcgdl = 0.0; + if (!model->BSIM4v3wckappasGiven) + model->BSIM4v3wckappas = 0.0; + if (!model->BSIM4v3wckappadGiven) + model->BSIM4v3wckappad = 0.0; + if (!model->BSIM4v3wcfGiven) + model->BSIM4v3wcf = 0.0; + if (!model->BSIM4v3wclcGiven) + model->BSIM4v3wclc = 0.0; + if (!model->BSIM4v3wcleGiven) + model->BSIM4v3wcle = 0.0; + if (!model->BSIM4v3wvfbcvGiven) + model->BSIM4v3wvfbcv = 0.0; + if (!model->BSIM4v3wacdeGiven) + model->BSIM4v3wacde = 0.0; + if (!model->BSIM4v3wmoinGiven) + model->BSIM4v3wmoin = 0.0; + if (!model->BSIM4v3wnoffGiven) + model->BSIM4v3wnoff = 0.0; + if (!model->BSIM4v3wvoffcvGiven) + model->BSIM4v3wvoffcv = 0.0; + + /* Cross-term dependence */ + if (!model->BSIM4v3pcdscGiven) + model->BSIM4v3pcdsc = 0.0; + if (!model->BSIM4v3pcdscbGiven) + model->BSIM4v3pcdscb = 0.0; + if (!model->BSIM4v3pcdscdGiven) + model->BSIM4v3pcdscd = 0.0; + if (!model->BSIM4v3pcitGiven) + model->BSIM4v3pcit = 0.0; + if (!model->BSIM4v3pnfactorGiven) + model->BSIM4v3pnfactor = 0.0; + if (!model->BSIM4v3pxjGiven) + model->BSIM4v3pxj = 0.0; + if (!model->BSIM4v3pvsatGiven) + model->BSIM4v3pvsat = 0.0; + if (!model->BSIM4v3patGiven) + model->BSIM4v3pat = 0.0; + if (!model->BSIM4v3pa0Given) + model->BSIM4v3pa0 = 0.0; + + if (!model->BSIM4v3pagsGiven) + model->BSIM4v3pags = 0.0; + if (!model->BSIM4v3pa1Given) + model->BSIM4v3pa1 = 0.0; + if (!model->BSIM4v3pa2Given) + model->BSIM4v3pa2 = 0.0; + if (!model->BSIM4v3pketaGiven) + model->BSIM4v3pketa = 0.0; + if (!model->BSIM4v3pnsubGiven) + model->BSIM4v3pnsub = 0.0; + if (!model->BSIM4v3pndepGiven) + model->BSIM4v3pndep = 0.0; + if (!model->BSIM4v3pnsdGiven) + model->BSIM4v3pnsd = 0.0; + if (!model->BSIM4v3pphinGiven) + model->BSIM4v3pphin = 0.0; + if (!model->BSIM4v3pngateGiven) + model->BSIM4v3pngate = 0.0; + if (!model->BSIM4v3pvbmGiven) + model->BSIM4v3pvbm = 0.0; + if (!model->BSIM4v3pxtGiven) + model->BSIM4v3pxt = 0.0; + if (!model->BSIM4v3pkt1Given) + model->BSIM4v3pkt1 = 0.0; + if (!model->BSIM4v3pkt1lGiven) + model->BSIM4v3pkt1l = 0.0; + if (!model->BSIM4v3pkt2Given) + model->BSIM4v3pkt2 = 0.0; + if (!model->BSIM4v3pk3Given) + model->BSIM4v3pk3 = 0.0; + if (!model->BSIM4v3pk3bGiven) + model->BSIM4v3pk3b = 0.0; + if (!model->BSIM4v3pw0Given) + model->BSIM4v3pw0 = 0.0; + if (!model->BSIM4v3plpe0Given) + model->BSIM4v3plpe0 = 0.0; + if (!model->BSIM4v3plpebGiven) + model->BSIM4v3plpeb = model->BSIM4v3plpe0; + if (!model->BSIM4v3pdvtp0Given) + model->BSIM4v3pdvtp0 = 0.0; + if (!model->BSIM4v3pdvtp1Given) + model->BSIM4v3pdvtp1 = 0.0; + if (!model->BSIM4v3pdvt0Given) + model->BSIM4v3pdvt0 = 0.0; + if (!model->BSIM4v3pdvt1Given) + model->BSIM4v3pdvt1 = 0.0; + if (!model->BSIM4v3pdvt2Given) + model->BSIM4v3pdvt2 = 0.0; + if (!model->BSIM4v3pdvt0wGiven) + model->BSIM4v3pdvt0w = 0.0; + if (!model->BSIM4v3pdvt1wGiven) + model->BSIM4v3pdvt1w = 0.0; + if (!model->BSIM4v3pdvt2wGiven) + model->BSIM4v3pdvt2w = 0.0; + if (!model->BSIM4v3pdroutGiven) + model->BSIM4v3pdrout = 0.0; + if (!model->BSIM4v3pdsubGiven) + model->BSIM4v3pdsub = 0.0; + if (!model->BSIM4v3pvth0Given) + model->BSIM4v3pvth0 = 0.0; + if (!model->BSIM4v3puaGiven) + model->BSIM4v3pua = 0.0; + if (!model->BSIM4v3pua1Given) + model->BSIM4v3pua1 = 0.0; + if (!model->BSIM4v3pubGiven) + model->BSIM4v3pub = 0.0; + if (!model->BSIM4v3pub1Given) + model->BSIM4v3pub1 = 0.0; + if (!model->BSIM4v3pucGiven) + model->BSIM4v3puc = 0.0; + if (!model->BSIM4v3puc1Given) + model->BSIM4v3puc1 = 0.0; + if (!model->BSIM4v3pu0Given) + model->BSIM4v3pu0 = 0.0; + if (!model->BSIM4v3puteGiven) + model->BSIM4v3pute = 0.0; + if (!model->BSIM4v3pvoffGiven) + model->BSIM4v3pvoff = 0.0; + if (!model->BSIM4v3pminvGiven) + model->BSIM4v3pminv = 0.0; + if (!model->BSIM4v3pfproutGiven) + model->BSIM4v3pfprout = 0.0; + if (!model->BSIM4v3ppditsGiven) + model->BSIM4v3ppdits = 0.0; + if (!model->BSIM4v3ppditsdGiven) + model->BSIM4v3ppditsd = 0.0; + if (!model->BSIM4v3pdeltaGiven) + model->BSIM4v3pdelta = 0.0; + if (!model->BSIM4v3prdswGiven) + model->BSIM4v3prdsw = 0.0; + if (!model->BSIM4v3prdwGiven) + model->BSIM4v3prdw = 0.0; + if (!model->BSIM4v3prswGiven) + model->BSIM4v3prsw = 0.0; + if (!model->BSIM4v3pprwbGiven) + model->BSIM4v3pprwb = 0.0; + if (!model->BSIM4v3pprwgGiven) + model->BSIM4v3pprwg = 0.0; + if (!model->BSIM4v3pprtGiven) + model->BSIM4v3pprt = 0.0; + if (!model->BSIM4v3peta0Given) + model->BSIM4v3peta0 = 0.0; + if (!model->BSIM4v3petabGiven) + model->BSIM4v3petab = 0.0; + if (!model->BSIM4v3ppclmGiven) + model->BSIM4v3ppclm = 0.0; + if (!model->BSIM4v3ppdibl1Given) + model->BSIM4v3ppdibl1 = 0.0; + if (!model->BSIM4v3ppdibl2Given) + model->BSIM4v3ppdibl2 = 0.0; + if (!model->BSIM4v3ppdiblbGiven) + model->BSIM4v3ppdiblb = 0.0; + if (!model->BSIM4v3ppscbe1Given) + model->BSIM4v3ppscbe1 = 0.0; + if (!model->BSIM4v3ppscbe2Given) + model->BSIM4v3ppscbe2 = 0.0; + if (!model->BSIM4v3ppvagGiven) + model->BSIM4v3ppvag = 0.0; + if (!model->BSIM4v3pwrGiven) + model->BSIM4v3pwr = 0.0; + if (!model->BSIM4v3pdwgGiven) + model->BSIM4v3pdwg = 0.0; + if (!model->BSIM4v3pdwbGiven) + model->BSIM4v3pdwb = 0.0; + if (!model->BSIM4v3pb0Given) + model->BSIM4v3pb0 = 0.0; + if (!model->BSIM4v3pb1Given) + model->BSIM4v3pb1 = 0.0; + if (!model->BSIM4v3palpha0Given) + model->BSIM4v3palpha0 = 0.0; + if (!model->BSIM4v3palpha1Given) + model->BSIM4v3palpha1 = 0.0; + if (!model->BSIM4v3pbeta0Given) + model->BSIM4v3pbeta0 = 0.0; + if (!model->BSIM4v3pagidlGiven) + model->BSIM4v3pagidl = 0.0; + if (!model->BSIM4v3pbgidlGiven) + model->BSIM4v3pbgidl = 0.0; + if (!model->BSIM4v3pcgidlGiven) + model->BSIM4v3pcgidl = 0.0; + if (!model->BSIM4v3pegidlGiven) + model->BSIM4v3pegidl = 0.0; + if (!model->BSIM4v3paigcGiven) + model->BSIM4v3paigc = 0.0; + if (!model->BSIM4v3pbigcGiven) + model->BSIM4v3pbigc = 0.0; + if (!model->BSIM4v3pcigcGiven) + model->BSIM4v3pcigc = 0.0; + if (!model->BSIM4v3paigsdGiven) + model->BSIM4v3paigsd = 0.0; + if (!model->BSIM4v3pbigsdGiven) + model->BSIM4v3pbigsd = 0.0; + if (!model->BSIM4v3pcigsdGiven) + model->BSIM4v3pcigsd = 0.0; + if (!model->BSIM4v3paigbaccGiven) + model->BSIM4v3paigbacc = 0.0; + if (!model->BSIM4v3pbigbaccGiven) + model->BSIM4v3pbigbacc = 0.0; + if (!model->BSIM4v3pcigbaccGiven) + model->BSIM4v3pcigbacc = 0.0; + if (!model->BSIM4v3paigbinvGiven) + model->BSIM4v3paigbinv = 0.0; + if (!model->BSIM4v3pbigbinvGiven) + model->BSIM4v3pbigbinv = 0.0; + if (!model->BSIM4v3pcigbinvGiven) + model->BSIM4v3pcigbinv = 0.0; + if (!model->BSIM4v3pnigcGiven) + model->BSIM4v3pnigc = 0.0; + if (!model->BSIM4v3pnigbinvGiven) + model->BSIM4v3pnigbinv = 0.0; + if (!model->BSIM4v3pnigbaccGiven) + model->BSIM4v3pnigbacc = 0.0; + if (!model->BSIM4v3pntoxGiven) + model->BSIM4v3pntox = 0.0; + if (!model->BSIM4v3peigbinvGiven) + model->BSIM4v3peigbinv = 0.0; + if (!model->BSIM4v3ppigcdGiven) + model->BSIM4v3ppigcd = 0.0; + if (!model->BSIM4v3ppoxedgeGiven) + model->BSIM4v3ppoxedge = 0.0; + if (!model->BSIM4v3pxrcrg1Given) + model->BSIM4v3pxrcrg1 = 0.0; + if (!model->BSIM4v3pxrcrg2Given) + model->BSIM4v3pxrcrg2 = 0.0; + if (!model->BSIM4v3peuGiven) + model->BSIM4v3peu = 0.0; + if (!model->BSIM4v3pvfbGiven) + model->BSIM4v3pvfb = 0.0; + if (!model->BSIM4v3plambdaGiven) + model->BSIM4v3plambda = 0.0; + if (!model->BSIM4v3pvtlGiven) + model->BSIM4v3pvtl = 0.0; + if (!model->BSIM4v3pxnGiven) + model->BSIM4v3pxn = 0.0; + + if (!model->BSIM4v3pcgslGiven) + model->BSIM4v3pcgsl = 0.0; + if (!model->BSIM4v3pcgdlGiven) + model->BSIM4v3pcgdl = 0.0; + if (!model->BSIM4v3pckappasGiven) + model->BSIM4v3pckappas = 0.0; + if (!model->BSIM4v3pckappadGiven) + model->BSIM4v3pckappad = 0.0; + if (!model->BSIM4v3pcfGiven) + model->BSIM4v3pcf = 0.0; + if (!model->BSIM4v3pclcGiven) + model->BSIM4v3pclc = 0.0; + if (!model->BSIM4v3pcleGiven) + model->BSIM4v3pcle = 0.0; + if (!model->BSIM4v3pvfbcvGiven) + model->BSIM4v3pvfbcv = 0.0; + if (!model->BSIM4v3pacdeGiven) + model->BSIM4v3pacde = 0.0; + if (!model->BSIM4v3pmoinGiven) + model->BSIM4v3pmoin = 0.0; + if (!model->BSIM4v3pnoffGiven) + model->BSIM4v3pnoff = 0.0; + if (!model->BSIM4v3pvoffcvGiven) + model->BSIM4v3pvoffcv = 0.0; + + /* unit degree celcius */ + if (!model->BSIM4v3tnomGiven) + model->BSIM4v3tnom = ckt->CKTnomTemp; + if (!model->BSIM4v3LintGiven) + model->BSIM4v3Lint = 0.0; + if (!model->BSIM4v3LlGiven) + model->BSIM4v3Ll = 0.0; + if (!model->BSIM4v3LlcGiven) + model->BSIM4v3Llc = model->BSIM4v3Ll; + if (!model->BSIM4v3LlnGiven) + model->BSIM4v3Lln = 1.0; + if (!model->BSIM4v3LwGiven) + model->BSIM4v3Lw = 0.0; + if (!model->BSIM4v3LwcGiven) + model->BSIM4v3Lwc = model->BSIM4v3Lw; + if (!model->BSIM4v3LwnGiven) + model->BSIM4v3Lwn = 1.0; + if (!model->BSIM4v3LwlGiven) + model->BSIM4v3Lwl = 0.0; + if (!model->BSIM4v3LwlcGiven) + model->BSIM4v3Lwlc = model->BSIM4v3Lwl; + if (!model->BSIM4v3LminGiven) + model->BSIM4v3Lmin = 0.0; + if (!model->BSIM4v3LmaxGiven) + model->BSIM4v3Lmax = 1.0; + if (!model->BSIM4v3WintGiven) + model->BSIM4v3Wint = 0.0; + if (!model->BSIM4v3WlGiven) + model->BSIM4v3Wl = 0.0; + if (!model->BSIM4v3WlcGiven) + model->BSIM4v3Wlc = model->BSIM4v3Wl; + if (!model->BSIM4v3WlnGiven) + model->BSIM4v3Wln = 1.0; + if (!model->BSIM4v3WwGiven) + model->BSIM4v3Ww = 0.0; + if (!model->BSIM4v3WwcGiven) + model->BSIM4v3Wwc = model->BSIM4v3Ww; + if (!model->BSIM4v3WwnGiven) + model->BSIM4v3Wwn = 1.0; + if (!model->BSIM4v3WwlGiven) + model->BSIM4v3Wwl = 0.0; + if (!model->BSIM4v3WwlcGiven) + model->BSIM4v3Wwlc = model->BSIM4v3Wwl; + if (!model->BSIM4v3WminGiven) + model->BSIM4v3Wmin = 0.0; + if (!model->BSIM4v3WmaxGiven) + model->BSIM4v3Wmax = 1.0; + if (!model->BSIM4v3dwcGiven) + model->BSIM4v3dwc = model->BSIM4v3Wint; + if (!model->BSIM4v3dlcGiven) + model->BSIM4v3dlc = model->BSIM4v3Lint; + if (!model->BSIM4v3xlGiven) + model->BSIM4v3xl = 0.0; + if (!model->BSIM4v3xwGiven) + model->BSIM4v3xw = 0.0; + if (!model->BSIM4v3dlcigGiven) + model->BSIM4v3dlcig = model->BSIM4v3Lint; + if (!model->BSIM4v3dwjGiven) + model->BSIM4v3dwj = model->BSIM4v3dwc; + if (!model->BSIM4v3cfGiven) + model->BSIM4v3cf = 2.0 * model->BSIM4v3epsrox * EPS0 / PI + * log(1.0 + 0.4e-6 / model->BSIM4v3toxe); + + if (!model->BSIM4v3xpartGiven) + model->BSIM4v3xpart = 0.0; + if (!model->BSIM4v3sheetResistanceGiven) + model->BSIM4v3sheetResistance = 0.0; + + if (!model->BSIM4v3SunitAreaJctCapGiven) + model->BSIM4v3SunitAreaJctCap = 5.0E-4; + if (!model->BSIM4v3DunitAreaJctCapGiven) + model->BSIM4v3DunitAreaJctCap = model->BSIM4v3SunitAreaJctCap; + if (!model->BSIM4v3SunitLengthSidewallJctCapGiven) + model->BSIM4v3SunitLengthSidewallJctCap = 5.0E-10; + if (!model->BSIM4v3DunitLengthSidewallJctCapGiven) + model->BSIM4v3DunitLengthSidewallJctCap = model->BSIM4v3SunitLengthSidewallJctCap; + if (!model->BSIM4v3SunitLengthGateSidewallJctCapGiven) + model->BSIM4v3SunitLengthGateSidewallJctCap = model->BSIM4v3SunitLengthSidewallJctCap ; + if (!model->BSIM4v3DunitLengthGateSidewallJctCapGiven) + model->BSIM4v3DunitLengthGateSidewallJctCap = model->BSIM4v3SunitLengthGateSidewallJctCap; + if (!model->BSIM4v3SjctSatCurDensityGiven) + model->BSIM4v3SjctSatCurDensity = 1.0E-4; + if (!model->BSIM4v3DjctSatCurDensityGiven) + model->BSIM4v3DjctSatCurDensity = model->BSIM4v3SjctSatCurDensity; + if (!model->BSIM4v3SjctSidewallSatCurDensityGiven) + model->BSIM4v3SjctSidewallSatCurDensity = 0.0; + if (!model->BSIM4v3DjctSidewallSatCurDensityGiven) + model->BSIM4v3DjctSidewallSatCurDensity = model->BSIM4v3SjctSidewallSatCurDensity; + if (!model->BSIM4v3SjctGateSidewallSatCurDensityGiven) + model->BSIM4v3SjctGateSidewallSatCurDensity = 0.0; + if (!model->BSIM4v3DjctGateSidewallSatCurDensityGiven) + model->BSIM4v3DjctGateSidewallSatCurDensity = model->BSIM4v3SjctGateSidewallSatCurDensity; + if (!model->BSIM4v3SbulkJctPotentialGiven) + model->BSIM4v3SbulkJctPotential = 1.0; + if (!model->BSIM4v3DbulkJctPotentialGiven) + model->BSIM4v3DbulkJctPotential = model->BSIM4v3SbulkJctPotential; + if (!model->BSIM4v3SsidewallJctPotentialGiven) + model->BSIM4v3SsidewallJctPotential = 1.0; + if (!model->BSIM4v3DsidewallJctPotentialGiven) + model->BSIM4v3DsidewallJctPotential = model->BSIM4v3SsidewallJctPotential; + if (!model->BSIM4v3SGatesidewallJctPotentialGiven) + model->BSIM4v3SGatesidewallJctPotential = model->BSIM4v3SsidewallJctPotential; + if (!model->BSIM4v3DGatesidewallJctPotentialGiven) + model->BSIM4v3DGatesidewallJctPotential = model->BSIM4v3SGatesidewallJctPotential; + if (!model->BSIM4v3SbulkJctBotGradingCoeffGiven) + model->BSIM4v3SbulkJctBotGradingCoeff = 0.5; + if (!model->BSIM4v3DbulkJctBotGradingCoeffGiven) + model->BSIM4v3DbulkJctBotGradingCoeff = model->BSIM4v3SbulkJctBotGradingCoeff; + if (!model->BSIM4v3SbulkJctSideGradingCoeffGiven) + model->BSIM4v3SbulkJctSideGradingCoeff = 0.33; + if (!model->BSIM4v3DbulkJctSideGradingCoeffGiven) + model->BSIM4v3DbulkJctSideGradingCoeff = model->BSIM4v3SbulkJctSideGradingCoeff; + if (!model->BSIM4v3SbulkJctGateSideGradingCoeffGiven) + model->BSIM4v3SbulkJctGateSideGradingCoeff = model->BSIM4v3SbulkJctSideGradingCoeff; + if (!model->BSIM4v3DbulkJctGateSideGradingCoeffGiven) + model->BSIM4v3DbulkJctGateSideGradingCoeff = model->BSIM4v3SbulkJctGateSideGradingCoeff; + if (!model->BSIM4v3SjctEmissionCoeffGiven) + model->BSIM4v3SjctEmissionCoeff = 1.0; + if (!model->BSIM4v3DjctEmissionCoeffGiven) + model->BSIM4v3DjctEmissionCoeff = model->BSIM4v3SjctEmissionCoeff; + if (!model->BSIM4v3SjctTempExponentGiven) + model->BSIM4v3SjctTempExponent = 3.0; + if (!model->BSIM4v3DjctTempExponentGiven) + model->BSIM4v3DjctTempExponent = model->BSIM4v3SjctTempExponent; + + if (!model->BSIM4v3oxideTrapDensityAGiven) + { if (model->BSIM4v3type == NMOS) + model->BSIM4v3oxideTrapDensityA = 6.25e41; + else + model->BSIM4v3oxideTrapDensityA= 6.188e40; + } + if (!model->BSIM4v3oxideTrapDensityBGiven) + { if (model->BSIM4v3type == NMOS) + model->BSIM4v3oxideTrapDensityB = 3.125e26; + else + model->BSIM4v3oxideTrapDensityB = 1.5e25; + } + if (!model->BSIM4v3oxideTrapDensityCGiven) + model->BSIM4v3oxideTrapDensityC = 8.75e9; + if (!model->BSIM4v3emGiven) + model->BSIM4v3em = 4.1e7; /* V/m */ + if (!model->BSIM4v3efGiven) + model->BSIM4v3ef = 1.0; + if (!model->BSIM4v3afGiven) + model->BSIM4v3af = 1.0; + if (!model->BSIM4v3kfGiven) + model->BSIM4v3kf = 0.0; + + /* stress effect */ + if (!model->BSIM4v3sarefGiven) + model->BSIM4v3saref = 1e-6; /* m */ + if (!model->BSIM4v3sbrefGiven) + model->BSIM4v3sbref = 1e-6; /* m */ + if (!model->BSIM4v3wlodGiven) + model->BSIM4v3wlod = 0; /* m */ + if (!model->BSIM4v3ku0Given) + model->BSIM4v3ku0 = 0; /* 1/m */ + if (!model->BSIM4v3kvsatGiven) + model->BSIM4v3kvsat = 0; + if (!model->BSIM4v3kvth0Given) /* m */ + model->BSIM4v3kvth0 = 0; + if (!model->BSIM4v3tku0Given) + model->BSIM4v3tku0 = 0; + if (!model->BSIM4v3llodku0Given) + model->BSIM4v3llodku0 = 0; + if (!model->BSIM4v3wlodku0Given) + model->BSIM4v3wlodku0 = 0; + if (!model->BSIM4v3llodvthGiven) + model->BSIM4v3llodvth = 0; + if (!model->BSIM4v3wlodvthGiven) + model->BSIM4v3wlodvth = 0; + if (!model->BSIM4v3lku0Given) + model->BSIM4v3lku0 = 0; + if (!model->BSIM4v3wku0Given) + model->BSIM4v3wku0 = 0; + if (!model->BSIM4v3pku0Given) + model->BSIM4v3pku0 = 0; + if (!model->BSIM4v3lkvth0Given) + model->BSIM4v3lkvth0 = 0; + if (!model->BSIM4v3wkvth0Given) + model->BSIM4v3wkvth0 = 0; + if (!model->BSIM4v3pkvth0Given) + model->BSIM4v3pkvth0 = 0; + if (!model->BSIM4v3stk2Given) + model->BSIM4v3stk2 = 0; + if (!model->BSIM4v3lodk2Given) + model->BSIM4v3lodk2 = 1.0; + if (!model->BSIM4v3steta0Given) + model->BSIM4v3steta0 = 0; + if (!model->BSIM4v3lodeta0Given) + model->BSIM4v3lodeta0 = 1.0; + + DMCGeff = model->BSIM4v3dmcg - model->BSIM4v3dmcgt; + DMCIeff = model->BSIM4v3dmci; + DMDGeff = model->BSIM4v3dmdg - model->BSIM4v3dmcgt; + + /* + * End processing models and begin to loop + * through all the instances of the model + */ + + for (here = model->BSIM4v3instances; here != NULL ; + here=here->BSIM4v3nextInstance) + { /* allocate a chunk of the state vector */ + if ( here->BSIM4v3owner == ARCHme) { + here->BSIM4v3states = *states; + *states += BSIM4v3numStates; + } + /* perform the parameter defaulting */ + if (!here->BSIM4v3lGiven) + here->BSIM4v3l = 5.0e-6; + if (!here->BSIM4v3wGiven) + here->BSIM4v3w = 5.0e-6; + if (!here->BSIM4v3nfGiven) + here->BSIM4v3nf = 1.0; + if (!here->BSIM4v3minGiven) + here->BSIM4v3min = 0; /* integer */ + if (!here->BSIM4v3icVDSGiven) + here->BSIM4v3icVDS = 0.0; + if (!here->BSIM4v3icVGSGiven) + here->BSIM4v3icVGS = 0.0; + if (!here->BSIM4v3icVBSGiven) + here->BSIM4v3icVBS = 0.0; + if (!here->BSIM4v3drainAreaGiven) + here->BSIM4v3drainArea = 0.0; + if (!here->BSIM4v3drainPerimeterGiven) + here->BSIM4v3drainPerimeter = 0.0; + if (!here->BSIM4v3drainSquaresGiven) + here->BSIM4v3drainSquares = 1.0; + if (!here->BSIM4v3sourceAreaGiven) + here->BSIM4v3sourceArea = 0.0; + if (!here->BSIM4v3sourcePerimeterGiven) + here->BSIM4v3sourcePerimeter = 0.0; + if (!here->BSIM4v3sourceSquaresGiven) + here->BSIM4v3sourceSquares = 1.0; + + if (!here->BSIM4v3saGiven) + here->BSIM4v3sa = 0.0; + if (!here->BSIM4v3sbGiven) + here->BSIM4v3sb = 0.0; + if (!here->BSIM4v3sdGiven) + here->BSIM4v3sd = 0.0; + + if (!here->BSIM4v3rbdbGiven) + here->BSIM4v3rbdb = model->BSIM4v3rbdb; /* in ohm */ + if (!here->BSIM4v3rbsbGiven) + here->BSIM4v3rbsb = model->BSIM4v3rbsb; + if (!here->BSIM4v3rbpbGiven) + here->BSIM4v3rbpb = model->BSIM4v3rbpb; + if (!here->BSIM4v3rbpsGiven) + here->BSIM4v3rbps = model->BSIM4v3rbps; + if (!here->BSIM4v3rbpdGiven) + here->BSIM4v3rbpd = model->BSIM4v3rbpd; + + + /* Process instance model selectors, some + * may override their global counterparts + */ + if (!here->BSIM4v3rbodyModGiven) + here->BSIM4v3rbodyMod = model->BSIM4v3rbodyMod; + else if ((here->BSIM4v3rbodyMod != 0) && (here->BSIM4v3rbodyMod != 1)) + { here->BSIM4v3rbodyMod = model->BSIM4v3rbodyMod; + printf("Warning: rbodyMod has been set to its global value %d.\n", + model->BSIM4v3rbodyMod); + } + + if (!here->BSIM4v3rgateModGiven) + here->BSIM4v3rgateMod = model->BSIM4v3rgateMod; + else if ((here->BSIM4v3rgateMod != 0) && (here->BSIM4v3rgateMod != 1) + && (here->BSIM4v3rgateMod != 2) && (here->BSIM4v3rgateMod != 3)) + { here->BSIM4v3rgateMod = model->BSIM4v3rgateMod; + printf("Warning: rgateMod has been set to its global value %d.\n", + model->BSIM4v3rgateMod); + } + + if (!here->BSIM4v3geoModGiven) + here->BSIM4v3geoMod = model->BSIM4v3geoMod; + if (!here->BSIM4v3rgeoModGiven) + here->BSIM4v3rgeoMod = 0.0; + if (!here->BSIM4v3trnqsModGiven) + here->BSIM4v3trnqsMod = model->BSIM4v3trnqsMod; + else if ((here->BSIM4v3trnqsMod != 0) && (here->BSIM4v3trnqsMod != 1)) + { here->BSIM4v3trnqsMod = model->BSIM4v3trnqsMod; + printf("Warning: trnqsMod has been set to its global value %d.\n", + model->BSIM4v3trnqsMod); + } + + if (!here->BSIM4v3acnqsModGiven) + here->BSIM4v3acnqsMod = model->BSIM4v3acnqsMod; + else if ((here->BSIM4v3acnqsMod != 0) && (here->BSIM4v3acnqsMod != 1)) + { here->BSIM4v3acnqsMod = model->BSIM4v3acnqsMod; + printf("Warning: acnqsMod has been set to its global value %d.\n", + model->BSIM4v3acnqsMod); + } + + /* stress effect */ + if (!here->BSIM4v3saGiven) + here->BSIM4v3sa = 0.0; + if (!here->BSIM4v3sbGiven) + here->BSIM4v3sb = 0.0; + if (!here->BSIM4v3sdGiven) + here->BSIM4v3sd = 0.0; + + + /* process drain series resistance */ + createNode = 0; + if ( (model->BSIM4v3rdsMod != 0) + || (model->BSIM4v3tnoiMod != 0 && noiseAnalGiven)) + { + createNode = 1; + } else if (model->BSIM4v3sheetResistance > 0) + { + if (here->BSIM4v3drainSquaresGiven + && here->BSIM4v3drainSquares > 0) + { + createNode = 1; + } else if (!here->BSIM4v3drainSquaresGiven + && (here->BSIM4v3rgeoMod != 0)) + { + BSIM4v3RdseffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, + here->BSIM4v3rgeoMod, here->BSIM4v3min, + here->BSIM4v3w, model->BSIM4v3sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 0, &Rtot); + if(Rtot > 0) + createNode = 1; + } + } + if ( createNode != 0 && (here->BSIM4v3dNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"drain"); + if(error) return(error); + here->BSIM4v3dNodePrime = tmp->number; + } + else + { here->BSIM4v3dNodePrime = here->BSIM4v3dNode; + } + + /* process source series resistance */ + createNode = 0; + if ( (model->BSIM4v3rdsMod != 0) + || (model->BSIM4v3tnoiMod != 0 && noiseAnalGiven)) + { + createNode = 1; + } else if (model->BSIM4v3sheetResistance > 0) + { + if (here->BSIM4v3sourceSquaresGiven + && here->BSIM4v3sourceSquares > 0) + { + createNode = 1; + } else if (!here->BSIM4v3sourceSquaresGiven + && (here->BSIM4v3rgeoMod != 0)) + { + BSIM4v3RdseffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, + here->BSIM4v3rgeoMod, here->BSIM4v3min, + here->BSIM4v3w, model->BSIM4v3sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 1, &Rtot); + if(Rtot > 0) + createNode = 1; + } + } + if ( createNode != 0 && here->BSIM4v3sNodePrime == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"source"); + if(error) return(error); + here->BSIM4v3sNodePrime = tmp->number; + } + else + here->BSIM4v3sNodePrime = here->BSIM4v3sNode; + + if ((here->BSIM4v3rgateMod > 0) && (here->BSIM4v3gNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"gate"); + if(error) return(error); + here->BSIM4v3gNodePrime = tmp->number; + } + else + here->BSIM4v3gNodePrime = here->BSIM4v3gNodeExt; + + if ((here->BSIM4v3rgateMod == 3) && (here->BSIM4v3gNodeMid == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"midgate"); + if(error) return(error); + here->BSIM4v3gNodeMid = tmp->number; + } + else + here->BSIM4v3gNodeMid = here->BSIM4v3gNodeExt; + + + /* internal body nodes for body resistance model */ + if (here->BSIM4v3rbodyMod) + { if (here->BSIM4v3dbNode == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"dbody"); + if(error) return(error); + here->BSIM4v3dbNode = tmp->number; + } + if (here->BSIM4v3bNodePrime == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"body"); + if(error) return(error); + here->BSIM4v3bNodePrime = tmp->number; + } + if (here->BSIM4v3sbNode == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"sbody"); + if(error) return(error); + here->BSIM4v3sbNode = tmp->number; + } + } + else + here->BSIM4v3dbNode = here->BSIM4v3bNodePrime = here->BSIM4v3sbNode + = here->BSIM4v3bNode; + + /* NQS node */ + if ((here->BSIM4v3trnqsMod) && (here->BSIM4v3qNode == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v3name,"charge"); + if(error) return(error); + here->BSIM4v3qNode = tmp->number; + } + else + here->BSIM4v3qNode = 0; + +/* set Sparse Matrix Pointers + * macro to make elements with built-in out-of-memory test */ +#define TSTALLOC(ptr,first,second) \ +if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\ + return(E_NOMEM);\ +} + + TSTALLOC(BSIM4v3DPbpPtr, BSIM4v3dNodePrime, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3GPbpPtr, BSIM4v3gNodePrime, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3SPbpPtr, BSIM4v3sNodePrime, BSIM4v3bNodePrime) + + TSTALLOC(BSIM4v3BPdpPtr, BSIM4v3bNodePrime, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3BPgpPtr, BSIM4v3bNodePrime, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3BPspPtr, BSIM4v3bNodePrime, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3BPbpPtr, BSIM4v3bNodePrime, BSIM4v3bNodePrime) + + TSTALLOC(BSIM4v3DdPtr, BSIM4v3dNode, BSIM4v3dNode) + TSTALLOC(BSIM4v3GPgpPtr, BSIM4v3gNodePrime, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3SsPtr, BSIM4v3sNode, BSIM4v3sNode) + TSTALLOC(BSIM4v3DPdpPtr, BSIM4v3dNodePrime, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3SPspPtr, BSIM4v3sNodePrime, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3DdpPtr, BSIM4v3dNode, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3GPdpPtr, BSIM4v3gNodePrime, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3GPspPtr, BSIM4v3gNodePrime, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3SspPtr, BSIM4v3sNode, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3DPspPtr, BSIM4v3dNodePrime, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3DPdPtr, BSIM4v3dNodePrime, BSIM4v3dNode) + TSTALLOC(BSIM4v3DPgpPtr, BSIM4v3dNodePrime, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3SPgpPtr, BSIM4v3sNodePrime, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3SPsPtr, BSIM4v3sNodePrime, BSIM4v3sNode) + TSTALLOC(BSIM4v3SPdpPtr, BSIM4v3sNodePrime, BSIM4v3dNodePrime) + + TSTALLOC(BSIM4v3QqPtr, BSIM4v3qNode, BSIM4v3qNode) + TSTALLOC(BSIM4v3QbpPtr, BSIM4v3qNode, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3QdpPtr, BSIM4v3qNode, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3QspPtr, BSIM4v3qNode, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3QgpPtr, BSIM4v3qNode, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3DPqPtr, BSIM4v3dNodePrime, BSIM4v3qNode) + TSTALLOC(BSIM4v3SPqPtr, BSIM4v3sNodePrime, BSIM4v3qNode) + TSTALLOC(BSIM4v3GPqPtr, BSIM4v3gNodePrime, BSIM4v3qNode) + + if (here->BSIM4v3rgateMod != 0) + { TSTALLOC(BSIM4v3GEgePtr, BSIM4v3gNodeExt, BSIM4v3gNodeExt) + TSTALLOC(BSIM4v3GEgpPtr, BSIM4v3gNodeExt, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3GPgePtr, BSIM4v3gNodePrime, BSIM4v3gNodeExt) + TSTALLOC(BSIM4v3GEdpPtr, BSIM4v3gNodeExt, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3GEspPtr, BSIM4v3gNodeExt, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3GEbpPtr, BSIM4v3gNodeExt, BSIM4v3bNodePrime) + + TSTALLOC(BSIM4v3GMdpPtr, BSIM4v3gNodeMid, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3GMgpPtr, BSIM4v3gNodeMid, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3GMgmPtr, BSIM4v3gNodeMid, BSIM4v3gNodeMid) + TSTALLOC(BSIM4v3GMgePtr, BSIM4v3gNodeMid, BSIM4v3gNodeExt) + TSTALLOC(BSIM4v3GMspPtr, BSIM4v3gNodeMid, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3GMbpPtr, BSIM4v3gNodeMid, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3DPgmPtr, BSIM4v3dNodePrime, BSIM4v3gNodeMid) + TSTALLOC(BSIM4v3GPgmPtr, BSIM4v3gNodePrime, BSIM4v3gNodeMid) + TSTALLOC(BSIM4v3GEgmPtr, BSIM4v3gNodeExt, BSIM4v3gNodeMid) + TSTALLOC(BSIM4v3SPgmPtr, BSIM4v3sNodePrime, BSIM4v3gNodeMid) + TSTALLOC(BSIM4v3BPgmPtr, BSIM4v3bNodePrime, BSIM4v3gNodeMid) + } + + if (here->BSIM4v3rbodyMod) + { TSTALLOC(BSIM4v3DPdbPtr, BSIM4v3dNodePrime, BSIM4v3dbNode) + TSTALLOC(BSIM4v3SPsbPtr, BSIM4v3sNodePrime, BSIM4v3sbNode) + + TSTALLOC(BSIM4v3DBdpPtr, BSIM4v3dbNode, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3DBdbPtr, BSIM4v3dbNode, BSIM4v3dbNode) + TSTALLOC(BSIM4v3DBbpPtr, BSIM4v3dbNode, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3DBbPtr, BSIM4v3dbNode, BSIM4v3bNode) + + TSTALLOC(BSIM4v3BPdbPtr, BSIM4v3bNodePrime, BSIM4v3dbNode) + TSTALLOC(BSIM4v3BPbPtr, BSIM4v3bNodePrime, BSIM4v3bNode) + TSTALLOC(BSIM4v3BPsbPtr, BSIM4v3bNodePrime, BSIM4v3sbNode) + + TSTALLOC(BSIM4v3SBspPtr, BSIM4v3sbNode, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3SBbpPtr, BSIM4v3sbNode, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3SBbPtr, BSIM4v3sbNode, BSIM4v3bNode) + TSTALLOC(BSIM4v3SBsbPtr, BSIM4v3sbNode, BSIM4v3sbNode) + + TSTALLOC(BSIM4v3BdbPtr, BSIM4v3bNode, BSIM4v3dbNode) + TSTALLOC(BSIM4v3BbpPtr, BSIM4v3bNode, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3BsbPtr, BSIM4v3bNode, BSIM4v3sbNode) + TSTALLOC(BSIM4v3BbPtr, BSIM4v3bNode, BSIM4v3bNode) + } + + if (model->BSIM4v3rdsMod) + { TSTALLOC(BSIM4v3DgpPtr, BSIM4v3dNode, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3DspPtr, BSIM4v3dNode, BSIM4v3sNodePrime) + TSTALLOC(BSIM4v3DbpPtr, BSIM4v3dNode, BSIM4v3bNodePrime) + TSTALLOC(BSIM4v3SdpPtr, BSIM4v3sNode, BSIM4v3dNodePrime) + TSTALLOC(BSIM4v3SgpPtr, BSIM4v3sNode, BSIM4v3gNodePrime) + TSTALLOC(BSIM4v3SbpPtr, BSIM4v3sNode, BSIM4v3bNodePrime) + } + } + } + return(OK); +} + +int +BSIM4v3unsetup(inModel,ckt) + GENmodel *inModel; + CKTcircuit *ckt; +{ +#ifndef HAS_BATCHSIM + BSIM4v3model *model; + BSIM4v3instance *here; + + for (model = (BSIM4v3model *)inModel; model != NULL; + model = model->BSIM4v3nextModel) + { + for (here = model->BSIM4v3instances; here != NULL; + here=here->BSIM4v3nextInstance) + { + if (here->BSIM4v3dNodePrime + && here->BSIM4v3dNodePrime != here->BSIM4v3dNode) + { + CKTdltNNum(ckt, here->BSIM4v3dNodePrime); + here->BSIM4v3dNodePrime = 0; + } + if (here->BSIM4v3sNodePrime + && here->BSIM4v3sNodePrime != here->BSIM4v3sNode) + { + CKTdltNNum(ckt, here->BSIM4v3sNodePrime); + here->BSIM4v3sNodePrime = 0; + } + } + } +#endif + return OK; +} diff --git a/src/spicelib/devices/bsim4v3/b4v3temp.c b/src/spicelib/devices/bsim4v3/b4v3temp.c new file mode 100644 index 000000000..b701357fe --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3temp.c @@ -0,0 +1,1646 @@ +/**** BSIM4.3.0 Released by Xuemei (Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3temp.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include +#include +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "const.h" +#include "sperror.h" + +#define Kb 1.3806226e-23 +#define KboQ 8.617087e-5 +#define EPS0 8.85418e-12 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define Charge_q 1.60219e-19 +#define DELTA 1.0E-9 + +int +BSIM4v3DioIjthVjmEval(Nvtm, Ijth, Isb, XExpBV, Vjm) +double Nvtm, Ijth, Isb, XExpBV; +double *Vjm; +{ +double Tb, Tc, EVjmovNv; + + Tc = XExpBV; + Tb = 1.0 + Ijth / Isb - Tc; + EVjmovNv = 0.5 * (Tb + sqrt(Tb * Tb + 4.0 * Tc)); + *Vjm = Nvtm * log(EVjmovNv); + +return 0; +} + + +int +BSIM4v3temp(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v3model *model = (BSIM4v3model*) inModel; +BSIM4v3instance *here; +struct bsim4v3SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam; +double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni; +double T0, T1, T2, T3, T4, T5, T8, T9, Lnew, Wnew; +double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Dw, Dl, Vtm0, Tnom; +double dumPs, dumPd, dumAs, dumAd, PowWeffWr; +double DMCGeff, DMCIeff, DMDGeff; +double Nvtms, Nvtmd, SourceSatCurrent, DrainSatCurrent; +double T10; +double Inv_saref, Inv_sbref, Inv_sa, Inv_sb, rho, Ldrn, dvth0_lod; +double W_tmp, Inv_ODeff, OD_offset, dk2_lod, deta0_lod; + +int Size_Not_Found, i; + + /* loop through all the BSIM4v3 device models */ + for (; model != NULL; model = model->BSIM4v3nextModel) + { Temp = ckt->CKTtemp; + if (model->BSIM4v3SbulkJctPotential < 0.1) + { model->BSIM4v3SbulkJctPotential = 0.1; + fprintf(stderr, "Given pbs is less than 0.1. Pbs is set to 0.1.\n"); + } + if (model->BSIM4v3SsidewallJctPotential < 0.1) + { model->BSIM4v3SsidewallJctPotential = 0.1; + fprintf(stderr, "Given pbsws is less than 0.1. Pbsws is set to 0.1.\n"); + } + if (model->BSIM4v3SGatesidewallJctPotential < 0.1) + { model->BSIM4v3SGatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswgs is less than 0.1. Pbswgs is set to 0.1.\n"); + } + + if (model->BSIM4v3DbulkJctPotential < 0.1) + { model->BSIM4v3DbulkJctPotential = 0.1; + fprintf(stderr, "Given pbd is less than 0.1. Pbd is set to 0.1.\n"); + } + if (model->BSIM4v3DsidewallJctPotential < 0.1) + { model->BSIM4v3DsidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswd is less than 0.1. Pbswd is set to 0.1.\n"); + } + if (model->BSIM4v3DGatesidewallJctPotential < 0.1) + { model->BSIM4v3DGatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswgd is less than 0.1. Pbswgd is set to 0.1.\n"); + } + + if ((model->BSIM4v3toxeGiven) && (model->BSIM4v3toxpGiven) && (model->BSIM4v3dtoxGiven) + && (model->BSIM4v3toxe != (model->BSIM4v3toxp + model->BSIM4v3dtox))) + printf("Warning: toxe, toxp and dtox all given and toxe != toxp + dtox; dtox ignored.\n"); + else if ((model->BSIM4v3toxeGiven) && (!model->BSIM4v3toxpGiven)) + model->BSIM4v3toxp = model->BSIM4v3toxe - model->BSIM4v3dtox; + else if ((!model->BSIM4v3toxeGiven) && (model->BSIM4v3toxpGiven)) + model->BSIM4v3toxe = model->BSIM4v3toxp + model->BSIM4v3dtox; + + model->BSIM4v3coxe = model->BSIM4v3epsrox * EPS0 / model->BSIM4v3toxe; + model->BSIM4v3coxp = model->BSIM4v3epsrox * EPS0 / model->BSIM4v3toxp; + + if (!model->BSIM4v3cgdoGiven) + { if (model->BSIM4v3dlcGiven && (model->BSIM4v3dlc > 0.0)) + model->BSIM4v3cgdo = model->BSIM4v3dlc * model->BSIM4v3coxe + - model->BSIM4v3cgdl ; + else + model->BSIM4v3cgdo = 0.6 * model->BSIM4v3xj * model->BSIM4v3coxe; + } + if (!model->BSIM4v3cgsoGiven) + { if (model->BSIM4v3dlcGiven && (model->BSIM4v3dlc > 0.0)) + model->BSIM4v3cgso = model->BSIM4v3dlc * model->BSIM4v3coxe + - model->BSIM4v3cgsl ; + else + model->BSIM4v3cgso = 0.6 * model->BSIM4v3xj * model->BSIM4v3coxe; + } + if (!model->BSIM4v3cgboGiven) + model->BSIM4v3cgbo = 2.0 * model->BSIM4v3dwc * model->BSIM4v3coxe; + model->pSizeDependParamKnot = NULL; + pLastKnot = NULL; + + Tnom = model->BSIM4v3tnom; + TRatio = Temp / Tnom; + + model->BSIM4v3vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); + model->BSIM4v3factor1 = sqrt(EPSSI / (model->BSIM4v3epsrox * EPS0) + * model->BSIM4v3toxe); + + Vtm0 = KboQ * Tnom; + Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0); + ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) + * exp(21.5565981 - Eg0 / (2.0 * Vtm0)); + + model->BSIM4v3vtm = KboQ * Temp; + Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); + if (Temp != Tnom) + { T0 = Eg0 / Vtm0 - Eg / model->BSIM4v3vtm; + T1 = log(Temp / Tnom); + T2 = T0 + model->BSIM4v3SjctTempExponent * T1; + T3 = exp(T2 / model->BSIM4v3SjctEmissionCoeff); + model->BSIM4v3SjctTempSatCurDensity = model->BSIM4v3SjctSatCurDensity + * T3; + model->BSIM4v3SjctSidewallTempSatCurDensity + = model->BSIM4v3SjctSidewallSatCurDensity * T3; + model->BSIM4v3SjctGateSidewallTempSatCurDensity + = model->BSIM4v3SjctGateSidewallSatCurDensity * T3; + + T2 = T0 + model->BSIM4v3DjctTempExponent * T1; + T3 = exp(T2 / model->BSIM4v3DjctEmissionCoeff); + model->BSIM4v3DjctTempSatCurDensity = model->BSIM4v3DjctSatCurDensity + * T3; + model->BSIM4v3DjctSidewallTempSatCurDensity + = model->BSIM4v3DjctSidewallSatCurDensity * T3; + model->BSIM4v3DjctGateSidewallTempSatCurDensity + = model->BSIM4v3DjctGateSidewallSatCurDensity * T3; + } + else + { model->BSIM4v3SjctTempSatCurDensity = model->BSIM4v3SjctSatCurDensity; + model->BSIM4v3SjctSidewallTempSatCurDensity + = model->BSIM4v3SjctSidewallSatCurDensity; + model->BSIM4v3SjctGateSidewallTempSatCurDensity + = model->BSIM4v3SjctGateSidewallSatCurDensity; + model->BSIM4v3DjctTempSatCurDensity = model->BSIM4v3DjctSatCurDensity; + model->BSIM4v3DjctSidewallTempSatCurDensity + = model->BSIM4v3DjctSidewallSatCurDensity; + model->BSIM4v3DjctGateSidewallTempSatCurDensity + = model->BSIM4v3DjctGateSidewallSatCurDensity; + } + + if (model->BSIM4v3SjctTempSatCurDensity < 0.0) + model->BSIM4v3SjctTempSatCurDensity = 0.0; + if (model->BSIM4v3SjctSidewallTempSatCurDensity < 0.0) + model->BSIM4v3SjctSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v3SjctGateSidewallTempSatCurDensity < 0.0) + model->BSIM4v3SjctGateSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v3DjctTempSatCurDensity < 0.0) + model->BSIM4v3DjctTempSatCurDensity = 0.0; + if (model->BSIM4v3DjctSidewallTempSatCurDensity < 0.0) + model->BSIM4v3DjctSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v3DjctGateSidewallTempSatCurDensity < 0.0) + model->BSIM4v3DjctGateSidewallTempSatCurDensity = 0.0; + + /* Temperature dependence of D/B and S/B diode capacitance begins */ + delTemp = ckt->CKTtemp - model->BSIM4v3tnom; + T0 = model->BSIM4v3tcj * delTemp; + if (T0 >= -1.0) + { model->BSIM4v3SunitAreaTempJctCap = model->BSIM4v3SunitAreaJctCap *(1.0 + T0); /*bug_fix -JX */ + model->BSIM4v3DunitAreaTempJctCap = model->BSIM4v3DunitAreaJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v3SunitAreaJctCap > 0.0) + { model->BSIM4v3SunitAreaTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjs to be negative. Cjs is clamped to zero.\n"); + } + if (model->BSIM4v3DunitAreaJctCap > 0.0) + { model->BSIM4v3DunitAreaTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjd to be negative. Cjd is clamped to zero.\n"); + } + } + T0 = model->BSIM4v3tcjsw * delTemp; + if (T0 >= -1.0) + { model->BSIM4v3SunitLengthSidewallTempJctCap = model->BSIM4v3SunitLengthSidewallJctCap *(1.0 + T0); + model->BSIM4v3DunitLengthSidewallTempJctCap = model->BSIM4v3DunitLengthSidewallJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v3SunitLengthSidewallJctCap > 0.0) + { model->BSIM4v3SunitLengthSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjsws to be negative. Cjsws is clamped to zero.\n"); + } + if (model->BSIM4v3DunitLengthSidewallJctCap > 0.0) + { model->BSIM4v3DunitLengthSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswd to be negative. Cjswd is clamped to zero.\n"); + } + } + T0 = model->BSIM4v3tcjswg * delTemp; + if (T0 >= -1.0) + { model->BSIM4v3SunitLengthGateSidewallTempJctCap = model->BSIM4v3SunitLengthGateSidewallJctCap *(1.0 + T0); + model->BSIM4v3DunitLengthGateSidewallTempJctCap = model->BSIM4v3DunitLengthGateSidewallJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v3SunitLengthGateSidewallJctCap > 0.0) + { model->BSIM4v3SunitLengthGateSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswgs to be negative. Cjswgs is clamped to zero.\n"); + } + if (model->BSIM4v3DunitLengthGateSidewallJctCap > 0.0) + { model->BSIM4v3DunitLengthGateSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswgd to be negative. Cjswgd is clamped to zero.\n"); + } + } + + model->BSIM4v3PhiBS = model->BSIM4v3SbulkJctPotential + - model->BSIM4v3tpb * delTemp; + if (model->BSIM4v3PhiBS < 0.01) + { model->BSIM4v3PhiBS = 0.01; + fprintf(stderr, "Temperature effect has caused pbs to be less than 0.01. Pbs is clamped to 0.01.\n"); + } + model->BSIM4v3PhiBD = model->BSIM4v3DbulkJctPotential + - model->BSIM4v3tpb * delTemp; + if (model->BSIM4v3PhiBD < 0.01) + { model->BSIM4v3PhiBD = 0.01; + fprintf(stderr, "Temperature effect has caused pbd to be less than 0.01. Pbd is clamped to 0.01.\n"); + } + + model->BSIM4v3PhiBSWS = model->BSIM4v3SsidewallJctPotential + - model->BSIM4v3tpbsw * delTemp; + if (model->BSIM4v3PhiBSWS <= 0.01) + { model->BSIM4v3PhiBSWS = 0.01; + fprintf(stderr, "Temperature effect has caused pbsws to be less than 0.01. Pbsws is clamped to 0.01.\n"); + } + model->BSIM4v3PhiBSWD = model->BSIM4v3DsidewallJctPotential + - model->BSIM4v3tpbsw * delTemp; + if (model->BSIM4v3PhiBSWD <= 0.01) + { model->BSIM4v3PhiBSWD = 0.01; + fprintf(stderr, "Temperature effect has caused pbswd to be less than 0.01. Pbswd is clamped to 0.01.\n"); + } + + model->BSIM4v3PhiBSWGS = model->BSIM4v3SGatesidewallJctPotential + - model->BSIM4v3tpbswg * delTemp; + if (model->BSIM4v3PhiBSWGS <= 0.01) + { model->BSIM4v3PhiBSWGS = 0.01; + fprintf(stderr, "Temperature effect has caused pbswgs to be less than 0.01. Pbswgs is clamped to 0.01.\n"); + } + model->BSIM4v3PhiBSWGD = model->BSIM4v3DGatesidewallJctPotential + - model->BSIM4v3tpbswg * delTemp; + if (model->BSIM4v3PhiBSWGD <= 0.01) + { model->BSIM4v3PhiBSWGD = 0.01; + fprintf(stderr, "Temperature effect has caused pbswgd to be less than 0.01. Pbswgd is clamped to 0.01.\n"); + } /* End of junction capacitance */ + + + if (model->BSIM4v3ijthdfwd <= 0.0) + { model->BSIM4v3ijthdfwd = 0.1; + fprintf(stderr, "Ijthdfwd reset to %g.\n", model->BSIM4v3ijthdfwd); + } + if (model->BSIM4v3ijthsfwd <= 0.0) + { model->BSIM4v3ijthsfwd = 0.1; + fprintf(stderr, "Ijthsfwd reset to %g.\n", model->BSIM4v3ijthsfwd); + } + if (model->BSIM4v3ijthdrev <= 0.0) + { model->BSIM4v3ijthdrev = 0.1; + fprintf(stderr, "Ijthdrev reset to %g.\n", model->BSIM4v3ijthdrev); + } + if (model->BSIM4v3ijthsrev <= 0.0) + { model->BSIM4v3ijthsrev = 0.1; + fprintf(stderr, "Ijthsrev reset to %g.\n", model->BSIM4v3ijthsrev); + } + + if ((model->BSIM4v3xjbvd <= 0.0) && (model->BSIM4v3dioMod == 2)) + { model->BSIM4v3xjbvd = 1.0; + fprintf(stderr, "Xjbvd reset to %g.\n", model->BSIM4v3xjbvd); + } + else if ((model->BSIM4v3xjbvd < 0.0) && (model->BSIM4v3dioMod == 0)) + { model->BSIM4v3xjbvd = 1.0; + fprintf(stderr, "Xjbvd reset to %g.\n", model->BSIM4v3xjbvd); + } + + if (model->BSIM4v3bvd <= 0.0) + { model->BSIM4v3bvd = 10.0; + fprintf(stderr, "BVD reset to %g.\n", model->BSIM4v3bvd); + } + + if ((model->BSIM4v3xjbvs <= 0.0) && (model->BSIM4v3dioMod == 2)) + { model->BSIM4v3xjbvs = 1.0; + fprintf(stderr, "Xjbvs reset to %g.\n", model->BSIM4v3xjbvs); + } + else if ((model->BSIM4v3xjbvs < 0.0) && (model->BSIM4v3dioMod == 0)) + { model->BSIM4v3xjbvs = 1.0; + fprintf(stderr, "Xjbvs reset to %g.\n", model->BSIM4v3xjbvs); + } + + if (model->BSIM4v3bvs <= 0.0) + { model->BSIM4v3bvs = 10.0; + fprintf(stderr, "BVS reset to %g.\n", model->BSIM4v3bvs); + } + + + /* loop through all the instances of the model */ + for (here = model->BSIM4v3instances; here != NULL; + here = here->BSIM4v3nextInstance) + { if (here->BSIM4v3owner != ARCHme) continue; + pSizeDependParamKnot = model->pSizeDependParamKnot; + Size_Not_Found = 1; + while ((pSizeDependParamKnot != NULL) && Size_Not_Found) + { if ((here->BSIM4v3l == pSizeDependParamKnot->Length) + && (here->BSIM4v3w == pSizeDependParamKnot->Width) + && (here->BSIM4v3nf == pSizeDependParamKnot->NFinger)) + { Size_Not_Found = 0; + here->pParam = pSizeDependParamKnot; + pParam = here->pParam; /*bug-fix */ + } + else + { pLastKnot = pSizeDependParamKnot; + pSizeDependParamKnot = pSizeDependParamKnot->pNext; + } + } + + /* stress effect */ + Ldrn = here->BSIM4v3l; + + if (Size_Not_Found) + { pParam = (struct bsim4v3SizeDependParam *)malloc( + sizeof(struct bsim4v3SizeDependParam)); + if (pLastKnot == NULL) + model->pSizeDependParamKnot = pParam; + else + pLastKnot->pNext = pParam; + pParam->pNext = NULL; + here->pParam = pParam; + + pParam->Length = here->BSIM4v3l; + pParam->Width = here->BSIM4v3w; + pParam->NFinger = here->BSIM4v3nf; + Lnew = here->BSIM4v3l + model->BSIM4v3xl ; + Wnew = here->BSIM4v3w / here->BSIM4v3nf + model->BSIM4v3xw; + + T0 = pow(Lnew, model->BSIM4v3Lln); + T1 = pow(Wnew, model->BSIM4v3Lwn); + tmp1 = model->BSIM4v3Ll / T0 + model->BSIM4v3Lw / T1 + + model->BSIM4v3Lwl / (T0 * T1); + pParam->BSIM4v3dl = model->BSIM4v3Lint + tmp1; + tmp2 = model->BSIM4v3Llc / T0 + model->BSIM4v3Lwc / T1 + + model->BSIM4v3Lwlc / (T0 * T1); + pParam->BSIM4v3dlc = model->BSIM4v3dlc + tmp2; + pParam->BSIM4v3dlcig = model->BSIM4v3dlcig + tmp2; + + T2 = pow(Lnew, model->BSIM4v3Wln); + T3 = pow(Wnew, model->BSIM4v3Wwn); + tmp1 = model->BSIM4v3Wl / T2 + model->BSIM4v3Ww / T3 + + model->BSIM4v3Wwl / (T2 * T3); + pParam->BSIM4v3dw = model->BSIM4v3Wint + tmp1; + tmp2 = model->BSIM4v3Wlc / T2 + model->BSIM4v3Wwc / T3 + + model->BSIM4v3Wwlc / (T2 * T3); + pParam->BSIM4v3dwc = model->BSIM4v3dwc + tmp2; + pParam->BSIM4v3dwj = model->BSIM4v3dwj + tmp2; + + pParam->BSIM4v3leff = Lnew - 2.0 * pParam->BSIM4v3dl; + if (pParam->BSIM4v3leff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v3modName; + namarray[1] = here->BSIM4v3name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v3: mosfet %s, model %s: Effective channel length <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v3weff = Wnew - 2.0 * pParam->BSIM4v3dw; + if (pParam->BSIM4v3weff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v3modName; + namarray[1] = here->BSIM4v3name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v3: mosfet %s, model %s: Effective channel width <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v3leffCV = Lnew - 2.0 * pParam->BSIM4v3dlc; + if (pParam->BSIM4v3leffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v3modName; + namarray[1] = here->BSIM4v3name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v3: mosfet %s, model %s: Effective channel length for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v3weffCV = Wnew - 2.0 * pParam->BSIM4v3dwc; + if (pParam->BSIM4v3weffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v3modName; + namarray[1] = here->BSIM4v3name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v3: mosfet %s, model %s: Effective channel width for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v3weffCJ = Wnew - 2.0 * pParam->BSIM4v3dwj; + if (pParam->BSIM4v3weffCJ <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v3modName; + namarray[1] = here->BSIM4v3name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v3: mosfet %s, model %s: Effective channel width for S/D junctions <= 0", + namarray); + return(E_BADPARM); + } + + + if (model->BSIM4v3binUnit == 1) + { Inv_L = 1.0e-6 / pParam->BSIM4v3leff; + Inv_W = 1.0e-6 / pParam->BSIM4v3weff; + Inv_LW = 1.0e-12 / (pParam->BSIM4v3leff + * pParam->BSIM4v3weff); + } + else + { Inv_L = 1.0 / pParam->BSIM4v3leff; + Inv_W = 1.0 / pParam->BSIM4v3weff; + Inv_LW = 1.0 / (pParam->BSIM4v3leff + * pParam->BSIM4v3weff); + } + pParam->BSIM4v3cdsc = model->BSIM4v3cdsc + + model->BSIM4v3lcdsc * Inv_L + + model->BSIM4v3wcdsc * Inv_W + + model->BSIM4v3pcdsc * Inv_LW; + pParam->BSIM4v3cdscb = model->BSIM4v3cdscb + + model->BSIM4v3lcdscb * Inv_L + + model->BSIM4v3wcdscb * Inv_W + + model->BSIM4v3pcdscb * Inv_LW; + + pParam->BSIM4v3cdscd = model->BSIM4v3cdscd + + model->BSIM4v3lcdscd * Inv_L + + model->BSIM4v3wcdscd * Inv_W + + model->BSIM4v3pcdscd * Inv_LW; + + pParam->BSIM4v3cit = model->BSIM4v3cit + + model->BSIM4v3lcit * Inv_L + + model->BSIM4v3wcit * Inv_W + + model->BSIM4v3pcit * Inv_LW; + pParam->BSIM4v3nfactor = model->BSIM4v3nfactor + + model->BSIM4v3lnfactor * Inv_L + + model->BSIM4v3wnfactor * Inv_W + + model->BSIM4v3pnfactor * Inv_LW; + pParam->BSIM4v3xj = model->BSIM4v3xj + + model->BSIM4v3lxj * Inv_L + + model->BSIM4v3wxj * Inv_W + + model->BSIM4v3pxj * Inv_LW; + pParam->BSIM4v3vsat = model->BSIM4v3vsat + + model->BSIM4v3lvsat * Inv_L + + model->BSIM4v3wvsat * Inv_W + + model->BSIM4v3pvsat * Inv_LW; + pParam->BSIM4v3at = model->BSIM4v3at + + model->BSIM4v3lat * Inv_L + + model->BSIM4v3wat * Inv_W + + model->BSIM4v3pat * Inv_LW; + pParam->BSIM4v3a0 = model->BSIM4v3a0 + + model->BSIM4v3la0 * Inv_L + + model->BSIM4v3wa0 * Inv_W + + model->BSIM4v3pa0 * Inv_LW; + + pParam->BSIM4v3ags = model->BSIM4v3ags + + model->BSIM4v3lags * Inv_L + + model->BSIM4v3wags * Inv_W + + model->BSIM4v3pags * Inv_LW; + + pParam->BSIM4v3a1 = model->BSIM4v3a1 + + model->BSIM4v3la1 * Inv_L + + model->BSIM4v3wa1 * Inv_W + + model->BSIM4v3pa1 * Inv_LW; + pParam->BSIM4v3a2 = model->BSIM4v3a2 + + model->BSIM4v3la2 * Inv_L + + model->BSIM4v3wa2 * Inv_W + + model->BSIM4v3pa2 * Inv_LW; + pParam->BSIM4v3keta = model->BSIM4v3keta + + model->BSIM4v3lketa * Inv_L + + model->BSIM4v3wketa * Inv_W + + model->BSIM4v3pketa * Inv_LW; + pParam->BSIM4v3nsub = model->BSIM4v3nsub + + model->BSIM4v3lnsub * Inv_L + + model->BSIM4v3wnsub * Inv_W + + model->BSIM4v3pnsub * Inv_LW; + pParam->BSIM4v3ndep = model->BSIM4v3ndep + + model->BSIM4v3lndep * Inv_L + + model->BSIM4v3wndep * Inv_W + + model->BSIM4v3pndep * Inv_LW; + pParam->BSIM4v3nsd = model->BSIM4v3nsd + + model->BSIM4v3lnsd * Inv_L + + model->BSIM4v3wnsd * Inv_W + + model->BSIM4v3pnsd * Inv_LW; + pParam->BSIM4v3phin = model->BSIM4v3phin + + model->BSIM4v3lphin * Inv_L + + model->BSIM4v3wphin * Inv_W + + model->BSIM4v3pphin * Inv_LW; + pParam->BSIM4v3ngate = model->BSIM4v3ngate + + model->BSIM4v3lngate * Inv_L + + model->BSIM4v3wngate * Inv_W + + model->BSIM4v3pngate * Inv_LW; + pParam->BSIM4v3gamma1 = model->BSIM4v3gamma1 + + model->BSIM4v3lgamma1 * Inv_L + + model->BSIM4v3wgamma1 * Inv_W + + model->BSIM4v3pgamma1 * Inv_LW; + pParam->BSIM4v3gamma2 = model->BSIM4v3gamma2 + + model->BSIM4v3lgamma2 * Inv_L + + model->BSIM4v3wgamma2 * Inv_W + + model->BSIM4v3pgamma2 * Inv_LW; + pParam->BSIM4v3vbx = model->BSIM4v3vbx + + model->BSIM4v3lvbx * Inv_L + + model->BSIM4v3wvbx * Inv_W + + model->BSIM4v3pvbx * Inv_LW; + pParam->BSIM4v3vbm = model->BSIM4v3vbm + + model->BSIM4v3lvbm * Inv_L + + model->BSIM4v3wvbm * Inv_W + + model->BSIM4v3pvbm * Inv_LW; + pParam->BSIM4v3xt = model->BSIM4v3xt + + model->BSIM4v3lxt * Inv_L + + model->BSIM4v3wxt * Inv_W + + model->BSIM4v3pxt * Inv_LW; + pParam->BSIM4v3vfb = model->BSIM4v3vfb + + model->BSIM4v3lvfb * Inv_L + + model->BSIM4v3wvfb * Inv_W + + model->BSIM4v3pvfb * Inv_LW; + pParam->BSIM4v3k1 = model->BSIM4v3k1 + + model->BSIM4v3lk1 * Inv_L + + model->BSIM4v3wk1 * Inv_W + + model->BSIM4v3pk1 * Inv_LW; + pParam->BSIM4v3kt1 = model->BSIM4v3kt1 + + model->BSIM4v3lkt1 * Inv_L + + model->BSIM4v3wkt1 * Inv_W + + model->BSIM4v3pkt1 * Inv_LW; + pParam->BSIM4v3kt1l = model->BSIM4v3kt1l + + model->BSIM4v3lkt1l * Inv_L + + model->BSIM4v3wkt1l * Inv_W + + model->BSIM4v3pkt1l * Inv_LW; + pParam->BSIM4v3k2 = model->BSIM4v3k2 + + model->BSIM4v3lk2 * Inv_L + + model->BSIM4v3wk2 * Inv_W + + model->BSIM4v3pk2 * Inv_LW; + pParam->BSIM4v3kt2 = model->BSIM4v3kt2 + + model->BSIM4v3lkt2 * Inv_L + + model->BSIM4v3wkt2 * Inv_W + + model->BSIM4v3pkt2 * Inv_LW; + pParam->BSIM4v3k3 = model->BSIM4v3k3 + + model->BSIM4v3lk3 * Inv_L + + model->BSIM4v3wk3 * Inv_W + + model->BSIM4v3pk3 * Inv_LW; + pParam->BSIM4v3k3b = model->BSIM4v3k3b + + model->BSIM4v3lk3b * Inv_L + + model->BSIM4v3wk3b * Inv_W + + model->BSIM4v3pk3b * Inv_LW; + pParam->BSIM4v3w0 = model->BSIM4v3w0 + + model->BSIM4v3lw0 * Inv_L + + model->BSIM4v3ww0 * Inv_W + + model->BSIM4v3pw0 * Inv_LW; + pParam->BSIM4v3lpe0 = model->BSIM4v3lpe0 + + model->BSIM4v3llpe0 * Inv_L + + model->BSIM4v3wlpe0 * Inv_W + + model->BSIM4v3plpe0 * Inv_LW; + pParam->BSIM4v3lpeb = model->BSIM4v3lpeb + + model->BSIM4v3llpeb * Inv_L + + model->BSIM4v3wlpeb * Inv_W + + model->BSIM4v3plpeb * Inv_LW; + pParam->BSIM4v3dvtp0 = model->BSIM4v3dvtp0 + + model->BSIM4v3ldvtp0 * Inv_L + + model->BSIM4v3wdvtp0 * Inv_W + + model->BSIM4v3pdvtp0 * Inv_LW; + pParam->BSIM4v3dvtp1 = model->BSIM4v3dvtp1 + + model->BSIM4v3ldvtp1 * Inv_L + + model->BSIM4v3wdvtp1 * Inv_W + + model->BSIM4v3pdvtp1 * Inv_LW; + pParam->BSIM4v3dvt0 = model->BSIM4v3dvt0 + + model->BSIM4v3ldvt0 * Inv_L + + model->BSIM4v3wdvt0 * Inv_W + + model->BSIM4v3pdvt0 * Inv_LW; + pParam->BSIM4v3dvt1 = model->BSIM4v3dvt1 + + model->BSIM4v3ldvt1 * Inv_L + + model->BSIM4v3wdvt1 * Inv_W + + model->BSIM4v3pdvt1 * Inv_LW; + pParam->BSIM4v3dvt2 = model->BSIM4v3dvt2 + + model->BSIM4v3ldvt2 * Inv_L + + model->BSIM4v3wdvt2 * Inv_W + + model->BSIM4v3pdvt2 * Inv_LW; + pParam->BSIM4v3dvt0w = model->BSIM4v3dvt0w + + model->BSIM4v3ldvt0w * Inv_L + + model->BSIM4v3wdvt0w * Inv_W + + model->BSIM4v3pdvt0w * Inv_LW; + pParam->BSIM4v3dvt1w = model->BSIM4v3dvt1w + + model->BSIM4v3ldvt1w * Inv_L + + model->BSIM4v3wdvt1w * Inv_W + + model->BSIM4v3pdvt1w * Inv_LW; + pParam->BSIM4v3dvt2w = model->BSIM4v3dvt2w + + model->BSIM4v3ldvt2w * Inv_L + + model->BSIM4v3wdvt2w * Inv_W + + model->BSIM4v3pdvt2w * Inv_LW; + pParam->BSIM4v3drout = model->BSIM4v3drout + + model->BSIM4v3ldrout * Inv_L + + model->BSIM4v3wdrout * Inv_W + + model->BSIM4v3pdrout * Inv_LW; + pParam->BSIM4v3dsub = model->BSIM4v3dsub + + model->BSIM4v3ldsub * Inv_L + + model->BSIM4v3wdsub * Inv_W + + model->BSIM4v3pdsub * Inv_LW; + pParam->BSIM4v3vth0 = model->BSIM4v3vth0 + + model->BSIM4v3lvth0 * Inv_L + + model->BSIM4v3wvth0 * Inv_W + + model->BSIM4v3pvth0 * Inv_LW; + pParam->BSIM4v3ua = model->BSIM4v3ua + + model->BSIM4v3lua * Inv_L + + model->BSIM4v3wua * Inv_W + + model->BSIM4v3pua * Inv_LW; + pParam->BSIM4v3ua1 = model->BSIM4v3ua1 + + model->BSIM4v3lua1 * Inv_L + + model->BSIM4v3wua1 * Inv_W + + model->BSIM4v3pua1 * Inv_LW; + pParam->BSIM4v3ub = model->BSIM4v3ub + + model->BSIM4v3lub * Inv_L + + model->BSIM4v3wub * Inv_W + + model->BSIM4v3pub * Inv_LW; + pParam->BSIM4v3ub1 = model->BSIM4v3ub1 + + model->BSIM4v3lub1 * Inv_L + + model->BSIM4v3wub1 * Inv_W + + model->BSIM4v3pub1 * Inv_LW; + pParam->BSIM4v3uc = model->BSIM4v3uc + + model->BSIM4v3luc * Inv_L + + model->BSIM4v3wuc * Inv_W + + model->BSIM4v3puc * Inv_LW; + pParam->BSIM4v3uc1 = model->BSIM4v3uc1 + + model->BSIM4v3luc1 * Inv_L + + model->BSIM4v3wuc1 * Inv_W + + model->BSIM4v3puc1 * Inv_LW; + pParam->BSIM4v3eu = model->BSIM4v3eu + + model->BSIM4v3leu * Inv_L + + model->BSIM4v3weu * Inv_W + + model->BSIM4v3peu * Inv_LW; + pParam->BSIM4v3u0 = model->BSIM4v3u0 + + model->BSIM4v3lu0 * Inv_L + + model->BSIM4v3wu0 * Inv_W + + model->BSIM4v3pu0 * Inv_LW; + pParam->BSIM4v3ute = model->BSIM4v3ute + + model->BSIM4v3lute * Inv_L + + model->BSIM4v3wute * Inv_W + + model->BSIM4v3pute * Inv_LW; + pParam->BSIM4v3voff = model->BSIM4v3voff + + model->BSIM4v3lvoff * Inv_L + + model->BSIM4v3wvoff * Inv_W + + model->BSIM4v3pvoff * Inv_LW; + pParam->BSIM4v3minv = model->BSIM4v3minv + + model->BSIM4v3lminv * Inv_L + + model->BSIM4v3wminv * Inv_W + + model->BSIM4v3pminv * Inv_LW; + pParam->BSIM4v3fprout = model->BSIM4v3fprout + + model->BSIM4v3lfprout * Inv_L + + model->BSIM4v3wfprout * Inv_W + + model->BSIM4v3pfprout * Inv_LW; + pParam->BSIM4v3pdits = model->BSIM4v3pdits + + model->BSIM4v3lpdits * Inv_L + + model->BSIM4v3wpdits * Inv_W + + model->BSIM4v3ppdits * Inv_LW; + pParam->BSIM4v3pditsd = model->BSIM4v3pditsd + + model->BSIM4v3lpditsd * Inv_L + + model->BSIM4v3wpditsd * Inv_W + + model->BSIM4v3ppditsd * Inv_LW; + pParam->BSIM4v3delta = model->BSIM4v3delta + + model->BSIM4v3ldelta * Inv_L + + model->BSIM4v3wdelta * Inv_W + + model->BSIM4v3pdelta * Inv_LW; + pParam->BSIM4v3rdsw = model->BSIM4v3rdsw + + model->BSIM4v3lrdsw * Inv_L + + model->BSIM4v3wrdsw * Inv_W + + model->BSIM4v3prdsw * Inv_LW; + pParam->BSIM4v3rdw = model->BSIM4v3rdw + + model->BSIM4v3lrdw * Inv_L + + model->BSIM4v3wrdw * Inv_W + + model->BSIM4v3prdw * Inv_LW; + pParam->BSIM4v3rsw = model->BSIM4v3rsw + + model->BSIM4v3lrsw * Inv_L + + model->BSIM4v3wrsw * Inv_W + + model->BSIM4v3prsw * Inv_LW; + pParam->BSIM4v3prwg = model->BSIM4v3prwg + + model->BSIM4v3lprwg * Inv_L + + model->BSIM4v3wprwg * Inv_W + + model->BSIM4v3pprwg * Inv_LW; + pParam->BSIM4v3prwb = model->BSIM4v3prwb + + model->BSIM4v3lprwb * Inv_L + + model->BSIM4v3wprwb * Inv_W + + model->BSIM4v3pprwb * Inv_LW; + pParam->BSIM4v3prt = model->BSIM4v3prt + + model->BSIM4v3lprt * Inv_L + + model->BSIM4v3wprt * Inv_W + + model->BSIM4v3pprt * Inv_LW; + pParam->BSIM4v3eta0 = model->BSIM4v3eta0 + + model->BSIM4v3leta0 * Inv_L + + model->BSIM4v3weta0 * Inv_W + + model->BSIM4v3peta0 * Inv_LW; + pParam->BSIM4v3etab = model->BSIM4v3etab + + model->BSIM4v3letab * Inv_L + + model->BSIM4v3wetab * Inv_W + + model->BSIM4v3petab * Inv_LW; + pParam->BSIM4v3pclm = model->BSIM4v3pclm + + model->BSIM4v3lpclm * Inv_L + + model->BSIM4v3wpclm * Inv_W + + model->BSIM4v3ppclm * Inv_LW; + pParam->BSIM4v3pdibl1 = model->BSIM4v3pdibl1 + + model->BSIM4v3lpdibl1 * Inv_L + + model->BSIM4v3wpdibl1 * Inv_W + + model->BSIM4v3ppdibl1 * Inv_LW; + pParam->BSIM4v3pdibl2 = model->BSIM4v3pdibl2 + + model->BSIM4v3lpdibl2 * Inv_L + + model->BSIM4v3wpdibl2 * Inv_W + + model->BSIM4v3ppdibl2 * Inv_LW; + pParam->BSIM4v3pdiblb = model->BSIM4v3pdiblb + + model->BSIM4v3lpdiblb * Inv_L + + model->BSIM4v3wpdiblb * Inv_W + + model->BSIM4v3ppdiblb * Inv_LW; + pParam->BSIM4v3pscbe1 = model->BSIM4v3pscbe1 + + model->BSIM4v3lpscbe1 * Inv_L + + model->BSIM4v3wpscbe1 * Inv_W + + model->BSIM4v3ppscbe1 * Inv_LW; + pParam->BSIM4v3pscbe2 = model->BSIM4v3pscbe2 + + model->BSIM4v3lpscbe2 * Inv_L + + model->BSIM4v3wpscbe2 * Inv_W + + model->BSIM4v3ppscbe2 * Inv_LW; + pParam->BSIM4v3pvag = model->BSIM4v3pvag + + model->BSIM4v3lpvag * Inv_L + + model->BSIM4v3wpvag * Inv_W + + model->BSIM4v3ppvag * Inv_LW; + pParam->BSIM4v3wr = model->BSIM4v3wr + + model->BSIM4v3lwr * Inv_L + + model->BSIM4v3wwr * Inv_W + + model->BSIM4v3pwr * Inv_LW; + pParam->BSIM4v3dwg = model->BSIM4v3dwg + + model->BSIM4v3ldwg * Inv_L + + model->BSIM4v3wdwg * Inv_W + + model->BSIM4v3pdwg * Inv_LW; + pParam->BSIM4v3dwb = model->BSIM4v3dwb + + model->BSIM4v3ldwb * Inv_L + + model->BSIM4v3wdwb * Inv_W + + model->BSIM4v3pdwb * Inv_LW; + pParam->BSIM4v3b0 = model->BSIM4v3b0 + + model->BSIM4v3lb0 * Inv_L + + model->BSIM4v3wb0 * Inv_W + + model->BSIM4v3pb0 * Inv_LW; + pParam->BSIM4v3b1 = model->BSIM4v3b1 + + model->BSIM4v3lb1 * Inv_L + + model->BSIM4v3wb1 * Inv_W + + model->BSIM4v3pb1 * Inv_LW; + pParam->BSIM4v3alpha0 = model->BSIM4v3alpha0 + + model->BSIM4v3lalpha0 * Inv_L + + model->BSIM4v3walpha0 * Inv_W + + model->BSIM4v3palpha0 * Inv_LW; + pParam->BSIM4v3alpha1 = model->BSIM4v3alpha1 + + model->BSIM4v3lalpha1 * Inv_L + + model->BSIM4v3walpha1 * Inv_W + + model->BSIM4v3palpha1 * Inv_LW; + pParam->BSIM4v3beta0 = model->BSIM4v3beta0 + + model->BSIM4v3lbeta0 * Inv_L + + model->BSIM4v3wbeta0 * Inv_W + + model->BSIM4v3pbeta0 * Inv_LW; + pParam->BSIM4v3agidl = model->BSIM4v3agidl + + model->BSIM4v3lagidl * Inv_L + + model->BSIM4v3wagidl * Inv_W + + model->BSIM4v3pagidl * Inv_LW; + pParam->BSIM4v3bgidl = model->BSIM4v3bgidl + + model->BSIM4v3lbgidl * Inv_L + + model->BSIM4v3wbgidl * Inv_W + + model->BSIM4v3pbgidl * Inv_LW; + pParam->BSIM4v3cgidl = model->BSIM4v3cgidl + + model->BSIM4v3lcgidl * Inv_L + + model->BSIM4v3wcgidl * Inv_W + + model->BSIM4v3pcgidl * Inv_LW; + pParam->BSIM4v3egidl = model->BSIM4v3egidl + + model->BSIM4v3legidl * Inv_L + + model->BSIM4v3wegidl * Inv_W + + model->BSIM4v3pegidl * Inv_LW; + pParam->BSIM4v3aigc = model->BSIM4v3aigc + + model->BSIM4v3laigc * Inv_L + + model->BSIM4v3waigc * Inv_W + + model->BSIM4v3paigc * Inv_LW; + pParam->BSIM4v3bigc = model->BSIM4v3bigc + + model->BSIM4v3lbigc * Inv_L + + model->BSIM4v3wbigc * Inv_W + + model->BSIM4v3pbigc * Inv_LW; + pParam->BSIM4v3cigc = model->BSIM4v3cigc + + model->BSIM4v3lcigc * Inv_L + + model->BSIM4v3wcigc * Inv_W + + model->BSIM4v3pcigc * Inv_LW; + pParam->BSIM4v3aigsd = model->BSIM4v3aigsd + + model->BSIM4v3laigsd * Inv_L + + model->BSIM4v3waigsd * Inv_W + + model->BSIM4v3paigsd * Inv_LW; + pParam->BSIM4v3bigsd = model->BSIM4v3bigsd + + model->BSIM4v3lbigsd * Inv_L + + model->BSIM4v3wbigsd * Inv_W + + model->BSIM4v3pbigsd * Inv_LW; + pParam->BSIM4v3cigsd = model->BSIM4v3cigsd + + model->BSIM4v3lcigsd * Inv_L + + model->BSIM4v3wcigsd * Inv_W + + model->BSIM4v3pcigsd * Inv_LW; + pParam->BSIM4v3aigbacc = model->BSIM4v3aigbacc + + model->BSIM4v3laigbacc * Inv_L + + model->BSIM4v3waigbacc * Inv_W + + model->BSIM4v3paigbacc * Inv_LW; + pParam->BSIM4v3bigbacc = model->BSIM4v3bigbacc + + model->BSIM4v3lbigbacc * Inv_L + + model->BSIM4v3wbigbacc * Inv_W + + model->BSIM4v3pbigbacc * Inv_LW; + pParam->BSIM4v3cigbacc = model->BSIM4v3cigbacc + + model->BSIM4v3lcigbacc * Inv_L + + model->BSIM4v3wcigbacc * Inv_W + + model->BSIM4v3pcigbacc * Inv_LW; + pParam->BSIM4v3aigbinv = model->BSIM4v3aigbinv + + model->BSIM4v3laigbinv * Inv_L + + model->BSIM4v3waigbinv * Inv_W + + model->BSIM4v3paigbinv * Inv_LW; + pParam->BSIM4v3bigbinv = model->BSIM4v3bigbinv + + model->BSIM4v3lbigbinv * Inv_L + + model->BSIM4v3wbigbinv * Inv_W + + model->BSIM4v3pbigbinv * Inv_LW; + pParam->BSIM4v3cigbinv = model->BSIM4v3cigbinv + + model->BSIM4v3lcigbinv * Inv_L + + model->BSIM4v3wcigbinv * Inv_W + + model->BSIM4v3pcigbinv * Inv_LW; + pParam->BSIM4v3nigc = model->BSIM4v3nigc + + model->BSIM4v3lnigc * Inv_L + + model->BSIM4v3wnigc * Inv_W + + model->BSIM4v3pnigc * Inv_LW; + pParam->BSIM4v3nigbacc = model->BSIM4v3nigbacc + + model->BSIM4v3lnigbacc * Inv_L + + model->BSIM4v3wnigbacc * Inv_W + + model->BSIM4v3pnigbacc * Inv_LW; + pParam->BSIM4v3nigbinv = model->BSIM4v3nigbinv + + model->BSIM4v3lnigbinv * Inv_L + + model->BSIM4v3wnigbinv * Inv_W + + model->BSIM4v3pnigbinv * Inv_LW; + pParam->BSIM4v3ntox = model->BSIM4v3ntox + + model->BSIM4v3lntox * Inv_L + + model->BSIM4v3wntox * Inv_W + + model->BSIM4v3pntox * Inv_LW; + pParam->BSIM4v3eigbinv = model->BSIM4v3eigbinv + + model->BSIM4v3leigbinv * Inv_L + + model->BSIM4v3weigbinv * Inv_W + + model->BSIM4v3peigbinv * Inv_LW; + pParam->BSIM4v3pigcd = model->BSIM4v3pigcd + + model->BSIM4v3lpigcd * Inv_L + + model->BSIM4v3wpigcd * Inv_W + + model->BSIM4v3ppigcd * Inv_LW; + pParam->BSIM4v3poxedge = model->BSIM4v3poxedge + + model->BSIM4v3lpoxedge * Inv_L + + model->BSIM4v3wpoxedge * Inv_W + + model->BSIM4v3ppoxedge * Inv_LW; + pParam->BSIM4v3xrcrg1 = model->BSIM4v3xrcrg1 + + model->BSIM4v3lxrcrg1 * Inv_L + + model->BSIM4v3wxrcrg1 * Inv_W + + model->BSIM4v3pxrcrg1 * Inv_LW; + pParam->BSIM4v3xrcrg2 = model->BSIM4v3xrcrg2 + + model->BSIM4v3lxrcrg2 * Inv_L + + model->BSIM4v3wxrcrg2 * Inv_W + + model->BSIM4v3pxrcrg2 * Inv_LW; + pParam->BSIM4v3lambda = model->BSIM4v3lambda + + model->BSIM4v3llambda * Inv_L + + model->BSIM4v3wlambda * Inv_W + + model->BSIM4v3plambda * Inv_LW; + pParam->BSIM4v3vtl = model->BSIM4v3vtl + + model->BSIM4v3lvtl * Inv_L + + model->BSIM4v3wvtl * Inv_W + + model->BSIM4v3pvtl * Inv_LW; + pParam->BSIM4v3xn = model->BSIM4v3xn + + model->BSIM4v3lxn * Inv_L + + model->BSIM4v3wxn * Inv_W + + model->BSIM4v3pxn * Inv_LW; + + pParam->BSIM4v3cgsl = model->BSIM4v3cgsl + + model->BSIM4v3lcgsl * Inv_L + + model->BSIM4v3wcgsl * Inv_W + + model->BSIM4v3pcgsl * Inv_LW; + pParam->BSIM4v3cgdl = model->BSIM4v3cgdl + + model->BSIM4v3lcgdl * Inv_L + + model->BSIM4v3wcgdl * Inv_W + + model->BSIM4v3pcgdl * Inv_LW; + pParam->BSIM4v3ckappas = model->BSIM4v3ckappas + + model->BSIM4v3lckappas * Inv_L + + model->BSIM4v3wckappas * Inv_W + + model->BSIM4v3pckappas * Inv_LW; + pParam->BSIM4v3ckappad = model->BSIM4v3ckappad + + model->BSIM4v3lckappad * Inv_L + + model->BSIM4v3wckappad * Inv_W + + model->BSIM4v3pckappad * Inv_LW; + pParam->BSIM4v3cf = model->BSIM4v3cf + + model->BSIM4v3lcf * Inv_L + + model->BSIM4v3wcf * Inv_W + + model->BSIM4v3pcf * Inv_LW; + pParam->BSIM4v3clc = model->BSIM4v3clc + + model->BSIM4v3lclc * Inv_L + + model->BSIM4v3wclc * Inv_W + + model->BSIM4v3pclc * Inv_LW; + pParam->BSIM4v3cle = model->BSIM4v3cle + + model->BSIM4v3lcle * Inv_L + + model->BSIM4v3wcle * Inv_W + + model->BSIM4v3pcle * Inv_LW; + pParam->BSIM4v3vfbcv = model->BSIM4v3vfbcv + + model->BSIM4v3lvfbcv * Inv_L + + model->BSIM4v3wvfbcv * Inv_W + + model->BSIM4v3pvfbcv * Inv_LW; + pParam->BSIM4v3acde = model->BSIM4v3acde + + model->BSIM4v3lacde * Inv_L + + model->BSIM4v3wacde * Inv_W + + model->BSIM4v3pacde * Inv_LW; + pParam->BSIM4v3moin = model->BSIM4v3moin + + model->BSIM4v3lmoin * Inv_L + + model->BSIM4v3wmoin * Inv_W + + model->BSIM4v3pmoin * Inv_LW; + pParam->BSIM4v3noff = model->BSIM4v3noff + + model->BSIM4v3lnoff * Inv_L + + model->BSIM4v3wnoff * Inv_W + + model->BSIM4v3pnoff * Inv_LW; + pParam->BSIM4v3voffcv = model->BSIM4v3voffcv + + model->BSIM4v3lvoffcv * Inv_L + + model->BSIM4v3wvoffcv * Inv_W + + model->BSIM4v3pvoffcv * Inv_LW; + + pParam->BSIM4v3abulkCVfactor = 1.0 + pow((pParam->BSIM4v3clc + / pParam->BSIM4v3leffCV), + pParam->BSIM4v3cle); + + T0 = (TRatio - 1.0); + + PowWeffWr = pow(pParam->BSIM4v3weffCJ * 1.0e6, pParam->BSIM4v3wr) * here->BSIM4v3nf; + + T1 = T2 = T3 = T4 = 0.0; + if(model->BSIM4v3tempMod == 0) { + pParam->BSIM4v3ua = pParam->BSIM4v3ua + pParam->BSIM4v3ua1 * T0; + pParam->BSIM4v3ub = pParam->BSIM4v3ub + pParam->BSIM4v3ub1 * T0; + pParam->BSIM4v3uc = pParam->BSIM4v3uc + pParam->BSIM4v3uc1 * T0; + pParam->BSIM4v3vsattemp = pParam->BSIM4v3vsat - pParam->BSIM4v3at * T0; + T10 = pParam->BSIM4v3prt * T0; + if(model->BSIM4v3rdsMod) { + /* External Rd(V) */ + T1 = pParam->BSIM4v3rdw + T10; + T2 = model->BSIM4v3rdwmin + T10; + /* External Rs(V) */ + T3 = pParam->BSIM4v3rsw + T10; + T4 = model->BSIM4v3rswmin + T10; + } + /* Internal Rds(V) in IV */ + pParam->BSIM4v3rds0 = (pParam->BSIM4v3rdsw + T10) + * here->BSIM4v3nf / PowWeffWr; + pParam->BSIM4v3rdswmin = (model->BSIM4v3rdswmin + T10) + * here->BSIM4v3nf / PowWeffWr; + } else { /* tempMod = 1 */ + pParam->BSIM4v3ua = pParam->BSIM4v3ua * (1.0 + pParam->BSIM4v3ua1 * delTemp) ; + pParam->BSIM4v3ub = pParam->BSIM4v3ub * (1.0 + pParam->BSIM4v3ub1 * delTemp); + pParam->BSIM4v3uc = pParam->BSIM4v3uc * (1.0 + pParam->BSIM4v3uc1 * delTemp); + pParam->BSIM4v3vsattemp = pParam->BSIM4v3vsat * (1.0 - pParam->BSIM4v3at * delTemp); + T10 = 1.0 + pParam->BSIM4v3prt * delTemp; + if(model->BSIM4v3rdsMod) { + /* External Rd(V) */ + T1 = pParam->BSIM4v3rdw * T10; + T2 = model->BSIM4v3rdwmin * T10; + /* External Rs(V) */ + T3 = pParam->BSIM4v3rsw * T10; + T4 = model->BSIM4v3rswmin * T10; + } + /* Internal Rds(V) in IV */ + pParam->BSIM4v3rds0 = pParam->BSIM4v3rdsw * T10 * here->BSIM4v3nf / PowWeffWr; + pParam->BSIM4v3rdswmin = model->BSIM4v3rdswmin * T10 * here->BSIM4v3nf / PowWeffWr; + } + if (T1 < 0.0) + { T1 = 0.0; + printf("Warning: Rdw at current temperature is negative; set to 0.\n"); + } + if (T2 < 0.0) + { T2 = 0.0; + printf("Warning: Rdwmin at current temperature is negative; set to 0.\n"); + } + pParam->BSIM4v3rd0 = T1 / PowWeffWr; + pParam->BSIM4v3rdwmin = T2 / PowWeffWr; + if (T3 < 0.0) + { T3 = 0.0; + printf("Warning: Rsw at current temperature is negative; set to 0.\n"); + } + if (T4 < 0.0) + { T4 = 0.0; + printf("Warning: Rswmin at current temperature is negative; set to 0.\n"); + } + pParam->BSIM4v3rs0 = T3 / PowWeffWr; + pParam->BSIM4v3rswmin = T4 / PowWeffWr; + + if (pParam->BSIM4v3u0 > 1.0) + pParam->BSIM4v3u0 = pParam->BSIM4v3u0 / 1.0e4; + + pParam->BSIM4v3u0temp = pParam->BSIM4v3u0 + * pow(TRatio, pParam->BSIM4v3ute); + if (pParam->BSIM4v3eu < 0.0) + { pParam->BSIM4v3eu = 0.0; + printf("Warning: eu has been negative; reset to 0.0.\n"); + } + + /* Source End Velocity Limit */ + if((model->BSIM4v3vtlGiven) && (model->BSIM4v3vtl > 0.0) ) + { + if(model->BSIM4v3lc < 0.0) pParam->BSIM4v3lc = 0.0; + else pParam->BSIM4v3lc = model->BSIM4v3lc ; + T0 = pParam->BSIM4v3leff / (pParam->BSIM4v3xn * pParam->BSIM4v3leff + pParam->BSIM4v3lc); + pParam->BSIM4v3tfactor = (1.0 - T0) / (1.0 + T0 ); + } + + pParam->BSIM4v3cgdo = (model->BSIM4v3cgdo + pParam->BSIM4v3cf) + * pParam->BSIM4v3weffCV; + pParam->BSIM4v3cgso = (model->BSIM4v3cgso + pParam->BSIM4v3cf) + * pParam->BSIM4v3weffCV; + pParam->BSIM4v3cgbo = model->BSIM4v3cgbo * pParam->BSIM4v3leffCV * here->BSIM4v3nf; + + if (!model->BSIM4v3ndepGiven && model->BSIM4v3gamma1Given) + { T0 = pParam->BSIM4v3gamma1 * model->BSIM4v3coxe; + pParam->BSIM4v3ndep = 3.01248e22 * T0 * T0; + } + + pParam->BSIM4v3phi = Vtm0 * log(pParam->BSIM4v3ndep / ni) + + pParam->BSIM4v3phin + 0.4; + + pParam->BSIM4v3sqrtPhi = sqrt(pParam->BSIM4v3phi); + pParam->BSIM4v3phis3 = pParam->BSIM4v3sqrtPhi * pParam->BSIM4v3phi; + + pParam->BSIM4v3Xdep0 = sqrt(2.0 * EPSSI / (Charge_q + * pParam->BSIM4v3ndep * 1.0e6)) + * pParam->BSIM4v3sqrtPhi; + pParam->BSIM4v3sqrtXdep0 = sqrt(pParam->BSIM4v3Xdep0); + pParam->BSIM4v3litl = sqrt(3.0 * pParam->BSIM4v3xj + * model->BSIM4v3toxe); + pParam->BSIM4v3vbi = Vtm0 * log(pParam->BSIM4v3nsd + * pParam->BSIM4v3ndep / (ni * ni)); + + if (pParam->BSIM4v3ngate > 0.0) + { pParam->BSIM4v3vfbsd = Vtm0 * log(pParam->BSIM4v3ngate + / pParam->BSIM4v3nsd); + } + else + pParam->BSIM4v3vfbsd = 0.0; + + pParam->BSIM4v3cdep0 = sqrt(Charge_q * EPSSI + * pParam->BSIM4v3ndep * 1.0e6 / 2.0 + / pParam->BSIM4v3phi); + + pParam->BSIM4v3ToxRatio = exp(pParam->BSIM4v3ntox + * log(model->BSIM4v3toxref / model->BSIM4v3toxe)) + / model->BSIM4v3toxe / model->BSIM4v3toxe; + pParam->BSIM4v3ToxRatioEdge = exp(pParam->BSIM4v3ntox + * log(model->BSIM4v3toxref + / (model->BSIM4v3toxe * pParam->BSIM4v3poxedge))) + / model->BSIM4v3toxe / model->BSIM4v3toxe + / pParam->BSIM4v3poxedge / pParam->BSIM4v3poxedge; + pParam->BSIM4v3Aechvb = (model->BSIM4v3type == NMOS) ? 4.97232e-7 : 3.42537e-7; + pParam->BSIM4v3Bechvb = (model->BSIM4v3type == NMOS) ? 7.45669e11 : 1.16645e12; + pParam->BSIM4v3AechvbEdge = pParam->BSIM4v3Aechvb * pParam->BSIM4v3weff + * pParam->BSIM4v3dlcig * pParam->BSIM4v3ToxRatioEdge; + pParam->BSIM4v3BechvbEdge = -pParam->BSIM4v3Bechvb + * model->BSIM4v3toxe * pParam->BSIM4v3poxedge; + pParam->BSIM4v3Aechvb *= pParam->BSIM4v3weff * pParam->BSIM4v3leff + * pParam->BSIM4v3ToxRatio; + pParam->BSIM4v3Bechvb *= -model->BSIM4v3toxe; + + + pParam->BSIM4v3mstar = 0.5 + atan(pParam->BSIM4v3minv) / PI; + pParam->BSIM4v3voffcbn = pParam->BSIM4v3voff + model->BSIM4v3voffl / pParam->BSIM4v3leff; + + pParam->BSIM4v3ldeb = sqrt(EPSSI * Vtm0 / (Charge_q + * pParam->BSIM4v3ndep * 1.0e6)) / 3.0; + pParam->BSIM4v3acde *= pow((pParam->BSIM4v3ndep / 2.0e16), -0.25); + + + if (model->BSIM4v3k1Given || model->BSIM4v3k2Given) + { if (!model->BSIM4v3k1Given) + { fprintf(stdout, "Warning: k1 should be specified with k2.\n"); + pParam->BSIM4v3k1 = 0.53; + } + if (!model->BSIM4v3k2Given) + { fprintf(stdout, "Warning: k2 should be specified with k1.\n"); + pParam->BSIM4v3k2 = -0.0186; + } + if (model->BSIM4v3nsubGiven) + fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v3xtGiven) + fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v3vbxGiven) + fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v3gamma1Given) + fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v3gamma2Given) + fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); + } + else + { if (!model->BSIM4v3vbxGiven) + pParam->BSIM4v3vbx = pParam->BSIM4v3phi - 7.7348e-4 + * pParam->BSIM4v3ndep + * pParam->BSIM4v3xt * pParam->BSIM4v3xt; + if (pParam->BSIM4v3vbx > 0.0) + pParam->BSIM4v3vbx = -pParam->BSIM4v3vbx; + if (pParam->BSIM4v3vbm > 0.0) + pParam->BSIM4v3vbm = -pParam->BSIM4v3vbm; + + if (!model->BSIM4v3gamma1Given) + pParam->BSIM4v3gamma1 = 5.753e-12 + * sqrt(pParam->BSIM4v3ndep) + / model->BSIM4v3coxe; + if (!model->BSIM4v3gamma2Given) + pParam->BSIM4v3gamma2 = 5.753e-12 + * sqrt(pParam->BSIM4v3nsub) + / model->BSIM4v3coxe; + + T0 = pParam->BSIM4v3gamma1 - pParam->BSIM4v3gamma2; + T1 = sqrt(pParam->BSIM4v3phi - pParam->BSIM4v3vbx) + - pParam->BSIM4v3sqrtPhi; + T2 = sqrt(pParam->BSIM4v3phi * (pParam->BSIM4v3phi + - pParam->BSIM4v3vbm)) - pParam->BSIM4v3phi; + pParam->BSIM4v3k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM4v3vbm); + pParam->BSIM4v3k1 = pParam->BSIM4v3gamma2 - 2.0 + * pParam->BSIM4v3k2 * sqrt(pParam->BSIM4v3phi + - pParam->BSIM4v3vbm); + } + + if (pParam->BSIM4v3k2 < 0.0) + { T0 = 0.5 * pParam->BSIM4v3k1 / pParam->BSIM4v3k2; + pParam->BSIM4v3vbsc = 0.9 * (pParam->BSIM4v3phi - T0 * T0); + if (pParam->BSIM4v3vbsc > -3.0) + pParam->BSIM4v3vbsc = -3.0; + else if (pParam->BSIM4v3vbsc < -30.0) + pParam->BSIM4v3vbsc = -30.0; + } + else + { pParam->BSIM4v3vbsc = -30.0; + } + if (pParam->BSIM4v3vbsc > pParam->BSIM4v3vbm) + pParam->BSIM4v3vbsc = pParam->BSIM4v3vbm; + + if (!model->BSIM4v3vfbGiven) + { if (model->BSIM4v3vth0Given) + { pParam->BSIM4v3vfb = model->BSIM4v3type * pParam->BSIM4v3vth0 + - pParam->BSIM4v3phi - pParam->BSIM4v3k1 + * pParam->BSIM4v3sqrtPhi; + } + else + { pParam->BSIM4v3vfb = -1.0; + } + } + if (!model->BSIM4v3vth0Given) + { pParam->BSIM4v3vth0 = model->BSIM4v3type * (pParam->BSIM4v3vfb + + pParam->BSIM4v3phi + pParam->BSIM4v3k1 + * pParam->BSIM4v3sqrtPhi); + } + + pParam->BSIM4v3k1ox = pParam->BSIM4v3k1 * model->BSIM4v3toxe + / model->BSIM4v3toxm; + pParam->BSIM4v3k2ox = pParam->BSIM4v3k2 * model->BSIM4v3toxe + / model->BSIM4v3toxm; + + T3 = model->BSIM4v3type * pParam->BSIM4v3vth0 + - pParam->BSIM4v3vfb - pParam->BSIM4v3phi; + T4 = T3 + T3; + T5 = 2.5 * T3; + pParam->BSIM4v3vtfbphi1 = (model->BSIM4v3type == NMOS) ? T4 : T5; + if (pParam->BSIM4v3vtfbphi1 < 0.0) + pParam->BSIM4v3vtfbphi1 = 0.0; + + pParam->BSIM4v3vtfbphi2 = 4.0 * T3; + if (pParam->BSIM4v3vtfbphi2 < 0.0) + pParam->BSIM4v3vtfbphi2 = 0.0; + + tmp = sqrt(EPSSI / (model->BSIM4v3epsrox * EPS0) + * model->BSIM4v3toxe * pParam->BSIM4v3Xdep0); + T0 = pParam->BSIM4v3dsub * pParam->BSIM4v3leff / tmp; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + pParam->BSIM4v3theta0vb0 = T1 / T4; + } + else + pParam->BSIM4v3theta0vb0 = 1.0 / (MAX_EXP - 2.0); + + T0 = pParam->BSIM4v3drout * pParam->BSIM4v3leff / tmp; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T5 = T1 / T4; + } + else + T5 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + pParam->BSIM4v3thetaRout = pParam->BSIM4v3pdibl1 * T5 + + pParam->BSIM4v3pdibl2; + + tmp = sqrt(pParam->BSIM4v3Xdep0); + tmp1 = pParam->BSIM4v3vbi - pParam->BSIM4v3phi; + tmp2 = model->BSIM4v3factor1 * tmp; + + T0 = pParam->BSIM4v3dvt1w * pParam->BSIM4v3weff + * pParam->BSIM4v3leff / tmp2; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T8 = T1 / T4; + } + else + T8 = 1.0 / (MAX_EXP - 2.0); + T0 = pParam->BSIM4v3dvt0w * T8; + T8 = T0 * tmp1; + + T0 = pParam->BSIM4v3dvt1 * pParam->BSIM4v3leff / tmp2; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T9 = T1 / T4; + } + else + T9 = 1.0 / (MAX_EXP - 2.0); + T9 = pParam->BSIM4v3dvt0 * T9 * tmp1; + + T4 = model->BSIM4v3toxe * pParam->BSIM4v3phi + / (pParam->BSIM4v3weff + pParam->BSIM4v3w0); + + T0 = sqrt(1.0 + pParam->BSIM4v3lpe0 / pParam->BSIM4v3leff); + T5 = pParam->BSIM4v3k1ox * (T0 - 1.0) * pParam->BSIM4v3sqrtPhi + + (pParam->BSIM4v3kt1 + pParam->BSIM4v3kt1l / pParam->BSIM4v3leff) + * (TRatio - 1.0); + + tmp3 = model->BSIM4v3type * pParam->BSIM4v3vth0 + - T8 - T9 + pParam->BSIM4v3k3 * T4 + T5; + pParam->BSIM4v3vfbzb = tmp3 - pParam->BSIM4v3phi - pParam->BSIM4v3k1 + * pParam->BSIM4v3sqrtPhi; /* End of vfbzb */ + + /* stress effect */ + T0 = pow(Lnew, model->BSIM4v3llodku0); + W_tmp = Wnew + model->BSIM4v3wlod; + T1 = pow(W_tmp, model->BSIM4v3wlodku0); + tmp1 = model->BSIM4v3lku0 / T0 + model->BSIM4v3wku0 / T1 + + model->BSIM4v3pku0 / (T0 * T1); + pParam->BSIM4v3ku0 = 1.0 + tmp1; + + T0 = pow(Lnew, model->BSIM4v3llodvth); + T1 = pow(W_tmp, model->BSIM4v3wlodvth); + tmp1 = model->BSIM4v3lkvth0 / T0 + model->BSIM4v3wkvth0 / T1 + + model->BSIM4v3pkvth0 / (T0 * T1); + pParam->BSIM4v3kvth0 = 1.0 + tmp1; + pParam->BSIM4v3kvth0 = sqrt(pParam->BSIM4v3kvth0*pParam->BSIM4v3kvth0 + DELTA); + + T0 = (TRatio - 1.0); + pParam->BSIM4v3ku0temp = pParam->BSIM4v3ku0 * (1.0 + model->BSIM4v3tku0 *T0) + DELTA; + + Inv_saref = 1.0/(model->BSIM4v3saref + 0.5*Ldrn); + Inv_sbref = 1.0/(model->BSIM4v3sbref + 0.5*Ldrn); + pParam->BSIM4v3inv_od_ref = Inv_saref + Inv_sbref; + pParam->BSIM4v3rho_ref = model->BSIM4v3ku0 / pParam->BSIM4v3ku0temp * pParam->BSIM4v3inv_od_ref; + + } /* End of SizeNotFound */ + + /* stress effect */ + if( (here->BSIM4v3sa > 0.0) && (here->BSIM4v3sb > 0.0) && + ((here->BSIM4v3nf == 1.0) || ((here->BSIM4v3nf > 1.0) && (here->BSIM4v3sd > 0.0))) ) + { Inv_sa = 0; + Inv_sb = 0; + for(i = 0; i < here->BSIM4v3nf; i++){ + T0 = 1.0 / here->BSIM4v3nf / (here->BSIM4v3sa + 0.5*Ldrn + i * (here->BSIM4v3sd +Ldrn)); + T1 = 1.0 / here->BSIM4v3nf / (here->BSIM4v3sb + 0.5*Ldrn + i * (here->BSIM4v3sd +Ldrn)); + Inv_sa += T0; + Inv_sb += T1; + } + Inv_ODeff = Inv_sa + Inv_sb; + rho = model->BSIM4v3ku0 / pParam->BSIM4v3ku0temp * Inv_ODeff; + T0 = (1.0 + rho)/(1.0 + pParam->BSIM4v3rho_ref); + here->BSIM4v3u0temp = pParam->BSIM4v3u0temp * T0; + + T1 = (1.0 + model->BSIM4v3kvsat * rho)/(1.0 + model->BSIM4v3kvsat * pParam->BSIM4v3rho_ref); + here->BSIM4v3vsattemp = pParam->BSIM4v3vsattemp * T1; + + OD_offset = Inv_ODeff - pParam->BSIM4v3inv_od_ref; + dvth0_lod = model->BSIM4v3kvth0 / pParam->BSIM4v3kvth0 * OD_offset; + dk2_lod = model->BSIM4v3stk2 / pow(pParam->BSIM4v3kvth0, model->BSIM4v3lodk2) * + OD_offset; + deta0_lod = model->BSIM4v3steta0 / pow(pParam->BSIM4v3kvth0, model->BSIM4v3lodeta0) * + OD_offset; + here->BSIM4v3vth0 = pParam->BSIM4v3vth0 + dvth0_lod; + + if (!model->BSIM4v3vfbGiven && !model->BSIM4v3vth0Given) + here->BSIM4v3vfb = -1.0; + else + here->BSIM4v3vfb = pParam->BSIM4v3vfb + model->BSIM4v3type * dvth0_lod; + here->BSIM4v3vfbzb = pParam->BSIM4v3vfbzb + model->BSIM4v3type * dvth0_lod; + + T3 = model->BSIM4v3type * here->BSIM4v3vth0 + - here->BSIM4v3vfb - pParam->BSIM4v3phi; + T4 = T3 + T3; + T5 = 2.5 * T3; + here->BSIM4v3vtfbphi1 = (model->BSIM4v3type == NMOS) ? T4 : T5; + if (here->BSIM4v3vtfbphi1 < 0.0) + here->BSIM4v3vtfbphi1 = 0.0; + + here->BSIM4v3vtfbphi2 = 4.0 * T3; + if (here->BSIM4v3vtfbphi2 < 0.0) + here->BSIM4v3vtfbphi2 = 0.0; + + here->BSIM4v3k2 = pParam->BSIM4v3k2 + dk2_lod; + if (here->BSIM4v3k2 < 0.0) + { T0 = 0.5 * pParam->BSIM4v3k1 / here->BSIM4v3k2; + here->BSIM4v3vbsc = 0.9 * (pParam->BSIM4v3phi - T0 * T0); + if (here->BSIM4v3vbsc > -3.0) + here->BSIM4v3vbsc = -3.0; + else if (here->BSIM4v3vbsc < -30.0) + here->BSIM4v3vbsc = -30.0; + } + else + here->BSIM4v3vbsc = -30.0; + if (here->BSIM4v3vbsc > pParam->BSIM4v3vbm) + here->BSIM4v3vbsc = pParam->BSIM4v3vbm; + here->BSIM4v3k2ox = here->BSIM4v3k2 * model->BSIM4v3toxe + / model->BSIM4v3toxm; + + here->BSIM4v3eta0 = pParam->BSIM4v3eta0 + deta0_lod; + } else { + here->BSIM4v3u0temp = pParam->BSIM4v3u0temp; + here->BSIM4v3vth0 = pParam->BSIM4v3vth0; + here->BSIM4v3vsattemp = pParam->BSIM4v3vsattemp; + here->BSIM4v3vfb = pParam->BSIM4v3vfb; + here->BSIM4v3vfbzb = pParam->BSIM4v3vfbzb; + here->BSIM4v3vtfbphi1 = pParam->BSIM4v3vtfbphi1; + here->BSIM4v3vtfbphi2 = pParam->BSIM4v3vtfbphi2; + here->BSIM4v3k2 = pParam->BSIM4v3k2; + here->BSIM4v3vbsc = pParam->BSIM4v3vbsc; + here->BSIM4v3k2ox = pParam->BSIM4v3k2ox; + here->BSIM4v3eta0 = pParam->BSIM4v3eta0; + } + + here->BSIM4v3cgso = pParam->BSIM4v3cgso; + here->BSIM4v3cgdo = pParam->BSIM4v3cgdo; + + if (here->BSIM4v3rbodyMod) + { if (here->BSIM4v3rbdb < 1.0e-3) + here->BSIM4v3grbdb = 1.0e3; /* in mho */ + else + here->BSIM4v3grbdb = model->BSIM4v3gbmin + 1.0 / here->BSIM4v3rbdb; + if (here->BSIM4v3rbpb < 1.0e-3) + here->BSIM4v3grbpb = 1.0e3; + else + here->BSIM4v3grbpb = model->BSIM4v3gbmin + 1.0 / here->BSIM4v3rbpb; + if (here->BSIM4v3rbps < 1.0e-3) + here->BSIM4v3grbps = 1.0e3; + else + here->BSIM4v3grbps = model->BSIM4v3gbmin + 1.0 / here->BSIM4v3rbps; + if (here->BSIM4v3rbsb < 1.0e-3) + here->BSIM4v3grbsb = 1.0e3; + else + here->BSIM4v3grbsb = model->BSIM4v3gbmin + 1.0 / here->BSIM4v3rbsb; + if (here->BSIM4v3rbpd < 1.0e-3) + here->BSIM4v3grbpd = 1.0e3; + else + here->BSIM4v3grbpd = model->BSIM4v3gbmin + 1.0 / here->BSIM4v3rbpd; + } + + + /* + * Process geomertry dependent parasitics + */ + + here->BSIM4v3grgeltd = model->BSIM4v3rshg * (model->BSIM4v3xgw + + pParam->BSIM4v3weffCJ / 3.0 / model->BSIM4v3ngcon) / + (model->BSIM4v3ngcon * here->BSIM4v3nf * + (Lnew - model->BSIM4v3xgl)); + if (here->BSIM4v3grgeltd > 0.0) + here->BSIM4v3grgeltd = 1.0 / here->BSIM4v3grgeltd; + else + { here->BSIM4v3grgeltd = 1.0e3; /* mho */ + if (here->BSIM4v3rgateMod != 0) + printf("Warning: The gate conductance reset to 1.0e3 mho.\n"); + } + + DMCGeff = model->BSIM4v3dmcg - model->BSIM4v3dmcgt; + DMCIeff = model->BSIM4v3dmci; + DMDGeff = model->BSIM4v3dmdg - model->BSIM4v3dmcgt; + + if (here->BSIM4v3sourcePerimeterGiven) + { if (model->BSIM4v3perMod == 0) + here->BSIM4v3Pseff = here->BSIM4v3sourcePerimeter; + else + here->BSIM4v3Pseff = here->BSIM4v3sourcePerimeter + - pParam->BSIM4v3weffCJ * here->BSIM4v3nf; + } + else + BSIM4v3PAeffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, here->BSIM4v3min, + pParam->BSIM4v3weffCJ, DMCGeff, DMCIeff, DMDGeff, + &(here->BSIM4v3Pseff), &dumPd, &dumAs, &dumAd); + + if (here->BSIM4v3drainPerimeterGiven) + { if (model->BSIM4v3perMod == 0) + here->BSIM4v3Pdeff = here->BSIM4v3drainPerimeter; + else + here->BSIM4v3Pdeff = here->BSIM4v3drainPerimeter + - pParam->BSIM4v3weffCJ * here->BSIM4v3nf; + } + else + BSIM4v3PAeffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, here->BSIM4v3min, + pParam->BSIM4v3weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &(here->BSIM4v3Pdeff), &dumAs, &dumAd); + + if (here->BSIM4v3sourceAreaGiven) + here->BSIM4v3Aseff = here->BSIM4v3sourceArea; + else + BSIM4v3PAeffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, here->BSIM4v3min, + pParam->BSIM4v3weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &dumPd, &(here->BSIM4v3Aseff), &dumAd); + + if (here->BSIM4v3drainAreaGiven) + here->BSIM4v3Adeff = here->BSIM4v3drainArea; + else + BSIM4v3PAeffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, here->BSIM4v3min, + pParam->BSIM4v3weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &dumPd, &dumAs, &(here->BSIM4v3Adeff)); + + /* Processing S/D resistance and conductance below */ + if(here->BSIM4v3sNodePrime != here->BSIM4v3sNode) + { + here->BSIM4v3sourceConductance = 0.0; + if(here->BSIM4v3sourceSquaresGiven) + { + here->BSIM4v3sourceConductance = model->BSIM4v3sheetResistance + * here->BSIM4v3sourceSquares; + } else if (here->BSIM4v3rgeoMod > 0) + { + BSIM4v3RdseffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, + here->BSIM4v3rgeoMod, here->BSIM4v3min, + pParam->BSIM4v3weffCJ, model->BSIM4v3sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 1, &(here->BSIM4v3sourceConductance)); + } else + { + here->BSIM4v3sourceConductance = 0.0; + } + + if (here->BSIM4v3sourceConductance > 0.0) + here->BSIM4v3sourceConductance = 1.0 + / here->BSIM4v3sourceConductance; + else + { + here->BSIM4v3sourceConductance = 1.0e3; /* mho */ + printf ("Warning: Source conductance reset to 1.0e3 mho.\n"); + } + } else + { + here->BSIM4v3sourceConductance = 0.0; + } + + if(here->BSIM4v3dNodePrime != here->BSIM4v3dNode) + { + here->BSIM4v3drainConductance = 0.0; + if(here->BSIM4v3drainSquaresGiven) + { + here->BSIM4v3drainConductance = model->BSIM4v3sheetResistance + * here->BSIM4v3drainSquares; + } else if (here->BSIM4v3rgeoMod > 0) + { + BSIM4v3RdseffGeo(here->BSIM4v3nf, here->BSIM4v3geoMod, + here->BSIM4v3rgeoMod, here->BSIM4v3min, + pParam->BSIM4v3weffCJ, model->BSIM4v3sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 0, &(here->BSIM4v3drainConductance)); + } else + { + here->BSIM4v3drainConductance = 0.0; + } + + if (here->BSIM4v3drainConductance > 0.0) + here->BSIM4v3drainConductance = 1.0 + / here->BSIM4v3drainConductance; + else + { + here->BSIM4v3drainConductance = 1.0e3; /* mho */ + printf ("Warning: Drain conductance reset to 1.0e3 mho.\n"); + } + } else + { + here->BSIM4v3drainConductance = 0.0; + } + + /* End of Rsd processing */ + + + Nvtms = model->BSIM4v3vtm * model->BSIM4v3SjctEmissionCoeff; + if ((here->BSIM4v3Aseff <= 0.0) && (here->BSIM4v3Pseff <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM4v3Aseff * model->BSIM4v3SjctTempSatCurDensity + + here->BSIM4v3Pseff * model->BSIM4v3SjctSidewallTempSatCurDensity + + pParam->BSIM4v3weffCJ * here->BSIM4v3nf + * model->BSIM4v3SjctGateSidewallTempSatCurDensity; + } + if (SourceSatCurrent > 0.0) + { switch(model->BSIM4v3dioMod) + { case 0: + if ((model->BSIM4v3bvs / Nvtms) > EXP_THRESHOLD) + here->BSIM4v3XExpBVS = model->BSIM4v3xjbvs * MIN_EXP; + else + here->BSIM4v3XExpBVS = model->BSIM4v3xjbvs * exp(-model->BSIM4v3bvs / Nvtms); + break; + case 1: + BSIM4v3DioIjthVjmEval(Nvtms, model->BSIM4v3ijthsfwd, SourceSatCurrent, + 0.0, &(here->BSIM4v3vjsmFwd)); + here->BSIM4v3IVjsmFwd = SourceSatCurrent * exp(here->BSIM4v3vjsmFwd / Nvtms); + break; + case 2: + if ((model->BSIM4v3bvs / Nvtms) > EXP_THRESHOLD) + { here->BSIM4v3XExpBVS = model->BSIM4v3xjbvs * MIN_EXP; + tmp = MIN_EXP; + } + else + { here->BSIM4v3XExpBVS = exp(-model->BSIM4v3bvs / Nvtms); + tmp = here->BSIM4v3XExpBVS; + here->BSIM4v3XExpBVS *= model->BSIM4v3xjbvs; + } + + BSIM4v3DioIjthVjmEval(Nvtms, model->BSIM4v3ijthsfwd, SourceSatCurrent, + here->BSIM4v3XExpBVS, &(here->BSIM4v3vjsmFwd)); + T0 = exp(here->BSIM4v3vjsmFwd / Nvtms); + here->BSIM4v3IVjsmFwd = SourceSatCurrent * (T0 - here->BSIM4v3XExpBVS / T0 + + here->BSIM4v3XExpBVS - 1.0); + here->BSIM4v3SslpFwd = SourceSatCurrent + * (T0 + here->BSIM4v3XExpBVS / T0) / Nvtms; + + T2 = model->BSIM4v3ijthsrev / SourceSatCurrent; + if (T2 < 1.0) + { T2 = 10.0; + fprintf(stderr, "Warning: ijthsrev too small and set to 10 times IsbSat.\n"); + } + here->BSIM4v3vjsmRev = -model->BSIM4v3bvs + - Nvtms * log((T2 - 1.0) / model->BSIM4v3xjbvs); + T1 = model->BSIM4v3xjbvs * exp(-(model->BSIM4v3bvs + + here->BSIM4v3vjsmRev) / Nvtms); + here->BSIM4v3IVjsmRev = SourceSatCurrent * (1.0 + T1); + here->BSIM4v3SslpRev = -SourceSatCurrent * T1 / Nvtms; + break; + default: + printf("Specified dioMod = %d not matched\n", model->BSIM4v3dioMod); + } + } + + Nvtmd = model->BSIM4v3vtm * model->BSIM4v3DjctEmissionCoeff; + if ((here->BSIM4v3Adeff <= 0.0) && (here->BSIM4v3Pdeff <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM4v3Adeff * model->BSIM4v3DjctTempSatCurDensity + + here->BSIM4v3Pdeff * model->BSIM4v3DjctSidewallTempSatCurDensity + + pParam->BSIM4v3weffCJ * here->BSIM4v3nf + * model->BSIM4v3DjctGateSidewallTempSatCurDensity; + } + if (DrainSatCurrent > 0.0) + { switch(model->BSIM4v3dioMod) + { case 0: + if ((model->BSIM4v3bvd / Nvtmd) > EXP_THRESHOLD) + here->BSIM4v3XExpBVD = model->BSIM4v3xjbvd * MIN_EXP; + else + here->BSIM4v3XExpBVD = model->BSIM4v3xjbvd * exp(-model->BSIM4v3bvd / Nvtmd); + break; + case 1: + BSIM4v3DioIjthVjmEval(Nvtmd, model->BSIM4v3ijthdfwd, DrainSatCurrent, + 0.0, &(here->BSIM4v3vjdmFwd)); + here->BSIM4v3IVjdmFwd = DrainSatCurrent * exp(here->BSIM4v3vjdmFwd / Nvtmd); + break; + case 2: + if ((model->BSIM4v3bvd / Nvtmd) > EXP_THRESHOLD) + { here->BSIM4v3XExpBVD = model->BSIM4v3xjbvd * MIN_EXP; + tmp = MIN_EXP; + } + else + { here->BSIM4v3XExpBVD = exp(-model->BSIM4v3bvd / Nvtmd); + tmp = here->BSIM4v3XExpBVD; + here->BSIM4v3XExpBVD *= model->BSIM4v3xjbvd; + } + + BSIM4v3DioIjthVjmEval(Nvtmd, model->BSIM4v3ijthdfwd, DrainSatCurrent, + here->BSIM4v3XExpBVD, &(here->BSIM4v3vjdmFwd)); + T0 = exp(here->BSIM4v3vjdmFwd / Nvtmd); + here->BSIM4v3IVjdmFwd = DrainSatCurrent * (T0 - here->BSIM4v3XExpBVD / T0 + + here->BSIM4v3XExpBVD - 1.0); + here->BSIM4v3DslpFwd = DrainSatCurrent + * (T0 + here->BSIM4v3XExpBVD / T0) / Nvtmd; + + T2 = model->BSIM4v3ijthdrev / DrainSatCurrent; + if (T2 < 1.0) + { T2 = 10.0; + fprintf(stderr, "Warning: ijthdrev too small and set to 10 times IdbSat.\n"); + } + here->BSIM4v3vjdmRev = -model->BSIM4v3bvd + - Nvtmd * log((T2 - 1.0) / model->BSIM4v3xjbvd); /* bugfix */ + T1 = model->BSIM4v3xjbvd * exp(-(model->BSIM4v3bvd + + here->BSIM4v3vjdmRev) / Nvtmd); + here->BSIM4v3IVjdmRev = DrainSatCurrent * (1.0 + T1); + here->BSIM4v3DslpRev = -DrainSatCurrent * T1 / Nvtmd; + break; + default: + printf("Specified dioMod = %d not matched\n", model->BSIM4v3dioMod); + } + } + + if (BSIM4v3checkModel(model, here, ckt)) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v3modName; + namarray[1] = here->BSIM4v3name; + (*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM4v3.3.0 parameter checking for %s in model %s", namarray); + return(E_BADPARM); + } + } /* End instance */ + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/b4v3trunc.c b/src/spicelib/devices/bsim4v3/b4v3trunc.c new file mode 100644 index 000000000..f9226207a --- /dev/null +++ b/src/spicelib/devices/bsim4v3/b4v3trunc.c @@ -0,0 +1,60 @@ +/**** BSIM4.3.0 Released by Xuemei(Jane) Xi 05/09/2003 ****/ + +/********** + * Copyright 2003 Regents of the University of California. All rights reserved. + * File: b4v3check.c of BSIM4.3.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include +#include +#include "cktdefs.h" +#include "bsim4v3def.h" +#include "sperror.h" + + +int +BSIM4v3trunc(inModel,ckt,timeStep) +GENmodel *inModel; +CKTcircuit *ckt; +double *timeStep; +{ +BSIM4v3model *model = (BSIM4v3model*)inModel; +BSIM4v3instance *here; + +#ifdef STEPDEBUG + double debugtemp; +#endif /* STEPDEBUG */ + + for (; model != NULL; model = model->BSIM4v3nextModel) + { for (here = model->BSIM4v3instances; here != NULL; + here = here->BSIM4v3nextInstance) + { + if (here->BSIM4v3owner != ARCHme) continue; +#ifdef STEPDEBUG + debugtemp = *timeStep; +#endif /* STEPDEBUG */ + CKTterr(here->BSIM4v3qb,ckt,timeStep); + CKTterr(here->BSIM4v3qg,ckt,timeStep); + CKTterr(here->BSIM4v3qd,ckt,timeStep); + if (here->BSIM4v3trnqsMod) + CKTterr(here->BSIM4v3qcdump,ckt,timeStep); + if (here->BSIM4v3rbodyMod) + { CKTterr(here->BSIM4v3qbs,ckt,timeStep); + CKTterr(here->BSIM4v3qbd,ckt,timeStep); + } + if (here->BSIM4v3rgateMod == 3) + CKTterr(here->BSIM4v3qgmid,ckt,timeStep); +#ifdef STEPDEBUG + if(debugtemp != *timeStep) + { printf("device %s reduces step from %g to %g\n", + here->BSIM4v3name,debugtemp,*timeStep); + } +#endif /* STEPDEBUG */ + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v3/bsim4v3def.h b/src/spicelib/devices/bsim4v3/bsim4v3def.h new file mode 100644 index 000000000..aacbb5613 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/bsim4v3def.h @@ -0,0 +1,2816 @@ +/********** +Copyright 2003 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu. +Modified by Xuemei Xi, 11/15/2002. +Modified by Xuemei Xi, 05/09/2003. +File: bsim4v3def.h +**********/ + +#ifndef BSIM4V3 +#define BSIM4V3 + +#include "ifsim.h" +#include "gendefs.h" +#include "cktdefs.h" +#include "complex.h" +#include "noisedef.h" + +typedef struct sBSIM4v3instance +{ + struct sBSIM4v3model *BSIM4v3modPtr; + struct sBSIM4v3instance *BSIM4v3nextInstance; + IFuid BSIM4v3name; + int BSIM4v3owner; /* Number of owner process */ + int BSIM4v3states; /* index into state table for this device */ + int BSIM4v3dNode; + int BSIM4v3gNodeExt; + int BSIM4v3sNode; + int BSIM4v3bNode; + int BSIM4v3dNodePrime; + int BSIM4v3gNodePrime; + int BSIM4v3gNodeMid; + int BSIM4v3sNodePrime; + int BSIM4v3bNodePrime; + int BSIM4v3dbNode; + int BSIM4v3sbNode; + int BSIM4v3qNode; + + double BSIM4v3ueff; + double BSIM4v3thetavth; + double BSIM4v3von; + double BSIM4v3vdsat; + double BSIM4v3cgdo; + double BSIM4v3qgdo; + double BSIM4v3cgso; + double BSIM4v3qgso; + double BSIM4v3grbsb; + double BSIM4v3grbdb; + double BSIM4v3grbpb; + double BSIM4v3grbps; + double BSIM4v3grbpd; + + double BSIM4v3vjsmFwd; + double BSIM4v3vjsmRev; + double BSIM4v3vjdmFwd; + double BSIM4v3vjdmRev; + double BSIM4v3XExpBVS; + double BSIM4v3XExpBVD; + double BSIM4v3SslpFwd; + double BSIM4v3SslpRev; + double BSIM4v3DslpFwd; + double BSIM4v3DslpRev; + double BSIM4v3IVjsmFwd; + double BSIM4v3IVjsmRev; + double BSIM4v3IVjdmFwd; + double BSIM4v3IVjdmRev; + + double BSIM4v3grgeltd; + double BSIM4v3Pseff; + double BSIM4v3Pdeff; + double BSIM4v3Aseff; + double BSIM4v3Adeff; + + double BSIM4v3l; + double BSIM4v3w; + double BSIM4v3drainArea; + double BSIM4v3sourceArea; + double BSIM4v3drainSquares; + double BSIM4v3sourceSquares; + double BSIM4v3drainPerimeter; + double BSIM4v3sourcePerimeter; + double BSIM4v3sourceConductance; + double BSIM4v3drainConductance; + /* stress effect instance param */ + double BSIM4v3sa; + double BSIM4v3sb; + double BSIM4v3sd; + + double BSIM4v3rbdb; + double BSIM4v3rbsb; + double BSIM4v3rbpb; + double BSIM4v3rbps; + double BSIM4v3rbpd; + + /* added here to account stress effect instance dependence */ + double BSIM4v3u0temp; + double BSIM4v3vsattemp; + double BSIM4v3vth0; + double BSIM4v3vfb; + double BSIM4v3vfbzb; + double BSIM4v3vtfbphi1; + double BSIM4v3vtfbphi2; + double BSIM4v3k2; + double BSIM4v3vbsc; + double BSIM4v3k2ox; + double BSIM4v3eta0; + + double BSIM4v3icVDS; + double BSIM4v3icVGS; + double BSIM4v3icVBS; + double BSIM4v3nf; + int BSIM4v3off; + int BSIM4v3mode; + int BSIM4v3trnqsMod; + int BSIM4v3acnqsMod; + int BSIM4v3rbodyMod; + int BSIM4v3rgateMod; + int BSIM4v3geoMod; + int BSIM4v3rgeoMod; + int BSIM4v3min; + + + /* OP point */ + double BSIM4v3Vgsteff; + double BSIM4v3vgs_eff; + double BSIM4v3vgd_eff; + double BSIM4v3dvgs_eff_dvg; + double BSIM4v3dvgd_eff_dvg; + double BSIM4v3Vdseff; + double BSIM4v3nstar; + double BSIM4v3Abulk; + double BSIM4v3EsatL; + double BSIM4v3AbovVgst2Vtm; + double BSIM4v3qinv; + double BSIM4v3cd; + double BSIM4v3cbs; + double BSIM4v3cbd; + double BSIM4v3csub; + double BSIM4v3Igidl; + double BSIM4v3Igisl; + double BSIM4v3gm; + double BSIM4v3gds; + double BSIM4v3gmbs; + double BSIM4v3gbd; + double BSIM4v3gbs; + + double BSIM4v3gbbs; + double BSIM4v3gbgs; + double BSIM4v3gbds; + double BSIM4v3ggidld; + double BSIM4v3ggidlg; + double BSIM4v3ggidls; + double BSIM4v3ggidlb; + double BSIM4v3ggisld; + double BSIM4v3ggislg; + double BSIM4v3ggisls; + double BSIM4v3ggislb; + + double BSIM4v3Igcs; + double BSIM4v3gIgcsg; + double BSIM4v3gIgcsd; + double BSIM4v3gIgcss; + double BSIM4v3gIgcsb; + double BSIM4v3Igcd; + double BSIM4v3gIgcdg; + double BSIM4v3gIgcdd; + double BSIM4v3gIgcds; + double BSIM4v3gIgcdb; + + double BSIM4v3Igs; + double BSIM4v3gIgsg; + double BSIM4v3gIgss; + double BSIM4v3Igd; + double BSIM4v3gIgdg; + double BSIM4v3gIgdd; + + double BSIM4v3Igb; + double BSIM4v3gIgbg; + double BSIM4v3gIgbd; + double BSIM4v3gIgbs; + double BSIM4v3gIgbb; + + double BSIM4v3grdsw; + double BSIM4v3IdovVds; + double BSIM4v3gcrg; + double BSIM4v3gcrgd; + double BSIM4v3gcrgg; + double BSIM4v3gcrgs; + double BSIM4v3gcrgb; + + double BSIM4v3gstot; + double BSIM4v3gstotd; + double BSIM4v3gstotg; + double BSIM4v3gstots; + double BSIM4v3gstotb; + + double BSIM4v3gdtot; + double BSIM4v3gdtotd; + double BSIM4v3gdtotg; + double BSIM4v3gdtots; + double BSIM4v3gdtotb; + + double BSIM4v3cggb; + double BSIM4v3cgdb; + double BSIM4v3cgsb; + double BSIM4v3cbgb; + double BSIM4v3cbdb; + double BSIM4v3cbsb; + double BSIM4v3cdgb; + double BSIM4v3cddb; + double BSIM4v3cdsb; + double BSIM4v3csgb; + double BSIM4v3csdb; + double BSIM4v3cssb; + double BSIM4v3cgbb; + double BSIM4v3cdbb; + double BSIM4v3csbb; + double BSIM4v3cbbb; + double BSIM4v3capbd; + double BSIM4v3capbs; + + double BSIM4v3cqgb; + double BSIM4v3cqdb; + double BSIM4v3cqsb; + double BSIM4v3cqbb; + + double BSIM4v3qgate; + double BSIM4v3qbulk; + double BSIM4v3qdrn; + double BSIM4v3qsrc; + + double BSIM4v3qchqs; + double BSIM4v3taunet; + double BSIM4v3gtau; + double BSIM4v3gtg; + double BSIM4v3gtd; + double BSIM4v3gts; + double BSIM4v3gtb; + + struct bsim4v3SizeDependParam *pParam; + + unsigned BSIM4v3lGiven :1; + unsigned BSIM4v3wGiven :1; + unsigned BSIM4v3nfGiven :1; + unsigned BSIM4v3minGiven :1; + unsigned BSIM4v3drainAreaGiven :1; + unsigned BSIM4v3sourceAreaGiven :1; + unsigned BSIM4v3drainSquaresGiven :1; + unsigned BSIM4v3sourceSquaresGiven :1; + unsigned BSIM4v3drainPerimeterGiven :1; + unsigned BSIM4v3sourcePerimeterGiven :1; + unsigned BSIM4v3saGiven :1; + unsigned BSIM4v3sbGiven :1; + unsigned BSIM4v3sdGiven :1; + unsigned BSIM4v3rbdbGiven :1; + unsigned BSIM4v3rbsbGiven :1; + unsigned BSIM4v3rbpbGiven :1; + unsigned BSIM4v3rbpdGiven :1; + unsigned BSIM4v3rbpsGiven :1; + unsigned BSIM4v3icVDSGiven :1; + unsigned BSIM4v3icVGSGiven :1; + unsigned BSIM4v3icVBSGiven :1; + unsigned BSIM4v3trnqsModGiven :1; + unsigned BSIM4v3acnqsModGiven :1; + unsigned BSIM4v3rbodyModGiven :1; + unsigned BSIM4v3rgateModGiven :1; + unsigned BSIM4v3geoModGiven :1; + unsigned BSIM4v3rgeoModGiven :1; + + + double *BSIM4v3DPdPtr; + double *BSIM4v3DPdpPtr; + double *BSIM4v3DPgpPtr; + double *BSIM4v3DPgmPtr; + double *BSIM4v3DPspPtr; + double *BSIM4v3DPbpPtr; + double *BSIM4v3DPdbPtr; + + double *BSIM4v3DdPtr; + double *BSIM4v3DdpPtr; + + double *BSIM4v3GPdpPtr; + double *BSIM4v3GPgpPtr; + double *BSIM4v3GPgmPtr; + double *BSIM4v3GPgePtr; + double *BSIM4v3GPspPtr; + double *BSIM4v3GPbpPtr; + + double *BSIM4v3GMdpPtr; + double *BSIM4v3GMgpPtr; + double *BSIM4v3GMgmPtr; + double *BSIM4v3GMgePtr; + double *BSIM4v3GMspPtr; + double *BSIM4v3GMbpPtr; + + double *BSIM4v3GEdpPtr; + double *BSIM4v3GEgpPtr; + double *BSIM4v3GEgmPtr; + double *BSIM4v3GEgePtr; + double *BSIM4v3GEspPtr; + double *BSIM4v3GEbpPtr; + + double *BSIM4v3SPdpPtr; + double *BSIM4v3SPgpPtr; + double *BSIM4v3SPgmPtr; + double *BSIM4v3SPsPtr; + double *BSIM4v3SPspPtr; + double *BSIM4v3SPbpPtr; + double *BSIM4v3SPsbPtr; + + double *BSIM4v3SspPtr; + double *BSIM4v3SsPtr; + + double *BSIM4v3BPdpPtr; + double *BSIM4v3BPgpPtr; + double *BSIM4v3BPgmPtr; + double *BSIM4v3BPspPtr; + double *BSIM4v3BPdbPtr; + double *BSIM4v3BPbPtr; + double *BSIM4v3BPsbPtr; + double *BSIM4v3BPbpPtr; + + double *BSIM4v3DBdpPtr; + double *BSIM4v3DBdbPtr; + double *BSIM4v3DBbpPtr; + double *BSIM4v3DBbPtr; + + double *BSIM4v3SBspPtr; + double *BSIM4v3SBbpPtr; + double *BSIM4v3SBbPtr; + double *BSIM4v3SBsbPtr; + + double *BSIM4v3BdbPtr; + double *BSIM4v3BbpPtr; + double *BSIM4v3BsbPtr; + double *BSIM4v3BbPtr; + + double *BSIM4v3DgpPtr; + double *BSIM4v3DspPtr; + double *BSIM4v3DbpPtr; + double *BSIM4v3SdpPtr; + double *BSIM4v3SgpPtr; + double *BSIM4v3SbpPtr; + + double *BSIM4v3QdpPtr; + double *BSIM4v3QgpPtr; + double *BSIM4v3QspPtr; + double *BSIM4v3QbpPtr; + double *BSIM4v3QqPtr; + double *BSIM4v3DPqPtr; + double *BSIM4v3GPqPtr; + double *BSIM4v3SPqPtr; + + +#define BSIM4v3vbd BSIM4v3states+ 0 +#define BSIM4v3vbs BSIM4v3states+ 1 +#define BSIM4v3vgs BSIM4v3states+ 2 +#define BSIM4v3vds BSIM4v3states+ 3 +#define BSIM4v3vdbs BSIM4v3states+ 4 +#define BSIM4v3vdbd BSIM4v3states+ 5 +#define BSIM4v3vsbs BSIM4v3states+ 6 +#define BSIM4v3vges BSIM4v3states+ 7 +#define BSIM4v3vgms BSIM4v3states+ 8 +#define BSIM4v3vses BSIM4v3states+ 9 +#define BSIM4v3vdes BSIM4v3states+ 10 + +#define BSIM4v3qb BSIM4v3states+ 11 +#define BSIM4v3cqb BSIM4v3states+ 12 +#define BSIM4v3qg BSIM4v3states+ 13 +#define BSIM4v3cqg BSIM4v3states+ 14 +#define BSIM4v3qd BSIM4v3states+ 15 +#define BSIM4v3cqd BSIM4v3states+ 16 +#define BSIM4v3qgmid BSIM4v3states+ 17 +#define BSIM4v3cqgmid BSIM4v3states+ 18 + +#define BSIM4v3qbs BSIM4v3states+ 19 +#define BSIM4v3cqbs BSIM4v3states+ 20 +#define BSIM4v3qbd BSIM4v3states+ 21 +#define BSIM4v3cqbd BSIM4v3states+ 22 + +#define BSIM4v3qcheq BSIM4v3states+ 23 +#define BSIM4v3cqcheq BSIM4v3states+ 24 +#define BSIM4v3qcdump BSIM4v3states+ 25 +#define BSIM4v3cqcdump BSIM4v3states+ 26 +#define BSIM4v3qdef BSIM4v3states+ 27 +#define BSIM4v3qs BSIM4v3states+ 28 + +#define BSIM4v3numStates 29 + + +/* indices to the array of BSIM4v3 NOISE SOURCES */ + +#define BSIM4v3RDNOIZ 0 +#define BSIM4v3RSNOIZ 1 +#define BSIM4v3RGNOIZ 2 +#define BSIM4v3RBPSNOIZ 3 +#define BSIM4v3RBPDNOIZ 4 +#define BSIM4v3RBPBNOIZ 5 +#define BSIM4v3RBSBNOIZ 6 +#define BSIM4v3RBDBNOIZ 7 +#define BSIM4v3IDNOIZ 8 +#define BSIM4v3FLNOIZ 9 +#define BSIM4v3IGSNOIZ 10 +#define BSIM4v3IGDNOIZ 11 +#define BSIM4v3IGBNOIZ 12 +#define BSIM4v3TOTNOIZ 13 + +#define BSIM4v3NSRCS 14 /* Number of BSIM4v3 noise sources */ + +#ifndef NONOISE + double BSIM4v3nVar[NSTATVARS][BSIM4v3NSRCS]; +#else /* NONOISE */ + double **BSIM4v3nVar; +#endif /* NONOISE */ + +} BSIM4v3instance ; + +struct bsim4v3SizeDependParam +{ + double Width; + double Length; + double NFinger; + + double BSIM4v3cdsc; + double BSIM4v3cdscb; + double BSIM4v3cdscd; + double BSIM4v3cit; + double BSIM4v3nfactor; + double BSIM4v3xj; + double BSIM4v3vsat; + double BSIM4v3at; + double BSIM4v3a0; + double BSIM4v3ags; + double BSIM4v3a1; + double BSIM4v3a2; + double BSIM4v3keta; + double BSIM4v3nsub; + double BSIM4v3ndep; + double BSIM4v3nsd; + double BSIM4v3phin; + double BSIM4v3ngate; + double BSIM4v3gamma1; + double BSIM4v3gamma2; + double BSIM4v3vbx; + double BSIM4v3vbi; + double BSIM4v3vbm; + double BSIM4v3vbsc; + double BSIM4v3xt; + double BSIM4v3phi; + double BSIM4v3litl; + double BSIM4v3k1; + double BSIM4v3kt1; + double BSIM4v3kt1l; + double BSIM4v3kt2; + double BSIM4v3k2; + double BSIM4v3k3; + double BSIM4v3k3b; + double BSIM4v3w0; + double BSIM4v3dvtp0; + double BSIM4v3dvtp1; + double BSIM4v3lpe0; + double BSIM4v3lpeb; + double BSIM4v3dvt0; + double BSIM4v3dvt1; + double BSIM4v3dvt2; + double BSIM4v3dvt0w; + double BSIM4v3dvt1w; + double BSIM4v3dvt2w; + double BSIM4v3drout; + double BSIM4v3dsub; + double BSIM4v3vth0; + double BSIM4v3ua; + double BSIM4v3ua1; + double BSIM4v3ub; + double BSIM4v3ub1; + double BSIM4v3uc; + double BSIM4v3uc1; + double BSIM4v3u0; + double BSIM4v3eu; + double BSIM4v3ute; + double BSIM4v3voff; + double BSIM4v3minv; + double BSIM4v3vfb; + double BSIM4v3delta; + double BSIM4v3rdsw; + double BSIM4v3rds0; + double BSIM4v3rs0; + double BSIM4v3rd0; + double BSIM4v3rsw; + double BSIM4v3rdw; + double BSIM4v3prwg; + double BSIM4v3prwb; + double BSIM4v3prt; + double BSIM4v3eta0; + double BSIM4v3etab; + double BSIM4v3pclm; + double BSIM4v3pdibl1; + double BSIM4v3pdibl2; + double BSIM4v3pdiblb; + double BSIM4v3fprout; + double BSIM4v3pdits; + double BSIM4v3pditsd; + double BSIM4v3pscbe1; + double BSIM4v3pscbe2; + double BSIM4v3pvag; + double BSIM4v3wr; + double BSIM4v3dwg; + double BSIM4v3dwb; + double BSIM4v3b0; + double BSIM4v3b1; + double BSIM4v3alpha0; + double BSIM4v3alpha1; + double BSIM4v3beta0; + double BSIM4v3agidl; + double BSIM4v3bgidl; + double BSIM4v3cgidl; + double BSIM4v3egidl; + double BSIM4v3aigc; + double BSIM4v3bigc; + double BSIM4v3cigc; + double BSIM4v3aigsd; + double BSIM4v3bigsd; + double BSIM4v3cigsd; + double BSIM4v3aigbacc; + double BSIM4v3bigbacc; + double BSIM4v3cigbacc; + double BSIM4v3aigbinv; + double BSIM4v3bigbinv; + double BSIM4v3cigbinv; + double BSIM4v3nigc; + double BSIM4v3nigbacc; + double BSIM4v3nigbinv; + double BSIM4v3ntox; + double BSIM4v3eigbinv; + double BSIM4v3pigcd; + double BSIM4v3poxedge; + double BSIM4v3xrcrg1; + double BSIM4v3xrcrg2; + double BSIM4v3lambda; /* overshoot */ + double BSIM4v3vtl; /* thermal velocity limit */ + double BSIM4v3xn; /* back scattering parameter */ + double BSIM4v3lc; /* back scattering parameter */ + double BSIM4v3tfactor; /* ballistic transportation factor */ + +/* added for stress effect */ + double BSIM4v3ku0; + double BSIM4v3kvth0; + double BSIM4v3ku0temp; + double BSIM4v3rho_ref; + double BSIM4v3inv_od_ref; + + /* CV model */ + double BSIM4v3cgsl; + double BSIM4v3cgdl; + double BSIM4v3ckappas; + double BSIM4v3ckappad; + double BSIM4v3cf; + double BSIM4v3clc; + double BSIM4v3cle; + double BSIM4v3vfbcv; + double BSIM4v3noff; + double BSIM4v3voffcv; + double BSIM4v3acde; + double BSIM4v3moin; + +/* Pre-calculated constants */ + + double BSIM4v3dw; + double BSIM4v3dl; + double BSIM4v3leff; + double BSIM4v3weff; + + double BSIM4v3dwc; + double BSIM4v3dlc; + double BSIM4v3dlcig; + double BSIM4v3dwj; + double BSIM4v3leffCV; + double BSIM4v3weffCV; + double BSIM4v3weffCJ; + double BSIM4v3abulkCVfactor; + double BSIM4v3cgso; + double BSIM4v3cgdo; + double BSIM4v3cgbo; + + double BSIM4v3u0temp; + double BSIM4v3vsattemp; + double BSIM4v3sqrtPhi; + double BSIM4v3phis3; + double BSIM4v3Xdep0; + double BSIM4v3sqrtXdep0; + double BSIM4v3theta0vb0; + double BSIM4v3thetaRout; + double BSIM4v3mstar; + double BSIM4v3voffcbn; + double BSIM4v3rdswmin; + double BSIM4v3rdwmin; + double BSIM4v3rswmin; + double BSIM4v3vfbsd; + + double BSIM4v3cof1; + double BSIM4v3cof2; + double BSIM4v3cof3; + double BSIM4v3cof4; + double BSIM4v3cdep0; + double BSIM4v3vfbzb; + double BSIM4v3vtfbphi1; + double BSIM4v3vtfbphi2; + double BSIM4v3ToxRatio; + double BSIM4v3Aechvb; + double BSIM4v3Bechvb; + double BSIM4v3ToxRatioEdge; + double BSIM4v3AechvbEdge; + double BSIM4v3BechvbEdge; + double BSIM4v3ldeb; + double BSIM4v3k1ox; + double BSIM4v3k2ox; + + struct bsim4v3SizeDependParam *pNext; +}; + + +typedef struct sBSIM4v3model +{ + int BSIM4v3modType; + struct sBSIM4v3model *BSIM4v3nextModel; + BSIM4v3instance *BSIM4v3instances; + IFuid BSIM4v3modName; + int BSIM4v3type; + + int BSIM4v3mobMod; + int BSIM4v3capMod; + int BSIM4v3dioMod; + int BSIM4v3trnqsMod; + int BSIM4v3acnqsMod; + int BSIM4v3fnoiMod; + int BSIM4v3tnoiMod; + int BSIM4v3rdsMod; + int BSIM4v3rbodyMod; + int BSIM4v3rgateMod; + int BSIM4v3perMod; + int BSIM4v3geoMod; + int BSIM4v3igcMod; + int BSIM4v3igbMod; + int BSIM4v3tempMod; + int BSIM4v3binUnit; + int BSIM4v3paramChk; + char *BSIM4v3version; + double BSIM4v3toxe; + double BSIM4v3toxp; + double BSIM4v3toxm; + double BSIM4v3dtox; + double BSIM4v3epsrox; + double BSIM4v3cdsc; + double BSIM4v3cdscb; + double BSIM4v3cdscd; + double BSIM4v3cit; + double BSIM4v3nfactor; + double BSIM4v3xj; + double BSIM4v3vsat; + double BSIM4v3at; + double BSIM4v3a0; + double BSIM4v3ags; + double BSIM4v3a1; + double BSIM4v3a2; + double BSIM4v3keta; + double BSIM4v3nsub; + double BSIM4v3ndep; + double BSIM4v3nsd; + double BSIM4v3phin; + double BSIM4v3ngate; + double BSIM4v3gamma1; + double BSIM4v3gamma2; + double BSIM4v3vbx; + double BSIM4v3vbm; + double BSIM4v3xt; + double BSIM4v3k1; + double BSIM4v3kt1; + double BSIM4v3kt1l; + double BSIM4v3kt2; + double BSIM4v3k2; + double BSIM4v3k3; + double BSIM4v3k3b; + double BSIM4v3w0; + double BSIM4v3dvtp0; + double BSIM4v3dvtp1; + double BSIM4v3lpe0; + double BSIM4v3lpeb; + double BSIM4v3dvt0; + double BSIM4v3dvt1; + double BSIM4v3dvt2; + double BSIM4v3dvt0w; + double BSIM4v3dvt1w; + double BSIM4v3dvt2w; + double BSIM4v3drout; + double BSIM4v3dsub; + double BSIM4v3vth0; + double BSIM4v3eu; + double BSIM4v3ua; + double BSIM4v3ua1; + double BSIM4v3ub; + double BSIM4v3ub1; + double BSIM4v3uc; + double BSIM4v3uc1; + double BSIM4v3u0; + double BSIM4v3ute; + double BSIM4v3voff; + double BSIM4v3minv; + double BSIM4v3voffl; + double BSIM4v3delta; + double BSIM4v3rdsw; + double BSIM4v3rdswmin; + double BSIM4v3rdwmin; + double BSIM4v3rswmin; + double BSIM4v3rsw; + double BSIM4v3rdw; + double BSIM4v3prwg; + double BSIM4v3prwb; + double BSIM4v3prt; + double BSIM4v3eta0; + double BSIM4v3etab; + double BSIM4v3pclm; + double BSIM4v3pdibl1; + double BSIM4v3pdibl2; + double BSIM4v3pdiblb; + double BSIM4v3fprout; + double BSIM4v3pdits; + double BSIM4v3pditsd; + double BSIM4v3pditsl; + double BSIM4v3pscbe1; + double BSIM4v3pscbe2; + double BSIM4v3pvag; + double BSIM4v3wr; + double BSIM4v3dwg; + double BSIM4v3dwb; + double BSIM4v3b0; + double BSIM4v3b1; + double BSIM4v3alpha0; + double BSIM4v3alpha1; + double BSIM4v3beta0; + double BSIM4v3agidl; + double BSIM4v3bgidl; + double BSIM4v3cgidl; + double BSIM4v3egidl; + double BSIM4v3aigc; + double BSIM4v3bigc; + double BSIM4v3cigc; + double BSIM4v3aigsd; + double BSIM4v3bigsd; + double BSIM4v3cigsd; + double BSIM4v3aigbacc; + double BSIM4v3bigbacc; + double BSIM4v3cigbacc; + double BSIM4v3aigbinv; + double BSIM4v3bigbinv; + double BSIM4v3cigbinv; + double BSIM4v3nigc; + double BSIM4v3nigbacc; + double BSIM4v3nigbinv; + double BSIM4v3ntox; + double BSIM4v3eigbinv; + double BSIM4v3pigcd; + double BSIM4v3poxedge; + double BSIM4v3toxref; + double BSIM4v3ijthdfwd; + double BSIM4v3ijthsfwd; + double BSIM4v3ijthdrev; + double BSIM4v3ijthsrev; + double BSIM4v3xjbvd; + double BSIM4v3xjbvs; + double BSIM4v3bvd; + double BSIM4v3bvs; + double BSIM4v3xrcrg1; + double BSIM4v3xrcrg2; + double BSIM4v3lambda; + double BSIM4v3vtl; + double BSIM4v3lc; + double BSIM4v3xn; + + double BSIM4v3vfb; + double BSIM4v3gbmin; + double BSIM4v3rbdb; + double BSIM4v3rbsb; + double BSIM4v3rbpb; + double BSIM4v3rbps; + double BSIM4v3rbpd; + double BSIM4v3tnoia; + double BSIM4v3tnoib; + double BSIM4v3rnoia; + double BSIM4v3rnoib; + double BSIM4v3ntnoi; + + /* CV model and Parasitics */ + double BSIM4v3cgsl; + double BSIM4v3cgdl; + double BSIM4v3ckappas; + double BSIM4v3ckappad; + double BSIM4v3cf; + double BSIM4v3vfbcv; + double BSIM4v3clc; + double BSIM4v3cle; + double BSIM4v3dwc; + double BSIM4v3dlc; + double BSIM4v3xw; + double BSIM4v3xl; + double BSIM4v3dlcig; + double BSIM4v3dwj; + double BSIM4v3noff; + double BSIM4v3voffcv; + double BSIM4v3acde; + double BSIM4v3moin; + double BSIM4v3tcj; + double BSIM4v3tcjsw; + double BSIM4v3tcjswg; + double BSIM4v3tpb; + double BSIM4v3tpbsw; + double BSIM4v3tpbswg; + double BSIM4v3dmcg; + double BSIM4v3dmci; + double BSIM4v3dmdg; + double BSIM4v3dmcgt; + double BSIM4v3xgw; + double BSIM4v3xgl; + double BSIM4v3rshg; + double BSIM4v3ngcon; + + /* Length Dependence */ + double BSIM4v3lcdsc; + double BSIM4v3lcdscb; + double BSIM4v3lcdscd; + double BSIM4v3lcit; + double BSIM4v3lnfactor; + double BSIM4v3lxj; + double BSIM4v3lvsat; + double BSIM4v3lat; + double BSIM4v3la0; + double BSIM4v3lags; + double BSIM4v3la1; + double BSIM4v3la2; + double BSIM4v3lketa; + double BSIM4v3lnsub; + double BSIM4v3lndep; + double BSIM4v3lnsd; + double BSIM4v3lphin; + double BSIM4v3lngate; + double BSIM4v3lgamma1; + double BSIM4v3lgamma2; + double BSIM4v3lvbx; + double BSIM4v3lvbm; + double BSIM4v3lxt; + double BSIM4v3lk1; + double BSIM4v3lkt1; + double BSIM4v3lkt1l; + double BSIM4v3lkt2; + double BSIM4v3lk2; + double BSIM4v3lk3; + double BSIM4v3lk3b; + double BSIM4v3lw0; + double BSIM4v3ldvtp0; + double BSIM4v3ldvtp1; + double BSIM4v3llpe0; + double BSIM4v3llpeb; + double BSIM4v3ldvt0; + double BSIM4v3ldvt1; + double BSIM4v3ldvt2; + double BSIM4v3ldvt0w; + double BSIM4v3ldvt1w; + double BSIM4v3ldvt2w; + double BSIM4v3ldrout; + double BSIM4v3ldsub; + double BSIM4v3lvth0; + double BSIM4v3lua; + double BSIM4v3lua1; + double BSIM4v3lub; + double BSIM4v3lub1; + double BSIM4v3luc; + double BSIM4v3luc1; + double BSIM4v3lu0; + double BSIM4v3leu; + double BSIM4v3lute; + double BSIM4v3lvoff; + double BSIM4v3lminv; + double BSIM4v3ldelta; + double BSIM4v3lrdsw; + double BSIM4v3lrsw; + double BSIM4v3lrdw; + double BSIM4v3lprwg; + double BSIM4v3lprwb; + double BSIM4v3lprt; + double BSIM4v3leta0; + double BSIM4v3letab; + double BSIM4v3lpclm; + double BSIM4v3lpdibl1; + double BSIM4v3lpdibl2; + double BSIM4v3lpdiblb; + double BSIM4v3lfprout; + double BSIM4v3lpdits; + double BSIM4v3lpditsd; + double BSIM4v3lpscbe1; + double BSIM4v3lpscbe2; + double BSIM4v3lpvag; + double BSIM4v3lwr; + double BSIM4v3ldwg; + double BSIM4v3ldwb; + double BSIM4v3lb0; + double BSIM4v3lb1; + double BSIM4v3lalpha0; + double BSIM4v3lalpha1; + double BSIM4v3lbeta0; + double BSIM4v3lvfb; + double BSIM4v3lagidl; + double BSIM4v3lbgidl; + double BSIM4v3lcgidl; + double BSIM4v3legidl; + double BSIM4v3laigc; + double BSIM4v3lbigc; + double BSIM4v3lcigc; + double BSIM4v3laigsd; + double BSIM4v3lbigsd; + double BSIM4v3lcigsd; + double BSIM4v3laigbacc; + double BSIM4v3lbigbacc; + double BSIM4v3lcigbacc; + double BSIM4v3laigbinv; + double BSIM4v3lbigbinv; + double BSIM4v3lcigbinv; + double BSIM4v3lnigc; + double BSIM4v3lnigbacc; + double BSIM4v3lnigbinv; + double BSIM4v3lntox; + double BSIM4v3leigbinv; + double BSIM4v3lpigcd; + double BSIM4v3lpoxedge; + double BSIM4v3lxrcrg1; + double BSIM4v3lxrcrg2; + double BSIM4v3llambda; + double BSIM4v3lvtl; + double BSIM4v3lxn; + + /* CV model */ + double BSIM4v3lcgsl; + double BSIM4v3lcgdl; + double BSIM4v3lckappas; + double BSIM4v3lckappad; + double BSIM4v3lcf; + double BSIM4v3lclc; + double BSIM4v3lcle; + double BSIM4v3lvfbcv; + double BSIM4v3lnoff; + double BSIM4v3lvoffcv; + double BSIM4v3lacde; + double BSIM4v3lmoin; + + /* Width Dependence */ + double BSIM4v3wcdsc; + double BSIM4v3wcdscb; + double BSIM4v3wcdscd; + double BSIM4v3wcit; + double BSIM4v3wnfactor; + double BSIM4v3wxj; + double BSIM4v3wvsat; + double BSIM4v3wat; + double BSIM4v3wa0; + double BSIM4v3wags; + double BSIM4v3wa1; + double BSIM4v3wa2; + double BSIM4v3wketa; + double BSIM4v3wnsub; + double BSIM4v3wndep; + double BSIM4v3wnsd; + double BSIM4v3wphin; + double BSIM4v3wngate; + double BSIM4v3wgamma1; + double BSIM4v3wgamma2; + double BSIM4v3wvbx; + double BSIM4v3wvbm; + double BSIM4v3wxt; + double BSIM4v3wk1; + double BSIM4v3wkt1; + double BSIM4v3wkt1l; + double BSIM4v3wkt2; + double BSIM4v3wk2; + double BSIM4v3wk3; + double BSIM4v3wk3b; + double BSIM4v3ww0; + double BSIM4v3wdvtp0; + double BSIM4v3wdvtp1; + double BSIM4v3wlpe0; + double BSIM4v3wlpeb; + double BSIM4v3wdvt0; + double BSIM4v3wdvt1; + double BSIM4v3wdvt2; + double BSIM4v3wdvt0w; + double BSIM4v3wdvt1w; + double BSIM4v3wdvt2w; + double BSIM4v3wdrout; + double BSIM4v3wdsub; + double BSIM4v3wvth0; + double BSIM4v3wua; + double BSIM4v3wua1; + double BSIM4v3wub; + double BSIM4v3wub1; + double BSIM4v3wuc; + double BSIM4v3wuc1; + double BSIM4v3wu0; + double BSIM4v3weu; + double BSIM4v3wute; + double BSIM4v3wvoff; + double BSIM4v3wminv; + double BSIM4v3wdelta; + double BSIM4v3wrdsw; + double BSIM4v3wrsw; + double BSIM4v3wrdw; + double BSIM4v3wprwg; + double BSIM4v3wprwb; + double BSIM4v3wprt; + double BSIM4v3weta0; + double BSIM4v3wetab; + double BSIM4v3wpclm; + double BSIM4v3wpdibl1; + double BSIM4v3wpdibl2; + double BSIM4v3wpdiblb; + double BSIM4v3wfprout; + double BSIM4v3wpdits; + double BSIM4v3wpditsd; + double BSIM4v3wpscbe1; + double BSIM4v3wpscbe2; + double BSIM4v3wpvag; + double BSIM4v3wwr; + double BSIM4v3wdwg; + double BSIM4v3wdwb; + double BSIM4v3wb0; + double BSIM4v3wb1; + double BSIM4v3walpha0; + double BSIM4v3walpha1; + double BSIM4v3wbeta0; + double BSIM4v3wvfb; + double BSIM4v3wagidl; + double BSIM4v3wbgidl; + double BSIM4v3wcgidl; + double BSIM4v3wegidl; + double BSIM4v3waigc; + double BSIM4v3wbigc; + double BSIM4v3wcigc; + double BSIM4v3waigsd; + double BSIM4v3wbigsd; + double BSIM4v3wcigsd; + double BSIM4v3waigbacc; + double BSIM4v3wbigbacc; + double BSIM4v3wcigbacc; + double BSIM4v3waigbinv; + double BSIM4v3wbigbinv; + double BSIM4v3wcigbinv; + double BSIM4v3wnigc; + double BSIM4v3wnigbacc; + double BSIM4v3wnigbinv; + double BSIM4v3wntox; + double BSIM4v3weigbinv; + double BSIM4v3wpigcd; + double BSIM4v3wpoxedge; + double BSIM4v3wxrcrg1; + double BSIM4v3wxrcrg2; + double BSIM4v3wlambda; + double BSIM4v3wvtl; + double BSIM4v3wxn; + + /* CV model */ + double BSIM4v3wcgsl; + double BSIM4v3wcgdl; + double BSIM4v3wckappas; + double BSIM4v3wckappad; + double BSIM4v3wcf; + double BSIM4v3wclc; + double BSIM4v3wcle; + double BSIM4v3wvfbcv; + double BSIM4v3wnoff; + double BSIM4v3wvoffcv; + double BSIM4v3wacde; + double BSIM4v3wmoin; + + /* Cross-term Dependence */ + double BSIM4v3pcdsc; + double BSIM4v3pcdscb; + double BSIM4v3pcdscd; + double BSIM4v3pcit; + double BSIM4v3pnfactor; + double BSIM4v3pxj; + double BSIM4v3pvsat; + double BSIM4v3pat; + double BSIM4v3pa0; + double BSIM4v3pags; + double BSIM4v3pa1; + double BSIM4v3pa2; + double BSIM4v3pketa; + double BSIM4v3pnsub; + double BSIM4v3pndep; + double BSIM4v3pnsd; + double BSIM4v3pphin; + double BSIM4v3pngate; + double BSIM4v3pgamma1; + double BSIM4v3pgamma2; + double BSIM4v3pvbx; + double BSIM4v3pvbm; + double BSIM4v3pxt; + double BSIM4v3pk1; + double BSIM4v3pkt1; + double BSIM4v3pkt1l; + double BSIM4v3pkt2; + double BSIM4v3pk2; + double BSIM4v3pk3; + double BSIM4v3pk3b; + double BSIM4v3pw0; + double BSIM4v3pdvtp0; + double BSIM4v3pdvtp1; + double BSIM4v3plpe0; + double BSIM4v3plpeb; + double BSIM4v3pdvt0; + double BSIM4v3pdvt1; + double BSIM4v3pdvt2; + double BSIM4v3pdvt0w; + double BSIM4v3pdvt1w; + double BSIM4v3pdvt2w; + double BSIM4v3pdrout; + double BSIM4v3pdsub; + double BSIM4v3pvth0; + double BSIM4v3pua; + double BSIM4v3pua1; + double BSIM4v3pub; + double BSIM4v3pub1; + double BSIM4v3puc; + double BSIM4v3puc1; + double BSIM4v3pu0; + double BSIM4v3peu; + double BSIM4v3pute; + double BSIM4v3pvoff; + double BSIM4v3pminv; + double BSIM4v3pdelta; + double BSIM4v3prdsw; + double BSIM4v3prsw; + double BSIM4v3prdw; + double BSIM4v3pprwg; + double BSIM4v3pprwb; + double BSIM4v3pprt; + double BSIM4v3peta0; + double BSIM4v3petab; + double BSIM4v3ppclm; + double BSIM4v3ppdibl1; + double BSIM4v3ppdibl2; + double BSIM4v3ppdiblb; + double BSIM4v3pfprout; + double BSIM4v3ppdits; + double BSIM4v3ppditsd; + double BSIM4v3ppscbe1; + double BSIM4v3ppscbe2; + double BSIM4v3ppvag; + double BSIM4v3pwr; + double BSIM4v3pdwg; + double BSIM4v3pdwb; + double BSIM4v3pb0; + double BSIM4v3pb1; + double BSIM4v3palpha0; + double BSIM4v3palpha1; + double BSIM4v3pbeta0; + double BSIM4v3pvfb; + double BSIM4v3pagidl; + double BSIM4v3pbgidl; + double BSIM4v3pcgidl; + double BSIM4v3pegidl; + double BSIM4v3paigc; + double BSIM4v3pbigc; + double BSIM4v3pcigc; + double BSIM4v3paigsd; + double BSIM4v3pbigsd; + double BSIM4v3pcigsd; + double BSIM4v3paigbacc; + double BSIM4v3pbigbacc; + double BSIM4v3pcigbacc; + double BSIM4v3paigbinv; + double BSIM4v3pbigbinv; + double BSIM4v3pcigbinv; + double BSIM4v3pnigc; + double BSIM4v3pnigbacc; + double BSIM4v3pnigbinv; + double BSIM4v3pntox; + double BSIM4v3peigbinv; + double BSIM4v3ppigcd; + double BSIM4v3ppoxedge; + double BSIM4v3pxrcrg1; + double BSIM4v3pxrcrg2; + double BSIM4v3plambda; + double BSIM4v3pvtl; + double BSIM4v3pxn; + + /* CV model */ + double BSIM4v3pcgsl; + double BSIM4v3pcgdl; + double BSIM4v3pckappas; + double BSIM4v3pckappad; + double BSIM4v3pcf; + double BSIM4v3pclc; + double BSIM4v3pcle; + double BSIM4v3pvfbcv; + double BSIM4v3pnoff; + double BSIM4v3pvoffcv; + double BSIM4v3pacde; + double BSIM4v3pmoin; + + double BSIM4v3tnom; + double BSIM4v3cgso; + double BSIM4v3cgdo; + double BSIM4v3cgbo; + double BSIM4v3xpart; + double BSIM4v3cFringOut; + double BSIM4v3cFringMax; + + double BSIM4v3sheetResistance; + double BSIM4v3SjctSatCurDensity; + double BSIM4v3DjctSatCurDensity; + double BSIM4v3SjctSidewallSatCurDensity; + double BSIM4v3DjctSidewallSatCurDensity; + double BSIM4v3SjctGateSidewallSatCurDensity; + double BSIM4v3DjctGateSidewallSatCurDensity; + double BSIM4v3SbulkJctPotential; + double BSIM4v3DbulkJctPotential; + double BSIM4v3SbulkJctBotGradingCoeff; + double BSIM4v3DbulkJctBotGradingCoeff; + double BSIM4v3SbulkJctSideGradingCoeff; + double BSIM4v3DbulkJctSideGradingCoeff; + double BSIM4v3SbulkJctGateSideGradingCoeff; + double BSIM4v3DbulkJctGateSideGradingCoeff; + double BSIM4v3SsidewallJctPotential; + double BSIM4v3DsidewallJctPotential; + double BSIM4v3SGatesidewallJctPotential; + double BSIM4v3DGatesidewallJctPotential; + double BSIM4v3SunitAreaJctCap; + double BSIM4v3DunitAreaJctCap; + double BSIM4v3SunitLengthSidewallJctCap; + double BSIM4v3DunitLengthSidewallJctCap; + double BSIM4v3SunitLengthGateSidewallJctCap; + double BSIM4v3DunitLengthGateSidewallJctCap; + double BSIM4v3SjctEmissionCoeff; + double BSIM4v3DjctEmissionCoeff; + double BSIM4v3SjctTempExponent; + double BSIM4v3DjctTempExponent; + + double BSIM4v3Lint; + double BSIM4v3Ll; + double BSIM4v3Llc; + double BSIM4v3Lln; + double BSIM4v3Lw; + double BSIM4v3Lwc; + double BSIM4v3Lwn; + double BSIM4v3Lwl; + double BSIM4v3Lwlc; + double BSIM4v3Lmin; + double BSIM4v3Lmax; + + double BSIM4v3Wint; + double BSIM4v3Wl; + double BSIM4v3Wlc; + double BSIM4v3Wln; + double BSIM4v3Ww; + double BSIM4v3Wwc; + double BSIM4v3Wwn; + double BSIM4v3Wwl; + double BSIM4v3Wwlc; + double BSIM4v3Wmin; + double BSIM4v3Wmax; + + /* added for stress effect */ + double BSIM4v3saref; + double BSIM4v3sbref; + double BSIM4v3wlod; + double BSIM4v3ku0; + double BSIM4v3kvsat; + double BSIM4v3kvth0; + double BSIM4v3tku0; + double BSIM4v3llodku0; + double BSIM4v3wlodku0; + double BSIM4v3llodvth; + double BSIM4v3wlodvth; + double BSIM4v3lku0; + double BSIM4v3wku0; + double BSIM4v3pku0; + double BSIM4v3lkvth0; + double BSIM4v3wkvth0; + double BSIM4v3pkvth0; + double BSIM4v3stk2; + double BSIM4v3lodk2; + double BSIM4v3steta0; + double BSIM4v3lodeta0; + + + +/* Pre-calculated constants + * move to size-dependent param */ + double BSIM4v3vtm; + double BSIM4v3coxe; + double BSIM4v3coxp; + double BSIM4v3cof1; + double BSIM4v3cof2; + double BSIM4v3cof3; + double BSIM4v3cof4; + double BSIM4v3vcrit; + double BSIM4v3factor1; + double BSIM4v3PhiBS; + double BSIM4v3PhiBSWS; + double BSIM4v3PhiBSWGS; + double BSIM4v3SjctTempSatCurDensity; + double BSIM4v3SjctSidewallTempSatCurDensity; + double BSIM4v3SjctGateSidewallTempSatCurDensity; + double BSIM4v3PhiBD; + double BSIM4v3PhiBSWD; + double BSIM4v3PhiBSWGD; + double BSIM4v3DjctTempSatCurDensity; + double BSIM4v3DjctSidewallTempSatCurDensity; + double BSIM4v3DjctGateSidewallTempSatCurDensity; + double BSIM4v3SunitAreaTempJctCap; + double BSIM4v3DunitAreaTempJctCap; + double BSIM4v3SunitLengthSidewallTempJctCap; + double BSIM4v3DunitLengthSidewallTempJctCap; + double BSIM4v3SunitLengthGateSidewallTempJctCap; + double BSIM4v3DunitLengthGateSidewallTempJctCap; + + double BSIM4v3oxideTrapDensityA; + double BSIM4v3oxideTrapDensityB; + double BSIM4v3oxideTrapDensityC; + double BSIM4v3em; + double BSIM4v3ef; + double BSIM4v3af; + double BSIM4v3kf; + + struct bsim4v3SizeDependParam *pSizeDependParamKnot; + + /* Flags */ + unsigned BSIM4v3mobModGiven :1; + unsigned BSIM4v3binUnitGiven :1; + unsigned BSIM4v3capModGiven :1; + unsigned BSIM4v3dioModGiven :1; + unsigned BSIM4v3rdsModGiven :1; + unsigned BSIM4v3rbodyModGiven :1; + unsigned BSIM4v3rgateModGiven :1; + unsigned BSIM4v3perModGiven :1; + unsigned BSIM4v3geoModGiven :1; + unsigned BSIM4v3paramChkGiven :1; + unsigned BSIM4v3trnqsModGiven :1; + unsigned BSIM4v3acnqsModGiven :1; + unsigned BSIM4v3fnoiModGiven :1; + unsigned BSIM4v3tnoiModGiven :1; + unsigned BSIM4v3igcModGiven :1; + unsigned BSIM4v3igbModGiven :1; + unsigned BSIM4v3tempModGiven :1; + unsigned BSIM4v3typeGiven :1; + unsigned BSIM4v3toxrefGiven :1; + unsigned BSIM4v3toxeGiven :1; + unsigned BSIM4v3toxpGiven :1; + unsigned BSIM4v3toxmGiven :1; + unsigned BSIM4v3dtoxGiven :1; + unsigned BSIM4v3epsroxGiven :1; + unsigned BSIM4v3versionGiven :1; + unsigned BSIM4v3cdscGiven :1; + unsigned BSIM4v3cdscbGiven :1; + unsigned BSIM4v3cdscdGiven :1; + unsigned BSIM4v3citGiven :1; + unsigned BSIM4v3nfactorGiven :1; + unsigned BSIM4v3xjGiven :1; + unsigned BSIM4v3vsatGiven :1; + unsigned BSIM4v3atGiven :1; + unsigned BSIM4v3a0Given :1; + unsigned BSIM4v3agsGiven :1; + unsigned BSIM4v3a1Given :1; + unsigned BSIM4v3a2Given :1; + unsigned BSIM4v3ketaGiven :1; + unsigned BSIM4v3nsubGiven :1; + unsigned BSIM4v3ndepGiven :1; + unsigned BSIM4v3nsdGiven :1; + unsigned BSIM4v3phinGiven :1; + unsigned BSIM4v3ngateGiven :1; + unsigned BSIM4v3gamma1Given :1; + unsigned BSIM4v3gamma2Given :1; + unsigned BSIM4v3vbxGiven :1; + unsigned BSIM4v3vbmGiven :1; + unsigned BSIM4v3xtGiven :1; + unsigned BSIM4v3k1Given :1; + unsigned BSIM4v3kt1Given :1; + unsigned BSIM4v3kt1lGiven :1; + unsigned BSIM4v3kt2Given :1; + unsigned BSIM4v3k2Given :1; + unsigned BSIM4v3k3Given :1; + unsigned BSIM4v3k3bGiven :1; + unsigned BSIM4v3w0Given :1; + unsigned BSIM4v3dvtp0Given :1; + unsigned BSIM4v3dvtp1Given :1; + unsigned BSIM4v3lpe0Given :1; + unsigned BSIM4v3lpebGiven :1; + unsigned BSIM4v3dvt0Given :1; + unsigned BSIM4v3dvt1Given :1; + unsigned BSIM4v3dvt2Given :1; + unsigned BSIM4v3dvt0wGiven :1; + unsigned BSIM4v3dvt1wGiven :1; + unsigned BSIM4v3dvt2wGiven :1; + unsigned BSIM4v3droutGiven :1; + unsigned BSIM4v3dsubGiven :1; + unsigned BSIM4v3vth0Given :1; + unsigned BSIM4v3euGiven :1; + unsigned BSIM4v3uaGiven :1; + unsigned BSIM4v3ua1Given :1; + unsigned BSIM4v3ubGiven :1; + unsigned BSIM4v3ub1Given :1; + unsigned BSIM4v3ucGiven :1; + unsigned BSIM4v3uc1Given :1; + unsigned BSIM4v3u0Given :1; + unsigned BSIM4v3uteGiven :1; + unsigned BSIM4v3voffGiven :1; + unsigned BSIM4v3vofflGiven :1; + unsigned BSIM4v3minvGiven :1; + unsigned BSIM4v3rdswGiven :1; + unsigned BSIM4v3rdswminGiven :1; + unsigned BSIM4v3rdwminGiven :1; + unsigned BSIM4v3rswminGiven :1; + unsigned BSIM4v3rswGiven :1; + unsigned BSIM4v3rdwGiven :1; + unsigned BSIM4v3prwgGiven :1; + unsigned BSIM4v3prwbGiven :1; + unsigned BSIM4v3prtGiven :1; + unsigned BSIM4v3eta0Given :1; + unsigned BSIM4v3etabGiven :1; + unsigned BSIM4v3pclmGiven :1; + unsigned BSIM4v3pdibl1Given :1; + unsigned BSIM4v3pdibl2Given :1; + unsigned BSIM4v3pdiblbGiven :1; + unsigned BSIM4v3fproutGiven :1; + unsigned BSIM4v3pditsGiven :1; + unsigned BSIM4v3pditsdGiven :1; + unsigned BSIM4v3pditslGiven :1; + unsigned BSIM4v3pscbe1Given :1; + unsigned BSIM4v3pscbe2Given :1; + unsigned BSIM4v3pvagGiven :1; + unsigned BSIM4v3deltaGiven :1; + unsigned BSIM4v3wrGiven :1; + unsigned BSIM4v3dwgGiven :1; + unsigned BSIM4v3dwbGiven :1; + unsigned BSIM4v3b0Given :1; + unsigned BSIM4v3b1Given :1; + unsigned BSIM4v3alpha0Given :1; + unsigned BSIM4v3alpha1Given :1; + unsigned BSIM4v3beta0Given :1; + unsigned BSIM4v3agidlGiven :1; + unsigned BSIM4v3bgidlGiven :1; + unsigned BSIM4v3cgidlGiven :1; + unsigned BSIM4v3egidlGiven :1; + unsigned BSIM4v3aigcGiven :1; + unsigned BSIM4v3bigcGiven :1; + unsigned BSIM4v3cigcGiven :1; + unsigned BSIM4v3aigsdGiven :1; + unsigned BSIM4v3bigsdGiven :1; + unsigned BSIM4v3cigsdGiven :1; + unsigned BSIM4v3aigbaccGiven :1; + unsigned BSIM4v3bigbaccGiven :1; + unsigned BSIM4v3cigbaccGiven :1; + unsigned BSIM4v3aigbinvGiven :1; + unsigned BSIM4v3bigbinvGiven :1; + unsigned BSIM4v3cigbinvGiven :1; + unsigned BSIM4v3nigcGiven :1; + unsigned BSIM4v3nigbinvGiven :1; + unsigned BSIM4v3nigbaccGiven :1; + unsigned BSIM4v3ntoxGiven :1; + unsigned BSIM4v3eigbinvGiven :1; + unsigned BSIM4v3pigcdGiven :1; + unsigned BSIM4v3poxedgeGiven :1; + unsigned BSIM4v3ijthdfwdGiven :1; + unsigned BSIM4v3ijthsfwdGiven :1; + unsigned BSIM4v3ijthdrevGiven :1; + unsigned BSIM4v3ijthsrevGiven :1; + unsigned BSIM4v3xjbvdGiven :1; + unsigned BSIM4v3xjbvsGiven :1; + unsigned BSIM4v3bvdGiven :1; + unsigned BSIM4v3bvsGiven :1; + unsigned BSIM4v3vfbGiven :1; + unsigned BSIM4v3gbminGiven :1; + unsigned BSIM4v3rbdbGiven :1; + unsigned BSIM4v3rbsbGiven :1; + unsigned BSIM4v3rbpsGiven :1; + unsigned BSIM4v3rbpdGiven :1; + unsigned BSIM4v3rbpbGiven :1; + unsigned BSIM4v3xrcrg1Given :1; + unsigned BSIM4v3xrcrg2Given :1; + unsigned BSIM4v3tnoiaGiven :1; + unsigned BSIM4v3tnoibGiven :1; + unsigned BSIM4v3rnoiaGiven :1; + unsigned BSIM4v3rnoibGiven :1; + unsigned BSIM4v3ntnoiGiven :1; + + unsigned BSIM4v3lambdaGiven :1; + unsigned BSIM4v3vtlGiven :1; + unsigned BSIM4v3lcGiven :1; + unsigned BSIM4v3xnGiven :1; + + /* CV model and parasitics */ + unsigned BSIM4v3cgslGiven :1; + unsigned BSIM4v3cgdlGiven :1; + unsigned BSIM4v3ckappasGiven :1; + unsigned BSIM4v3ckappadGiven :1; + unsigned BSIM4v3cfGiven :1; + unsigned BSIM4v3vfbcvGiven :1; + unsigned BSIM4v3clcGiven :1; + unsigned BSIM4v3cleGiven :1; + unsigned BSIM4v3dwcGiven :1; + unsigned BSIM4v3dlcGiven :1; + unsigned BSIM4v3xwGiven :1; + unsigned BSIM4v3xlGiven :1; + unsigned BSIM4v3dlcigGiven :1; + unsigned BSIM4v3dwjGiven :1; + unsigned BSIM4v3noffGiven :1; + unsigned BSIM4v3voffcvGiven :1; + unsigned BSIM4v3acdeGiven :1; + unsigned BSIM4v3moinGiven :1; + unsigned BSIM4v3tcjGiven :1; + unsigned BSIM4v3tcjswGiven :1; + unsigned BSIM4v3tcjswgGiven :1; + unsigned BSIM4v3tpbGiven :1; + unsigned BSIM4v3tpbswGiven :1; + unsigned BSIM4v3tpbswgGiven :1; + unsigned BSIM4v3dmcgGiven :1; + unsigned BSIM4v3dmciGiven :1; + unsigned BSIM4v3dmdgGiven :1; + unsigned BSIM4v3dmcgtGiven :1; + unsigned BSIM4v3xgwGiven :1; + unsigned BSIM4v3xglGiven :1; + unsigned BSIM4v3rshgGiven :1; + unsigned BSIM4v3ngconGiven :1; + + + /* Length dependence */ + unsigned BSIM4v3lcdscGiven :1; + unsigned BSIM4v3lcdscbGiven :1; + unsigned BSIM4v3lcdscdGiven :1; + unsigned BSIM4v3lcitGiven :1; + unsigned BSIM4v3lnfactorGiven :1; + unsigned BSIM4v3lxjGiven :1; + unsigned BSIM4v3lvsatGiven :1; + unsigned BSIM4v3latGiven :1; + unsigned BSIM4v3la0Given :1; + unsigned BSIM4v3lagsGiven :1; + unsigned BSIM4v3la1Given :1; + unsigned BSIM4v3la2Given :1; + unsigned BSIM4v3lketaGiven :1; + unsigned BSIM4v3lnsubGiven :1; + unsigned BSIM4v3lndepGiven :1; + unsigned BSIM4v3lnsdGiven :1; + unsigned BSIM4v3lphinGiven :1; + unsigned BSIM4v3lngateGiven :1; + unsigned BSIM4v3lgamma1Given :1; + unsigned BSIM4v3lgamma2Given :1; + unsigned BSIM4v3lvbxGiven :1; + unsigned BSIM4v3lvbmGiven :1; + unsigned BSIM4v3lxtGiven :1; + unsigned BSIM4v3lk1Given :1; + unsigned BSIM4v3lkt1Given :1; + unsigned BSIM4v3lkt1lGiven :1; + unsigned BSIM4v3lkt2Given :1; + unsigned BSIM4v3lk2Given :1; + unsigned BSIM4v3lk3Given :1; + unsigned BSIM4v3lk3bGiven :1; + unsigned BSIM4v3lw0Given :1; + unsigned BSIM4v3ldvtp0Given :1; + unsigned BSIM4v3ldvtp1Given :1; + unsigned BSIM4v3llpe0Given :1; + unsigned BSIM4v3llpebGiven :1; + unsigned BSIM4v3ldvt0Given :1; + unsigned BSIM4v3ldvt1Given :1; + unsigned BSIM4v3ldvt2Given :1; + unsigned BSIM4v3ldvt0wGiven :1; + unsigned BSIM4v3ldvt1wGiven :1; + unsigned BSIM4v3ldvt2wGiven :1; + unsigned BSIM4v3ldroutGiven :1; + unsigned BSIM4v3ldsubGiven :1; + unsigned BSIM4v3lvth0Given :1; + unsigned BSIM4v3luaGiven :1; + unsigned BSIM4v3lua1Given :1; + unsigned BSIM4v3lubGiven :1; + unsigned BSIM4v3lub1Given :1; + unsigned BSIM4v3lucGiven :1; + unsigned BSIM4v3luc1Given :1; + unsigned BSIM4v3lu0Given :1; + unsigned BSIM4v3leuGiven :1; + unsigned BSIM4v3luteGiven :1; + unsigned BSIM4v3lvoffGiven :1; + unsigned BSIM4v3lminvGiven :1; + unsigned BSIM4v3lrdswGiven :1; + unsigned BSIM4v3lrswGiven :1; + unsigned BSIM4v3lrdwGiven :1; + unsigned BSIM4v3lprwgGiven :1; + unsigned BSIM4v3lprwbGiven :1; + unsigned BSIM4v3lprtGiven :1; + unsigned BSIM4v3leta0Given :1; + unsigned BSIM4v3letabGiven :1; + unsigned BSIM4v3lpclmGiven :1; + unsigned BSIM4v3lpdibl1Given :1; + unsigned BSIM4v3lpdibl2Given :1; + unsigned BSIM4v3lpdiblbGiven :1; + unsigned BSIM4v3lfproutGiven :1; + unsigned BSIM4v3lpditsGiven :1; + unsigned BSIM4v3lpditsdGiven :1; + unsigned BSIM4v3lpscbe1Given :1; + unsigned BSIM4v3lpscbe2Given :1; + unsigned BSIM4v3lpvagGiven :1; + unsigned BSIM4v3ldeltaGiven :1; + unsigned BSIM4v3lwrGiven :1; + unsigned BSIM4v3ldwgGiven :1; + unsigned BSIM4v3ldwbGiven :1; + unsigned BSIM4v3lb0Given :1; + unsigned BSIM4v3lb1Given :1; + unsigned BSIM4v3lalpha0Given :1; + unsigned BSIM4v3lalpha1Given :1; + unsigned BSIM4v3lbeta0Given :1; + unsigned BSIM4v3lvfbGiven :1; + unsigned BSIM4v3lagidlGiven :1; + unsigned BSIM4v3lbgidlGiven :1; + unsigned BSIM4v3lcgidlGiven :1; + unsigned BSIM4v3legidlGiven :1; + unsigned BSIM4v3laigcGiven :1; + unsigned BSIM4v3lbigcGiven :1; + unsigned BSIM4v3lcigcGiven :1; + unsigned BSIM4v3laigsdGiven :1; + unsigned BSIM4v3lbigsdGiven :1; + unsigned BSIM4v3lcigsdGiven :1; + unsigned BSIM4v3laigbaccGiven :1; + unsigned BSIM4v3lbigbaccGiven :1; + unsigned BSIM4v3lcigbaccGiven :1; + unsigned BSIM4v3laigbinvGiven :1; + unsigned BSIM4v3lbigbinvGiven :1; + unsigned BSIM4v3lcigbinvGiven :1; + unsigned BSIM4v3lnigcGiven :1; + unsigned BSIM4v3lnigbinvGiven :1; + unsigned BSIM4v3lnigbaccGiven :1; + unsigned BSIM4v3lntoxGiven :1; + unsigned BSIM4v3leigbinvGiven :1; + unsigned BSIM4v3lpigcdGiven :1; + unsigned BSIM4v3lpoxedgeGiven :1; + unsigned BSIM4v3lxrcrg1Given :1; + unsigned BSIM4v3lxrcrg2Given :1; + unsigned BSIM4v3llambdaGiven :1; + unsigned BSIM4v3lvtlGiven :1; + unsigned BSIM4v3lxnGiven :1; + + /* CV model */ + unsigned BSIM4v3lcgslGiven :1; + unsigned BSIM4v3lcgdlGiven :1; + unsigned BSIM4v3lckappasGiven :1; + unsigned BSIM4v3lckappadGiven :1; + unsigned BSIM4v3lcfGiven :1; + unsigned BSIM4v3lclcGiven :1; + unsigned BSIM4v3lcleGiven :1; + unsigned BSIM4v3lvfbcvGiven :1; + unsigned BSIM4v3lnoffGiven :1; + unsigned BSIM4v3lvoffcvGiven :1; + unsigned BSIM4v3lacdeGiven :1; + unsigned BSIM4v3lmoinGiven :1; + + /* Width dependence */ + unsigned BSIM4v3wcdscGiven :1; + unsigned BSIM4v3wcdscbGiven :1; + unsigned BSIM4v3wcdscdGiven :1; + unsigned BSIM4v3wcitGiven :1; + unsigned BSIM4v3wnfactorGiven :1; + unsigned BSIM4v3wxjGiven :1; + unsigned BSIM4v3wvsatGiven :1; + unsigned BSIM4v3watGiven :1; + unsigned BSIM4v3wa0Given :1; + unsigned BSIM4v3wagsGiven :1; + unsigned BSIM4v3wa1Given :1; + unsigned BSIM4v3wa2Given :1; + unsigned BSIM4v3wketaGiven :1; + unsigned BSIM4v3wnsubGiven :1; + unsigned BSIM4v3wndepGiven :1; + unsigned BSIM4v3wnsdGiven :1; + unsigned BSIM4v3wphinGiven :1; + unsigned BSIM4v3wngateGiven :1; + unsigned BSIM4v3wgamma1Given :1; + unsigned BSIM4v3wgamma2Given :1; + unsigned BSIM4v3wvbxGiven :1; + unsigned BSIM4v3wvbmGiven :1; + unsigned BSIM4v3wxtGiven :1; + unsigned BSIM4v3wk1Given :1; + unsigned BSIM4v3wkt1Given :1; + unsigned BSIM4v3wkt1lGiven :1; + unsigned BSIM4v3wkt2Given :1; + unsigned BSIM4v3wk2Given :1; + unsigned BSIM4v3wk3Given :1; + unsigned BSIM4v3wk3bGiven :1; + unsigned BSIM4v3ww0Given :1; + unsigned BSIM4v3wdvtp0Given :1; + unsigned BSIM4v3wdvtp1Given :1; + unsigned BSIM4v3wlpe0Given :1; + unsigned BSIM4v3wlpebGiven :1; + unsigned BSIM4v3wdvt0Given :1; + unsigned BSIM4v3wdvt1Given :1; + unsigned BSIM4v3wdvt2Given :1; + unsigned BSIM4v3wdvt0wGiven :1; + unsigned BSIM4v3wdvt1wGiven :1; + unsigned BSIM4v3wdvt2wGiven :1; + unsigned BSIM4v3wdroutGiven :1; + unsigned BSIM4v3wdsubGiven :1; + unsigned BSIM4v3wvth0Given :1; + unsigned BSIM4v3wuaGiven :1; + unsigned BSIM4v3wua1Given :1; + unsigned BSIM4v3wubGiven :1; + unsigned BSIM4v3wub1Given :1; + unsigned BSIM4v3wucGiven :1; + unsigned BSIM4v3wuc1Given :1; + unsigned BSIM4v3wu0Given :1; + unsigned BSIM4v3weuGiven :1; + unsigned BSIM4v3wuteGiven :1; + unsigned BSIM4v3wvoffGiven :1; + unsigned BSIM4v3wminvGiven :1; + unsigned BSIM4v3wrdswGiven :1; + unsigned BSIM4v3wrswGiven :1; + unsigned BSIM4v3wrdwGiven :1; + unsigned BSIM4v3wprwgGiven :1; + unsigned BSIM4v3wprwbGiven :1; + unsigned BSIM4v3wprtGiven :1; + unsigned BSIM4v3weta0Given :1; + unsigned BSIM4v3wetabGiven :1; + unsigned BSIM4v3wpclmGiven :1; + unsigned BSIM4v3wpdibl1Given :1; + unsigned BSIM4v3wpdibl2Given :1; + unsigned BSIM4v3wpdiblbGiven :1; + unsigned BSIM4v3wfproutGiven :1; + unsigned BSIM4v3wpditsGiven :1; + unsigned BSIM4v3wpditsdGiven :1; + unsigned BSIM4v3wpscbe1Given :1; + unsigned BSIM4v3wpscbe2Given :1; + unsigned BSIM4v3wpvagGiven :1; + unsigned BSIM4v3wdeltaGiven :1; + unsigned BSIM4v3wwrGiven :1; + unsigned BSIM4v3wdwgGiven :1; + unsigned BSIM4v3wdwbGiven :1; + unsigned BSIM4v3wb0Given :1; + unsigned BSIM4v3wb1Given :1; + unsigned BSIM4v3walpha0Given :1; + unsigned BSIM4v3walpha1Given :1; + unsigned BSIM4v3wbeta0Given :1; + unsigned BSIM4v3wvfbGiven :1; + unsigned BSIM4v3wagidlGiven :1; + unsigned BSIM4v3wbgidlGiven :1; + unsigned BSIM4v3wcgidlGiven :1; + unsigned BSIM4v3wegidlGiven :1; + unsigned BSIM4v3waigcGiven :1; + unsigned BSIM4v3wbigcGiven :1; + unsigned BSIM4v3wcigcGiven :1; + unsigned BSIM4v3waigsdGiven :1; + unsigned BSIM4v3wbigsdGiven :1; + unsigned BSIM4v3wcigsdGiven :1; + unsigned BSIM4v3waigbaccGiven :1; + unsigned BSIM4v3wbigbaccGiven :1; + unsigned BSIM4v3wcigbaccGiven :1; + unsigned BSIM4v3waigbinvGiven :1; + unsigned BSIM4v3wbigbinvGiven :1; + unsigned BSIM4v3wcigbinvGiven :1; + unsigned BSIM4v3wnigcGiven :1; + unsigned BSIM4v3wnigbinvGiven :1; + unsigned BSIM4v3wnigbaccGiven :1; + unsigned BSIM4v3wntoxGiven :1; + unsigned BSIM4v3weigbinvGiven :1; + unsigned BSIM4v3wpigcdGiven :1; + unsigned BSIM4v3wpoxedgeGiven :1; + unsigned BSIM4v3wxrcrg1Given :1; + unsigned BSIM4v3wxrcrg2Given :1; + unsigned BSIM4v3wlambdaGiven :1; + unsigned BSIM4v3wvtlGiven :1; + unsigned BSIM4v3wxnGiven :1; + + /* CV model */ + unsigned BSIM4v3wcgslGiven :1; + unsigned BSIM4v3wcgdlGiven :1; + unsigned BSIM4v3wckappasGiven :1; + unsigned BSIM4v3wckappadGiven :1; + unsigned BSIM4v3wcfGiven :1; + unsigned BSIM4v3wclcGiven :1; + unsigned BSIM4v3wcleGiven :1; + unsigned BSIM4v3wvfbcvGiven :1; + unsigned BSIM4v3wnoffGiven :1; + unsigned BSIM4v3wvoffcvGiven :1; + unsigned BSIM4v3wacdeGiven :1; + unsigned BSIM4v3wmoinGiven :1; + + /* Cross-term dependence */ + unsigned BSIM4v3pcdscGiven :1; + unsigned BSIM4v3pcdscbGiven :1; + unsigned BSIM4v3pcdscdGiven :1; + unsigned BSIM4v3pcitGiven :1; + unsigned BSIM4v3pnfactorGiven :1; + unsigned BSIM4v3pxjGiven :1; + unsigned BSIM4v3pvsatGiven :1; + unsigned BSIM4v3patGiven :1; + unsigned BSIM4v3pa0Given :1; + unsigned BSIM4v3pagsGiven :1; + unsigned BSIM4v3pa1Given :1; + unsigned BSIM4v3pa2Given :1; + unsigned BSIM4v3pketaGiven :1; + unsigned BSIM4v3pnsubGiven :1; + unsigned BSIM4v3pndepGiven :1; + unsigned BSIM4v3pnsdGiven :1; + unsigned BSIM4v3pphinGiven :1; + unsigned BSIM4v3pngateGiven :1; + unsigned BSIM4v3pgamma1Given :1; + unsigned BSIM4v3pgamma2Given :1; + unsigned BSIM4v3pvbxGiven :1; + unsigned BSIM4v3pvbmGiven :1; + unsigned BSIM4v3pxtGiven :1; + unsigned BSIM4v3pk1Given :1; + unsigned BSIM4v3pkt1Given :1; + unsigned BSIM4v3pkt1lGiven :1; + unsigned BSIM4v3pkt2Given :1; + unsigned BSIM4v3pk2Given :1; + unsigned BSIM4v3pk3Given :1; + unsigned BSIM4v3pk3bGiven :1; + unsigned BSIM4v3pw0Given :1; + unsigned BSIM4v3pdvtp0Given :1; + unsigned BSIM4v3pdvtp1Given :1; + unsigned BSIM4v3plpe0Given :1; + unsigned BSIM4v3plpebGiven :1; + unsigned BSIM4v3pdvt0Given :1; + unsigned BSIM4v3pdvt1Given :1; + unsigned BSIM4v3pdvt2Given :1; + unsigned BSIM4v3pdvt0wGiven :1; + unsigned BSIM4v3pdvt1wGiven :1; + unsigned BSIM4v3pdvt2wGiven :1; + unsigned BSIM4v3pdroutGiven :1; + unsigned BSIM4v3pdsubGiven :1; + unsigned BSIM4v3pvth0Given :1; + unsigned BSIM4v3puaGiven :1; + unsigned BSIM4v3pua1Given :1; + unsigned BSIM4v3pubGiven :1; + unsigned BSIM4v3pub1Given :1; + unsigned BSIM4v3pucGiven :1; + unsigned BSIM4v3puc1Given :1; + unsigned BSIM4v3pu0Given :1; + unsigned BSIM4v3peuGiven :1; + unsigned BSIM4v3puteGiven :1; + unsigned BSIM4v3pvoffGiven :1; + unsigned BSIM4v3pminvGiven :1; + unsigned BSIM4v3prdswGiven :1; + unsigned BSIM4v3prswGiven :1; + unsigned BSIM4v3prdwGiven :1; + unsigned BSIM4v3pprwgGiven :1; + unsigned BSIM4v3pprwbGiven :1; + unsigned BSIM4v3pprtGiven :1; + unsigned BSIM4v3peta0Given :1; + unsigned BSIM4v3petabGiven :1; + unsigned BSIM4v3ppclmGiven :1; + unsigned BSIM4v3ppdibl1Given :1; + unsigned BSIM4v3ppdibl2Given :1; + unsigned BSIM4v3ppdiblbGiven :1; + unsigned BSIM4v3pfproutGiven :1; + unsigned BSIM4v3ppditsGiven :1; + unsigned BSIM4v3ppditsdGiven :1; + unsigned BSIM4v3ppscbe1Given :1; + unsigned BSIM4v3ppscbe2Given :1; + unsigned BSIM4v3ppvagGiven :1; + unsigned BSIM4v3pdeltaGiven :1; + unsigned BSIM4v3pwrGiven :1; + unsigned BSIM4v3pdwgGiven :1; + unsigned BSIM4v3pdwbGiven :1; + unsigned BSIM4v3pb0Given :1; + unsigned BSIM4v3pb1Given :1; + unsigned BSIM4v3palpha0Given :1; + unsigned BSIM4v3palpha1Given :1; + unsigned BSIM4v3pbeta0Given :1; + unsigned BSIM4v3pvfbGiven :1; + unsigned BSIM4v3pagidlGiven :1; + unsigned BSIM4v3pbgidlGiven :1; + unsigned BSIM4v3pcgidlGiven :1; + unsigned BSIM4v3pegidlGiven :1; + unsigned BSIM4v3paigcGiven :1; + unsigned BSIM4v3pbigcGiven :1; + unsigned BSIM4v3pcigcGiven :1; + unsigned BSIM4v3paigsdGiven :1; + unsigned BSIM4v3pbigsdGiven :1; + unsigned BSIM4v3pcigsdGiven :1; + unsigned BSIM4v3paigbaccGiven :1; + unsigned BSIM4v3pbigbaccGiven :1; + unsigned BSIM4v3pcigbaccGiven :1; + unsigned BSIM4v3paigbinvGiven :1; + unsigned BSIM4v3pbigbinvGiven :1; + unsigned BSIM4v3pcigbinvGiven :1; + unsigned BSIM4v3pnigcGiven :1; + unsigned BSIM4v3pnigbinvGiven :1; + unsigned BSIM4v3pnigbaccGiven :1; + unsigned BSIM4v3pntoxGiven :1; + unsigned BSIM4v3peigbinvGiven :1; + unsigned BSIM4v3ppigcdGiven :1; + unsigned BSIM4v3ppoxedgeGiven :1; + unsigned BSIM4v3pxrcrg1Given :1; + unsigned BSIM4v3pxrcrg2Given :1; + unsigned BSIM4v3plambdaGiven :1; + unsigned BSIM4v3pvtlGiven :1; + unsigned BSIM4v3pxnGiven :1; + + /* CV model */ + unsigned BSIM4v3pcgslGiven :1; + unsigned BSIM4v3pcgdlGiven :1; + unsigned BSIM4v3pckappasGiven :1; + unsigned BSIM4v3pckappadGiven :1; + unsigned BSIM4v3pcfGiven :1; + unsigned BSIM4v3pclcGiven :1; + unsigned BSIM4v3pcleGiven :1; + unsigned BSIM4v3pvfbcvGiven :1; + unsigned BSIM4v3pnoffGiven :1; + unsigned BSIM4v3pvoffcvGiven :1; + unsigned BSIM4v3pacdeGiven :1; + unsigned BSIM4v3pmoinGiven :1; + + unsigned BSIM4v3useFringeGiven :1; + + unsigned BSIM4v3tnomGiven :1; + unsigned BSIM4v3cgsoGiven :1; + unsigned BSIM4v3cgdoGiven :1; + unsigned BSIM4v3cgboGiven :1; + unsigned BSIM4v3xpartGiven :1; + unsigned BSIM4v3sheetResistanceGiven :1; + + unsigned BSIM4v3SjctSatCurDensityGiven :1; + unsigned BSIM4v3SjctSidewallSatCurDensityGiven :1; + unsigned BSIM4v3SjctGateSidewallSatCurDensityGiven :1; + unsigned BSIM4v3SbulkJctPotentialGiven :1; + unsigned BSIM4v3SbulkJctBotGradingCoeffGiven :1; + unsigned BSIM4v3SsidewallJctPotentialGiven :1; + unsigned BSIM4v3SGatesidewallJctPotentialGiven :1; + unsigned BSIM4v3SbulkJctSideGradingCoeffGiven :1; + unsigned BSIM4v3SunitAreaJctCapGiven :1; + unsigned BSIM4v3SunitLengthSidewallJctCapGiven :1; + unsigned BSIM4v3SbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM4v3SunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM4v3SjctEmissionCoeffGiven :1; + unsigned BSIM4v3SjctTempExponentGiven :1; + + unsigned BSIM4v3DjctSatCurDensityGiven :1; + unsigned BSIM4v3DjctSidewallSatCurDensityGiven :1; + unsigned BSIM4v3DjctGateSidewallSatCurDensityGiven :1; + unsigned BSIM4v3DbulkJctPotentialGiven :1; + unsigned BSIM4v3DbulkJctBotGradingCoeffGiven :1; + unsigned BSIM4v3DsidewallJctPotentialGiven :1; + unsigned BSIM4v3DGatesidewallJctPotentialGiven :1; + unsigned BSIM4v3DbulkJctSideGradingCoeffGiven :1; + unsigned BSIM4v3DunitAreaJctCapGiven :1; + unsigned BSIM4v3DunitLengthSidewallJctCapGiven :1; + unsigned BSIM4v3DbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM4v3DunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM4v3DjctEmissionCoeffGiven :1; + unsigned BSIM4v3DjctTempExponentGiven :1; + + unsigned BSIM4v3oxideTrapDensityAGiven :1; + unsigned BSIM4v3oxideTrapDensityBGiven :1; + unsigned BSIM4v3oxideTrapDensityCGiven :1; + unsigned BSIM4v3emGiven :1; + unsigned BSIM4v3efGiven :1; + unsigned BSIM4v3afGiven :1; + unsigned BSIM4v3kfGiven :1; + + unsigned BSIM4v3LintGiven :1; + unsigned BSIM4v3LlGiven :1; + unsigned BSIM4v3LlcGiven :1; + unsigned BSIM4v3LlnGiven :1; + unsigned BSIM4v3LwGiven :1; + unsigned BSIM4v3LwcGiven :1; + unsigned BSIM4v3LwnGiven :1; + unsigned BSIM4v3LwlGiven :1; + unsigned BSIM4v3LwlcGiven :1; + unsigned BSIM4v3LminGiven :1; + unsigned BSIM4v3LmaxGiven :1; + + unsigned BSIM4v3WintGiven :1; + unsigned BSIM4v3WlGiven :1; + unsigned BSIM4v3WlcGiven :1; + unsigned BSIM4v3WlnGiven :1; + unsigned BSIM4v3WwGiven :1; + unsigned BSIM4v3WwcGiven :1; + unsigned BSIM4v3WwnGiven :1; + unsigned BSIM4v3WwlGiven :1; + unsigned BSIM4v3WwlcGiven :1; + unsigned BSIM4v3WminGiven :1; + unsigned BSIM4v3WmaxGiven :1; + + /* added for stress effect */ + unsigned BSIM4v3sarefGiven :1; + unsigned BSIM4v3sbrefGiven :1; + unsigned BSIM4v3wlodGiven :1; + unsigned BSIM4v3ku0Given :1; + unsigned BSIM4v3kvsatGiven :1; + unsigned BSIM4v3kvth0Given :1; + unsigned BSIM4v3tku0Given :1; + unsigned BSIM4v3llodku0Given :1; + unsigned BSIM4v3wlodku0Given :1; + unsigned BSIM4v3llodvthGiven :1; + unsigned BSIM4v3wlodvthGiven :1; + unsigned BSIM4v3lku0Given :1; + unsigned BSIM4v3wku0Given :1; + unsigned BSIM4v3pku0Given :1; + unsigned BSIM4v3lkvth0Given :1; + unsigned BSIM4v3wkvth0Given :1; + unsigned BSIM4v3pkvth0Given :1; + unsigned BSIM4v3stk2Given :1; + unsigned BSIM4v3lodk2Given :1; + unsigned BSIM4v3steta0Given :1; + unsigned BSIM4v3lodeta0Given :1; + + +} BSIM4v3model; + + +#ifndef NMOS +#define NMOS 1 +#define PMOS -1 +#endif /*NMOS*/ + + +/* Instance parameters */ +#define BSIM4v3_W 1 +#define BSIM4v3_L 2 +#define BSIM4v3_AS 3 +#define BSIM4v3_AD 4 +#define BSIM4v3_PS 5 +#define BSIM4v3_PD 6 +#define BSIM4v3_NRS 7 +#define BSIM4v3_NRD 8 +#define BSIM4v3_OFF 9 +#define BSIM4v3_IC 10 +#define BSIM4v3_IC_VDS 11 +#define BSIM4v3_IC_VGS 12 +#define BSIM4v3_IC_VBS 13 +#define BSIM4v3_TRNQSMOD 14 +#define BSIM4v3_RBODYMOD 15 +#define BSIM4v3_RGATEMOD 16 +#define BSIM4v3_GEOMOD 17 +#define BSIM4v3_RGEOMOD 18 +#define BSIM4v3_NF 19 +#define BSIM4v3_MIN 20 +#define BSIM4v3_ACNQSMOD 22 +#define BSIM4v3_RBDB 23 +#define BSIM4v3_RBSB 24 +#define BSIM4v3_RBPB 25 +#define BSIM4v3_RBPS 26 +#define BSIM4v3_RBPD 27 +#define BSIM4v3_SA 28 +#define BSIM4v3_SB 29 +#define BSIM4v3_SD 30 + +/* Global parameters */ +#define BSIM4v3_MOD_TEMPMOD 89 +#define BSIM4v3_MOD_IGCMOD 90 +#define BSIM4v3_MOD_IGBMOD 91 +#define BSIM4v3_MOD_ACNQSMOD 92 +#define BSIM4v3_MOD_FNOIMOD 93 +#define BSIM4v3_MOD_RDSMOD 94 +#define BSIM4v3_MOD_DIOMOD 96 +#define BSIM4v3_MOD_PERMOD 97 +#define BSIM4v3_MOD_GEOMOD 98 +#define BSIM4v3_MOD_RGATEMOD 99 +#define BSIM4v3_MOD_RBODYMOD 100 +#define BSIM4v3_MOD_CAPMOD 101 +#define BSIM4v3_MOD_TRNQSMOD 102 +#define BSIM4v3_MOD_MOBMOD 103 +#define BSIM4v3_MOD_TNOIMOD 104 +#define BSIM4v3_MOD_TOXE 105 +#define BSIM4v3_MOD_CDSC 106 +#define BSIM4v3_MOD_CDSCB 107 +#define BSIM4v3_MOD_CIT 108 +#define BSIM4v3_MOD_NFACTOR 109 +#define BSIM4v3_MOD_XJ 110 +#define BSIM4v3_MOD_VSAT 111 +#define BSIM4v3_MOD_AT 112 +#define BSIM4v3_MOD_A0 113 +#define BSIM4v3_MOD_A1 114 +#define BSIM4v3_MOD_A2 115 +#define BSIM4v3_MOD_KETA 116 +#define BSIM4v3_MOD_NSUB 117 +#define BSIM4v3_MOD_NDEP 118 +#define BSIM4v3_MOD_NGATE 120 +#define BSIM4v3_MOD_GAMMA1 121 +#define BSIM4v3_MOD_GAMMA2 122 +#define BSIM4v3_MOD_VBX 123 +#define BSIM4v3_MOD_BINUNIT 124 +#define BSIM4v3_MOD_VBM 125 +#define BSIM4v3_MOD_XT 126 +#define BSIM4v3_MOD_K1 129 +#define BSIM4v3_MOD_KT1 130 +#define BSIM4v3_MOD_KT1L 131 +#define BSIM4v3_MOD_K2 132 +#define BSIM4v3_MOD_KT2 133 +#define BSIM4v3_MOD_K3 134 +#define BSIM4v3_MOD_K3B 135 +#define BSIM4v3_MOD_W0 136 +#define BSIM4v3_MOD_LPE0 137 +#define BSIM4v3_MOD_DVT0 138 +#define BSIM4v3_MOD_DVT1 139 +#define BSIM4v3_MOD_DVT2 140 +#define BSIM4v3_MOD_DVT0W 141 +#define BSIM4v3_MOD_DVT1W 142 +#define BSIM4v3_MOD_DVT2W 143 +#define BSIM4v3_MOD_DROUT 144 +#define BSIM4v3_MOD_DSUB 145 +#define BSIM4v3_MOD_VTH0 146 +#define BSIM4v3_MOD_UA 147 +#define BSIM4v3_MOD_UA1 148 +#define BSIM4v3_MOD_UB 149 +#define BSIM4v3_MOD_UB1 150 +#define BSIM4v3_MOD_UC 151 +#define BSIM4v3_MOD_UC1 152 +#define BSIM4v3_MOD_U0 153 +#define BSIM4v3_MOD_UTE 154 +#define BSIM4v3_MOD_VOFF 155 +#define BSIM4v3_MOD_DELTA 156 +#define BSIM4v3_MOD_RDSW 157 +#define BSIM4v3_MOD_PRT 158 +#define BSIM4v3_MOD_LDD 159 +#define BSIM4v3_MOD_ETA 160 +#define BSIM4v3_MOD_ETA0 161 +#define BSIM4v3_MOD_ETAB 162 +#define BSIM4v3_MOD_PCLM 163 +#define BSIM4v3_MOD_PDIBL1 164 +#define BSIM4v3_MOD_PDIBL2 165 +#define BSIM4v3_MOD_PSCBE1 166 +#define BSIM4v3_MOD_PSCBE2 167 +#define BSIM4v3_MOD_PVAG 168 +#define BSIM4v3_MOD_WR 169 +#define BSIM4v3_MOD_DWG 170 +#define BSIM4v3_MOD_DWB 171 +#define BSIM4v3_MOD_B0 172 +#define BSIM4v3_MOD_B1 173 +#define BSIM4v3_MOD_ALPHA0 174 +#define BSIM4v3_MOD_BETA0 175 +#define BSIM4v3_MOD_PDIBLB 178 +#define BSIM4v3_MOD_PRWG 179 +#define BSIM4v3_MOD_PRWB 180 +#define BSIM4v3_MOD_CDSCD 181 +#define BSIM4v3_MOD_AGS 182 +#define BSIM4v3_MOD_FRINGE 184 +#define BSIM4v3_MOD_CGSL 186 +#define BSIM4v3_MOD_CGDL 187 +#define BSIM4v3_MOD_CKAPPAS 188 +#define BSIM4v3_MOD_CF 189 +#define BSIM4v3_MOD_CLC 190 +#define BSIM4v3_MOD_CLE 191 +#define BSIM4v3_MOD_PARAMCHK 192 +#define BSIM4v3_MOD_VERSION 193 +#define BSIM4v3_MOD_VFBCV 194 +#define BSIM4v3_MOD_ACDE 195 +#define BSIM4v3_MOD_MOIN 196 +#define BSIM4v3_MOD_NOFF 197 +#define BSIM4v3_MOD_IJTHDFWD 198 +#define BSIM4v3_MOD_ALPHA1 199 +#define BSIM4v3_MOD_VFB 200 +#define BSIM4v3_MOD_TOXM 201 +#define BSIM4v3_MOD_TCJ 202 +#define BSIM4v3_MOD_TCJSW 203 +#define BSIM4v3_MOD_TCJSWG 204 +#define BSIM4v3_MOD_TPB 205 +#define BSIM4v3_MOD_TPBSW 206 +#define BSIM4v3_MOD_TPBSWG 207 +#define BSIM4v3_MOD_VOFFCV 208 +#define BSIM4v3_MOD_GBMIN 209 +#define BSIM4v3_MOD_RBDB 210 +#define BSIM4v3_MOD_RBSB 211 +#define BSIM4v3_MOD_RBPB 212 +#define BSIM4v3_MOD_RBPS 213 +#define BSIM4v3_MOD_RBPD 214 +#define BSIM4v3_MOD_DMCG 215 +#define BSIM4v3_MOD_DMCI 216 +#define BSIM4v3_MOD_DMDG 217 +#define BSIM4v3_MOD_XGW 218 +#define BSIM4v3_MOD_XGL 219 +#define BSIM4v3_MOD_RSHG 220 +#define BSIM4v3_MOD_NGCON 221 +#define BSIM4v3_MOD_AGIDL 222 +#define BSIM4v3_MOD_BGIDL 223 +#define BSIM4v3_MOD_EGIDL 224 +#define BSIM4v3_MOD_IJTHSFWD 225 +#define BSIM4v3_MOD_XJBVD 226 +#define BSIM4v3_MOD_XJBVS 227 +#define BSIM4v3_MOD_BVD 228 +#define BSIM4v3_MOD_BVS 229 +#define BSIM4v3_MOD_TOXP 230 +#define BSIM4v3_MOD_DTOX 231 +#define BSIM4v3_MOD_XRCRG1 232 +#define BSIM4v3_MOD_XRCRG2 233 +#define BSIM4v3_MOD_EU 234 +#define BSIM4v3_MOD_IJTHSREV 235 +#define BSIM4v3_MOD_IJTHDREV 236 +#define BSIM4v3_MOD_MINV 237 +#define BSIM4v3_MOD_VOFFL 238 +#define BSIM4v3_MOD_PDITS 239 +#define BSIM4v3_MOD_PDITSD 240 +#define BSIM4v3_MOD_PDITSL 241 +#define BSIM4v3_MOD_TNOIA 242 +#define BSIM4v3_MOD_TNOIB 243 +#define BSIM4v3_MOD_NTNOI 244 +#define BSIM4v3_MOD_FPROUT 245 +#define BSIM4v3_MOD_LPEB 246 +#define BSIM4v3_MOD_DVTP0 247 +#define BSIM4v3_MOD_DVTP1 248 +#define BSIM4v3_MOD_CGIDL 249 +#define BSIM4v3_MOD_PHIN 250 +#define BSIM4v3_MOD_RDSWMIN 251 +#define BSIM4v3_MOD_RSW 252 +#define BSIM4v3_MOD_RDW 253 +#define BSIM4v3_MOD_RDWMIN 254 +#define BSIM4v3_MOD_RSWMIN 255 +#define BSIM4v3_MOD_NSD 256 +#define BSIM4v3_MOD_CKAPPAD 257 +#define BSIM4v3_MOD_DMCGT 258 +#define BSIM4v3_MOD_AIGC 259 +#define BSIM4v3_MOD_BIGC 260 +#define BSIM4v3_MOD_CIGC 261 +#define BSIM4v3_MOD_AIGBACC 262 +#define BSIM4v3_MOD_BIGBACC 263 +#define BSIM4v3_MOD_CIGBACC 264 +#define BSIM4v3_MOD_AIGBINV 265 +#define BSIM4v3_MOD_BIGBINV 266 +#define BSIM4v3_MOD_CIGBINV 267 +#define BSIM4v3_MOD_NIGC 268 +#define BSIM4v3_MOD_NIGBACC 269 +#define BSIM4v3_MOD_NIGBINV 270 +#define BSIM4v3_MOD_NTOX 271 +#define BSIM4v3_MOD_TOXREF 272 +#define BSIM4v3_MOD_EIGBINV 273 +#define BSIM4v3_MOD_PIGCD 274 +#define BSIM4v3_MOD_POXEDGE 275 +#define BSIM4v3_MOD_EPSROX 276 +#define BSIM4v3_MOD_AIGSD 277 +#define BSIM4v3_MOD_BIGSD 278 +#define BSIM4v3_MOD_CIGSD 279 +#define BSIM4v3_MOD_JSWGS 280 +#define BSIM4v3_MOD_JSWGD 281 +#define BSIM4v3_MOD_LAMBDA 282 +#define BSIM4v3_MOD_VTL 283 +#define BSIM4v3_MOD_LC 284 +#define BSIM4v3_MOD_XN 285 +#define BSIM4v3_MOD_RNOIA 286 +#define BSIM4v3_MOD_RNOIB 287 + + +/* Length dependence */ +#define BSIM4v3_MOD_LCDSC 301 +#define BSIM4v3_MOD_LCDSCB 302 +#define BSIM4v3_MOD_LCIT 303 +#define BSIM4v3_MOD_LNFACTOR 304 +#define BSIM4v3_MOD_LXJ 305 +#define BSIM4v3_MOD_LVSAT 306 +#define BSIM4v3_MOD_LAT 307 +#define BSIM4v3_MOD_LA0 308 +#define BSIM4v3_MOD_LA1 309 +#define BSIM4v3_MOD_LA2 310 +#define BSIM4v3_MOD_LKETA 311 +#define BSIM4v3_MOD_LNSUB 312 +#define BSIM4v3_MOD_LNDEP 313 +#define BSIM4v3_MOD_LNGATE 315 +#define BSIM4v3_MOD_LGAMMA1 316 +#define BSIM4v3_MOD_LGAMMA2 317 +#define BSIM4v3_MOD_LVBX 318 +#define BSIM4v3_MOD_LVBM 320 +#define BSIM4v3_MOD_LXT 322 +#define BSIM4v3_MOD_LK1 325 +#define BSIM4v3_MOD_LKT1 326 +#define BSIM4v3_MOD_LKT1L 327 +#define BSIM4v3_MOD_LK2 328 +#define BSIM4v3_MOD_LKT2 329 +#define BSIM4v3_MOD_LK3 330 +#define BSIM4v3_MOD_LK3B 331 +#define BSIM4v3_MOD_LW0 332 +#define BSIM4v3_MOD_LLPE0 333 +#define BSIM4v3_MOD_LDVT0 334 +#define BSIM4v3_MOD_LDVT1 335 +#define BSIM4v3_MOD_LDVT2 336 +#define BSIM4v3_MOD_LDVT0W 337 +#define BSIM4v3_MOD_LDVT1W 338 +#define BSIM4v3_MOD_LDVT2W 339 +#define BSIM4v3_MOD_LDROUT 340 +#define BSIM4v3_MOD_LDSUB 341 +#define BSIM4v3_MOD_LVTH0 342 +#define BSIM4v3_MOD_LUA 343 +#define BSIM4v3_MOD_LUA1 344 +#define BSIM4v3_MOD_LUB 345 +#define BSIM4v3_MOD_LUB1 346 +#define BSIM4v3_MOD_LUC 347 +#define BSIM4v3_MOD_LUC1 348 +#define BSIM4v3_MOD_LU0 349 +#define BSIM4v3_MOD_LUTE 350 +#define BSIM4v3_MOD_LVOFF 351 +#define BSIM4v3_MOD_LDELTA 352 +#define BSIM4v3_MOD_LRDSW 353 +#define BSIM4v3_MOD_LPRT 354 +#define BSIM4v3_MOD_LLDD 355 +#define BSIM4v3_MOD_LETA 356 +#define BSIM4v3_MOD_LETA0 357 +#define BSIM4v3_MOD_LETAB 358 +#define BSIM4v3_MOD_LPCLM 359 +#define BSIM4v3_MOD_LPDIBL1 360 +#define BSIM4v3_MOD_LPDIBL2 361 +#define BSIM4v3_MOD_LPSCBE1 362 +#define BSIM4v3_MOD_LPSCBE2 363 +#define BSIM4v3_MOD_LPVAG 364 +#define BSIM4v3_MOD_LWR 365 +#define BSIM4v3_MOD_LDWG 366 +#define BSIM4v3_MOD_LDWB 367 +#define BSIM4v3_MOD_LB0 368 +#define BSIM4v3_MOD_LB1 369 +#define BSIM4v3_MOD_LALPHA0 370 +#define BSIM4v3_MOD_LBETA0 371 +#define BSIM4v3_MOD_LPDIBLB 374 +#define BSIM4v3_MOD_LPRWG 375 +#define BSIM4v3_MOD_LPRWB 376 +#define BSIM4v3_MOD_LCDSCD 377 +#define BSIM4v3_MOD_LAGS 378 + +#define BSIM4v3_MOD_LFRINGE 381 +#define BSIM4v3_MOD_LCGSL 383 +#define BSIM4v3_MOD_LCGDL 384 +#define BSIM4v3_MOD_LCKAPPAS 385 +#define BSIM4v3_MOD_LCF 386 +#define BSIM4v3_MOD_LCLC 387 +#define BSIM4v3_MOD_LCLE 388 +#define BSIM4v3_MOD_LVFBCV 389 +#define BSIM4v3_MOD_LACDE 390 +#define BSIM4v3_MOD_LMOIN 391 +#define BSIM4v3_MOD_LNOFF 392 +#define BSIM4v3_MOD_LALPHA1 394 +#define BSIM4v3_MOD_LVFB 395 +#define BSIM4v3_MOD_LVOFFCV 396 +#define BSIM4v3_MOD_LAGIDL 397 +#define BSIM4v3_MOD_LBGIDL 398 +#define BSIM4v3_MOD_LEGIDL 399 +#define BSIM4v3_MOD_LXRCRG1 400 +#define BSIM4v3_MOD_LXRCRG2 401 +#define BSIM4v3_MOD_LEU 402 +#define BSIM4v3_MOD_LMINV 403 +#define BSIM4v3_MOD_LPDITS 404 +#define BSIM4v3_MOD_LPDITSD 405 +#define BSIM4v3_MOD_LFPROUT 406 +#define BSIM4v3_MOD_LLPEB 407 +#define BSIM4v3_MOD_LDVTP0 408 +#define BSIM4v3_MOD_LDVTP1 409 +#define BSIM4v3_MOD_LCGIDL 410 +#define BSIM4v3_MOD_LPHIN 411 +#define BSIM4v3_MOD_LRSW 412 +#define BSIM4v3_MOD_LRDW 413 +#define BSIM4v3_MOD_LNSD 414 +#define BSIM4v3_MOD_LCKAPPAD 415 +#define BSIM4v3_MOD_LAIGC 416 +#define BSIM4v3_MOD_LBIGC 417 +#define BSIM4v3_MOD_LCIGC 418 +#define BSIM4v3_MOD_LAIGBACC 419 +#define BSIM4v3_MOD_LBIGBACC 420 +#define BSIM4v3_MOD_LCIGBACC 421 +#define BSIM4v3_MOD_LAIGBINV 422 +#define BSIM4v3_MOD_LBIGBINV 423 +#define BSIM4v3_MOD_LCIGBINV 424 +#define BSIM4v3_MOD_LNIGC 425 +#define BSIM4v3_MOD_LNIGBACC 426 +#define BSIM4v3_MOD_LNIGBINV 427 +#define BSIM4v3_MOD_LNTOX 428 +#define BSIM4v3_MOD_LEIGBINV 429 +#define BSIM4v3_MOD_LPIGCD 430 +#define BSIM4v3_MOD_LPOXEDGE 431 +#define BSIM4v3_MOD_LAIGSD 432 +#define BSIM4v3_MOD_LBIGSD 433 +#define BSIM4v3_MOD_LCIGSD 434 + +#define BSIM4v3_MOD_LLAMBDA 435 +#define BSIM4v3_MOD_LVTL 436 +#define BSIM4v3_MOD_LXN 437 + +/* Width dependence */ +#define BSIM4v3_MOD_WCDSC 481 +#define BSIM4v3_MOD_WCDSCB 482 +#define BSIM4v3_MOD_WCIT 483 +#define BSIM4v3_MOD_WNFACTOR 484 +#define BSIM4v3_MOD_WXJ 485 +#define BSIM4v3_MOD_WVSAT 486 +#define BSIM4v3_MOD_WAT 487 +#define BSIM4v3_MOD_WA0 488 +#define BSIM4v3_MOD_WA1 489 +#define BSIM4v3_MOD_WA2 490 +#define BSIM4v3_MOD_WKETA 491 +#define BSIM4v3_MOD_WNSUB 492 +#define BSIM4v3_MOD_WNDEP 493 +#define BSIM4v3_MOD_WNGATE 495 +#define BSIM4v3_MOD_WGAMMA1 496 +#define BSIM4v3_MOD_WGAMMA2 497 +#define BSIM4v3_MOD_WVBX 498 +#define BSIM4v3_MOD_WVBM 500 +#define BSIM4v3_MOD_WXT 502 +#define BSIM4v3_MOD_WK1 505 +#define BSIM4v3_MOD_WKT1 506 +#define BSIM4v3_MOD_WKT1L 507 +#define BSIM4v3_MOD_WK2 508 +#define BSIM4v3_MOD_WKT2 509 +#define BSIM4v3_MOD_WK3 510 +#define BSIM4v3_MOD_WK3B 511 +#define BSIM4v3_MOD_WW0 512 +#define BSIM4v3_MOD_WLPE0 513 +#define BSIM4v3_MOD_WDVT0 514 +#define BSIM4v3_MOD_WDVT1 515 +#define BSIM4v3_MOD_WDVT2 516 +#define BSIM4v3_MOD_WDVT0W 517 +#define BSIM4v3_MOD_WDVT1W 518 +#define BSIM4v3_MOD_WDVT2W 519 +#define BSIM4v3_MOD_WDROUT 520 +#define BSIM4v3_MOD_WDSUB 521 +#define BSIM4v3_MOD_WVTH0 522 +#define BSIM4v3_MOD_WUA 523 +#define BSIM4v3_MOD_WUA1 524 +#define BSIM4v3_MOD_WUB 525 +#define BSIM4v3_MOD_WUB1 526 +#define BSIM4v3_MOD_WUC 527 +#define BSIM4v3_MOD_WUC1 528 +#define BSIM4v3_MOD_WU0 529 +#define BSIM4v3_MOD_WUTE 530 +#define BSIM4v3_MOD_WVOFF 531 +#define BSIM4v3_MOD_WDELTA 532 +#define BSIM4v3_MOD_WRDSW 533 +#define BSIM4v3_MOD_WPRT 534 +#define BSIM4v3_MOD_WLDD 535 +#define BSIM4v3_MOD_WETA 536 +#define BSIM4v3_MOD_WETA0 537 +#define BSIM4v3_MOD_WETAB 538 +#define BSIM4v3_MOD_WPCLM 539 +#define BSIM4v3_MOD_WPDIBL1 540 +#define BSIM4v3_MOD_WPDIBL2 541 +#define BSIM4v3_MOD_WPSCBE1 542 +#define BSIM4v3_MOD_WPSCBE2 543 +#define BSIM4v3_MOD_WPVAG 544 +#define BSIM4v3_MOD_WWR 545 +#define BSIM4v3_MOD_WDWG 546 +#define BSIM4v3_MOD_WDWB 547 +#define BSIM4v3_MOD_WB0 548 +#define BSIM4v3_MOD_WB1 549 +#define BSIM4v3_MOD_WALPHA0 550 +#define BSIM4v3_MOD_WBETA0 551 +#define BSIM4v3_MOD_WPDIBLB 554 +#define BSIM4v3_MOD_WPRWG 555 +#define BSIM4v3_MOD_WPRWB 556 +#define BSIM4v3_MOD_WCDSCD 557 +#define BSIM4v3_MOD_WAGS 558 + +#define BSIM4v3_MOD_WFRINGE 561 +#define BSIM4v3_MOD_WCGSL 563 +#define BSIM4v3_MOD_WCGDL 564 +#define BSIM4v3_MOD_WCKAPPAS 565 +#define BSIM4v3_MOD_WCF 566 +#define BSIM4v3_MOD_WCLC 567 +#define BSIM4v3_MOD_WCLE 568 +#define BSIM4v3_MOD_WVFBCV 569 +#define BSIM4v3_MOD_WACDE 570 +#define BSIM4v3_MOD_WMOIN 571 +#define BSIM4v3_MOD_WNOFF 572 +#define BSIM4v3_MOD_WALPHA1 574 +#define BSIM4v3_MOD_WVFB 575 +#define BSIM4v3_MOD_WVOFFCV 576 +#define BSIM4v3_MOD_WAGIDL 577 +#define BSIM4v3_MOD_WBGIDL 578 +#define BSIM4v3_MOD_WEGIDL 579 +#define BSIM4v3_MOD_WXRCRG1 580 +#define BSIM4v3_MOD_WXRCRG2 581 +#define BSIM4v3_MOD_WEU 582 +#define BSIM4v3_MOD_WMINV 583 +#define BSIM4v3_MOD_WPDITS 584 +#define BSIM4v3_MOD_WPDITSD 585 +#define BSIM4v3_MOD_WFPROUT 586 +#define BSIM4v3_MOD_WLPEB 587 +#define BSIM4v3_MOD_WDVTP0 588 +#define BSIM4v3_MOD_WDVTP1 589 +#define BSIM4v3_MOD_WCGIDL 590 +#define BSIM4v3_MOD_WPHIN 591 +#define BSIM4v3_MOD_WRSW 592 +#define BSIM4v3_MOD_WRDW 593 +#define BSIM4v3_MOD_WNSD 594 +#define BSIM4v3_MOD_WCKAPPAD 595 +#define BSIM4v3_MOD_WAIGC 596 +#define BSIM4v3_MOD_WBIGC 597 +#define BSIM4v3_MOD_WCIGC 598 +#define BSIM4v3_MOD_WAIGBACC 599 +#define BSIM4v3_MOD_WBIGBACC 600 +#define BSIM4v3_MOD_WCIGBACC 601 +#define BSIM4v3_MOD_WAIGBINV 602 +#define BSIM4v3_MOD_WBIGBINV 603 +#define BSIM4v3_MOD_WCIGBINV 604 +#define BSIM4v3_MOD_WNIGC 605 +#define BSIM4v3_MOD_WNIGBACC 606 +#define BSIM4v3_MOD_WNIGBINV 607 +#define BSIM4v3_MOD_WNTOX 608 +#define BSIM4v3_MOD_WEIGBINV 609 +#define BSIM4v3_MOD_WPIGCD 610 +#define BSIM4v3_MOD_WPOXEDGE 611 +#define BSIM4v3_MOD_WAIGSD 612 +#define BSIM4v3_MOD_WBIGSD 613 +#define BSIM4v3_MOD_WCIGSD 614 +#define BSIM4v3_MOD_WLAMBDA 615 +#define BSIM4v3_MOD_WVTL 616 +#define BSIM4v3_MOD_WXN 617 + + +/* Cross-term dependence */ +#define BSIM4v3_MOD_PCDSC 661 +#define BSIM4v3_MOD_PCDSCB 662 +#define BSIM4v3_MOD_PCIT 663 +#define BSIM4v3_MOD_PNFACTOR 664 +#define BSIM4v3_MOD_PXJ 665 +#define BSIM4v3_MOD_PVSAT 666 +#define BSIM4v3_MOD_PAT 667 +#define BSIM4v3_MOD_PA0 668 +#define BSIM4v3_MOD_PA1 669 +#define BSIM4v3_MOD_PA2 670 +#define BSIM4v3_MOD_PKETA 671 +#define BSIM4v3_MOD_PNSUB 672 +#define BSIM4v3_MOD_PNDEP 673 +#define BSIM4v3_MOD_PNGATE 675 +#define BSIM4v3_MOD_PGAMMA1 676 +#define BSIM4v3_MOD_PGAMMA2 677 +#define BSIM4v3_MOD_PVBX 678 + +#define BSIM4v3_MOD_PVBM 680 + +#define BSIM4v3_MOD_PXT 682 +#define BSIM4v3_MOD_PK1 685 +#define BSIM4v3_MOD_PKT1 686 +#define BSIM4v3_MOD_PKT1L 687 +#define BSIM4v3_MOD_PK2 688 +#define BSIM4v3_MOD_PKT2 689 +#define BSIM4v3_MOD_PK3 690 +#define BSIM4v3_MOD_PK3B 691 +#define BSIM4v3_MOD_PW0 692 +#define BSIM4v3_MOD_PLPE0 693 + +#define BSIM4v3_MOD_PDVT0 694 +#define BSIM4v3_MOD_PDVT1 695 +#define BSIM4v3_MOD_PDVT2 696 + +#define BSIM4v3_MOD_PDVT0W 697 +#define BSIM4v3_MOD_PDVT1W 698 +#define BSIM4v3_MOD_PDVT2W 699 + +#define BSIM4v3_MOD_PDROUT 700 +#define BSIM4v3_MOD_PDSUB 701 +#define BSIM4v3_MOD_PVTH0 702 +#define BSIM4v3_MOD_PUA 703 +#define BSIM4v3_MOD_PUA1 704 +#define BSIM4v3_MOD_PUB 705 +#define BSIM4v3_MOD_PUB1 706 +#define BSIM4v3_MOD_PUC 707 +#define BSIM4v3_MOD_PUC1 708 +#define BSIM4v3_MOD_PU0 709 +#define BSIM4v3_MOD_PUTE 710 +#define BSIM4v3_MOD_PVOFF 711 +#define BSIM4v3_MOD_PDELTA 712 +#define BSIM4v3_MOD_PRDSW 713 +#define BSIM4v3_MOD_PPRT 714 +#define BSIM4v3_MOD_PLDD 715 +#define BSIM4v3_MOD_PETA 716 +#define BSIM4v3_MOD_PETA0 717 +#define BSIM4v3_MOD_PETAB 718 +#define BSIM4v3_MOD_PPCLM 719 +#define BSIM4v3_MOD_PPDIBL1 720 +#define BSIM4v3_MOD_PPDIBL2 721 +#define BSIM4v3_MOD_PPSCBE1 722 +#define BSIM4v3_MOD_PPSCBE2 723 +#define BSIM4v3_MOD_PPVAG 724 +#define BSIM4v3_MOD_PWR 725 +#define BSIM4v3_MOD_PDWG 726 +#define BSIM4v3_MOD_PDWB 727 +#define BSIM4v3_MOD_PB0 728 +#define BSIM4v3_MOD_PB1 729 +#define BSIM4v3_MOD_PALPHA0 730 +#define BSIM4v3_MOD_PBETA0 731 +#define BSIM4v3_MOD_PPDIBLB 734 + +#define BSIM4v3_MOD_PPRWG 735 +#define BSIM4v3_MOD_PPRWB 736 + +#define BSIM4v3_MOD_PCDSCD 737 +#define BSIM4v3_MOD_PAGS 738 + +#define BSIM4v3_MOD_PFRINGE 741 +#define BSIM4v3_MOD_PCGSL 743 +#define BSIM4v3_MOD_PCGDL 744 +#define BSIM4v3_MOD_PCKAPPAS 745 +#define BSIM4v3_MOD_PCF 746 +#define BSIM4v3_MOD_PCLC 747 +#define BSIM4v3_MOD_PCLE 748 +#define BSIM4v3_MOD_PVFBCV 749 +#define BSIM4v3_MOD_PACDE 750 +#define BSIM4v3_MOD_PMOIN 751 +#define BSIM4v3_MOD_PNOFF 752 +#define BSIM4v3_MOD_PALPHA1 754 +#define BSIM4v3_MOD_PVFB 755 +#define BSIM4v3_MOD_PVOFFCV 756 +#define BSIM4v3_MOD_PAGIDL 757 +#define BSIM4v3_MOD_PBGIDL 758 +#define BSIM4v3_MOD_PEGIDL 759 +#define BSIM4v3_MOD_PXRCRG1 760 +#define BSIM4v3_MOD_PXRCRG2 761 +#define BSIM4v3_MOD_PEU 762 +#define BSIM4v3_MOD_PMINV 763 +#define BSIM4v3_MOD_PPDITS 764 +#define BSIM4v3_MOD_PPDITSD 765 +#define BSIM4v3_MOD_PFPROUT 766 +#define BSIM4v3_MOD_PLPEB 767 +#define BSIM4v3_MOD_PDVTP0 768 +#define BSIM4v3_MOD_PDVTP1 769 +#define BSIM4v3_MOD_PCGIDL 770 +#define BSIM4v3_MOD_PPHIN 771 +#define BSIM4v3_MOD_PRSW 772 +#define BSIM4v3_MOD_PRDW 773 +#define BSIM4v3_MOD_PNSD 774 +#define BSIM4v3_MOD_PCKAPPAD 775 +#define BSIM4v3_MOD_PAIGC 776 +#define BSIM4v3_MOD_PBIGC 777 +#define BSIM4v3_MOD_PCIGC 778 +#define BSIM4v3_MOD_PAIGBACC 779 +#define BSIM4v3_MOD_PBIGBACC 780 +#define BSIM4v3_MOD_PCIGBACC 781 +#define BSIM4v3_MOD_PAIGBINV 782 +#define BSIM4v3_MOD_PBIGBINV 783 +#define BSIM4v3_MOD_PCIGBINV 784 +#define BSIM4v3_MOD_PNIGC 785 +#define BSIM4v3_MOD_PNIGBACC 786 +#define BSIM4v3_MOD_PNIGBINV 787 +#define BSIM4v3_MOD_PNTOX 788 +#define BSIM4v3_MOD_PEIGBINV 789 +#define BSIM4v3_MOD_PPIGCD 790 +#define BSIM4v3_MOD_PPOXEDGE 791 +#define BSIM4v3_MOD_PAIGSD 792 +#define BSIM4v3_MOD_PBIGSD 793 +#define BSIM4v3_MOD_PCIGSD 794 + +#define BSIM4v3_MOD_SAREF 795 +#define BSIM4v3_MOD_SBREF 796 +#define BSIM4v3_MOD_KU0 797 +#define BSIM4v3_MOD_KVSAT 798 +#define BSIM4v3_MOD_TKU0 799 +#define BSIM4v3_MOD_LLODKU0 800 +#define BSIM4v3_MOD_WLODKU0 801 +#define BSIM4v3_MOD_LLODVTH 802 +#define BSIM4v3_MOD_WLODVTH 803 +#define BSIM4v3_MOD_LKU0 804 +#define BSIM4v3_MOD_WKU0 805 +#define BSIM4v3_MOD_PKU0 806 +#define BSIM4v3_MOD_KVTH0 807 +#define BSIM4v3_MOD_LKVTH0 808 +#define BSIM4v3_MOD_WKVTH0 809 +#define BSIM4v3_MOD_PKVTH0 810 +#define BSIM4v3_MOD_WLOD 811 +#define BSIM4v3_MOD_STK2 812 +#define BSIM4v3_MOD_LODK2 813 +#define BSIM4v3_MOD_STETA0 814 +#define BSIM4v3_MOD_LODETA0 815 + +#define BSIM4v3_MOD_PLAMBDA 825 +#define BSIM4v3_MOD_PVTL 826 +#define BSIM4v3_MOD_PXN 827 + +#define BSIM4v3_MOD_TNOM 831 +#define BSIM4v3_MOD_CGSO 832 +#define BSIM4v3_MOD_CGDO 833 +#define BSIM4v3_MOD_CGBO 834 +#define BSIM4v3_MOD_XPART 835 +#define BSIM4v3_MOD_RSH 836 +#define BSIM4v3_MOD_JSS 837 +#define BSIM4v3_MOD_PBS 838 +#define BSIM4v3_MOD_MJS 839 +#define BSIM4v3_MOD_PBSWS 840 +#define BSIM4v3_MOD_MJSWS 841 +#define BSIM4v3_MOD_CJS 842 +#define BSIM4v3_MOD_CJSWS 843 +#define BSIM4v3_MOD_NMOS 844 +#define BSIM4v3_MOD_PMOS 845 +#define BSIM4v3_MOD_NOIA 846 +#define BSIM4v3_MOD_NOIB 847 +#define BSIM4v3_MOD_NOIC 848 +#define BSIM4v3_MOD_LINT 849 +#define BSIM4v3_MOD_LL 850 +#define BSIM4v3_MOD_LLN 851 +#define BSIM4v3_MOD_LW 852 +#define BSIM4v3_MOD_LWN 853 +#define BSIM4v3_MOD_LWL 854 +#define BSIM4v3_MOD_LMIN 855 +#define BSIM4v3_MOD_LMAX 856 +#define BSIM4v3_MOD_WINT 857 +#define BSIM4v3_MOD_WL 858 +#define BSIM4v3_MOD_WLN 859 +#define BSIM4v3_MOD_WW 860 +#define BSIM4v3_MOD_WWN 861 +#define BSIM4v3_MOD_WWL 862 +#define BSIM4v3_MOD_WMIN 863 +#define BSIM4v3_MOD_WMAX 864 +#define BSIM4v3_MOD_DWC 865 +#define BSIM4v3_MOD_DLC 866 +#define BSIM4v3_MOD_XL 867 +#define BSIM4v3_MOD_XW 868 +#define BSIM4v3_MOD_EM 869 +#define BSIM4v3_MOD_EF 870 +#define BSIM4v3_MOD_AF 871 +#define BSIM4v3_MOD_KF 872 +#define BSIM4v3_MOD_NJS 873 +#define BSIM4v3_MOD_XTIS 874 +#define BSIM4v3_MOD_PBSWGS 875 +#define BSIM4v3_MOD_MJSWGS 876 +#define BSIM4v3_MOD_CJSWGS 877 +#define BSIM4v3_MOD_JSWS 878 +#define BSIM4v3_MOD_LLC 879 +#define BSIM4v3_MOD_LWC 880 +#define BSIM4v3_MOD_LWLC 881 +#define BSIM4v3_MOD_WLC 882 +#define BSIM4v3_MOD_WWC 883 +#define BSIM4v3_MOD_WWLC 884 +#define BSIM4v3_MOD_DWJ 885 +#define BSIM4v3_MOD_JSD 886 +#define BSIM4v3_MOD_PBD 887 +#define BSIM4v3_MOD_MJD 888 +#define BSIM4v3_MOD_PBSWD 889 +#define BSIM4v3_MOD_MJSWD 890 +#define BSIM4v3_MOD_CJD 891 +#define BSIM4v3_MOD_CJSWD 892 +#define BSIM4v3_MOD_NJD 893 +#define BSIM4v3_MOD_XTID 894 +#define BSIM4v3_MOD_PBSWGD 895 +#define BSIM4v3_MOD_MJSWGD 896 +#define BSIM4v3_MOD_CJSWGD 897 +#define BSIM4v3_MOD_JSWD 898 +#define BSIM4v3_MOD_DLCIG 899 + +/* device questions */ +#define BSIM4v3_DNODE 945 +#define BSIM4v3_GNODEEXT 946 +#define BSIM4v3_SNODE 947 +#define BSIM4v3_BNODE 948 +#define BSIM4v3_DNODEPRIME 949 +#define BSIM4v3_GNODEPRIME 950 +#define BSIM4v3_GNODEMIDE 951 +#define BSIM4v3_GNODEMID 952 +#define BSIM4v3_SNODEPRIME 953 +#define BSIM4v3_BNODEPRIME 954 +#define BSIM4v3_DBNODE 955 +#define BSIM4v3_SBNODE 956 +#define BSIM4v3_VBD 957 +#define BSIM4v3_VBS 958 +#define BSIM4v3_VGS 959 +#define BSIM4v3_VDS 960 +#define BSIM4v3_CD 961 +#define BSIM4v3_CBS 962 +#define BSIM4v3_CBD 963 +#define BSIM4v3_GM 964 +#define BSIM4v3_GDS 965 +#define BSIM4v3_GMBS 966 +#define BSIM4v3_GBD 967 +#define BSIM4v3_GBS 968 +#define BSIM4v3_QB 969 +#define BSIM4v3_CQB 970 +#define BSIM4v3_QG 971 +#define BSIM4v3_CQG 972 +#define BSIM4v3_QD 973 +#define BSIM4v3_CQD 974 +#define BSIM4v3_CGGB 975 +#define BSIM4v3_CGDB 976 +#define BSIM4v3_CGSB 977 +#define BSIM4v3_CBGB 978 +#define BSIM4v3_CAPBD 979 +#define BSIM4v3_CQBD 980 +#define BSIM4v3_CAPBS 981 +#define BSIM4v3_CQBS 982 +#define BSIM4v3_CDGB 983 +#define BSIM4v3_CDDB 984 +#define BSIM4v3_CDSB 985 +#define BSIM4v3_VON 986 +#define BSIM4v3_VDSAT 987 +#define BSIM4v3_QBS 988 +#define BSIM4v3_QBD 989 +#define BSIM4v3_SOURCECONDUCT 990 +#define BSIM4v3_DRAINCONDUCT 991 +#define BSIM4v3_CBDB 992 +#define BSIM4v3_CBSB 993 +#define BSIM4v3_CSUB 994 +#define BSIM4v3_QINV 995 +#define BSIM4v3_IGIDL 996 +#define BSIM4v3_CSGB 997 +#define BSIM4v3_CSDB 998 +#define BSIM4v3_CSSB 999 +#define BSIM4v3_CGBB 1000 +#define BSIM4v3_CDBB 1001 +#define BSIM4v3_CSBB 1002 +#define BSIM4v3_CBBB 1003 +#define BSIM4v3_QS 1004 +#define BSIM4v3_IGISL 1005 +#define BSIM4v3_IGS 1006 +#define BSIM4v3_IGD 1007 +#define BSIM4v3_IGB 1008 +#define BSIM4v3_IGCS 1009 +#define BSIM4v3_IGCD 1010 + + +# +#include "bsim4v3ext.h" + +#ifdef __STDC__ +extern void BSIM4v3evaluate(double,double,double,BSIM4v3instance*,BSIM4v3model*, + double*,double*,double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, CKTcircuit*); +extern int BSIM4v3debug(BSIM4v3model*, BSIM4v3instance*, CKTcircuit*, int); +extern int BSIM4v3checkModel(BSIM4v3model*, BSIM4v3instance*, CKTcircuit*); +#else /* stdc */ +extern void BSIM4v3evaluate(); +extern int BSIM4v3debug(); +extern int BSIM4v3checkModel(); +#endif /* stdc */ + +#endif /*BSIM4v3*/ diff --git a/src/spicelib/devices/bsim4v3/bsim4v3ext.h b/src/spicelib/devices/bsim4v3/bsim4v3ext.h new file mode 100644 index 000000000..af7104b1e --- /dev/null +++ b/src/spicelib/devices/bsim4v3/bsim4v3ext.h @@ -0,0 +1,54 @@ +/********** +Copyright 2003 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu +Author: 2001- Xuemei Xi +File: bsim4v3ext.h +**********/ + +#ifdef __STDC__ +extern int BSIM4v3acLoad(GENmodel *,CKTcircuit*); +extern int BSIM4v3ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); +extern int BSIM4v3convTest(GENmodel *,CKTcircuit*); +extern int BSIM4v3delete(GENmodel*,IFuid,GENinstance**); +extern void BSIM4v3destroy(GENmodel**); +extern int BSIM4v3getic(GENmodel*,CKTcircuit*); +extern int BSIM4v3load(GENmodel*,CKTcircuit*); +extern int BSIM4v3mAsk(CKTcircuit*,GENmodel *,int, IFvalue*); +extern int BSIM4v3mDelete(GENmodel**,IFuid,GENmodel*); +extern int BSIM4v3mParam(int,IFvalue*,GENmodel*); +extern void BSIM4v3mosCap(CKTcircuit*, double, double, double, double, + double, double, double, double, double, double, double, + double, double, double, double, double, double, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*); +extern int BSIM4v3param(int,IFvalue*,GENinstance*,IFvalue*); +extern int BSIM4v3pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); +extern int BSIM4v3setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); +extern int BSIM4v3temp(GENmodel*,CKTcircuit*); +extern int BSIM4v3trunc(GENmodel*,CKTcircuit*,double*); +extern int BSIM4v3noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*); +extern int BSIM4v3unsetup(GENmodel*,CKTcircuit*); + +#else /* stdc */ +extern int BSIM4v3acLoad(); +extern int BSIM4v3delete(); +extern void BSIM4v3destroy(); +extern int BSIM4v3getic(); +extern int BSIM4v3load(); +extern int BSIM4v3mDelete(); +extern int BSIM4v3ask(); +extern int BSIM4v3mAsk(); +extern int BSIM4v3convTest(); +extern int BSIM4v3temp(); +extern int BSIM4v3mParam(); +extern void BSIM4v3mosCap(); +extern int BSIM4v3param(); +extern int BSIM4v3pzLoad(); +extern int BSIM4v3setup(); +extern int BSIM4v3trunc(); +extern int BSIM4v3noise(); +extern int BSIM4v3unsetup(); + +#endif /* stdc */ + diff --git a/src/spicelib/devices/bsim4v3/bsim4v3init.c b/src/spicelib/devices/bsim4v3/bsim4v3init.c new file mode 100644 index 000000000..f91f8c979 --- /dev/null +++ b/src/spicelib/devices/bsim4v3/bsim4v3init.c @@ -0,0 +1,80 @@ +#include + +#include + +#include "bsim4v3itf.h" +#include "bsim4v3ext.h" +#include "bsim4v3init.h" + + +SPICEdev BSIM4v3info = { + { + "BSIM4v3", + "Berkeley Short Channel IGFET Model-4", + + &BSIM4v3nSize, + &BSIM4v3nSize, + BSIM4v3names, + + &BSIM4v3pTSize, + BSIM4v3pTable, + + &BSIM4v3mPTSize, + BSIM4v3mPTable, + +#ifdef XSPICE +/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ +/*--------------------------- End of SDB fix -------------------------*/ +#endif + + DEV_DEFAULT + }, + + DEVparam : BSIM4v3param, + DEVmodParam : BSIM4v3mParam, + DEVload : BSIM4v3load, + DEVsetup : BSIM4v3setup, + DEVunsetup : BSIM4v3unsetup, + DEVpzSetup : BSIM4v3setup, + DEVtemperature: BSIM4v3temp, + DEVtrunc : BSIM4v3trunc, + DEVfindBranch : NULL, + DEVacLoad : BSIM4v3acLoad, + DEVaccept : NULL, + DEVdestroy : BSIM4v3destroy, + DEVmodDelete : BSIM4v3mDelete, + DEVdelete : BSIM4v3delete, + DEVsetic : BSIM4v3getic, + DEVask : BSIM4v3ask, + DEVmodAsk : BSIM4v3mAsk, + DEVpzLoad : BSIM4v3pzLoad, + DEVconvTest : BSIM4v3convTest, + DEVsenSetup : NULL, + DEVsenLoad : NULL, + DEVsenUpdate : NULL, + DEVsenAcLoad : NULL, + DEVsenPrint : NULL, + DEVsenTrunc : NULL, + DEVdisto : NULL, + DEVnoise : BSIM4v3noise, + + DEVinstSize : &BSIM4v3iSize, + DEVmodSize : &BSIM4v3mSize +}; + + +SPICEdev * +get_bsim4v3_info(void) +{ + return &BSIM4v3info; +} diff --git a/src/spicelib/devices/bsim4v3/bsim4v3init.h b/src/spicelib/devices/bsim4v3/bsim4v3init.h new file mode 100644 index 000000000..78a1ecc6c --- /dev/null +++ b/src/spicelib/devices/bsim4v3/bsim4v3init.h @@ -0,0 +1,13 @@ +#ifndef _BSIM4V3INIT_H +#define _BSIM4V3INIT_H + +extern IFparm BSIM4v3pTable[ ]; +extern IFparm BSIM4v3mPTable[ ]; +extern char *BSIM4v3names[ ]; +extern int BSIM4v3pTSize; +extern int BSIM4v3mPTSize; +extern int BSIM4v3nSize; +extern int BSIM4v3iSize; +extern int BSIM4v3mSize; + +#endif diff --git a/src/spicelib/devices/bsim4v3/bsim4v3itf.h b/src/spicelib/devices/bsim4v3/bsim4v3itf.h new file mode 100644 index 000000000..c0f1f77cb --- /dev/null +++ b/src/spicelib/devices/bsim4v3/bsim4v3itf.h @@ -0,0 +1,13 @@ +/********** +Copyright 2003 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu. +Author: 2001- Xuemei Xi +File: bsim4v3itf.h +**********/ + +#ifndef DEV_BSIM4V3 +#define DEV_BSIM4V3 + +SPICEdev *get_bsim4v3_info(void); + +#endif diff --git a/src/spicelib/devices/bsim4v5/B4TERMS_OF_USE b/src/spicelib/devices/bsim4v5/B4TERMS_OF_USE new file mode 100644 index 000000000..42d4bfe4e --- /dev/null +++ b/src/spicelib/devices/bsim4v5/B4TERMS_OF_USE @@ -0,0 +1,33 @@ + +The terms under which the software is provided are as the following. + +Software is distributed as is, completely without warranty or service +support. The University of California and its employees are not liable +for the condition or performance of the software. + +The University owns the copyright but shall not be liable for any +infringement of copyright or other proprietary rights brought by third +parties against the users of the software. + +The University of California hereby disclaims all implied warranties. + +The University of California grants the users the right to modify, copy, +and redistribute the software and documentation, both within the user's +organization and externally, subject to the following restrictions: + +1. The users agree not to charge for the University of California code + itself but may charge for additions, extensions, or support. + +2. In any product based on the software, the users agree to acknowledge + the UC Berkeley BSIM Research Group that developed the software. This + acknowledgment shall appear in the product documentation. + +3. The users agree to obey all U.S. Government restrictions governing + redistribution or export of the software. + +4. The users agree to reproduce any copyright notice which appears on + the software on any copy or modification of such made available + to others. + +Chenming Hu, and Jane Xuemei Xi +April. 2003 diff --git a/src/spicelib/devices/bsim4v5/Makefile.am b/src/spicelib/devices/bsim4v5/Makefile.am new file mode 100644 index 000000000..3c58c0f5a --- /dev/null +++ b/src/spicelib/devices/bsim4v5/Makefile.am @@ -0,0 +1,35 @@ +## Process this file with automake to produce Makefile.in + +noinst_LIBRARIES = libbsim4v5.a + +libbsim4v5_a_SOURCES = \ + b4v5.c \ + b4v5acld.c \ + b4v5ask.c \ + b4v5check.c \ + b4v5cvtest.c \ + b4v5del.c \ + b4v5dest.c \ + b4v5geo.c \ + b4v5getic.c \ + b4v5ld.c \ + b4v5mask.c \ + b4v5mdel.c \ + b4v5mpar.c \ + b4v5noi.c \ + b4v5par.c \ + b4v5pzld.c \ + b4v5set.c \ + b4v5temp.c \ + b4v5trunc.c \ + bsim4v5def.h \ + bsim4v5ext.h \ + bsim4v5init.c \ + bsim4v5init.h \ + bsim4v5itf.h + + + +INCLUDES = -I$(top_srcdir)/src/include + +MAINTAINERCLEANFILES = Makefile.in diff --git a/src/spicelib/devices/bsim4v5/b4v5.c b/src/spicelib/devices/bsim4v5/b4v5.c new file mode 100644 index 000000000..aca131e46 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5.c @@ -0,0 +1,913 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 03/04/2004. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "devdefs.h" +#include "bsim4v5def.h" +#include "suffix.h" + +IFparm BSIM4v5pTable[] = { /* parameters */ +IOP( "l", BSIM4v5_L, IF_REAL , "Length"), +IOP( "w", BSIM4v5_W, IF_REAL , "Width"), +IOP( "m", BSIM4v5_M, IF_REAL , "Separate Parallel multiplier"), +IOP( "nf", BSIM4v5_NF, IF_REAL , "Number of fingers"), +IOP( "sa", BSIM4v5_SA, IF_REAL , "distance between OD edge to poly of one side "), +IOP( "sb", BSIM4v5_SB, IF_REAL , "distance between OD edge to poly of the other side"), +IOP( "sd", BSIM4v5_SD, IF_REAL , "distance between neighbour fingers"), +IOP( "sca", BSIM4v5_SCA, IF_REAL , "Integral of the first distribution function for scattered well dopant"), +IOP( "scb", BSIM4v5_SCB, IF_REAL , "Integral of the second distribution function for scattered well dopant"), +IOP( "scc", BSIM4v5_SCC, IF_REAL , "Integral of the third distribution function for scattered well dopant"), +IOP( "sc", BSIM4v5_SCA, IF_REAL , "Distance to a single well edge "), +IOP( "min", BSIM4v5_MIN, IF_INTEGER , "Minimize either D or S"), +IOP( "ad", BSIM4v5_AD, IF_REAL , "Drain area"), +IOP( "as", BSIM4v5_AS, IF_REAL , "Source area"), +IOP( "pd", BSIM4v5_PD, IF_REAL , "Drain perimeter"), +IOP( "ps", BSIM4v5_PS, IF_REAL , "Source perimeter"), +IOP( "nrd", BSIM4v5_NRD, IF_REAL , "Number of squares in drain"), +IOP( "nrs", BSIM4v5_NRS, IF_REAL , "Number of squares in source"), +IOP( "off", BSIM4v5_OFF, IF_FLAG , "Device is initially off"), +IOP( "rbdb", BSIM4v5_RBDB, IF_REAL , "Body resistance"), +IOP( "rbsb", BSIM4v5_RBSB, IF_REAL , "Body resistance"), +IOP( "rbpb", BSIM4v5_RBPB, IF_REAL , "Body resistance"), +IOP( "rbps", BSIM4v5_RBPS, IF_REAL , "Body resistance"), +IOP( "rbpd", BSIM4v5_RBPD, IF_REAL , "Body resistance"), +IOP( "delvto", BSIM4v5_DELVTO, IF_REAL , "Zero bias threshold voltage variation"), +IOP( "xgw", BSIM4v5_XGW, IF_REAL, "Distance from gate contact center to device edge"), +IOP( "ngcon", BSIM4v5_NGCON, IF_REAL, "Number of gate contacts"), + + +IOP( "trnqsmod", BSIM4v5_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"), +IOP( "acnqsmod", BSIM4v5_ACNQSMOD, IF_INTEGER, "AC NQS model selector"), +IOP( "rbodymod", BSIM4v5_RBODYMOD, IF_INTEGER, "Distributed body R model selector"), +IOP( "rgatemod", BSIM4v5_RGATEMOD, IF_INTEGER, "Gate resistance model selector"), +IOP( "geomod", BSIM4v5_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"), +IOP( "rgeomod", BSIM4v5_RGEOMOD, IF_INTEGER, "S/D resistance and contact model selector"), +IP( "ic", BSIM4v5_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"), +OP( "gmbs", BSIM4v5_GMBS, IF_REAL, "Gmb"), +OP( "gm", BSIM4v5_GM, IF_REAL, "Gm"), +OP( "gds", BSIM4v5_GDS, IF_REAL, "Gds"), +OP( "vdsat", BSIM4v5_VDSAT, IF_REAL, "Vdsat"), +OP( "vth", BSIM4v5_VON, IF_REAL, "Vth"), +OP( "id", BSIM4v5_CD, IF_REAL, "Ids"), +OP( "ibd", BSIM4v5_CBD, IF_REAL, "Ibd"), +OP( "ibs", BSIM4v5_CBS, IF_REAL, "Ibs"), +OP( "gbd", BSIM4v5_GBD, IF_REAL, "gbd"), +OP( "gbs", BSIM4v5_GBS, IF_REAL, "gbs"), +OP( "isub", BSIM4v5_CSUB, IF_REAL, "Isub"), +OP( "igidl", BSIM4v5_IGIDL, IF_REAL, "Igidl"), +OP( "igisl", BSIM4v5_IGISL, IF_REAL, "Igisl"), +OP( "igs", BSIM4v5_IGS, IF_REAL, "Igs"), +OP( "igd", BSIM4v5_IGD, IF_REAL, "Igd"), +OP( "igb", BSIM4v5_IGB, IF_REAL, "Igb"), +OP( "igcs", BSIM4v5_IGCS, IF_REAL, "Igcs"), +OP( "igcd", BSIM4v5_IGCD, IF_REAL, "Igcd"), +OP( "vbs", BSIM4v5_VBS, IF_REAL, "Vbs"), +OP( "vgs", BSIM4v5_VGS, IF_REAL, "Vgs"), +OP( "vds", BSIM4v5_VDS, IF_REAL, "Vds"), +OP( "cgg", BSIM4v5_CGGB, IF_REAL, "Cggb"), +OP( "cgs", BSIM4v5_CGSB, IF_REAL, "Cgsb"), +OP( "cgd", BSIM4v5_CGDB, IF_REAL, "Cgdb"), +OP( "cbg", BSIM4v5_CBGB, IF_REAL, "Cbgb"), +OP( "cbd", BSIM4v5_CBDB, IF_REAL, "Cbdb"), +OP( "cbs", BSIM4v5_CBSB, IF_REAL, "Cbsb"), +OP( "cdg", BSIM4v5_CDGB, IF_REAL, "Cdgb"), +OP( "cdd", BSIM4v5_CDDB, IF_REAL, "Cddb"), +OP( "cds", BSIM4v5_CDSB, IF_REAL, "Cdsb"), +OP( "csg", BSIM4v5_CSGB, IF_REAL, "Csgb"), +OP( "csd", BSIM4v5_CSDB, IF_REAL, "Csdb"), +OP( "css", BSIM4v5_CSSB, IF_REAL, "Cssb"), +OP( "cgb", BSIM4v5_CGBB, IF_REAL, "Cgbb"), +OP( "cdb", BSIM4v5_CDBB, IF_REAL, "Cdbb"), +OP( "csb", BSIM4v5_CSBB, IF_REAL, "Csbb"), +OP( "cbb", BSIM4v5_CBBB, IF_REAL, "Cbbb"), +OP( "capbd", BSIM4v5_CAPBD, IF_REAL, "Capbd"), +OP( "capbs", BSIM4v5_CAPBS, IF_REAL, "Capbs"), +OP( "qg", BSIM4v5_QG, IF_REAL, "Qgate"), +OP( "qb", BSIM4v5_QB, IF_REAL, "Qbulk"), +OP( "qd", BSIM4v5_QD, IF_REAL, "Qdrain"), +OP( "qs", BSIM4v5_QS, IF_REAL, "Qsource"), +OP( "qinv", BSIM4v5_QINV, IF_REAL, "Qinversion"), +OP( "qdef", BSIM4v5_QDEF, IF_REAL, "Qdef"), +OP( "gcrg", BSIM4v5_GCRG, IF_REAL, "Gcrg"), +OP( "gtau", BSIM4v5_GTAU, IF_REAL, "Gtau"), +}; + +IFparm BSIM4v5mPTable[] = { /* model parameters */ +IOP( "rgeomod", BSIM4v5_MOD_RGEOMOD, IF_INTEGER, "S/D resistance and contact model selector"), +IOP( "capmod", BSIM4v5_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"), +IOP( "diomod", BSIM4v5_MOD_DIOMOD, IF_INTEGER, "Diode IV model selector"), +IOP( "rdsmod", BSIM4v5_MOD_RDSMOD, IF_INTEGER, "Bias-dependent S/D resistance model selector"), +IOP( "trnqsmod", BSIM4v5_MOD_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"), +IOP( "acnqsmod", BSIM4v5_MOD_ACNQSMOD, IF_INTEGER, "AC NQS model selector"), +IOP( "mobmod", BSIM4v5_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"), +IOP( "rbodymod", BSIM4v5_MOD_RBODYMOD, IF_INTEGER, "Distributed body R model selector"), +IOP( "rgatemod", BSIM4v5_MOD_RGATEMOD, IF_INTEGER, "Gate R model selector"), +IOP( "permod", BSIM4v5_MOD_PERMOD, IF_INTEGER, "Pd and Ps model selector"), +IOP( "geomod", BSIM4v5_MOD_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"), +IOP( "fnoimod", BSIM4v5_MOD_FNOIMOD, IF_INTEGER, "Flicker noise model selector"), +IOP( "tnoimod", BSIM4v5_MOD_TNOIMOD, IF_INTEGER, "Thermal noise model selector"), +IOP( "igcmod", BSIM4v5_MOD_IGCMOD, IF_INTEGER, "Gate-to-channel Ig model selector"), +IOP( "igbmod", BSIM4v5_MOD_IGBMOD, IF_INTEGER, "Gate-to-body Ig model selector"), +IOP( "tempmod", BSIM4v5_MOD_TEMPMOD, IF_INTEGER, "Temperature model selector"), +IOP( "paramchk", BSIM4v5_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"), +IOP( "binunit", BSIM4v5_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"), +IOP( "version", BSIM4v5_MOD_VERSION, IF_STRING, "parameter for model version"), +IOP( "toxe", BSIM4v5_MOD_TOXE, IF_REAL, "Electrical gate oxide thickness in meters"), +IOP( "toxp", BSIM4v5_MOD_TOXP, IF_REAL, "Physical gate oxide thickness in meters"), +IOP( "toxm", BSIM4v5_MOD_TOXM, IF_REAL, "Gate oxide thickness at which parameters are extracted"), +IOP( "toxref", BSIM4v5_MOD_TOXREF, IF_REAL, "Target tox value"), +IOP( "dtox", BSIM4v5_MOD_DTOX, IF_REAL, "Defined as (toxe - toxp) "), +IOP( "epsrox", BSIM4v5_MOD_EPSROX, IF_REAL, "Dielectric constant of the gate oxide relative to vacuum"), +IOP( "cdsc", BSIM4v5_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), +IOP( "cdscb", BSIM4v5_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), +IOP( "cdscd", BSIM4v5_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), +IOP( "cit", BSIM4v5_MOD_CIT, IF_REAL, "Interface state capacitance"), +IOP( "nfactor", BSIM4v5_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), +IOP( "xj", BSIM4v5_MOD_XJ, IF_REAL, "Junction depth in meters"), +IOP( "vsat", BSIM4v5_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), +IOP( "at", BSIM4v5_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), +IOP( "a0", BSIM4v5_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), +IOP( "ags", BSIM4v5_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), +IOP( "a1", BSIM4v5_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), +IOP( "a2", BSIM4v5_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), +IOP( "keta", BSIM4v5_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), +IOP( "nsub", BSIM4v5_MOD_NSUB, IF_REAL, "Substrate doping concentration"), +IOP( "ndep", BSIM4v5_MOD_NDEP, IF_REAL, "Channel doping concentration at the depletion edge"), +IOP( "nsd", BSIM4v5_MOD_NSD, IF_REAL, "S/D doping concentration"), +IOP( "phin", BSIM4v5_MOD_PHIN, IF_REAL, "Adjusting parameter for surface potential due to non-uniform vertical doping"), +IOP( "ngate", BSIM4v5_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"), +IOP( "gamma1", BSIM4v5_MOD_GAMMA1, IF_REAL, "Vth body coefficient"), +IOP( "gamma2", BSIM4v5_MOD_GAMMA2, IF_REAL, "Vth body coefficient"), +IOP( "vbx", BSIM4v5_MOD_VBX, IF_REAL, "Vth transition body Voltage"), +IOP( "vbm", BSIM4v5_MOD_VBM, IF_REAL, "Maximum body voltage"), + +IOP( "xt", BSIM4v5_MOD_XT, IF_REAL, "Doping depth"), +IOP( "k1", BSIM4v5_MOD_K1, IF_REAL, "Bulk effect coefficient 1"), +IOP( "kt1", BSIM4v5_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt1l", BSIM4v5_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt2", BSIM4v5_MOD_KT2, IF_REAL, "Body-coefficient of kt1"), +IOP( "k2", BSIM4v5_MOD_K2, IF_REAL, "Bulk effect coefficient 2"), +IOP( "k3", BSIM4v5_MOD_K3, IF_REAL, "Narrow width effect coefficient"), +IOP( "k3b", BSIM4v5_MOD_K3B, IF_REAL, "Body effect coefficient of k3"), +IOP( "w0", BSIM4v5_MOD_W0, IF_REAL, "Narrow width effect parameter"), +IOP( "dvtp0", BSIM4v5_MOD_DVTP0, IF_REAL, "First parameter for Vth shift due to pocket"), +IOP( "dvtp1", BSIM4v5_MOD_DVTP1, IF_REAL, "Second parameter for Vth shift due to pocket"), +IOP( "lpe0", BSIM4v5_MOD_LPE0, IF_REAL, "Equivalent length of pocket region at zero bias"), +IOP( "lpeb", BSIM4v5_MOD_LPEB, IF_REAL, "Equivalent length of pocket region accounting for body bias"), +IOP( "dvt0", BSIM4v5_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"), +IOP( "dvt1", BSIM4v5_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"), +IOP( "dvt2", BSIM4v5_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"), +IOP( "dvt0w", BSIM4v5_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"), +IOP( "dvt1w", BSIM4v5_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"), +IOP( "dvt2w", BSIM4v5_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"), +IOP( "drout", BSIM4v5_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"), +IOP( "dsub", BSIM4v5_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"), +IOP( "vth0", BSIM4v5_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "vtho", BSIM4v5_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "ua", BSIM4v5_MOD_UA, IF_REAL, "Linear gate dependence of mobility"), +IOP( "ua1", BSIM4v5_MOD_UA1, IF_REAL, "Temperature coefficient of ua"), +IOP( "ub", BSIM4v5_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"), +IOP( "ub1", BSIM4v5_MOD_UB1, IF_REAL, "Temperature coefficient of ub"), +IOP( "uc", BSIM4v5_MOD_UC, IF_REAL, "Body-bias dependence of mobility"), +IOP( "uc1", BSIM4v5_MOD_UC1, IF_REAL, "Temperature coefficient of uc"), +IOP( "ud", BSIM4v5_MOD_UD, IF_REAL, "Coulomb scattering factor of mobility"), +IOP( "ud1", BSIM4v5_MOD_UD1, IF_REAL, "Temperature coefficient of ud"), +IOP( "up", BSIM4v5_MOD_UP, IF_REAL, "Channel length linear factor of mobility"), +IOP( "lp", BSIM4v5_MOD_LP, IF_REAL, "Channel length exponential factor of mobility"), +IOP( "u0", BSIM4v5_MOD_U0, IF_REAL, "Low-field mobility at Tnom"), +IOP( "eu", BSIM4v5_MOD_EU, IF_REAL, "Mobility exponent"), +IOP( "ute", BSIM4v5_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"), +IOP( "voff", BSIM4v5_MOD_VOFF, IF_REAL, "Threshold voltage offset"), +IOP( "minv", BSIM4v5_MOD_MINV, IF_REAL, "Fitting parameter for moderate invversion in Vgsteff"), +IOP( "voffl", BSIM4v5_MOD_VOFFL, IF_REAL, "Length dependence parameter for Vth offset"), +IOP( "tnom", BSIM4v5_MOD_TNOM, IF_REAL, "Parameter measurement temperature"), +IOP( "cgso", BSIM4v5_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"), +IOP( "cgdo", BSIM4v5_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"), +IOP( "cgbo", BSIM4v5_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"), +IOP( "xpart", BSIM4v5_MOD_XPART, IF_REAL, "Channel charge partitioning"), +IOP( "delta", BSIM4v5_MOD_DELTA, IF_REAL, "Effective Vds parameter"), +IOP( "rsh", BSIM4v5_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), +IOP( "rdsw", BSIM4v5_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), +IOP( "rdswmin", BSIM4v5_MOD_RDSWMIN, IF_REAL, "Source-drain resistance per width at high Vg"), +IOP( "rsw", BSIM4v5_MOD_RSW, IF_REAL, "Source resistance per width"), +IOP( "rdw", BSIM4v5_MOD_RDW, IF_REAL, "Drain resistance per width"), +IOP( "rdwmin", BSIM4v5_MOD_RDWMIN, IF_REAL, "Drain resistance per width at high Vg"), +IOP( "rswmin", BSIM4v5_MOD_RSWMIN, IF_REAL, "Source resistance per width at high Vg"), + +IOP( "prwg", BSIM4v5_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), +IOP( "prwb", BSIM4v5_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), + +IOP( "prt", BSIM4v5_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), +IOP( "eta0", BSIM4v5_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "etab", BSIM4v5_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "pclm", BSIM4v5_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), +IOP( "pdiblc1", BSIM4v5_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblc2", BSIM4v5_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblcb", BSIM4v5_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), +IOP( "fprout", BSIM4v5_MOD_FPROUT, IF_REAL, "Rout degradation coefficient for pocket devices"), +IOP( "pdits", BSIM4v5_MOD_PDITS, IF_REAL, "Coefficient for drain-induced Vth shifts"), +IOP( "pditsl", BSIM4v5_MOD_PDITSL, IF_REAL, "Length dependence of drain-induced Vth shifts"), +IOP( "pditsd", BSIM4v5_MOD_PDITSD, IF_REAL, "Vds dependence of drain-induced Vth shifts"), +IOP( "pscbe1", BSIM4v5_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pscbe2", BSIM4v5_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pvag", BSIM4v5_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), + +IOP( "jss", BSIM4v5_MOD_JSS, IF_REAL, "Bottom source junction reverse saturation current density"), +IOP( "jsws", BSIM4v5_MOD_JSWS, IF_REAL, "Isolation edge sidewall source junction reverse saturation current density"), +IOP( "jswgs", BSIM4v5_MOD_JSWGS, IF_REAL, "Gate edge source junction reverse saturation current density"), +IOP( "pbs", BSIM4v5_MOD_PBS, IF_REAL, "Source junction built-in potential"), +IOP( "njs", BSIM4v5_MOD_NJS, IF_REAL, "Source junction emission coefficient"), +IOP( "xtis", BSIM4v5_MOD_XTIS, IF_REAL, "Source junction current temperature exponent"), +IOP( "mjs", BSIM4v5_MOD_MJS, IF_REAL, "Source bottom junction capacitance grading coefficient"), +IOP( "pbsws", BSIM4v5_MOD_PBSWS, IF_REAL, "Source sidewall junction capacitance built in potential"), +IOP( "mjsws", BSIM4v5_MOD_MJSWS, IF_REAL, "Source sidewall junction capacitance grading coefficient"), +IOP( "pbswgs", BSIM4v5_MOD_PBSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswgs", BSIM4v5_MOD_MJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cjs", BSIM4v5_MOD_CJS, IF_REAL, "Source bottom junction capacitance per unit area"), +IOP( "cjsws", BSIM4v5_MOD_CJSWS, IF_REAL, "Source sidewall junction capacitance per unit periphery"), +IOP( "cjswgs", BSIM4v5_MOD_CJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance per unit width"), + +IOP( "jsd", BSIM4v5_MOD_JSD, IF_REAL, "Bottom drain junction reverse saturation current density"), +IOP( "jswd", BSIM4v5_MOD_JSWD, IF_REAL, "Isolation edge sidewall drain junction reverse saturation current density"), +IOP( "jswgd", BSIM4v5_MOD_JSWGD, IF_REAL, "Gate edge drain junction reverse saturation current density"), +IOP( "pbd", BSIM4v5_MOD_PBD, IF_REAL, "Drain junction built-in potential"), +IOP( "njd", BSIM4v5_MOD_NJD, IF_REAL, "Drain junction emission coefficient"), +IOP( "xtid", BSIM4v5_MOD_XTID, IF_REAL, "Drainjunction current temperature exponent"), +IOP( "mjd", BSIM4v5_MOD_MJD, IF_REAL, "Drain bottom junction capacitance grading coefficient"), +IOP( "pbswd", BSIM4v5_MOD_PBSWD, IF_REAL, "Drain sidewall junction capacitance built in potential"), +IOP( "mjswd", BSIM4v5_MOD_MJSWD, IF_REAL, "Drain sidewall junction capacitance grading coefficient"), +IOP( "pbswgd", BSIM4v5_MOD_PBSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswgd", BSIM4v5_MOD_MJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cjd", BSIM4v5_MOD_CJD, IF_REAL, "Drain bottom junction capacitance per unit area"), +IOP( "cjswd", BSIM4v5_MOD_CJSWD, IF_REAL, "Drain sidewall junction capacitance per unit periphery"), +IOP( "cjswgd", BSIM4v5_MOD_CJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance per unit width"), + +IOP( "vfbcv", BSIM4v5_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"), +IOP( "vfb", BSIM4v5_MOD_VFB, IF_REAL, "Flat Band Voltage"), +IOP( "tpb", BSIM4v5_MOD_TPB, IF_REAL, "Temperature coefficient of pb"), +IOP( "tcj", BSIM4v5_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"), +IOP( "tpbsw", BSIM4v5_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"), +IOP( "tcjsw", BSIM4v5_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"), +IOP( "tpbswg", BSIM4v5_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"), +IOP( "tcjswg", BSIM4v5_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"), +IOP( "acde", BSIM4v5_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"), +IOP( "moin", BSIM4v5_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"), +IOP( "noff", BSIM4v5_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"), +IOP( "voffcv", BSIM4v5_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"), +IOP( "dmcg", BSIM4v5_MOD_DMCG, IF_REAL, "Distance of Mid-Contact to Gate edge"), +IOP( "dmci", BSIM4v5_MOD_DMCI, IF_REAL, "Distance of Mid-Contact to Isolation"), +IOP( "dmdg", BSIM4v5_MOD_DMDG, IF_REAL, "Distance of Mid-Diffusion to Gate edge"), +IOP( "dmcgt", BSIM4v5_MOD_DMCGT, IF_REAL, "Distance of Mid-Contact to Gate edge in Test structures"), +IOP( "xgw", BSIM4v5_MOD_XGW, IF_REAL, "Distance from gate contact center to device edge"), +IOP( "xgl", BSIM4v5_MOD_XGL, IF_REAL, "Variation in Ldrawn"), +IOP( "rshg", BSIM4v5_MOD_RSHG, IF_REAL, "Gate sheet resistance"), +IOP( "ngcon", BSIM4v5_MOD_NGCON, IF_REAL, "Number of gate contacts"), +IOP( "xrcrg1", BSIM4v5_MOD_XRCRG1, IF_REAL, "First fitting parameter the bias-dependent Rg"), +IOP( "xrcrg2", BSIM4v5_MOD_XRCRG2, IF_REAL, "Second fitting parameter the bias-dependent Rg"), +IOP( "lambda", BSIM4v5_MOD_LAMBDA, IF_REAL, " Velocity overshoot parameter"), +IOP( "vtl", BSIM4v5_MOD_VTL, IF_REAL, " thermal velocity"), +IOP( "lc", BSIM4v5_MOD_LC, IF_REAL, " back scattering parameter"), +IOP( "xn", BSIM4v5_MOD_XN, IF_REAL, " back scattering parameter"), +IOP( "vfbsdoff", BSIM4v5_MOD_VFBSDOFF, IF_REAL, "S/D flatband voltage offset"), +IOP( "tvfbsdoff", BSIM4v5_MOD_TVFBSDOFF, IF_REAL, "Temperature parameter for vfbsdoff"), +IOP( "tvoff", BSIM4v5_MOD_TVOFF, IF_REAL, "Temperature parameter for voff"), + +IOP( "lintnoi", BSIM4v5_MOD_LINTNOI, IF_REAL, "lint offset for noise calculation"), +IOP( "lint", BSIM4v5_MOD_LINT, IF_REAL, "Length reduction parameter"), +IOP( "ll", BSIM4v5_MOD_LL, IF_REAL, "Length reduction parameter"), +IOP( "llc", BSIM4v5_MOD_LLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lln", BSIM4v5_MOD_LLN, IF_REAL, "Length reduction parameter"), +IOP( "lw", BSIM4v5_MOD_LW, IF_REAL, "Length reduction parameter"), +IOP( "lwc", BSIM4v5_MOD_LWC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lwn", BSIM4v5_MOD_LWN, IF_REAL, "Length reduction parameter"), +IOP( "lwl", BSIM4v5_MOD_LWL, IF_REAL, "Length reduction parameter"), +IOP( "lwlc", BSIM4v5_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"), +IOP( "lmin", BSIM4v5_MOD_LMIN, IF_REAL, "Minimum length for the model"), +IOP( "lmax", BSIM4v5_MOD_LMAX, IF_REAL, "Maximum length for the model"), + +IOP( "wr", BSIM4v5_MOD_WR, IF_REAL, "Width dependence of rds"), +IOP( "wint", BSIM4v5_MOD_WINT, IF_REAL, "Width reduction parameter"), +IOP( "dwg", BSIM4v5_MOD_DWG, IF_REAL, "Width reduction parameter"), +IOP( "dwb", BSIM4v5_MOD_DWB, IF_REAL, "Width reduction parameter"), + +IOP( "wl", BSIM4v5_MOD_WL, IF_REAL, "Width reduction parameter"), +IOP( "wlc", BSIM4v5_MOD_WLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wln", BSIM4v5_MOD_WLN, IF_REAL, "Width reduction parameter"), +IOP( "ww", BSIM4v5_MOD_WW, IF_REAL, "Width reduction parameter"), +IOP( "wwc", BSIM4v5_MOD_WWC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wwn", BSIM4v5_MOD_WWN, IF_REAL, "Width reduction parameter"), +IOP( "wwl", BSIM4v5_MOD_WWL, IF_REAL, "Width reduction parameter"), +IOP( "wwlc", BSIM4v5_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"), +IOP( "wmin", BSIM4v5_MOD_WMIN, IF_REAL, "Minimum width for the model"), +IOP( "wmax", BSIM4v5_MOD_WMAX, IF_REAL, "Maximum width for the model"), + +IOP( "b0", BSIM4v5_MOD_B0, IF_REAL, "Abulk narrow width parameter"), +IOP( "b1", BSIM4v5_MOD_B1, IF_REAL, "Abulk narrow width parameter"), + +IOP( "cgsl", BSIM4v5_MOD_CGSL, IF_REAL, "New C-V model parameter"), +IOP( "cgdl", BSIM4v5_MOD_CGDL, IF_REAL, "New C-V model parameter"), +IOP( "ckappas", BSIM4v5_MOD_CKAPPAS, IF_REAL, "S/G overlap C-V parameter "), +IOP( "ckappad", BSIM4v5_MOD_CKAPPAD, IF_REAL, "D/G overlap C-V parameter"), +IOP( "cf", BSIM4v5_MOD_CF, IF_REAL, "Fringe capacitance parameter"), +IOP( "clc", BSIM4v5_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "cle", BSIM4v5_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "dwc", BSIM4v5_MOD_DWC, IF_REAL, "Delta W for C-V model"), +IOP( "dlc", BSIM4v5_MOD_DLC, IF_REAL, "Delta L for C-V model"), +IOP( "xw", BSIM4v5_MOD_XW, IF_REAL, "W offset for channel width due to mask/etch effect"), +IOP( "xl", BSIM4v5_MOD_XL, IF_REAL, "L offset for channel length due to mask/etch effect"), +IOP( "dlcig", BSIM4v5_MOD_DLCIG, IF_REAL, "Delta L for Ig model"), +IOP( "dwj", BSIM4v5_MOD_DWJ, IF_REAL, "Delta W for S/D junctions"), + +IOP( "alpha0", BSIM4v5_MOD_ALPHA0, IF_REAL, "substrate current model parameter"), +IOP( "alpha1", BSIM4v5_MOD_ALPHA1, IF_REAL, "substrate current model parameter"), +IOP( "beta0", BSIM4v5_MOD_BETA0, IF_REAL, "substrate current model parameter"), + +IOP( "agidl", BSIM4v5_MOD_AGIDL, IF_REAL, "Pre-exponential constant for GIDL"), +IOP( "bgidl", BSIM4v5_MOD_BGIDL, IF_REAL, "Exponential constant for GIDL"), +IOP( "cgidl", BSIM4v5_MOD_CGIDL, IF_REAL, "Parameter for body-bias dependence of GIDL"), +IOP( "egidl", BSIM4v5_MOD_EGIDL, IF_REAL, "Fitting parameter for Bandbending"), +IOP( "aigc", BSIM4v5_MOD_AIGC, IF_REAL, "Parameter for Igc"), +IOP( "bigc", BSIM4v5_MOD_BIGC, IF_REAL, "Parameter for Igc"), +IOP( "cigc", BSIM4v5_MOD_CIGC, IF_REAL, "Parameter for Igc"), +IOP( "aigsd", BSIM4v5_MOD_AIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "bigsd", BSIM4v5_MOD_BIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "cigsd", BSIM4v5_MOD_CIGSD, IF_REAL, "Parameter for Igs,d"), +IOP( "aigbacc", BSIM4v5_MOD_AIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "bigbacc", BSIM4v5_MOD_BIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "cigbacc", BSIM4v5_MOD_CIGBACC, IF_REAL, "Parameter for Igb"), +IOP( "aigbinv", BSIM4v5_MOD_AIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "bigbinv", BSIM4v5_MOD_BIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "cigbinv", BSIM4v5_MOD_CIGBINV, IF_REAL, "Parameter for Igb"), +IOP( "nigc", BSIM4v5_MOD_NIGC, IF_REAL, "Parameter for Igc slope"), +IOP( "nigbinv", BSIM4v5_MOD_NIGBINV, IF_REAL, "Parameter for Igbinv slope"), +IOP( "nigbacc", BSIM4v5_MOD_NIGBACC, IF_REAL, "Parameter for Igbacc slope"), +IOP( "ntox", BSIM4v5_MOD_NTOX, IF_REAL, "Exponent for Tox ratio"), +IOP( "eigbinv", BSIM4v5_MOD_EIGBINV, IF_REAL, "Parameter for the Si bandgap for Igbinv"), +IOP( "pigcd", BSIM4v5_MOD_PIGCD, IF_REAL, "Parameter for Igc partition"), +IOP( "poxedge", BSIM4v5_MOD_POXEDGE, IF_REAL, "Factor for the gate edge Tox"), + +IOP( "ijthdfwd", BSIM4v5_MOD_IJTHDFWD, IF_REAL, "Forward drain diode forward limiting current"), +IOP( "ijthsfwd", BSIM4v5_MOD_IJTHSFWD, IF_REAL, "Forward source diode forward limiting current"), +IOP( "ijthdrev", BSIM4v5_MOD_IJTHDREV, IF_REAL, "Reverse drain diode forward limiting current"), +IOP( "ijthsrev", BSIM4v5_MOD_IJTHSREV, IF_REAL, "Reverse source diode forward limiting current"), +IOP( "xjbvd", BSIM4v5_MOD_XJBVD, IF_REAL, "Fitting parameter for drain diode breakdown current"), +IOP( "xjbvs", BSIM4v5_MOD_XJBVS, IF_REAL, "Fitting parameter for source diode breakdown current"), +IOP( "bvd", BSIM4v5_MOD_BVD, IF_REAL, "Drain diode breakdown voltage"), +IOP( "bvs", BSIM4v5_MOD_BVS, IF_REAL, "Source diode breakdown voltage"), + +IOP( "jtss", BSIM4v5_MOD_JTSS, IF_REAL, "Source bottom trap-assisted saturation current density"), +IOP( "jtsd", BSIM4v5_MOD_JTSD, IF_REAL, "Drain bottom trap-assisted saturation current density"), +IOP( "jtssws", BSIM4v5_MOD_JTSSWS, IF_REAL, "Source STI sidewall trap-assisted saturation current density"), +IOP( "jtsswd", BSIM4v5_MOD_JTSSWD, IF_REAL, "Drain STI sidewall trap-assisted saturation current density"), +IOP( "jtsswgs", BSIM4v5_MOD_JTSSWGS, IF_REAL, "Source gate-edge sidewall trap-assisted saturation current density"), +IOP( "jtsswgd", BSIM4v5_MOD_JTSSWGD, IF_REAL, "Drain gate-edge sidewall trap-assisted saturation current density"), +IOP( "njts", BSIM4v5_MOD_NJTS, IF_REAL, "Non-ideality factor for bottom junction"), +IOP( "njtssw", BSIM4v5_MOD_NJTSSW, IF_REAL, "Non-ideality factor for STI sidewall junction"), +IOP( "njtsswg", BSIM4v5_MOD_NJTSSWG, IF_REAL, "Non-ideality factor for gate-edge sidewall junction"), +IOP( "xtss", BSIM4v5_MOD_XTSS, IF_REAL, "Power dependence of JTSS on temperature"), +IOP( "xtsd", BSIM4v5_MOD_XTSD, IF_REAL, "Power dependence of JTSD on temperature"), +IOP( "xtssws", BSIM4v5_MOD_XTSSWS, IF_REAL, "Power dependence of JTSSWS on temperature"), +IOP( "xtsswd", BSIM4v5_MOD_XTSSWD, IF_REAL, "Power dependence of JTSSWD on temperature"), +IOP( "xtsswgs", BSIM4v5_MOD_XTSSWGS, IF_REAL, "Power dependence of JTSSWGS on temperature"), +IOP( "xtsswgd", BSIM4v5_MOD_XTSSWGD, IF_REAL, "Power dependence of JTSSWGD on temperature"), +IOP( "tnjts", BSIM4v5_MOD_TNJTS, IF_REAL, "Temperature coefficient for NJTS"), +IOP( "tnjtssw", BSIM4v5_MOD_TNJTSSW, IF_REAL, "Temperature coefficient for NJTSSW"), +IOP( "tnjtsswg", BSIM4v5_MOD_TNJTSSWG, IF_REAL, "Temperature coefficient for NJTSSWG"), +IOP( "vtss", BSIM4v5_MOD_VTSS, IF_REAL, "Source bottom trap-assisted voltage dependent parameter"), +IOP( "vtsd", BSIM4v5_MOD_VTSD, IF_REAL, "Drain bottom trap-assisted voltage dependent parameter"), +IOP( "vtssws", BSIM4v5_MOD_VTSSWS, IF_REAL, "Source STI sidewall trap-assisted voltage dependent parameter"), +IOP( "vtsswd", BSIM4v5_MOD_VTSSWD, IF_REAL, "Drain STI sidewall trap-assisted voltage dependent parameter"), +IOP( "vtsswgs", BSIM4v5_MOD_VTSSWGS, IF_REAL, "Source gate-edge sidewall trap-assisted voltage dependent parameter"), +IOP( "vtsswgd", BSIM4v5_MOD_VTSSWGD, IF_REAL, "Drain gate-edge sidewall trap-assisted voltage dependent parameter"), + +IOP( "gbmin", BSIM4v5_MOD_GBMIN, IF_REAL, "Minimum body conductance"), +IOP( "rbdb", BSIM4v5_MOD_RBDB, IF_REAL, "Resistance between bNode and dbNode"), +IOP( "rbpb", BSIM4v5_MOD_RBPB, IF_REAL, "Resistance between bNodePrime and bNode"), +IOP( "rbsb", BSIM4v5_MOD_RBSB, IF_REAL, "Resistance between bNode and sbNode"), +IOP( "rbps", BSIM4v5_MOD_RBPS, IF_REAL, "Resistance between bNodePrime and sbNode"), +IOP( "rbpd", BSIM4v5_MOD_RBPD, IF_REAL, "Resistance between bNodePrime and bNode"), + +IOP( "rbps0", BSIM4v5_MOD_RBPS0, IF_REAL , "Body resistance RBPS scaling"), +IOP( "rbpsl", BSIM4v5_MOD_RBPSL, IF_REAL , "Body resistance RBPS L scaling"), +IOP( "rbpsw", BSIM4v5_MOD_RBPSW, IF_REAL , "Body resistance RBPS W scaling"), +IOP( "rbpsnf", BSIM4v5_MOD_RBPSNF, IF_REAL , "Body resistance RBPS NF scaling"), + +IOP( "rbpd0", BSIM4v5_MOD_RBPD0, IF_REAL , "Body resistance RBPD scaling"), +IOP( "rbpdl", BSIM4v5_MOD_RBPDL, IF_REAL , "Body resistance RBPD L scaling"), +IOP( "rbpdw", BSIM4v5_MOD_RBPDW, IF_REAL , "Body resistance RBPD W scaling"), +IOP( "rbpdnf", BSIM4v5_MOD_RBPDNF, IF_REAL , "Body resistance RBPD NF scaling"), + +IOP( "rbpbx0", BSIM4v5_MOD_RBPBX0, IF_REAL , "Body resistance RBPBX scaling"), +IOP( "rbpbxl", BSIM4v5_MOD_RBPBXL, IF_REAL , "Body resistance RBPBX L scaling"), +IOP( "rbpbxw", BSIM4v5_MOD_RBPBXW, IF_REAL , "Body resistance RBPBX W scaling"), +IOP( "rbpbxnf", BSIM4v5_MOD_RBPBXNF, IF_REAL , "Body resistance RBPBX NF scaling"), +IOP( "rbpby0", BSIM4v5_MOD_RBPBY0, IF_REAL , "Body resistance RBPBY scaling"), +IOP( "rbpbyl", BSIM4v5_MOD_RBPBYL, IF_REAL , "Body resistance RBPBY L scaling"), +IOP( "rbpbyw", BSIM4v5_MOD_RBPBYW, IF_REAL , "Body resistance RBPBY W scaling"), +IOP( "rbpbynf", BSIM4v5_MOD_RBPBYNF, IF_REAL , "Body resistance RBPBY NF scaling"), + +IOP( "rbsbx0", BSIM4v5_MOD_RBSBX0, IF_REAL , "Body resistance RBSBX scaling"), +IOP( "rbsby0", BSIM4v5_MOD_RBSBY0, IF_REAL , "Body resistance RBSBY scaling"), +IOP( "rbdbx0", BSIM4v5_MOD_RBDBX0, IF_REAL , "Body resistance RBDBX scaling"), +IOP( "rbdby0", BSIM4v5_MOD_RBDBY0, IF_REAL , "Body resistance RBDBY scaling"), + +IOP( "rbsdbxl", BSIM4v5_MOD_RBSDBXL, IF_REAL , "Body resistance RBSDBX L scaling"), +IOP( "rbsdbxw", BSIM4v5_MOD_RBSDBXW, IF_REAL , "Body resistance RBSDBX W scaling"), +IOP( "rbsdbxnf", BSIM4v5_MOD_RBSDBXNF, IF_REAL , "Body resistance RBSDBX NF scaling"), +IOP( "rbsdbyl", BSIM4v5_MOD_RBSDBYL, IF_REAL , "Body resistance RBSDBY L scaling"), +IOP( "rbsdbyw", BSIM4v5_MOD_RBSDBYW, IF_REAL , "Body resistance RBSDBY W scaling"), +IOP( "rbsdbynf", BSIM4v5_MOD_RBSDBYNF, IF_REAL , "Body resistance RBSDBY NF scaling"), + +IOP( "lcdsc", BSIM4v5_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"), +IOP( "lcdscb", BSIM4v5_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"), +IOP( "lcdscd", BSIM4v5_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"), +IOP( "lcit", BSIM4v5_MOD_LCIT, IF_REAL, "Length dependence of cit"), +IOP( "lnfactor", BSIM4v5_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"), +IOP( "lxj", BSIM4v5_MOD_LXJ, IF_REAL, "Length dependence of xj"), +IOP( "lvsat", BSIM4v5_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), +IOP( "lat", BSIM4v5_MOD_LAT, IF_REAL, "Length dependence of at"), +IOP( "la0", BSIM4v5_MOD_LA0, IF_REAL, "Length dependence of a0"), +IOP( "lags", BSIM4v5_MOD_LAGS, IF_REAL, "Length dependence of ags"), +IOP( "la1", BSIM4v5_MOD_LA1, IF_REAL, "Length dependence of a1"), +IOP( "la2", BSIM4v5_MOD_LA2, IF_REAL, "Length dependence of a2"), +IOP( "lketa", BSIM4v5_MOD_LKETA, IF_REAL, "Length dependence of keta"), +IOP( "lnsub", BSIM4v5_MOD_LNSUB, IF_REAL, "Length dependence of nsub"), +IOP( "lndep", BSIM4v5_MOD_LNDEP, IF_REAL, "Length dependence of ndep"), +IOP( "lnsd", BSIM4v5_MOD_LNSD, IF_REAL, "Length dependence of nsd"), +IOP( "lphin", BSIM4v5_MOD_LPHIN, IF_REAL, "Length dependence of phin"), +IOP( "lngate", BSIM4v5_MOD_LNGATE, IF_REAL, "Length dependence of ngate"), +IOP( "lgamma1", BSIM4v5_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"), +IOP( "lgamma2", BSIM4v5_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"), +IOP( "lvbx", BSIM4v5_MOD_LVBX, IF_REAL, "Length dependence of vbx"), +IOP( "lvbm", BSIM4v5_MOD_LVBM, IF_REAL, "Length dependence of vbm"), +IOP( "lxt", BSIM4v5_MOD_LXT, IF_REAL, "Length dependence of xt"), +IOP( "lk1", BSIM4v5_MOD_LK1, IF_REAL, "Length dependence of k1"), +IOP( "lkt1", BSIM4v5_MOD_LKT1, IF_REAL, "Length dependence of kt1"), +IOP( "lkt1l", BSIM4v5_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"), +IOP( "lkt2", BSIM4v5_MOD_LKT2, IF_REAL, "Length dependence of kt2"), +IOP( "lk2", BSIM4v5_MOD_LK2, IF_REAL, "Length dependence of k2"), +IOP( "lk3", BSIM4v5_MOD_LK3, IF_REAL, "Length dependence of k3"), +IOP( "lk3b", BSIM4v5_MOD_LK3B, IF_REAL, "Length dependence of k3b"), +IOP( "lw0", BSIM4v5_MOD_LW0, IF_REAL, "Length dependence of w0"), +IOP( "ldvtp0", BSIM4v5_MOD_LDVTP0, IF_REAL, "Length dependence of dvtp0"), +IOP( "ldvtp1", BSIM4v5_MOD_LDVTP1, IF_REAL, "Length dependence of dvtp1"), +IOP( "llpe0", BSIM4v5_MOD_LLPE0, IF_REAL, "Length dependence of lpe0"), +IOP( "llpeb", BSIM4v5_MOD_LLPEB, IF_REAL, "Length dependence of lpeb"), +IOP( "ldvt0", BSIM4v5_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"), +IOP( "ldvt1", BSIM4v5_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"), +IOP( "ldvt2", BSIM4v5_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"), +IOP( "ldvt0w", BSIM4v5_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"), +IOP( "ldvt1w", BSIM4v5_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"), +IOP( "ldvt2w", BSIM4v5_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"), +IOP( "ldrout", BSIM4v5_MOD_LDROUT, IF_REAL, "Length dependence of drout"), +IOP( "ldsub", BSIM4v5_MOD_LDSUB, IF_REAL, "Length dependence of dsub"), +IOP( "lvth0", BSIM4v5_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lvtho", BSIM4v5_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lua", BSIM4v5_MOD_LUA, IF_REAL, "Length dependence of ua"), +IOP( "lua1", BSIM4v5_MOD_LUA1, IF_REAL, "Length dependence of ua1"), +IOP( "lub", BSIM4v5_MOD_LUB, IF_REAL, "Length dependence of ub"), +IOP( "lub1", BSIM4v5_MOD_LUB1, IF_REAL, "Length dependence of ub1"), +IOP( "luc", BSIM4v5_MOD_LUC, IF_REAL, "Length dependence of uc"), +IOP( "luc1", BSIM4v5_MOD_LUC1, IF_REAL, "Length dependence of uc1"), +IOP( "lud", BSIM4v5_MOD_LUD, IF_REAL, "Length dependence of ud"), +IOP( "lud1", BSIM4v5_MOD_LUD1, IF_REAL, "Length dependence of ud1"), +IOP( "lup", BSIM4v5_MOD_LUP, IF_REAL, "Length dependence of up"), +IOP( "llp", BSIM4v5_MOD_LLP, IF_REAL, "Length dependence of lp"), +IOP( "lu0", BSIM4v5_MOD_LU0, IF_REAL, "Length dependence of u0"), +IOP( "lute", BSIM4v5_MOD_LUTE, IF_REAL, "Length dependence of ute"), +IOP( "lvoff", BSIM4v5_MOD_LVOFF, IF_REAL, "Length dependence of voff"), +IOP( "lminv", BSIM4v5_MOD_LMINV, IF_REAL, "Length dependence of minv"), +IOP( "ldelta", BSIM4v5_MOD_LDELTA, IF_REAL, "Length dependence of delta"), +IOP( "lrdsw", BSIM4v5_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), +IOP( "lrsw", BSIM4v5_MOD_LRSW, IF_REAL, "Length dependence of rsw"), +IOP( "lrdw", BSIM4v5_MOD_LRDW, IF_REAL, "Length dependence of rdw"), + +IOP( "lprwg", BSIM4v5_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), +IOP( "lprwb", BSIM4v5_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), + +IOP( "lprt", BSIM4v5_MOD_LPRT, IF_REAL, "Length dependence of prt "), +IOP( "leta0", BSIM4v5_MOD_LETA0, IF_REAL, "Length dependence of eta0"), +IOP( "letab", BSIM4v5_MOD_LETAB, IF_REAL, "Length dependence of etab"), +IOP( "lpclm", BSIM4v5_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), +IOP( "lpdiblc1", BSIM4v5_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), +IOP( "lpdiblc2", BSIM4v5_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), +IOP( "lpdiblcb", BSIM4v5_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lfprout", BSIM4v5_MOD_LFPROUT, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lpdits", BSIM4v5_MOD_LPDITS, IF_REAL, "Length dependence of pdits"), +IOP( "lpditsd", BSIM4v5_MOD_LPDITSD, IF_REAL, "Length dependence of pditsd"), +IOP( "lpscbe1", BSIM4v5_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), +IOP( "lpscbe2", BSIM4v5_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), +IOP( "lpvag", BSIM4v5_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), +IOP( "lwr", BSIM4v5_MOD_LWR, IF_REAL, "Length dependence of wr"), +IOP( "ldwg", BSIM4v5_MOD_LDWG, IF_REAL, "Length dependence of dwg"), +IOP( "ldwb", BSIM4v5_MOD_LDWB, IF_REAL, "Length dependence of dwb"), +IOP( "lb0", BSIM4v5_MOD_LB0, IF_REAL, "Length dependence of b0"), +IOP( "lb1", BSIM4v5_MOD_LB1, IF_REAL, "Length dependence of b1"), +IOP( "lcgsl", BSIM4v5_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"), +IOP( "lcgdl", BSIM4v5_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"), +IOP( "lckappas", BSIM4v5_MOD_LCKAPPAS, IF_REAL, "Length dependence of ckappas"), +IOP( "lckappad", BSIM4v5_MOD_LCKAPPAD, IF_REAL, "Length dependence of ckappad"), +IOP( "lcf", BSIM4v5_MOD_LCF, IF_REAL, "Length dependence of cf"), +IOP( "lclc", BSIM4v5_MOD_LCLC, IF_REAL, "Length dependence of clc"), +IOP( "lcle", BSIM4v5_MOD_LCLE, IF_REAL, "Length dependence of cle"), +IOP( "lalpha0", BSIM4v5_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"), +IOP( "lalpha1", BSIM4v5_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"), +IOP( "lbeta0", BSIM4v5_MOD_LBETA0, IF_REAL, "Length dependence of beta0"), + +IOP( "lagidl", BSIM4v5_MOD_LAGIDL, IF_REAL, "Length dependence of agidl"), +IOP( "lbgidl", BSIM4v5_MOD_LBGIDL, IF_REAL, "Length dependence of bgidl"), +IOP( "lcgidl", BSIM4v5_MOD_LCGIDL, IF_REAL, "Length dependence of cgidl"), +IOP( "legidl", BSIM4v5_MOD_LEGIDL, IF_REAL, "Length dependence of egidl"), +IOP( "laigc", BSIM4v5_MOD_LAIGC, IF_REAL, "Length dependence of aigc"), +IOP( "lbigc", BSIM4v5_MOD_LBIGC, IF_REAL, "Length dependence of bigc"), +IOP( "lcigc", BSIM4v5_MOD_LCIGC, IF_REAL, "Length dependence of cigc"), +IOP( "laigsd", BSIM4v5_MOD_LAIGSD, IF_REAL, "Length dependence of aigsd"), +IOP( "lbigsd", BSIM4v5_MOD_LBIGSD, IF_REAL, "Length dependence of bigsd"), +IOP( "lcigsd", BSIM4v5_MOD_LCIGSD, IF_REAL, "Length dependence of cigsd"), +IOP( "laigbacc", BSIM4v5_MOD_LAIGBACC, IF_REAL, "Length dependence of aigbacc"), +IOP( "lbigbacc", BSIM4v5_MOD_LBIGBACC, IF_REAL, "Length dependence of bigbacc"), +IOP( "lcigbacc", BSIM4v5_MOD_LCIGBACC, IF_REAL, "Length dependence of cigbacc"), +IOP( "laigbinv", BSIM4v5_MOD_LAIGBINV, IF_REAL, "Length dependence of aigbinv"), +IOP( "lbigbinv", BSIM4v5_MOD_LBIGBINV, IF_REAL, "Length dependence of bigbinv"), +IOP( "lcigbinv", BSIM4v5_MOD_LCIGBINV, IF_REAL, "Length dependence of cigbinv"), +IOP( "lnigc", BSIM4v5_MOD_LNIGC, IF_REAL, "Length dependence of nigc"), +IOP( "lnigbinv", BSIM4v5_MOD_LNIGBINV, IF_REAL, "Length dependence of nigbinv"), +IOP( "lnigbacc", BSIM4v5_MOD_LNIGBACC, IF_REAL, "Length dependence of nigbacc"), +IOP( "lntox", BSIM4v5_MOD_LNTOX, IF_REAL, "Length dependence of ntox"), +IOP( "leigbinv", BSIM4v5_MOD_LEIGBINV, IF_REAL, "Length dependence for eigbinv"), +IOP( "lpigcd", BSIM4v5_MOD_LPIGCD, IF_REAL, "Length dependence for pigcd"), +IOP( "lpoxedge", BSIM4v5_MOD_LPOXEDGE, IF_REAL, "Length dependence for poxedge"), + +IOP( "lvfbcv", BSIM4v5_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"), +IOP( "lvfb", BSIM4v5_MOD_LVFB, IF_REAL, "Length dependence of vfb"), +IOP( "lacde", BSIM4v5_MOD_LACDE, IF_REAL, "Length dependence of acde"), +IOP( "lmoin", BSIM4v5_MOD_LMOIN, IF_REAL, "Length dependence of moin"), +IOP( "lnoff", BSIM4v5_MOD_LNOFF, IF_REAL, "Length dependence of noff"), +IOP( "lvoffcv", BSIM4v5_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"), +IOP( "lxrcrg1", BSIM4v5_MOD_LXRCRG1, IF_REAL, "Length dependence of xrcrg1"), +IOP( "lxrcrg2", BSIM4v5_MOD_LXRCRG2, IF_REAL, "Length dependence of xrcrg2"), +IOP( "llambda", BSIM4v5_MOD_LLAMBDA, IF_REAL, "Length dependence of lambda"), +IOP( "lvtl", BSIM4v5_MOD_LVTL, IF_REAL, " Length dependence of vtl"), +IOP( "lxn", BSIM4v5_MOD_LXN, IF_REAL, " Length dependence of xn"), +IOP( "leu", BSIM4v5_MOD_LEU, IF_REAL, " Length dependence of eu"), +IOP( "lvfbsdoff", BSIM4v5_MOD_LVFBSDOFF, IF_REAL, "Length dependence of vfbsdoff"), +IOP( "ltvfbsdoff", BSIM4v5_MOD_LTVFBSDOFF, IF_REAL, "Length dependence of tvfbsdoff"), +IOP( "ltvoff", BSIM4v5_MOD_LTVOFF, IF_REAL, "Length dependence of tvoff"), + +IOP( "wcdsc", BSIM4v5_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), +IOP( "wcdscb", BSIM4v5_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), +IOP( "wcdscd", BSIM4v5_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), +IOP( "wcit", BSIM4v5_MOD_WCIT, IF_REAL, "Width dependence of cit"), +IOP( "wnfactor", BSIM4v5_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), +IOP( "wxj", BSIM4v5_MOD_WXJ, IF_REAL, "Width dependence of xj"), +IOP( "wvsat", BSIM4v5_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), +IOP( "wat", BSIM4v5_MOD_WAT, IF_REAL, "Width dependence of at"), +IOP( "wa0", BSIM4v5_MOD_WA0, IF_REAL, "Width dependence of a0"), +IOP( "wags", BSIM4v5_MOD_WAGS, IF_REAL, "Width dependence of ags"), +IOP( "wa1", BSIM4v5_MOD_WA1, IF_REAL, "Width dependence of a1"), +IOP( "wa2", BSIM4v5_MOD_WA2, IF_REAL, "Width dependence of a2"), +IOP( "wketa", BSIM4v5_MOD_WKETA, IF_REAL, "Width dependence of keta"), +IOP( "wnsub", BSIM4v5_MOD_WNSUB, IF_REAL, "Width dependence of nsub"), +IOP( "wndep", BSIM4v5_MOD_WNDEP, IF_REAL, "Width dependence of ndep"), +IOP( "wnsd", BSIM4v5_MOD_WNSD, IF_REAL, "Width dependence of nsd"), +IOP( "wphin", BSIM4v5_MOD_WPHIN, IF_REAL, "Width dependence of phin"), +IOP( "wngate", BSIM4v5_MOD_WNGATE, IF_REAL, "Width dependence of ngate"), +IOP( "wgamma1", BSIM4v5_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"), +IOP( "wgamma2", BSIM4v5_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"), +IOP( "wvbx", BSIM4v5_MOD_WVBX, IF_REAL, "Width dependence of vbx"), +IOP( "wvbm", BSIM4v5_MOD_WVBM, IF_REAL, "Width dependence of vbm"), +IOP( "wxt", BSIM4v5_MOD_WXT, IF_REAL, "Width dependence of xt"), +IOP( "wk1", BSIM4v5_MOD_WK1, IF_REAL, "Width dependence of k1"), +IOP( "wkt1", BSIM4v5_MOD_WKT1, IF_REAL, "Width dependence of kt1"), +IOP( "wkt1l", BSIM4v5_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"), +IOP( "wkt2", BSIM4v5_MOD_WKT2, IF_REAL, "Width dependence of kt2"), +IOP( "wk2", BSIM4v5_MOD_WK2, IF_REAL, "Width dependence of k2"), +IOP( "wk3", BSIM4v5_MOD_WK3, IF_REAL, "Width dependence of k3"), +IOP( "wk3b", BSIM4v5_MOD_WK3B, IF_REAL, "Width dependence of k3b"), +IOP( "ww0", BSIM4v5_MOD_WW0, IF_REAL, "Width dependence of w0"), +IOP( "wdvtp0", BSIM4v5_MOD_WDVTP0, IF_REAL, "Width dependence of dvtp0"), +IOP( "wdvtp1", BSIM4v5_MOD_WDVTP1, IF_REAL, "Width dependence of dvtp1"), +IOP( "wlpe0", BSIM4v5_MOD_WLPE0, IF_REAL, "Width dependence of lpe0"), +IOP( "wlpeb", BSIM4v5_MOD_WLPEB, IF_REAL, "Width dependence of lpeb"), +IOP( "wdvt0", BSIM4v5_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"), +IOP( "wdvt1", BSIM4v5_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"), +IOP( "wdvt2", BSIM4v5_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"), +IOP( "wdvt0w", BSIM4v5_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"), +IOP( "wdvt1w", BSIM4v5_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"), +IOP( "wdvt2w", BSIM4v5_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"), +IOP( "wdrout", BSIM4v5_MOD_WDROUT, IF_REAL, "Width dependence of drout"), +IOP( "wdsub", BSIM4v5_MOD_WDSUB, IF_REAL, "Width dependence of dsub"), +IOP( "wvth0", BSIM4v5_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wvtho", BSIM4v5_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wua", BSIM4v5_MOD_WUA, IF_REAL, "Width dependence of ua"), +IOP( "wua1", BSIM4v5_MOD_WUA1, IF_REAL, "Width dependence of ua1"), +IOP( "wub", BSIM4v5_MOD_WUB, IF_REAL, "Width dependence of ub"), +IOP( "wub1", BSIM4v5_MOD_WUB1, IF_REAL, "Width dependence of ub1"), +IOP( "wuc", BSIM4v5_MOD_WUC, IF_REAL, "Width dependence of uc"), +IOP( "wuc1", BSIM4v5_MOD_WUC1, IF_REAL, "Width dependence of uc1"), +IOP( "wud", BSIM4v5_MOD_WUD, IF_REAL, "Width dependence of ud"), +IOP( "wud1", BSIM4v5_MOD_WUD1, IF_REAL, "Width dependence of ud1"), +IOP( "wup", BSIM4v5_MOD_WUP, IF_REAL, "Width dependence of up"), +IOP( "wlp", BSIM4v5_MOD_WLP, IF_REAL, "Width dependence of lp"), +IOP( "wu0", BSIM4v5_MOD_WU0, IF_REAL, "Width dependence of u0"), +IOP( "wute", BSIM4v5_MOD_WUTE, IF_REAL, "Width dependence of ute"), +IOP( "wvoff", BSIM4v5_MOD_WVOFF, IF_REAL, "Width dependence of voff"), +IOP( "wminv", BSIM4v5_MOD_WMINV, IF_REAL, "Width dependence of minv"), +IOP( "wdelta", BSIM4v5_MOD_WDELTA, IF_REAL, "Width dependence of delta"), +IOP( "wrdsw", BSIM4v5_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "), +IOP( "wrsw", BSIM4v5_MOD_WRSW, IF_REAL, "Width dependence of rsw"), +IOP( "wrdw", BSIM4v5_MOD_WRDW, IF_REAL, "Width dependence of rdw"), + +IOP( "wprwg", BSIM4v5_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), +IOP( "wprwb", BSIM4v5_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), + +IOP( "wprt", BSIM4v5_MOD_WPRT, IF_REAL, "Width dependence of prt"), +IOP( "weta0", BSIM4v5_MOD_WETA0, IF_REAL, "Width dependence of eta0"), +IOP( "wetab", BSIM4v5_MOD_WETAB, IF_REAL, "Width dependence of etab"), +IOP( "wpclm", BSIM4v5_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), +IOP( "wpdiblc1", BSIM4v5_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), +IOP( "wpdiblc2", BSIM4v5_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), +IOP( "wpdiblcb", BSIM4v5_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wfprout", BSIM4v5_MOD_WFPROUT, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wpdits", BSIM4v5_MOD_WPDITS, IF_REAL, "Width dependence of pdits"), +IOP( "wpditsd", BSIM4v5_MOD_WPDITSD, IF_REAL, "Width dependence of pditsd"), +IOP( "wpscbe1", BSIM4v5_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), +IOP( "wpscbe2", BSIM4v5_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), +IOP( "wpvag", BSIM4v5_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), +IOP( "wwr", BSIM4v5_MOD_WWR, IF_REAL, "Width dependence of wr"), +IOP( "wdwg", BSIM4v5_MOD_WDWG, IF_REAL, "Width dependence of dwg"), +IOP( "wdwb", BSIM4v5_MOD_WDWB, IF_REAL, "Width dependence of dwb"), +IOP( "wb0", BSIM4v5_MOD_WB0, IF_REAL, "Width dependence of b0"), +IOP( "wb1", BSIM4v5_MOD_WB1, IF_REAL, "Width dependence of b1"), +IOP( "wcgsl", BSIM4v5_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"), +IOP( "wcgdl", BSIM4v5_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"), +IOP( "wckappas", BSIM4v5_MOD_WCKAPPAS, IF_REAL, "Width dependence of ckappas"), +IOP( "wckappad", BSIM4v5_MOD_WCKAPPAD, IF_REAL, "Width dependence of ckappad"), +IOP( "wcf", BSIM4v5_MOD_WCF, IF_REAL, "Width dependence of cf"), +IOP( "wclc", BSIM4v5_MOD_WCLC, IF_REAL, "Width dependence of clc"), +IOP( "wcle", BSIM4v5_MOD_WCLE, IF_REAL, "Width dependence of cle"), +IOP( "walpha0", BSIM4v5_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"), +IOP( "walpha1", BSIM4v5_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"), +IOP( "wbeta0", BSIM4v5_MOD_WBETA0, IF_REAL, "Width dependence of beta0"), + +IOP( "wagidl", BSIM4v5_MOD_WAGIDL, IF_REAL, "Width dependence of agidl"), +IOP( "wbgidl", BSIM4v5_MOD_WBGIDL, IF_REAL, "Width dependence of bgidl"), +IOP( "wcgidl", BSIM4v5_MOD_WCGIDL, IF_REAL, "Width dependence of cgidl"), +IOP( "wegidl", BSIM4v5_MOD_WEGIDL, IF_REAL, "Width dependence of egidl"), +IOP( "waigc", BSIM4v5_MOD_WAIGC, IF_REAL, "Width dependence of aigc"), +IOP( "wbigc", BSIM4v5_MOD_WBIGC, IF_REAL, "Width dependence of bigc"), +IOP( "wcigc", BSIM4v5_MOD_WCIGC, IF_REAL, "Width dependence of cigc"), +IOP( "waigsd", BSIM4v5_MOD_WAIGSD, IF_REAL, "Width dependence of aigsd"), +IOP( "wbigsd", BSIM4v5_MOD_WBIGSD, IF_REAL, "Width dependence of bigsd"), +IOP( "wcigsd", BSIM4v5_MOD_WCIGSD, IF_REAL, "Width dependence of cigsd"), +IOP( "waigbacc", BSIM4v5_MOD_WAIGBACC, IF_REAL, "Width dependence of aigbacc"), +IOP( "wbigbacc", BSIM4v5_MOD_WBIGBACC, IF_REAL, "Width dependence of bigbacc"), +IOP( "wcigbacc", BSIM4v5_MOD_WCIGBACC, IF_REAL, "Width dependence of cigbacc"), +IOP( "waigbinv", BSIM4v5_MOD_WAIGBINV, IF_REAL, "Width dependence of aigbinv"), +IOP( "wbigbinv", BSIM4v5_MOD_WBIGBINV, IF_REAL, "Width dependence of bigbinv"), +IOP( "wcigbinv", BSIM4v5_MOD_WCIGBINV, IF_REAL, "Width dependence of cigbinv"), +IOP( "wnigc", BSIM4v5_MOD_WNIGC, IF_REAL, "Width dependence of nigc"), +IOP( "wnigbinv", BSIM4v5_MOD_WNIGBINV, IF_REAL, "Width dependence of nigbinv"), +IOP( "wnigbacc", BSIM4v5_MOD_WNIGBACC, IF_REAL, "Width dependence of nigbacc"), +IOP( "wntox", BSIM4v5_MOD_WNTOX, IF_REAL, "Width dependence of ntox"), +IOP( "weigbinv", BSIM4v5_MOD_WEIGBINV, IF_REAL, "Width dependence for eigbinv"), +IOP( "wpigcd", BSIM4v5_MOD_WPIGCD, IF_REAL, "Width dependence for pigcd"), +IOP( "wpoxedge", BSIM4v5_MOD_WPOXEDGE, IF_REAL, "Width dependence for poxedge"), +IOP( "wvfbcv", BSIM4v5_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"), +IOP( "wvfb", BSIM4v5_MOD_WVFB, IF_REAL, "Width dependence of vfb"), +IOP( "wacde", BSIM4v5_MOD_WACDE, IF_REAL, "Width dependence of acde"), +IOP( "wmoin", BSIM4v5_MOD_WMOIN, IF_REAL, "Width dependence of moin"), +IOP( "wnoff", BSIM4v5_MOD_WNOFF, IF_REAL, "Width dependence of noff"), +IOP( "wvoffcv", BSIM4v5_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"), +IOP( "wxrcrg1", BSIM4v5_MOD_WXRCRG1, IF_REAL, "Width dependence of xrcrg1"), +IOP( "wxrcrg2", BSIM4v5_MOD_WXRCRG2, IF_REAL, "Width dependence of xrcrg2"), +IOP( "wlambda", BSIM4v5_MOD_WLAMBDA, IF_REAL, "Width dependence of lambda"), +IOP( "wvtl", BSIM4v5_MOD_WVTL, IF_REAL, "Width dependence of vtl"), +IOP( "wxn", BSIM4v5_MOD_WXN, IF_REAL, "Width dependence of xn"), +IOP( "weu", BSIM4v5_MOD_WEU, IF_REAL, "Width dependence of eu"), +IOP( "wvfbsdoff", BSIM4v5_MOD_WVFBSDOFF, IF_REAL, "Width dependence of vfbsdoff"), +IOP( "wtvfbsdoff", BSIM4v5_MOD_WTVFBSDOFF, IF_REAL, "Width dependence of tvfbsdoff"), +IOP( "wtvoff", BSIM4v5_MOD_WTVOFF, IF_REAL, "Width dependence of tvoff"), + +IOP( "pcdsc", BSIM4v5_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), +IOP( "pcdscb", BSIM4v5_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), +IOP( "pcdscd", BSIM4v5_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), +IOP( "pcit", BSIM4v5_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), +IOP( "pnfactor", BSIM4v5_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), +IOP( "pxj", BSIM4v5_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), +IOP( "pvsat", BSIM4v5_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), +IOP( "pat", BSIM4v5_MOD_PAT, IF_REAL, "Cross-term dependence of at"), +IOP( "pa0", BSIM4v5_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), +IOP( "pags", BSIM4v5_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), +IOP( "pa1", BSIM4v5_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), +IOP( "pa2", BSIM4v5_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), +IOP( "pketa", BSIM4v5_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"), +IOP( "pnsub", BSIM4v5_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"), +IOP( "pndep", BSIM4v5_MOD_PNDEP, IF_REAL, "Cross-term dependence of ndep"), +IOP( "pnsd", BSIM4v5_MOD_PNSD, IF_REAL, "Cross-term dependence of nsd"), +IOP( "pphin", BSIM4v5_MOD_PPHIN, IF_REAL, "Cross-term dependence of phin"), +IOP( "pngate", BSIM4v5_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"), +IOP( "pgamma1", BSIM4v5_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"), +IOP( "pgamma2", BSIM4v5_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"), +IOP( "pvbx", BSIM4v5_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"), +IOP( "pvbm", BSIM4v5_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"), +IOP( "pxt", BSIM4v5_MOD_PXT, IF_REAL, "Cross-term dependence of xt"), +IOP( "pk1", BSIM4v5_MOD_PK1, IF_REAL, "Cross-term dependence of k1"), +IOP( "pkt1", BSIM4v5_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"), +IOP( "pkt1l", BSIM4v5_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"), +IOP( "pkt2", BSIM4v5_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"), +IOP( "pk2", BSIM4v5_MOD_PK2, IF_REAL, "Cross-term dependence of k2"), +IOP( "pk3", BSIM4v5_MOD_PK3, IF_REAL, "Cross-term dependence of k3"), +IOP( "pk3b", BSIM4v5_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"), +IOP( "pw0", BSIM4v5_MOD_PW0, IF_REAL, "Cross-term dependence of w0"), +IOP( "pdvtp0", BSIM4v5_MOD_PDVTP0, IF_REAL, "Cross-term dependence of dvtp0"), +IOP( "pdvtp1", BSIM4v5_MOD_PDVTP1, IF_REAL, "Cross-term dependence of dvtp1"), +IOP( "plpe0", BSIM4v5_MOD_PLPE0, IF_REAL, "Cross-term dependence of lpe0"), +IOP( "plpeb", BSIM4v5_MOD_PLPEB, IF_REAL, "Cross-term dependence of lpeb"), +IOP( "pdvt0", BSIM4v5_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"), +IOP( "pdvt1", BSIM4v5_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"), +IOP( "pdvt2", BSIM4v5_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"), +IOP( "pdvt0w", BSIM4v5_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"), +IOP( "pdvt1w", BSIM4v5_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"), +IOP( "pdvt2w", BSIM4v5_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"), +IOP( "pdrout", BSIM4v5_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"), +IOP( "pdsub", BSIM4v5_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"), +IOP( "pvth0", BSIM4v5_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pvtho", BSIM4v5_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pua", BSIM4v5_MOD_PUA, IF_REAL, "Cross-term dependence of ua"), +IOP( "pua1", BSIM4v5_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"), +IOP( "pub", BSIM4v5_MOD_PUB, IF_REAL, "Cross-term dependence of ub"), +IOP( "pub1", BSIM4v5_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"), +IOP( "puc", BSIM4v5_MOD_PUC, IF_REAL, "Cross-term dependence of uc"), +IOP( "puc1", BSIM4v5_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"), +IOP( "pud", BSIM4v5_MOD_PUD, IF_REAL, "Cross-term dependence of ud"), +IOP( "pud1", BSIM4v5_MOD_PUD1, IF_REAL, "Cross-term dependence of ud1"), +IOP( "pup", BSIM4v5_MOD_PUP, IF_REAL, "Cross-term dependence of up"), +IOP( "plp", BSIM4v5_MOD_PLP, IF_REAL, "Cross-term dependence of lp"), +IOP( "pu0", BSIM4v5_MOD_PU0, IF_REAL, "Cross-term dependence of u0"), +IOP( "pute", BSIM4v5_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), +IOP( "pvoff", BSIM4v5_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), +IOP( "pminv", BSIM4v5_MOD_PMINV, IF_REAL, "Cross-term dependence of minv"), +IOP( "pdelta", BSIM4v5_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), +IOP( "prdsw", BSIM4v5_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), +IOP( "prsw", BSIM4v5_MOD_PRSW, IF_REAL, "Cross-term dependence of rsw"), +IOP( "prdw", BSIM4v5_MOD_PRDW, IF_REAL, "Cross-term dependence of rdw"), + +IOP( "pprwg", BSIM4v5_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), +IOP( "pprwb", BSIM4v5_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), + +IOP( "pprt", BSIM4v5_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), +IOP( "peta0", BSIM4v5_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), +IOP( "petab", BSIM4v5_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"), +IOP( "ppclm", BSIM4v5_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"), +IOP( "ppdiblc1", BSIM4v5_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"), +IOP( "ppdiblc2", BSIM4v5_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"), +IOP( "ppdiblcb", BSIM4v5_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "pfprout", BSIM4v5_MOD_PFPROUT, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "ppdits", BSIM4v5_MOD_PPDITS, IF_REAL, "Cross-term dependence of pdits"), +IOP( "ppditsd", BSIM4v5_MOD_PPDITSD, IF_REAL, "Cross-term dependence of pditsd"), +IOP( "ppscbe1", BSIM4v5_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), +IOP( "ppscbe2", BSIM4v5_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), +IOP( "ppvag", BSIM4v5_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), +IOP( "pwr", BSIM4v5_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), +IOP( "pdwg", BSIM4v5_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), +IOP( "pdwb", BSIM4v5_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), +IOP( "pb0", BSIM4v5_MOD_PB0, IF_REAL, "Cross-term dependence of b0"), +IOP( "pb1", BSIM4v5_MOD_PB1, IF_REAL, "Cross-term dependence of b1"), +IOP( "pcgsl", BSIM4v5_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"), +IOP( "pcgdl", BSIM4v5_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"), +IOP( "pckappas", BSIM4v5_MOD_PCKAPPAS, IF_REAL, "Cross-term dependence of ckappas"), +IOP( "pckappad", BSIM4v5_MOD_PCKAPPAD, IF_REAL, "Cross-term dependence of ckappad"), +IOP( "pcf", BSIM4v5_MOD_PCF, IF_REAL, "Cross-term dependence of cf"), +IOP( "pclc", BSIM4v5_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"), +IOP( "pcle", BSIM4v5_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"), +IOP( "palpha0", BSIM4v5_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"), +IOP( "palpha1", BSIM4v5_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"), +IOP( "pbeta0", BSIM4v5_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"), + +IOP( "pagidl", BSIM4v5_MOD_PAGIDL, IF_REAL, "Cross-term dependence of agidl"), +IOP( "pbgidl", BSIM4v5_MOD_PBGIDL, IF_REAL, "Cross-term dependence of bgidl"), +IOP( "pcgidl", BSIM4v5_MOD_PCGIDL, IF_REAL, "Cross-term dependence of cgidl"), +IOP( "pegidl", BSIM4v5_MOD_PEGIDL, IF_REAL, "Cross-term dependence of egidl"), +IOP( "paigc", BSIM4v5_MOD_PAIGC, IF_REAL, "Cross-term dependence of aigc"), +IOP( "pbigc", BSIM4v5_MOD_PBIGC, IF_REAL, "Cross-term dependence of bigc"), +IOP( "pcigc", BSIM4v5_MOD_PCIGC, IF_REAL, "Cross-term dependence of cigc"), +IOP( "paigsd", BSIM4v5_MOD_PAIGSD, IF_REAL, "Cross-term dependence of aigsd"), +IOP( "pbigsd", BSIM4v5_MOD_PBIGSD, IF_REAL, "Cross-term dependence of bigsd"), +IOP( "pcigsd", BSIM4v5_MOD_PCIGSD, IF_REAL, "Cross-term dependence of cigsd"), +IOP( "paigbacc", BSIM4v5_MOD_PAIGBACC, IF_REAL, "Cross-term dependence of aigbacc"), +IOP( "pbigbacc", BSIM4v5_MOD_PBIGBACC, IF_REAL, "Cross-term dependence of bigbacc"), +IOP( "pcigbacc", BSIM4v5_MOD_PCIGBACC, IF_REAL, "Cross-term dependence of cigbacc"), +IOP( "paigbinv", BSIM4v5_MOD_PAIGBINV, IF_REAL, "Cross-term dependence of aigbinv"), +IOP( "pbigbinv", BSIM4v5_MOD_PBIGBINV, IF_REAL, "Cross-term dependence of bigbinv"), +IOP( "pcigbinv", BSIM4v5_MOD_PCIGBINV, IF_REAL, "Cross-term dependence of cigbinv"), +IOP( "pnigc", BSIM4v5_MOD_PNIGC, IF_REAL, "Cross-term dependence of nigc"), +IOP( "pnigbinv", BSIM4v5_MOD_PNIGBINV, IF_REAL, "Cross-term dependence of nigbinv"), +IOP( "pnigbacc", BSIM4v5_MOD_PNIGBACC, IF_REAL, "Cross-term dependence of nigbacc"), +IOP( "pntox", BSIM4v5_MOD_PNTOX, IF_REAL, "Cross-term dependence of ntox"), +IOP( "peigbinv", BSIM4v5_MOD_PEIGBINV, IF_REAL, "Cross-term dependence for eigbinv"), +IOP( "ppigcd", BSIM4v5_MOD_PPIGCD, IF_REAL, "Cross-term dependence for pigcd"), +IOP( "ppoxedge", BSIM4v5_MOD_PPOXEDGE, IF_REAL, "Cross-term dependence for poxedge"), +IOP( "pvfbcv", BSIM4v5_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"), +IOP( "pvfb", BSIM4v5_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"), +IOP( "pacde", BSIM4v5_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"), +IOP( "pmoin", BSIM4v5_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"), +IOP( "pnoff", BSIM4v5_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"), +IOP( "pvoffcv", BSIM4v5_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"), +IOP( "pxrcrg1", BSIM4v5_MOD_PXRCRG1, IF_REAL, "Cross-term dependence of xrcrg1"), +IOP( "pxrcrg2", BSIM4v5_MOD_PXRCRG2, IF_REAL, "Cross-term dependence of xrcrg2"), +IOP( "plambda", BSIM4v5_MOD_PLAMBDA, IF_REAL, "Cross-term dependence of lambda"), +IOP( "pvtl", BSIM4v5_MOD_PVTL, IF_REAL, "Cross-term dependence of vtl"), +IOP( "pxn", BSIM4v5_MOD_PXN, IF_REAL, "Cross-term dependence of xn"), +IOP( "peu", BSIM4v5_MOD_PEU, IF_REAL, "Cross-term dependence of eu"), +IOP( "pvfbsdoff", BSIM4v5_MOD_PVFBSDOFF, IF_REAL, "Cross-term dependence of vfbsdoff"), +IOP( "ptvfbsdoff", BSIM4v5_MOD_PTVFBSDOFF, IF_REAL, "Cross-term dependence of tvfbsdoff"), +IOP( "ptvoff", BSIM4v5_MOD_PTVOFF, IF_REAL, "Cross-term dependence of tvoff"), + +/* stress effect*/ +IOP( "saref", BSIM4v5_MOD_SAREF, IF_REAL, "Reference distance between OD edge to poly of one side"), +IOP( "sbref", BSIM4v5_MOD_SBREF, IF_REAL, "Reference distance between OD edge to poly of the other side"), +IOP( "wlod", BSIM4v5_MOD_WLOD, IF_REAL, "Width parameter for stress effect"), +IOP( "ku0", BSIM4v5_MOD_KU0, IF_REAL, "Mobility degradation/enhancement coefficient for LOD"), +IOP( "kvsat", BSIM4v5_MOD_KVSAT, IF_REAL, "Saturation velocity degradation/enhancement parameter for LOD"), +IOP( "kvth0", BSIM4v5_MOD_KVTH0, IF_REAL, "Threshold degradation/enhancement parameter for LOD"), +IOP( "tku0", BSIM4v5_MOD_TKU0, IF_REAL, "Temperature coefficient of KU0"), +IOP( "llodku0", BSIM4v5_MOD_LLODKU0, IF_REAL, "Length parameter for u0 LOD effect"), +IOP( "wlodku0", BSIM4v5_MOD_WLODKU0, IF_REAL, "Width parameter for u0 LOD effect"), +IOP( "llodvth", BSIM4v5_MOD_LLODVTH, IF_REAL, "Length parameter for vth LOD effect"), +IOP( "wlodvth", BSIM4v5_MOD_WLODVTH, IF_REAL, "Width parameter for vth LOD effect"), +IOP( "lku0", BSIM4v5_MOD_LKU0, IF_REAL, "Length dependence of ku0"), +IOP( "wku0", BSIM4v5_MOD_WKU0, IF_REAL, "Width dependence of ku0"), +IOP( "pku0", BSIM4v5_MOD_PKU0, IF_REAL, "Cross-term dependence of ku0"), +IOP( "lkvth0", BSIM4v5_MOD_LKVTH0, IF_REAL, "Length dependence of kvth0"), +IOP( "wkvth0", BSIM4v5_MOD_WKVTH0, IF_REAL, "Width dependence of kvth0"), +IOP( "pkvth0", BSIM4v5_MOD_PKVTH0, IF_REAL, "Cross-term dependence of kvth0"), +IOP( "stk2", BSIM4v5_MOD_STK2, IF_REAL, "K2 shift factor related to stress effect on vth"), +IOP( "lodk2", BSIM4v5_MOD_LODK2, IF_REAL, "K2 shift modification factor for stress effect"), +IOP( "steta0", BSIM4v5_MOD_STETA0, IF_REAL, "eta0 shift factor related to stress effect on vth"), +IOP( "lodeta0", BSIM4v5_MOD_LODETA0, IF_REAL, "eta0 shift modification factor for stress effect"), +/* Well Proximity Effect */ +IOP( "web", BSIM4v5_MOD_WEB, IF_REAL, "Coefficient for SCB"), +IOP( "wec", BSIM4v5_MOD_WEC, IF_REAL, "Coefficient for SCC"), +IOP( "kvth0we", BSIM4v5_MOD_KVTH0WE, IF_REAL, "Threshold shift factor for well proximity effect"), +IOP( "k2we", BSIM4v5_MOD_K2WE, IF_REAL, " K2 shift factor for well proximity effect "), +IOP( "ku0we", BSIM4v5_MOD_KU0WE, IF_REAL, " Mobility degradation factor for well proximity effect "), +IOP( "scref", BSIM4v5_MOD_SCREF, IF_REAL, " Reference distance to calculate SCA, SCB and SCC"), +IOP( "wpemod", BSIM4v5_MOD_WPEMOD, IF_REAL, " Flag for WPE model (WPEMOD=1 to activate this model) "), +IOP( "lkvth0we", BSIM4v5_MOD_LKVTH0WE, IF_REAL, "Length dependence of kvth0we"), +IOP( "lk2we", BSIM4v5_MOD_LK2WE, IF_REAL, " Length dependence of k2we "), +IOP( "lku0we", BSIM4v5_MOD_LKU0WE, IF_REAL, " Length dependence of ku0we "), +IOP( "wkvth0we", BSIM4v5_MOD_WKVTH0WE, IF_REAL, "Width dependence of kvth0we"), +IOP( "wk2we", BSIM4v5_MOD_WK2WE, IF_REAL, " Width dependence of k2we "), +IOP( "wku0we", BSIM4v5_MOD_WKU0WE, IF_REAL, " Width dependence of ku0we "), +IOP( "pkvth0we", BSIM4v5_MOD_PKVTH0WE, IF_REAL, "Cross-term dependence of kvth0we"), +IOP( "pk2we", BSIM4v5_MOD_PK2WE, IF_REAL, " Cross-term dependence of k2we "), +IOP( "pku0we", BSIM4v5_MOD_PKU0WE, IF_REAL, " Cross-term dependence of ku0we "), + +IOP( "noia", BSIM4v5_MOD_NOIA, IF_REAL, "Flicker noise parameter"), +IOP( "noib", BSIM4v5_MOD_NOIB, IF_REAL, "Flicker noise parameter"), +IOP( "noic", BSIM4v5_MOD_NOIC, IF_REAL, "Flicker noise parameter"), +IOP( "tnoia", BSIM4v5_MOD_TNOIA, IF_REAL, "Thermal noise parameter"), +IOP( "tnoib", BSIM4v5_MOD_TNOIB, IF_REAL, "Thermal noise parameter"), +IOP( "rnoia", BSIM4v5_MOD_RNOIA, IF_REAL, "Thermal noise coefficient"), +IOP( "rnoib", BSIM4v5_MOD_RNOIB, IF_REAL, "Thermal noise coefficient"), +IOP( "ntnoi", BSIM4v5_MOD_NTNOI, IF_REAL, "Thermal noise parameter"), +IOP( "em", BSIM4v5_MOD_EM, IF_REAL, "Flicker noise parameter"), +IOP( "ef", BSIM4v5_MOD_EF, IF_REAL, "Flicker noise frequency exponent"), +IOP( "af", BSIM4v5_MOD_AF, IF_REAL, "Flicker noise exponent"), +IOP( "kf", BSIM4v5_MOD_KF, IF_REAL, "Flicker noise coefficient"), + +IOP( "stimod", BSIM4v5_MOD_STIMOD, IF_REAL, "Stress effect model selector"), +IOP( "sa0", BSIM4v5_MOD_SA0, IF_REAL, "Distance between OD edge to poly of one side"), +IOP( "sb0", BSIM4v5_MOD_SB0, IF_REAL, "Distance between OD edge to poly of other side"), + +IP( "nmos", BSIM4v5_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"), +IP( "pmos", BSIM4v5_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"), +}; + +char *BSIM4v5names[] = { + "Drain", + "Gate", + "Source", + "Bulk", + "Charge" +}; + +int BSIM4v5nSize = NUMELEMS(BSIM4v5names); +int BSIM4v5pTSize = NUMELEMS(BSIM4v5pTable); +int BSIM4v5mPTSize = NUMELEMS(BSIM4v5mPTable); +int BSIM4v5iSize = sizeof(BSIM4v5instance); +int BSIM4v5mSize = sizeof(BSIM4v5model); diff --git a/src/spicelib/devices/bsim4v5/b4v5acld.c b/src/spicelib/devices/bsim4v5/b4v5acld.c new file mode 100644 index 000000000..78d510a3b --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5acld.c @@ -0,0 +1,672 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4acld.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM4v5acLoad(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; + +double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb; +double xcbgb, xcbdb, xcbsb, xcbbb; +double xcggbr, xcgdbr, xcgsbr, xcgbbr, xcggbi, xcgdbi, xcgsbi, xcgbbi; +double Cggr, Cgdr, Cgsr, Cgbr, Cggi, Cgdi, Cgsi, Cgbi; +double xcddbr, xcdgbr, xcdsbr, xcdbbr, xcsdbr, xcsgbr, xcssbr, xcsbbr; +double xcddbi, xcdgbi, xcdsbi, xcdbbi, xcsdbi, xcsgbi, xcssbi, xcsbbi; +double xcdbdb, xcsbsb=0.0, xcgmgmb=0.0, xcgmdb=0.0, xcgmsb=0.0, xcdgmb, xcsgmb; +double xcgmbb=0.0, xcbgmb; +double capbd, capbs, omega; +double gstot, gstotd, gstotg, gstots, gstotb, gspr; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double gIstotg, gIstotd, gIstots, gIstotb; +double gIdtotg, gIdtotd, gIdtots, gIdtotb; +double gIbtotg, gIbtotd, gIbtots, gIbtotb; +double gIgtotg, gIgtotd, gIgtots, gIgtotb; +double cgso, cgdo, cgbo; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double T0=0.0, T1, T2, T3; +double Csg, Csd, Css; +double Cdgr, Cddr, Cdsr, Cdbr, Csgr, Csdr, Cssr, Csbr; +double Cdgi, Cddi, Cdsi, Cdbi, Csgi, Csdi, Cssi, Csbi; +double gmr, gmi, gmbsr, gmbsi, gdsr, gdsi; +double FwdSumr, RevSumr, Gmr, Gmbsr; +double FwdSumi, RevSumi, Gmi, Gmbsi; +struct bsim4v5SizeDependParam *pParam; +double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls; + +double m; + + omega = ckt->CKTomega; + for (; model != NULL; model = model->BSIM4v5nextModel) + { for (here = model->BSIM4v5instances; here!= NULL; + here = here->BSIM4v5nextInstance) + { if (here->BSIM4v5owner != ARCHme) continue; + pParam = here->pParam; + capbd = here->BSIM4v5capbd; + capbs = here->BSIM4v5capbs; + cgso = here->BSIM4v5cgso; + cgdo = here->BSIM4v5cgdo; + cgbo = pParam->BSIM4v5cgbo; + + Csd = -(here->BSIM4v5cddb + here->BSIM4v5cgdb + here->BSIM4v5cbdb); + Csg = -(here->BSIM4v5cdgb + here->BSIM4v5cggb + here->BSIM4v5cbgb); + Css = -(here->BSIM4v5cdsb + here->BSIM4v5cgsb + here->BSIM4v5cbsb); + + if (here->BSIM4v5acnqsMod) + { T0 = omega * here->BSIM4v5taunet; + T1 = T0 * T0; + T2 = 1.0 / (1.0 + T1); + T3 = T0 * T2; + + gmr = here->BSIM4v5gm * T2; + gmbsr = here->BSIM4v5gmbs * T2; + gdsr = here->BSIM4v5gds * T2; + + gmi = -here->BSIM4v5gm * T3; + gmbsi = -here->BSIM4v5gmbs * T3; + gdsi = -here->BSIM4v5gds * T3; + + Cddr = here->BSIM4v5cddb * T2; + Cdgr = here->BSIM4v5cdgb * T2; + Cdsr = here->BSIM4v5cdsb * T2; + Cdbr = -(Cddr + Cdgr + Cdsr); + + /* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */ + Cddi = here->BSIM4v5cddb * T3 * omega; + Cdgi = here->BSIM4v5cdgb * T3 * omega; + Cdsi = here->BSIM4v5cdsb * T3 * omega; + Cdbi = -(Cddi + Cdgi + Cdsi); + + Csdr = Csd * T2; + Csgr = Csg * T2; + Cssr = Css * T2; + Csbr = -(Csdr + Csgr + Cssr); + + Csdi = Csd * T3 * omega; + Csgi = Csg * T3 * omega; + Cssi = Css * T3 * omega; + Csbi = -(Csdi + Csgi + Cssi); + + Cgdr = -(Cddr + Csdr + here->BSIM4v5cbdb); + Cggr = -(Cdgr + Csgr + here->BSIM4v5cbgb); + Cgsr = -(Cdsr + Cssr + here->BSIM4v5cbsb); + Cgbr = -(Cgdr + Cggr + Cgsr); + + Cgdi = -(Cddi + Csdi); + Cggi = -(Cdgi + Csgi); + Cgsi = -(Cdsi + Cssi); + Cgbi = -(Cgdi + Cggi + Cgsi); + } + else /* QS */ + { gmr = here->BSIM4v5gm; + gmbsr = here->BSIM4v5gmbs; + gdsr = here->BSIM4v5gds; + gmi = gmbsi = gdsi = 0.0; + + Cddr = here->BSIM4v5cddb; + Cdgr = here->BSIM4v5cdgb; + Cdsr = here->BSIM4v5cdsb; + Cdbr = -(Cddr + Cdgr + Cdsr); + Cddi = Cdgi = Cdsi = Cdbi = 0.0; + + Csdr = Csd; + Csgr = Csg; + Cssr = Css; + Csbr = -(Csdr + Csgr + Cssr); + Csdi = Csgi = Cssi = Csbi = 0.0; + + Cgdr = here->BSIM4v5cgdb; + Cggr = here->BSIM4v5cggb; + Cgsr = here->BSIM4v5cgsb; + Cgbr = -(Cgdr + Cggr + Cgsr); + Cgdi = Cggi = Cgsi = Cgbi = 0.0; + } + + + if (here->BSIM4v5mode >= 0) + { Gmr = gmr; + Gmbsr = gmbsr; + FwdSumr = Gmr + Gmbsr; + RevSumr = 0.0; + Gmi = gmi; + Gmbsi = gmbsi; + FwdSumi = Gmi + Gmbsi; + RevSumi = 0.0; + + gbbdp = -(here->BSIM4v5gbds); + gbbsp = here->BSIM4v5gbds + here->BSIM4v5gbgs + here->BSIM4v5gbbs; + gbdpg = here->BSIM4v5gbgs; + gbdpdp = here->BSIM4v5gbds; + gbdpb = here->BSIM4v5gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v5igcMod) + { gIstotg = here->BSIM4v5gIgsg + here->BSIM4v5gIgcsg; + gIstotd = here->BSIM4v5gIgcsd; + gIstots = here->BSIM4v5gIgss + here->BSIM4v5gIgcss; + gIstotb = here->BSIM4v5gIgcsb; + + gIdtotg = here->BSIM4v5gIgdg + here->BSIM4v5gIgcdg; + gIdtotd = here->BSIM4v5gIgdd + here->BSIM4v5gIgcdd; + gIdtots = here->BSIM4v5gIgcds; + gIdtotb = here->BSIM4v5gIgcdb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v5igbMod) + { gIbtotg = here->BSIM4v5gIgbg; + gIbtotd = here->BSIM4v5gIgbd; + gIbtots = here->BSIM4v5gIgbs; + gIbtotb = here->BSIM4v5gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v5rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vges) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + else if (here->BSIM4v5rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vgms) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + if (here->BSIM4v5rgateMod > 1) + { gcrgd = here->BSIM4v5gcrgd * T0; + gcrgg = here->BSIM4v5gcrgg * T0; + gcrgs = here->BSIM4v5gcrgs * T0; + gcrgb = here->BSIM4v5gcrgb * T0; + gcrgg -= here->BSIM4v5gcrg; + gcrg = here->BSIM4v5gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v5rgateMod == 3) + { xcgmgmb = (cgdo + cgso + pParam->BSIM4v5cgbo) * omega; + xcgmdb = -cgdo * omega; + xcgmsb = -cgso * omega; + xcgmbb = -pParam->BSIM4v5cgbo * omega; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggbr = Cggr * omega; + xcgdbr = Cgdr * omega; + xcgsbr = Cgsr * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = Cdgr * omega; + xcsgbr = Csgr * omega; + xcbgb = here->BSIM4v5cbgb * omega; + } + else + { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v5cgbo ) * omega; + xcgdbr = (Cgdr - cgdo) * omega; + xcgsbr = (Cgsr - cgso) * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = (Cdgr - cgdo) * omega; + xcsgbr = (Csgr - cgso) * omega; + xcbgb = (here->BSIM4v5cbgb - pParam->BSIM4v5cgbo) * omega; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddbr = (Cddr + here->BSIM4v5capbd + cgdo) * omega; + xcdsbr = Cdsr * omega; + xcsdbr = Csdr * omega; + xcssbr = (here->BSIM4v5capbs + cgso + Cssr) * omega; + + if (!here->BSIM4v5rbodyMod) + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb); + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb); + + xcbdb = (here->BSIM4v5cbdb - here->BSIM4v5capbd) * omega; + xcbsb = (here->BSIM4v5cbsb - here->BSIM4v5capbs) * omega; + xcdbdb = 0.0; + } + else + { xcdbbr = Cdbr * omega; + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb) + + here->BSIM4v5capbs * omega; + + xcbdb = here->BSIM4v5cbdb * omega; + xcbsb = here->BSIM4v5cbsb * omega; + + xcdbdb = -here->BSIM4v5capbd * omega; + xcsbsb = -here->BSIM4v5capbs * omega; + } + xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb); + + xcdgbi = Cdgi; + xcsgbi = Csgi; + xcddbi = Cddi; + xcdsbi = Cdsi; + xcsdbi = Csdi; + xcssbi = Cssi; + xcdbbi = Cdbi; + xcsbbi = Csbi; + xcggbi = Cggi; + xcgdbi = Cgdi; + xcgsbi = Cgsi; + xcgbbi = Cgbi; + } + else /* Reverse mode */ + { Gmr = -gmr; + Gmbsr = -gmbsr; + FwdSumr = 0.0; + RevSumr = -(Gmr + Gmbsr); + Gmi = -gmi; + Gmbsi = -gmbsi; + FwdSumi = 0.0; + RevSumi = -(Gmi + Gmbsi); + + gbbsp = -(here->BSIM4v5gbds); + gbbdp = here->BSIM4v5gbds + here->BSIM4v5gbgs + here->BSIM4v5gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v5gbgs; + gbspsp = here->BSIM4v5gbds; + gbspb = here->BSIM4v5gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v5igcMod) + { gIstotg = here->BSIM4v5gIgsg + here->BSIM4v5gIgcdg; + gIstotd = here->BSIM4v5gIgcds; + gIstots = here->BSIM4v5gIgss + here->BSIM4v5gIgcdd; + gIstotb = here->BSIM4v5gIgcdb; + + gIdtotg = here->BSIM4v5gIgdg + here->BSIM4v5gIgcsg; + gIdtotd = here->BSIM4v5gIgdd + here->BSIM4v5gIgcss; + gIdtots = here->BSIM4v5gIgcsd; + gIdtotb = here->BSIM4v5gIgcsb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v5igbMod) + { gIbtotg = here->BSIM4v5gIgbg; + gIbtotd = here->BSIM4v5gIgbs; + gIbtots = here->BSIM4v5gIgbd; + gIbtotb = here->BSIM4v5gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v5rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vges) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + else if (here->BSIM4v5rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vgms) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + if (here->BSIM4v5rgateMod > 1) + { gcrgd = here->BSIM4v5gcrgs * T0; + gcrgg = here->BSIM4v5gcrgg * T0; + gcrgs = here->BSIM4v5gcrgd * T0; + gcrgb = here->BSIM4v5gcrgb * T0; + gcrgg -= here->BSIM4v5gcrg; + gcrg = here->BSIM4v5gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v5rgateMod == 3) + { xcgmgmb = (cgdo + cgso + pParam->BSIM4v5cgbo) * omega; + xcgmdb = -cgdo * omega; + xcgmsb = -cgso * omega; + xcgmbb = -pParam->BSIM4v5cgbo * omega; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggbr = Cggr * omega; + xcgdbr = Cgsr * omega; + xcgsbr = Cgdr * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = Csgr * omega; + xcsgbr = Cdgr * omega; + xcbgb = here->BSIM4v5cbgb * omega; + } + else + { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v5cgbo ) * omega; + xcgdbr = (Cgsr - cgdo) * omega; + xcgsbr = (Cgdr - cgso) * omega; + xcgbbr = -(xcggbr + xcgdbr + xcgsbr); + + xcdgbr = (Csgr - cgdo) * omega; + xcsgbr = (Cdgr - cgso) * omega; + xcbgb = (here->BSIM4v5cbgb - pParam->BSIM4v5cgbo) * omega; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddbr = (here->BSIM4v5capbd + cgdo + Cssr) * omega; + xcdsbr = Csdr * omega; + xcsdbr = Cdsr * omega; + xcssbr = (Cddr + here->BSIM4v5capbs + cgso) * omega; + + if (!here->BSIM4v5rbodyMod) + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb); + xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb); + + xcbdb = (here->BSIM4v5cbsb - here->BSIM4v5capbd) * omega; + xcbsb = (here->BSIM4v5cbdb - here->BSIM4v5capbs) * omega; + xcdbdb = 0.0; + } + else + { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb) + + here->BSIM4v5capbd * omega; + xcsbbr = Cdbr * omega; + + xcbdb = here->BSIM4v5cbsb * omega; + xcbsb = here->BSIM4v5cbdb * omega; + xcdbdb = -here->BSIM4v5capbd * omega; + xcsbsb = -here->BSIM4v5capbs * omega; + } + xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb); + + xcdgbi = Csgi; + xcsgbi = Cdgi; + xcddbi = Cssi; + xcdsbi = Csdi; + xcsdbi = Cdsi; + xcssbi = Cddi; + xcdbbi = Csbi; + xcsbbi = Cdbi; + xcggbi = Cggi; + xcgdbi = Cgsi; + xcgsbi = Cgdi; + xcgbbi = Cgbi; + } + + if (model->BSIM4v5rdsMod == 1) + { gstot = here->BSIM4v5gstot; + gstotd = here->BSIM4v5gstotd; + gstotg = here->BSIM4v5gstotg; + gstots = here->BSIM4v5gstots - gstot; + gstotb = here->BSIM4v5gstotb; + + gdtot = here->BSIM4v5gdtot; + gdtotd = here->BSIM4v5gdtotd - gdtot; + gdtotg = here->BSIM4v5gdtotg; + gdtots = here->BSIM4v5gdtots; + gdtotb = here->BSIM4v5gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0; + } + + + /* + * Loading AC matrix + */ + + m = here->BSIM4v5m; + + if (!model->BSIM4v5rdsMod) + { gdpr = here->BSIM4v5drainConductance; + gspr = here->BSIM4v5sourceConductance; + } + else + gdpr = gspr = 0.0; + + if (!here->BSIM4v5rbodyMod) + { gjbd = here->BSIM4v5gbd; + gjbs = here->BSIM4v5gbs; + } + else + gjbd = gjbs = 0.0; + + geltd = here->BSIM4v5grgeltd; + + if (here->BSIM4v5rgateMod == 1) + { *(here->BSIM4v5GEgePtr) += m * geltd; + *(here->BSIM4v5GPgePtr) -= m * geltd; + *(here->BSIM4v5GEgpPtr) -= m * geltd; + + *(here->BSIM4v5GPgpPtr +1) += m * xcggbr; + *(here->BSIM4v5GPgpPtr) += m * (geltd + xcggbi + gIgtotg); + *(here->BSIM4v5GPdpPtr +1) += m * xcgdbr; + *(here->BSIM4v5GPdpPtr) += m * (xcgdbi + gIgtotd); + *(here->BSIM4v5GPspPtr +1) += m * xcgsbr; + *(here->BSIM4v5GPspPtr) += m * (xcgsbi + gIgtots); + *(here->BSIM4v5GPbpPtr +1) += m * xcgbbr; + *(here->BSIM4v5GPbpPtr) += m * (xcgbbi + gIgtotb); + } /* WDLiu: gcrg already subtracted from all gcrgg below */ + else if (here->BSIM4v5rgateMod == 2) + { *(here->BSIM4v5GEgePtr) += m * gcrg; + *(here->BSIM4v5GEgpPtr) += m * gcrgg; + *(here->BSIM4v5GEdpPtr) += m * gcrgd; + *(here->BSIM4v5GEspPtr) += m * gcrgs; + *(here->BSIM4v5GEbpPtr) += m * gcrgb; + + *(here->BSIM4v5GPgePtr) -= m * gcrg; + *(here->BSIM4v5GPgpPtr +1) += m * xcggbr; + *(here->BSIM4v5GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg); + *(here->BSIM4v5GPdpPtr +1) += m * xcgdbr; + *(here->BSIM4v5GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd); + *(here->BSIM4v5GPspPtr +1) += m * xcgsbr; + *(here->BSIM4v5GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots); + *(here->BSIM4v5GPbpPtr +1) += m * xcgbbr; + *(here->BSIM4v5GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb); + } + else if (here->BSIM4v5rgateMod == 3) + { *(here->BSIM4v5GEgePtr) += m * geltd; + *(here->BSIM4v5GEgmPtr) -= m * geltd; + *(here->BSIM4v5GMgePtr) -= m * geltd; + *(here->BSIM4v5GMgmPtr) += m * (geltd + gcrg); + *(here->BSIM4v5GMgmPtr +1) += m * xcgmgmb; + + *(here->BSIM4v5GMdpPtr) += m * gcrgd; + *(here->BSIM4v5GMdpPtr +1) += m * xcgmdb; + *(here->BSIM4v5GMgpPtr) += m * gcrgg; + *(here->BSIM4v5GMspPtr) += m * gcrgs; + *(here->BSIM4v5GMspPtr +1) += m * xcgmsb; + *(here->BSIM4v5GMbpPtr) += m * gcrgb; + *(here->BSIM4v5GMbpPtr +1) += m * xcgmbb; + + *(here->BSIM4v5DPgmPtr +1) += m * xcdgmb; + *(here->BSIM4v5GPgmPtr) -= m * gcrg; + *(here->BSIM4v5SPgmPtr +1) += m * xcsgmb; + *(here->BSIM4v5BPgmPtr +1) += m * xcbgmb; + + *(here->BSIM4v5GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg); + *(here->BSIM4v5GPgpPtr +1) += m * xcggbr; + *(here->BSIM4v5GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd); + *(here->BSIM4v5GPdpPtr +1) += m * xcgdbr; + *(here->BSIM4v5GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots); + *(here->BSIM4v5GPspPtr +1) += m * xcgsbr; + *(here->BSIM4v5GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb); + *(here->BSIM4v5GPbpPtr +1) += m * xcgbbr; + } + else + { *(here->BSIM4v5GPgpPtr +1) += m * xcggbr; + *(here->BSIM4v5GPgpPtr) += m * (xcggbi + gIgtotg); + *(here->BSIM4v5GPdpPtr +1) += m * xcgdbr; + *(here->BSIM4v5GPdpPtr) += m * (xcgdbi + gIgtotd); + *(here->BSIM4v5GPspPtr +1) += m * xcgsbr; + *(here->BSIM4v5GPspPtr) += m * (xcgsbi + gIgtots); + *(here->BSIM4v5GPbpPtr +1) += m * xcgbbr; + *(here->BSIM4v5GPbpPtr) += m * (xcgbbi + gIgtotb); + } + + if (model->BSIM4v5rdsMod) + { (*(here->BSIM4v5DgpPtr) += m * gdtotg); + (*(here->BSIM4v5DspPtr) += m * gdtots); + (*(here->BSIM4v5DbpPtr) += m * gdtotb); + (*(here->BSIM4v5SdpPtr) += m * gstotd); + (*(here->BSIM4v5SgpPtr) += m * gstotg); + (*(here->BSIM4v5SbpPtr) += m * gstotb); + } + + *(here->BSIM4v5DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi); + *(here->BSIM4v5DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4v5gbd + - gdtotd + RevSumr + gbdpdp - gIdtotd); + *(here->BSIM4v5DPdPtr) -= m * (gdpr + gdtot); + *(here->BSIM4v5DPgpPtr +1) += m * (xcdgbr + Gmi); + *(here->BSIM4v5DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg); + *(here->BSIM4v5DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi); + *(here->BSIM4v5DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots); + *(here->BSIM4v5DPbpPtr +1) += m * (xcdbbr + Gmbsi); + *(here->BSIM4v5DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb); + + *(here->BSIM4v5DdpPtr) -= m * (gdpr - gdtotd); + *(here->BSIM4v5DdPtr) += m * (gdpr + gdtot); + + *(here->BSIM4v5SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi); + *(here->BSIM4v5SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd); + *(here->BSIM4v5SPgpPtr +1) += m * (xcsgbr - Gmi); + *(here->BSIM4v5SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg); + *(here->BSIM4v5SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi); + *(here->BSIM4v5SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4v5gbs + - gstots + FwdSumr + gbspsp - gIstots); + *(here->BSIM4v5SPsPtr) -= m * (gspr + gstot); + *(here->BSIM4v5SPbpPtr +1) += m * (xcsbbr - Gmbsi); + *(here->BSIM4v5SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb); + + *(here->BSIM4v5SspPtr) -= m * (gspr - gstots); + *(here->BSIM4v5SsPtr) += m * (gspr + gstot); + + *(here->BSIM4v5BPdpPtr +1) += m * xcbdb; + *(here->BSIM4v5BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd); + *(here->BSIM4v5BPgpPtr +1) += m * xcbgb; + *(here->BSIM4v5BPgpPtr) -= m * (here->BSIM4v5gbgs + gIbtotg); + *(here->BSIM4v5BPspPtr +1) += m * xcbsb; + *(here->BSIM4v5BPspPtr) -= m * (gjbs - gbbsp + gIbtots); + *(here->BSIM4v5BPbpPtr +1) += m * xcbbb; + *(here->BSIM4v5BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v5gbbs + - gIbtotb); + ggidld = here->BSIM4v5ggidld; + ggidlg = here->BSIM4v5ggidlg; + ggidlb = here->BSIM4v5ggidlb; + ggislg = here->BSIM4v5ggislg; + ggisls = here->BSIM4v5ggisls; + ggislb = here->BSIM4v5ggislb; + + /* stamp gidl */ + (*(here->BSIM4v5DPdpPtr) += m * ggidld); + (*(here->BSIM4v5DPgpPtr) += m * ggidlg); + (*(here->BSIM4v5DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb)); + (*(here->BSIM4v5DPbpPtr) += m * ggidlb); + (*(here->BSIM4v5BPdpPtr) -= m * ggidld); + (*(here->BSIM4v5BPgpPtr) -= m * ggidlg); + (*(here->BSIM4v5BPspPtr) += m * ((ggidlg + ggidld) + ggidlb)); + (*(here->BSIM4v5BPbpPtr) -= m * ggidlb); + /* stamp gisl */ + (*(here->BSIM4v5SPdpPtr) -= m * ((ggisls + ggislg) + ggislb)); + (*(here->BSIM4v5SPgpPtr) += m * ggislg); + (*(here->BSIM4v5SPspPtr) += m * ggisls); + (*(here->BSIM4v5SPbpPtr) += m * ggislb); + (*(here->BSIM4v5BPdpPtr) += m * ((ggislg + ggisls) + ggislb)); + (*(here->BSIM4v5BPgpPtr) -= m * ggislg); + (*(here->BSIM4v5BPspPtr) -= m * ggisls); + (*(here->BSIM4v5BPbpPtr) -= m * ggislb); + + if (here->BSIM4v5rbodyMod) + { (*(here->BSIM4v5DPdbPtr +1) += m * xcdbdb); + (*(here->BSIM4v5DPdbPtr) -= m * here->BSIM4v5gbd); + (*(here->BSIM4v5SPsbPtr +1) += m * xcsbsb); + (*(here->BSIM4v5SPsbPtr) -= m * here->BSIM4v5gbs); + + (*(here->BSIM4v5DBdpPtr +1) += m * xcdbdb); + (*(here->BSIM4v5DBdpPtr) -= m * here->BSIM4v5gbd); + (*(here->BSIM4v5DBdbPtr +1) -= m * xcdbdb); + (*(here->BSIM4v5DBdbPtr) += m * (here->BSIM4v5gbd + here->BSIM4v5grbpd + + here->BSIM4v5grbdb)); + (*(here->BSIM4v5DBbpPtr) -= m * here->BSIM4v5grbpd); + (*(here->BSIM4v5DBbPtr) -= m * here->BSIM4v5grbdb); + + (*(here->BSIM4v5BPdbPtr) -= m * here->BSIM4v5grbpd); + (*(here->BSIM4v5BPbPtr) -= m * here->BSIM4v5grbpb); + (*(here->BSIM4v5BPsbPtr) -= m * here->BSIM4v5grbps); + (*(here->BSIM4v5BPbpPtr) += m * (here->BSIM4v5grbpd + here->BSIM4v5grbps + + here->BSIM4v5grbpb)); + /* WDLiu: (-here->BSIM4v5gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v5SBspPtr +1) += m * xcsbsb); + (*(here->BSIM4v5SBspPtr) -= m * here->BSIM4v5gbs); + (*(here->BSIM4v5SBbpPtr) -= m * here->BSIM4v5grbps); + (*(here->BSIM4v5SBbPtr) -= m * here->BSIM4v5grbsb); + (*(here->BSIM4v5SBsbPtr +1) -= m * xcsbsb); + (*(here->BSIM4v5SBsbPtr) += m * (here->BSIM4v5gbs + + here->BSIM4v5grbps + here->BSIM4v5grbsb)); + + (*(here->BSIM4v5BdbPtr) -= m * here->BSIM4v5grbdb); + (*(here->BSIM4v5BbpPtr) -= m * here->BSIM4v5grbpb); + (*(here->BSIM4v5BsbPtr) -= m * here->BSIM4v5grbsb); + (*(here->BSIM4v5BbPtr) += m * (here->BSIM4v5grbsb + here->BSIM4v5grbdb + + here->BSIM4v5grbpb)); + } + + + /* + * WDLiu: The internal charge node generated for transient NQS is not needed for + * AC NQS. The following is not doing a real job, but we have to keep it; + * otherwise a singular AC NQS matrix may occur if the transient NQS is on. + * The charge node is isolated from the instance. + */ + if (here->BSIM4v5trnqsMod) + { (*(here->BSIM4v5QqPtr) += m * 1.0); + (*(here->BSIM4v5QgpPtr) += 0.0); + (*(here->BSIM4v5QdpPtr) += 0.0); + (*(here->BSIM4v5QspPtr) += 0.0); + (*(here->BSIM4v5QbpPtr) += 0.0); + + (*(here->BSIM4v5DPqPtr) += 0.0); + (*(here->BSIM4v5SPqPtr) += 0.0); + (*(here->BSIM4v5GPqPtr) += 0.0); + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5ask.c b/src/spicelib/devices/bsim4v5/b4v5ask.c new file mode 100644 index 000000000..3f942e480 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5ask.c @@ -0,0 +1,355 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/27/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4ask.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM4v5ask(ckt,inst,which,value,select) +CKTcircuit *ckt; +GENinstance *inst; +int which; +IFvalue *value; +IFvalue *select; +{ +BSIM4v5instance *here = (BSIM4v5instance*)inst; + + switch(which) + { case BSIM4v5_L: + value->rValue = here->BSIM4v5l; + return(OK); + case BSIM4v5_W: + value->rValue = here->BSIM4v5w; + return(OK); + case BSIM4v5_M: + value->rValue = here->BSIM4v5m; + return(OK); + case BSIM4v5_NF: + value->rValue = here->BSIM4v5nf; + return(OK); + case BSIM4v5_MIN: + value->iValue = here->BSIM4v5min; + return(OK); + case BSIM4v5_AS: + value->rValue = here->BSIM4v5sourceArea; + return(OK); + case BSIM4v5_AD: + value->rValue = here->BSIM4v5drainArea; + return(OK); + case BSIM4v5_PS: + value->rValue = here->BSIM4v5sourcePerimeter; + return(OK); + case BSIM4v5_PD: + value->rValue = here->BSIM4v5drainPerimeter; + return(OK); + case BSIM4v5_NRS: + value->rValue = here->BSIM4v5sourceSquares; + return(OK); + case BSIM4v5_NRD: + value->rValue = here->BSIM4v5drainSquares; + return(OK); + case BSIM4v5_OFF: + value->rValue = here->BSIM4v5off; + return(OK); + case BSIM4v5_SA: + value->rValue = here->BSIM4v5sa ; + return(OK); + case BSIM4v5_SB: + value->rValue = here->BSIM4v5sb ; + return(OK); + case BSIM4v5_SD: + value->rValue = here->BSIM4v5sd ; + return(OK); + case BSIM4v5_SCA: + value->rValue = here->BSIM4v5sca ; + return(OK); + case BSIM4v5_SCB: + value->rValue = here->BSIM4v5scb ; + return(OK); + case BSIM4v5_SCC: + value->rValue = here->BSIM4v5scc ; + return(OK); + case BSIM4v5_SC: + value->rValue = here->BSIM4v5sc ; + return(OK); + + case BSIM4v5_RBSB: + value->rValue = here->BSIM4v5rbsb; + return(OK); + case BSIM4v5_RBDB: + value->rValue = here->BSIM4v5rbdb; + return(OK); + case BSIM4v5_RBPB: + value->rValue = here->BSIM4v5rbpb; + return(OK); + case BSIM4v5_RBPS: + value->rValue = here->BSIM4v5rbps; + return(OK); + case BSIM4v5_RBPD: + value->rValue = here->BSIM4v5rbpd; + return(OK); + case BSIM4v5_DELVTO: + value->rValue = here->BSIM4v5delvto; + return(OK); + case BSIM4v5_XGW: + value->rValue = here->BSIM4v5xgw; + return(OK); + case BSIM4v5_NGCON: + value->rValue = here->BSIM4v5ngcon; + return(OK); + case BSIM4v5_TRNQSMOD: + value->iValue = here->BSIM4v5trnqsMod; + return(OK); + case BSIM4v5_ACNQSMOD: + value->iValue = here->BSIM4v5acnqsMod; + return(OK); + case BSIM4v5_RBODYMOD: + value->iValue = here->BSIM4v5rbodyMod; + return(OK); + case BSIM4v5_RGATEMOD: + value->iValue = here->BSIM4v5rgateMod; + return(OK); + case BSIM4v5_GEOMOD: + value->iValue = here->BSIM4v5geoMod; + return(OK); + case BSIM4v5_RGEOMOD: + value->iValue = here->BSIM4v5rgeoMod; + return(OK); + case BSIM4v5_IC_VDS: + value->rValue = here->BSIM4v5icVDS; + return(OK); + case BSIM4v5_IC_VGS: + value->rValue = here->BSIM4v5icVGS; + return(OK); + case BSIM4v5_IC_VBS: + value->rValue = here->BSIM4v5icVBS; + return(OK); + case BSIM4v5_DNODE: + value->iValue = here->BSIM4v5dNode; + return(OK); + case BSIM4v5_GNODEEXT: + value->iValue = here->BSIM4v5gNodeExt; + return(OK); + case BSIM4v5_SNODE: + value->iValue = here->BSIM4v5sNode; + return(OK); + case BSIM4v5_BNODE: + value->iValue = here->BSIM4v5bNode; + return(OK); + case BSIM4v5_DNODEPRIME: + value->iValue = here->BSIM4v5dNodePrime; + return(OK); + case BSIM4v5_GNODEPRIME: + value->iValue = here->BSIM4v5gNodePrime; + return(OK); + case BSIM4v5_GNODEMID: + value->iValue = here->BSIM4v5gNodeMid; + return(OK); + case BSIM4v5_SNODEPRIME: + value->iValue = here->BSIM4v5sNodePrime; + return(OK); + case BSIM4v5_DBNODE: + value->iValue = here->BSIM4v5dbNode; + return(OK); + case BSIM4v5_BNODEPRIME: + value->iValue = here->BSIM4v5bNodePrime; + return(OK); + case BSIM4v5_SBNODE: + value->iValue = here->BSIM4v5sbNode; + return(OK); + case BSIM4v5_SOURCECONDUCT: + value->rValue = here->BSIM4v5sourceConductance; + return(OK); + case BSIM4v5_DRAINCONDUCT: + value->rValue = here->BSIM4v5drainConductance; + return(OK); + case BSIM4v5_VBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5vbd); + return(OK); + case BSIM4v5_VBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5vbs); + return(OK); + case BSIM4v5_VGS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5vgs); + return(OK); + case BSIM4v5_VDS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5vds); + return(OK); + case BSIM4v5_CD: + value->rValue = here->BSIM4v5cd; + return(OK); + case BSIM4v5_CBS: + value->rValue = here->BSIM4v5cbs; + return(OK); + case BSIM4v5_CBD: + value->rValue = here->BSIM4v5cbd; + return(OK); + case BSIM4v5_CSUB: + value->rValue = here->BSIM4v5csub; + return(OK); + case BSIM4v5_IGIDL: + value->rValue = here->BSIM4v5Igidl; + return(OK); + case BSIM4v5_IGISL: + value->rValue = here->BSIM4v5Igisl; + return(OK); + case BSIM4v5_IGS: + value->rValue = here->BSIM4v5Igs; + return(OK); + case BSIM4v5_IGD: + value->rValue = here->BSIM4v5Igd; + return(OK); + case BSIM4v5_IGB: + value->rValue = here->BSIM4v5Igb; + return(OK); + case BSIM4v5_IGCS: + value->rValue = here->BSIM4v5Igcs; + return(OK); + case BSIM4v5_IGCD: + value->rValue = here->BSIM4v5Igcd; + return(OK); + case BSIM4v5_GM: + value->rValue = here->BSIM4v5gm; + return(OK); + case BSIM4v5_GDS: + value->rValue = here->BSIM4v5gds; + return(OK); + case BSIM4v5_GMBS: + value->rValue = here->BSIM4v5gmbs; + return(OK); + case BSIM4v5_GBD: + value->rValue = here->BSIM4v5gbd; + return(OK); + case BSIM4v5_GBS: + value->rValue = here->BSIM4v5gbs; + return(OK); +/* case BSIM4v5_QB: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qb); + return(OK); */ + case BSIM4v5_CQB: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5cqb); + return(OK); +/* case BSIM4v5_QG: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qg); + return(OK); */ + case BSIM4v5_CQG: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5cqg); + return(OK); +/* case BSIM4v5_QD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qd); + return(OK); */ + case BSIM4v5_CQD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5cqd); + return(OK); +/* case BSIM4v5_QS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qs); + return(OK); */ + case BSIM4v5_QB: + value->rValue = here->BSIM4v5qbulk; + return(OK); + case BSIM4v5_QG: + value->rValue = here->BSIM4v5qgate; + return(OK); + case BSIM4v5_QS: + value->rValue = here->BSIM4v5qsrc; + return(OK); + case BSIM4v5_QD: + value->rValue = here->BSIM4v5qdrn; + return(OK); + case BSIM4v5_QDEF: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qdef); + return(OK); + case BSIM4v5_GCRG: + value->rValue = here->BSIM4v5gcrg; + return(OK); + case BSIM4v5_GTAU: + value->rValue = here->BSIM4v5gtau; + return(OK); + case BSIM4v5_CGGB: + value->rValue = here->BSIM4v5cggb; + return(OK); + case BSIM4v5_CGDB: + value->rValue = here->BSIM4v5cgdb; + return(OK); + case BSIM4v5_CGSB: + value->rValue = here->BSIM4v5cgsb; + return(OK); + case BSIM4v5_CDGB: + value->rValue = here->BSIM4v5cdgb; + return(OK); + case BSIM4v5_CDDB: + value->rValue = here->BSIM4v5cddb; + return(OK); + case BSIM4v5_CDSB: + value->rValue = here->BSIM4v5cdsb; + return(OK); + case BSIM4v5_CBGB: + value->rValue = here->BSIM4v5cbgb; + return(OK); + case BSIM4v5_CBDB: + value->rValue = here->BSIM4v5cbdb; + return(OK); + case BSIM4v5_CBSB: + value->rValue = here->BSIM4v5cbsb; + return(OK); + case BSIM4v5_CSGB: + value->rValue = here->BSIM4v5csgb; + return(OK); + case BSIM4v5_CSDB: + value->rValue = here->BSIM4v5csdb; + return(OK); + case BSIM4v5_CSSB: + value->rValue = here->BSIM4v5cssb; + return(OK); + case BSIM4v5_CGBB: + value->rValue = here->BSIM4v5cgbb; + return(OK); + case BSIM4v5_CDBB: + value->rValue = here->BSIM4v5cdbb; + return(OK); + case BSIM4v5_CSBB: + value->rValue = here->BSIM4v5csbb; + return(OK); + case BSIM4v5_CBBB: + value->rValue = here->BSIM4v5cbbb; + return(OK); + case BSIM4v5_CAPBD: + value->rValue = here->BSIM4v5capbd; + return(OK); + case BSIM4v5_CAPBS: + value->rValue = here->BSIM4v5capbs; + return(OK); + case BSIM4v5_VON: + value->rValue = here->BSIM4v5von; + return(OK); + case BSIM4v5_VDSAT: + value->rValue = here->BSIM4v5vdsat; + return(OK); + case BSIM4v5_QBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qbs); + return(OK); + case BSIM4v5_QBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM4v5qbd); + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + diff --git a/src/spicelib/devices/bsim4v5/b4v5check.c b/src/spicelib/devices/bsim4v5/b4v5check.c new file mode 100644 index 000000000..46554d656 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5check.c @@ -0,0 +1,816 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4check.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 03/04/2004. + * Modified by Xuemei Xi, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" +#include "suffix.h" + +int +BSIM4v5checkModel(model, here, ckt) +BSIM4v5model *model; +BSIM4v5instance *here; +CKTcircuit *ckt; +{ +struct bsim4v5SizeDependParam *pParam; +int Fatal_Flag = 0; +FILE *fplog; + + if ((fplog = fopen("bsim4v5.out", "w")) != NULL) + { pParam = here->pParam; + fprintf(fplog, "BSIM4v5: Berkeley Short Channel IGFET Model-4\n"); + fprintf(fplog, "Developed by Xuemei (Jane) Xi, Mohan Dunga, Prof. Ali Niknejad and Prof. Chenming Hu in 2003.\n"); + fprintf(fplog, "\n"); + fprintf(fplog, "++++++++++ BSIM4v5 PARAMETER CHECKING BELOW ++++++++++\n"); + + if (!strstr(model->BSIM4v5version, "4.5")) + { fprintf(fplog, "Warning: This model is BSIM4.5.0; you specified a wrong version number '%s'.\n", model->BSIM4v5version); + printf("Warning: This model is BSIM4.5.0; you specified a wrong version number '%s'.\n", model->BSIM4v5version); + } + fprintf(fplog, "Model = %s\n", model->BSIM4v5modName); + + + if ((here->BSIM4v5rgateMod == 2) || (here->BSIM4v5rgateMod == 3)) + { if ((here->BSIM4v5trnqsMod == 1) || (here->BSIM4v5acnqsMod == 1)) + { fprintf(fplog, "Warning: You've selected both Rg and charge deficit NQS; select one only.\n"); + printf("Warning: You've selected both Rg and charge deficit NQS; select one only.\n"); + } + } + + if (model->BSIM4v5toxe <= 0.0) + { fprintf(fplog, "Fatal: Toxe = %g is not positive.\n", + model->BSIM4v5toxe); + printf("Fatal: Toxe = %g is not positive.\n", model->BSIM4v5toxe); + Fatal_Flag = 1; + } + if (model->BSIM4v5toxp <= 0.0) + { fprintf(fplog, "Fatal: Toxp = %g is not positive.\n", + model->BSIM4v5toxp); + printf("Fatal: Toxp = %g is not positive.\n", model->BSIM4v5toxp); + Fatal_Flag = 1; + } + + if (model->BSIM4v5toxm <= 0.0) + { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", + model->BSIM4v5toxm); + printf("Fatal: Toxm = %g is not positive.\n", model->BSIM4v5toxm); + Fatal_Flag = 1; + } + + if (model->BSIM4v5toxref <= 0.0) + { fprintf(fplog, "Fatal: Toxref = %g is not positive.\n", + model->BSIM4v5toxref); + printf("Fatal: Toxref = %g is not positive.\n", model->BSIM4v5toxref); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5lpe0 < -pParam->BSIM4v5leff) + { fprintf(fplog, "Fatal: Lpe0 = %g is less than -Leff.\n", + pParam->BSIM4v5lpe0); + printf("Fatal: Lpe0 = %g is less than -Leff.\n", + pParam->BSIM4v5lpe0); + Fatal_Flag = 1; + } + if (model->BSIM4v5lintnoi > pParam->BSIM4v5leff/2) + { fprintf(fplog, "Fatal: Lintnoi = %g is too large - Leff for noise is negative.\n", + model->BSIM4v5lintnoi); + printf("Fatal: Lintnoi = %g is too large - Leff for noise is negative.\n", + model->BSIM4v5lintnoi); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5lpeb < -pParam->BSIM4v5leff) + { fprintf(fplog, "Fatal: Lpeb = %g is less than -Leff.\n", + pParam->BSIM4v5lpeb); + printf("Fatal: Lpeb = %g is less than -Leff.\n", + pParam->BSIM4v5lpeb); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5ndep <= 0.0) + { fprintf(fplog, "Fatal: Ndep = %g is not positive.\n", + pParam->BSIM4v5ndep); + printf("Fatal: Ndep = %g is not positive.\n", + pParam->BSIM4v5ndep); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5phi <= 0.0) + { fprintf(fplog, "Fatal: Phi = %g is not positive. Please check Phin and Ndep\n", + pParam->BSIM4v5phi); + fprintf(fplog, " Phin = %g Ndep = %g \n", + pParam->BSIM4v5phin, pParam->BSIM4v5ndep); + printf("Fatal: Phi = %g is not positive. Please check Phin and Ndep\n", + pParam->BSIM4v5phi); + printf(" Phin = %g Ndep = %g \n", + pParam->BSIM4v5phin, pParam->BSIM4v5ndep); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5nsub <= 0.0) + { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", + pParam->BSIM4v5nsub); + printf("Fatal: Nsub = %g is not positive.\n", + pParam->BSIM4v5nsub); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5ngate < 0.0) + { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", + pParam->BSIM4v5ngate); + printf("Fatal: Ngate = %g Ngate is not positive.\n", + pParam->BSIM4v5ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5ngate > 1.e25) + { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", + pParam->BSIM4v5ngate); + printf("Fatal: Ngate = %g Ngate is too high\n", + pParam->BSIM4v5ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5xj <= 0.0) + { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", + pParam->BSIM4v5xj); + printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM4v5xj); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5dvt1 < 0.0) + { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", + pParam->BSIM4v5dvt1); + printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM4v5dvt1); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5dvt1w < 0.0) + { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", + pParam->BSIM4v5dvt1w); + printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM4v5dvt1w); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5w0 == -pParam->BSIM4v5weff) + { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5dsub < 0.0) + { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM4v5dsub); + printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM4v5dsub); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5b1 == -pParam->BSIM4v5weff) + { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + if (here->BSIM4v5u0temp <= 0.0) + { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", here->BSIM4v5u0temp); + printf("Fatal: u0 at current temperature = %g is not positive.\n", + here->BSIM4v5u0temp); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5delta < 0.0) + { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", + pParam->BSIM4v5delta); + printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM4v5delta); + Fatal_Flag = 1; + } + + if (here->BSIM4v5vsattemp <= 0.0) + { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", here->BSIM4v5vsattemp); + printf("Fatal: Vsat at current temperature = %g is not positive.\n", + here->BSIM4v5vsattemp); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5pclm <= 0.0) + { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM4v5pclm); + printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM4v5pclm); + Fatal_Flag = 1; + } + + if (pParam->BSIM4v5drout < 0.0) + { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM4v5drout); + printf("Fatal: Drout = %g is negative.\n", pParam->BSIM4v5drout); + Fatal_Flag = 1; + } + + if (here->BSIM4v5m <= 0.0) + { fprintf(fplog, "Fatal: multiplier = %g is not positive.\n", here->BSIM4v5m); + printf("Fatal: multiplier = %g is not positive.\n", here->BSIM4v5m); + Fatal_Flag = 1; + } + if (here->BSIM4v5nf < 1.0) + { fprintf(fplog, "Fatal: Number of finger = %g is smaller than one.\n", here->BSIM4v5nf); + printf("Fatal: Number of finger = %g is smaller than one.\n", here->BSIM4v5nf); + Fatal_Flag = 1; + } + + if((here->BSIM4v5sa > 0.0) && (here->BSIM4v5sb > 0.0) && + ((here->BSIM4v5nf == 1.0) || ((here->BSIM4v5nf > 1.0) && (here->BSIM4v5sd > 0.0))) ) + { if (model->BSIM4v5saref <= 0.0) + { fprintf(fplog, "Fatal: SAref = %g is not positive.\n",model->BSIM4v5saref); + printf("Fatal: SAref = %g is not positive.\n",model->BSIM4v5saref); + Fatal_Flag = 1; + } + if (model->BSIM4v5sbref <= 0.0) + { fprintf(fplog, "Fatal: SBref = %g is not positive.\n",model->BSIM4v5sbref); + printf("Fatal: SBref = %g is not positive.\n",model->BSIM4v5sbref); + Fatal_Flag = 1; + } + } + + if ((here->BSIM4v5l + model->BSIM4v5xl) <= model->BSIM4v5xgl) + { fprintf(fplog, "Fatal: The parameter xgl must be smaller than Ldrawn+XL.\n"); + printf("Fatal: The parameter xgl must be smaller than Ldrawn+XL.\n"); + Fatal_Flag = 1; + } + if (here->BSIM4v5ngcon < 1.0) + { fprintf(fplog, "Fatal: The parameter ngcon cannot be smaller than one.\n"); + printf("Fatal: The parameter ngcon cannot be smaller than one.\n"); + Fatal_Flag = 1; + } + if ((here->BSIM4v5ngcon != 1.0) && (here->BSIM4v5ngcon != 2.0)) + { here->BSIM4v5ngcon = 1.0; + fprintf(fplog, "Warning: Ngcon must be equal to one or two; reset to 1.0.\n"); + printf("Warning: Ngcon must be equal to one or two; reset to 1.0.\n"); + } + + if (model->BSIM4v5gbmin < 1.0e-20) + { fprintf(fplog, "Warning: Gbmin = %g is too small.\n", + model->BSIM4v5gbmin); + printf("Warning: Gbmin = %g is too small.\n", model->BSIM4v5gbmin); + } + + /* Check saturation parameters */ + if (pParam->BSIM4v5fprout < 0.0) + { fprintf(fplog, "Fatal: fprout = %g is negative.\n", + pParam->BSIM4v5fprout); + printf("Fatal: fprout = %g is negative.\n", pParam->BSIM4v5fprout); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5pdits < 0.0) + { fprintf(fplog, "Fatal: pdits = %g is negative.\n", + pParam->BSIM4v5pdits); + printf("Fatal: pdits = %g is negative.\n", pParam->BSIM4v5pdits); + Fatal_Flag = 1; + } + if (model->BSIM4v5pditsl < 0.0) + { fprintf(fplog, "Fatal: pditsl = %g is negative.\n", + model->BSIM4v5pditsl); + printf("Fatal: pditsl = %g is negative.\n", model->BSIM4v5pditsl); + Fatal_Flag = 1; + } + + /* Check gate current parameters */ + if (model->BSIM4v5igbMod) { + if (pParam->BSIM4v5nigbinv <= 0.0) + { fprintf(fplog, "Fatal: nigbinv = %g is non-positive.\n", + pParam->BSIM4v5nigbinv); + printf("Fatal: nigbinv = %g is non-positive.\n", pParam->BSIM4v5nigbinv); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5nigbacc <= 0.0) + { fprintf(fplog, "Fatal: nigbacc = %g is non-positive.\n", + pParam->BSIM4v5nigbacc); + printf("Fatal: nigbacc = %g is non-positive.\n", pParam->BSIM4v5nigbacc); + Fatal_Flag = 1; + } + } + if (model->BSIM4v5igcMod) { + if (pParam->BSIM4v5nigc <= 0.0) + { fprintf(fplog, "Fatal: nigc = %g is non-positive.\n", + pParam->BSIM4v5nigc); + printf("Fatal: nigc = %g is non-positive.\n", pParam->BSIM4v5nigc); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5poxedge <= 0.0) + { fprintf(fplog, "Fatal: poxedge = %g is non-positive.\n", + pParam->BSIM4v5poxedge); + printf("Fatal: poxedge = %g is non-positive.\n", pParam->BSIM4v5poxedge); + Fatal_Flag = 1; + } + if (pParam->BSIM4v5pigcd <= 0.0) + { fprintf(fplog, "Fatal: pigcd = %g is non-positive.\n", + pParam->BSIM4v5pigcd); + printf("Fatal: pigcd = %g is non-positive.\n", pParam->BSIM4v5pigcd); + Fatal_Flag = 1; + } + } + + /* Check capacitance parameters */ + if (pParam->BSIM4v5clc < 0.0) + { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM4v5clc); + printf("Fatal: Clc = %g is negative.\n", pParam->BSIM4v5clc); + Fatal_Flag = 1; + } + + /* Check overlap capacitance parameters */ + if (pParam->BSIM4v5ckappas < 0.02) + { fprintf(fplog, "Warning: ckappas = %g is too small. Set to 0.02\n", + pParam->BSIM4v5ckappas); + printf("Warning: ckappas = %g is too small.\n", pParam->BSIM4v5ckappas); + pParam->BSIM4v5ckappas = 0.02; + } + if (pParam->BSIM4v5ckappad < 0.02) + { fprintf(fplog, "Warning: ckappad = %g is too small. Set to 0.02\n", + pParam->BSIM4v5ckappad); + printf("Warning: ckappad = %g is too small.\n", pParam->BSIM4v5ckappad); + pParam->BSIM4v5ckappad = 0.02; + } + + if (model->BSIM4v5vtss < 0.0) + { fprintf(fplog, "Fatal: Vtss = %g is negative.\n", + model->BSIM4v5vtss); + printf("Fatal: Vtss = %g is negative.\n", + model->BSIM4v5vtss); + Fatal_Flag = 1; + } + if (model->BSIM4v5vtsd < 0.0) + { fprintf(fplog, "Fatal: Vtsd = %g is negative.\n", + model->BSIM4v5vtsd); + printf("Fatal: Vtsd = %g is negative.\n", + model->BSIM4v5vtsd); + Fatal_Flag = 1; + } + if (model->BSIM4v5vtssws < 0.0) + { fprintf(fplog, "Fatal: Vtssws = %g is negative.\n", + model->BSIM4v5vtssws); + printf("Fatal: Vtssws = %g is negative.\n", + model->BSIM4v5vtssws); + Fatal_Flag = 1; + } + if (model->BSIM4v5vtsswd < 0.0) + { fprintf(fplog, "Fatal: Vtsswd = %g is negative.\n", + model->BSIM4v5vtsswd); + printf("Fatal: Vtsswd = %g is negative.\n", + model->BSIM4v5vtsswd); + Fatal_Flag = 1; + } + if (model->BSIM4v5vtsswgs < 0.0) + { fprintf(fplog, "Fatal: Vtsswgs = %g is negative.\n", + model->BSIM4v5vtsswgs); + printf("Fatal: Vtsswgs = %g is negative.\n", + model->BSIM4v5vtsswgs); + Fatal_Flag = 1; + } + if (model->BSIM4v5vtsswgd < 0.0) + { fprintf(fplog, "Fatal: Vtsswgd = %g is negative.\n", + model->BSIM4v5vtsswgd); + printf("Fatal: Vtsswgd = %g is negative.\n", + model->BSIM4v5vtsswgd); + Fatal_Flag = 1; + } + + + if (model->BSIM4v5paramChk ==1) + { +/* Check L and W parameters */ + if (pParam->BSIM4v5leff <= 1.0e-9) + { fprintf(fplog, "Warning: Leff = %g <= 1.0e-9. Recommended Leff >= 1e-8 \n", + pParam->BSIM4v5leff); + printf("Warning: Leff = %g <= 1.0e-9. Recommended Leff >= 1e-8 \n", + pParam->BSIM4v5leff); + } + + if (pParam->BSIM4v5leffCV <= 1.0e-9) + { fprintf(fplog, "Warning: Leff for CV = %g <= 1.0e-9. Recommended LeffCV >=1e-8 \n", + pParam->BSIM4v5leffCV); + printf("Warning: Leff for CV = %g <= 1.0e-9. Recommended LeffCV >=1e-8 \n", + pParam->BSIM4v5leffCV); + } + + if (pParam->BSIM4v5weff <= 1.0e-9) + { fprintf(fplog, "Warning: Weff = %g <= 1.0e-9. Recommended Weff >=1e-7 \n", + pParam->BSIM4v5weff); + printf("Warning: Weff = %g <= 1.0e-9. Recommended Weff >=1e-7 \n", + pParam->BSIM4v5weff); + } + + if (pParam->BSIM4v5weffCV <= 1.0e-9) + { fprintf(fplog, "Warning: Weff for CV = %g <= 1.0e-9. Recommended WeffCV >= 1e-7 \n", + pParam->BSIM4v5weffCV); + printf("Warning: Weff for CV = %g <= 1.0e-9. Recommended WeffCV >= 1e-7 \n", + pParam->BSIM4v5weffCV); + } + + /* Check threshold voltage parameters */ + if (model->BSIM4v5toxe < 1.0e-10) + { fprintf(fplog, "Warning: Toxe = %g is less than 1A. Recommended Toxe >= 5A\n", + model->BSIM4v5toxe); + printf("Warning: Toxe = %g is less than 1A. Recommended Toxe >= 5A\n", model->BSIM4v5toxe); + } + if (model->BSIM4v5toxp < 1.0e-10) + { fprintf(fplog, "Warning: Toxp = %g is less than 1A. Recommended Toxp >= 5A\n", + model->BSIM4v5toxp); + printf("Warning: Toxp = %g is less than 1A. Recommended Toxp >= 5A\n", model->BSIM4v5toxp); + } + if (model->BSIM4v5toxm < 1.0e-10) + { fprintf(fplog, "Warning: Toxm = %g is less than 1A. Recommended Toxm >= 5A\n", + model->BSIM4v5toxm); + printf("Warning: Toxm = %g is less than 1A. Recommended Toxm >= 5A\n", model->BSIM4v5toxm); + } + + if (pParam->BSIM4v5ndep <= 1.0e12) + { fprintf(fplog, "Warning: Ndep = %g may be too small.\n", + pParam->BSIM4v5ndep); + printf("Warning: Ndep = %g may be too small.\n", + pParam->BSIM4v5ndep); + } + else if (pParam->BSIM4v5ndep >= 1.0e21) + { fprintf(fplog, "Warning: Ndep = %g may be too large.\n", + pParam->BSIM4v5ndep); + printf("Warning: Ndep = %g may be too large.\n", + pParam->BSIM4v5ndep); + } + + if (pParam->BSIM4v5nsub <= 1.0e14) + { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", + pParam->BSIM4v5nsub); + printf("Warning: Nsub = %g may be too small.\n", + pParam->BSIM4v5nsub); + } + else if (pParam->BSIM4v5nsub >= 1.0e21) + { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", + pParam->BSIM4v5nsub); + printf("Warning: Nsub = %g may be too large.\n", + pParam->BSIM4v5nsub); + } + + if ((pParam->BSIM4v5ngate > 0.0) && + (pParam->BSIM4v5ngate <= 1.e18)) + { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM4v5ngate); + printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM4v5ngate); + } + + if (pParam->BSIM4v5dvt0 < 0.0) + { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", + pParam->BSIM4v5dvt0); + printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM4v5dvt0); + } + + if (fabs(1.0e-8 / (pParam->BSIM4v5w0 + pParam->BSIM4v5weff)) > 10.0) + { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); + printf("Warning: (W0 + Weff) may be too small.\n"); + } + +/* Check subthreshold parameters */ + if (pParam->BSIM4v5nfactor < 0.0) + { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", + pParam->BSIM4v5nfactor); + printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM4v5nfactor); + } + if (pParam->BSIM4v5cdsc < 0.0) + { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", + pParam->BSIM4v5cdsc); + printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM4v5cdsc); + } + if (pParam->BSIM4v5cdscd < 0.0) + { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", + pParam->BSIM4v5cdscd); + printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM4v5cdscd); + } +/* Check DIBL parameters */ + if (here->BSIM4v5eta0 < 0.0) + { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", + here->BSIM4v5eta0); + printf("Warning: Eta0 = %g is negative.\n", here->BSIM4v5eta0); + } + +/* Check Abulk parameters */ + if (fabs(1.0e-8 / (pParam->BSIM4v5b1 + pParam->BSIM4v5weff)) > 10.0) + { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); + printf("Warning: (B1 + Weff) may be too small.\n"); + } + + +/* Check Saturation parameters */ + if (pParam->BSIM4v5a2 < 0.01) + { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM4v5a2); + printf("Warning: A2 = %g is too small. Set to 0.01.\n", + pParam->BSIM4v5a2); + pParam->BSIM4v5a2 = 0.01; + } + else if (pParam->BSIM4v5a2 > 1.0) + { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM4v5a2); + printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM4v5a2); + pParam->BSIM4v5a2 = 1.0; + pParam->BSIM4v5a1 = 0.0; + } + + if (pParam->BSIM4v5prwg < 0.0) + { fprintf(fplog, "Warning: Prwg = %g is negative. Set to zero.\n", + pParam->BSIM4v5prwg); + printf("Warning: Prwg = %g is negative. Set to zero.\n", + pParam->BSIM4v5prwg); + pParam->BSIM4v5prwg = 0.0; + } + + if (pParam->BSIM4v5rdsw < 0.0) + { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM4v5rdsw); + printf("Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM4v5rdsw); + pParam->BSIM4v5rdsw = 0.0; + pParam->BSIM4v5rds0 = 0.0; + } + + if (pParam->BSIM4v5rds0 < 0.0) + { fprintf(fplog, "Warning: Rds at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v5rds0); + printf("Warning: Rds at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v5rds0); + pParam->BSIM4v5rds0 = 0.0; + } + + if (pParam->BSIM4v5rdswmin < 0.0) + { fprintf(fplog, "Warning: Rdswmin at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v5rdswmin); + printf("Warning: Rdswmin at current temperature = %g is negative. Set to zero.\n", + pParam->BSIM4v5rdswmin); + pParam->BSIM4v5rdswmin = 0.0; + } + + if (pParam->BSIM4v5pscbe2 <= 0.0) + { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", + pParam->BSIM4v5pscbe2); + printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM4v5pscbe2); + } + + if (pParam->BSIM4v5vsattemp < 1.0e3) + { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM4v5vsattemp); + printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM4v5vsattemp); + } + + if((model->BSIM4v5lambdaGiven) && (pParam->BSIM4v5lambda > 0.0) ) + { + if (pParam->BSIM4v5lambda > 1.0e-9) + { fprintf(fplog, "Warning: Lambda = %g may be too large.\n", pParam->BSIM4v5lambda); + printf("Warning: Lambda = %g may be too large.\n", pParam->BSIM4v5lambda); + } + } + + if((model->BSIM4v5vtlGiven) && (pParam->BSIM4v5vtl > 0.0) ) + { + if (pParam->BSIM4v5vtl < 6.0e4) + { fprintf(fplog, "Warning: Thermal velocity vtl = %g may be too small.\n", pParam->BSIM4v5vtl); + printf("Warning: Thermal velocity vtl = %g may be too small.\n", pParam->BSIM4v5vtl); + } + + if (pParam->BSIM4v5xn < 3.0) + { fprintf(fplog, "Warning: back scattering coeff xn = %g is too small.\n", pParam->BSIM4v5xn); + printf("Warning: back scattering coeff xn = %g is too small. Reset to 3.0 \n", pParam->BSIM4v5xn); + pParam->BSIM4v5xn = 3.0; + } + + if (model->BSIM4v5lc < 0.0) + { fprintf(fplog, "Warning: back scattering coeff lc = %g is too small.\n", model->BSIM4v5lc); + printf("Warning: back scattering coeff lc = %g is too small. Reset to 0.0\n", model->BSIM4v5lc); + pParam->BSIM4v5lc = 0.0; + } + } + + if (pParam->BSIM4v5pdibl1 < 0.0) + { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", + pParam->BSIM4v5pdibl1); + printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM4v5pdibl1); + } + if (pParam->BSIM4v5pdibl2 < 0.0) + { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", + pParam->BSIM4v5pdibl2); + printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM4v5pdibl2); + } + +/* Check stress effect parameters */ + if((here->BSIM4v5sa > 0.0) && (here->BSIM4v5sb > 0.0) && + ((here->BSIM4v5nf == 1.0) || ((here->BSIM4v5nf > 1.0) && (here->BSIM4v5sd > 0.0))) ) + { if (model->BSIM4v5lodk2 <= 0.0) + { fprintf(fplog, "Warning: LODK2 = %g is not positive.\n",model->BSIM4v5lodk2); + printf("Warning: LODK2 = %g is not positive.\n",model->BSIM4v5lodk2); + } + if (model->BSIM4v5lodeta0 <= 0.0) + { fprintf(fplog, "Warning: LODETA0 = %g is not positive.\n",model->BSIM4v5lodeta0); + printf("Warning: LODETA0 = %g is not positive.\n",model->BSIM4v5lodeta0); + } + } + +/* Check gate resistance parameters */ + if (here->BSIM4v5rgateMod == 1) + { if (model->BSIM4v5rshg <= 0.0) + printf("Warning: rshg should be positive for rgateMod = 1.\n"); + } + else if (here->BSIM4v5rgateMod == 2) + { if (model->BSIM4v5rshg <= 0.0) + printf("Warning: rshg <= 0.0 for rgateMod = 2.\n"); + else if (pParam->BSIM4v5xrcrg1 <= 0.0) + printf("Warning: xrcrg1 <= 0.0 for rgateMod = 2.\n"); + } + if (here->BSIM4v5rgateMod == 3) + { if (model->BSIM4v5rshg <= 0.0) + printf("Warning: rshg should be positive for rgateMod = 3.\n"); + else if (pParam->BSIM4v5xrcrg1 <= 0.0) + printf("Warning: xrcrg1 should be positive for rgateMod = 3.\n"); + } + +/* Check capacitance parameters */ + if (pParam->BSIM4v5noff < 0.1) + { fprintf(fplog, "Warning: Noff = %g is too small.\n", + pParam->BSIM4v5noff); + printf("Warning: Noff = %g is too small.\n", pParam->BSIM4v5noff); + } + + if (pParam->BSIM4v5voffcv < -0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too small.\n", + pParam->BSIM4v5voffcv); + printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM4v5voffcv); + } + + if (pParam->BSIM4v5moin < 5.0) + { fprintf(fplog, "Warning: Moin = %g is too small.\n", + pParam->BSIM4v5moin); + printf("Warning: Moin = %g is too small.\n", pParam->BSIM4v5moin); + } + if (pParam->BSIM4v5moin > 25.0) + { fprintf(fplog, "Warning: Moin = %g is too large.\n", + pParam->BSIM4v5moin); + printf("Warning: Moin = %g is too large.\n", pParam->BSIM4v5moin); + } + if(model->BSIM4v5capMod ==2) { + if (pParam->BSIM4v5acde < 0.1) + { fprintf(fplog, "Warning: Acde = %g is too small.\n", + pParam->BSIM4v5acde); + printf("Warning: Acde = %g is too small.\n", pParam->BSIM4v5acde); + } + if (pParam->BSIM4v5acde > 1.6) + { fprintf(fplog, "Warning: Acde = %g is too large.\n", + pParam->BSIM4v5acde); + printf("Warning: Acde = %g is too large.\n", pParam->BSIM4v5acde); + } + } + +/* Check overlap capacitance parameters */ + if (model->BSIM4v5cgdo < 0.0) + { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM4v5cgdo); + printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM4v5cgdo); + model->BSIM4v5cgdo = 0.0; + } + if (model->BSIM4v5cgso < 0.0) + { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM4v5cgso); + printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM4v5cgso); + model->BSIM4v5cgso = 0.0; + } + if (model->BSIM4v5cgbo < 0.0) + { fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM4v5cgbo); + printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM4v5cgbo); + model->BSIM4v5cgbo = 0.0; + } + if (model->BSIM4v5tnoiMod == 1) { + if (model->BSIM4v5tnoia < 0.0) + { fprintf(fplog, "Warning: tnoia = %g is negative. Set to zero.\n", model->BSIM4v5tnoia); + printf("Warning: tnoia = %g is negative. Set to zero.\n", model->BSIM4v5tnoia); + model->BSIM4v5tnoia = 0.0; + } + if (model->BSIM4v5tnoib < 0.0) + { fprintf(fplog, "Warning: tnoib = %g is negative. Set to zero.\n", model->BSIM4v5tnoib); + printf("Warning: tnoib = %g is negative. Set to zero.\n", model->BSIM4v5tnoib); + model->BSIM4v5tnoib = 0.0; + } + + if (model->BSIM4v5rnoia < 0.0) + { fprintf(fplog, "Warning: rnoia = %g is negative. Set to zero.\n", model->BSIM4v5rnoia); + printf("Warning: rnoia = %g is negative. Set to zero.\n", model->BSIM4v5rnoia); + model->BSIM4v5rnoia = 0.0; + } + if (model->BSIM4v5rnoib < 0.0) + { fprintf(fplog, "Warning: rnoib = %g is negative. Set to zero.\n", model->BSIM4v5rnoib); + printf("Warning: rnoib = %g is negative. Set to zero.\n", model->BSIM4v5rnoib); + model->BSIM4v5rnoib = 0.0; + } + } + + if (model->BSIM4v5SjctEmissionCoeff < 0.0) + { fprintf(fplog, "Warning: Njs = %g is negative.\n", + model->BSIM4v5SjctEmissionCoeff); + printf("Warning: Njs = %g is negative.\n", + model->BSIM4v5SjctEmissionCoeff); + } + if (model->BSIM4v5DjctEmissionCoeff < 0.0) + { fprintf(fplog, "Warning: Njd = %g is negative.\n", + model->BSIM4v5DjctEmissionCoeff); + printf("Warning: Njd = %g is negative.\n", + model->BSIM4v5DjctEmissionCoeff); + } + if (model->BSIM4v5njtstemp < 0.0) + { fprintf(fplog, "Warning: Njts = %g is negative at temperature = %g.\n", + model->BSIM4v5njtstemp, ckt->CKTtemp); + printf("Warning: Njts = %g is negative at temperature = %g.\n", + model->BSIM4v5njtstemp, ckt->CKTtemp); + } + if (model->BSIM4v5njtsswtemp < 0.0) + { fprintf(fplog, "Warning: Njtssw = %g is negative at temperature = %g.\n", + model->BSIM4v5njtsswtemp, ckt->CKTtemp); + printf("Warning: Njtssw = %g is negative at temperature = %g.\n", + model->BSIM4v5njtsswtemp, ckt->CKTtemp); + } + if (model->BSIM4v5njtsswgtemp < 0.0) + { fprintf(fplog, "Warning: Njtsswg = %g is negative at temperature = %g.\n", + model->BSIM4v5njtsswgtemp, ckt->CKTtemp); + printf("Warning: Njtsswg = %g is negative at temperature = %g.\n", + model->BSIM4v5njtsswgtemp, ckt->CKTtemp); + } + if (model->BSIM4v5ntnoi < 0.0) + { fprintf(fplog, "Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4v5ntnoi); + printf("Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4v5ntnoi); + model->BSIM4v5ntnoi = 0.0; + } + + /* diode model */ + if (model->BSIM4v5SbulkJctBotGradingCoeff >= 0.99) + { fprintf(fplog, "Warning: MJS = %g is too big. Set to 0.99.\n", model->BSIM4v5SbulkJctBotGradingCoeff); + printf("Warning: MJS = %g is too big. Set to 0.99.\n", model->BSIM4v5SbulkJctBotGradingCoeff); + model->BSIM4v5SbulkJctBotGradingCoeff = 0.99; + } + if (model->BSIM4v5SbulkJctSideGradingCoeff >= 0.99) + { fprintf(fplog, "Warning: MJSWS = %g is too big. Set to 0.99.\n", model->BSIM4v5SbulkJctSideGradingCoeff); + printf("Warning: MJSWS = %g is too big. Set to 0.99.\n", model->BSIM4v5SbulkJctSideGradingCoeff); + model->BSIM4v5SbulkJctSideGradingCoeff = 0.99; + } + if (model->BSIM4v5SbulkJctGateSideGradingCoeff >= 0.99) + { fprintf(fplog, "Warning: MJSWGS = %g is too big. Set to 0.99.\n", model->BSIM4v5SbulkJctGateSideGradingCoeff); + printf("Warning: MJSWGS = %g is too big. Set to 0.99.\n", model->BSIM4v5SbulkJctGateSideGradingCoeff); + model->BSIM4v5SbulkJctGateSideGradingCoeff = 0.99; + } + + if (model->BSIM4v5DbulkJctBotGradingCoeff >= 0.99) + { fprintf(fplog, "Warning: MJD = %g is too big. Set to 0.99.\n", model->BSIM4v5DbulkJctBotGradingCoeff); + printf("Warning: MJD = %g is too big. Set to 0.99.\n", model->BSIM4v5DbulkJctBotGradingCoeff); + model->BSIM4v5DbulkJctBotGradingCoeff = 0.99; + } + if (model->BSIM4v5DbulkJctSideGradingCoeff >= 0.99) + { fprintf(fplog, "Warning: MJSWD = %g is too big. Set to 0.99.\n", model->BSIM4v5DbulkJctSideGradingCoeff); + printf("Warning: MJSWD = %g is too big. Set to 0.99.\n", model->BSIM4v5DbulkJctSideGradingCoeff); + model->BSIM4v5DbulkJctSideGradingCoeff = 0.99; + } + if (model->BSIM4v5DbulkJctGateSideGradingCoeff >= 0.99) + { fprintf(fplog, "Warning: MJSWGD = %g is too big. Set to 0.99.\n", model->BSIM4v5DbulkJctGateSideGradingCoeff); + printf("Warning: MJSWGD = %g is too big. Set to 0.99.\n", model->BSIM4v5DbulkJctGateSideGradingCoeff); + model->BSIM4v5DbulkJctGateSideGradingCoeff = 0.99; + } + if (model->BSIM4v5wpemod == 1) + { + if (model->BSIM4v5scref <= 0.0) + { fprintf(fplog, "Warning: SCREF = %g is not positive. Set to 1e-6.\n", model->BSIM4v5scref); + //printf("Warning: SCREF = %g is not positive. Set to 1e-6.\n", model->BSIM4v5scref); + model->BSIM4v5scref = 1e-6; + } + if (here->BSIM4v5sca < 0.0) + { fprintf(fplog, "Warning: SCA = %g is negative. Set to 0.0.\n", here->BSIM4v5sca); + //printf("Warning: SCA = %g is negative. Set to 0.0.\n", here->BSIM4v5sca); + here->BSIM4v5sca = 0.0; + } + if (here->BSIM4v5scb < 0.0) + { fprintf(fplog, "Warning: SCB = %g is negative. Set to 0.0.\n", here->BSIM4v5scb); + //printf("Warning: SCB = %g is negative. Set to 0.0.\n", here->BSIM4v5scb); + here->BSIM4v5scb = 0.0; + } + if (here->BSIM4v5scc < 0.0) + { fprintf(fplog, "Warning: SCC = %g is negative. Set to 0.0.\n", here->BSIM4v5scc); + //printf("Warning: SCC = %g is negative. Set to 0.0.\n", here->BSIM4v5scc); + here->BSIM4v5scc = 0.0; + } + if (here->BSIM4v5sc < 0.0) + { fprintf(fplog, "Warning: SC = %g is negative. Set to 0.0.\n", here->BSIM4v5sc); + //printf("Warning: SC = %g is negative. Set to 0.0.\n", here->BSIM4v5sc); + here->BSIM4v5sc = 0.0; + } + } + }/* loop for the parameter check for warning messages */ + fclose(fplog); + } + else + { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); + } + + return(Fatal_Flag); +} + diff --git a/src/spicelib/devices/bsim4v5/b4v5cvtest.c b/src/spicelib/devices/bsim4v5/b4v5cvtest.c new file mode 100644 index 000000000..811d738c1 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5cvtest.c @@ -0,0 +1,199 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4cvtest.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 05/09/2003. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "trandefs.h" +#include "const.h" +#include "devdefs.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM4v5convTest(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; +double delvbd, delvbs, delvds, delvgd, delvgs; +double delvdbd, delvsbs; +double delvbd_jct, delvbs_jct; +double vds, vgs, vgd, vgdo, vbs, vbd; +double vdbd, vdbs, vsbs; +double cbhat, cdhat, Idtot, Ibtot; +double vses, vdes, vdedo, delvses, delvded, delvdes; +double Isestot, cseshat, Idedtot, cdedhat; +double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat; +double tol0, tol1, tol2, tol3, tol4, tol5, tol6; + + for (; model != NULL; model = model->BSIM4v5nextModel) + { for (here = model->BSIM4v5instances; here != NULL ; + here=here->BSIM4v5nextInstance) + { + if (here->BSIM4v5owner != ARCHme) continue; + vds = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vgs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5gNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vbs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5bNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vdbs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5dbNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vsbs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5sbNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vses = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5sNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vdes = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5dNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + + vgdo = *(ckt->CKTstate0 + here->BSIM4v5vgs) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + vbd = vbs - vds; + vdbd = vdbs - vds; + vgd = vgs - vds; + + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v5vbd); + delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v5vdbd); + delvgd = vgd - vgdo; + + delvds = vds - *(ckt->CKTstate0 + here->BSIM4v5vds); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v5vgs); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v5vbs); + delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v5vsbs); + + delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v5vses)); + vdedo = *(ckt->CKTstate0 + here->BSIM4v5vdes) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v5vdes); + delvded = vdes - vds - vdedo; + + delvbd_jct = (!here->BSIM4v5rbodyMod) ? delvbd : delvdbd; + delvbs_jct = (!here->BSIM4v5rbodyMod) ? delvbs : delvsbs; + + if (here->BSIM4v5mode >= 0) + { Idtot = here->BSIM4v5cd + here->BSIM4v5csub - here->BSIM4v5cbd + + here->BSIM4v5Igidl; + cdhat = Idtot - here->BSIM4v5gbd * delvbd_jct + + (here->BSIM4v5gmbs + here->BSIM4v5gbbs + here->BSIM4v5ggidlb) * delvbs + + (here->BSIM4v5gm + here->BSIM4v5gbgs + here->BSIM4v5ggidlg) * delvgs + + (here->BSIM4v5gds + here->BSIM4v5gbds + here->BSIM4v5ggidld) * delvds; + + Igstot = here->BSIM4v5Igs + here->BSIM4v5Igcs; + cgshat = Igstot + (here->BSIM4v5gIgsg + here->BSIM4v5gIgcsg) * delvgs + + here->BSIM4v5gIgcsd * delvds + here->BSIM4v5gIgcsb * delvbs; + + Igdtot = here->BSIM4v5Igd + here->BSIM4v5Igcd; + cgdhat = Igdtot + here->BSIM4v5gIgdg * delvgd + here->BSIM4v5gIgcdg * delvgs + + here->BSIM4v5gIgcdd * delvds + here->BSIM4v5gIgcdb * delvbs; + + Igbtot = here->BSIM4v5Igb; + cgbhat = here->BSIM4v5Igb + here->BSIM4v5gIgbg * delvgs + here->BSIM4v5gIgbd + * delvds + here->BSIM4v5gIgbb * delvbs; + } + else + { Idtot = here->BSIM4v5cd + here->BSIM4v5cbd - here->BSIM4v5Igidl; /* bugfix */ + cdhat = Idtot + here->BSIM4v5gbd * delvbd_jct + here->BSIM4v5gmbs + * delvbd + here->BSIM4v5gm * delvgd + - (here->BSIM4v5gds + here->BSIM4v5ggidls) * delvds + - here->BSIM4v5ggidlg * delvgs - here->BSIM4v5ggidlb * delvbs; + + Igstot = here->BSIM4v5Igs + here->BSIM4v5Igcd; + cgshat = Igstot + here->BSIM4v5gIgsg * delvgs + here->BSIM4v5gIgcdg * delvgd + - here->BSIM4v5gIgcdd * delvds + here->BSIM4v5gIgcdb * delvbd; + + Igdtot = here->BSIM4v5Igd + here->BSIM4v5Igcs; + cgdhat = Igdtot + (here->BSIM4v5gIgdg + here->BSIM4v5gIgcsg) * delvgd + - here->BSIM4v5gIgcsd * delvds + here->BSIM4v5gIgcsb * delvbd; + + Igbtot = here->BSIM4v5Igb; + cgbhat = here->BSIM4v5Igb + here->BSIM4v5gIgbg * delvgd - here->BSIM4v5gIgbd + * delvds + here->BSIM4v5gIgbb * delvbd; + } + + Isestot = here->BSIM4v5gstot * (*(ckt->CKTstate0 + here->BSIM4v5vses)); + cseshat = Isestot + here->BSIM4v5gstot * delvses + + here->BSIM4v5gstotd * delvds + here->BSIM4v5gstotg * delvgs + + here->BSIM4v5gstotb * delvbs; + + Idedtot = here->BSIM4v5gdtot * vdedo; + cdedhat = Idedtot + here->BSIM4v5gdtot * delvded + + here->BSIM4v5gdtotd * delvds + here->BSIM4v5gdtotg * delvgs + + here->BSIM4v5gdtotb * delvbs; + + /* + * Check convergence + */ + + if ((here->BSIM4v5off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot)) + + ckt->CKTabstol; + tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot)) + + ckt->CKTabstol; + tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot)) + + ckt->CKTabstol; + tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot)) + + ckt->CKTabstol; + tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot)) + + ckt->CKTabstol; + tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot)) + + ckt->CKTabstol; + + if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1) + || (fabs(cdedhat - Idedtot) >= tol2)) + { ckt->CKTnoncon++; + return(OK); + } + + if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4) + || (fabs(cgbhat - Igbtot) >= tol5)) + { ckt->CKTnoncon++; + return(OK); + } + + Ibtot = here->BSIM4v5cbs + here->BSIM4v5cbd + - here->BSIM4v5Igidl - here->BSIM4v5Igisl - here->BSIM4v5csub; + if (here->BSIM4v5mode >= 0) + { cbhat = Ibtot + here->BSIM4v5gbd * delvbd_jct + + here->BSIM4v5gbs * delvbs_jct - (here->BSIM4v5gbbs + here->BSIM4v5ggidlb) + * delvbs - (here->BSIM4v5gbgs + here->BSIM4v5ggidlg) * delvgs + - (here->BSIM4v5gbds + here->BSIM4v5ggidld) * delvds + - here->BSIM4v5ggislg * delvgd - here->BSIM4v5ggislb* delvbd + here->BSIM4v5ggisls * delvds ; + } + else + { cbhat = Ibtot + here->BSIM4v5gbs * delvbs_jct + here->BSIM4v5gbd + * delvbd_jct - (here->BSIM4v5gbbs + here->BSIM4v5ggislb) * delvbd + - (here->BSIM4v5gbgs + here->BSIM4v5ggislg) * delvgd + + (here->BSIM4v5gbds + here->BSIM4v5ggisld - here->BSIM4v5ggidls) * delvds + - here->BSIM4v5ggidlg * delvgs - here->BSIM4v5ggidlb * delvbs; + } + tol6 = ckt->CKTreltol * MAX(fabs(cbhat), + fabs(Ibtot)) + ckt->CKTabstol; + if (fabs(cbhat - Ibtot) > tol6) + { ckt->CKTnoncon++; + return(OK); + } + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5del.c b/src/spicelib/devices/bsim4v5/b4v5del.c new file mode 100644 index 000000000..419930c6f --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5del.c @@ -0,0 +1,41 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4del.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "gendefs.h" +#include "suffix.h" + + +int +BSIM4v5delete(inModel,name,inInst) +GENmodel *inModel; +IFuid name; +GENinstance **inInst; +{ +BSIM4v5instance **fast = (BSIM4v5instance**)inInst; +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance **prev = NULL; +BSIM4v5instance *here; + + for (; model ; model = model->BSIM4v5nextModel) + { prev = &(model->BSIM4v5instances); + for (here = *prev; here ; here = *prev) + { if (here->BSIM4v5name == name || (fast && here==*fast)) + { *prev= here->BSIM4v5nextInstance; + FREE(here); + return(OK); + } + prev = &(here->BSIM4v5nextInstance); + } + } + return(E_NODEV); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5dest.c b/src/spicelib/devices/bsim4v5/b4v5dest.c new file mode 100644 index 000000000..e978fd872 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5dest.c @@ -0,0 +1,38 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4dest.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include "bsim4v5def.h" +#include "suffix.h" + +void +BSIM4v5destroy(inModel) +GENmodel **inModel; +{ +BSIM4v5model **model = (BSIM4v5model**)inModel; +BSIM4v5instance *here; +BSIM4v5instance *prev = NULL; +BSIM4v5model *mod = *model; +BSIM4v5model *oldmod = NULL; + + for (; mod ; mod = mod->BSIM4v5nextModel) + { if(oldmod) FREE(oldmod); + oldmod = mod; + prev = (BSIM4v5instance *)NULL; + for (here = mod->BSIM4v5instances; here; here = here->BSIM4v5nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + } + if(oldmod) FREE(oldmod); + *model = NULL; + return; +} diff --git a/src/spicelib/devices/bsim4v5/b4v5geo.c b/src/spicelib/devices/bsim4v5/b4v5geo.c new file mode 100644 index 000000000..fc21dd082 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5geo.c @@ -0,0 +1,385 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4geo.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" + +/* + * WDLiu: + * This subrutine is a special module to process the geometry dependent + * parasitics for BSIM4v5, which calculates Ps, Pd, As, Ad, and Rs and Rd + * for multi-fingers and varous GEO and RGEO options. + */ + +int +BSIM4v5RdsEndIso(double, double, double, double, double, double, int, int, double *); +int +BSIM4v5RdsEndSha(double, double, double, double, double, double, int, int, double *); + +int +BSIM4v5NumFingerDiff(nf, minSD, nuIntD, nuEndD, nuIntS, nuEndS) +int minSD; +double nf, *nuIntD, *nuEndD, *nuIntS, *nuEndS; +{ +int NF; + NF = (int)nf; + if ((NF%2) != 0) + { *nuEndD = *nuEndS = 1.0; + *nuIntD = *nuIntS = 2.0 * MAX((nf - 1.0) / 2.0, 0.0); + } + else + { if (minSD == 1) /* minimize # of source */ + { *nuEndD = 2.0; + *nuIntD = 2.0 * MAX((nf / 2.0 - 1.0), 0.0); + *nuEndS = 0.0; + *nuIntS = nf; + } + else + { *nuEndD = 0.0; + *nuIntD = nf; + *nuEndS = 2.0; + *nuIntS = 2.0 * MAX((nf / 2.0 - 1.0), 0.0); + } + } +return 0; +} + + +int +BSIM4v5PAeffGeo(nf, geo, minSD, Weffcj, DMCG, DMCI, DMDG, Ps, Pd, As, Ad) +int geo, minSD; +double Weffcj, DMCG, DMCI, DMDG; +double nf, *Ps, *Pd, *As, *Ad; +{ +double T0, T1, T2; +double ADiso, ADsha, ADmer, ASiso, ASsha, ASmer; +double PDiso, PDsha, PDmer, PSiso, PSsha, PSmer; +double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0; + + if (geo < 9) /* For geo = 9 and 10, the numbers of S/D diffusions already known */ + BSIM4v5NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS); + + T0 = DMCG + DMCI; + T1 = DMCG + DMCG; + T2 = DMDG + DMDG; + + PSiso = PDiso = T0 + T0 + Weffcj; + PSsha = PDsha = T1; + PSmer = PDmer = T2; + + ASiso = ADiso = T0 * Weffcj; + ASsha = ADsha = DMCG * Weffcj; + ASmer = ADmer = DMDG * Weffcj; + + switch(geo) + { case 0: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 1: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 2: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 3: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 4: + *Ps = nuEndS * PSiso + nuIntS * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = nuEndS * ASiso + nuIntS * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 5: + *Ps = (nuEndS + nuIntS) * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = (nuEndS + nuIntS) * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 6: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = nuEndD * PDiso + nuIntD * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = nuEndD * ADiso + nuIntD * ADsha; + break; + case 7: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = (nuEndD + nuIntD) * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = (nuEndD + nuIntD) * ADsha; + break; + case 8: + *Ps = nuEndS * PSmer + nuIntS * PSsha; + *Pd = nuEndD * PDmer + nuIntD * PDsha; + *As = nuEndS * ASmer + nuIntS * ASsha; + *Ad = nuEndD * ADmer + nuIntD * ADsha; + break; + case 9: /* geo = 9 and 10 happen only when nf = even */ + *Ps = PSiso + (nf - 1.0) * PSsha; + *Pd = nf * PDsha; + *As = ASiso + (nf - 1.0) * ASsha; + *Ad = nf * ADsha; + break; + case 10: + *Ps = nf * PSsha; + *Pd = PDiso + (nf - 1.0) * PDsha; + *As = nf * ASsha; + *Ad = ADiso + (nf - 1.0) * ADsha; + break; + default: + printf("Warning: Specified GEO = %d not matched\n", geo); + } +return 0; +} + + +int +BSIM4v5RdseffGeo(nf, geo, rgeo, minSD, Weffcj, Rsh, DMCG, DMCI, DMDG, Type, Rtot) +int geo, rgeo, minSD, Type; +double nf, Weffcj, Rsh, DMCG, DMCI, DMDG; +double *Rtot; +{ +double Rint=0.0, Rend = 0.0; +double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0; + + if (geo < 9) /* since geo = 9 and 10 only happen when nf = even */ + { BSIM4v5NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS); + + /* Internal S/D resistance -- assume shared S or D and all wide contacts */ + if (Type == 1) + { if (nuIntS == 0.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / ( Weffcj * nuIntS); + } + else + { if (nuIntD == 0.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / ( Weffcj * nuIntD); + } + } + + /* End S/D resistance -- geo dependent */ + switch(geo) + { case 0: + if (Type == 1) BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 1: + if (Type == 1) BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 2: + if (Type == 1) BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 3: + if (Type == 1) BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 4: + if (Type == 1) BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else Rend = Rsh * DMDG / Weffcj; + break; + case 5: + if (Type == 1) BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndS, rgeo, 1, &Rend); + else Rend = Rsh * DMDG / (Weffcj * nuEndD); + break; + case 6: + if (Type == 1) Rend = Rsh * DMDG / Weffcj; + else BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 7: + if (Type == 1) Rend = Rsh * DMDG / (Weffcj * nuEndS); + else BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, + nuEndD, rgeo, 0, &Rend); + break; + case 8: + Rend = Rsh * DMDG / Weffcj; + break; + case 9: /* all wide contacts assumed for geo = 9 and 10 */ + if (Type == 1) + { Rend = 0.5 * Rsh * DMCG / Weffcj; + if (nf == 2.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / (Weffcj * (nf - 2.0)); + } + else + { Rend = 0.0; + Rint = Rsh * DMCG / (Weffcj * nf); + } + break; + case 10: + if (Type == 1) + { Rend = 0.0; + Rint = Rsh * DMCG / (Weffcj * nf); + } + else + { Rend = 0.5 * Rsh * DMCG / Weffcj;; + if (nf == 2.0) + Rint = 0.0; + else + Rint = Rsh * DMCG / (Weffcj * (nf - 2.0)); + } + break; + default: + printf("Warning: Specified GEO = %d not matched\n", geo); + } + + if (Rint <= 0.0) + *Rtot = Rend; + else if (Rend <= 0.0) + *Rtot = Rint; + else + *Rtot = Rint * Rend / (Rint + Rend); +if(*Rtot==0.0) + printf("Warning: Zero resistance returned from RdseffGeo\n"); +return 0; +} + + +int +BSIM4v5RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend) +double Weffcj, Rsh, DMCG, DMCI, DMDG; +int rgeo, Type; +double nuEnd, *Rend; +{ + if (Type == 1) + { switch(rgeo) + { case 1: + case 2: + case 5: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 3: + case 4: + case 6: + if ((DMCG + DMCI) == 0.0) + printf("(DMCG + DMCI) can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI)); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } + else + { switch(rgeo) + { case 1: + case 3: + case 7: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 2: + case 4: + case 8: + if ((DMCG + DMCI) == 0.0) + printf("(DMCG + DMCI) can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI)); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } +return 0; +} + + +int +BSIM4v5RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend) +double Weffcj, Rsh, DMCG, DMCI, DMDG; +int rgeo, Type; +double nuEnd, *Rend; +{ + if (Type == 1) + { switch(rgeo) + { case 1: + case 2: + case 5: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 3: + case 4: + case 6: + if (DMCG == 0.0) + printf("DMCG can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } + else + { switch(rgeo) + { case 1: + case 3: + case 7: + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * DMCG / (Weffcj * nuEnd); + break; + case 2: + case 4: + case 8: + if (DMCG == 0.0) + printf("DMCG can not be equal to zero\n"); + if (nuEnd == 0.0) + *Rend = 0.0; + else + *Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG); + break; + default: + printf("Warning: Specified RGEO = %d not matched\n", rgeo); + } + } +return 0; +} diff --git a/src/spicelib/devices/bsim4v5/b4v5getic.c b/src/spicelib/devices/bsim4v5/b4v5getic.c new file mode 100644 index 000000000..08360a66a --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5getic.c @@ -0,0 +1,44 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4getic.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM4v5getic(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; + + for (; model ; model = model->BSIM4v5nextModel) + { for (here = model->BSIM4v5instances; here; here = here->BSIM4v5nextInstance) + { if (here->BSIM4v5owner != ARCHme) continue; + if (!here->BSIM4v5icVDSGiven) + { here->BSIM4v5icVDS = *(ckt->CKTrhs + here->BSIM4v5dNode) + - *(ckt->CKTrhs + here->BSIM4v5sNode); + } + if (!here->BSIM4v5icVGSGiven) + { here->BSIM4v5icVGS = *(ckt->CKTrhs + here->BSIM4v5gNodeExt) + - *(ckt->CKTrhs + here->BSIM4v5sNode); + } + if(!here->BSIM4v5icVBSGiven) + { here->BSIM4v5icVBS = *(ckt->CKTrhs + here->BSIM4v5bNode) + - *(ckt->CKTrhs + here->BSIM4v5sNode); + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5ld.c b/src/spicelib/devices/bsim4v5/b4v5ld.c new file mode 100644 index 000000000..f2d25764c --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5ld.c @@ -0,0 +1,4783 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4ld.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 02/06/2004. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" +#include "suffix.h" +/* +#define MAX_EXP 2.688117142e+43 +#define MIN_EXP 3.720075976e-44 +#define EXP_THRESHOLD 100.0 +*/ +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPSSI 1.03594e-10 +#define Charge_q 1.60219e-19 +#define DELTA_1 0.02 +#define DELTA_2 0.02 +#define DELTA_3 0.02 +#define DELTA_4 0.02 +#define MM 3 /* smooth coeff */ +#define DEXP(A,B,C) { \ + if (A > EXP_THRESHOLD) { \ + B = MAX_EXP*(1.0+(A)-EXP_THRESHOLD); \ + C = MAX_EXP; \ + } else if (A < -EXP_THRESHOLD) { \ + B = MIN_EXP; \ + C = 0; \ + } else { \ + B = exp(A); \ + C = B; \ + } \ + } + +int BSIM4v5polyDepletion(double phi, double ngate,double coxe, double Vgs, double *Vgs_eff, double *dVgs_eff_dVg); + +int +BSIM4v5load(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; + +double ceqgstot, dgstot_dvd, dgstot_dvg, dgstot_dvs, dgstot_dvb; +double ceqgdtot, dgdtot_dvd, dgdtot_dvg, dgdtot_dvs, dgdtot_dvb; +double gstot, gstotd, gstotg, gstots, gstotb, gspr, Rs, Rd; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double vgs_eff, vgd_eff, dvgs_eff_dvg, dvgd_eff_dvg; +double dRs_dvg, dRd_dvg, dRs_dvb, dRd_dvb; +double dT0_dvg, dT1_dvb, dT3_dvg, dT3_dvb; +double vses, vdes, vdedo, delvses, delvded, delvdes; +double Isestot=0.0, cseshat=0.0, Idedtot=0.0, cdedhat=0.0; +double tol0, tol1, tol2, tol3, tol4, tol5, tol6; + +double geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb, ceqgcrg; +double vges, vgms, vgedo, vgmdo, vged, vgmd, delvged, delvgmd; +double delvges, delvgms, vgmb; +double gcgmgmb=0.0, gcgmdb=0.0, gcgmsb=0.0, gcdgmb, gcsgmb; +double gcgmbb=0.0, gcbgmb, qgmb, qgmid=0.0, ceqqgmid; + +double vbd, vbs, vds, vgb, vgd, vgs, vgdo, xfact; +double vdbs, vdbd, vsbs, vsbdo, vsbd; +double delvdbs, delvdbd, delvsbs; +double delvbd_jct, delvbs_jct, vbs_jct, vbd_jct; + +double SourceSatCurrent, DrainSatCurrent; +double ag0, qgb, von, cbhat=0.0, VgstNVt, ExpVgst; +double ceqqb, ceqqd, ceqqg, ceqqjd=0.0, ceqqjs=0.0, ceq, geq; +double cdrain, cdhat=0.0, ceqdrn, ceqbd, ceqbs, ceqjd, ceqjs, gjbd, gjbs; +double czbd, czbdsw, czbdswg, czbs, czbssw, czbsswg, evbd, evbs, arg, sarg; +double delvbd, delvbs, delvds, delvgd, delvgs; +double Vfbeff, dVfbeff_dVg, dVfbeff_dVb, V3, V4; +double gcbdb, gcbgb, gcbsb, gcddb, gcdgb, gcdsb, gcgdb, gcggb, gcgsb, gcsdb; +double gcgbb, gcdbb, gcsbb, gcbbb; +double gcdbdb, gcsbsb; +double gcsgb, gcssb, MJD, MJSWD, MJSWGD, MJS, MJSWS, MJSWGS; +double qgate=0.0, qbulk=0.0, qdrn=0.0, qsrc, cqgate, cqbody, cqdrn; +double Vdb, Vds, Vgs, Vbs, Gmbs, FwdSum, RevSum; +double Igidl, Ggidld, Ggidlg, Ggidlb; +double Voxacc=0.0, dVoxacc_dVg=0.0, dVoxacc_dVb=0.0; +double Voxdepinv=0.0, dVoxdepinv_dVg=0.0, dVoxdepinv_dVd=0.0, dVoxdepinv_dVb=0.0; +double VxNVt=0.0, ExpVxNVt, Vaux=0.0, dVaux_dVg=0.0, dVaux_dVd=0.0, dVaux_dVb=0.0; +double Igc, dIgc_dVg, dIgc_dVd, dIgc_dVb; +double Igcs, dIgcs_dVg, dIgcs_dVd, dIgcs_dVb; +double Igcd, dIgcd_dVg, dIgcd_dVd, dIgcd_dVb; +double Igs, dIgs_dVg, dIgs_dVs, Igd, dIgd_dVg, dIgd_dVd; +double Igbacc, dIgbacc_dVg, dIgbacc_dVb; +double Igbinv, dIgbinv_dVg, dIgbinv_dVd, dIgbinv_dVb; +double Pigcd, dPigcd_dVg, dPigcd_dVd, dPigcd_dVb; +double Istoteq, gIstotg, gIstotd, gIstots, gIstotb; +double Idtoteq, gIdtotg, gIdtotd, gIdtots, gIdtotb; +double Ibtoteq, gIbtotg, gIbtotd, gIbtots, gIbtotb; +double Igtoteq, gIgtotg, gIgtotd, gIgtots, gIgtotb; +double Igstot=0.0, cgshat=0.0, Igdtot=0.0, cgdhat=0.0, Igbtot=0.0, cgbhat=0.0; +double Vgs_eff, Vfb=0.0, Vth_NarrowW; +double Phis, dPhis_dVb, sqrtPhis, dsqrtPhis_dVb, Vth, dVth_dVb, dVth_dVd; +double Vgst, dVgst_dVg, dVgst_dVb, dVgs_eff_dVg, Nvtms, Nvtmd; +double Vtm, Vtm0; +double n, dn_dVb, dn_dVd, voffcv, noff, dnoff_dVd, dnoff_dVb; +double V0, CoxWLcen, QovCox, LINK; +double DeltaPhi, dDeltaPhi_dVg, VgDP, dVgDP_dVg; +double Cox, Tox, Tcen, dTcen_dVg, dTcen_dVd, dTcen_dVb; +double Ccen, Coxeff, dCoxeff_dVd, dCoxeff_dVg, dCoxeff_dVb; +double Denomi, dDenomi_dVg, dDenomi_dVd, dDenomi_dVb; +double ueff, dueff_dVg, dueff_dVd, dueff_dVb; +double Esat, Vdsat; +double EsatL, dEsatL_dVg, dEsatL_dVd, dEsatL_dVb; +double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; +double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, dVa_dVd, dVa_dVg, dVa_dVb; +double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; +double Arg1, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; +double T0=0.0, dT0_dVg, dT0_dVd, dT0_dVb; +double T1, dT1_dVg, dT1_dVd, dT1_dVb; +double T2, dT2_dVg, dT2_dVd, dT2_dVb; +double T3, dT3_dVg, dT3_dVd, dT3_dVb; +double T4, dT4_dVd, dT4_dVb; +double T5, dT5_dVg, dT5_dVd, dT5_dVb; +double T6, dT6_dVg, dT6_dVd, dT6_dVb; +double T7, dT7_dVg, dT7_dVd, dT7_dVb; +double T8, dT8_dVg, dT8_dVd, dT8_dVb; +double T9, dT9_dVg, dT9_dVd, dT9_dVb; +double T10, dT10_dVg, dT10_dVb, dT10_dVd; +double T11, T12, T13, T14; +double tmp, Abulk, dAbulk_dVb, Abulk0, dAbulk0_dVb; +double Cclm, dCclm_dVg, dCclm_dVd, dCclm_dVb; +double FP, dFP_dVg, PvagTerm, dPvagTerm_dVg, dPvagTerm_dVd, dPvagTerm_dVb; +double VADITS, dVADITS_dVg, dVADITS_dVd; +double Lpe_Vb, dDITS_Sft_dVb, dDITS_Sft_dVd; +double VACLM, dVACLM_dVg, dVACLM_dVd, dVACLM_dVb; +double VADIBL, dVADIBL_dVg, dVADIBL_dVd, dVADIBL_dVb; +double Xdep, dXdep_dVb, lt1, dlt1_dVb, ltw, dltw_dVb, Delt_vth, dDelt_vth_dVb; +double Theta0, dTheta0_dVb; +double TempRatio, tmp1, tmp2, tmp3, tmp4; +double DIBL_Sft, dDIBL_Sft_dVd, Lambda, dLambda_dVg; +double Idtot, Ibtot, a1, ScalingFactor; + +double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; +double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; +double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; +double diffVds, dAbulk_dVg; +double beta, dbeta_dVg, dbeta_dVd, dbeta_dVb; +double gche, dgche_dVg, dgche_dVd, dgche_dVb; +double fgche1, dfgche1_dVg, dfgche1_dVd, dfgche1_dVb; +double fgche2, dfgche2_dVg, dfgche2_dVd, dfgche2_dVb; +double Idl, dIdl_dVg, dIdl_dVd, dIdl_dVb; +double Idsa, dIdsa_dVg, dIdsa_dVd, dIdsa_dVb; +double Ids, Gm, Gds, Gmb, devbs_dvb, devbd_dvb; +double Isub, Gbd, Gbg, Gbb; +double VASCBE, dVASCBE_dVg, dVASCBE_dVd, dVASCBE_dVb; +double CoxeffWovL; +double Rds, dRds_dVg, dRds_dVb, WVCox, WVCoxRds; +double Vgst2Vtm, VdsatCV; +double Leff, Weff, dWeff_dVg, dWeff_dVb; +double AbulkCV, dAbulkCV_dVb; +double qcheq, qdef, gqdef=0.0, cqdef=0.0, cqcheq=0.0; +double gcqdb=0.0, gcqsb=0.0, gcqgb=0.0, gcqbb=0.0; +double dxpart, sxpart, ggtg, ggtd, ggts, ggtb; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; +double gbdpdp, gbdpg, gbdpb, gbdpsp; +double qgdo, qgso, cgdo, cgso; +double Cgg, Cgd, Cgb, Cdg, Cdd, Cds; +double Csg, Csd, Css, Csb, Cbg, Cbd, Cbb; +double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Qac0, Qsub0; +double dQac0_dVg, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb; +double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls; +double Igisl, Ggislg, Ggislb, Ggisls; +double Nvtmrs, Nvtmrssw, Nvtmrsswg; + +double vs, Fsevl, dvs_dVg, dvs_dVd, dvs_dVb, dFsevl_dVg, dFsevl_dVd, dFsevl_dVb; +double vgdx, vgsx; +struct bsim4v5SizeDependParam *pParam; +int ByPass, ChargeComputationNeeded, error, Check, Check1, Check2; + + double m; + +ScalingFactor = 1.0e-9; +ChargeComputationNeeded = + ((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || + ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) + ? 1 : 0; +ChargeComputationNeeded = 1; + +for (; model != NULL; model = model->BSIM4v5nextModel) +{ for (here = model->BSIM4v5instances; here != NULL; + here = here->BSIM4v5nextInstance) + { if (here->BSIM4v5owner != ARCHme) continue; + Check = Check1 = Check2 = 1; + ByPass = 0; + pParam = here->pParam; + + if ((ckt->CKTmode & MODEINITSMSIG)) + { vds = *(ckt->CKTstate0 + here->BSIM4v5vds); + vgs = *(ckt->CKTstate0 + here->BSIM4v5vgs); + vbs = *(ckt->CKTstate0 + here->BSIM4v5vbs); + vges = *(ckt->CKTstate0 + here->BSIM4v5vges); + vgms = *(ckt->CKTstate0 + here->BSIM4v5vgms); + vdbs = *(ckt->CKTstate0 + here->BSIM4v5vdbs); + vsbs = *(ckt->CKTstate0 + here->BSIM4v5vsbs); + vses = *(ckt->CKTstate0 + here->BSIM4v5vses); + vdes = *(ckt->CKTstate0 + here->BSIM4v5vdes); + + qdef = *(ckt->CKTstate0 + here->BSIM4v5qdef); + } + else if ((ckt->CKTmode & MODEINITTRAN)) + { vds = *(ckt->CKTstate1 + here->BSIM4v5vds); + vgs = *(ckt->CKTstate1 + here->BSIM4v5vgs); + vbs = *(ckt->CKTstate1 + here->BSIM4v5vbs); + vges = *(ckt->CKTstate1 + here->BSIM4v5vges); + vgms = *(ckt->CKTstate1 + here->BSIM4v5vgms); + vdbs = *(ckt->CKTstate1 + here->BSIM4v5vdbs); + vsbs = *(ckt->CKTstate1 + here->BSIM4v5vsbs); + vses = *(ckt->CKTstate1 + here->BSIM4v5vses); + vdes = *(ckt->CKTstate1 + here->BSIM4v5vdes); + + qdef = *(ckt->CKTstate1 + here->BSIM4v5qdef); + } + else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM4v5off) + { vds = model->BSIM4v5type * here->BSIM4v5icVDS; + vgs = vges = vgms = model->BSIM4v5type * here->BSIM4v5icVGS; + vbs = vdbs = vsbs = model->BSIM4v5type * here->BSIM4v5icVBS; + if (vds > 0.0) + { vdes = vds + 0.01; + vses = -0.01; + } + else if (vds < 0.0) + { vdes = vds - 0.01; + vses = 0.01; + } + else + vdes = vses = 0.0; + + qdef = 0.0; + + if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && + ((ckt->CKTmode & (MODETRAN | MODEAC|MODEDCOP | + MODEDCTRANCURVE)) || (!(ckt->CKTmode & MODEUIC)))) + { vds = 0.1; + vdes = 0.11; + vses = -0.01; + vgs = vges = vgms = model->BSIM4v5type + * here->BSIM4v5vth0 + 0.1; + vbs = vdbs = vsbs = 0.0; + } + } + else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && + (here->BSIM4v5off)) + { vds = vgs = vbs = vges = vgms = 0.0; + vdbs = vsbs = vdes = vses = qdef = 0.0; + } + else + { +#ifndef PREDICTOR + if ((ckt->CKTmode & MODEINITPRED)) + { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; + *(ckt->CKTstate0 + here->BSIM4v5vds) = + *(ckt->CKTstate1 + here->BSIM4v5vds); + vds = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vds)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vds))); + *(ckt->CKTstate0 + here->BSIM4v5vgs) = + *(ckt->CKTstate1 + here->BSIM4v5vgs); + vgs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vgs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vgs))); + *(ckt->CKTstate0 + here->BSIM4v5vges) = + *(ckt->CKTstate1 + here->BSIM4v5vges); + vges = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vges)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vges))); + *(ckt->CKTstate0 + here->BSIM4v5vgms) = + *(ckt->CKTstate1 + here->BSIM4v5vgms); + vgms = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vgms)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vgms))); + *(ckt->CKTstate0 + here->BSIM4v5vbs) = + *(ckt->CKTstate1 + here->BSIM4v5vbs); + vbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vbs))); + *(ckt->CKTstate0 + here->BSIM4v5vbd) = + *(ckt->CKTstate0 + here->BSIM4v5vbs) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + *(ckt->CKTstate0 + here->BSIM4v5vdbs) = + *(ckt->CKTstate1 + here->BSIM4v5vdbs); + vdbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vdbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vdbs))); + *(ckt->CKTstate0 + here->BSIM4v5vdbd) = + *(ckt->CKTstate0 + here->BSIM4v5vdbs) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + *(ckt->CKTstate0 + here->BSIM4v5vsbs) = + *(ckt->CKTstate1 + here->BSIM4v5vsbs); + vsbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vsbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vsbs))); + *(ckt->CKTstate0 + here->BSIM4v5vses) = + *(ckt->CKTstate1 + here->BSIM4v5vses); + vses = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vses)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vses))); + *(ckt->CKTstate0 + here->BSIM4v5vdes) = + *(ckt->CKTstate1 + here->BSIM4v5vdes); + vdes = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5vdes)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM4v5vdes))); + + *(ckt->CKTstate0 + here->BSIM4v5qdef) = + *(ckt->CKTstate1 + here->BSIM4v5qdef); + qdef = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM4v5qdef)) + -(xfact * (*(ckt->CKTstate2 + here->BSIM4v5qdef))); + } + else + { +#endif /* PREDICTOR */ + vds = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5dNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vgs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5gNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vbs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5bNodePrime) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vges = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5gNodeExt) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vgms = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5gNodeMid) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vdbs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5dbNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vsbs = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5sbNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vses = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5sNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + vdes = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5dNode) + - *(ckt->CKTrhsOld + here->BSIM4v5sNodePrime)); + qdef = model->BSIM4v5type + * (*(ckt->CKTrhsOld + here->BSIM4v5qNode)); +#ifndef PREDICTOR + } +#endif /* PREDICTOR */ + + vgdo = *(ckt->CKTstate0 + here->BSIM4v5vgs) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + vgedo = *(ckt->CKTstate0 + here->BSIM4v5vges) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + vgmdo = *(ckt->CKTstate0 + here->BSIM4v5vgms) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + + vbd = vbs - vds; + vdbd = vdbs - vds; + vgd = vgs - vds; + vged = vges - vds; + vgmd = vgms - vds; + + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v5vbd); + delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v5vdbd); + delvgd = vgd - vgdo; + delvged = vged - vgedo; + delvgmd = vgmd - vgmdo; + + delvds = vds - *(ckt->CKTstate0 + here->BSIM4v5vds); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v5vgs); + delvges = vges - *(ckt->CKTstate0 + here->BSIM4v5vges); + delvgms = vgms - *(ckt->CKTstate0 + here->BSIM4v5vgms); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v5vbs); + delvdbs = vdbs - *(ckt->CKTstate0 + here->BSIM4v5vdbs); + delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v5vsbs); + + delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v5vses)); + vdedo = *(ckt->CKTstate0 + here->BSIM4v5vdes) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v5vdes); + delvded = vdes - vds - vdedo; + + delvbd_jct = (!here->BSIM4v5rbodyMod) ? delvbd : delvdbd; + delvbs_jct = (!here->BSIM4v5rbodyMod) ? delvbs : delvsbs; + if (here->BSIM4v5mode >= 0) + { Idtot = here->BSIM4v5cd + here->BSIM4v5csub - here->BSIM4v5cbd + + here->BSIM4v5Igidl; + cdhat = Idtot - here->BSIM4v5gbd * delvbd_jct + + (here->BSIM4v5gmbs + here->BSIM4v5gbbs + here->BSIM4v5ggidlb) * delvbs + + (here->BSIM4v5gm + here->BSIM4v5gbgs + here->BSIM4v5ggidlg) * delvgs + + (here->BSIM4v5gds + here->BSIM4v5gbds + here->BSIM4v5ggidld) * delvds; + Ibtot = here->BSIM4v5cbs + here->BSIM4v5cbd + - here->BSIM4v5Igidl - here->BSIM4v5Igisl - here->BSIM4v5csub; + cbhat = Ibtot + here->BSIM4v5gbd * delvbd_jct + + here->BSIM4v5gbs * delvbs_jct - (here->BSIM4v5gbbs + here->BSIM4v5ggidlb) + * delvbs - (here->BSIM4v5gbgs + here->BSIM4v5ggidlg) * delvgs + - (here->BSIM4v5gbds + here->BSIM4v5ggidld - here->BSIM4v5ggisls) * delvds + - here->BSIM4v5ggislg * delvgd - here->BSIM4v5ggislb* delvbd; + + Igstot = here->BSIM4v5Igs + here->BSIM4v5Igcs; + cgshat = Igstot + (here->BSIM4v5gIgsg + here->BSIM4v5gIgcsg) * delvgs + + here->BSIM4v5gIgcsd * delvds + here->BSIM4v5gIgcsb * delvbs; + + Igdtot = here->BSIM4v5Igd + here->BSIM4v5Igcd; + cgdhat = Igdtot + here->BSIM4v5gIgdg * delvgd + here->BSIM4v5gIgcdg * delvgs + + here->BSIM4v5gIgcdd * delvds + here->BSIM4v5gIgcdb * delvbs; + + Igbtot = here->BSIM4v5Igb; + cgbhat = here->BSIM4v5Igb + here->BSIM4v5gIgbg * delvgs + here->BSIM4v5gIgbd + * delvds + here->BSIM4v5gIgbb * delvbs; + } + else + { Idtot = here->BSIM4v5cd + here->BSIM4v5cbd - here->BSIM4v5Igidl; /* bugfix */ + cdhat = Idtot + here->BSIM4v5gbd * delvbd_jct + here->BSIM4v5gmbs + * delvbd + here->BSIM4v5gm * delvgd + - (here->BSIM4v5gds + here->BSIM4v5ggidls) * delvds + - here->BSIM4v5ggidlg * delvgs - here->BSIM4v5ggidlb * delvbs; + Ibtot = here->BSIM4v5cbs + here->BSIM4v5cbd + - here->BSIM4v5Igidl - here->BSIM4v5Igisl - here->BSIM4v5csub; + cbhat = Ibtot + here->BSIM4v5gbs * delvbs_jct + here->BSIM4v5gbd + * delvbd_jct - (here->BSIM4v5gbbs + here->BSIM4v5ggislb) * delvbd + - (here->BSIM4v5gbgs + here->BSIM4v5ggislg) * delvgd + + (here->BSIM4v5gbds + here->BSIM4v5ggisld - here->BSIM4v5ggidls) * delvds + - here->BSIM4v5ggidlg * delvgs - here->BSIM4v5ggidlb * delvbs; + + Igstot = here->BSIM4v5Igs + here->BSIM4v5Igcd; + cgshat = Igstot + here->BSIM4v5gIgsg * delvgs + here->BSIM4v5gIgcdg * delvgd + - here->BSIM4v5gIgcdd * delvds + here->BSIM4v5gIgcdb * delvbd; + + Igdtot = here->BSIM4v5Igd + here->BSIM4v5Igcs; + cgdhat = Igdtot + (here->BSIM4v5gIgdg + here->BSIM4v5gIgcsg) * delvgd + - here->BSIM4v5gIgcsd * delvds + here->BSIM4v5gIgcsb * delvbd; + + Igbtot = here->BSIM4v5Igb; + cgbhat = here->BSIM4v5Igb + here->BSIM4v5gIgbg * delvgd - here->BSIM4v5gIgbd + * delvds + here->BSIM4v5gIgbb * delvbd; + } + + Isestot = here->BSIM4v5gstot * (*(ckt->CKTstate0 + here->BSIM4v5vses)); + cseshat = Isestot + here->BSIM4v5gstot * delvses + + here->BSIM4v5gstotd * delvds + here->BSIM4v5gstotg * delvgs + + here->BSIM4v5gstotb * delvbs; + + Idedtot = here->BSIM4v5gdtot * vdedo; + cdedhat = Idedtot + here->BSIM4v5gdtot * delvded + + here->BSIM4v5gdtotd * delvds + here->BSIM4v5gdtotg * delvgs + + here->BSIM4v5gdtotb * delvbs; + + +#ifndef NOBYPASS + /* Following should be one IF statement, but some C compilers + * can't handle that all at once, so we split it into several + * successive IF's */ + + if ((!(ckt->CKTmode & MODEINITPRED)) && (ckt->CKTbypass)) + if ((fabs(delvds) < (ckt->CKTreltol * MAX(fabs(vds), + fabs(*(ckt->CKTstate0 + here->BSIM4v5vds))) + ckt->CKTvoltTol))) + if ((fabs(delvgs) < (ckt->CKTreltol * MAX(fabs(vgs), + fabs(*(ckt->CKTstate0 + here->BSIM4v5vgs))) + ckt->CKTvoltTol))) + if ((fabs(delvbs) < (ckt->CKTreltol * MAX(fabs(vbs), + fabs(*(ckt->CKTstate0 + here->BSIM4v5vbs))) + ckt->CKTvoltTol))) + if ((fabs(delvbd) < (ckt->CKTreltol * MAX(fabs(vbd), + fabs(*(ckt->CKTstate0 + here->BSIM4v5vbd))) + ckt->CKTvoltTol))) + if ((here->BSIM4v5rgateMod == 0) || (here->BSIM4v5rgateMod == 1) + || (fabs(delvges) < (ckt->CKTreltol * MAX(fabs(vges), + fabs(*(ckt->CKTstate0 + here->BSIM4v5vges))) + ckt->CKTvoltTol))) + if ((here->BSIM4v5rgateMod != 3) || (fabs(delvgms) < (ckt->CKTreltol + * MAX(fabs(vgms), fabs(*(ckt->CKTstate0 + here->BSIM4v5vgms))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v5rbodyMod) || (fabs(delvdbs) < (ckt->CKTreltol + * MAX(fabs(vdbs), fabs(*(ckt->CKTstate0 + here->BSIM4v5vdbs))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v5rbodyMod) || (fabs(delvdbd) < (ckt->CKTreltol + * MAX(fabs(vdbd), fabs(*(ckt->CKTstate0 + here->BSIM4v5vdbd))) + + ckt->CKTvoltTol))) + if ((!here->BSIM4v5rbodyMod) || (fabs(delvsbs) < (ckt->CKTreltol + * MAX(fabs(vsbs), fabs(*(ckt->CKTstate0 + here->BSIM4v5vsbs))) + + ckt->CKTvoltTol))) + if ((!model->BSIM4v5rdsMod) || (fabs(delvses) < (ckt->CKTreltol + * MAX(fabs(vses), fabs(*(ckt->CKTstate0 + here->BSIM4v5vses))) + + ckt->CKTvoltTol))) + if ((!model->BSIM4v5rdsMod) || (fabs(delvdes) < (ckt->CKTreltol + * MAX(fabs(vdes), fabs(*(ckt->CKTstate0 + here->BSIM4v5vdes))) + + ckt->CKTvoltTol))) + if ((fabs(cdhat - Idtot) < ckt->CKTreltol + * MAX(fabs(cdhat), fabs(Idtot)) + ckt->CKTabstol)) + if ((fabs(cbhat - Ibtot) < ckt->CKTreltol + * MAX(fabs(cbhat), fabs(Ibtot)) + ckt->CKTabstol)) + if ((!model->BSIM4v5igcMod) || ((fabs(cgshat - Igstot) < ckt->CKTreltol + * MAX(fabs(cgshat), fabs(Igstot)) + ckt->CKTabstol))) + if ((!model->BSIM4v5igcMod) || ((fabs(cgdhat - Igdtot) < ckt->CKTreltol + * MAX(fabs(cgdhat), fabs(Igdtot)) + ckt->CKTabstol))) + if ((!model->BSIM4v5igbMod) || ((fabs(cgbhat - Igbtot) < ckt->CKTreltol + * MAX(fabs(cgbhat), fabs(Igbtot)) + ckt->CKTabstol))) + if ((!model->BSIM4v5rdsMod) || ((fabs(cseshat - Isestot) < ckt->CKTreltol + * MAX(fabs(cseshat), fabs(Isestot)) + ckt->CKTabstol))) + if ((!model->BSIM4v5rdsMod) || ((fabs(cdedhat - Idedtot) < ckt->CKTreltol + * MAX(fabs(cdedhat), fabs(Idedtot)) + ckt->CKTabstol))) + { vds = *(ckt->CKTstate0 + here->BSIM4v5vds); + vgs = *(ckt->CKTstate0 + here->BSIM4v5vgs); + vbs = *(ckt->CKTstate0 + here->BSIM4v5vbs); + vges = *(ckt->CKTstate0 + here->BSIM4v5vges); + vgms = *(ckt->CKTstate0 + here->BSIM4v5vgms); + + vbd = *(ckt->CKTstate0 + here->BSIM4v5vbd); + vdbs = *(ckt->CKTstate0 + here->BSIM4v5vdbs); + vdbd = *(ckt->CKTstate0 + here->BSIM4v5vdbd); + vsbs = *(ckt->CKTstate0 + here->BSIM4v5vsbs); + vses = *(ckt->CKTstate0 + here->BSIM4v5vses); + vdes = *(ckt->CKTstate0 + here->BSIM4v5vdes); + + vgd = vgs - vds; + vgb = vgs - vbs; + vged = vges - vds; + vgmd = vgms - vds; + vgmb = vgms - vbs; + + vbs_jct = (!here->BSIM4v5rbodyMod) ? vbs : vsbs; + vbd_jct = (!here->BSIM4v5rbodyMod) ? vbd : vdbd; + +/*** qdef should not be kept fixed even if vgs, vds & vbs has converged +**** qdef = *(ckt->CKTstate0 + here->BSIM4v5qdef); +***/ + cdrain = here->BSIM4v5cd; + + if ((ckt->CKTmode & (MODETRAN | MODEAC)) || + ((ckt->CKTmode & MODETRANOP) && + (ckt->CKTmode & MODEUIC))) + { ByPass = 1; + + qgate = here->BSIM4v5qgate; + qbulk = here->BSIM4v5qbulk; + qdrn = here->BSIM4v5qdrn; + cgdo = here->BSIM4v5cgdo; + qgdo = here->BSIM4v5qgdo; + cgso = here->BSIM4v5cgso; + qgso = here->BSIM4v5qgso; + + goto line755; + } + else + goto line850; + } +#endif /*NOBYPASS*/ + + von = here->BSIM4v5von; + if (*(ckt->CKTstate0 + here->BSIM4v5vds) >= 0.0) + { vgs = DEVfetlim(vgs, *(ckt->CKTstate0 + here->BSIM4v5vgs), von); + vds = vgs - vgd; + vds = DEVlimvds(vds, *(ckt->CKTstate0 + here->BSIM4v5vds)); + vgd = vgs - vds; + if (here->BSIM4v5rgateMod == 3) + { vges = DEVfetlim(vges, *(ckt->CKTstate0 + here->BSIM4v5vges), von); + vgms = DEVfetlim(vgms, *(ckt->CKTstate0 + here->BSIM4v5vgms), von); + vged = vges - vds; + vgmd = vgms - vds; + } + else if ((here->BSIM4v5rgateMod == 1) || (here->BSIM4v5rgateMod == 2)) + { vges = DEVfetlim(vges, *(ckt->CKTstate0 + here->BSIM4v5vges), von); + vged = vges - vds; + } + + if (model->BSIM4v5rdsMod) + { vdes = DEVlimvds(vdes, *(ckt->CKTstate0 + here->BSIM4v5vdes)); + vses = -DEVlimvds(-vses, -(*(ckt->CKTstate0 + here->BSIM4v5vses))); + } + + } + else + { vgd = DEVfetlim(vgd, vgdo, von); + vds = vgs - vgd; + vds = -DEVlimvds(-vds, -(*(ckt->CKTstate0 + here->BSIM4v5vds))); + vgs = vgd + vds; + + if (here->BSIM4v5rgateMod == 3) + { vged = DEVfetlim(vged, vgedo, von); + vges = vged + vds; + vgmd = DEVfetlim(vgmd, vgmdo, von); + vgms = vgmd + vds; + } + if ((here->BSIM4v5rgateMod == 1) || (here->BSIM4v5rgateMod == 2)) + { vged = DEVfetlim(vged, vgedo, von); + vges = vged + vds; + } + + if (model->BSIM4v5rdsMod) + { vdes = -DEVlimvds(-vdes, -(*(ckt->CKTstate0 + here->BSIM4v5vdes))); + vses = DEVlimvds(vses, *(ckt->CKTstate0 + here->BSIM4v5vses)); + } + } + + if (vds >= 0.0) + { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM4v5vbs), + CONSTvt0, model->BSIM4v5vcrit, &Check); + vbd = vbs - vds; + if (here->BSIM4v5rbodyMod) + { vdbs = DEVpnjlim(vdbs, *(ckt->CKTstate0 + here->BSIM4v5vdbs), + CONSTvt0, model->BSIM4v5vcrit, &Check1); + vdbd = vdbs - vds; + vsbs = DEVpnjlim(vsbs, *(ckt->CKTstate0 + here->BSIM4v5vsbs), + CONSTvt0, model->BSIM4v5vcrit, &Check2); + if ((Check1 == 0) && (Check2 == 0)) + Check = 0; + else + Check = 1; + } + } + else + { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM4v5vbd), + CONSTvt0, model->BSIM4v5vcrit, &Check); + vbs = vbd + vds; + if (here->BSIM4v5rbodyMod) + { vdbd = DEVpnjlim(vdbd, *(ckt->CKTstate0 + here->BSIM4v5vdbd), + CONSTvt0, model->BSIM4v5vcrit, &Check1); + vdbs = vdbd + vds; + vsbdo = *(ckt->CKTstate0 + here->BSIM4v5vsbs) + - *(ckt->CKTstate0 + here->BSIM4v5vds); + vsbd = vsbs - vds; + vsbd = DEVpnjlim(vsbd, vsbdo, CONSTvt0, model->BSIM4v5vcrit, &Check2); + vsbs = vsbd + vds; + if ((Check1 == 0) && (Check2 == 0)) + Check = 0; + else + Check = 1; + } + } + } + + /* Calculate DC currents and their derivatives */ + vbd = vbs - vds; + vgd = vgs - vds; + vgb = vgs - vbs; + vged = vges - vds; + vgmd = vgms - vds; + vgmb = vgms - vbs; + vdbd = vdbs - vds; + + vbs_jct = (!here->BSIM4v5rbodyMod) ? vbs : vsbs; + vbd_jct = (!here->BSIM4v5rbodyMod) ? vbd : vdbd; + + /* Source/drain junction diode DC model begins */ + Nvtms = model->BSIM4v5vtm * model->BSIM4v5SjctEmissionCoeff; + if ((here->BSIM4v5Aseff <= 0.0) && (here->BSIM4v5Pseff <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM4v5Aseff * model->BSIM4v5SjctTempSatCurDensity + + here->BSIM4v5Pseff * model->BSIM4v5SjctSidewallTempSatCurDensity + + pParam->BSIM4v5weffCJ * here->BSIM4v5nf + * model->BSIM4v5SjctGateSidewallTempSatCurDensity; + } + + if (SourceSatCurrent <= 0.0) + { here->BSIM4v5gbs = ckt->CKTgmin; + here->BSIM4v5cbs = here->BSIM4v5gbs * vbs_jct; + } + else + { switch(model->BSIM4v5dioMod) + { case 0: + evbs = exp(vbs_jct / Nvtms); + T1 = model->BSIM4v5xjbvs * exp(-(model->BSIM4v5bvs + vbs_jct) / Nvtms); + /* WDLiu: Magic T1 in this form; different from BSIM4v5 beta. */ + here->BSIM4v5gbs = SourceSatCurrent * (evbs + T1) / Nvtms + ckt->CKTgmin; + here->BSIM4v5cbs = SourceSatCurrent * (evbs + here->BSIM4v5XExpBVS + - T1 - 1.0) + ckt->CKTgmin * vbs_jct; + break; + case 1: + T2 = vbs_jct / Nvtms; + if (T2 < -EXP_THRESHOLD) + { here->BSIM4v5gbs = ckt->CKTgmin; + here->BSIM4v5cbs = SourceSatCurrent * (MIN_EXP - 1.0) + + ckt->CKTgmin * vbs_jct; + } + else if (vbs_jct <= here->BSIM4v5vjsmFwd) + { evbs = exp(T2); + here->BSIM4v5gbs = SourceSatCurrent * evbs / Nvtms + ckt->CKTgmin; + here->BSIM4v5cbs = SourceSatCurrent * (evbs - 1.0) + + ckt->CKTgmin * vbs_jct; + } + else + { T0 = here->BSIM4v5IVjsmFwd / Nvtms; + here->BSIM4v5gbs = T0 + ckt->CKTgmin; + here->BSIM4v5cbs = here->BSIM4v5IVjsmFwd - SourceSatCurrent + T0 + * (vbs_jct - here->BSIM4v5vjsmFwd) + ckt->CKTgmin * vbs_jct; + } + break; + case 2: + if (vbs_jct < here->BSIM4v5vjsmRev) + { T0 = vbs_jct / Nvtms; + if (T0 < -EXP_THRESHOLD) + { evbs = MIN_EXP; + devbs_dvb = 0.0; + } + else + { evbs = exp(T0); + devbs_dvb = evbs / Nvtms; + } + + T1 = evbs - 1.0; + T2 = here->BSIM4v5IVjsmRev + here->BSIM4v5SslpRev + * (vbs_jct - here->BSIM4v5vjsmRev); + here->BSIM4v5gbs = devbs_dvb * T2 + T1 * here->BSIM4v5SslpRev + ckt->CKTgmin; + here->BSIM4v5cbs = T1 * T2 + ckt->CKTgmin * vbs_jct; + } + else if (vbs_jct <= here->BSIM4v5vjsmFwd) + { T0 = vbs_jct / Nvtms; + if (T0 < -EXP_THRESHOLD) + { evbs = MIN_EXP; + devbs_dvb = 0.0; + } + else + { evbs = exp(T0); + devbs_dvb = evbs / Nvtms; + } + + T1 = (model->BSIM4v5bvs + vbs_jct) / Nvtms; + if (T1 > EXP_THRESHOLD) + { T2 = MIN_EXP; + T3 = 0.0; + } + else + { T2 = exp(-T1); + T3 = -T2 /Nvtms; + } + here->BSIM4v5gbs = SourceSatCurrent * (devbs_dvb - model->BSIM4v5xjbvs * T3) + + ckt->CKTgmin; + here->BSIM4v5cbs = SourceSatCurrent * (evbs + here->BSIM4v5XExpBVS - 1.0 + - model->BSIM4v5xjbvs * T2) + ckt->CKTgmin * vbs_jct; + } + else + { here->BSIM4v5gbs = here->BSIM4v5SslpFwd + ckt->CKTgmin; + here->BSIM4v5cbs = here->BSIM4v5IVjsmFwd + here->BSIM4v5SslpFwd * (vbs_jct + - here->BSIM4v5vjsmFwd) + ckt->CKTgmin * vbs_jct; + } + break; + default: break; + } + } + + Nvtmd = model->BSIM4v5vtm * model->BSIM4v5DjctEmissionCoeff; + if ((here->BSIM4v5Adeff <= 0.0) && (here->BSIM4v5Pdeff <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM4v5Adeff * model->BSIM4v5DjctTempSatCurDensity + + here->BSIM4v5Pdeff * model->BSIM4v5DjctSidewallTempSatCurDensity + + pParam->BSIM4v5weffCJ * here->BSIM4v5nf + * model->BSIM4v5DjctGateSidewallTempSatCurDensity; + } + + if (DrainSatCurrent <= 0.0) + { here->BSIM4v5gbd = ckt->CKTgmin; + here->BSIM4v5cbd = here->BSIM4v5gbd * vbd_jct; + } + else + { switch(model->BSIM4v5dioMod) + { case 0: + evbd = exp(vbd_jct / Nvtmd); + T1 = model->BSIM4v5xjbvd * exp(-(model->BSIM4v5bvd + vbd_jct) / Nvtmd); + /* WDLiu: Magic T1 in this form; different from BSIM4v5 beta. */ + here->BSIM4v5gbd = DrainSatCurrent * (evbd + T1) / Nvtmd + ckt->CKTgmin; + here->BSIM4v5cbd = DrainSatCurrent * (evbd + here->BSIM4v5XExpBVD + - T1 - 1.0) + ckt->CKTgmin * vbd_jct; + break; + case 1: + T2 = vbd_jct / Nvtmd; + if (T2 < -EXP_THRESHOLD) + { here->BSIM4v5gbd = ckt->CKTgmin; + here->BSIM4v5cbd = DrainSatCurrent * (MIN_EXP - 1.0) + + ckt->CKTgmin * vbd_jct; + } + else if (vbd_jct <= here->BSIM4v5vjdmFwd) + { evbd = exp(T2); + here->BSIM4v5gbd = DrainSatCurrent * evbd / Nvtmd + ckt->CKTgmin; + here->BSIM4v5cbd = DrainSatCurrent * (evbd - 1.0) + + ckt->CKTgmin * vbd_jct; + } + else + { T0 = here->BSIM4v5IVjdmFwd / Nvtmd; + here->BSIM4v5gbd = T0 + ckt->CKTgmin; + here->BSIM4v5cbd = here->BSIM4v5IVjdmFwd - DrainSatCurrent + T0 + * (vbd_jct - here->BSIM4v5vjdmFwd) + ckt->CKTgmin * vbd_jct; + } + break; + case 2: + if (vbd_jct < here->BSIM4v5vjdmRev) + { T0 = vbd_jct / Nvtmd; + if (T0 < -EXP_THRESHOLD) + { evbd = MIN_EXP; + devbd_dvb = 0.0; + } + else + { evbd = exp(T0); + devbd_dvb = evbd / Nvtmd; + } + + T1 = evbd - 1.0; + T2 = here->BSIM4v5IVjdmRev + here->BSIM4v5DslpRev + * (vbd_jct - here->BSIM4v5vjdmRev); + here->BSIM4v5gbd = devbd_dvb * T2 + T1 * here->BSIM4v5DslpRev + ckt->CKTgmin; + here->BSIM4v5cbd = T1 * T2 + ckt->CKTgmin * vbd_jct; + } + else if (vbd_jct <= here->BSIM4v5vjdmFwd) + { T0 = vbd_jct / Nvtmd; + if (T0 < -EXP_THRESHOLD) + { evbd = MIN_EXP; + devbd_dvb = 0.0; + } + else + { evbd = exp(T0); + devbd_dvb = evbd / Nvtmd; + } + + T1 = (model->BSIM4v5bvd + vbd_jct) / Nvtmd; + if (T1 > EXP_THRESHOLD) + { T2 = MIN_EXP; + T3 = 0.0; + } + else + { T2 = exp(-T1); + T3 = -T2 /Nvtmd; + } + here->BSIM4v5gbd = DrainSatCurrent * (devbd_dvb - model->BSIM4v5xjbvd * T3) + + ckt->CKTgmin; + here->BSIM4v5cbd = DrainSatCurrent * (evbd + here->BSIM4v5XExpBVD - 1.0 + - model->BSIM4v5xjbvd * T2) + ckt->CKTgmin * vbd_jct; + } + else + { here->BSIM4v5gbd = here->BSIM4v5DslpFwd + ckt->CKTgmin; + here->BSIM4v5cbd = here->BSIM4v5IVjdmFwd + here->BSIM4v5DslpFwd * (vbd_jct + - here->BSIM4v5vjdmFwd) + ckt->CKTgmin * vbd_jct; + } + break; + default: break; + } + } + + /* trap-assisted tunneling and recombination current for reverse bias */ + Nvtmrssw = model->BSIM4v5vtm0 * model->BSIM4v5njtsswtemp; + Nvtmrsswg = model->BSIM4v5vtm0 * model->BSIM4v5njtsswgtemp; + Nvtmrs = model->BSIM4v5vtm0 * model->BSIM4v5njtstemp; + + if ((model->BSIM4v5vtss - vbs_jct) < (model->BSIM4v5vtss * 1e-3)) + { T9 = 1.0e3; + T0 = - vbs_jct / Nvtmrs * T9; + DEXP(T0, T1, T10); + dT1_dVb = T10 / Nvtmrs * T9; + } else { + T9 = 1.0 / (model->BSIM4v5vtss - vbs_jct); + T0 = -vbs_jct / Nvtmrs * model->BSIM4v5vtss * T9; + dT0_dVb = model->BSIM4v5vtss / Nvtmrs * (T9 + vbs_jct * T9 * T9) ; + DEXP(T0, T1, T10); + dT1_dVb = T10 * dT0_dVb; + } + + if ((model->BSIM4v5vtsd - vbd_jct) < (model->BSIM4v5vtsd * 1e-3) ) + { T9 = 1.0e3; + T0 = -vbd_jct / Nvtmrs * T9; + DEXP(T0, T2, T10); + dT2_dVb = T10 / Nvtmrs * T9; + } else { + T9 = 1.0 / (model->BSIM4v5vtsd - vbd_jct); + T0 = -vbd_jct / Nvtmrs * model->BSIM4v5vtsd * T9; + dT0_dVb = model->BSIM4v5vtsd / Nvtmrs * (T9 + vbd_jct * T9 * T9) ; + DEXP(T0, T2, T10); + dT2_dVb = T10 * dT0_dVb; + } + + if ((model->BSIM4v5vtssws - vbs_jct) < (model->BSIM4v5vtssws * 1e-3) ) + { T9 = 1.0e3; + T0 = -vbs_jct / Nvtmrssw * T9; + DEXP(T0, T3, T10); + dT3_dVb = T10 / Nvtmrssw * T9; + } else { + T9 = 1.0 / (model->BSIM4v5vtssws - vbs_jct); + T0 = -vbs_jct / Nvtmrssw * model->BSIM4v5vtssws * T9; + dT0_dVb = model->BSIM4v5vtssws / Nvtmrssw * (T9 + vbs_jct * T9 * T9) ; + DEXP(T0, T3, T10); + dT3_dVb = T10 * dT0_dVb; + } + + if ((model->BSIM4v5vtsswd - vbd_jct) < (model->BSIM4v5vtsswd * 1e-3) ) + { T9 = 1.0e3; + T0 = -vbd_jct / Nvtmrssw * T9; + DEXP(T0, T4, T10); + dT4_dVb = T10 / Nvtmrssw * T9; + } else { + T9 = 1.0 / (model->BSIM4v5vtsswd - vbd_jct); + T0 = -vbd_jct / Nvtmrssw * model->BSIM4v5vtsswd * T9; + dT0_dVb = model->BSIM4v5vtsswd / Nvtmrssw * (T9 + vbd_jct * T9 * T9) ; + DEXP(T0, T4, T10); + dT4_dVb = T10 * dT0_dVb; + } + + if ((model->BSIM4v5vtsswgs - vbs_jct) < (model->BSIM4v5vtsswgs * 1e-3) ) + { T9 = 1.0e3; + T0 = -vbs_jct / Nvtmrsswg * T9; + DEXP(T0, T5, T10); + dT5_dVb = T10 / Nvtmrsswg * T9; + } else { + T9 = 1.0 / (model->BSIM4v5vtsswgs - vbs_jct); + T0 = -vbs_jct / Nvtmrsswg * model->BSIM4v5vtsswgs * T9; + dT0_dVb = model->BSIM4v5vtsswgs / Nvtmrsswg * (T9 + vbs_jct * T9 * T9) ; + DEXP(T0, T5, T10); + dT5_dVb = T10 * dT0_dVb; + } + + if ((model->BSIM4v5vtsswgd - vbd_jct) < (model->BSIM4v5vtsswgd * 1e-3) ) + { T9 = 1.0e3; + T0 = -vbd_jct / Nvtmrsswg * T9; + DEXP(T0, T6, T10); + dT6_dVb = T10 / Nvtmrsswg * T9; + } else { + T9 = 1.0 / (model->BSIM4v5vtsswgd - vbd_jct); + T0 = -vbd_jct / Nvtmrsswg * model->BSIM4v5vtsswgd * T9; + dT0_dVb = model->BSIM4v5vtsswgd / Nvtmrsswg * (T9 + vbd_jct * T9 * T9) ; + DEXP(T0, T6, T10); + dT6_dVb = T10 * dT0_dVb; + } + + here->BSIM4v5gbs += here->BSIM4v5SjctTempRevSatCur * dT1_dVb + + here->BSIM4v5SswTempRevSatCur * dT3_dVb + + here->BSIM4v5SswgTempRevSatCur * dT5_dVb; + here->BSIM4v5cbs -= here->BSIM4v5SjctTempRevSatCur * (T1 - 1.0) + + here->BSIM4v5SswTempRevSatCur * (T3 - 1.0) + + here->BSIM4v5SswgTempRevSatCur * (T5 - 1.0); + here->BSIM4v5gbd += here->BSIM4v5DjctTempRevSatCur * dT2_dVb + + here->BSIM4v5DswTempRevSatCur * dT4_dVb + + here->BSIM4v5DswgTempRevSatCur * dT6_dVb; + here->BSIM4v5cbd -= here->BSIM4v5DjctTempRevSatCur * (T2 - 1.0) + + here->BSIM4v5DswTempRevSatCur * (T4 - 1.0) + + here->BSIM4v5DswgTempRevSatCur * (T6 - 1.0); + + /* End of diode DC model */ + + if (vds >= 0.0) + { here->BSIM4v5mode = 1; + Vds = vds; + Vgs = vgs; + Vbs = vbs; + Vdb = vds - vbs; /* WDLiu: for GIDL */ + } + else + { here->BSIM4v5mode = -1; + Vds = -vds; + Vgs = vgd; + Vbs = vbd; + Vdb = -vbs; + } + + T0 = Vbs - here->BSIM4v5vbsc - 0.001; + T1 = sqrt(T0 * T0 - 0.004 * here->BSIM4v5vbsc); + if (T0 >= 0.0) + { Vbseff = here->BSIM4v5vbsc + 0.5 * (T0 + T1); + dVbseff_dVb = 0.5 * (1.0 + T0 / T1); + } + else + { T2 = -0.002 / (T1 - T0); + Vbseff = here->BSIM4v5vbsc * (1.0 + T2); + dVbseff_dVb = T2 * here->BSIM4v5vbsc / T1; + } + + /* JX: Correction to forward body bias */ + T9 = 0.95 * pParam->BSIM4v5phi; + T0 = T9 - Vbseff - 0.001; + T1 = sqrt(T0 * T0 + 0.004 * T9); + Vbseff = T9 - 0.5 * (T0 + T1); + dVbseff_dVb *= 0.5 * (1.0 + T0 / T1); + + Phis = pParam->BSIM4v5phi - Vbseff; + dPhis_dVb = -1.0; + sqrtPhis = sqrt(Phis); + dsqrtPhis_dVb = -0.5 / sqrtPhis; + + Xdep = pParam->BSIM4v5Xdep0 * sqrtPhis / pParam->BSIM4v5sqrtPhi; + dXdep_dVb = (pParam->BSIM4v5Xdep0 / pParam->BSIM4v5sqrtPhi) + * dsqrtPhis_dVb; + + Leff = pParam->BSIM4v5leff; + Vtm = model->BSIM4v5vtm; + Vtm0 = model->BSIM4v5vtm0; + + /* Vth Calculation */ + T3 = sqrt(Xdep); + V0 = pParam->BSIM4v5vbi - pParam->BSIM4v5phi; + + T0 = pParam->BSIM4v5dvt2 * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM4v5dvt2; + } + else + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM4v5dvt2 * T4 * T4; + } + lt1 = model->BSIM4v5factor1 * T3 * T1; + dlt1_dVb = model->BSIM4v5factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM4v5dvt2w * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM4v5dvt2w; + } + else + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM4v5dvt2w * T4 * T4; + } + ltw = model->BSIM4v5factor1 * T3 * T1; + dltw_dVb = model->BSIM4v5factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM4v5dvt1 * Leff / lt1; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + Theta0 = T1 / T4; + dT1_dVb = -T0 * T1 * dlt1_dVb / lt1; + dTheta0_dVb = dT1_dVb * (T4 - 2.0 * T1 * (T2 + MIN_EXP)) / T4 / T4; + } + else + { Theta0 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + dTheta0_dVb = 0.0; + } + here->BSIM4v5thetavth = pParam->BSIM4v5dvt0 * Theta0; + Delt_vth = here->BSIM4v5thetavth * V0; + dDelt_vth_dVb = pParam->BSIM4v5dvt0 * dTheta0_dVb * V0; + + T0 = pParam->BSIM4v5dvt1w * pParam->BSIM4v5weff * Leff / ltw; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T5 = T1 / T4; + dT1_dVb = -T0 * T1 * dltw_dVb / ltw; + dT5_dVb = dT1_dVb * (T4 - 2.0 * T1 * (T2 + MIN_EXP)) / T4 / T4; + } + else + { T5 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + dT5_dVb = 0.0; + } + T0 = pParam->BSIM4v5dvt0w * T5; + T2 = T0 * V0; + dT2_dVb = pParam->BSIM4v5dvt0w * dT5_dVb * V0; + + TempRatio = ckt->CKTtemp / model->BSIM4v5tnom - 1.0; + T0 = sqrt(1.0 + pParam->BSIM4v5lpe0 / Leff); + T1 = pParam->BSIM4v5k1ox * (T0 - 1.0) * pParam->BSIM4v5sqrtPhi + + (pParam->BSIM4v5kt1 + pParam->BSIM4v5kt1l / Leff + + pParam->BSIM4v5kt2 * Vbseff) * TempRatio; + Vth_NarrowW = model->BSIM4v5toxe * pParam->BSIM4v5phi + / (pParam->BSIM4v5weff + pParam->BSIM4v5w0); + + T3 = here->BSIM4v5eta0 + pParam->BSIM4v5etab * Vbseff; + if (T3 < 1.0e-4) + { T9 = 1.0 / (3.0 - 2.0e4 * T3); + T3 = (2.0e-4 - T3) * T9; + T4 = T9 * T9; + } + else + { T4 = 1.0; + } + dDIBL_Sft_dVd = T3 * pParam->BSIM4v5theta0vb0; + DIBL_Sft = dDIBL_Sft_dVd * Vds; + + Lpe_Vb = sqrt(1.0 + pParam->BSIM4v5lpeb / Leff); + + Vth = model->BSIM4v5type * here->BSIM4v5vth0 + (pParam->BSIM4v5k1ox * sqrtPhis + - pParam->BSIM4v5k1 * pParam->BSIM4v5sqrtPhi) * Lpe_Vb + - here->BSIM4v5k2ox * Vbseff - Delt_vth - T2 + (pParam->BSIM4v5k3 + + pParam->BSIM4v5k3b * Vbseff) * Vth_NarrowW + T1 - DIBL_Sft; + + dVth_dVb = Lpe_Vb * pParam->BSIM4v5k1ox * dsqrtPhis_dVb - here->BSIM4v5k2ox + - dDelt_vth_dVb - dT2_dVb + pParam->BSIM4v5k3b * Vth_NarrowW + - pParam->BSIM4v5etab * Vds * pParam->BSIM4v5theta0vb0 * T4 + + pParam->BSIM4v5kt2 * TempRatio; + dVth_dVd = -dDIBL_Sft_dVd; + + + /* Calculate n */ + tmp1 = EPSSI / Xdep; + here->BSIM4v5nstar = model->BSIM4v5vtm / Charge_q * (model->BSIM4v5coxe + + tmp1 + pParam->BSIM4v5cit); + tmp2 = pParam->BSIM4v5nfactor * tmp1; + tmp3 = pParam->BSIM4v5cdsc + pParam->BSIM4v5cdscb * Vbseff + + pParam->BSIM4v5cdscd * Vds; + tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM4v5cit) / model->BSIM4v5coxe; + if (tmp4 >= -0.5) + { n = 1.0 + tmp4; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM4v5cdscb * Theta0) / model->BSIM4v5coxe; + dn_dVd = pParam->BSIM4v5cdscd * Theta0 / model->BSIM4v5coxe; + } + else + { T0 = 1.0 / (3.0 + 8.0 * tmp4); + n = (1.0 + 3.0 * tmp4) * T0; + T0 *= T0; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM4v5cdscb * Theta0) / model->BSIM4v5coxe * T0; + dn_dVd = pParam->BSIM4v5cdscd * Theta0 / model->BSIM4v5coxe * T0; + } + + + /* Vth correction for Pocket implant */ + if (pParam->BSIM4v5dvtp0 > 0.0) + { T0 = -pParam->BSIM4v5dvtp1 * Vds; + if (T0 < -EXP_THRESHOLD) + { T2 = MIN_EXP; + dT2_dVd = 0.0; + } + else + { T2 = exp(T0); + dT2_dVd = -pParam->BSIM4v5dvtp1 * T2; + } + + T3 = Leff + pParam->BSIM4v5dvtp0 * (1.0 + T2); + dT3_dVd = pParam->BSIM4v5dvtp0 * dT2_dVd; + if (model->BSIM4v5tempMod < 2) + { + T4 = Vtm * log(Leff / T3); + dT4_dVd = -Vtm * dT3_dVd / T3; + } + else + { + T4 = model->BSIM4v5vtm0 * log(Leff / T3); + dT4_dVd = -model->BSIM4v5vtm0 * dT3_dVd / T3; + } + dDITS_Sft_dVd = dn_dVd * T4 + n * dT4_dVd; + dDITS_Sft_dVb = T4 * dn_dVb; + + Vth -= n * T4; + dVth_dVd -= dDITS_Sft_dVd; + dVth_dVb -= dDITS_Sft_dVb; + } + here->BSIM4v5von = Vth; + + + /* Poly Gate Si Depletion Effect */ + T0 = here->BSIM4v5vfb + pParam->BSIM4v5phi; + + BSIM4v5polyDepletion(T0, pParam->BSIM4v5ngate, model->BSIM4v5coxe, vgs, &vgs_eff, &dvgs_eff_dvg); + + BSIM4v5polyDepletion(T0, pParam->BSIM4v5ngate, model->BSIM4v5coxe, vgd, &vgd_eff, &dvgd_eff_dvg); + + if(here->BSIM4v5mode>0) { + Vgs_eff = vgs_eff; + dVgs_eff_dVg = dvgs_eff_dvg; + } else { + Vgs_eff = vgd_eff; + dVgs_eff_dVg = dvgd_eff_dvg; + } + here->BSIM4v5vgs_eff = vgs_eff; + here->BSIM4v5vgd_eff = vgd_eff; + here->BSIM4v5dvgs_eff_dvg = dvgs_eff_dvg; + here->BSIM4v5dvgd_eff_dvg = dvgd_eff_dvg; + + + Vgst = Vgs_eff - Vth; + + /* Calculate Vgsteff */ + T0 = n * Vtm; + T1 = pParam->BSIM4v5mstar * Vgst; + T2 = T1 / T0; + if (T2 > EXP_THRESHOLD) + { T10 = T1; + dT10_dVg = pParam->BSIM4v5mstar * dVgs_eff_dVg; + dT10_dVd = -dVth_dVd * pParam->BSIM4v5mstar; + dT10_dVb = -dVth_dVb * pParam->BSIM4v5mstar; + } + else if (T2 < -EXP_THRESHOLD) + { T10 = Vtm * log(1.0 + MIN_EXP); + dT10_dVg = 0.0; + dT10_dVd = T10 * dn_dVd; + dT10_dVb = T10 * dn_dVb; + T10 *= n; + } + else + { ExpVgst = exp(T2); + T3 = Vtm * log(1.0 + ExpVgst); + T10 = n * T3; + dT10_dVg = pParam->BSIM4v5mstar * ExpVgst / (1.0 + ExpVgst); + dT10_dVb = T3 * dn_dVb - dT10_dVg * (dVth_dVb + Vgst * dn_dVb / n); + dT10_dVd = T3 * dn_dVd - dT10_dVg * (dVth_dVd + Vgst * dn_dVd / n); + dT10_dVg *= dVgs_eff_dVg; + } + + T1 = pParam->BSIM4v5voffcbn - (1.0 - pParam->BSIM4v5mstar) * Vgst; + T2 = T1 / T0; + if (T2 < -EXP_THRESHOLD) + { T3 = model->BSIM4v5coxe * MIN_EXP / pParam->BSIM4v5cdep0; + T9 = pParam->BSIM4v5mstar + T3 * n; + dT9_dVg = 0.0; + dT9_dVd = dn_dVd * T3; + dT9_dVb = dn_dVb * T3; + } + else if (T2 > EXP_THRESHOLD) + { T3 = model->BSIM4v5coxe * MAX_EXP / pParam->BSIM4v5cdep0; + T9 = pParam->BSIM4v5mstar + T3 * n; + dT9_dVg = 0.0; + dT9_dVd = dn_dVd * T3; + dT9_dVb = dn_dVb * T3; + } + else + { ExpVgst = exp(T2); + T3 = model->BSIM4v5coxe / pParam->BSIM4v5cdep0; + T4 = T3 * ExpVgst; + T5 = T1 * T4 / T0; + T9 = pParam->BSIM4v5mstar + n * T4; + dT9_dVg = T3 * (pParam->BSIM4v5mstar - 1.0) * ExpVgst / Vtm; + dT9_dVb = T4 * dn_dVb - dT9_dVg * dVth_dVb - T5 * dn_dVb; + dT9_dVd = T4 * dn_dVd - dT9_dVg * dVth_dVd - T5 * dn_dVd; + dT9_dVg *= dVgs_eff_dVg; + } + + here->BSIM4v5Vgsteff = Vgsteff = T10 / T9; + T11 = T9 * T9; + dVgsteff_dVg = (T9 * dT10_dVg - T10 * dT9_dVg) / T11; + dVgsteff_dVd = (T9 * dT10_dVd - T10 * dT9_dVd) / T11; + dVgsteff_dVb = (T9 * dT10_dVb - T10 * dT9_dVb) / T11; + + /* Calculate Effective Channel Geometry */ + T9 = sqrtPhis - pParam->BSIM4v5sqrtPhi; + Weff = pParam->BSIM4v5weff - 2.0 * (pParam->BSIM4v5dwg * Vgsteff + + pParam->BSIM4v5dwb * T9); + dWeff_dVg = -2.0 * pParam->BSIM4v5dwg; + dWeff_dVb = -2.0 * pParam->BSIM4v5dwb * dsqrtPhis_dVb; + + if (Weff < 2.0e-8) /* to avoid the discontinuity problem due to Weff*/ + { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); + Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; + T0 *= T0 * 4.0e-16; + dWeff_dVg *= T0; + dWeff_dVb *= T0; + } + + if (model->BSIM4v5rdsMod == 1) + Rds = dRds_dVg = dRds_dVb = 0.0; + else + { T0 = 1.0 + pParam->BSIM4v5prwg * Vgsteff; + dT0_dVg = -pParam->BSIM4v5prwg / T0 / T0; + T1 = pParam->BSIM4v5prwb * T9; + dT1_dVb = pParam->BSIM4v5prwb * dsqrtPhis_dVb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); /* 0.01 = 4.0 * 0.05 * 0.05 */ + dT3_dVg = 1.0 + T2 / (T3 - T2); + dT3_dVb = dT3_dVg * dT1_dVb; + dT3_dVg *= dT0_dVg; + + T4 = pParam->BSIM4v5rds0 * 0.5; + Rds = pParam->BSIM4v5rdswmin + T3 * T4; + dRds_dVg = T4 * dT3_dVg; + dRds_dVb = T4 * dT3_dVb; + + if (Rds > 0.0) + here->BSIM4v5grdsw = 1.0 / Rds; + else + here->BSIM4v5grdsw = 0.0; + } + + /* Calculate Abulk */ + T9 = 0.5 * pParam->BSIM4v5k1ox * Lpe_Vb / sqrtPhis; + T1 = T9 + here->BSIM4v5k2ox - pParam->BSIM4v5k3b * Vth_NarrowW; + dT1_dVb = -T9 / sqrtPhis * dsqrtPhis_dVb; + + T9 = sqrt(pParam->BSIM4v5xj * Xdep); + tmp1 = Leff + 2.0 * T9; + T5 = Leff / tmp1; + tmp2 = pParam->BSIM4v5a0 * T5; + tmp3 = pParam->BSIM4v5weff + pParam->BSIM4v5b1; + tmp4 = pParam->BSIM4v5b0 / tmp3; + T2 = tmp2 + tmp4; + dT2_dVb = -T9 / tmp1 / Xdep * dXdep_dVb; + T6 = T5 * T5; + T7 = T5 * T6; + + Abulk0 = 1.0 + T1 * T2; + dAbulk0_dVb = T1 * tmp2 * dT2_dVb + T2 * dT1_dVb; + + T8 = pParam->BSIM4v5ags * pParam->BSIM4v5a0 * T7; + dAbulk_dVg = -T1 * T8; + Abulk = Abulk0 + dAbulk_dVg * Vgsteff; + dAbulk_dVb = dAbulk0_dVb - T8 * Vgsteff * (dT1_dVb + + 3.0 * T1 * dT2_dVb); + + if (Abulk0 < 0.1) /* added to avoid the problems caused by Abulk0 */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk0); + Abulk0 = (0.2 - Abulk0) * T9; + dAbulk0_dVb *= T9 * T9; + } + + if (Abulk < 0.1) + { T9 = 1.0 / (3.0 - 20.0 * Abulk); + Abulk = (0.2 - Abulk) * T9; + T10 = T9 * T9; + dAbulk_dVb *= T10; + dAbulk_dVg *= T10; + } + here->BSIM4v5Abulk = Abulk; + + T2 = pParam->BSIM4v5keta * Vbseff; + if (T2 >= -0.9) + { T0 = 1.0 / (1.0 + T2); + dT0_dVb = -pParam->BSIM4v5keta * T0 * T0; + } + else + { T1 = 1.0 / (0.8 + T2); + T0 = (17.0 + 20.0 * T2) * T1; + dT0_dVb = -pParam->BSIM4v5keta * T1 * T1; + } + dAbulk_dVg *= T0; + dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; + dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; + Abulk *= T0; + Abulk0 *= T0; + + /* Mobility calculation */ + if (model->BSIM4v5mobMod == 0) + { T0 = Vgsteff + Vth + Vth; + T2 = pParam->BSIM4v5ua + pParam->BSIM4v5uc * Vbseff; + T3 = T0 / model->BSIM4v5toxe; + T6 = pParam->BSIM4v5ud / T3 / T3 * Vth * Vth; + T5 = T3 * (T2 + pParam->BSIM4v5ub * T3) + T6; + T7 = - 2.0 * T6 / T0; + dDenomi_dVg = (T2 + 2.0 * pParam->BSIM4v5ub * T3) / model->BSIM4v5toxe + T7; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4v5uc * T3; + } + else if (model->BSIM4v5mobMod == 1) + { T0 = Vgsteff + Vth + Vth; + T2 = 1.0 + pParam->BSIM4v5uc * Vbseff; + T3 = T0 / model->BSIM4v5toxe; + T4 = T3 * (pParam->BSIM4v5ua + pParam->BSIM4v5ub * T3); + T6 = pParam->BSIM4v5ud / T3 / T3 * Vth * Vth; + T5 = T4 * T2 + T6; + T7 = - 2.0 * T6 / T0; + dDenomi_dVg = (pParam->BSIM4v5ua + 2.0 * pParam->BSIM4v5ub * T3) * T2 + / model->BSIM4v5toxe + T7; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4v5uc * T4; + } + else + { T0 = (Vgsteff + here->BSIM4v5vtfbphi1) / model->BSIM4v5toxe; + T1 = exp(pParam->BSIM4v5eu * log(T0)); + dT1_dVg = T1 * pParam->BSIM4v5eu / T0 / model->BSIM4v5toxe; + T2 = pParam->BSIM4v5ua + pParam->BSIM4v5uc * Vbseff; + T3 = T0 / model->BSIM4v5toxe; + T6 = pParam->BSIM4v5ud / T3 / T3 * Vth * Vth; + T5 = T1 * T2 + T6; + T7 = - 2.0 * T6 / T0; + dDenomi_dVg = T2 * dT1_dVg + T7; + dDenomi_dVd = 0.0; + dDenomi_dVb = T1 * pParam->BSIM4v5uc; + } + + if (T5 >= -0.8) + { Denomi = 1.0 + T5; + } + else + { T9 = 1.0 / (7.0 + 10.0 * T5); + Denomi = (0.6 + T5) * T9; + T9 *= T9; + dDenomi_dVg *= T9; + dDenomi_dVd *= T9; + dDenomi_dVb *= T9; + } + + here->BSIM4v5ueff = ueff = here->BSIM4v5u0temp / Denomi; + T9 = -ueff / Denomi; + dueff_dVg = T9 * dDenomi_dVg; + dueff_dVd = T9 * dDenomi_dVd; + dueff_dVb = T9 * dDenomi_dVb; + + /* Saturation Drain Voltage Vdsat */ + WVCox = Weff * here->BSIM4v5vsattemp * model->BSIM4v5coxe; + WVCoxRds = WVCox * Rds; + + Esat = 2.0 * here->BSIM4v5vsattemp / ueff; + here->BSIM4v5EsatL = EsatL = Esat * Leff; + T0 = -EsatL /ueff; + dEsatL_dVg = T0 * dueff_dVg; + dEsatL_dVd = T0 * dueff_dVd; + dEsatL_dVb = T0 * dueff_dVb; + + /* Sqrt() */ + a1 = pParam->BSIM4v5a1; + if (a1 == 0.0) + { Lambda = pParam->BSIM4v5a2; + dLambda_dVg = 0.0; + } + else if (a1 > 0.0) + { T0 = 1.0 - pParam->BSIM4v5a2; + T1 = T0 - pParam->BSIM4v5a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * T0); + Lambda = pParam->BSIM4v5a2 + T0 - 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM4v5a1 * (1.0 + T1 / T2); + } + else + { T1 = pParam->BSIM4v5a2 + pParam->BSIM4v5a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM4v5a2); + Lambda = 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM4v5a1 * (1.0 + T1 / T2); + } + + Vgst2Vtm = Vgsteff + 2.0 * Vtm; + if (Rds > 0) + { tmp2 = dRds_dVg / Rds + dWeff_dVg / Weff; + tmp3 = dRds_dVb / Rds + dWeff_dVb / Weff; + } + else + { tmp2 = dWeff_dVg / Weff; + tmp3 = dWeff_dVb / Weff; + } + if ((Rds == 0.0) && (Lambda == 1.0)) + { T0 = 1.0 / (Abulk * EsatL + Vgst2Vtm); + tmp1 = 0.0; + T1 = T0 * T0; + T2 = Vgst2Vtm * T0; + T3 = EsatL * Vgst2Vtm; + Vdsat = T3 * T0; + + dT0_dVg = -(Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 1.0) * T1; + dT0_dVd = -(Abulk * dEsatL_dVd) * T1; + dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; + + dVdsat_dVg = T3 * dT0_dVg + T2 * dEsatL_dVg + EsatL * T0; + dVdsat_dVd = T3 * dT0_dVd + T2 * dEsatL_dVd; + dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; + } + else + { tmp1 = dLambda_dVg / (Lambda * Lambda); + T9 = Abulk * WVCoxRds; + T8 = Abulk * T9; + T7 = Vgst2Vtm * T9; + T6 = Vgst2Vtm * WVCoxRds; + T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); + dT0_dVg = 2.0 * (T8 * tmp2 - Abulk * tmp1 + + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); + + dT0_dVb = 2.0 * (T8 * (2.0 / Abulk * dAbulk_dVb + tmp3) + + (1.0 / Lambda - 1.0) * dAbulk_dVb); + dT0_dVd = 0.0; + T1 = Vgst2Vtm * (2.0 / Lambda - 1.0) + Abulk * EsatL + 3.0 * T7; + + dT1_dVg = (2.0 / Lambda - 1.0) - 2.0 * Vgst2Vtm * tmp1 + + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 + + T7 * tmp2 + T6 * dAbulk_dVg); + dT1_dVb = Abulk * dEsatL_dVb + EsatL * dAbulk_dVb + + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); + dT1_dVd = Abulk * dEsatL_dVd; + + T2 = Vgst2Vtm * (EsatL + 2.0 * T6); + dT2_dVg = EsatL + Vgst2Vtm * dEsatL_dVg + + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); + dT2_dVb = Vgst2Vtm * (dEsatL_dVb + 2.0 * T6 * tmp3); + dT2_dVd = Vgst2Vtm * dEsatL_dVd; + + T3 = sqrt(T1 * T1 - 2.0 * T0 * T2); + Vdsat = (T1 - T3) / T0; + + dT3_dVg = (T1 * dT1_dVg - 2.0 * (T0 * dT2_dVg + T2 * dT0_dVg)) + / T3; + dT3_dVd = (T1 * dT1_dVd - 2.0 * (T0 * dT2_dVd + T2 * dT0_dVd)) + / T3; + dT3_dVb = (T1 * dT1_dVb - 2.0 * (T0 * dT2_dVb + T2 * dT0_dVb)) + / T3; + + dVdsat_dVg = (dT1_dVg - (T1 * dT1_dVg - dT0_dVg * T2 + - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; + dVdsat_dVb = (dT1_dVb - (T1 * dT1_dVb - dT0_dVb * T2 + - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; + dVdsat_dVd = (dT1_dVd - (T1 * dT1_dVd - T0 * dT2_dVd) / T3) / T0; + } + here->BSIM4v5vdsat = Vdsat; + + /* Calculate Vdseff */ + T1 = Vdsat - Vds - pParam->BSIM4v5delta; + dT1_dVg = dVdsat_dVg; + dT1_dVd = dVdsat_dVd - 1.0; + dT1_dVb = dVdsat_dVb; + + T2 = sqrt(T1 * T1 + 4.0 * pParam->BSIM4v5delta * Vdsat); + T0 = T1 / T2; + T9 = 2.0 * pParam->BSIM4v5delta; + T3 = T9 / T2; + dT2_dVg = T0 * dT1_dVg + T3 * dVdsat_dVg; + dT2_dVd = T0 * dT1_dVd + T3 * dVdsat_dVd; + dT2_dVb = T0 * dT1_dVb + T3 * dVdsat_dVb; + + if (T1 >= 0.0) + { Vdseff = Vdsat - 0.5 * (T1 + T2); + dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); + dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); + dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); + } + else + { T4 = T9 / (T2 - T1); + T5 = 1.0 - T4; + T6 = Vdsat * T4 / (T2 - T1); + Vdseff = Vdsat * T5; + dVdseff_dVg = dVdsat_dVg * T5 + T6 * (dT2_dVg - dT1_dVg); + dVdseff_dVd = dVdsat_dVd * T5 + T6 * (dT2_dVd - dT1_dVd); + dVdseff_dVb = dVdsat_dVb * T5 + T6 * (dT2_dVb - dT1_dVb); + } + + if (Vds == 0.0) + { Vdseff = 0.0; + dVdseff_dVg = 0.0; + dVdseff_dVb = 0.0; + } + + if (Vdseff > Vds) + Vdseff = Vds; + diffVds = Vds - Vdseff; + here->BSIM4v5Vdseff = Vdseff; + + /* Velocity Overshoot */ + if((model->BSIM4v5lambdaGiven) && (model->BSIM4v5lambda > 0.0) ) + { + T1 = Leff * ueff; + T2 = pParam->BSIM4v5lambda / T1; + T3 = -T2 / T1 * Leff; + dT2_dVd = T3 * dueff_dVd; + dT2_dVg = T3 * dueff_dVg; + dT2_dVb = T3 * dueff_dVb; + T5 = 1.0 / (Esat * pParam->BSIM4v5litl); + T4 = -T5 / EsatL; + dT5_dVg = dEsatL_dVg * T4; + dT5_dVd = dEsatL_dVd * T4; + dT5_dVb = dEsatL_dVb * T4; + T6 = 1.0 + diffVds * T5; + dT6_dVg = dT5_dVg * diffVds - dVdseff_dVg * T5; + dT6_dVd = dT5_dVd * diffVds + (1.0 - dVdseff_dVd) * T5; + dT6_dVb = dT5_dVb * diffVds - dVdseff_dVb * T5; + T7 = 2.0 / (T6 * T6 + 1.0); + T8 = 1.0 - T7; + T9 = T6 * T7 * T7; + dT8_dVg = T9 * dT6_dVg; + dT8_dVd = T9 * dT6_dVd; + dT8_dVb = T9 * dT6_dVb; + T10 = 1.0 + T2 * T8; + dT10_dVg = dT2_dVg * T8 + T2 * dT8_dVg; + dT10_dVd = dT2_dVd * T8 + T2 * dT8_dVd; + dT10_dVb = dT2_dVb * T8 + T2 * dT8_dVb; + if(T10 == 1.0) + dT10_dVg = dT10_dVd = dT10_dVb = 0.0; + + dEsatL_dVg *= T10; + dEsatL_dVg += EsatL * dT10_dVg; + dEsatL_dVd *= T10; + dEsatL_dVd += EsatL * dT10_dVd; + dEsatL_dVb *= T10; + dEsatL_dVb += EsatL * dT10_dVb; + EsatL *= T10; + here->BSIM4v5EsatL = EsatL; + } + + /* Calculate Vasat */ + tmp4 = 1.0 - 0.5 * Abulk * Vdsat / Vgst2Vtm; + T9 = WVCoxRds * Vgsteff; + T8 = T9 / Vgst2Vtm; + T0 = EsatL + Vdsat + 2.0 * T9 * tmp4; + + T7 = 2.0 * WVCoxRds * tmp4; + dT0_dVg = dEsatL_dVg + dVdsat_dVg + T7 * (1.0 + tmp2 * Vgsteff) + - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm + + Vdsat * dAbulk_dVg); + + dT0_dVb = dEsatL_dVb + dVdsat_dVb + T7 * tmp3 * Vgsteff + - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = dEsatL_dVd + dVdsat_dVd - T8 * Abulk * dVdsat_dVd; + + T9 = WVCoxRds * Abulk; + T1 = 2.0 / Lambda - 1.0 + T9; + dT1_dVg = -2.0 * tmp1 + WVCoxRds * (Abulk * tmp2 + dAbulk_dVg); + dT1_dVb = dAbulk_dVb * WVCoxRds + T9 * tmp3; + + Vasat = T0 / T1; + dVasat_dVg = (dT0_dVg - Vasat * dT1_dVg) / T1; + dVasat_dVb = (dT0_dVb - Vasat * dT1_dVb) / T1; + dVasat_dVd = dT0_dVd / T1; + + /* Calculate Idl first */ + tmp1 = here->BSIM4v5vtfbphi2; + tmp2 = 2.0e8 * model->BSIM4v5toxp; + dT0_dVg = 1.0 / tmp2; + T0 = (Vgsteff + tmp1) * dT0_dVg; + + tmp3 = exp(0.7 * log(T0)); + T1 = 1.0 + tmp3; + T2 = 0.7 * tmp3 / T0; + Tcen = 1.9e-9 / T1; + dTcen_dVg = -Tcen * T2 * dT0_dVg / T1; + + Coxeff = EPSSI * model->BSIM4v5coxp + / (EPSSI + model->BSIM4v5coxp * Tcen); + dCoxeff_dVg = -Coxeff * Coxeff * dTcen_dVg / EPSSI; + + CoxeffWovL = Coxeff * Weff / Leff; + beta = ueff * CoxeffWovL; + T3 = ueff / Leff; + dbeta_dVg = CoxeffWovL * dueff_dVg + T3 + * (Weff * dCoxeff_dVg + Coxeff * dWeff_dVg); + dbeta_dVd = CoxeffWovL * dueff_dVd; + dbeta_dVb = CoxeffWovL * dueff_dVb + T3 * Coxeff * dWeff_dVb; + + here->BSIM4v5AbovVgst2Vtm = Abulk / Vgst2Vtm; + T0 = 1.0 - 0.5 * Vdseff * here->BSIM4v5AbovVgst2Vtm; + dT0_dVg = -0.5 * (Abulk * dVdseff_dVg + - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; + dT0_dVd = -0.5 * Abulk * dVdseff_dVd / Vgst2Vtm; + dT0_dVb = -0.5 * (Abulk * dVdseff_dVb + dAbulk_dVb * Vdseff) + / Vgst2Vtm; + + fgche1 = Vgsteff * T0; + dfgche1_dVg = Vgsteff * dT0_dVg + T0; + dfgche1_dVd = Vgsteff * dT0_dVd; + dfgche1_dVb = Vgsteff * dT0_dVb; + + T9 = Vdseff / EsatL; + fgche2 = 1.0 + T9; + dfgche2_dVg = (dVdseff_dVg - T9 * dEsatL_dVg) / EsatL; + dfgche2_dVd = (dVdseff_dVd - T9 * dEsatL_dVd) / EsatL; + dfgche2_dVb = (dVdseff_dVb - T9 * dEsatL_dVb) / EsatL; + + gche = beta * fgche1 / fgche2; + dgche_dVg = (beta * dfgche1_dVg + fgche1 * dbeta_dVg + - gche * dfgche2_dVg) / fgche2; + dgche_dVd = (beta * dfgche1_dVd + fgche1 * dbeta_dVd + - gche * dfgche2_dVd) / fgche2; + dgche_dVb = (beta * dfgche1_dVb + fgche1 * dbeta_dVb + - gche * dfgche2_dVb) / fgche2; + + T0 = 1.0 + gche * Rds; + Idl = gche / T0; + T1 = (1.0 - Idl * Rds) / T0; + T2 = Idl * Idl; + dIdl_dVg = T1 * dgche_dVg - T2 * dRds_dVg; + dIdl_dVd = T1 * dgche_dVd; + dIdl_dVb = T1 * dgche_dVb - T2 * dRds_dVb; + + /* Calculate degradation factor due to pocket implant */ + + if (pParam->BSIM4v5fprout <= 0.0) + { FP = 1.0; + dFP_dVg = 0.0; + } + else + { T9 = pParam->BSIM4v5fprout * sqrt(Leff) / Vgst2Vtm; + FP = 1.0 / (1.0 + T9); + dFP_dVg = FP * FP * T9 / Vgst2Vtm; + } + + /* Calculate VACLM */ + T8 = pParam->BSIM4v5pvag / EsatL; + T9 = T8 * Vgsteff; + if (T9 > -0.9) + { PvagTerm = 1.0 + T9; + dPvagTerm_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL); + dPvagTerm_dVb = -T9 * dEsatL_dVb / EsatL; + dPvagTerm_dVd = -T9 * dEsatL_dVd / EsatL; + } + else + { T4 = 1.0 / (17.0 + 20.0 * T9); + PvagTerm = (0.8 + T9) * T4; + T4 *= T4; + dPvagTerm_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL) * T4; + T9 *= T4 / EsatL; + dPvagTerm_dVb = -T9 * dEsatL_dVb; + dPvagTerm_dVd = -T9 * dEsatL_dVd; + } + + if ((pParam->BSIM4v5pclm > MIN_EXP) && (diffVds > 1.0e-10)) + { T0 = 1.0 + Rds * Idl; + dT0_dVg = dRds_dVg * Idl + Rds * dIdl_dVg; + dT0_dVd = Rds * dIdl_dVd; + dT0_dVb = dRds_dVb * Idl + Rds * dIdl_dVb; + + T2 = Vdsat / Esat; + T1 = Leff + T2; + dT1_dVg = (dVdsat_dVg - T2 * dEsatL_dVg / Leff) / Esat; + dT1_dVd = (dVdsat_dVd - T2 * dEsatL_dVd / Leff) / Esat; + dT1_dVb = (dVdsat_dVb - T2 * dEsatL_dVb / Leff) / Esat; + + Cclm = FP * PvagTerm * T0 * T1 / (pParam->BSIM4v5pclm * pParam->BSIM4v5litl); + dCclm_dVg = Cclm * (dFP_dVg / FP + dPvagTerm_dVg / PvagTerm + + dT0_dVg / T0 + dT1_dVg / T1); + dCclm_dVb = Cclm * (dPvagTerm_dVb / PvagTerm + dT0_dVb / T0 + + dT1_dVb / T1); + dCclm_dVd = Cclm * (dPvagTerm_dVd / PvagTerm + dT0_dVd / T0 + + dT1_dVd / T1); + VACLM = Cclm * diffVds; + + dVACLM_dVg = dCclm_dVg * diffVds - dVdseff_dVg * Cclm; + dVACLM_dVb = dCclm_dVb * diffVds - dVdseff_dVb * Cclm; + dVACLM_dVd = dCclm_dVd * diffVds + (1.0 - dVdseff_dVd) * Cclm; + } + else + { VACLM = Cclm = MAX_EXP; + dVACLM_dVd = dVACLM_dVg = dVACLM_dVb = 0.0; + dCclm_dVd = dCclm_dVg = dCclm_dVb = 0.0; + } + + /* Calculate VADIBL */ + if (pParam->BSIM4v5thetaRout > MIN_EXP) + { T8 = Abulk * Vdsat; + T0 = Vgst2Vtm * T8; + dT0_dVg = Vgst2Vtm * Abulk * dVdsat_dVg + T8 + + Vgst2Vtm * Vdsat * dAbulk_dVg; + dT0_dVb = Vgst2Vtm * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = Vgst2Vtm * Abulk * dVdsat_dVd; + + T1 = Vgst2Vtm + T8; + dT1_dVg = 1.0 + Abulk * dVdsat_dVg + Vdsat * dAbulk_dVg; + dT1_dVb = Abulk * dVdsat_dVb + dAbulk_dVb * Vdsat; + dT1_dVd = Abulk * dVdsat_dVd; + + T9 = T1 * T1; + T2 = pParam->BSIM4v5thetaRout; + VADIBL = (Vgst2Vtm - T0 / T1) / T2; + dVADIBL_dVg = (1.0 - dT0_dVg / T1 + T0 * dT1_dVg / T9) / T2; + dVADIBL_dVb = (-dT0_dVb / T1 + T0 * dT1_dVb / T9) / T2; + dVADIBL_dVd = (-dT0_dVd / T1 + T0 * dT1_dVd / T9) / T2; + + T7 = pParam->BSIM4v5pdiblb * Vbseff; + if (T7 >= -0.9) + { T3 = 1.0 / (1.0 + T7); + VADIBL *= T3; + dVADIBL_dVg *= T3; + dVADIBL_dVb = (dVADIBL_dVb - VADIBL * pParam->BSIM4v5pdiblb) + * T3; + dVADIBL_dVd *= T3; + } + else + { T4 = 1.0 / (0.8 + T7); + T3 = (17.0 + 20.0 * T7) * T4; + dVADIBL_dVg *= T3; + dVADIBL_dVb = dVADIBL_dVb * T3 + - VADIBL * pParam->BSIM4v5pdiblb * T4 * T4; + dVADIBL_dVd *= T3; + VADIBL *= T3; + } + + dVADIBL_dVg = dVADIBL_dVg * PvagTerm + VADIBL * dPvagTerm_dVg; + dVADIBL_dVb = dVADIBL_dVb * PvagTerm + VADIBL * dPvagTerm_dVb; + dVADIBL_dVd = dVADIBL_dVd * PvagTerm + VADIBL * dPvagTerm_dVd; + VADIBL *= PvagTerm; + } + else + { VADIBL = MAX_EXP; + dVADIBL_dVd = dVADIBL_dVg = dVADIBL_dVb = 0.0; + } + + /* Calculate Va */ + Va = Vasat + VACLM; + dVa_dVg = dVasat_dVg + dVACLM_dVg; + dVa_dVb = dVasat_dVb + dVACLM_dVb; + dVa_dVd = dVasat_dVd + dVACLM_dVd; + + /* Calculate VADITS */ + T0 = pParam->BSIM4v5pditsd * Vds; + if (T0 > EXP_THRESHOLD) + { T1 = MAX_EXP; + dT1_dVd = 0; + } + else + { T1 = exp(T0); + dT1_dVd = T1 * pParam->BSIM4v5pditsd; + } + + if (pParam->BSIM4v5pdits > MIN_EXP) + { T2 = 1.0 + model->BSIM4v5pditsl * Leff; + VADITS = (1.0 + T2 * T1) / pParam->BSIM4v5pdits; + dVADITS_dVg = VADITS * dFP_dVg; + dVADITS_dVd = FP * T2 * dT1_dVd / pParam->BSIM4v5pdits; + VADITS *= FP; + } + else + { VADITS = MAX_EXP; + dVADITS_dVg = dVADITS_dVd = 0; + } + + /* Calculate VASCBE */ + if (pParam->BSIM4v5pscbe2 > 0.0) + { if (diffVds > pParam->BSIM4v5pscbe1 * pParam->BSIM4v5litl + / EXP_THRESHOLD) + { T0 = pParam->BSIM4v5pscbe1 * pParam->BSIM4v5litl / diffVds; + VASCBE = Leff * exp(T0) / pParam->BSIM4v5pscbe2; + T1 = T0 * VASCBE / diffVds; + dVASCBE_dVg = T1 * dVdseff_dVg; + dVASCBE_dVd = -T1 * (1.0 - dVdseff_dVd); + dVASCBE_dVb = T1 * dVdseff_dVb; + } + else + { VASCBE = MAX_EXP * Leff/pParam->BSIM4v5pscbe2; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + } + else + { VASCBE = MAX_EXP; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + + /* Add DIBL to Ids */ + T9 = diffVds / VADIBL; + T0 = 1.0 + T9; + Idsa = Idl * T0; + dIdsa_dVg = T0 * dIdl_dVg - Idl * (dVdseff_dVg + T9 * dVADIBL_dVg) / VADIBL; + dIdsa_dVd = T0 * dIdl_dVd + Idl + * (1.0 - dVdseff_dVd - T9 * dVADIBL_dVd) / VADIBL; + dIdsa_dVb = T0 * dIdl_dVb - Idl * (dVdseff_dVb + T9 * dVADIBL_dVb) / VADIBL; + + /* Add DITS to Ids */ + T9 = diffVds / VADITS; + T0 = 1.0 + T9; + dIdsa_dVg = T0 * dIdsa_dVg - Idsa * (dVdseff_dVg + T9 * dVADITS_dVg) / VADITS; + dIdsa_dVd = T0 * dIdsa_dVd + Idsa + * (1.0 - dVdseff_dVd - T9 * dVADITS_dVd) / VADITS; + dIdsa_dVb = T0 * dIdsa_dVb - Idsa * dVdseff_dVb / VADITS; + Idsa *= T0; + + /* Add CLM to Ids */ + T0 = log(Va / Vasat); + dT0_dVg = dVa_dVg / Va - dVasat_dVg / Vasat; + dT0_dVb = dVa_dVb / Va - dVasat_dVb / Vasat; + dT0_dVd = dVa_dVd / Va - dVasat_dVd / Vasat; + T1 = T0 / Cclm; + T9 = 1.0 + T1; + dT9_dVg = (dT0_dVg - T1 * dCclm_dVg) / Cclm; + dT9_dVb = (dT0_dVb - T1 * dCclm_dVb) / Cclm; + dT9_dVd = (dT0_dVd - T1 * dCclm_dVd) / Cclm; + + dIdsa_dVg = dIdsa_dVg * T9 + Idsa * dT9_dVg; + dIdsa_dVb = dIdsa_dVb * T9 + Idsa * dT9_dVb; + dIdsa_dVd = dIdsa_dVd * T9 + Idsa * dT9_dVd; + Idsa *= T9; + + /* Substrate current begins */ + tmp = pParam->BSIM4v5alpha0 + pParam->BSIM4v5alpha1 * Leff; + if ((tmp <= 0.0) || (pParam->BSIM4v5beta0 <= 0.0)) + { Isub = Gbd = Gbb = Gbg = 0.0; + } + else + { T2 = tmp / Leff; + if (diffVds > pParam->BSIM4v5beta0 / EXP_THRESHOLD) + { T0 = -pParam->BSIM4v5beta0 / diffVds; + T1 = T2 * diffVds * exp(T0); + T3 = T1 / diffVds * (T0 - 1.0); + dT1_dVg = T3 * dVdseff_dVg; + dT1_dVd = T3 * (dVdseff_dVd - 1.0); + dT1_dVb = T3 * dVdseff_dVb; + } + else + { T3 = T2 * MIN_EXP; + T1 = T3 * diffVds; + dT1_dVg = -T3 * dVdseff_dVg; + dT1_dVd = T3 * (1.0 - dVdseff_dVd); + dT1_dVb = -T3 * dVdseff_dVb; + } + T4 = Idsa * Vdseff; + Isub = T1 * T4; + Gbg = T1 * (dIdsa_dVg * Vdseff + Idsa * dVdseff_dVg) + + T4 * dT1_dVg; + Gbd = T1 * (dIdsa_dVd * Vdseff + Idsa * dVdseff_dVd) + + T4 * dT1_dVd; + Gbb = T1 * (dIdsa_dVb * Vdseff + Idsa * dVdseff_dVb) + + T4 * dT1_dVb; + + Gbd += Gbg * dVgsteff_dVd; + Gbb += Gbg * dVgsteff_dVb; + Gbg *= dVgsteff_dVg; + Gbb *= dVbseff_dVb; + } + here->BSIM4v5csub = Isub; + here->BSIM4v5gbbs = Gbb; + here->BSIM4v5gbgs = Gbg; + here->BSIM4v5gbds = Gbd; + + /* Add SCBE to Ids */ + T9 = diffVds / VASCBE; + T0 = 1.0 + T9; + Ids = Idsa * T0; + + Gm = T0 * dIdsa_dVg - Idsa + * (dVdseff_dVg + T9 * dVASCBE_dVg) / VASCBE; + Gds = T0 * dIdsa_dVd + Idsa + * (1.0 - dVdseff_dVd - T9 * dVASCBE_dVd) / VASCBE; + Gmb = T0 * dIdsa_dVb - Idsa + * (dVdseff_dVb + T9 * dVASCBE_dVb) / VASCBE; + + + tmp1 = Gds + Gm * dVgsteff_dVd; + tmp2 = Gmb + Gm * dVgsteff_dVb; + tmp3 = Gm; + + Gm = (Ids * dVdseff_dVg + Vdseff * tmp3) * dVgsteff_dVg; + Gds = Ids * (dVdseff_dVd + dVdseff_dVg * dVgsteff_dVd) + + Vdseff * tmp1; + Gmb = (Ids * (dVdseff_dVb + dVdseff_dVg * dVgsteff_dVb) + + Vdseff * tmp2) * dVbseff_dVb; + + cdrain = Ids * Vdseff; + + /* Source End Velocity Limit */ + if((model->BSIM4v5vtlGiven) && (model->BSIM4v5vtl > 0.0) ) { + T12 = 1.0 / Leff / CoxeffWovL; + T11 = T12 / Vgsteff; + T10 = -T11 / Vgsteff; + vs = cdrain * T11; /* vs */ + dvs_dVg = Gm * T11 + cdrain * T10 * dVgsteff_dVg; + dvs_dVd = Gds * T11 + cdrain * T10 * dVgsteff_dVd; + dvs_dVb = Gmb * T11 + cdrain * T10 * dVgsteff_dVb; + T0 = 2 * MM; + T1 = vs / (pParam->BSIM4v5vtl * pParam->BSIM4v5tfactor); + if(T1 > 0.0) + { T2 = 1.0 + exp(T0 * log(T1)); + T3 = (T2 - 1.0) * T0 / vs; + Fsevl = 1.0 / exp(log(T2)/ T0); + dT2_dVg = T3 * dvs_dVg; + dT2_dVd = T3 * dvs_dVd; + dT2_dVb = T3 * dvs_dVb; + T4 = -1.0 / T0 * Fsevl / T2; + dFsevl_dVg = T4 * dT2_dVg; + dFsevl_dVd = T4 * dT2_dVd; + dFsevl_dVb = T4 * dT2_dVb; + } else { + Fsevl = 1.0; + dFsevl_dVg = 0.0; + dFsevl_dVd = 0.0; + dFsevl_dVb = 0.0; + } + Gm *=Fsevl; + Gm += cdrain * dFsevl_dVg; + Gmb *=Fsevl; + Gmb += cdrain * dFsevl_dVb; + Gds *=Fsevl; + Gds += cdrain * dFsevl_dVd; + + cdrain *= Fsevl; + } + + here->BSIM4v5gds = Gds; + here->BSIM4v5gm = Gm; + here->BSIM4v5gmbs = Gmb; + here->BSIM4v5IdovVds = Ids; + if( here->BSIM4v5IdovVds <= 1.0e-9) here->BSIM4v5IdovVds = 1.0e-9; + + /* Calculate Rg */ + if ((here->BSIM4v5rgateMod > 1) || + (here->BSIM4v5trnqsMod != 0) || (here->BSIM4v5acnqsMod != 0)) + { T9 = pParam->BSIM4v5xrcrg2 * model->BSIM4v5vtm; + T0 = T9 * beta; + dT0_dVd = (dbeta_dVd + dbeta_dVg * dVgsteff_dVd) * T9; + dT0_dVb = (dbeta_dVb + dbeta_dVg * dVgsteff_dVb) * T9; + dT0_dVg = dbeta_dVg * T9; + + here->BSIM4v5gcrg = pParam->BSIM4v5xrcrg1 * ( T0 + Ids); + here->BSIM4v5gcrgd = pParam->BSIM4v5xrcrg1 * (dT0_dVd + tmp1); + here->BSIM4v5gcrgb = pParam->BSIM4v5xrcrg1 * (dT0_dVb + tmp2) + * dVbseff_dVb; + here->BSIM4v5gcrgg = pParam->BSIM4v5xrcrg1 * (dT0_dVg + tmp3) + * dVgsteff_dVg; + + if (here->BSIM4v5nf != 1.0) + { here->BSIM4v5gcrg *= here->BSIM4v5nf; + here->BSIM4v5gcrgg *= here->BSIM4v5nf; + here->BSIM4v5gcrgd *= here->BSIM4v5nf; + here->BSIM4v5gcrgb *= here->BSIM4v5nf; + } + + if (here->BSIM4v5rgateMod == 2) + { T10 = here->BSIM4v5grgeltd * here->BSIM4v5grgeltd; + T11 = here->BSIM4v5grgeltd + here->BSIM4v5gcrg; + here->BSIM4v5gcrg = here->BSIM4v5grgeltd * here->BSIM4v5gcrg / T11; + T12 = T10 / T11 / T11; + here->BSIM4v5gcrgg *= T12; + here->BSIM4v5gcrgd *= T12; + here->BSIM4v5gcrgb *= T12; + } + here->BSIM4v5gcrgs = -(here->BSIM4v5gcrgg + here->BSIM4v5gcrgd + + here->BSIM4v5gcrgb); + } + + + /* Calculate bias-dependent external S/D resistance */ + if (model->BSIM4v5rdsMod) + { /* Rs(V) */ + T0 = vgs - pParam->BSIM4v5vfbsd; + T1 = sqrt(T0 * T0 + 1.0e-4); + vgs_eff = 0.5 * (T0 + T1); + dvgs_eff_dvg = vgs_eff / T1; + + T0 = 1.0 + pParam->BSIM4v5prwg * vgs_eff; + dT0_dvg = -pParam->BSIM4v5prwg / T0 / T0 * dvgs_eff_dvg; + T1 = -pParam->BSIM4v5prwb * vbs; + dT1_dvb = -pParam->BSIM4v5prwb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); + dT3_dvg = T3 / (T3 - T2); + dT3_dvb = dT3_dvg * dT1_dvb; + dT3_dvg *= dT0_dvg; + + T4 = pParam->BSIM4v5rs0 * 0.5; + Rs = pParam->BSIM4v5rswmin + T3 * T4; + dRs_dvg = T4 * dT3_dvg; + dRs_dvb = T4 * dT3_dvb; + + T0 = 1.0 + here->BSIM4v5sourceConductance * Rs; + here->BSIM4v5gstot = here->BSIM4v5sourceConductance / T0; + T0 = -here->BSIM4v5gstot * here->BSIM4v5gstot; + dgstot_dvd = 0.0; /* place holder */ + dgstot_dvg = T0 * dRs_dvg; + dgstot_dvb = T0 * dRs_dvb; + dgstot_dvs = -(dgstot_dvg + dgstot_dvb + dgstot_dvd); + + /* Rd(V) */ + T0 = vgd - pParam->BSIM4v5vfbsd; + T1 = sqrt(T0 * T0 + 1.0e-4); + vgd_eff = 0.5 * (T0 + T1); + dvgd_eff_dvg = vgd_eff / T1; + + T0 = 1.0 + pParam->BSIM4v5prwg * vgd_eff; + dT0_dvg = -pParam->BSIM4v5prwg / T0 / T0 * dvgd_eff_dvg; + T1 = -pParam->BSIM4v5prwb * vbd; + dT1_dvb = -pParam->BSIM4v5prwb; + + T2 = 1.0 / T0 + T1; + T3 = T2 + sqrt(T2 * T2 + 0.01); + dT3_dvg = T3 / (T3 - T2); + dT3_dvb = dT3_dvg * dT1_dvb; + dT3_dvg *= dT0_dvg; + + T4 = pParam->BSIM4v5rd0 * 0.5; + Rd = pParam->BSIM4v5rdwmin + T3 * T4; + dRd_dvg = T4 * dT3_dvg; + dRd_dvb = T4 * dT3_dvb; + + T0 = 1.0 + here->BSIM4v5drainConductance * Rd; + here->BSIM4v5gdtot = here->BSIM4v5drainConductance / T0; + T0 = -here->BSIM4v5gdtot * here->BSIM4v5gdtot; + dgdtot_dvs = 0.0; + dgdtot_dvg = T0 * dRd_dvg; + dgdtot_dvb = T0 * dRd_dvb; + dgdtot_dvd = -(dgdtot_dvg + dgdtot_dvb + dgdtot_dvs); + + here->BSIM4v5gstotd = vses * dgstot_dvd; + here->BSIM4v5gstotg = vses * dgstot_dvg; + here->BSIM4v5gstots = vses * dgstot_dvs; + here->BSIM4v5gstotb = vses * dgstot_dvb; + + T2 = vdes - vds; + here->BSIM4v5gdtotd = T2 * dgdtot_dvd; + here->BSIM4v5gdtotg = T2 * dgdtot_dvg; + here->BSIM4v5gdtots = T2 * dgdtot_dvs; + here->BSIM4v5gdtotb = T2 * dgdtot_dvb; + } + else /* WDLiu: for bypass */ + { here->BSIM4v5gstot = here->BSIM4v5gstotd = here->BSIM4v5gstotg = 0.0; + here->BSIM4v5gstots = here->BSIM4v5gstotb = 0.0; + here->BSIM4v5gdtot = here->BSIM4v5gdtotd = here->BSIM4v5gdtotg = 0.0; + here->BSIM4v5gdtots = here->BSIM4v5gdtotb = 0.0; + } + + /* Calculate GIDL current */ + vgs_eff = here->BSIM4v5vgs_eff; + dvgs_eff_dvg = here->BSIM4v5dvgs_eff_dvg; + T0 = 3.0 * model->BSIM4v5toxe; + + T1 = (vds - vgs_eff - pParam->BSIM4v5egidl ) / T0; + if ((pParam->BSIM4v5agidl <= 0.0) || (pParam->BSIM4v5bgidl <= 0.0) + || (T1 <= 0.0) || (pParam->BSIM4v5cgidl <= 0.0) || (vbd > 0.0)) + Igidl = Ggidld = Ggidlg = Ggidlb = 0.0; + else { + dT1_dVd = 1.0 / T0; + dT1_dVg = -dvgs_eff_dvg * dT1_dVd; + T2 = pParam->BSIM4v5bgidl / T1; + if (T2 < 100.0) + { Igidl = pParam->BSIM4v5agidl * pParam->BSIM4v5weffCJ * T1 * exp(-T2); + T3 = Igidl * (1.0 + T2) / T1; + Ggidld = T3 * dT1_dVd; + Ggidlg = T3 * dT1_dVg; + } + else + { Igidl = pParam->BSIM4v5agidl * pParam->BSIM4v5weffCJ * 3.720075976e-44; + Ggidld = Igidl * dT1_dVd; + Ggidlg = Igidl * dT1_dVg; + Igidl *= T1; + } + + T4 = vbd * vbd; + T5 = -vbd * T4; + T6 = pParam->BSIM4v5cgidl + T5; + T7 = T5 / T6; + T8 = 3.0 * pParam->BSIM4v5cgidl * T4 / T6 / T6; + Ggidld = Ggidld * T7 + Igidl * T8; + Ggidlg = Ggidlg * T7; + Ggidlb = -Igidl * T8; + Igidl *= T7; + } + here->BSIM4v5Igidl = Igidl; + here->BSIM4v5ggidld = Ggidld; + here->BSIM4v5ggidlg = Ggidlg; + here->BSIM4v5ggidlb = Ggidlb; + + /* Calculate GISL current */ + vgd_eff = here->BSIM4v5vgd_eff; + dvgd_eff_dvg = here->BSIM4v5dvgd_eff_dvg; + + T1 = (-vds - vgd_eff - pParam->BSIM4v5egidl ) / T0; + + if ((pParam->BSIM4v5agidl <= 0.0) || (pParam->BSIM4v5bgidl <= 0.0) + || (T1 <= 0.0) || (pParam->BSIM4v5cgidl <= 0.0) || (vbs > 0.0)) + Igisl = Ggisls = Ggislg = Ggislb = 0.0; + else { + dT1_dVd = 1.0 / T0; + dT1_dVg = -dvgd_eff_dvg * dT1_dVd; + T2 = pParam->BSIM4v5bgidl / T1; + if (T2 < 100.0) + { Igisl = pParam->BSIM4v5agidl * pParam->BSIM4v5weffCJ * T1 * exp(-T2); + T3 = Igisl * (1.0 + T2) / T1; + Ggisls = T3 * dT1_dVd; + Ggislg = T3 * dT1_dVg; + } + else + { Igisl = pParam->BSIM4v5agidl * pParam->BSIM4v5weffCJ * 3.720075976e-44; + Ggisls = Igisl * dT1_dVd; + Ggislg = Igisl * dT1_dVg; + Igisl *= T1; + } + + T4 = vbs * vbs; + T5 = -vbs * T4; + T6 = pParam->BSIM4v5cgidl + T5; + T7 = T5 / T6; + T8 = 3.0 * pParam->BSIM4v5cgidl * T4 / T6 / T6; + Ggisls = Ggisls * T7 + Igisl * T8; + Ggislg = Ggislg * T7; + Ggislb = -Igisl * T8; + Igisl *= T7; + } + here->BSIM4v5Igisl = Igisl; + here->BSIM4v5ggisls = Ggisls; + here->BSIM4v5ggislg = Ggislg; + here->BSIM4v5ggislb = Ggislb; + + + /* Calculate gate tunneling current */ + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { Vfb = here->BSIM4v5vfbzb; + V3 = Vfb - Vgs_eff + Vbseff - DELTA_3; + if (Vfb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1; /* WDLiu: -No surprise? No. -Good! */ + + Voxacc = Vfb - Vfbeff; + dVoxacc_dVg = -dVfbeff_dVg; + dVoxacc_dVb = -dVfbeff_dVb; + if (Voxacc < 0.0) /* WDLiu: Avoiding numerical instability. */ + Voxacc = dVoxacc_dVg = dVoxacc_dVb = 0.0; + + T0 = 0.5 * pParam->BSIM4v5k1ox; + T3 = Vgs_eff - Vfbeff - Vbseff - Vgsteff; + if (pParam->BSIM4v5k1ox == 0.0) + Voxdepinv = dVoxdepinv_dVg = dVoxdepinv_dVd + = dVoxdepinv_dVb = 0.0; + else if (T3 < 0.0) + { Voxdepinv = -T3; + dVoxdepinv_dVg = -dVgs_eff_dVg + dVfbeff_dVg + + dVgsteff_dVg; + dVoxdepinv_dVd = dVgsteff_dVd; + dVoxdepinv_dVb = dVfbeff_dVb + 1.0 + dVgsteff_dVb; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = T0 / T1; + Voxdepinv = pParam->BSIM4v5k1ox * (T1 - T0); + dVoxdepinv_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg + - dVgsteff_dVg); + dVoxdepinv_dVd = -T2 * dVgsteff_dVd; + dVoxdepinv_dVb = -T2 * (dVfbeff_dVb + 1.0 + dVgsteff_dVb); + } + + Voxdepinv += Vgsteff; + dVoxdepinv_dVg += dVgsteff_dVg; + dVoxdepinv_dVd += dVgsteff_dVd; + dVoxdepinv_dVb += dVgsteff_dVb; + } + + if(model->BSIM4v5tempMod < 2) + tmp = Vtm; + else /* model->BSIM4v5tempMod = 2 */ + tmp = Vtm0; + if (model->BSIM4v5igcMod) + { T0 = tmp * pParam->BSIM4v5nigc; + if(model->BSIM4v5igcMod == 1) { + VxNVt = (Vgs_eff - model->BSIM4v5type * here->BSIM4v5vth0) / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = Vgs_eff - model->BSIM4v5type * here->BSIM4v5vth0; + dVaux_dVg = dVgs_eff_dVg; + dVaux_dVd = 0.0; + dVaux_dVb = 0.0; + } + } else if (model->BSIM4v5igcMod == 2) { + VxNVt = (Vgs_eff - here->BSIM4v5von) / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = Vgs_eff - here->BSIM4v5von; + dVaux_dVg = dVgs_eff_dVg; + dVaux_dVd = -dVth_dVd; + dVaux_dVb = -dVth_dVb; + } + } + if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVd = dVaux_dVb = 0.0; + } + else if ((VxNVt >= -EXP_THRESHOLD) && (VxNVt <= EXP_THRESHOLD)) + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVg = ExpVxNVt / (1.0 + ExpVxNVt); + if(model->BSIM4v5igcMod == 1) { + dVaux_dVd = 0.0; + dVaux_dVb = 0.0; + } else if (model->BSIM4v5igcMod == 2) { + dVaux_dVd = -dVgs_eff_dVg * dVth_dVd; + dVaux_dVb = -dVgs_eff_dVg * dVth_dVb; + } + dVaux_dVg *= dVgs_eff_dVg; + } + + T2 = Vgs_eff * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + Vgs_eff * dVaux_dVg; + dT2_dVd = Vgs_eff * dVaux_dVd; + dT2_dVb = Vgs_eff * dVaux_dVb; + + T11 = pParam->BSIM4v5Aechvb; + T12 = pParam->BSIM4v5Bechvb; + T3 = pParam->BSIM4v5aigc * pParam->BSIM4v5cigc + - pParam->BSIM4v5bigc; + T4 = pParam->BSIM4v5bigc * pParam->BSIM4v5cigc; + T5 = T12 * (pParam->BSIM4v5aigc + T3 * Voxdepinv + - T4 * Voxdepinv * Voxdepinv); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxdepinv); + dT6_dVd = dT6_dVg * dVoxdepinv_dVd; + dT6_dVb = dT6_dVg * dVoxdepinv_dVb; + dT6_dVg *= dVoxdepinv_dVg; + } + + Igc = T11 * T2 * T6; + dIgc_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgc_dVd = T11 * (T2 * dT6_dVd + T6 * dT2_dVd); + dIgc_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + if (model->BSIM4v5pigcdGiven) + { Pigcd = pParam->BSIM4v5pigcd; + dPigcd_dVg = dPigcd_dVd = dPigcd_dVb = 0.0; + } + else + { T11 = pParam->BSIM4v5Bechvb * model->BSIM4v5toxe; + T12 = Vgsteff + 1.0e-20; + T13 = T11 / T12 / T12; + T14 = -T13 / T12; + Pigcd = T13 * (1.0 - 0.5 * Vdseff / T12); + dPigcd_dVg = T14 * (2.0 + 0.5 * (dVdseff_dVg + - 3.0 * Vdseff / T12)); + dPigcd_dVd = 0.5 * T14 * dVdseff_dVd; + dPigcd_dVb = 0.5 * T14 * dVdseff_dVb; + } + + T7 = -Pigcd * Vdseff; /* bugfix */ + dT7_dVg = -Vdseff * dPigcd_dVg - Pigcd * dVdseff_dVg; + dT7_dVd = -Vdseff * dPigcd_dVd - Pigcd * dVdseff_dVd + dT7_dVg * dVgsteff_dVd; + dT7_dVb = -Vdseff * dPigcd_dVb - Pigcd * dVdseff_dVb + dT7_dVg * dVgsteff_dVb; + dT7_dVg *= dVgsteff_dVg; + dT7_dVb *= dVbseff_dVb; + T8 = T7 * T7 + 2.0e-4; + dT8_dVg = 2.0 * T7; + dT8_dVd = dT8_dVg * dT7_dVd; + dT8_dVb = dT8_dVg * dT7_dVb; + dT8_dVg *= dT7_dVg; + + if (T7 > EXP_THRESHOLD) + { T9 = MAX_EXP; + dT9_dVg = dT9_dVd = dT9_dVb = 0.0; + } + else if (T7 < -EXP_THRESHOLD) + { T9 = MIN_EXP; + dT9_dVg = dT9_dVd = dT9_dVb = 0.0; + } + else + { T9 = exp(T7); + dT9_dVg = T9 * dT7_dVg; + dT9_dVd = T9 * dT7_dVd; + dT9_dVb = T9 * dT7_dVb; + } + + T0 = T8 * T8; + T1 = T9 - 1.0 + 1.0e-4; + T10 = (T1 - T7) / T8; + dT10_dVg = (dT9_dVg - dT7_dVg - T10 * dT8_dVg) / T8; + dT10_dVd = (dT9_dVd - dT7_dVd - T10 * dT8_dVd) / T8; + dT10_dVb = (dT9_dVb - dT7_dVb - T10 * dT8_dVb) / T8; + + Igcs = Igc * T10; + dIgcs_dVg = dIgc_dVg * T10 + Igc * dT10_dVg; + dIgcs_dVd = dIgc_dVd * T10 + Igc * dT10_dVd; + dIgcs_dVb = dIgc_dVb * T10 + Igc * dT10_dVb; + + T1 = T9 - 1.0 - 1.0e-4; + T10 = (T7 * T9 - T1) / T8; + dT10_dVg = (dT7_dVg * T9 + (T7 - 1.0) * dT9_dVg + - T10 * dT8_dVg) / T8; + dT10_dVd = (dT7_dVd * T9 + (T7 - 1.0) * dT9_dVd + - T10 * dT8_dVd) / T8; + dT10_dVb = (dT7_dVb * T9 + (T7 - 1.0) * dT9_dVb + - T10 * dT8_dVb) / T8; + Igcd = Igc * T10; + dIgcd_dVg = dIgc_dVg * T10 + Igc * dT10_dVg; + dIgcd_dVd = dIgc_dVd * T10 + Igc * dT10_dVd; + dIgcd_dVb = dIgc_dVb * T10 + Igc * dT10_dVb; + + here->BSIM4v5Igcs = Igcs; + here->BSIM4v5gIgcsg = dIgcs_dVg; + here->BSIM4v5gIgcsd = dIgcs_dVd; + here->BSIM4v5gIgcsb = dIgcs_dVb * dVbseff_dVb; + here->BSIM4v5Igcd = Igcd; + here->BSIM4v5gIgcdg = dIgcd_dVg; + here->BSIM4v5gIgcdd = dIgcd_dVd; + here->BSIM4v5gIgcdb = dIgcd_dVb * dVbseff_dVb; + + T0 = vgs - (pParam->BSIM4v5vfbsd + pParam->BSIM4v5vfbsdoff); + vgs_eff = sqrt(T0 * T0 + 1.0e-4); + dvgs_eff_dvg = T0 / vgs_eff; + + T2 = vgs * vgs_eff; + dT2_dVg = vgs * dvgs_eff_dvg + vgs_eff; + T11 = pParam->BSIM4v5AechvbEdge; + T12 = pParam->BSIM4v5BechvbEdge; + T3 = pParam->BSIM4v5aigsd * pParam->BSIM4v5cigsd + - pParam->BSIM4v5bigsd; + T4 = pParam->BSIM4v5bigsd * pParam->BSIM4v5cigsd; + T5 = T12 * (pParam->BSIM4v5aigsd + T3 * vgs_eff + - T4 * vgs_eff * vgs_eff); + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * vgs_eff) + * dvgs_eff_dvg; + } + Igs = T11 * T2 * T6; + dIgs_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgs_dVs = -dIgs_dVg; + + + T0 = vgd - (pParam->BSIM4v5vfbsd + pParam->BSIM4v5vfbsdoff); + vgd_eff = sqrt(T0 * T0 + 1.0e-4); + dvgd_eff_dvg = T0 / vgd_eff; + + T2 = vgd * vgd_eff; + dT2_dVg = vgd * dvgd_eff_dvg + vgd_eff; + T5 = T12 * (pParam->BSIM4v5aigsd + T3 * vgd_eff + - T4 * vgd_eff * vgd_eff); + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * vgd_eff) + * dvgd_eff_dvg; + } + Igd = T11 * T2 * T6; + dIgd_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgd_dVd = -dIgd_dVg; + + here->BSIM4v5Igs = Igs; + here->BSIM4v5gIgsg = dIgs_dVg; + here->BSIM4v5gIgss = dIgs_dVs; + here->BSIM4v5Igd = Igd; + here->BSIM4v5gIgdg = dIgd_dVg; + here->BSIM4v5gIgdd = dIgd_dVd; + } + else + { here->BSIM4v5Igcs = here->BSIM4v5gIgcsg = here->BSIM4v5gIgcsd + = here->BSIM4v5gIgcsb = 0.0; + here->BSIM4v5Igcd = here->BSIM4v5gIgcdg = here->BSIM4v5gIgcdd + = here->BSIM4v5gIgcdb = 0.0; + here->BSIM4v5Igs = here->BSIM4v5gIgsg = here->BSIM4v5gIgss = 0.0; + here->BSIM4v5Igd = here->BSIM4v5gIgdg = here->BSIM4v5gIgdd = 0.0; + } + + if (model->BSIM4v5igbMod) + { T0 = tmp * pParam->BSIM4v5nigbacc; + T1 = -Vgs_eff + Vbseff + Vfb; + VxNVt = T1 / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = T1; + dVaux_dVg = -dVgs_eff_dVg; + dVaux_dVb = 1.0; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVb = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVg = -dVaux_dVb * dVgs_eff_dVg; + } + + T2 = (Vgs_eff - Vbseff) * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + (Vgs_eff - Vbseff) * dVaux_dVg; + dT2_dVb = -Vaux + (Vgs_eff - Vbseff) * dVaux_dVb; + + T11 = 4.97232e-7 * pParam->BSIM4v5weff + * pParam->BSIM4v5leff * pParam->BSIM4v5ToxRatio; + T12 = -7.45669e11 * model->BSIM4v5toxe; + T3 = pParam->BSIM4v5aigbacc * pParam->BSIM4v5cigbacc + - pParam->BSIM4v5bigbacc; + T4 = pParam->BSIM4v5bigbacc * pParam->BSIM4v5cigbacc; + T5 = T12 * (pParam->BSIM4v5aigbacc + T3 * Voxacc + - T4 * Voxacc * Voxacc); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxacc); + dT6_dVb = dT6_dVg * dVoxacc_dVb; + dT6_dVg *= dVoxacc_dVg; + } + + Igbacc = T11 * T2 * T6; + dIgbacc_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgbacc_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + + T0 = tmp * pParam->BSIM4v5nigbinv; + T1 = Voxdepinv - pParam->BSIM4v5eigbinv; + VxNVt = T1 / T0; + if (VxNVt > EXP_THRESHOLD) + { Vaux = T1; + dVaux_dVg = dVoxdepinv_dVg; + dVaux_dVd = dVoxdepinv_dVd; + dVaux_dVb = dVoxdepinv_dVb; + } + else if (VxNVt < -EXP_THRESHOLD) + { Vaux = T0 * log(1.0 + MIN_EXP); + dVaux_dVg = dVaux_dVd = dVaux_dVb = 0.0; + } + else + { ExpVxNVt = exp(VxNVt); + Vaux = T0 * log(1.0 + ExpVxNVt); + dVaux_dVg = ExpVxNVt / (1.0 + ExpVxNVt); + dVaux_dVd = dVaux_dVg * dVoxdepinv_dVd; + dVaux_dVb = dVaux_dVg * dVoxdepinv_dVb; + dVaux_dVg *= dVoxdepinv_dVg; + } + + T2 = (Vgs_eff - Vbseff) * Vaux; + dT2_dVg = dVgs_eff_dVg * Vaux + (Vgs_eff - Vbseff) * dVaux_dVg; + dT2_dVd = (Vgs_eff - Vbseff) * dVaux_dVd; + dT2_dVb = -Vaux + (Vgs_eff - Vbseff) * dVaux_dVb; + + T11 *= 0.75610; + T12 *= 1.31724; + T3 = pParam->BSIM4v5aigbinv * pParam->BSIM4v5cigbinv + - pParam->BSIM4v5bigbinv; + T4 = pParam->BSIM4v5bigbinv * pParam->BSIM4v5cigbinv; + T5 = T12 * (pParam->BSIM4v5aigbinv + T3 * Voxdepinv + - T4 * Voxdepinv * Voxdepinv); + + if (T5 > EXP_THRESHOLD) + { T6 = MAX_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else if (T5 < -EXP_THRESHOLD) + { T6 = MIN_EXP; + dT6_dVg = dT6_dVd = dT6_dVb = 0.0; + } + else + { T6 = exp(T5); + dT6_dVg = T6 * T12 * (T3 - 2.0 * T4 * Voxdepinv); + dT6_dVd = dT6_dVg * dVoxdepinv_dVd; + dT6_dVb = dT6_dVg * dVoxdepinv_dVb; + dT6_dVg *= dVoxdepinv_dVg; + } + + Igbinv = T11 * T2 * T6; + dIgbinv_dVg = T11 * (T2 * dT6_dVg + T6 * dT2_dVg); + dIgbinv_dVd = T11 * (T2 * dT6_dVd + T6 * dT2_dVd); + dIgbinv_dVb = T11 * (T2 * dT6_dVb + T6 * dT2_dVb); + + here->BSIM4v5Igb = Igbinv + Igbacc; + here->BSIM4v5gIgbg = dIgbinv_dVg + dIgbacc_dVg; + here->BSIM4v5gIgbd = dIgbinv_dVd; + here->BSIM4v5gIgbb = (dIgbinv_dVb + dIgbacc_dVb) * dVbseff_dVb; + } + else + { here->BSIM4v5Igb = here->BSIM4v5gIgbg = here->BSIM4v5gIgbd + = here->BSIM4v5gIgbs = here->BSIM4v5gIgbb = 0.0; + } /* End of Gate current */ + + if (here->BSIM4v5nf != 1.0) + { cdrain *= here->BSIM4v5nf; + here->BSIM4v5gds *= here->BSIM4v5nf; + here->BSIM4v5gm *= here->BSIM4v5nf; + here->BSIM4v5gmbs *= here->BSIM4v5nf; + here->BSIM4v5IdovVds *= here->BSIM4v5nf; + + here->BSIM4v5gbbs *= here->BSIM4v5nf; + here->BSIM4v5gbgs *= here->BSIM4v5nf; + here->BSIM4v5gbds *= here->BSIM4v5nf; + here->BSIM4v5csub *= here->BSIM4v5nf; + + here->BSIM4v5Igidl *= here->BSIM4v5nf; + here->BSIM4v5ggidld *= here->BSIM4v5nf; + here->BSIM4v5ggidlg *= here->BSIM4v5nf; + here->BSIM4v5ggidlb *= here->BSIM4v5nf; + + here->BSIM4v5Igisl *= here->BSIM4v5nf; + here->BSIM4v5ggisls *= here->BSIM4v5nf; + here->BSIM4v5ggislg *= here->BSIM4v5nf; + here->BSIM4v5ggislb *= here->BSIM4v5nf; + + here->BSIM4v5Igcs *= here->BSIM4v5nf; + here->BSIM4v5gIgcsg *= here->BSIM4v5nf; + here->BSIM4v5gIgcsd *= here->BSIM4v5nf; + here->BSIM4v5gIgcsb *= here->BSIM4v5nf; + here->BSIM4v5Igcd *= here->BSIM4v5nf; + here->BSIM4v5gIgcdg *= here->BSIM4v5nf; + here->BSIM4v5gIgcdd *= here->BSIM4v5nf; + here->BSIM4v5gIgcdb *= here->BSIM4v5nf; + + here->BSIM4v5Igs *= here->BSIM4v5nf; + here->BSIM4v5gIgsg *= here->BSIM4v5nf; + here->BSIM4v5gIgss *= here->BSIM4v5nf; + here->BSIM4v5Igd *= here->BSIM4v5nf; + here->BSIM4v5gIgdg *= here->BSIM4v5nf; + here->BSIM4v5gIgdd *= here->BSIM4v5nf; + + here->BSIM4v5Igb *= here->BSIM4v5nf; + here->BSIM4v5gIgbg *= here->BSIM4v5nf; + here->BSIM4v5gIgbd *= here->BSIM4v5nf; + here->BSIM4v5gIgbb *= here->BSIM4v5nf; + } + + here->BSIM4v5ggidls = -(here->BSIM4v5ggidld + here->BSIM4v5ggidlg + + here->BSIM4v5ggidlb); + here->BSIM4v5ggisld = -(here->BSIM4v5ggisls + here->BSIM4v5ggislg + + here->BSIM4v5ggislb); + here->BSIM4v5gIgbs = -(here->BSIM4v5gIgbg + here->BSIM4v5gIgbd + + here->BSIM4v5gIgbb); + here->BSIM4v5gIgcss = -(here->BSIM4v5gIgcsg + here->BSIM4v5gIgcsd + + here->BSIM4v5gIgcsb); + here->BSIM4v5gIgcds = -(here->BSIM4v5gIgcdg + here->BSIM4v5gIgcdd + + here->BSIM4v5gIgcdb); + here->BSIM4v5cd = cdrain; + + + if (model->BSIM4v5tnoiMod == 0) + { Abulk = Abulk0 * pParam->BSIM4v5abulkCVfactor; + Vdsat = Vgsteff / Abulk; + T0 = Vdsat - Vds - DELTA_4; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * Vdsat); + if (T0 >= 0.0) + Vdseff = Vdsat - 0.5 * (T0 + T1); + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = Vdsat * T3 / (T1 - T0); + Vdseff = Vdsat * T4; + } + if (Vds == 0.0) + Vdseff = 0.0; + + T0 = Abulk * Vdseff; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.0e-20); + T2 = Vdseff / T1; + T3 = T0 * T2; + here->BSIM4v5qinv = Coxeff * pParam->BSIM4v5weffCV * here->BSIM4v5nf + * pParam->BSIM4v5leffCV + * (Vgsteff - 0.5 * T0 + Abulk * T3); + } + + /* + * BSIM4v5 C-V begins + */ + + if ((model->BSIM4v5xpart < 0) || (!ChargeComputationNeeded)) + { qgate = qdrn = qsrc = qbulk = 0.0; + here->BSIM4v5cggb = here->BSIM4v5cgsb = here->BSIM4v5cgdb = 0.0; + here->BSIM4v5cdgb = here->BSIM4v5cdsb = here->BSIM4v5cddb = 0.0; + here->BSIM4v5cbgb = here->BSIM4v5cbsb = here->BSIM4v5cbdb = 0.0; + here->BSIM4v5csgb = here->BSIM4v5cssb = here->BSIM4v5csdb = 0.0; + here->BSIM4v5cgbb = here->BSIM4v5csbb = here->BSIM4v5cdbb = here->BSIM4v5cbbb = 0.0; + here->BSIM4v5cqdb = here->BSIM4v5cqsb = here->BSIM4v5cqgb + = here->BSIM4v5cqbb = 0.0; + here->BSIM4v5gtau = 0.0; + goto finished; + } + else if (model->BSIM4v5capMod == 0) + { + if (Vbseff < 0.0) + { Vbseff = Vbs; + dVbseff_dVb = 1.0; + } + else + { Vbseff = pParam->BSIM4v5phi - Phis; + dVbseff_dVb = -dPhis_dVb; + } + + Vfb = pParam->BSIM4v5vfbcv; + Vth = Vfb + pParam->BSIM4v5phi + pParam->BSIM4v5k1ox * sqrtPhis; + Vgst = Vgs_eff - Vth; + dVth_dVb = pParam->BSIM4v5k1ox * dsqrtPhis_dVb; + dVgst_dVb = -dVth_dVb; + dVgst_dVg = dVgs_eff_dVg; + + CoxWL = model->BSIM4v5coxe * pParam->BSIM4v5weffCV + * pParam->BSIM4v5leffCV * here->BSIM4v5nf; + Arg1 = Vgs_eff - Vbseff - Vfb; + + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + qbulk = -qgate; + qdrn = 0.0; + + here->BSIM4v5cggb = CoxWL * dVgs_eff_dVg; + here->BSIM4v5cgdb = 0.0; + here->BSIM4v5cgsb = CoxWL * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM4v5cdgb = 0.0; + here->BSIM4v5cddb = 0.0; + here->BSIM4v5cdsb = 0.0; + + here->BSIM4v5cbgb = -CoxWL * dVgs_eff_dVg; + here->BSIM4v5cbdb = 0.0; + here->BSIM4v5cbsb = -here->BSIM4v5cgsb; + } /* Arg1 <= 0.0, end of accumulation */ + else if (Vgst <= 0.0) + { T1 = 0.5 * pParam->BSIM4v5k1ox; + T2 = sqrt(T1 * T1 + Arg1); + qgate = CoxWL * pParam->BSIM4v5k1ox * (T2 - T1); + qbulk = -qgate; + qdrn = 0.0; + + T0 = CoxWL * T1 / T2; + here->BSIM4v5cggb = T0 * dVgs_eff_dVg; + here->BSIM4v5cgdb = 0.0; + here->BSIM4v5cgsb = T0 * (dVbseff_dVb - dVgs_eff_dVg); + + here->BSIM4v5cdgb = 0.0; + here->BSIM4v5cddb = 0.0; + here->BSIM4v5cdsb = 0.0; + + here->BSIM4v5cbgb = -here->BSIM4v5cggb; + here->BSIM4v5cbdb = 0.0; + here->BSIM4v5cbsb = -here->BSIM4v5cgsb; + } /* Vgst <= 0.0, end of depletion */ + else + { One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + + AbulkCV = Abulk0 * pParam->BSIM4v5abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v5abulkCVfactor * dAbulk0_dVb; + Vdsat = Vgst / AbulkCV; + dVdsat_dVg = dVgs_eff_dVg / AbulkCV; + dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; + + if (model->BSIM4v5xpart > 0.5) + { /* 0/100 Charge partition model */ + if (Vdsat <= Vds) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v5phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.0; + + here->BSIM4v5cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v5cgsb = -(here->BSIM4v5cggb + T2); + here->BSIM4v5cgdb = 0.0; + + here->BSIM4v5cdgb = 0.0; + here->BSIM4v5cddb = 0.0; + here->BSIM4v5cdsb = 0.0; + + here->BSIM4v5cbgb = -(here->BSIM4v5cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v5cbsb = -(here->BSIM4v5cbgb + T3); + here->BSIM4v5cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + T7 = 2.0 * Vds - T1 - 3.0 * T3; + T8 = T3 - T1 - 2.0 * Vds; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v5phi - 0.5 * (Vds - T3)); + T10 = T4 * T8; + qdrn = T4 * T7; + qbulk = -(qgate + qdrn + T10); + + T5 = T3 / T1; + here->BSIM4v5cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v5cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v5cgsb = -(here->BSIM4v5cggb + T11 + + here->BSIM4v5cgdb); + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + T7 = T9 * T7; + T8 = T9 * T8; + T9 = 2.0 * T4 * (1.0 - 3.0 * T5); + here->BSIM4v5cdgb = (T7 * dAlphaz_dVg - T9 + * dVdsat_dVg) * dVgs_eff_dVg; + T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb; + here->BSIM4v5cddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5); + here->BSIM4v5cdsb = -(here->BSIM4v5cdgb + T12 + + here->BSIM4v5cddb); + + T9 = 2.0 * T4 * (1.0 + T5); + T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb; + T12 = T4 * (2.0 * T2 + T5 - 1.0); + T0 = -(T10 + T11 + T12); + + here->BSIM4v5cbgb = -(here->BSIM4v5cggb + + here->BSIM4v5cdgb + T10); + here->BSIM4v5cbdb = -(here->BSIM4v5cgdb + + here->BSIM4v5cddb + T12); + here->BSIM4v5cbsb = -(here->BSIM4v5cgsb + + here->BSIM4v5cdsb + T0); + } + } + else if (model->BSIM4v5xpart < 0.5) + { /* 40/60 Charge partition model */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v5phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.4 * T2; + + here->BSIM4v5cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v5cgsb = -(here->BSIM4v5cggb + T2); + here->BSIM4v5cgdb = 0.0; + + T3 = 0.4 * Two_Third_CoxWL; + here->BSIM4v5cdgb = -T3 * dVgs_eff_dVg; + here->BSIM4v5cddb = 0.0; + T4 = T3 * dVth_dVb; + here->BSIM4v5cdsb = -(T4 + here->BSIM4v5cdgb); + + here->BSIM4v5cbgb = -(here->BSIM4v5cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v5cbsb = -(here->BSIM4v5cbgb + T3); + here->BSIM4v5cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM4v5phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM4v5cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v5cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v5cgsb = -(here->BSIM4v5cggb + + here->BSIM4v5cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds + + 1.2 * Vds * Vds; + T8 = T2 / T1; + T7 = Vds - T1 - T8 * T6; + qdrn = T4 * T7; + T7 *= T9; + tmp = T8 / T1; + tmp1 = T4 * (2.0 - 4.0 * tmp * T6 + + T8 * (16.0 * Vdsat - 6.0 * Vds)); + + here->BSIM4v5cdgb = (T7 * dAlphaz_dVg - tmp1 + * dVdsat_dVg) * dVgs_eff_dVg; + T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb; + here->BSIM4v5cddb = T4 * (2.0 - (1.0 / (3.0 * T1 + * T1) + 2.0 * tmp) * T6 + T8 + * (6.0 * Vdsat - 2.4 * Vds)); + here->BSIM4v5cdsb = -(here->BSIM4v5cdgb + + T10 + here->BSIM4v5cddb); + + T7 = 2.0 * (T1 + T3); + qbulk = -(qgate - T4 * T7); + T7 *= T9; + T0 = 4.0 * T4 * (1.0 - T5); + T12 = (-T7 * dAlphaz_dVg - here->BSIM4v5cdgb + - T0 * dVdsat_dVg) * dVgs_eff_dVg; + T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; + T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) + - here->BSIM4v5cddb; + tmp = -(T10 + T11 + T12); + + here->BSIM4v5cbgb = -(here->BSIM4v5cggb + + here->BSIM4v5cdgb + T12); + here->BSIM4v5cbdb = -(here->BSIM4v5cgdb + + here->BSIM4v5cddb + T10); + here->BSIM4v5cbsb = -(here->BSIM4v5cgsb + + here->BSIM4v5cdsb + tmp); + } + } + else + { /* 50/50 partitioning */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM4v5phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.5 * T2; + + here->BSIM4v5cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM4v5cgsb = -(here->BSIM4v5cggb + T2); + here->BSIM4v5cgdb = 0.0; + + here->BSIM4v5cdgb = -One_Third_CoxWL * dVgs_eff_dVg; + here->BSIM4v5cddb = 0.0; + T4 = One_Third_CoxWL * dVth_dVb; + here->BSIM4v5cdsb = -(T4 + here->BSIM4v5cdgb); + + here->BSIM4v5cbgb = -(here->BSIM4v5cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM4v5cbsb = -(here->BSIM4v5cbgb + T3); + here->BSIM4v5cbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM4v5phi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM4v5cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM4v5cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM4v5cgsb = -(here->BSIM4v5cggb + + here->BSIM4v5cgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T7 = T1 + T3; + qdrn = -T4 * T7; + qbulk = - (qgate + qdrn + qdrn); + T7 *= T9; + T0 = T4 * (2.0 * T5 - 2.0); + + here->BSIM4v5cdgb = (T0 * dVdsat_dVg - T7 + * dAlphaz_dVg) * dVgs_eff_dVg; + T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; + here->BSIM4v5cddb = T4 * (1.0 - 2.0 * T2 - T5); + here->BSIM4v5cdsb = -(here->BSIM4v5cdgb + T12 + + here->BSIM4v5cddb); + + here->BSIM4v5cbgb = -(here->BSIM4v5cggb + + 2.0 * here->BSIM4v5cdgb); + here->BSIM4v5cbdb = -(here->BSIM4v5cgdb + + 2.0 * here->BSIM4v5cddb); + here->BSIM4v5cbsb = -(here->BSIM4v5cgsb + + 2.0 * here->BSIM4v5cdsb); + } /* end of linear region */ + } /* end of 50/50 partition */ + } /* end of inversion */ + } /* end of capMod=0 */ + else + { if (Vbseff < 0.0) + { VbseffCV = Vbseff; + dVbseffCV_dVb = 1.0; + } + else + { VbseffCV = pParam->BSIM4v5phi - Phis; + dVbseffCV_dVb = -dPhis_dVb; + } + + CoxWL = model->BSIM4v5coxe * pParam->BSIM4v5weffCV + * pParam->BSIM4v5leffCV * here->BSIM4v5nf; + + /* Seperate VgsteffCV with noff and voffcv */ + noff = n * pParam->BSIM4v5noff; + dnoff_dVd = pParam->BSIM4v5noff * dn_dVd; + dnoff_dVb = pParam->BSIM4v5noff * dn_dVb; + T0 = Vtm * noff; + voffcv = pParam->BSIM4v5voffcv; + VgstNVt = (Vgst - voffcv) / T0; + + if (VgstNVt > EXP_THRESHOLD) + { Vgsteff = Vgst - voffcv; + dVgsteff_dVg = dVgs_eff_dVg; + dVgsteff_dVd = -dVth_dVd; + dVgsteff_dVb = -dVth_dVb; + } + else if (VgstNVt < -EXP_THRESHOLD) + { Vgsteff = T0 * log(1.0 + MIN_EXP); + dVgsteff_dVg = 0.0; + dVgsteff_dVd = Vgsteff / noff; + dVgsteff_dVb = dVgsteff_dVd * dnoff_dVb; + dVgsteff_dVd *= dnoff_dVd; + } + else + { ExpVgst = exp(VgstNVt); + Vgsteff = T0 * log(1.0 + ExpVgst); + dVgsteff_dVg = ExpVgst / (1.0 + ExpVgst); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + (Vgst - voffcv) + / noff * dnoff_dVd) + Vgsteff / noff * dnoff_dVd; + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + (Vgst - voffcv) + / noff * dnoff_dVb) + Vgsteff / noff * dnoff_dVb; + dVgsteff_dVg *= dVgs_eff_dVg; + } /* End of VgsteffCV */ + + + if (model->BSIM4v5capMod == 1) + { Vfb = here->BSIM4v5vfbzb; + V3 = Vfb - Vgs_eff + VbseffCV - DELTA_3; + if (Vfb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + Qac0 = CoxWL * (Vfbeff - Vfb); + dQac0_dVg = CoxWL * dVfbeff_dVg; + dQac0_dVb = CoxWL * dVfbeff_dVb; + + T0 = 0.5 * pParam->BSIM4v5k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM4v5k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM4v5k1ox; + T2 = CoxWL; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWL * T0 / T1; + } + + Qsub0 = CoxWL * pParam->BSIM4v5k1ox * (T1 - T0); + + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg); + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + + dVgsteff_dVb); + + AbulkCV = Abulk0 * pParam->BSIM4v5abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v5abulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + + T0 = VdsatCV - Vds - DELTA_4; + dT0_dVg = 1.0 / AbulkCV; + dT0_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * VdsatCV); + dT1_dVg = (T0 + DELTA_4 + DELTA_4) / T1; + dT1_dVd = -T0 / T1; + dT1_dVb = dT1_dVg * dT0_dVb; + dT1_dVg *= dT0_dVg; + if (T0 >= 0.0) + { VdseffCV = VdsatCV - 0.5 * (T0 + T1); + dVdseffCV_dVg = 0.5 * (dT0_dVg - dT1_dVg); + dVdseffCV_dVd = 0.5 * (1.0 - dT1_dVd); + dVdseffCV_dVb = 0.5 * (dT0_dVb - dT1_dVb); + } + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = VdsatCV * T3 / (T1 - T0); + VdseffCV = VdsatCV * T4; + dVdseffCV_dVg = dT0_dVg * T4 + T5 * (dT1_dVg - dT0_dVg); + dVdseffCV_dVd = T5 * (dT1_dVd + 1.0); + dVdseffCV_dVb = dT0_dVb * (1.0 - T5) + T5 * dT1_dVb; + } + + if (Vds == 0.0) + { VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + + T0 = AbulkCV * VdseffCV; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.0e-20); + T2 = VdseffCV / T1; + T3 = T0 * T2; + + T4 = (1.0 - 12.0 * T2 * T2 * AbulkCV); + T5 = (6.0 * T0 * (4.0 * Vgsteff - T0) / (T1 * T1) - 0.5); + T6 = 12.0 * T2 * T2 * Vgsteff; + + qgate = CoxWL * (Vgsteff - 0.5 * VdseffCV + T3); + Cgg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cgd1 = CoxWL * T5 * dVdseffCV_dVd + Cgg1 * dVgsteff_dVd; + Cgb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb; + Cgg1 *= dVgsteff_dVg; + + T7 = 1.0 - AbulkCV; + qbulk = CoxWL * T7 * (0.5 * VdseffCV - T3); + T4 = -T7 * (T4 - 1.0); + T5 = -T7 * T5; + T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); + Cbg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cbd1 = CoxWL * T5 * dVdseffCV_dVd + Cbg1 * dVgsteff_dVd; + Cbb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbg1 *= dVgsteff_dVg; + + if (model->BSIM4v5xpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + T7 = (4.0 * Vgsteff - T0) / (T1 * T1); + T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); + T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); + T6 = -(0.25 * VdseffCV - 12.0 * T0 * VdseffCV * T7); + Csg = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWL * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM4v5xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + T5 = (qsrc / T1 + T2 * T7) * AbulkCV; + T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); + Csg = (T4 + T5 * dVdseffCV_dVg); + Csd = T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + + qgate += Qac0 + Qsub0; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; + Cgd = dQsub0_dVd + Cgd1; + Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM4v5cggb = Cgg; + here->BSIM4v5cgsb = -(Cgg + Cgd + Cgb); + here->BSIM4v5cgdb = Cgd; + here->BSIM4v5cdgb = -(Cgg + Cbg + Csg); + here->BSIM4v5cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM4v5cddb = -(Cgd + Cbd + Csd); + here->BSIM4v5cbgb = Cbg; + here->BSIM4v5cbsb = -(Cbg + Cbd + Cbb); + here->BSIM4v5cbdb = Cbd; + } + + /* Charge-Thickness capMod (CTM) begins */ + else if (model->BSIM4v5capMod == 2) + { V3 = here->BSIM4v5vfbzb - Vgs_eff + VbseffCV - DELTA_3; + if (here->BSIM4v5vfbzb <= 0.0) + T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * here->BSIM4v5vfbzb); + else + T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * here->BSIM4v5vfbzb); + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = here->BSIM4v5vfbzb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + + Cox = model->BSIM4v5coxp; + Tox = 1.0e8 * model->BSIM4v5toxp; + T0 = (Vgs_eff - VbseffCV - here->BSIM4v5vfbzb) / Tox; + dT0_dVg = dVgs_eff_dVg / Tox; + dT0_dVb = -dVbseffCV_dVb / Tox; + + tmp = T0 * pParam->BSIM4v5acde; + if ((-EXP_THRESHOLD < tmp) && (tmp < EXP_THRESHOLD)) + { Tcen = pParam->BSIM4v5ldeb * exp(tmp); + dTcen_dVg = pParam->BSIM4v5acde * Tcen; + dTcen_dVb = dTcen_dVg * dT0_dVb; + dTcen_dVg *= dT0_dVg; + } + else if (tmp <= -EXP_THRESHOLD) + { Tcen = pParam->BSIM4v5ldeb * MIN_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + else + { Tcen = pParam->BSIM4v5ldeb * MAX_EXP; + dTcen_dVg = dTcen_dVb = 0.0; + } + + LINK = 1.0e-3 * model->BSIM4v5toxp; + V3 = pParam->BSIM4v5ldeb - Tcen - LINK; + V4 = sqrt(V3 * V3 + 4.0 * LINK * pParam->BSIM4v5ldeb); + Tcen = pParam->BSIM4v5ldeb - 0.5 * (V3 + V4); + T1 = 0.5 * (1.0 + V3 / V4); + dTcen_dVg *= T1; + dTcen_dVb *= T1; + + Ccen = EPSSI / Tcen; + T2 = Cox / (Cox + Ccen); + Coxeff = T2 * Ccen; + T3 = -Ccen / Tcen; + dCoxeff_dVg = T2 * T2 * T3; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / model->BSIM4v5coxe; + + Qac0 = CoxWLcen * (Vfbeff - here->BSIM4v5vfbzb); + QovCox = Qac0 / Coxeff; + dQac0_dVg = CoxWLcen * dVfbeff_dVg + + QovCox * dCoxeff_dVg; + dQac0_dVb = CoxWLcen * dVfbeff_dVb + + QovCox * dCoxeff_dVb; + + T0 = 0.5 * pParam->BSIM4v5k1ox; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM4v5k1ox == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM4v5k1ox; + T2 = CoxWLcen; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWLcen * T0 / T1; + } + + Qsub0 = CoxWLcen * pParam->BSIM4v5k1ox * (T1 - T0); + QovCox = Qsub0 / Coxeff; + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg) + + QovCox * dCoxeff_dVg; + dQsub0_dVd = -T2 * dVgsteff_dVd; + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + dVgsteff_dVb) + + QovCox * dCoxeff_dVb; + + /* Gate-bias dependent delta Phis begins */ + if (pParam->BSIM4v5k1ox <= 0.0) + { Denomi = 0.25 * pParam->BSIM4v5moin * Vtm; + T0 = 0.5 * pParam->BSIM4v5sqrtPhi; + } + else + { Denomi = pParam->BSIM4v5moin * Vtm + * pParam->BSIM4v5k1ox * pParam->BSIM4v5k1ox; + T0 = pParam->BSIM4v5k1ox * pParam->BSIM4v5sqrtPhi; + } + T1 = 2.0 * T0 + Vgsteff; + + DeltaPhi = Vtm * log(1.0 + T1 * Vgsteff / Denomi); + dDeltaPhi_dVg = 2.0 * Vtm * (T1 -T0) / (Denomi + T1 * Vgsteff); + /* End of delta Phis */ + + /* VgDP = Vgsteff - DeltaPhi */ + T0 = Vgsteff - DeltaPhi - 0.001; + dT0_dVg = 1.0 - dDeltaPhi_dVg; + T1 = sqrt(T0 * T0 + Vgsteff * 0.004); + VgDP = 0.5 * (T0 + T1); + dVgDP_dVg = 0.5 * (dT0_dVg + (T0 * dT0_dVg + 0.002) / T1); + + Tox += Tox; /* WDLiu: Tcen reevaluated below due to different Vgsteff */ + T0 = (Vgsteff + here->BSIM4v5vtfbphi2) / Tox; + tmp = exp(0.7 * log(T0)); + T1 = 1.0 + tmp; + T2 = 0.7 * tmp / (T0 * Tox); + Tcen = 1.9e-9 / T1; + dTcen_dVg = -Tcen * T2 / T1; + dTcen_dVd = dTcen_dVg * dVgsteff_dVd; + dTcen_dVb = dTcen_dVg * dVgsteff_dVb; + dTcen_dVg *= dVgsteff_dVg; + + Ccen = EPSSI / Tcen; + T0 = Cox / (Cox + Ccen); + Coxeff = T0 * Ccen; + T1 = -Ccen / Tcen; + dCoxeff_dVg = T0 * T0 * T1; + dCoxeff_dVd = dCoxeff_dVg * dTcen_dVd; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / model->BSIM4v5coxe; + + AbulkCV = Abulk0 * pParam->BSIM4v5abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM4v5abulkCVfactor * dAbulk0_dVb; + VdsatCV = VgDP / AbulkCV; + + T0 = VdsatCV - Vds - DELTA_4; + dT0_dVg = dVgDP_dVg / AbulkCV; + dT0_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_4 * VdsatCV); + dT1_dVg = (T0 + DELTA_4 + DELTA_4) / T1; + dT1_dVd = -T0 / T1; + dT1_dVb = dT1_dVg * dT0_dVb; + dT1_dVg *= dT0_dVg; + if (T0 >= 0.0) + { VdseffCV = VdsatCV - 0.5 * (T0 + T1); + dVdseffCV_dVg = 0.5 * (dT0_dVg - dT1_dVg); + dVdseffCV_dVd = 0.5 * (1.0 - dT1_dVd); + dVdseffCV_dVb = 0.5 * (dT0_dVb - dT1_dVb); + } + else + { T3 = (DELTA_4 + DELTA_4) / (T1 - T0); + T4 = 1.0 - T3; + T5 = VdsatCV * T3 / (T1 - T0); + VdseffCV = VdsatCV * T4; + dVdseffCV_dVg = dT0_dVg * T4 + T5 * (dT1_dVg - dT0_dVg); + dVdseffCV_dVd = T5 * (dT1_dVd + 1.0); + dVdseffCV_dVb = dT0_dVb * (1.0 - T5) + T5 * dT1_dVb; + } + + if (Vds == 0.0) + { VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + + T0 = AbulkCV * VdseffCV; + T1 = VgDP; + T2 = 12.0 * (T1 - 0.5 * T0 + 1.0e-20); + T3 = T0 / T2; + T4 = 1.0 - 12.0 * T3 * T3; + T5 = AbulkCV * (6.0 * T0 * (4.0 * T1 - T0) / (T2 * T2) - 0.5); + T6 = T5 * VdseffCV / AbulkCV; + + qgate = CoxWLcen * (T1 - T0 * (0.5 - T3)); + QovCox = qgate / Coxeff; + Cgg1 = CoxWLcen * (T4 * dVgDP_dVg + + T5 * dVdseffCV_dVg); + Cgd1 = CoxWLcen * T5 * dVdseffCV_dVd + Cgg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cgb1 = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cgg1 = Cgg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + + T7 = 1.0 - AbulkCV; + T8 = T2 * T2; + T9 = 12.0 * T7 * T0 * T0 / (T8 * AbulkCV); + T10 = T9 * dVgDP_dVg; + T11 = -T7 * T5 / AbulkCV; + T12 = -(T9 * T1 / AbulkCV + VdseffCV * (0.5 - T0 / T2)); + + qbulk = CoxWLcen * T7 * (0.5 * VdseffCV - T0 * VdseffCV / T2); + QovCox = qbulk / Coxeff; + Cbg1 = CoxWLcen * (T10 + T11 * dVdseffCV_dVg); + Cbd1 = CoxWLcen * T11 * dVdseffCV_dVd + Cbg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cbb1 = CoxWLcen * (T11 * dVdseffCV_dVb + T12 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cbg1 = Cbg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + + if (model->BSIM4v5xpart > 0.5) + { /* 0/100 partition */ + qsrc = -CoxWLcen * (T1 / 2.0 + T0 / 4.0 + - 0.5 * T0 * T0 / T2); + QovCox = qsrc / Coxeff; + T2 += T2; + T3 = T2 * T2; + T7 = -(0.25 - 12.0 * T0 * (4.0 * T1 - T0) / T3); + T4 = -(0.5 + 24.0 * T0 * T0 / T3) * dVgDP_dVg; + T5 = T7 * AbulkCV; + T6 = T7 * VdseffCV; + + Csg = CoxWLcen * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWLcen * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd + + QovCox * dCoxeff_dVd; + Csb = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else if (model->BSIM4v5xpart < 0.5) + { /* 40/60 partition */ + T2 = T2 / 12.0; + T3 = 0.5 * CoxWLcen / (T2 * T2); + T4 = T1 * (2.0 * T0 * T0 / 3.0 + T1 * (T1 - 4.0 + * T0 / 3.0)) - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T3 * T4; + QovCox = qsrc / Coxeff; + T8 = 4.0 / 3.0 * T1 * (T1 - T0) + 0.4 * T0 * T0; + T5 = -2.0 * qsrc / T2 - T3 * (T1 * (3.0 * T1 - 8.0 + * T0 / 3.0) + 2.0 * T0 * T0 / 3.0); + T6 = AbulkCV * (qsrc / T2 + T3 * T8); + T7 = T6 * VdseffCV / AbulkCV; + + Csg = T5 * dVgDP_dVg + T6 * dVdseffCV_dVg; + Csd = Csg * dVgsteff_dVd + T6 * dVdseffCV_dVd + + QovCox * dCoxeff_dVd; + Csb = Csg * dVgsteff_dVb + T6 * dVdseffCV_dVb + + T7 * dAbulkCV_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + } + else + { /* 50/50 partition */ + qsrc = -0.5 * qgate; + Csg = -0.5 * Cgg1; + Csd = -0.5 * Cgd1; + Csb = -0.5 * Cgb1; + } + + qgate += Qac0 + Qsub0 - qbulk; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgg = Cgg1 - Cbg; + Cgd = Cgd1 - Cbd; + Cgb = Cgb1 - Cbb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM4v5cggb = Cgg; + here->BSIM4v5cgsb = -(Cgg + Cgd + Cgb); + here->BSIM4v5cgdb = Cgd; + here->BSIM4v5cdgb = -(Cgg + Cbg + Csg); + here->BSIM4v5cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM4v5cddb = -(Cgd + Cbd + Csd); + here->BSIM4v5cbgb = Cbg; + here->BSIM4v5cbsb = -(Cbg + Cbd + Cbb); + here->BSIM4v5cbdb = Cbd; + } /* End of CTM */ + } + + here->BSIM4v5csgb = - here->BSIM4v5cggb - here->BSIM4v5cdgb - here->BSIM4v5cbgb; + here->BSIM4v5csdb = - here->BSIM4v5cgdb - here->BSIM4v5cddb - here->BSIM4v5cbdb; + here->BSIM4v5cssb = - here->BSIM4v5cgsb - here->BSIM4v5cdsb - here->BSIM4v5cbsb; + here->BSIM4v5cgbb = - here->BSIM4v5cgdb - here->BSIM4v5cggb - here->BSIM4v5cgsb; + here->BSIM4v5cdbb = - here->BSIM4v5cddb - here->BSIM4v5cdgb - here->BSIM4v5cdsb; + here->BSIM4v5cbbb = - here->BSIM4v5cbgb - here->BSIM4v5cbdb - here->BSIM4v5cbsb; + here->BSIM4v5csbb = - here->BSIM4v5cgbb - here->BSIM4v5cdbb - here->BSIM4v5cbbb; + here->BSIM4v5qgate = qgate; + here->BSIM4v5qbulk = qbulk; + here->BSIM4v5qdrn = qdrn; + here->BSIM4v5qsrc = -(qgate + qbulk + qdrn); + + /* NQS begins */ + if ((here->BSIM4v5trnqsMod) || (here->BSIM4v5acnqsMod)) + { here->BSIM4v5qchqs = qcheq = -(qbulk + qgate); + here->BSIM4v5cqgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb); + here->BSIM4v5cqdb = -(here->BSIM4v5cgdb + here->BSIM4v5cbdb); + here->BSIM4v5cqsb = -(here->BSIM4v5cgsb + here->BSIM4v5cbsb); + here->BSIM4v5cqbb = -(here->BSIM4v5cqgb + here->BSIM4v5cqdb + + here->BSIM4v5cqsb); + + CoxWL = model->BSIM4v5coxe * pParam->BSIM4v5weffCV * here->BSIM4v5nf + * pParam->BSIM4v5leffCV; + T1 = here->BSIM4v5gcrg / CoxWL; /* 1 / tau */ + here->BSIM4v5gtau = T1 * ScalingFactor; + + if (here->BSIM4v5acnqsMod) + here->BSIM4v5taunet = 1.0 / T1; + + *(ckt->CKTstate0 + here->BSIM4v5qcheq) = qcheq; + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM4v5qcheq) = + *(ckt->CKTstate0 + here->BSIM4v5qcheq); + if (here->BSIM4v5trnqsMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qcheq); + if (error) + return(error); + } + } + + +finished: + + /* Calculate junction C-V */ + if (ChargeComputationNeeded) + { czbd = model->BSIM4v5DunitAreaTempJctCap * here->BSIM4v5Adeff; /* bug fix */ + czbs = model->BSIM4v5SunitAreaTempJctCap * here->BSIM4v5Aseff; + czbdsw = model->BSIM4v5DunitLengthSidewallTempJctCap * here->BSIM4v5Pdeff; + czbdswg = model->BSIM4v5DunitLengthGateSidewallTempJctCap + * pParam->BSIM4v5weffCJ * here->BSIM4v5nf; + czbssw = model->BSIM4v5SunitLengthSidewallTempJctCap * here->BSIM4v5Pseff; + czbsswg = model->BSIM4v5SunitLengthGateSidewallTempJctCap + * pParam->BSIM4v5weffCJ * here->BSIM4v5nf; + + MJS = model->BSIM4v5SbulkJctBotGradingCoeff; + MJSWS = model->BSIM4v5SbulkJctSideGradingCoeff; + MJSWGS = model->BSIM4v5SbulkJctGateSideGradingCoeff; + + MJD = model->BSIM4v5DbulkJctBotGradingCoeff; + MJSWD = model->BSIM4v5DbulkJctSideGradingCoeff; + MJSWGD = model->BSIM4v5DbulkJctGateSideGradingCoeff; + + /* Source Bulk Junction */ + if (vbs_jct == 0.0) + { *(ckt->CKTstate0 + here->BSIM4v5qbs) = 0.0; + here->BSIM4v5capbs = czbs + czbssw + czbsswg; + } + else if (vbs_jct < 0.0) + { if (czbs > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v5PhiBS; + if (MJS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v5qbs) = model->BSIM4v5PhiBS * czbs + * (1.0 - arg * sarg) / (1.0 - MJS); + here->BSIM4v5capbs = czbs * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM4v5qbs) = 0.0; + here->BSIM4v5capbs = 0.0; + } + if (czbssw > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v5PhiBSWS; + if (MJSWS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v5qbs) += model->BSIM4v5PhiBSWS * czbssw + * (1.0 - arg * sarg) / (1.0 - MJSWS); + here->BSIM4v5capbs += czbssw * sarg; + } + if (czbsswg > 0.0) + { arg = 1.0 - vbs_jct / model->BSIM4v5PhiBSWGS; + if (MJSWGS == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWGS * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v5qbs) += model->BSIM4v5PhiBSWGS * czbsswg + * (1.0 - arg * sarg) / (1.0 - MJSWGS); + here->BSIM4v5capbs += czbsswg * sarg; + } + + } + else + { T0 = czbs + czbssw + czbsswg; + T1 = vbs_jct * (czbs * MJS / model->BSIM4v5PhiBS + czbssw * MJSWS + / model->BSIM4v5PhiBSWS + czbsswg * MJSWGS / model->BSIM4v5PhiBSWGS); + *(ckt->CKTstate0 + here->BSIM4v5qbs) = vbs_jct * (T0 + 0.5 * T1); + here->BSIM4v5capbs = T0 + T1; + } + + /* Drain Bulk Junction */ + if (vbd_jct == 0.0) + { *(ckt->CKTstate0 + here->BSIM4v5qbd) = 0.0; + here->BSIM4v5capbd = czbd + czbdsw + czbdswg; + } + else if (vbd_jct < 0.0) + { if (czbd > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v5PhiBD; + if (MJD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v5qbd) = model->BSIM4v5PhiBD* czbd + * (1.0 - arg * sarg) / (1.0 - MJD); + here->BSIM4v5capbd = czbd * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM4v5qbd) = 0.0; + here->BSIM4v5capbd = 0.0; + } + if (czbdsw > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v5PhiBSWD; + if (MJSWD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v5qbd) += model->BSIM4v5PhiBSWD * czbdsw + * (1.0 - arg * sarg) / (1.0 - MJSWD); + here->BSIM4v5capbd += czbdsw * sarg; + } + if (czbdswg > 0.0) + { arg = 1.0 - vbd_jct / model->BSIM4v5PhiBSWGD; + if (MJSWGD == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWGD * log(arg)); + *(ckt->CKTstate0 + here->BSIM4v5qbd) += model->BSIM4v5PhiBSWGD * czbdswg + * (1.0 - arg * sarg) / (1.0 - MJSWGD); + here->BSIM4v5capbd += czbdswg * sarg; + } + } + else + { T0 = czbd + czbdsw + czbdswg; + T1 = vbd_jct * (czbd * MJD / model->BSIM4v5PhiBD + czbdsw * MJSWD + / model->BSIM4v5PhiBSWD + czbdswg * MJSWGD / model->BSIM4v5PhiBSWGD); + *(ckt->CKTstate0 + here->BSIM4v5qbd) = vbd_jct * (T0 + 0.5 * T1); + here->BSIM4v5capbd = T0 + T1; + } + } + + + /* + * check convergence + */ + + if ((here->BSIM4v5off == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { if (Check == 1) + { ckt->CKTnoncon++; +#ifndef NEWCONV + } + else + { if (here->BSIM4v5mode >= 0) + { Idtot = here->BSIM4v5cd + here->BSIM4v5csub + + here->BSIM4v5Igidl - here->BSIM4v5cbd; + } + else + { Idtot = here->BSIM4v5cd + here->BSIM4v5cbd - here->BSIM4v5Igidl; /* bugfix */ + } + tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot)) + + ckt->CKTabstol; + tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot)) + + ckt->CKTabstol; + tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot)) + + ckt->CKTabstol; + tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot)) + + ckt->CKTabstol; + tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot)) + + ckt->CKTabstol; + tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot)) + + ckt->CKTabstol; + if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1) + || (fabs(cdedhat - Idedtot) >= tol2)) + { ckt->CKTnoncon++; + } + else if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4) + || (fabs(cgbhat - Igbtot) >= tol5)) + { ckt->CKTnoncon++; + } + else + { Ibtot = here->BSIM4v5cbs + here->BSIM4v5cbd + - here->BSIM4v5Igidl - here->BSIM4v5Igisl - here->BSIM4v5csub; + tol6 = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot)) + + ckt->CKTabstol; + if (fabs(cbhat - Ibtot) > tol6) + { ckt->CKTnoncon++; + } + } +#endif /* NEWCONV */ + } + } + *(ckt->CKTstate0 + here->BSIM4v5vds) = vds; + *(ckt->CKTstate0 + here->BSIM4v5vgs) = vgs; + *(ckt->CKTstate0 + here->BSIM4v5vbs) = vbs; + *(ckt->CKTstate0 + here->BSIM4v5vbd) = vbd; + *(ckt->CKTstate0 + here->BSIM4v5vges) = vges; + *(ckt->CKTstate0 + here->BSIM4v5vgms) = vgms; + *(ckt->CKTstate0 + here->BSIM4v5vdbs) = vdbs; + *(ckt->CKTstate0 + here->BSIM4v5vdbd) = vdbd; + *(ckt->CKTstate0 + here->BSIM4v5vsbs) = vsbs; + *(ckt->CKTstate0 + here->BSIM4v5vses) = vses; + *(ckt->CKTstate0 + here->BSIM4v5vdes) = vdes; + *(ckt->CKTstate0 + here->BSIM4v5qdef) = qdef; + + + if (!ChargeComputationNeeded) + goto line850; + + if (here->BSIM4v5rgateMod == 3) + { + vgdx = vgmd; + vgsx = vgms; + } + else /* For rgateMod == 0, 1 and 2 */ + { + vgdx = vgd; + vgsx = vgs; + } + if (model->BSIM4v5capMod == 0) + { + cgdo = pParam->BSIM4v5cgdo; + qgdo = pParam->BSIM4v5cgdo * vgdx; + cgso = pParam->BSIM4v5cgso; + qgso = pParam->BSIM4v5cgso * vgsx; + } + else /* For both capMod == 1 and 2 */ + { T0 = vgdx + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + + T3 = pParam->BSIM4v5weffCV * pParam->BSIM4v5cgdl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM4v5ckappad); + cgdo = pParam->BSIM4v5cgdo + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgdo = (pParam->BSIM4v5cgdo + T3) * vgdx - T3 * (T2 + + 0.5 * pParam->BSIM4v5ckappad * (T4 - 1.0)); + + T0 = vgsx + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + T3 = pParam->BSIM4v5weffCV * pParam->BSIM4v5cgsl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM4v5ckappas); + cgso = pParam->BSIM4v5cgso + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgso = (pParam->BSIM4v5cgso + T3) * vgsx - T3 * (T2 + + 0.5 * pParam->BSIM4v5ckappas * (T4 - 1.0)); + } + + if (here->BSIM4v5nf != 1.0) + { cgdo *= here->BSIM4v5nf; + cgso *= here->BSIM4v5nf; + qgdo *= here->BSIM4v5nf; + qgso *= here->BSIM4v5nf; + } + here->BSIM4v5cgdo = cgdo; + here->BSIM4v5qgdo = qgdo; + here->BSIM4v5cgso = cgso; + here->BSIM4v5qgso = qgso; + + +line755: + ag0 = ckt->CKTag[0]; + if (here->BSIM4v5mode > 0) + { if (here->BSIM4v5trnqsMod == 0) + { qdrn -= qgdo; + if (here->BSIM4v5rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v5cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v5cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcggb = here->BSIM4v5cggb * ag0; + gcgdb = here->BSIM4v5cgdb * ag0; + gcgsb = here->BSIM4v5cgsb * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = here->BSIM4v5cdgb * ag0; + gcsgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb) * ag0; + gcbgb = here->BSIM4v5cbgb * ag0; + + qgmb = pParam->BSIM4v5cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qbulk -= qgmb; + qsrc = -(qgate + qgmid + qbulk + qdrn); + } + else + { gcggb = (here->BSIM4v5cggb + cgdo + cgso + + pParam->BSIM4v5cgbo ) * ag0; + gcgdb = (here->BSIM4v5cgdb - cgdo) * ag0; + gcgsb = (here->BSIM4v5cgsb - cgso) * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = (here->BSIM4v5cdgb - cgdo) * ag0; + gcsgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb + cgso) * ag0; + gcbgb = (here->BSIM4v5cbgb - pParam->BSIM4v5cgbo) * ag0; + + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v5cgbo * vgb; + qgate += qgdo + qgso + qgb; + qbulk -= qgb; + qsrc = -(qgate + qbulk + qdrn); + } + gcddb = (here->BSIM4v5cddb + here->BSIM4v5capbd + cgdo) * ag0; + gcdsb = here->BSIM4v5cdsb * ag0; + + gcsdb = -(here->BSIM4v5cgdb + here->BSIM4v5cbdb + + here->BSIM4v5cddb) * ag0; + gcssb = (here->BSIM4v5capbs + cgso - (here->BSIM4v5cgsb + + here->BSIM4v5cbsb + here->BSIM4v5cdsb)) * ag0; + + if (!here->BSIM4v5rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb); + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb); + gcbdb = (here->BSIM4v5cbdb - here->BSIM4v5capbd) * ag0; + gcbsb = (here->BSIM4v5cbsb - here->BSIM4v5capbs) * ag0; + gcdbdb = 0.0; gcsbsb = 0.0; + } + else + { gcdbb = -(here->BSIM4v5cddb + here->BSIM4v5cdgb + + here->BSIM4v5cdsb) * ag0; + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb) + + here->BSIM4v5capbs * ag0; + gcbdb = here->BSIM4v5cbdb * ag0; + gcbsb = here->BSIM4v5cbsb * ag0; + + gcdbdb = -here->BSIM4v5capbd * ag0; + gcsbsb = -here->BSIM4v5capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { qcheq = here->BSIM4v5qchqs; + CoxWL = model->BSIM4v5coxe * pParam->BSIM4v5weffCV * here->BSIM4v5nf + * pParam->BSIM4v5leffCV; + T0 = qdef * ScalingFactor / CoxWL; + + ggtg = here->BSIM4v5gtg = T0 * here->BSIM4v5gcrgg; + ggtd = here->BSIM4v5gtd = T0 * here->BSIM4v5gcrgd; + ggts = here->BSIM4v5gts = T0 * here->BSIM4v5gcrgs; + ggtb = here->BSIM4v5gtb = T0 * here->BSIM4v5gcrgb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM4v5cqgb * ag0; + gcqdb = here->BSIM4v5cqdb * ag0; + gcqsb = here->BSIM4v5cqsb * ag0; + gcqbb = here->BSIM4v5cqbb * ag0; + + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v5xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM4v5xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = qdrn / qcheq; + Cdd = here->BSIM4v5cddb; + Csd = -(here->BSIM4v5cgdb + here->BSIM4v5cddb + + here->BSIM4v5cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM4v5cdgb; + Csg = -(here->BSIM4v5cggb + here->BSIM4v5cdgb + + here->BSIM4v5cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM4v5cdsb; + Css = -(here->BSIM4v5cgsb + here->BSIM4v5cdsb + + here->BSIM4v5cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + + if (here->BSIM4v5rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v5cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v5cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcdgb = gcsgb = gcbgb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + + qgmb = pParam->BSIM4v5cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qgate = 0.0; + qbulk = -qgmb; + qdrn = -qgdo; + qsrc = -(qgmid + qbulk + qdrn); + } + else + { gcggb = (cgdo + cgso + pParam->BSIM4v5cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + gcgbb = -pParam->BSIM4v5cgbo * ag0; + + gcdgb = gcgdb; + gcsgb = gcgsb; + gcbgb = gcgbb; + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v5cgbo * vgb; + qgate = qgdo + qgso + qgb; + qbulk = -qgb; + qdrn = -qgdo; + qsrc = -(qgate + qbulk + qdrn); + } + + gcddb = (here->BSIM4v5capbd + cgdo) * ag0; + gcdsb = gcsdb = 0.0; + gcssb = (here->BSIM4v5capbs + cgso) * ag0; + + if (!here->BSIM4v5rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdgmb); + gcsbb = -(gcsgb + gcssb + gcsgmb); + gcbdb = -here->BSIM4v5capbd * ag0; + gcbsb = -here->BSIM4v5capbs * ag0; + gcdbdb = 0.0; gcsbsb = 0.0; + } + else + { gcdbb = gcsbb = gcbdb = gcbsb = 0.0; + gcdbdb = -here->BSIM4v5capbd * ag0; + gcsbsb = -here->BSIM4v5capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + } + } + else + { if (here->BSIM4v5trnqsMod == 0) + { qsrc = qdrn - qgso; + if (here->BSIM4v5rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v5cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v5cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcggb = here->BSIM4v5cggb * ag0; + gcgdb = here->BSIM4v5cgsb * ag0; + gcgsb = here->BSIM4v5cgdb * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb) * ag0; + gcsgb = here->BSIM4v5cdgb * ag0; + gcbgb = here->BSIM4v5cbgb * ag0; + + qgmb = pParam->BSIM4v5cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qbulk -= qgmb; + qdrn = -(qgate + qgmid + qbulk + qsrc); + } + else + { gcggb = (here->BSIM4v5cggb + cgdo + cgso + + pParam->BSIM4v5cgbo ) * ag0; + gcgdb = (here->BSIM4v5cgsb - cgdo) * ag0; + gcgsb = (here->BSIM4v5cgdb - cgso) * ag0; + gcgbb = -(gcggb + gcgdb + gcgsb); + + gcdgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb + cgdo) * ag0; + gcsgb = (here->BSIM4v5cdgb - cgso) * ag0; + gcbgb = (here->BSIM4v5cbgb - pParam->BSIM4v5cgbo) * ag0; + + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v5cgbo * vgb; + qgate += qgdo + qgso + qgb; + qbulk -= qgb; + qdrn = -(qgate + qbulk + qsrc); + } + gcddb = (here->BSIM4v5capbd + cgdo - (here->BSIM4v5cgsb + + here->BSIM4v5cbsb + here->BSIM4v5cdsb)) * ag0; + gcdsb = -(here->BSIM4v5cgdb + here->BSIM4v5cbdb + + here->BSIM4v5cddb) * ag0; + + gcsdb = here->BSIM4v5cdsb * ag0; + gcssb = (here->BSIM4v5cddb + here->BSIM4v5capbs + cgso) * ag0; + + if (!here->BSIM4v5rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb); + gcsbb = -(gcsgb + gcsdb + gcssb + gcsgmb); + gcbdb = (here->BSIM4v5cbsb - here->BSIM4v5capbd) * ag0; + gcbsb = (here->BSIM4v5cbdb - here->BSIM4v5capbs) * ag0; + gcdbdb = 0.0; gcsbsb = 0.0; + } + else + { gcdbb = -(gcdgb + gcddb + gcdsb + gcdgmb) + + here->BSIM4v5capbd * ag0; + gcsbb = -(here->BSIM4v5cddb + here->BSIM4v5cdgb + + here->BSIM4v5cdsb) * ag0; + gcbdb = here->BSIM4v5cbsb * ag0; + gcbsb = here->BSIM4v5cbdb * ag0; + gcdbdb = -here->BSIM4v5capbd * ag0; + gcsbsb = -here->BSIM4v5capbs * ag0; + } + gcbbb = -(gcbgb + gcbdb + gcbsb + gcbgmb); + + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + } + else + { qcheq = here->BSIM4v5qchqs; + CoxWL = model->BSIM4v5coxe * pParam->BSIM4v5weffCV * here->BSIM4v5nf + * pParam->BSIM4v5leffCV; + T0 = qdef * ScalingFactor / CoxWL; + ggtg = here->BSIM4v5gtg = T0 * here->BSIM4v5gcrgg; + ggts = here->BSIM4v5gts = T0 * here->BSIM4v5gcrgd; + ggtd = here->BSIM4v5gtd = T0 * here->BSIM4v5gcrgs; + ggtb = here->BSIM4v5gtb = T0 * here->BSIM4v5gcrgb; + gqdef = ScalingFactor * ag0; + + gcqgb = here->BSIM4v5cqgb * ag0; + gcqdb = here->BSIM4v5cqsb * ag0; + gcqsb = here->BSIM4v5cqdb * ag0; + gcqbb = here->BSIM4v5cqbb * ag0; + + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v5xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM4v5xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = qdrn / qcheq; + Css = here->BSIM4v5cddb; + Cds = -(here->BSIM4v5cgdb + here->BSIM4v5cddb + + here->BSIM4v5cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM4v5cdgb; + Cdg = -(here->BSIM4v5cggb + here->BSIM4v5cdgb + + here->BSIM4v5cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM4v5cdsb; + Cdd = -(here->BSIM4v5cgsb + here->BSIM4v5cdsb + + here->BSIM4v5cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + + if (here->BSIM4v5rgateMod == 3) + { gcgmgmb = (cgdo + cgso + pParam->BSIM4v5cgbo) * ag0; + gcgmdb = -cgdo * ag0; + gcgmsb = -cgso * ag0; + gcgmbb = -pParam->BSIM4v5cgbo * ag0; + + gcdgmb = gcgmdb; + gcsgmb = gcgmsb; + gcbgmb = gcgmbb; + + gcdgb = gcsgb = gcbgb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + + qgmb = pParam->BSIM4v5cgbo * vgmb; + qgmid = qgdo + qgso + qgmb; + qgate = 0.0; + qbulk = -qgmb; + qdrn = -qgdo; + qsrc = -qgso; + } + else + { gcggb = (cgdo + cgso + pParam->BSIM4v5cgbo ) * ag0; + gcgdb = -cgdo * ag0; + gcgsb = -cgso * ag0; + gcgbb = -pParam->BSIM4v5cgbo * ag0; + + gcdgb = gcgdb; + gcsgb = gcgsb; + gcbgb = gcgbb; + gcdgmb = gcsgmb = gcbgmb = 0.0; + + qgb = pParam->BSIM4v5cgbo * vgb; + qgate = qgdo + qgso + qgb; + qbulk = -qgb; + qdrn = -qgdo; + qsrc = -qgso; + } + + gcddb = (here->BSIM4v5capbd + cgdo) * ag0; + gcdsb = gcsdb = 0.0; + gcssb = (here->BSIM4v5capbs + cgso) * ag0; + if (!here->BSIM4v5rbodyMod) + { gcdbb = -(gcdgb + gcddb + gcdgmb); + gcsbb = -(gcsgb + gcssb + gcsgmb); + gcbdb = -here->BSIM4v5capbd * ag0; + gcbsb = -here->BSIM4v5capbs * ag0; + gcdbdb = 0.0; gcsbsb = 0.0; + } + else + { gcdbb = gcsbb = gcbdb = gcbsb = 0.0; + gcdbdb = -here->BSIM4v5capbd * ag0; + gcsbsb = -here->BSIM4v5capbs * ag0; + } + gcbbb = -(gcbdb + gcbgb + gcbsb + gcbgmb); + } + } + + + if (here->BSIM4v5trnqsMod) + { *(ckt->CKTstate0 + here->BSIM4v5qcdump) = qdef * ScalingFactor; + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM4v5qcdump) = + *(ckt->CKTstate0 + here->BSIM4v5qcdump); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qcdump); + if (error) + return(error); + } + + if (ByPass) goto line860; + + *(ckt->CKTstate0 + here->BSIM4v5qg) = qgate; + *(ckt->CKTstate0 + here->BSIM4v5qd) = qdrn + - *(ckt->CKTstate0 + here->BSIM4v5qbd); + *(ckt->CKTstate0 + here->BSIM4v5qs) = qsrc + - *(ckt->CKTstate0 + here->BSIM4v5qbs); + if (here->BSIM4v5rgateMod == 3) + *(ckt->CKTstate0 + here->BSIM4v5qgmid) = qgmid; + + if (!here->BSIM4v5rbodyMod) + { *(ckt->CKTstate0 + here->BSIM4v5qb) = qbulk + + *(ckt->CKTstate0 + here->BSIM4v5qbd) + + *(ckt->CKTstate0 + here->BSIM4v5qbs); + } + else + *(ckt->CKTstate0 + here->BSIM4v5qb) = qbulk; + + + /* Store small signal parameters */ + if (ckt->CKTmode & MODEINITSMSIG) + { goto line1000; + } + + if (!ChargeComputationNeeded) + goto line850; + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM4v5qb) = + *(ckt->CKTstate0 + here->BSIM4v5qb); + *(ckt->CKTstate1 + here->BSIM4v5qg) = + *(ckt->CKTstate0 + here->BSIM4v5qg); + *(ckt->CKTstate1 + here->BSIM4v5qd) = + *(ckt->CKTstate0 + here->BSIM4v5qd); + if (here->BSIM4v5rgateMod == 3) + *(ckt->CKTstate1 + here->BSIM4v5qgmid) = + *(ckt->CKTstate0 + here->BSIM4v5qgmid); + if (here->BSIM4v5rbodyMod) + { *(ckt->CKTstate1 + here->BSIM4v5qbs) = + *(ckt->CKTstate0 + here->BSIM4v5qbs); + *(ckt->CKTstate1 + here->BSIM4v5qbd) = + *(ckt->CKTstate0 + here->BSIM4v5qbd); + } + } + + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qb); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qg); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qd); + if (error) + return(error); + + if (here->BSIM4v5rgateMod == 3) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qgmid); + if (error) return(error); + } + + if (here->BSIM4v5rbodyMod) + { error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qbs); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM4v5qbd); + if (error) + return(error); + } + + goto line860; + + +line850: + /* Zero gcap and ceqcap if (!ChargeComputationNeeded) */ + ceqqg = ceqqb = ceqqd = 0.0; + ceqqjd = ceqqjs = 0.0; + cqcheq = cqdef = 0.0; + + gcdgb = gcddb = gcdsb = gcdbb = 0.0; + gcsgb = gcsdb = gcssb = gcsbb = 0.0; + gcggb = gcgdb = gcgsb = gcgbb = 0.0; + gcbdb = gcbgb = gcbsb = gcbbb = 0.0; + + gcgmgmb = gcgmdb = gcgmsb = gcgmbb = 0.0; + gcdgmb = gcsgmb = gcbgmb = ceqqgmid = 0.0; + gcdbdb = gcsbsb = 0.0; + + gqdef = gcqgb = gcqdb = gcqsb = gcqbb = 0.0; + ggtg = ggtd = ggtb = ggts = 0.0; + sxpart = (1.0 - (dxpart = (here->BSIM4v5mode > 0) ? 0.4 : 0.6)); + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + + if (here->BSIM4v5trnqsMod) + { CoxWL = model->BSIM4v5coxe * pParam->BSIM4v5weffCV * here->BSIM4v5nf + * pParam->BSIM4v5leffCV; + T1 = here->BSIM4v5gcrg / CoxWL; + here->BSIM4v5gtau = T1 * ScalingFactor; + } + else + here->BSIM4v5gtau = 0.0; + + goto line900; + + +line860: + /* Calculate equivalent charge current */ + + cqgate = *(ckt->CKTstate0 + here->BSIM4v5cqg); + cqbody = *(ckt->CKTstate0 + here->BSIM4v5cqb); + cqdrn = *(ckt->CKTstate0 + here->BSIM4v5cqd); + + ceqqg = cqgate - gcggb * vgb + gcgdb * vbd + gcgsb * vbs; + ceqqd = cqdrn - gcdgb * vgb - gcdgmb * vgmb + (gcddb + gcdbdb) + * vbd - gcdbdb * vbd_jct + gcdsb * vbs; + ceqqb = cqbody - gcbgb * vgb - gcbgmb * vgmb + + gcbdb * vbd + gcbsb * vbs; + + + if (here->BSIM4v5rgateMod == 3) + ceqqgmid = *(ckt->CKTstate0 + here->BSIM4v5cqgmid) + + gcgmdb * vbd + gcgmsb * vbs - gcgmgmb * vgmb; + else + ceqqgmid = 0.0; + + if (here->BSIM4v5rbodyMod) + { ceqqjs = *(ckt->CKTstate0 + here->BSIM4v5cqbs) + gcsbsb * vbs_jct; + ceqqjd = *(ckt->CKTstate0 + here->BSIM4v5cqbd) + gcdbdb * vbd_jct; + } + + if (here->BSIM4v5trnqsMod) + { T0 = ggtg * vgb - ggtd * vbd - ggts * vbs; + ceqqg += T0; + T1 = qdef * here->BSIM4v5gtau; + ceqqd -= dxpart * T0 + T1 * (ddxpart_dVg * vgb - ddxpart_dVd + * vbd - ddxpart_dVs * vbs); + cqdef = *(ckt->CKTstate0 + here->BSIM4v5cqcdump) - gqdef * qdef; + cqcheq = *(ckt->CKTstate0 + here->BSIM4v5cqcheq) + - (gcqgb * vgb - gcqdb * vbd - gcqsb * vbs) + T0; + } + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM4v5cqb) = + *(ckt->CKTstate0 + here->BSIM4v5cqb); + *(ckt->CKTstate1 + here->BSIM4v5cqg) = + *(ckt->CKTstate0 + here->BSIM4v5cqg); + *(ckt->CKTstate1 + here->BSIM4v5cqd) = + *(ckt->CKTstate0 + here->BSIM4v5cqd); + + if (here->BSIM4v5rgateMod == 3) + *(ckt->CKTstate1 + here->BSIM4v5cqgmid) = + *(ckt->CKTstate0 + here->BSIM4v5cqgmid); + + if (here->BSIM4v5rbodyMod) + { *(ckt->CKTstate1 + here->BSIM4v5cqbs) = + *(ckt->CKTstate0 + here->BSIM4v5cqbs); + *(ckt->CKTstate1 + here->BSIM4v5cqbd) = + *(ckt->CKTstate0 + here->BSIM4v5cqbd); + } + } + + + /* + * Load current vector + */ + +line900: + if (here->BSIM4v5mode >= 0) + { Gm = here->BSIM4v5gm; + Gmbs = here->BSIM4v5gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + ceqdrn = model->BSIM4v5type * (cdrain - here->BSIM4v5gds * vds + - Gm * vgs - Gmbs * vbs); + ceqbd = model->BSIM4v5type * (here->BSIM4v5csub + here->BSIM4v5Igidl + - (here->BSIM4v5gbds + here->BSIM4v5ggidld) * vds + - (here->BSIM4v5gbgs + here->BSIM4v5ggidlg) * vgs + - (here->BSIM4v5gbbs + here->BSIM4v5ggidlb) * vbs); + ceqbs = model->BSIM4v5type * (here->BSIM4v5Igisl + here->BSIM4v5ggisls * vds + - here->BSIM4v5ggislg * vgd - here->BSIM4v5ggislb * vbd); + + gbbdp = -(here->BSIM4v5gbds); + gbbsp = here->BSIM4v5gbds + here->BSIM4v5gbgs + here->BSIM4v5gbbs; + + gbdpg = here->BSIM4v5gbgs; + gbdpdp = here->BSIM4v5gbds; + gbdpb = here->BSIM4v5gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspg = 0.0; + gbspdp = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v5igcMod) + { gIstotg = here->BSIM4v5gIgsg + here->BSIM4v5gIgcsg; + gIstotd = here->BSIM4v5gIgcsd; + gIstots = here->BSIM4v5gIgss + here->BSIM4v5gIgcss; + gIstotb = here->BSIM4v5gIgcsb; + Istoteq = model->BSIM4v5type * (here->BSIM4v5Igs + here->BSIM4v5Igcs + - gIstotg * vgs - here->BSIM4v5gIgcsd * vds + - here->BSIM4v5gIgcsb * vbs); + + gIdtotg = here->BSIM4v5gIgdg + here->BSIM4v5gIgcdg; + gIdtotd = here->BSIM4v5gIgdd + here->BSIM4v5gIgcdd; + gIdtots = here->BSIM4v5gIgcds; + gIdtotb = here->BSIM4v5gIgcdb; + Idtoteq = model->BSIM4v5type * (here->BSIM4v5Igd + here->BSIM4v5Igcd + - here->BSIM4v5gIgdg * vgd - here->BSIM4v5gIgcdg * vgs + - here->BSIM4v5gIgcdd * vds - here->BSIM4v5gIgcdb * vbs); + } + else + { gIstotg = gIstotd = gIstots = gIstotb = Istoteq = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = Idtoteq = 0.0; + } + + if (model->BSIM4v5igbMod) + { gIbtotg = here->BSIM4v5gIgbg; + gIbtotd = here->BSIM4v5gIgbd; + gIbtots = here->BSIM4v5gIgbs; + gIbtotb = here->BSIM4v5gIgbb; + Ibtoteq = model->BSIM4v5type * (here->BSIM4v5Igb + - here->BSIM4v5gIgbg * vgs - here->BSIM4v5gIgbd * vds + - here->BSIM4v5gIgbb * vbs); + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = Ibtoteq = 0.0; + + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + Igtoteq = Istoteq + Idtoteq + Ibtoteq; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = Igtoteq = 0.0; + + + if (here->BSIM4v5rgateMod == 2) + T0 = vges - vgs; + else if (here->BSIM4v5rgateMod == 3) + T0 = vgms - vgs; + if (here->BSIM4v5rgateMod > 1) + { gcrgd = here->BSIM4v5gcrgd * T0; + gcrgg = here->BSIM4v5gcrgg * T0; + gcrgs = here->BSIM4v5gcrgs * T0; + gcrgb = here->BSIM4v5gcrgb * T0; + ceqgcrg = -(gcrgd * vds + gcrgg * vgs + + gcrgb * vbs); + gcrgg -= here->BSIM4v5gcrg; + gcrg = here->BSIM4v5gcrg; + } + else + ceqgcrg = gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + } + else + { Gm = -here->BSIM4v5gm; + Gmbs = -here->BSIM4v5gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + ceqdrn = -model->BSIM4v5type * (cdrain + here->BSIM4v5gds * vds + + Gm * vgd + Gmbs * vbd); + + ceqbs = model->BSIM4v5type * (here->BSIM4v5csub + here->BSIM4v5Igisl + + (here->BSIM4v5gbds + here->BSIM4v5ggisls) * vds + - (here->BSIM4v5gbgs + here->BSIM4v5ggislg) * vgd + - (here->BSIM4v5gbbs + here->BSIM4v5ggislb) * vbd); + ceqbd = model->BSIM4v5type * (here->BSIM4v5Igidl - here->BSIM4v5ggidld * vds + - here->BSIM4v5ggidlg * vgs - here->BSIM4v5ggidlb * vbs); + + gbbsp = -(here->BSIM4v5gbds); + gbbdp = here->BSIM4v5gbds + here->BSIM4v5gbgs + here->BSIM4v5gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v5gbgs; + gbspsp = here->BSIM4v5gbds; + gbspb = here->BSIM4v5gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v5igcMod) + { gIstotg = here->BSIM4v5gIgsg + here->BSIM4v5gIgcdg; + gIstotd = here->BSIM4v5gIgcds; + gIstots = here->BSIM4v5gIgss + here->BSIM4v5gIgcdd; + gIstotb = here->BSIM4v5gIgcdb; + Istoteq = model->BSIM4v5type * (here->BSIM4v5Igs + here->BSIM4v5Igcd + - here->BSIM4v5gIgsg * vgs - here->BSIM4v5gIgcdg * vgd + + here->BSIM4v5gIgcdd * vds - here->BSIM4v5gIgcdb * vbd); + + gIdtotg = here->BSIM4v5gIgdg + here->BSIM4v5gIgcsg; + gIdtotd = here->BSIM4v5gIgdd + here->BSIM4v5gIgcss; + gIdtots = here->BSIM4v5gIgcsd; + gIdtotb = here->BSIM4v5gIgcsb; + Idtoteq = model->BSIM4v5type * (here->BSIM4v5Igd + here->BSIM4v5Igcs + - (here->BSIM4v5gIgdg + here->BSIM4v5gIgcsg) * vgd + + here->BSIM4v5gIgcsd * vds - here->BSIM4v5gIgcsb * vbd); + } + else + { gIstotg = gIstotd = gIstots = gIstotb = Istoteq = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = Idtoteq = 0.0; + } + + if (model->BSIM4v5igbMod) + { gIbtotg = here->BSIM4v5gIgbg; + gIbtotd = here->BSIM4v5gIgbs; + gIbtots = here->BSIM4v5gIgbd; + gIbtotb = here->BSIM4v5gIgbb; + Ibtoteq = model->BSIM4v5type * (here->BSIM4v5Igb + - here->BSIM4v5gIgbg * vgd + here->BSIM4v5gIgbd * vds + - here->BSIM4v5gIgbb * vbd); + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = Ibtoteq = 0.0; + + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + Igtoteq = Istoteq + Idtoteq + Ibtoteq; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = Igtoteq = 0.0; + + + if (here->BSIM4v5rgateMod == 2) + T0 = vges - vgs; + else if (here->BSIM4v5rgateMod == 3) + T0 = vgms - vgs; + if (here->BSIM4v5rgateMod > 1) + { gcrgd = here->BSIM4v5gcrgs * T0; + gcrgg = here->BSIM4v5gcrgg * T0; + gcrgs = here->BSIM4v5gcrgd * T0; + gcrgb = here->BSIM4v5gcrgb * T0; + ceqgcrg = -(gcrgg * vgd - gcrgs * vds + + gcrgb * vbd); + gcrgg -= here->BSIM4v5gcrg; + gcrg = here->BSIM4v5gcrg; + } + else + ceqgcrg = gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + } + + if (model->BSIM4v5rdsMod == 1) + { ceqgstot = model->BSIM4v5type * (here->BSIM4v5gstotd * vds + + here->BSIM4v5gstotg * vgs + here->BSIM4v5gstotb * vbs); + /* WDLiu: ceqgstot flowing away from sNodePrime */ + gstot = here->BSIM4v5gstot; + gstotd = here->BSIM4v5gstotd; + gstotg = here->BSIM4v5gstotg; + gstots = here->BSIM4v5gstots - gstot; + gstotb = here->BSIM4v5gstotb; + + ceqgdtot = -model->BSIM4v5type * (here->BSIM4v5gdtotd * vds + + here->BSIM4v5gdtotg * vgs + here->BSIM4v5gdtotb * vbs); + /* WDLiu: ceqgdtot defined as flowing into dNodePrime */ + gdtot = here->BSIM4v5gdtot; + gdtotd = here->BSIM4v5gdtotd - gdtot; + gdtotg = here->BSIM4v5gdtotg; + gdtots = here->BSIM4v5gdtots; + gdtotb = here->BSIM4v5gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = ceqgstot = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = ceqgdtot = 0.0; + } + + if (model->BSIM4v5type > 0) + { ceqjs = (here->BSIM4v5cbs - here->BSIM4v5gbs * vbs_jct); + ceqjd = (here->BSIM4v5cbd - here->BSIM4v5gbd * vbd_jct); + } + else + { ceqjs = -(here->BSIM4v5cbs - here->BSIM4v5gbs * vbs_jct); + ceqjd = -(here->BSIM4v5cbd - here->BSIM4v5gbd * vbd_jct); + ceqqg = -ceqqg; + ceqqd = -ceqqd; + ceqqb = -ceqqb; + ceqgcrg = -ceqgcrg; + + if (here->BSIM4v5trnqsMod) + { cqdef = -cqdef; + cqcheq = -cqcheq; + } + + if (here->BSIM4v5rbodyMod) + { ceqqjs = -ceqqjs; + ceqqjd = -ceqqjd; + } + + if (here->BSIM4v5rgateMod == 3) + ceqqgmid = -ceqqgmid; + } + + + /* + * Loading RHS + */ + + m = here->BSIM4v5m; + + (*(ckt->CKTrhs + here->BSIM4v5dNodePrime) += m * (ceqjd - ceqbd + ceqgdtot + - ceqdrn - ceqqd + Idtoteq)); + (*(ckt->CKTrhs + here->BSIM4v5gNodePrime) -= m * (ceqqg - ceqgcrg + Igtoteq)); + + if (here->BSIM4v5rgateMod == 2) + (*(ckt->CKTrhs + here->BSIM4v5gNodeExt) -= m * ceqgcrg); + else if (here->BSIM4v5rgateMod == 3) + (*(ckt->CKTrhs + here->BSIM4v5gNodeMid) -= m * (ceqqgmid + ceqgcrg)); + + if (!here->BSIM4v5rbodyMod) + { (*(ckt->CKTrhs + here->BSIM4v5bNodePrime) += m * (ceqbd + ceqbs - ceqjd + - ceqjs - ceqqb + Ibtoteq)); + (*(ckt->CKTrhs + here->BSIM4v5sNodePrime) += m * (ceqdrn - ceqbs + ceqjs + + ceqqg + ceqqb + ceqqd + ceqqgmid - ceqgstot + Istoteq)); + } + else + { (*(ckt->CKTrhs + here->BSIM4v5dbNode) -= m * (ceqjd + ceqqjd)); + (*(ckt->CKTrhs + here->BSIM4v5bNodePrime) += m * (ceqbd + ceqbs - ceqqb + Ibtoteq)); + (*(ckt->CKTrhs + here->BSIM4v5sbNode) -= m * (ceqjs + ceqqjs)); + (*(ckt->CKTrhs + here->BSIM4v5sNodePrime) += m * (ceqdrn - ceqbs + ceqjs + ceqqd + + ceqqg + ceqqb + ceqqjd + ceqqjs + ceqqgmid - ceqgstot + Istoteq)); + } + + if (model->BSIM4v5rdsMod) + { (*(ckt->CKTrhs + here->BSIM4v5dNode) -= m * ceqgdtot); + (*(ckt->CKTrhs + here->BSIM4v5sNode) += m * ceqgstot); + } + + if (here->BSIM4v5trnqsMod) + *(ckt->CKTrhs + here->BSIM4v5qNode) += m * (cqcheq - cqdef); + + + /* + * Loading matrix + */ + + if (!here->BSIM4v5rbodyMod) + { gjbd = here->BSIM4v5gbd; + gjbs = here->BSIM4v5gbs; + } + else + gjbd = gjbs = 0.0; + + if (!model->BSIM4v5rdsMod) + { gdpr = here->BSIM4v5drainConductance; + gspr = here->BSIM4v5sourceConductance; + } + else + gdpr = gspr = 0.0; + + geltd = here->BSIM4v5grgeltd; + + T1 = qdef * here->BSIM4v5gtau; + + if (here->BSIM4v5rgateMod == 1) + { (*(here->BSIM4v5GEgePtr) += m * geltd); + (*(here->BSIM4v5GPgePtr) -= m * geltd); + (*(here->BSIM4v5GEgpPtr) -= m * geltd); + (*(here->BSIM4v5GPgpPtr) += m * (gcggb + geltd - ggtg + gIgtotg)); + (*(here->BSIM4v5GPdpPtr) += m * (gcgdb - ggtd + gIgtotd)); + (*(here->BSIM4v5GPspPtr) += m * (gcgsb - ggts + gIgtots)); + (*(here->BSIM4v5GPbpPtr) += m * (gcgbb - ggtb + gIgtotb)); + } /* WDLiu: gcrg already subtracted from all gcrgg below */ + else if (here->BSIM4v5rgateMod == 2) + { (*(here->BSIM4v5GEgePtr) += m * gcrg); + (*(here->BSIM4v5GEgpPtr) += m * gcrgg); + (*(here->BSIM4v5GEdpPtr) += m * gcrgd); + (*(here->BSIM4v5GEspPtr) += m * gcrgs); + (*(here->BSIM4v5GEbpPtr) += m * gcrgb); + + (*(here->BSIM4v5GPgePtr) -= m * gcrg); + (*(here->BSIM4v5GPgpPtr) += m * (gcggb - gcrgg - ggtg + gIgtotg)); + (*(here->BSIM4v5GPdpPtr) += m * (gcgdb - gcrgd - ggtd + gIgtotd)); + (*(here->BSIM4v5GPspPtr) += m * (gcgsb - gcrgs - ggts + gIgtots)); + (*(here->BSIM4v5GPbpPtr) += m * (gcgbb - gcrgb - ggtb + gIgtotb)); + } + else if (here->BSIM4v5rgateMod == 3) + { (*(here->BSIM4v5GEgePtr) += m * geltd); + (*(here->BSIM4v5GEgmPtr) -= m * geltd); + (*(here->BSIM4v5GMgePtr) -= m * geltd); + (*(here->BSIM4v5GMgmPtr) += m * (geltd + gcrg + gcgmgmb)); + + (*(here->BSIM4v5GMdpPtr) += m * (gcrgd + gcgmdb)); + (*(here->BSIM4v5GMgpPtr) += m * gcrgg); + (*(here->BSIM4v5GMspPtr) += m * (gcrgs + gcgmsb)); + (*(here->BSIM4v5GMbpPtr) += m * (gcrgb + gcgmbb)); + + (*(here->BSIM4v5DPgmPtr) += m * gcdgmb); + (*(here->BSIM4v5GPgmPtr) -= m * gcrg); + (*(here->BSIM4v5SPgmPtr) += m * gcsgmb); + (*(here->BSIM4v5BPgmPtr) += m * gcbgmb); + + (*(here->BSIM4v5GPgpPtr) += m * (gcggb - gcrgg - ggtg + gIgtotg)); + (*(here->BSIM4v5GPdpPtr) += m * (gcgdb - gcrgd - ggtd + gIgtotd)); + (*(here->BSIM4v5GPspPtr) += m * (gcgsb - gcrgs - ggts + gIgtots)); + (*(here->BSIM4v5GPbpPtr) += m * (gcgbb - gcrgb - ggtb + gIgtotb)); + } + else + { (*(here->BSIM4v5GPgpPtr) += m * (gcggb - ggtg + gIgtotg)); + (*(here->BSIM4v5GPdpPtr) += m * (gcgdb - ggtd + gIgtotd)); + (*(here->BSIM4v5GPspPtr) += m * (gcgsb - ggts + gIgtots)); + (*(here->BSIM4v5GPbpPtr) += m * (gcgbb - ggtb + gIgtotb)); + } + + if (model->BSIM4v5rdsMod) + { (*(here->BSIM4v5DgpPtr) += m * gdtotg); + (*(here->BSIM4v5DspPtr) += m * gdtots); + (*(here->BSIM4v5DbpPtr) += m * gdtotb); + (*(here->BSIM4v5SdpPtr) += m * gstotd); + (*(here->BSIM4v5SgpPtr) += m * gstotg); + (*(here->BSIM4v5SbpPtr) += m * gstotb); + } + + (*(here->BSIM4v5DPdpPtr) += m * (gdpr + here->BSIM4v5gds + here->BSIM4v5gbd + T1 * ddxpart_dVd + - gdtotd + RevSum + gcddb + gbdpdp + dxpart * ggtd - gIdtotd)); + (*(here->BSIM4v5DPdPtr) -= m * (gdpr + gdtot)); + (*(here->BSIM4v5DPgpPtr) += m * (Gm + gcdgb - gdtotg + gbdpg - gIdtotg + + dxpart * ggtg + T1 * ddxpart_dVg)); + (*(here->BSIM4v5DPspPtr) -= m * (here->BSIM4v5gds + gdtots - dxpart * ggts + gIdtots + - T1 * ddxpart_dVs + FwdSum - gcdsb - gbdpsp)); + (*(here->BSIM4v5DPbpPtr) -= m * (gjbd + gdtotb - Gmbs - gcdbb - gbdpb + gIdtotb + - T1 * ddxpart_dVb - dxpart * ggtb)); + + (*(here->BSIM4v5DdpPtr) -= m * (gdpr - gdtotd)); + (*(here->BSIM4v5DdPtr) += m * (gdpr + gdtot)); + + (*(here->BSIM4v5SPdpPtr) -= m * (here->BSIM4v5gds + gstotd + RevSum - gcsdb - gbspdp + - T1 * dsxpart_dVd - sxpart * ggtd + gIstotd)); + (*(here->BSIM4v5SPgpPtr) += m * (gcsgb - Gm - gstotg + gbspg + sxpart * ggtg + + T1 * dsxpart_dVg - gIstotg)); + (*(here->BSIM4v5SPspPtr) += m * (gspr + here->BSIM4v5gds + here->BSIM4v5gbs + T1 * dsxpart_dVs + - gstots + FwdSum + gcssb + gbspsp + sxpart * ggts - gIstots)); + (*(here->BSIM4v5SPsPtr) -= m * (gspr + gstot)); + (*(here->BSIM4v5SPbpPtr) -= m * (gjbs + gstotb + Gmbs - gcsbb - gbspb - sxpart * ggtb + - T1 * dsxpart_dVb + gIstotb)); + + (*(here->BSIM4v5SspPtr) -= m * (gspr - gstots)); + (*(here->BSIM4v5SsPtr) += m * (gspr + gstot)); + + (*(here->BSIM4v5BPdpPtr) += m * (gcbdb - gjbd + gbbdp - gIbtotd)); + (*(here->BSIM4v5BPgpPtr) += m * (gcbgb - here->BSIM4v5gbgs - gIbtotg)); + (*(here->BSIM4v5BPspPtr) += m * (gcbsb - gjbs + gbbsp - gIbtots)); + (*(here->BSIM4v5BPbpPtr) += m * (gjbd + gjbs + gcbbb - here->BSIM4v5gbbs + - gIbtotb)); + + ggidld = here->BSIM4v5ggidld; + ggidlg = here->BSIM4v5ggidlg; + ggidlb = here->BSIM4v5ggidlb; + ggislg = here->BSIM4v5ggislg; + ggisls = here->BSIM4v5ggisls; + ggislb = here->BSIM4v5ggislb; + + /* stamp gidl */ + (*(here->BSIM4v5DPdpPtr) += m * ggidld); + (*(here->BSIM4v5DPgpPtr) += m * ggidlg); + (*(here->BSIM4v5DPspPtr) -= m * (ggidlg + ggidld + ggidlb)); + (*(here->BSIM4v5DPbpPtr) += m * ggidlb); + (*(here->BSIM4v5BPdpPtr) -= m * ggidld); + (*(here->BSIM4v5BPgpPtr) -= m * ggidlg); + (*(here->BSIM4v5BPspPtr) += m * (ggidlg + ggidld + ggidlb)); + (*(here->BSIM4v5BPbpPtr) -= m * ggidlb); + /* stamp gisl */ + (*(here->BSIM4v5SPdpPtr) -= m * (ggisls + ggislg + ggislb)); + (*(here->BSIM4v5SPgpPtr) += m * ggislg); + (*(here->BSIM4v5SPspPtr) += m * ggisls); + (*(here->BSIM4v5SPbpPtr) += m * ggislb); + (*(here->BSIM4v5BPdpPtr) += m * (ggislg + ggisls + ggislb)); + (*(here->BSIM4v5BPgpPtr) -= m * ggislg); + (*(here->BSIM4v5BPspPtr) -= m * ggisls); + (*(here->BSIM4v5BPbpPtr) -= m * ggislb); + + + if (here->BSIM4v5rbodyMod) + { (*(here->BSIM4v5DPdbPtr) += m * (gcdbdb - here->BSIM4v5gbd)); + (*(here->BSIM4v5SPsbPtr) -= m * (here->BSIM4v5gbs - gcsbsb)); + + (*(here->BSIM4v5DBdpPtr) += m * (gcdbdb - here->BSIM4v5gbd)); + (*(here->BSIM4v5DBdbPtr) += m * (here->BSIM4v5gbd - gcdbdb + + here->BSIM4v5grbpd + here->BSIM4v5grbdb)); + (*(here->BSIM4v5DBbpPtr) -= m * here->BSIM4v5grbpd); + (*(here->BSIM4v5DBbPtr) -= m * here->BSIM4v5grbdb); + + (*(here->BSIM4v5BPdbPtr) -= m * here->BSIM4v5grbpd); + (*(here->BSIM4v5BPbPtr) -= m * here->BSIM4v5grbpb); + (*(here->BSIM4v5BPsbPtr) -= m * here->BSIM4v5grbps); + (*(here->BSIM4v5BPbpPtr) += m * (here->BSIM4v5grbpd + here->BSIM4v5grbps + + here->BSIM4v5grbpb)); + /* WDLiu: (gcbbb - here->BSIM4v5gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v5SBspPtr) += m * (gcsbsb - here->BSIM4v5gbs)); + (*(here->BSIM4v5SBbpPtr) -= m * here->BSIM4v5grbps); + (*(here->BSIM4v5SBbPtr) -= m * here->BSIM4v5grbsb); + (*(here->BSIM4v5SBsbPtr) += m * (here->BSIM4v5gbs - gcsbsb + + here->BSIM4v5grbps + here->BSIM4v5grbsb)); + + (*(here->BSIM4v5BdbPtr) -= m * here->BSIM4v5grbdb); + (*(here->BSIM4v5BbpPtr) -= m * here->BSIM4v5grbpb); + (*(here->BSIM4v5BsbPtr) -= m * here->BSIM4v5grbsb); + (*(here->BSIM4v5BbPtr) += m * (here->BSIM4v5grbsb + here->BSIM4v5grbdb + + here->BSIM4v5grbpb)); + } + + if (here->BSIM4v5trnqsMod) + { (*(here->BSIM4v5QqPtr) += m * (gqdef + here->BSIM4v5gtau)); + (*(here->BSIM4v5QgpPtr) += m * (ggtg - gcqgb)); + (*(here->BSIM4v5QdpPtr) += m * (ggtd - gcqdb)); + (*(here->BSIM4v5QspPtr) += m * (ggts - gcqsb)); + (*(here->BSIM4v5QbpPtr) += m * (ggtb - gcqbb)); + + (*(here->BSIM4v5DPqPtr) += m * dxpart * here->BSIM4v5gtau); + (*(here->BSIM4v5SPqPtr) += m * sxpart * here->BSIM4v5gtau); + (*(here->BSIM4v5GPqPtr) -= m * here->BSIM4v5gtau); + } + +line1000: ; + + } /* End of MOSFET Instance */ +} /* End of Model Instance */ + +return(OK); +} + +/* function to compute poly depletion effect */ +int BSIM4v5polyDepletion( + double phi, + double ngate, + double coxe, + double Vgs, + double *Vgs_eff, + double *dVgs_eff_dVg) +{ + double T1, T2, T3, T4, T5, T6, T7, T8; + + /* Poly Gate Si Depletion Effect */ + if ((ngate > 1.0e18) && + (ngate < 1.0e25) && (Vgs > phi)) { + T1 = 1.0e6 * CHARGE * EPSSI * ngate / (coxe * coxe); + T8 = Vgs - phi; + T4 = sqrt(1.0 + 2.0 * T8 / T1); + T2 = 2.0 * T8 / (T4 + 1.0); + T3 = 0.5 * T2 * T2 / T1; /* T3 = Vpoly */ + T7 = 1.12 - T3 - 0.05; + T6 = sqrt(T7 * T7 + 0.224); + T5 = 1.12 - 0.5 * (T7 + T6); + *Vgs_eff = Vgs - T5; + *dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); + } + else { + *Vgs_eff = Vgs; + *dVgs_eff_dVg = 1.0; + } + return(0); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5mask.c b/src/spicelib/devices/bsim4v5/b4v5mask.c new file mode 100644 index 000000000..d99d6d3e3 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5mask.c @@ -0,0 +1,2269 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4mask.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. + **********/ + + +#include "ngspice.h" +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM4v5mAsk(ckt,inst,which,value) +CKTcircuit *ckt; +GENmodel *inst; +int which; +IFvalue *value; +{ + BSIM4v5model *model = (BSIM4v5model *)inst; + switch(which) + { case BSIM4v5_MOD_MOBMOD : + value->iValue = model->BSIM4v5mobMod; + return(OK); + case BSIM4v5_MOD_PARAMCHK : + value->iValue = model->BSIM4v5paramChk; + return(OK); + case BSIM4v5_MOD_BINUNIT : + value->iValue = model->BSIM4v5binUnit; + return(OK); + case BSIM4v5_MOD_CAPMOD : + value->iValue = model->BSIM4v5capMod; + return(OK); + case BSIM4v5_MOD_DIOMOD : + value->iValue = model->BSIM4v5dioMod; + return(OK); + case BSIM4v5_MOD_TRNQSMOD : + value->iValue = model->BSIM4v5trnqsMod; + return(OK); + case BSIM4v5_MOD_ACNQSMOD : + value->iValue = model->BSIM4v5acnqsMod; + return(OK); + case BSIM4v5_MOD_FNOIMOD : + value->iValue = model->BSIM4v5fnoiMod; + return(OK); + case BSIM4v5_MOD_TNOIMOD : + value->iValue = model->BSIM4v5tnoiMod; + return(OK); + case BSIM4v5_MOD_RDSMOD : + value->iValue = model->BSIM4v5rdsMod; + return(OK); + case BSIM4v5_MOD_RBODYMOD : + value->iValue = model->BSIM4v5rbodyMod; + return(OK); + case BSIM4v5_MOD_RGATEMOD : + value->iValue = model->BSIM4v5rgateMod; + return(OK); + case BSIM4v5_MOD_PERMOD : + value->iValue = model->BSIM4v5perMod; + return(OK); + case BSIM4v5_MOD_GEOMOD : + value->iValue = model->BSIM4v5geoMod; + return(OK); + case BSIM4v5_MOD_IGCMOD : + value->iValue = model->BSIM4v5igcMod; + return(OK); + case BSIM4v5_MOD_IGBMOD : + value->iValue = model->BSIM4v5igbMod; + return(OK); + case BSIM4v5_MOD_TEMPMOD : + value->iValue = model->BSIM4v5tempMod; + return(OK); + + case BSIM4v5_MOD_VERSION : + value->sValue = model->BSIM4v5version; + return(OK); + case BSIM4v5_MOD_TOXREF : + value->rValue = model->BSIM4v5toxref; + return(OK); + case BSIM4v5_MOD_TOXE : + value->rValue = model->BSIM4v5toxe; + return(OK); + case BSIM4v5_MOD_TOXP : + value->rValue = model->BSIM4v5toxp; + return(OK); + case BSIM4v5_MOD_TOXM : + value->rValue = model->BSIM4v5toxm; + return(OK); + case BSIM4v5_MOD_DTOX : + value->rValue = model->BSIM4v5dtox; + return(OK); + case BSIM4v5_MOD_EPSROX : + value->rValue = model->BSIM4v5epsrox; + return(OK); + case BSIM4v5_MOD_CDSC : + value->rValue = model->BSIM4v5cdsc; + return(OK); + case BSIM4v5_MOD_CDSCB : + value->rValue = model->BSIM4v5cdscb; + return(OK); + + case BSIM4v5_MOD_CDSCD : + value->rValue = model->BSIM4v5cdscd; + return(OK); + + case BSIM4v5_MOD_CIT : + value->rValue = model->BSIM4v5cit; + return(OK); + case BSIM4v5_MOD_NFACTOR : + value->rValue = model->BSIM4v5nfactor; + return(OK); + case BSIM4v5_MOD_XJ: + value->rValue = model->BSIM4v5xj; + return(OK); + case BSIM4v5_MOD_VSAT: + value->rValue = model->BSIM4v5vsat; + return(OK); + case BSIM4v5_MOD_VTL: + value->rValue = model->BSIM4v5vtl; + return(OK); + case BSIM4v5_MOD_XN: + value->rValue = model->BSIM4v5xn; + return(OK); + case BSIM4v5_MOD_LC: + value->rValue = model->BSIM4v5lc; + return(OK); + case BSIM4v5_MOD_LAMBDA: + value->rValue = model->BSIM4v5lambda; + return(OK); + case BSIM4v5_MOD_AT: + value->rValue = model->BSIM4v5at; + return(OK); + case BSIM4v5_MOD_A0: + value->rValue = model->BSIM4v5a0; + return(OK); + + case BSIM4v5_MOD_AGS: + value->rValue = model->BSIM4v5ags; + return(OK); + + case BSIM4v5_MOD_A1: + value->rValue = model->BSIM4v5a1; + return(OK); + case BSIM4v5_MOD_A2: + value->rValue = model->BSIM4v5a2; + return(OK); + case BSIM4v5_MOD_KETA: + value->rValue = model->BSIM4v5keta; + return(OK); + case BSIM4v5_MOD_NSUB: + value->rValue = model->BSIM4v5nsub; + return(OK); + case BSIM4v5_MOD_NDEP: + value->rValue = model->BSIM4v5ndep; + return(OK); + case BSIM4v5_MOD_NSD: + value->rValue = model->BSIM4v5nsd; + return(OK); + case BSIM4v5_MOD_NGATE: + value->rValue = model->BSIM4v5ngate; + return(OK); + case BSIM4v5_MOD_GAMMA1: + value->rValue = model->BSIM4v5gamma1; + return(OK); + case BSIM4v5_MOD_GAMMA2: + value->rValue = model->BSIM4v5gamma2; + return(OK); + case BSIM4v5_MOD_VBX: + value->rValue = model->BSIM4v5vbx; + return(OK); + case BSIM4v5_MOD_VBM: + value->rValue = model->BSIM4v5vbm; + return(OK); + case BSIM4v5_MOD_XT: + value->rValue = model->BSIM4v5xt; + return(OK); + case BSIM4v5_MOD_K1: + value->rValue = model->BSIM4v5k1; + return(OK); + case BSIM4v5_MOD_KT1: + value->rValue = model->BSIM4v5kt1; + return(OK); + case BSIM4v5_MOD_KT1L: + value->rValue = model->BSIM4v5kt1l; + return(OK); + case BSIM4v5_MOD_KT2 : + value->rValue = model->BSIM4v5kt2; + return(OK); + case BSIM4v5_MOD_K2 : + value->rValue = model->BSIM4v5k2; + return(OK); + case BSIM4v5_MOD_K3: + value->rValue = model->BSIM4v5k3; + return(OK); + case BSIM4v5_MOD_K3B: + value->rValue = model->BSIM4v5k3b; + return(OK); + case BSIM4v5_MOD_W0: + value->rValue = model->BSIM4v5w0; + return(OK); + case BSIM4v5_MOD_LPE0: + value->rValue = model->BSIM4v5lpe0; + return(OK); + case BSIM4v5_MOD_LPEB: + value->rValue = model->BSIM4v5lpeb; + return(OK); + case BSIM4v5_MOD_DVTP0: + value->rValue = model->BSIM4v5dvtp0; + return(OK); + case BSIM4v5_MOD_DVTP1: + value->rValue = model->BSIM4v5dvtp1; + return(OK); + case BSIM4v5_MOD_DVT0 : + value->rValue = model->BSIM4v5dvt0; + return(OK); + case BSIM4v5_MOD_DVT1 : + value->rValue = model->BSIM4v5dvt1; + return(OK); + case BSIM4v5_MOD_DVT2 : + value->rValue = model->BSIM4v5dvt2; + return(OK); + case BSIM4v5_MOD_DVT0W : + value->rValue = model->BSIM4v5dvt0w; + return(OK); + case BSIM4v5_MOD_DVT1W : + value->rValue = model->BSIM4v5dvt1w; + return(OK); + case BSIM4v5_MOD_DVT2W : + value->rValue = model->BSIM4v5dvt2w; + return(OK); + case BSIM4v5_MOD_DROUT : + value->rValue = model->BSIM4v5drout; + return(OK); + case BSIM4v5_MOD_DSUB : + value->rValue = model->BSIM4v5dsub; + return(OK); + case BSIM4v5_MOD_VTH0: + value->rValue = model->BSIM4v5vth0; + return(OK); + case BSIM4v5_MOD_EU: + value->rValue = model->BSIM4v5eu; + return(OK); + case BSIM4v5_MOD_UA: + value->rValue = model->BSIM4v5ua; + return(OK); + case BSIM4v5_MOD_UA1: + value->rValue = model->BSIM4v5ua1; + return(OK); + case BSIM4v5_MOD_UB: + value->rValue = model->BSIM4v5ub; + return(OK); + case BSIM4v5_MOD_UB1: + value->rValue = model->BSIM4v5ub1; + return(OK); + case BSIM4v5_MOD_UC: + value->rValue = model->BSIM4v5uc; + return(OK); + case BSIM4v5_MOD_UC1: + value->rValue = model->BSIM4v5uc1; + return(OK); + case BSIM4v5_MOD_UD: + value->rValue = model->BSIM4v5ud; + return(OK); + case BSIM4v5_MOD_UD1: + value->rValue = model->BSIM4v5ud1; + return(OK); + case BSIM4v5_MOD_UP: + value->rValue = model->BSIM4v5up; + return(OK); + case BSIM4v5_MOD_LP: + value->rValue = model->BSIM4v5lp; + return(OK); + case BSIM4v5_MOD_U0: + value->rValue = model->BSIM4v5u0; + return(OK); + case BSIM4v5_MOD_UTE: + value->rValue = model->BSIM4v5ute; + return(OK); + case BSIM4v5_MOD_VOFF: + value->rValue = model->BSIM4v5voff; + return(OK); + case BSIM4v5_MOD_TVOFF: + value->rValue = model->BSIM4v5tvoff; + return(OK); + case BSIM4v5_MOD_VFBSDOFF: + value->rValue = model->BSIM4v5vfbsdoff; + return(OK); + case BSIM4v5_MOD_TVFBSDOFF: + value->rValue = model->BSIM4v5tvfbsdoff; + return(OK); + case BSIM4v5_MOD_VOFFL: + value->rValue = model->BSIM4v5voffl; + return(OK); + case BSIM4v5_MOD_MINV: + value->rValue = model->BSIM4v5minv; + return(OK); + case BSIM4v5_MOD_FPROUT: + value->rValue = model->BSIM4v5fprout; + return(OK); + case BSIM4v5_MOD_PDITS: + value->rValue = model->BSIM4v5pdits; + return(OK); + case BSIM4v5_MOD_PDITSD: + value->rValue = model->BSIM4v5pditsd; + return(OK); + case BSIM4v5_MOD_PDITSL: + value->rValue = model->BSIM4v5pditsl; + return(OK); + case BSIM4v5_MOD_DELTA: + value->rValue = model->BSIM4v5delta; + return(OK); + case BSIM4v5_MOD_RDSW: + value->rValue = model->BSIM4v5rdsw; + return(OK); + case BSIM4v5_MOD_RDSWMIN: + value->rValue = model->BSIM4v5rdswmin; + return(OK); + case BSIM4v5_MOD_RDWMIN: + value->rValue = model->BSIM4v5rdwmin; + return(OK); + case BSIM4v5_MOD_RSWMIN: + value->rValue = model->BSIM4v5rswmin; + return(OK); + case BSIM4v5_MOD_RDW: + value->rValue = model->BSIM4v5rdw; + return(OK); + case BSIM4v5_MOD_RSW: + value->rValue = model->BSIM4v5rsw; + return(OK); + case BSIM4v5_MOD_PRWG: + value->rValue = model->BSIM4v5prwg; + return(OK); + case BSIM4v5_MOD_PRWB: + value->rValue = model->BSIM4v5prwb; + return(OK); + case BSIM4v5_MOD_PRT: + value->rValue = model->BSIM4v5prt; + return(OK); + case BSIM4v5_MOD_ETA0: + value->rValue = model->BSIM4v5eta0; + return(OK); + case BSIM4v5_MOD_ETAB: + value->rValue = model->BSIM4v5etab; + return(OK); + case BSIM4v5_MOD_PCLM: + value->rValue = model->BSIM4v5pclm; + return(OK); + case BSIM4v5_MOD_PDIBL1: + value->rValue = model->BSIM4v5pdibl1; + return(OK); + case BSIM4v5_MOD_PDIBL2: + value->rValue = model->BSIM4v5pdibl2; + return(OK); + case BSIM4v5_MOD_PDIBLB: + value->rValue = model->BSIM4v5pdiblb; + return(OK); + case BSIM4v5_MOD_PSCBE1: + value->rValue = model->BSIM4v5pscbe1; + return(OK); + case BSIM4v5_MOD_PSCBE2: + value->rValue = model->BSIM4v5pscbe2; + return(OK); + case BSIM4v5_MOD_PVAG: + value->rValue = model->BSIM4v5pvag; + return(OK); + case BSIM4v5_MOD_WR: + value->rValue = model->BSIM4v5wr; + return(OK); + case BSIM4v5_MOD_DWG: + value->rValue = model->BSIM4v5dwg; + return(OK); + case BSIM4v5_MOD_DWB: + value->rValue = model->BSIM4v5dwb; + return(OK); + case BSIM4v5_MOD_B0: + value->rValue = model->BSIM4v5b0; + return(OK); + case BSIM4v5_MOD_B1: + value->rValue = model->BSIM4v5b1; + return(OK); + case BSIM4v5_MOD_ALPHA0: + value->rValue = model->BSIM4v5alpha0; + return(OK); + case BSIM4v5_MOD_ALPHA1: + value->rValue = model->BSIM4v5alpha1; + return(OK); + case BSIM4v5_MOD_BETA0: + value->rValue = model->BSIM4v5beta0; + return(OK); + case BSIM4v5_MOD_AGIDL: + value->rValue = model->BSIM4v5agidl; + return(OK); + case BSIM4v5_MOD_BGIDL: + value->rValue = model->BSIM4v5bgidl; + return(OK); + case BSIM4v5_MOD_CGIDL: + value->rValue = model->BSIM4v5cgidl; + return(OK); + case BSIM4v5_MOD_EGIDL: + value->rValue = model->BSIM4v5egidl; + return(OK); + case BSIM4v5_MOD_AIGC: + value->rValue = model->BSIM4v5aigc; + return(OK); + case BSIM4v5_MOD_BIGC: + value->rValue = model->BSIM4v5bigc; + return(OK); + case BSIM4v5_MOD_CIGC: + value->rValue = model->BSIM4v5cigc; + return(OK); + case BSIM4v5_MOD_AIGSD: + value->rValue = model->BSIM4v5aigsd; + return(OK); + case BSIM4v5_MOD_BIGSD: + value->rValue = model->BSIM4v5bigsd; + return(OK); + case BSIM4v5_MOD_CIGSD: + value->rValue = model->BSIM4v5cigsd; + return(OK); + case BSIM4v5_MOD_AIGBACC: + value->rValue = model->BSIM4v5aigbacc; + return(OK); + case BSIM4v5_MOD_BIGBACC: + value->rValue = model->BSIM4v5bigbacc; + return(OK); + case BSIM4v5_MOD_CIGBACC: + value->rValue = model->BSIM4v5cigbacc; + return(OK); + case BSIM4v5_MOD_AIGBINV: + value->rValue = model->BSIM4v5aigbinv; + return(OK); + case BSIM4v5_MOD_BIGBINV: + value->rValue = model->BSIM4v5bigbinv; + return(OK); + case BSIM4v5_MOD_CIGBINV: + value->rValue = model->BSIM4v5cigbinv; + return(OK); + case BSIM4v5_MOD_NIGC: + value->rValue = model->BSIM4v5nigc; + return(OK); + case BSIM4v5_MOD_NIGBACC: + value->rValue = model->BSIM4v5nigbacc; + return(OK); + case BSIM4v5_MOD_NIGBINV: + value->rValue = model->BSIM4v5nigbinv; + return(OK); + case BSIM4v5_MOD_NTOX: + value->rValue = model->BSIM4v5ntox; + return(OK); + case BSIM4v5_MOD_EIGBINV: + value->rValue = model->BSIM4v5eigbinv; + return(OK); + case BSIM4v5_MOD_PIGCD: + value->rValue = model->BSIM4v5pigcd; + return(OK); + case BSIM4v5_MOD_POXEDGE: + value->rValue = model->BSIM4v5poxedge; + return(OK); + case BSIM4v5_MOD_PHIN: + value->rValue = model->BSIM4v5phin; + return(OK); + case BSIM4v5_MOD_XRCRG1: + value->rValue = model->BSIM4v5xrcrg1; + return(OK); + case BSIM4v5_MOD_XRCRG2: + value->rValue = model->BSIM4v5xrcrg2; + return(OK); + case BSIM4v5_MOD_TNOIA: + value->rValue = model->BSIM4v5tnoia; + return(OK); + case BSIM4v5_MOD_TNOIB: + value->rValue = model->BSIM4v5tnoib; + return(OK); + case BSIM4v5_MOD_RNOIA: + value->rValue = model->BSIM4v5rnoia; + return(OK); + case BSIM4v5_MOD_RNOIB: + value->rValue = model->BSIM4v5rnoib; + return(OK); + case BSIM4v5_MOD_NTNOI: + value->rValue = model->BSIM4v5ntnoi; + return(OK); + case BSIM4v5_MOD_IJTHDFWD: + value->rValue = model->BSIM4v5ijthdfwd; + return(OK); + case BSIM4v5_MOD_IJTHSFWD: + value->rValue = model->BSIM4v5ijthsfwd; + return(OK); + case BSIM4v5_MOD_IJTHDREV: + value->rValue = model->BSIM4v5ijthdrev; + return(OK); + case BSIM4v5_MOD_IJTHSREV: + value->rValue = model->BSIM4v5ijthsrev; + return(OK); + case BSIM4v5_MOD_XJBVD: + value->rValue = model->BSIM4v5xjbvd; + return(OK); + case BSIM4v5_MOD_XJBVS: + value->rValue = model->BSIM4v5xjbvs; + return(OK); + case BSIM4v5_MOD_BVD: + value->rValue = model->BSIM4v5bvd; + return(OK); + case BSIM4v5_MOD_BVS: + value->rValue = model->BSIM4v5bvs; + return(OK); + case BSIM4v5_MOD_VFB: + value->rValue = model->BSIM4v5vfb; + return(OK); + + case BSIM4v5_MOD_JTSS: + value->rValue = model->BSIM4v5jtss; + return(OK); + case BSIM4v5_MOD_JTSD: + value->rValue = model->BSIM4v5jtsd; + return(OK); + case BSIM4v5_MOD_JTSSWS: + value->rValue = model->BSIM4v5jtssws; + return(OK); + case BSIM4v5_MOD_JTSSWD: + value->rValue = model->BSIM4v5jtsswd; + return(OK); + case BSIM4v5_MOD_JTSSWGS: + value->rValue = model->BSIM4v5jtsswgs; + return(OK); + case BSIM4v5_MOD_JTSSWGD: + value->rValue = model->BSIM4v5jtsswgd; + return(OK); + case BSIM4v5_MOD_NJTS: + value->rValue = model->BSIM4v5njts; + return(OK); + case BSIM4v5_MOD_NJTSSW: + value->rValue = model->BSIM4v5njtssw; + return(OK); + case BSIM4v5_MOD_NJTSSWG: + value->rValue = model->BSIM4v5njtsswg; + return(OK); + case BSIM4v5_MOD_XTSS: + value->rValue = model->BSIM4v5xtss; + return(OK); + case BSIM4v5_MOD_XTSD: + value->rValue = model->BSIM4v5xtsd; + return(OK); + case BSIM4v5_MOD_XTSSWS: + value->rValue = model->BSIM4v5xtssws; + return(OK); + case BSIM4v5_MOD_XTSSWD: + value->rValue = model->BSIM4v5xtsswd; + return(OK); + case BSIM4v5_MOD_XTSSWGS: + value->rValue = model->BSIM4v5xtsswgs; + return(OK); + case BSIM4v5_MOD_XTSSWGD: + value->rValue = model->BSIM4v5xtsswgd; + return(OK); + case BSIM4v5_MOD_TNJTS: + value->rValue = model->BSIM4v5tnjts; + return(OK); + case BSIM4v5_MOD_TNJTSSW: + value->rValue = model->BSIM4v5tnjtssw; + return(OK); + case BSIM4v5_MOD_TNJTSSWG: + value->rValue = model->BSIM4v5tnjtsswg; + return(OK); + case BSIM4v5_MOD_VTSS: + value->rValue = model->BSIM4v5vtss; + return(OK); + case BSIM4v5_MOD_VTSD: + value->rValue = model->BSIM4v5vtsd; + return(OK); + case BSIM4v5_MOD_VTSSWS: + value->rValue = model->BSIM4v5vtssws; + return(OK); + case BSIM4v5_MOD_VTSSWD: + value->rValue = model->BSIM4v5vtsswd; + return(OK); + case BSIM4v5_MOD_VTSSWGS: + value->rValue = model->BSIM4v5vtsswgs; + return(OK); + case BSIM4v5_MOD_VTSSWGD: + value->rValue = model->BSIM4v5vtsswgd; + return(OK); + + case BSIM4v5_MOD_GBMIN: + value->rValue = model->BSIM4v5gbmin; + return(OK); + case BSIM4v5_MOD_RBDB: + value->rValue = model->BSIM4v5rbdb; + return(OK); + case BSIM4v5_MOD_RBPB: + value->rValue = model->BSIM4v5rbpb; + return(OK); + case BSIM4v5_MOD_RBSB: + value->rValue = model->BSIM4v5rbsb; + return(OK); + case BSIM4v5_MOD_RBPS: + value->rValue = model->BSIM4v5rbps; + return(OK); + case BSIM4v5_MOD_RBPD: + value->rValue = model->BSIM4v5rbpd; + return(OK); + + case BSIM4v5_MOD_RBPS0: + value->rValue = model->BSIM4v5rbps0; + return(OK); + case BSIM4v5_MOD_RBPSL: + value->rValue = model->BSIM4v5rbpsl; + return(OK); + case BSIM4v5_MOD_RBPSW: + value->rValue = model->BSIM4v5rbpsw; + return(OK); + case BSIM4v5_MOD_RBPSNF: + value->rValue = model->BSIM4v5rbpsnf; + return(OK); + case BSIM4v5_MOD_RBPD0: + value->rValue = model->BSIM4v5rbpd0; + return(OK); + case BSIM4v5_MOD_RBPDL: + value->rValue = model->BSIM4v5rbpdl; + return(OK); + case BSIM4v5_MOD_RBPDW: + value->rValue = model->BSIM4v5rbpdw; + return(OK); + case BSIM4v5_MOD_RBPDNF: + value->rValue = model->BSIM4v5rbpdnf; + return(OK); + case BSIM4v5_MOD_RBPBX0: + value->rValue = model->BSIM4v5rbpbx0; + return(OK); + case BSIM4v5_MOD_RBPBXL: + value->rValue = model->BSIM4v5rbpbxl; + return(OK); + case BSIM4v5_MOD_RBPBXW: + value->rValue = model->BSIM4v5rbpbxw; + return(OK); + case BSIM4v5_MOD_RBPBXNF: + value->rValue = model->BSIM4v5rbpbxnf; + return(OK); + case BSIM4v5_MOD_RBPBY0: + value->rValue = model->BSIM4v5rbpby0; + return(OK); + case BSIM4v5_MOD_RBPBYL: + value->rValue = model->BSIM4v5rbpbyl; + return(OK); + case BSIM4v5_MOD_RBPBYW: + value->rValue = model->BSIM4v5rbpbyw; + return(OK); + case BSIM4v5_MOD_RBPBYNF: + value->rValue = model->BSIM4v5rbpbynf; + return(OK); + + case BSIM4v5_MOD_RBSBX0: + value->rValue = model->BSIM4v5rbsbx0; + return(OK); + case BSIM4v5_MOD_RBSBY0: + value->rValue = model->BSIM4v5rbsby0; + return(OK); + case BSIM4v5_MOD_RBDBX0: + value->rValue = model->BSIM4v5rbdbx0; + return(OK); + case BSIM4v5_MOD_RBDBY0: + value->rValue = model->BSIM4v5rbdby0; + return(OK); + case BSIM4v5_MOD_RBSDBXL: + value->rValue = model->BSIM4v5rbsdbxl; + return(OK); + case BSIM4v5_MOD_RBSDBXW: + value->rValue = model->BSIM4v5rbsdbxw; + return(OK); + case BSIM4v5_MOD_RBSDBXNF: + value->rValue = model->BSIM4v5rbsdbxnf; + return(OK); + case BSIM4v5_MOD_RBSDBYL: + value->rValue = model->BSIM4v5rbsdbyl; + return(OK); + case BSIM4v5_MOD_RBSDBYW: + value->rValue = model->BSIM4v5rbsdbyw; + return(OK); + case BSIM4v5_MOD_RBSDBYNF: + value->rValue = model->BSIM4v5rbsdbynf; + return(OK); + + + case BSIM4v5_MOD_CGSL: + value->rValue = model->BSIM4v5cgsl; + return(OK); + case BSIM4v5_MOD_CGDL: + value->rValue = model->BSIM4v5cgdl; + return(OK); + case BSIM4v5_MOD_CKAPPAS: + value->rValue = model->BSIM4v5ckappas; + return(OK); + case BSIM4v5_MOD_CKAPPAD: + value->rValue = model->BSIM4v5ckappad; + return(OK); + case BSIM4v5_MOD_CF: + value->rValue = model->BSIM4v5cf; + return(OK); + case BSIM4v5_MOD_CLC: + value->rValue = model->BSIM4v5clc; + return(OK); + case BSIM4v5_MOD_CLE: + value->rValue = model->BSIM4v5cle; + return(OK); + case BSIM4v5_MOD_DWC: + value->rValue = model->BSIM4v5dwc; + return(OK); + case BSIM4v5_MOD_DLC: + value->rValue = model->BSIM4v5dlc; + return(OK); + case BSIM4v5_MOD_XW: + value->rValue = model->BSIM4v5xw; + return(OK); + case BSIM4v5_MOD_XL: + value->rValue = model->BSIM4v5xl; + return(OK); + case BSIM4v5_MOD_DLCIG: + value->rValue = model->BSIM4v5dlcig; + return(OK); + case BSIM4v5_MOD_DWJ: + value->rValue = model->BSIM4v5dwj; + return(OK); + case BSIM4v5_MOD_VFBCV: + value->rValue = model->BSIM4v5vfbcv; + return(OK); + case BSIM4v5_MOD_ACDE: + value->rValue = model->BSIM4v5acde; + return(OK); + case BSIM4v5_MOD_MOIN: + value->rValue = model->BSIM4v5moin; + return(OK); + case BSIM4v5_MOD_NOFF: + value->rValue = model->BSIM4v5noff; + return(OK); + case BSIM4v5_MOD_VOFFCV: + value->rValue = model->BSIM4v5voffcv; + return(OK); + case BSIM4v5_MOD_DMCG: + value->rValue = model->BSIM4v5dmcg; + return(OK); + case BSIM4v5_MOD_DMCI: + value->rValue = model->BSIM4v5dmci; + return(OK); + case BSIM4v5_MOD_DMDG: + value->rValue = model->BSIM4v5dmdg; + return(OK); + case BSIM4v5_MOD_DMCGT: + value->rValue = model->BSIM4v5dmcgt; + return(OK); + case BSIM4v5_MOD_XGW: + value->rValue = model->BSIM4v5xgw; + return(OK); + case BSIM4v5_MOD_XGL: + value->rValue = model->BSIM4v5xgl; + return(OK); + case BSIM4v5_MOD_RSHG: + value->rValue = model->BSIM4v5rshg; + return(OK); + case BSIM4v5_MOD_NGCON: + value->rValue = model->BSIM4v5ngcon; + return(OK); + case BSIM4v5_MOD_TCJ: + value->rValue = model->BSIM4v5tcj; + return(OK); + case BSIM4v5_MOD_TPB: + value->rValue = model->BSIM4v5tpb; + return(OK); + case BSIM4v5_MOD_TCJSW: + value->rValue = model->BSIM4v5tcjsw; + return(OK); + case BSIM4v5_MOD_TPBSW: + value->rValue = model->BSIM4v5tpbsw; + return(OK); + case BSIM4v5_MOD_TCJSWG: + value->rValue = model->BSIM4v5tcjswg; + return(OK); + case BSIM4v5_MOD_TPBSWG: + value->rValue = model->BSIM4v5tpbswg; + return(OK); + + /* Length dependence */ + case BSIM4v5_MOD_LCDSC : + value->rValue = model->BSIM4v5lcdsc; + return(OK); + case BSIM4v5_MOD_LCDSCB : + value->rValue = model->BSIM4v5lcdscb; + return(OK); + case BSIM4v5_MOD_LCDSCD : + value->rValue = model->BSIM4v5lcdscd; + return(OK); + case BSIM4v5_MOD_LCIT : + value->rValue = model->BSIM4v5lcit; + return(OK); + case BSIM4v5_MOD_LNFACTOR : + value->rValue = model->BSIM4v5lnfactor; + return(OK); + case BSIM4v5_MOD_LXJ: + value->rValue = model->BSIM4v5lxj; + return(OK); + case BSIM4v5_MOD_LVSAT: + value->rValue = model->BSIM4v5lvsat; + return(OK); + case BSIM4v5_MOD_LAT: + value->rValue = model->BSIM4v5lat; + return(OK); + case BSIM4v5_MOD_LA0: + value->rValue = model->BSIM4v5la0; + return(OK); + case BSIM4v5_MOD_LAGS: + value->rValue = model->BSIM4v5lags; + return(OK); + case BSIM4v5_MOD_LA1: + value->rValue = model->BSIM4v5la1; + return(OK); + case BSIM4v5_MOD_LA2: + value->rValue = model->BSIM4v5la2; + return(OK); + case BSIM4v5_MOD_LKETA: + value->rValue = model->BSIM4v5lketa; + return(OK); + case BSIM4v5_MOD_LNSUB: + value->rValue = model->BSIM4v5lnsub; + return(OK); + case BSIM4v5_MOD_LNDEP: + value->rValue = model->BSIM4v5lndep; + return(OK); + case BSIM4v5_MOD_LNSD: + value->rValue = model->BSIM4v5lnsd; + return(OK); + case BSIM4v5_MOD_LNGATE: + value->rValue = model->BSIM4v5lngate; + return(OK); + case BSIM4v5_MOD_LGAMMA1: + value->rValue = model->BSIM4v5lgamma1; + return(OK); + case BSIM4v5_MOD_LGAMMA2: + value->rValue = model->BSIM4v5lgamma2; + return(OK); + case BSIM4v5_MOD_LVBX: + value->rValue = model->BSIM4v5lvbx; + return(OK); + case BSIM4v5_MOD_LVBM: + value->rValue = model->BSIM4v5lvbm; + return(OK); + case BSIM4v5_MOD_LXT: + value->rValue = model->BSIM4v5lxt; + return(OK); + case BSIM4v5_MOD_LK1: + value->rValue = model->BSIM4v5lk1; + return(OK); + case BSIM4v5_MOD_LKT1: + value->rValue = model->BSIM4v5lkt1; + return(OK); + case BSIM4v5_MOD_LKT1L: + value->rValue = model->BSIM4v5lkt1l; + return(OK); + case BSIM4v5_MOD_LKT2 : + value->rValue = model->BSIM4v5lkt2; + return(OK); + case BSIM4v5_MOD_LK2 : + value->rValue = model->BSIM4v5lk2; + return(OK); + case BSIM4v5_MOD_LK3: + value->rValue = model->BSIM4v5lk3; + return(OK); + case BSIM4v5_MOD_LK3B: + value->rValue = model->BSIM4v5lk3b; + return(OK); + case BSIM4v5_MOD_LW0: + value->rValue = model->BSIM4v5lw0; + return(OK); + case BSIM4v5_MOD_LLPE0: + value->rValue = model->BSIM4v5llpe0; + return(OK); + case BSIM4v5_MOD_LLPEB: + value->rValue = model->BSIM4v5llpeb; + return(OK); + case BSIM4v5_MOD_LDVTP0: + value->rValue = model->BSIM4v5ldvtp0; + return(OK); + case BSIM4v5_MOD_LDVTP1: + value->rValue = model->BSIM4v5ldvtp1; + return(OK); + case BSIM4v5_MOD_LDVT0: + value->rValue = model->BSIM4v5ldvt0; + return(OK); + case BSIM4v5_MOD_LDVT1 : + value->rValue = model->BSIM4v5ldvt1; + return(OK); + case BSIM4v5_MOD_LDVT2 : + value->rValue = model->BSIM4v5ldvt2; + return(OK); + case BSIM4v5_MOD_LDVT0W : + value->rValue = model->BSIM4v5ldvt0w; + return(OK); + case BSIM4v5_MOD_LDVT1W : + value->rValue = model->BSIM4v5ldvt1w; + return(OK); + case BSIM4v5_MOD_LDVT2W : + value->rValue = model->BSIM4v5ldvt2w; + return(OK); + case BSIM4v5_MOD_LDROUT : + value->rValue = model->BSIM4v5ldrout; + return(OK); + case BSIM4v5_MOD_LDSUB : + value->rValue = model->BSIM4v5ldsub; + return(OK); + case BSIM4v5_MOD_LVTH0: + value->rValue = model->BSIM4v5lvth0; + return(OK); + case BSIM4v5_MOD_LUA: + value->rValue = model->BSIM4v5lua; + return(OK); + case BSIM4v5_MOD_LUA1: + value->rValue = model->BSIM4v5lua1; + return(OK); + case BSIM4v5_MOD_LUB: + value->rValue = model->BSIM4v5lub; + return(OK); + case BSIM4v5_MOD_LUB1: + value->rValue = model->BSIM4v5lub1; + return(OK); + case BSIM4v5_MOD_LUC: + value->rValue = model->BSIM4v5luc; + return(OK); + case BSIM4v5_MOD_LUC1: + value->rValue = model->BSIM4v5luc1; + return(OK); + case BSIM4v5_MOD_LUD: + value->rValue = model->BSIM4v5lud; + return(OK); + case BSIM4v5_MOD_LUD1: + value->rValue = model->BSIM4v5lud1; + return(OK); + case BSIM4v5_MOD_LUP: + value->rValue = model->BSIM4v5lup; + return(OK); + case BSIM4v5_MOD_LLP: + value->rValue = model->BSIM4v5llp; + return(OK); + case BSIM4v5_MOD_LU0: + value->rValue = model->BSIM4v5lu0; + return(OK); + case BSIM4v5_MOD_LUTE: + value->rValue = model->BSIM4v5lute; + return(OK); + case BSIM4v5_MOD_LVOFF: + value->rValue = model->BSIM4v5lvoff; + return(OK); + case BSIM4v5_MOD_LTVOFF: + value->rValue = model->BSIM4v5ltvoff; + return(OK); + case BSIM4v5_MOD_LMINV: + value->rValue = model->BSIM4v5lminv; + return(OK); + case BSIM4v5_MOD_LFPROUT: + value->rValue = model->BSIM4v5lfprout; + return(OK); + case BSIM4v5_MOD_LPDITS: + value->rValue = model->BSIM4v5lpdits; + return(OK); + case BSIM4v5_MOD_LPDITSD: + value->rValue = model->BSIM4v5lpditsd; + return(OK); + case BSIM4v5_MOD_LDELTA: + value->rValue = model->BSIM4v5ldelta; + return(OK); + case BSIM4v5_MOD_LRDSW: + value->rValue = model->BSIM4v5lrdsw; + return(OK); + case BSIM4v5_MOD_LRDW: + value->rValue = model->BSIM4v5lrdw; + return(OK); + case BSIM4v5_MOD_LRSW: + value->rValue = model->BSIM4v5lrsw; + return(OK); + case BSIM4v5_MOD_LPRWB: + value->rValue = model->BSIM4v5lprwb; + return(OK); + case BSIM4v5_MOD_LPRWG: + value->rValue = model->BSIM4v5lprwg; + return(OK); + case BSIM4v5_MOD_LPRT: + value->rValue = model->BSIM4v5lprt; + return(OK); + case BSIM4v5_MOD_LETA0: + value->rValue = model->BSIM4v5leta0; + return(OK); + case BSIM4v5_MOD_LETAB: + value->rValue = model->BSIM4v5letab; + return(OK); + case BSIM4v5_MOD_LPCLM: + value->rValue = model->BSIM4v5lpclm; + return(OK); + case BSIM4v5_MOD_LPDIBL1: + value->rValue = model->BSIM4v5lpdibl1; + return(OK); + case BSIM4v5_MOD_LPDIBL2: + value->rValue = model->BSIM4v5lpdibl2; + return(OK); + case BSIM4v5_MOD_LPDIBLB: + value->rValue = model->BSIM4v5lpdiblb; + return(OK); + case BSIM4v5_MOD_LPSCBE1: + value->rValue = model->BSIM4v5lpscbe1; + return(OK); + case BSIM4v5_MOD_LPSCBE2: + value->rValue = model->BSIM4v5lpscbe2; + return(OK); + case BSIM4v5_MOD_LPVAG: + value->rValue = model->BSIM4v5lpvag; + return(OK); + case BSIM4v5_MOD_LWR: + value->rValue = model->BSIM4v5lwr; + return(OK); + case BSIM4v5_MOD_LDWG: + value->rValue = model->BSIM4v5ldwg; + return(OK); + case BSIM4v5_MOD_LDWB: + value->rValue = model->BSIM4v5ldwb; + return(OK); + case BSIM4v5_MOD_LB0: + value->rValue = model->BSIM4v5lb0; + return(OK); + case BSIM4v5_MOD_LB1: + value->rValue = model->BSIM4v5lb1; + return(OK); + case BSIM4v5_MOD_LALPHA0: + value->rValue = model->BSIM4v5lalpha0; + return(OK); + case BSIM4v5_MOD_LALPHA1: + value->rValue = model->BSIM4v5lalpha1; + return(OK); + case BSIM4v5_MOD_LBETA0: + value->rValue = model->BSIM4v5lbeta0; + return(OK); + case BSIM4v5_MOD_LAGIDL: + value->rValue = model->BSIM4v5lagidl; + return(OK); + case BSIM4v5_MOD_LBGIDL: + value->rValue = model->BSIM4v5lbgidl; + return(OK); + case BSIM4v5_MOD_LCGIDL: + value->rValue = model->BSIM4v5lcgidl; + return(OK); + case BSIM4v5_MOD_LEGIDL: + value->rValue = model->BSIM4v5legidl; + return(OK); + case BSIM4v5_MOD_LAIGC: + value->rValue = model->BSIM4v5laigc; + return(OK); + case BSIM4v5_MOD_LBIGC: + value->rValue = model->BSIM4v5lbigc; + return(OK); + case BSIM4v5_MOD_LCIGC: + value->rValue = model->BSIM4v5lcigc; + return(OK); + case BSIM4v5_MOD_LAIGSD: + value->rValue = model->BSIM4v5laigsd; + return(OK); + case BSIM4v5_MOD_LBIGSD: + value->rValue = model->BSIM4v5lbigsd; + return(OK); + case BSIM4v5_MOD_LCIGSD: + value->rValue = model->BSIM4v5lcigsd; + return(OK); + case BSIM4v5_MOD_LAIGBACC: + value->rValue = model->BSIM4v5laigbacc; + return(OK); + case BSIM4v5_MOD_LBIGBACC: + value->rValue = model->BSIM4v5lbigbacc; + return(OK); + case BSIM4v5_MOD_LCIGBACC: + value->rValue = model->BSIM4v5lcigbacc; + return(OK); + case BSIM4v5_MOD_LAIGBINV: + value->rValue = model->BSIM4v5laigbinv; + return(OK); + case BSIM4v5_MOD_LBIGBINV: + value->rValue = model->BSIM4v5lbigbinv; + return(OK); + case BSIM4v5_MOD_LCIGBINV: + value->rValue = model->BSIM4v5lcigbinv; + return(OK); + case BSIM4v5_MOD_LNIGC: + value->rValue = model->BSIM4v5lnigc; + return(OK); + case BSIM4v5_MOD_LNIGBACC: + value->rValue = model->BSIM4v5lnigbacc; + return(OK); + case BSIM4v5_MOD_LNIGBINV: + value->rValue = model->BSIM4v5lnigbinv; + return(OK); + case BSIM4v5_MOD_LNTOX: + value->rValue = model->BSIM4v5lntox; + return(OK); + case BSIM4v5_MOD_LEIGBINV: + value->rValue = model->BSIM4v5leigbinv; + return(OK); + case BSIM4v5_MOD_LPIGCD: + value->rValue = model->BSIM4v5lpigcd; + return(OK); + case BSIM4v5_MOD_LPOXEDGE: + value->rValue = model->BSIM4v5lpoxedge; + return(OK); + case BSIM4v5_MOD_LPHIN: + value->rValue = model->BSIM4v5lphin; + return(OK); + case BSIM4v5_MOD_LXRCRG1: + value->rValue = model->BSIM4v5lxrcrg1; + return(OK); + case BSIM4v5_MOD_LXRCRG2: + value->rValue = model->BSIM4v5lxrcrg2; + return(OK); + case BSIM4v5_MOD_LEU: + value->rValue = model->BSIM4v5leu; + return(OK); + case BSIM4v5_MOD_LVFB: + value->rValue = model->BSIM4v5lvfb; + return(OK); + + case BSIM4v5_MOD_LCGSL: + value->rValue = model->BSIM4v5lcgsl; + return(OK); + case BSIM4v5_MOD_LCGDL: + value->rValue = model->BSIM4v5lcgdl; + return(OK); + case BSIM4v5_MOD_LCKAPPAS: + value->rValue = model->BSIM4v5lckappas; + return(OK); + case BSIM4v5_MOD_LCKAPPAD: + value->rValue = model->BSIM4v5lckappad; + return(OK); + case BSIM4v5_MOD_LCF: + value->rValue = model->BSIM4v5lcf; + return(OK); + case BSIM4v5_MOD_LCLC: + value->rValue = model->BSIM4v5lclc; + return(OK); + case BSIM4v5_MOD_LCLE: + value->rValue = model->BSIM4v5lcle; + return(OK); + case BSIM4v5_MOD_LVFBCV: + value->rValue = model->BSIM4v5lvfbcv; + return(OK); + case BSIM4v5_MOD_LACDE: + value->rValue = model->BSIM4v5lacde; + return(OK); + case BSIM4v5_MOD_LMOIN: + value->rValue = model->BSIM4v5lmoin; + return(OK); + case BSIM4v5_MOD_LNOFF: + value->rValue = model->BSIM4v5lnoff; + return(OK); + case BSIM4v5_MOD_LVOFFCV: + value->rValue = model->BSIM4v5lvoffcv; + return(OK); + case BSIM4v5_MOD_LVFBSDOFF: + value->rValue = model->BSIM4v5lvfbsdoff; + return(OK); + case BSIM4v5_MOD_LTVFBSDOFF: + value->rValue = model->BSIM4v5ltvfbsdoff; + return(OK); + + /* Width dependence */ + case BSIM4v5_MOD_WCDSC : + value->rValue = model->BSIM4v5wcdsc; + return(OK); + case BSIM4v5_MOD_WCDSCB : + value->rValue = model->BSIM4v5wcdscb; + return(OK); + case BSIM4v5_MOD_WCDSCD : + value->rValue = model->BSIM4v5wcdscd; + return(OK); + case BSIM4v5_MOD_WCIT : + value->rValue = model->BSIM4v5wcit; + return(OK); + case BSIM4v5_MOD_WNFACTOR : + value->rValue = model->BSIM4v5wnfactor; + return(OK); + case BSIM4v5_MOD_WXJ: + value->rValue = model->BSIM4v5wxj; + return(OK); + case BSIM4v5_MOD_WVSAT: + value->rValue = model->BSIM4v5wvsat; + return(OK); + case BSIM4v5_MOD_WAT: + value->rValue = model->BSIM4v5wat; + return(OK); + case BSIM4v5_MOD_WA0: + value->rValue = model->BSIM4v5wa0; + return(OK); + case BSIM4v5_MOD_WAGS: + value->rValue = model->BSIM4v5wags; + return(OK); + case BSIM4v5_MOD_WA1: + value->rValue = model->BSIM4v5wa1; + return(OK); + case BSIM4v5_MOD_WA2: + value->rValue = model->BSIM4v5wa2; + return(OK); + case BSIM4v5_MOD_WKETA: + value->rValue = model->BSIM4v5wketa; + return(OK); + case BSIM4v5_MOD_WNSUB: + value->rValue = model->BSIM4v5wnsub; + return(OK); + case BSIM4v5_MOD_WNDEP: + value->rValue = model->BSIM4v5wndep; + return(OK); + case BSIM4v5_MOD_WNSD: + value->rValue = model->BSIM4v5wnsd; + return(OK); + case BSIM4v5_MOD_WNGATE: + value->rValue = model->BSIM4v5wngate; + return(OK); + case BSIM4v5_MOD_WGAMMA1: + value->rValue = model->BSIM4v5wgamma1; + return(OK); + case BSIM4v5_MOD_WGAMMA2: + value->rValue = model->BSIM4v5wgamma2; + return(OK); + case BSIM4v5_MOD_WVBX: + value->rValue = model->BSIM4v5wvbx; + return(OK); + case BSIM4v5_MOD_WVBM: + value->rValue = model->BSIM4v5wvbm; + return(OK); + case BSIM4v5_MOD_WXT: + value->rValue = model->BSIM4v5wxt; + return(OK); + case BSIM4v5_MOD_WK1: + value->rValue = model->BSIM4v5wk1; + return(OK); + case BSIM4v5_MOD_WKT1: + value->rValue = model->BSIM4v5wkt1; + return(OK); + case BSIM4v5_MOD_WKT1L: + value->rValue = model->BSIM4v5wkt1l; + return(OK); + case BSIM4v5_MOD_WKT2 : + value->rValue = model->BSIM4v5wkt2; + return(OK); + case BSIM4v5_MOD_WK2 : + value->rValue = model->BSIM4v5wk2; + return(OK); + case BSIM4v5_MOD_WK3: + value->rValue = model->BSIM4v5wk3; + return(OK); + case BSIM4v5_MOD_WK3B: + value->rValue = model->BSIM4v5wk3b; + return(OK); + case BSIM4v5_MOD_WW0: + value->rValue = model->BSIM4v5ww0; + return(OK); + case BSIM4v5_MOD_WLPE0: + value->rValue = model->BSIM4v5wlpe0; + return(OK); + case BSIM4v5_MOD_WDVTP0: + value->rValue = model->BSIM4v5wdvtp0; + return(OK); + case BSIM4v5_MOD_WDVTP1: + value->rValue = model->BSIM4v5wdvtp1; + return(OK); + case BSIM4v5_MOD_WLPEB: + value->rValue = model->BSIM4v5wlpeb; + return(OK); + case BSIM4v5_MOD_WDVT0: + value->rValue = model->BSIM4v5wdvt0; + return(OK); + case BSIM4v5_MOD_WDVT1 : + value->rValue = model->BSIM4v5wdvt1; + return(OK); + case BSIM4v5_MOD_WDVT2 : + value->rValue = model->BSIM4v5wdvt2; + return(OK); + case BSIM4v5_MOD_WDVT0W : + value->rValue = model->BSIM4v5wdvt0w; + return(OK); + case BSIM4v5_MOD_WDVT1W : + value->rValue = model->BSIM4v5wdvt1w; + return(OK); + case BSIM4v5_MOD_WDVT2W : + value->rValue = model->BSIM4v5wdvt2w; + return(OK); + case BSIM4v5_MOD_WDROUT : + value->rValue = model->BSIM4v5wdrout; + return(OK); + case BSIM4v5_MOD_WDSUB : + value->rValue = model->BSIM4v5wdsub; + return(OK); + case BSIM4v5_MOD_WVTH0: + value->rValue = model->BSIM4v5wvth0; + return(OK); + case BSIM4v5_MOD_WUA: + value->rValue = model->BSIM4v5wua; + return(OK); + case BSIM4v5_MOD_WUA1: + value->rValue = model->BSIM4v5wua1; + return(OK); + case BSIM4v5_MOD_WUB: + value->rValue = model->BSIM4v5wub; + return(OK); + case BSIM4v5_MOD_WUB1: + value->rValue = model->BSIM4v5wub1; + return(OK); + case BSIM4v5_MOD_WUC: + value->rValue = model->BSIM4v5wuc; + return(OK); + case BSIM4v5_MOD_WUC1: + value->rValue = model->BSIM4v5wuc1; + return(OK); + case BSIM4v5_MOD_WUD: + value->rValue = model->BSIM4v5wud; + return(OK); + case BSIM4v5_MOD_WUD1: + value->rValue = model->BSIM4v5wud1; + return(OK); + case BSIM4v5_MOD_WUP: + value->rValue = model->BSIM4v5wup; + return(OK); + case BSIM4v5_MOD_WLP: + value->rValue = model->BSIM4v5wlp; + return(OK); + case BSIM4v5_MOD_WU0: + value->rValue = model->BSIM4v5wu0; + return(OK); + case BSIM4v5_MOD_WUTE: + value->rValue = model->BSIM4v5wute; + return(OK); + case BSIM4v5_MOD_WVOFF: + value->rValue = model->BSIM4v5wvoff; + return(OK); + case BSIM4v5_MOD_WTVOFF: + value->rValue = model->BSIM4v5wtvoff; + return(OK); + case BSIM4v5_MOD_WMINV: + value->rValue = model->BSIM4v5wminv; + return(OK); + case BSIM4v5_MOD_WFPROUT: + value->rValue = model->BSIM4v5wfprout; + return(OK); + case BSIM4v5_MOD_WPDITS: + value->rValue = model->BSIM4v5wpdits; + return(OK); + case BSIM4v5_MOD_WPDITSD: + value->rValue = model->BSIM4v5wpditsd; + return(OK); + case BSIM4v5_MOD_WDELTA: + value->rValue = model->BSIM4v5wdelta; + return(OK); + case BSIM4v5_MOD_WRDSW: + value->rValue = model->BSIM4v5wrdsw; + return(OK); + case BSIM4v5_MOD_WRDW: + value->rValue = model->BSIM4v5wrdw; + return(OK); + case BSIM4v5_MOD_WRSW: + value->rValue = model->BSIM4v5wrsw; + return(OK); + case BSIM4v5_MOD_WPRWB: + value->rValue = model->BSIM4v5wprwb; + return(OK); + case BSIM4v5_MOD_WPRWG: + value->rValue = model->BSIM4v5wprwg; + return(OK); + case BSIM4v5_MOD_WPRT: + value->rValue = model->BSIM4v5wprt; + return(OK); + case BSIM4v5_MOD_WETA0: + value->rValue = model->BSIM4v5weta0; + return(OK); + case BSIM4v5_MOD_WETAB: + value->rValue = model->BSIM4v5wetab; + return(OK); + case BSIM4v5_MOD_WPCLM: + value->rValue = model->BSIM4v5wpclm; + return(OK); + case BSIM4v5_MOD_WPDIBL1: + value->rValue = model->BSIM4v5wpdibl1; + return(OK); + case BSIM4v5_MOD_WPDIBL2: + value->rValue = model->BSIM4v5wpdibl2; + return(OK); + case BSIM4v5_MOD_WPDIBLB: + value->rValue = model->BSIM4v5wpdiblb; + return(OK); + case BSIM4v5_MOD_WPSCBE1: + value->rValue = model->BSIM4v5wpscbe1; + return(OK); + case BSIM4v5_MOD_WPSCBE2: + value->rValue = model->BSIM4v5wpscbe2; + return(OK); + case BSIM4v5_MOD_WPVAG: + value->rValue = model->BSIM4v5wpvag; + return(OK); + case BSIM4v5_MOD_WWR: + value->rValue = model->BSIM4v5wwr; + return(OK); + case BSIM4v5_MOD_WDWG: + value->rValue = model->BSIM4v5wdwg; + return(OK); + case BSIM4v5_MOD_WDWB: + value->rValue = model->BSIM4v5wdwb; + return(OK); + case BSIM4v5_MOD_WB0: + value->rValue = model->BSIM4v5wb0; + return(OK); + case BSIM4v5_MOD_WB1: + value->rValue = model->BSIM4v5wb1; + return(OK); + case BSIM4v5_MOD_WALPHA0: + value->rValue = model->BSIM4v5walpha0; + return(OK); + case BSIM4v5_MOD_WALPHA1: + value->rValue = model->BSIM4v5walpha1; + return(OK); + case BSIM4v5_MOD_WBETA0: + value->rValue = model->BSIM4v5wbeta0; + return(OK); + case BSIM4v5_MOD_WAGIDL: + value->rValue = model->BSIM4v5wagidl; + return(OK); + case BSIM4v5_MOD_WBGIDL: + value->rValue = model->BSIM4v5wbgidl; + return(OK); + case BSIM4v5_MOD_WCGIDL: + value->rValue = model->BSIM4v5wcgidl; + return(OK); + case BSIM4v5_MOD_WEGIDL: + value->rValue = model->BSIM4v5wegidl; + return(OK); + case BSIM4v5_MOD_WAIGC: + value->rValue = model->BSIM4v5waigc; + return(OK); + case BSIM4v5_MOD_WBIGC: + value->rValue = model->BSIM4v5wbigc; + return(OK); + case BSIM4v5_MOD_WCIGC: + value->rValue = model->BSIM4v5wcigc; + return(OK); + case BSIM4v5_MOD_WAIGSD: + value->rValue = model->BSIM4v5waigsd; + return(OK); + case BSIM4v5_MOD_WBIGSD: + value->rValue = model->BSIM4v5wbigsd; + return(OK); + case BSIM4v5_MOD_WCIGSD: + value->rValue = model->BSIM4v5wcigsd; + return(OK); + case BSIM4v5_MOD_WAIGBACC: + value->rValue = model->BSIM4v5waigbacc; + return(OK); + case BSIM4v5_MOD_WBIGBACC: + value->rValue = model->BSIM4v5wbigbacc; + return(OK); + case BSIM4v5_MOD_WCIGBACC: + value->rValue = model->BSIM4v5wcigbacc; + return(OK); + case BSIM4v5_MOD_WAIGBINV: + value->rValue = model->BSIM4v5waigbinv; + return(OK); + case BSIM4v5_MOD_WBIGBINV: + value->rValue = model->BSIM4v5wbigbinv; + return(OK); + case BSIM4v5_MOD_WCIGBINV: + value->rValue = model->BSIM4v5wcigbinv; + return(OK); + case BSIM4v5_MOD_WNIGC: + value->rValue = model->BSIM4v5wnigc; + return(OK); + case BSIM4v5_MOD_WNIGBACC: + value->rValue = model->BSIM4v5wnigbacc; + return(OK); + case BSIM4v5_MOD_WNIGBINV: + value->rValue = model->BSIM4v5wnigbinv; + return(OK); + case BSIM4v5_MOD_WNTOX: + value->rValue = model->BSIM4v5wntox; + return(OK); + case BSIM4v5_MOD_WEIGBINV: + value->rValue = model->BSIM4v5weigbinv; + return(OK); + case BSIM4v5_MOD_WPIGCD: + value->rValue = model->BSIM4v5wpigcd; + return(OK); + case BSIM4v5_MOD_WPOXEDGE: + value->rValue = model->BSIM4v5wpoxedge; + return(OK); + case BSIM4v5_MOD_WPHIN: + value->rValue = model->BSIM4v5wphin; + return(OK); + case BSIM4v5_MOD_WXRCRG1: + value->rValue = model->BSIM4v5wxrcrg1; + return(OK); + case BSIM4v5_MOD_WXRCRG2: + value->rValue = model->BSIM4v5wxrcrg2; + return(OK); + case BSIM4v5_MOD_WEU: + value->rValue = model->BSIM4v5weu; + return(OK); + case BSIM4v5_MOD_WVFB: + value->rValue = model->BSIM4v5wvfb; + return(OK); + + case BSIM4v5_MOD_WCGSL: + value->rValue = model->BSIM4v5wcgsl; + return(OK); + case BSIM4v5_MOD_WCGDL: + value->rValue = model->BSIM4v5wcgdl; + return(OK); + case BSIM4v5_MOD_WCKAPPAS: + value->rValue = model->BSIM4v5wckappas; + return(OK); + case BSIM4v5_MOD_WCKAPPAD: + value->rValue = model->BSIM4v5wckappad; + return(OK); + case BSIM4v5_MOD_WCF: + value->rValue = model->BSIM4v5wcf; + return(OK); + case BSIM4v5_MOD_WCLC: + value->rValue = model->BSIM4v5wclc; + return(OK); + case BSIM4v5_MOD_WCLE: + value->rValue = model->BSIM4v5wcle; + return(OK); + case BSIM4v5_MOD_WVFBCV: + value->rValue = model->BSIM4v5wvfbcv; + return(OK); + case BSIM4v5_MOD_WACDE: + value->rValue = model->BSIM4v5wacde; + return(OK); + case BSIM4v5_MOD_WMOIN: + value->rValue = model->BSIM4v5wmoin; + return(OK); + case BSIM4v5_MOD_WNOFF: + value->rValue = model->BSIM4v5wnoff; + return(OK); + case BSIM4v5_MOD_WVOFFCV: + value->rValue = model->BSIM4v5wvoffcv; + return(OK); + case BSIM4v5_MOD_WVFBSDOFF: + value->rValue = model->BSIM4v5wvfbsdoff; + return(OK); + case BSIM4v5_MOD_WTVFBSDOFF: + value->rValue = model->BSIM4v5wtvfbsdoff; + return(OK); + + /* Cross-term dependence */ + case BSIM4v5_MOD_PCDSC : + value->rValue = model->BSIM4v5pcdsc; + return(OK); + case BSIM4v5_MOD_PCDSCB : + value->rValue = model->BSIM4v5pcdscb; + return(OK); + case BSIM4v5_MOD_PCDSCD : + value->rValue = model->BSIM4v5pcdscd; + return(OK); + case BSIM4v5_MOD_PCIT : + value->rValue = model->BSIM4v5pcit; + return(OK); + case BSIM4v5_MOD_PNFACTOR : + value->rValue = model->BSIM4v5pnfactor; + return(OK); + case BSIM4v5_MOD_PXJ: + value->rValue = model->BSIM4v5pxj; + return(OK); + case BSIM4v5_MOD_PVSAT: + value->rValue = model->BSIM4v5pvsat; + return(OK); + case BSIM4v5_MOD_PAT: + value->rValue = model->BSIM4v5pat; + return(OK); + case BSIM4v5_MOD_PA0: + value->rValue = model->BSIM4v5pa0; + return(OK); + case BSIM4v5_MOD_PAGS: + value->rValue = model->BSIM4v5pags; + return(OK); + case BSIM4v5_MOD_PA1: + value->rValue = model->BSIM4v5pa1; + return(OK); + case BSIM4v5_MOD_PA2: + value->rValue = model->BSIM4v5pa2; + return(OK); + case BSIM4v5_MOD_PKETA: + value->rValue = model->BSIM4v5pketa; + return(OK); + case BSIM4v5_MOD_PNSUB: + value->rValue = model->BSIM4v5pnsub; + return(OK); + case BSIM4v5_MOD_PNDEP: + value->rValue = model->BSIM4v5pndep; + return(OK); + case BSIM4v5_MOD_PNSD: + value->rValue = model->BSIM4v5pnsd; + return(OK); + case BSIM4v5_MOD_PNGATE: + value->rValue = model->BSIM4v5pngate; + return(OK); + case BSIM4v5_MOD_PGAMMA1: + value->rValue = model->BSIM4v5pgamma1; + return(OK); + case BSIM4v5_MOD_PGAMMA2: + value->rValue = model->BSIM4v5pgamma2; + return(OK); + case BSIM4v5_MOD_PVBX: + value->rValue = model->BSIM4v5pvbx; + return(OK); + case BSIM4v5_MOD_PVBM: + value->rValue = model->BSIM4v5pvbm; + return(OK); + case BSIM4v5_MOD_PXT: + value->rValue = model->BSIM4v5pxt; + return(OK); + case BSIM4v5_MOD_PK1: + value->rValue = model->BSIM4v5pk1; + return(OK); + case BSIM4v5_MOD_PKT1: + value->rValue = model->BSIM4v5pkt1; + return(OK); + case BSIM4v5_MOD_PKT1L: + value->rValue = model->BSIM4v5pkt1l; + return(OK); + case BSIM4v5_MOD_PKT2 : + value->rValue = model->BSIM4v5pkt2; + return(OK); + case BSIM4v5_MOD_PK2 : + value->rValue = model->BSIM4v5pk2; + return(OK); + case BSIM4v5_MOD_PK3: + value->rValue = model->BSIM4v5pk3; + return(OK); + case BSIM4v5_MOD_PK3B: + value->rValue = model->BSIM4v5pk3b; + return(OK); + case BSIM4v5_MOD_PW0: + value->rValue = model->BSIM4v5pw0; + return(OK); + case BSIM4v5_MOD_PLPE0: + value->rValue = model->BSIM4v5plpe0; + return(OK); + case BSIM4v5_MOD_PLPEB: + value->rValue = model->BSIM4v5plpeb; + return(OK); + case BSIM4v5_MOD_PDVTP0: + value->rValue = model->BSIM4v5pdvtp0; + return(OK); + case BSIM4v5_MOD_PDVTP1: + value->rValue = model->BSIM4v5pdvtp1; + return(OK); + case BSIM4v5_MOD_PDVT0 : + value->rValue = model->BSIM4v5pdvt0; + return(OK); + case BSIM4v5_MOD_PDVT1 : + value->rValue = model->BSIM4v5pdvt1; + return(OK); + case BSIM4v5_MOD_PDVT2 : + value->rValue = model->BSIM4v5pdvt2; + return(OK); + case BSIM4v5_MOD_PDVT0W : + value->rValue = model->BSIM4v5pdvt0w; + return(OK); + case BSIM4v5_MOD_PDVT1W : + value->rValue = model->BSIM4v5pdvt1w; + return(OK); + case BSIM4v5_MOD_PDVT2W : + value->rValue = model->BSIM4v5pdvt2w; + return(OK); + case BSIM4v5_MOD_PDROUT : + value->rValue = model->BSIM4v5pdrout; + return(OK); + case BSIM4v5_MOD_PDSUB : + value->rValue = model->BSIM4v5pdsub; + return(OK); + case BSIM4v5_MOD_PVTH0: + value->rValue = model->BSIM4v5pvth0; + return(OK); + case BSIM4v5_MOD_PUA: + value->rValue = model->BSIM4v5pua; + return(OK); + case BSIM4v5_MOD_PUA1: + value->rValue = model->BSIM4v5pua1; + return(OK); + case BSIM4v5_MOD_PUB: + value->rValue = model->BSIM4v5pub; + return(OK); + case BSIM4v5_MOD_PUB1: + value->rValue = model->BSIM4v5pub1; + return(OK); + case BSIM4v5_MOD_PUC: + value->rValue = model->BSIM4v5puc; + return(OK); + case BSIM4v5_MOD_PUC1: + value->rValue = model->BSIM4v5puc1; + return(OK); + case BSIM4v5_MOD_PUD: + value->rValue = model->BSIM4v5pud; + return(OK); + case BSIM4v5_MOD_PUD1: + value->rValue = model->BSIM4v5pud1; + return(OK); + case BSIM4v5_MOD_PUP: + value->rValue = model->BSIM4v5pup; + return(OK); + case BSIM4v5_MOD_PLP: + value->rValue = model->BSIM4v5plp; + return(OK); + case BSIM4v5_MOD_PU0: + value->rValue = model->BSIM4v5pu0; + return(OK); + case BSIM4v5_MOD_PUTE: + value->rValue = model->BSIM4v5pute; + return(OK); + case BSIM4v5_MOD_PVOFF: + value->rValue = model->BSIM4v5pvoff; + return(OK); + case BSIM4v5_MOD_PTVOFF: + value->rValue = model->BSIM4v5ptvoff; + return(OK); + case BSIM4v5_MOD_PMINV: + value->rValue = model->BSIM4v5pminv; + return(OK); + case BSIM4v5_MOD_PFPROUT: + value->rValue = model->BSIM4v5pfprout; + return(OK); + case BSIM4v5_MOD_PPDITS: + value->rValue = model->BSIM4v5ppdits; + return(OK); + case BSIM4v5_MOD_PPDITSD: + value->rValue = model->BSIM4v5ppditsd; + return(OK); + case BSIM4v5_MOD_PDELTA: + value->rValue = model->BSIM4v5pdelta; + return(OK); + case BSIM4v5_MOD_PRDSW: + value->rValue = model->BSIM4v5prdsw; + return(OK); + case BSIM4v5_MOD_PRDW: + value->rValue = model->BSIM4v5prdw; + return(OK); + case BSIM4v5_MOD_PRSW: + value->rValue = model->BSIM4v5prsw; + return(OK); + case BSIM4v5_MOD_PPRWB: + value->rValue = model->BSIM4v5pprwb; + return(OK); + case BSIM4v5_MOD_PPRWG: + value->rValue = model->BSIM4v5pprwg; + return(OK); + case BSIM4v5_MOD_PPRT: + value->rValue = model->BSIM4v5pprt; + return(OK); + case BSIM4v5_MOD_PETA0: + value->rValue = model->BSIM4v5peta0; + return(OK); + case BSIM4v5_MOD_PETAB: + value->rValue = model->BSIM4v5petab; + return(OK); + case BSIM4v5_MOD_PPCLM: + value->rValue = model->BSIM4v5ppclm; + return(OK); + case BSIM4v5_MOD_PPDIBL1: + value->rValue = model->BSIM4v5ppdibl1; + return(OK); + case BSIM4v5_MOD_PPDIBL2: + value->rValue = model->BSIM4v5ppdibl2; + return(OK); + case BSIM4v5_MOD_PPDIBLB: + value->rValue = model->BSIM4v5ppdiblb; + return(OK); + case BSIM4v5_MOD_PPSCBE1: + value->rValue = model->BSIM4v5ppscbe1; + return(OK); + case BSIM4v5_MOD_PPSCBE2: + value->rValue = model->BSIM4v5ppscbe2; + return(OK); + case BSIM4v5_MOD_PPVAG: + value->rValue = model->BSIM4v5ppvag; + return(OK); + case BSIM4v5_MOD_PWR: + value->rValue = model->BSIM4v5pwr; + return(OK); + case BSIM4v5_MOD_PDWG: + value->rValue = model->BSIM4v5pdwg; + return(OK); + case BSIM4v5_MOD_PDWB: + value->rValue = model->BSIM4v5pdwb; + return(OK); + case BSIM4v5_MOD_PB0: + value->rValue = model->BSIM4v5pb0; + return(OK); + case BSIM4v5_MOD_PB1: + value->rValue = model->BSIM4v5pb1; + return(OK); + case BSIM4v5_MOD_PALPHA0: + value->rValue = model->BSIM4v5palpha0; + return(OK); + case BSIM4v5_MOD_PALPHA1: + value->rValue = model->BSIM4v5palpha1; + return(OK); + case BSIM4v5_MOD_PBETA0: + value->rValue = model->BSIM4v5pbeta0; + return(OK); + case BSIM4v5_MOD_PAGIDL: + value->rValue = model->BSIM4v5pagidl; + return(OK); + case BSIM4v5_MOD_PBGIDL: + value->rValue = model->BSIM4v5pbgidl; + return(OK); + case BSIM4v5_MOD_PCGIDL: + value->rValue = model->BSIM4v5pcgidl; + return(OK); + case BSIM4v5_MOD_PEGIDL: + value->rValue = model->BSIM4v5pegidl; + return(OK); + case BSIM4v5_MOD_PAIGC: + value->rValue = model->BSIM4v5paigc; + return(OK); + case BSIM4v5_MOD_PBIGC: + value->rValue = model->BSIM4v5pbigc; + return(OK); + case BSIM4v5_MOD_PCIGC: + value->rValue = model->BSIM4v5pcigc; + return(OK); + case BSIM4v5_MOD_PAIGSD: + value->rValue = model->BSIM4v5paigsd; + return(OK); + case BSIM4v5_MOD_PBIGSD: + value->rValue = model->BSIM4v5pbigsd; + return(OK); + case BSIM4v5_MOD_PCIGSD: + value->rValue = model->BSIM4v5pcigsd; + return(OK); + case BSIM4v5_MOD_PAIGBACC: + value->rValue = model->BSIM4v5paigbacc; + return(OK); + case BSIM4v5_MOD_PBIGBACC: + value->rValue = model->BSIM4v5pbigbacc; + return(OK); + case BSIM4v5_MOD_PCIGBACC: + value->rValue = model->BSIM4v5pcigbacc; + return(OK); + case BSIM4v5_MOD_PAIGBINV: + value->rValue = model->BSIM4v5paigbinv; + return(OK); + case BSIM4v5_MOD_PBIGBINV: + value->rValue = model->BSIM4v5pbigbinv; + return(OK); + case BSIM4v5_MOD_PCIGBINV: + value->rValue = model->BSIM4v5pcigbinv; + return(OK); + case BSIM4v5_MOD_PNIGC: + value->rValue = model->BSIM4v5pnigc; + return(OK); + case BSIM4v5_MOD_PNIGBACC: + value->rValue = model->BSIM4v5pnigbacc; + return(OK); + case BSIM4v5_MOD_PNIGBINV: + value->rValue = model->BSIM4v5pnigbinv; + return(OK); + case BSIM4v5_MOD_PNTOX: + value->rValue = model->BSIM4v5pntox; + return(OK); + case BSIM4v5_MOD_PEIGBINV: + value->rValue = model->BSIM4v5peigbinv; + return(OK); + case BSIM4v5_MOD_PPIGCD: + value->rValue = model->BSIM4v5ppigcd; + return(OK); + case BSIM4v5_MOD_PPOXEDGE: + value->rValue = model->BSIM4v5ppoxedge; + return(OK); + case BSIM4v5_MOD_PPHIN: + value->rValue = model->BSIM4v5pphin; + return(OK); + case BSIM4v5_MOD_PXRCRG1: + value->rValue = model->BSIM4v5pxrcrg1; + return(OK); + case BSIM4v5_MOD_PXRCRG2: + value->rValue = model->BSIM4v5pxrcrg2; + return(OK); + case BSIM4v5_MOD_PEU: + value->rValue = model->BSIM4v5peu; + return(OK); + case BSIM4v5_MOD_PVFB: + value->rValue = model->BSIM4v5pvfb; + return(OK); + + case BSIM4v5_MOD_PCGSL: + value->rValue = model->BSIM4v5pcgsl; + return(OK); + case BSIM4v5_MOD_PCGDL: + value->rValue = model->BSIM4v5pcgdl; + return(OK); + case BSIM4v5_MOD_PCKAPPAS: + value->rValue = model->BSIM4v5pckappas; + return(OK); + case BSIM4v5_MOD_PCKAPPAD: + value->rValue = model->BSIM4v5pckappad; + return(OK); + case BSIM4v5_MOD_PCF: + value->rValue = model->BSIM4v5pcf; + return(OK); + case BSIM4v5_MOD_PCLC: + value->rValue = model->BSIM4v5pclc; + return(OK); + case BSIM4v5_MOD_PCLE: + value->rValue = model->BSIM4v5pcle; + return(OK); + case BSIM4v5_MOD_PVFBCV: + value->rValue = model->BSIM4v5pvfbcv; + return(OK); + case BSIM4v5_MOD_PACDE: + value->rValue = model->BSIM4v5pacde; + return(OK); + case BSIM4v5_MOD_PMOIN: + value->rValue = model->BSIM4v5pmoin; + return(OK); + case BSIM4v5_MOD_PNOFF: + value->rValue = model->BSIM4v5pnoff; + return(OK); + case BSIM4v5_MOD_PVOFFCV: + value->rValue = model->BSIM4v5pvoffcv; + return(OK); + case BSIM4v5_MOD_PVFBSDOFF: + value->rValue = model->BSIM4v5pvfbsdoff; + return(OK); + case BSIM4v5_MOD_PTVFBSDOFF: + value->rValue = model->BSIM4v5ptvfbsdoff; + return(OK); + + case BSIM4v5_MOD_TNOM : + value->rValue = model->BSIM4v5tnom; + return(OK); + case BSIM4v5_MOD_CGSO: + value->rValue = model->BSIM4v5cgso; + return(OK); + case BSIM4v5_MOD_CGDO: + value->rValue = model->BSIM4v5cgdo; + return(OK); + case BSIM4v5_MOD_CGBO: + value->rValue = model->BSIM4v5cgbo; + return(OK); + case BSIM4v5_MOD_XPART: + value->rValue = model->BSIM4v5xpart; + return(OK); + case BSIM4v5_MOD_RSH: + value->rValue = model->BSIM4v5sheetResistance; + return(OK); + case BSIM4v5_MOD_JSS: + value->rValue = model->BSIM4v5SjctSatCurDensity; + return(OK); + case BSIM4v5_MOD_JSWS: + value->rValue = model->BSIM4v5SjctSidewallSatCurDensity; + return(OK); + case BSIM4v5_MOD_JSWGS: + value->rValue = model->BSIM4v5SjctGateSidewallSatCurDensity; + return(OK); + case BSIM4v5_MOD_PBS: + value->rValue = model->BSIM4v5SbulkJctPotential; + return(OK); + case BSIM4v5_MOD_MJS: + value->rValue = model->BSIM4v5SbulkJctBotGradingCoeff; + return(OK); + case BSIM4v5_MOD_PBSWS: + value->rValue = model->BSIM4v5SsidewallJctPotential; + return(OK); + case BSIM4v5_MOD_MJSWS: + value->rValue = model->BSIM4v5SbulkJctSideGradingCoeff; + return(OK); + case BSIM4v5_MOD_CJS: + value->rValue = model->BSIM4v5SunitAreaJctCap; + return(OK); + case BSIM4v5_MOD_CJSWS: + value->rValue = model->BSIM4v5SunitLengthSidewallJctCap; + return(OK); + case BSIM4v5_MOD_PBSWGS: + value->rValue = model->BSIM4v5SGatesidewallJctPotential; + return(OK); + case BSIM4v5_MOD_MJSWGS: + value->rValue = model->BSIM4v5SbulkJctGateSideGradingCoeff; + return(OK); + case BSIM4v5_MOD_CJSWGS: + value->rValue = model->BSIM4v5SunitLengthGateSidewallJctCap; + return(OK); + case BSIM4v5_MOD_NJS: + value->rValue = model->BSIM4v5SjctEmissionCoeff; + return(OK); + case BSIM4v5_MOD_XTIS: + value->rValue = model->BSIM4v5SjctTempExponent; + return(OK); + case BSIM4v5_MOD_JSD: + value->rValue = model->BSIM4v5DjctSatCurDensity; + return(OK); + case BSIM4v5_MOD_JSWD: + value->rValue = model->BSIM4v5DjctSidewallSatCurDensity; + return(OK); + case BSIM4v5_MOD_JSWGD: + value->rValue = model->BSIM4v5DjctGateSidewallSatCurDensity; + return(OK); + case BSIM4v5_MOD_PBD: + value->rValue = model->BSIM4v5DbulkJctPotential; + return(OK); + case BSIM4v5_MOD_MJD: + value->rValue = model->BSIM4v5DbulkJctBotGradingCoeff; + return(OK); + case BSIM4v5_MOD_PBSWD: + value->rValue = model->BSIM4v5DsidewallJctPotential; + return(OK); + case BSIM4v5_MOD_MJSWD: + value->rValue = model->BSIM4v5DbulkJctSideGradingCoeff; + return(OK); + case BSIM4v5_MOD_CJD: + value->rValue = model->BSIM4v5DunitAreaJctCap; + return(OK); + case BSIM4v5_MOD_CJSWD: + value->rValue = model->BSIM4v5DunitLengthSidewallJctCap; + return(OK); + case BSIM4v5_MOD_PBSWGD: + value->rValue = model->BSIM4v5DGatesidewallJctPotential; + return(OK); + case BSIM4v5_MOD_MJSWGD: + value->rValue = model->BSIM4v5DbulkJctGateSideGradingCoeff; + return(OK); + case BSIM4v5_MOD_CJSWGD: + value->rValue = model->BSIM4v5DunitLengthGateSidewallJctCap; + return(OK); + case BSIM4v5_MOD_NJD: + value->rValue = model->BSIM4v5DjctEmissionCoeff; + return(OK); + case BSIM4v5_MOD_XTID: + value->rValue = model->BSIM4v5DjctTempExponent; + return(OK); + case BSIM4v5_MOD_LINT: + value->rValue = model->BSIM4v5Lint; + return(OK); + case BSIM4v5_MOD_LL: + value->rValue = model->BSIM4v5Ll; + return(OK); + case BSIM4v5_MOD_LLC: + value->rValue = model->BSIM4v5Llc; + return(OK); + case BSIM4v5_MOD_LLN: + value->rValue = model->BSIM4v5Lln; + return(OK); + case BSIM4v5_MOD_LW: + value->rValue = model->BSIM4v5Lw; + return(OK); + case BSIM4v5_MOD_LWC: + value->rValue = model->BSIM4v5Lwc; + return(OK); + case BSIM4v5_MOD_LWN: + value->rValue = model->BSIM4v5Lwn; + return(OK); + case BSIM4v5_MOD_LWL: + value->rValue = model->BSIM4v5Lwl; + return(OK); + case BSIM4v5_MOD_LWLC: + value->rValue = model->BSIM4v5Lwlc; + return(OK); + case BSIM4v5_MOD_LMIN: + value->rValue = model->BSIM4v5Lmin; + return(OK); + case BSIM4v5_MOD_LMAX: + value->rValue = model->BSIM4v5Lmax; + return(OK); + case BSIM4v5_MOD_WINT: + value->rValue = model->BSIM4v5Wint; + return(OK); + case BSIM4v5_MOD_WL: + value->rValue = model->BSIM4v5Wl; + return(OK); + case BSIM4v5_MOD_WLC: + value->rValue = model->BSIM4v5Wlc; + return(OK); + case BSIM4v5_MOD_WLN: + value->rValue = model->BSIM4v5Wln; + return(OK); + case BSIM4v5_MOD_WW: + value->rValue = model->BSIM4v5Ww; + return(OK); + case BSIM4v5_MOD_WWC: + value->rValue = model->BSIM4v5Wwc; + return(OK); + case BSIM4v5_MOD_WWN: + value->rValue = model->BSIM4v5Wwn; + return(OK); + case BSIM4v5_MOD_WWL: + value->rValue = model->BSIM4v5Wwl; + return(OK); + case BSIM4v5_MOD_WWLC: + value->rValue = model->BSIM4v5Wwlc; + return(OK); + case BSIM4v5_MOD_WMIN: + value->rValue = model->BSIM4v5Wmin; + return(OK); + case BSIM4v5_MOD_WMAX: + value->rValue = model->BSIM4v5Wmax; + return(OK); + + /* stress effect */ + case BSIM4v5_MOD_SAREF: + value->rValue = model->BSIM4v5saref; + return(OK); + case BSIM4v5_MOD_SBREF: + value->rValue = model->BSIM4v5sbref; + return(OK); + case BSIM4v5_MOD_WLOD: + value->rValue = model->BSIM4v5wlod; + return(OK); + case BSIM4v5_MOD_KU0: + value->rValue = model->BSIM4v5ku0; + return(OK); + case BSIM4v5_MOD_KVSAT: + value->rValue = model->BSIM4v5kvsat; + return(OK); + case BSIM4v5_MOD_KVTH0: + value->rValue = model->BSIM4v5kvth0; + return(OK); + case BSIM4v5_MOD_TKU0: + value->rValue = model->BSIM4v5tku0; + return(OK); + case BSIM4v5_MOD_LLODKU0: + value->rValue = model->BSIM4v5llodku0; + return(OK); + case BSIM4v5_MOD_WLODKU0: + value->rValue = model->BSIM4v5wlodku0; + return(OK); + case BSIM4v5_MOD_LLODVTH: + value->rValue = model->BSIM4v5llodvth; + return(OK); + case BSIM4v5_MOD_WLODVTH: + value->rValue = model->BSIM4v5wlodvth; + return(OK); + case BSIM4v5_MOD_LKU0: + value->rValue = model->BSIM4v5lku0; + return(OK); + case BSIM4v5_MOD_WKU0: + value->rValue = model->BSIM4v5wku0; + return(OK); + case BSIM4v5_MOD_PKU0: + value->rValue = model->BSIM4v5pku0; + return(OK); + case BSIM4v5_MOD_LKVTH0: + value->rValue = model->BSIM4v5lkvth0; + return(OK); + case BSIM4v5_MOD_WKVTH0: + value->rValue = model->BSIM4v5wkvth0; + return(OK); + case BSIM4v5_MOD_PKVTH0: + value->rValue = model->BSIM4v5pkvth0; + return(OK); + case BSIM4v5_MOD_STK2: + value->rValue = model->BSIM4v5stk2; + return(OK); + case BSIM4v5_MOD_LODK2: + value->rValue = model->BSIM4v5lodk2; + return(OK); + case BSIM4v5_MOD_STETA0: + value->rValue = model->BSIM4v5steta0; + return(OK); + case BSIM4v5_MOD_LODETA0: + value->rValue = model->BSIM4v5lodeta0; + return(OK); + + /* Well Proximity Effect */ + case BSIM4v5_MOD_WEB: + value->rValue = model->BSIM4v5web; + return(OK); + case BSIM4v5_MOD_WEC: + value->rValue = model->BSIM4v5wec; + return(OK); + case BSIM4v5_MOD_KVTH0WE: + value->rValue = model->BSIM4v5kvth0we; + return(OK); + case BSIM4v5_MOD_K2WE: + value->rValue = model->BSIM4v5k2we; + return(OK); + case BSIM4v5_MOD_KU0WE: + value->rValue = model->BSIM4v5ku0we; + return(OK); + case BSIM4v5_MOD_SCREF: + value->rValue = model->BSIM4v5scref; + return(OK); + case BSIM4v5_MOD_WPEMOD: + value->rValue = model->BSIM4v5wpemod; + return(OK); + case BSIM4v5_MOD_LKVTH0WE: + value->rValue = model->BSIM4v5lkvth0we; + return(OK); + case BSIM4v5_MOD_LK2WE: + value->rValue = model->BSIM4v5lk2we; + return(OK); + case BSIM4v5_MOD_LKU0WE: + value->rValue = model->BSIM4v5lku0we; + return(OK); + case BSIM4v5_MOD_WKVTH0WE: + value->rValue = model->BSIM4v5wkvth0we; + return(OK); + case BSIM4v5_MOD_WK2WE: + value->rValue = model->BSIM4v5wk2we; + return(OK); + case BSIM4v5_MOD_WKU0WE: + value->rValue = model->BSIM4v5wku0we; + return(OK); + case BSIM4v5_MOD_PKVTH0WE: + value->rValue = model->BSIM4v5pkvth0we; + return(OK); + case BSIM4v5_MOD_PK2WE: + value->rValue = model->BSIM4v5pk2we; + return(OK); + case BSIM4v5_MOD_PKU0WE: + value->rValue = model->BSIM4v5pku0we; + return(OK); + + case BSIM4v5_MOD_NOIA: + value->rValue = model->BSIM4v5oxideTrapDensityA; + return(OK); + case BSIM4v5_MOD_NOIB: + value->rValue = model->BSIM4v5oxideTrapDensityB; + return(OK); + case BSIM4v5_MOD_NOIC: + value->rValue = model->BSIM4v5oxideTrapDensityC; + return(OK); + case BSIM4v5_MOD_EM: + value->rValue = model->BSIM4v5em; + return(OK); + case BSIM4v5_MOD_EF: + value->rValue = model->BSIM4v5ef; + return(OK); + case BSIM4v5_MOD_AF: + value->rValue = model->BSIM4v5af; + return(OK); + case BSIM4v5_MOD_KF: + value->rValue = model->BSIM4v5kf; + return(OK); + case BSIM4v5_MOD_STIMOD: + value->rValue = model->BSIM4v5stimod; + return(OK); + case BSIM4v5_MOD_RGEOMOD: + value->rValue = model->BSIM4v5rgeomod; + return(OK); + case BSIM4v5_MOD_SA0: + value->rValue = model->BSIM4v5sa0; + return(OK); + case BSIM4v5_MOD_SB0: + value->rValue = model->BSIM4v5sb0; + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + + + diff --git a/src/spicelib/devices/bsim4v5/b4v5mdel.c b/src/spicelib/devices/bsim4v5/b4v5mdel.c new file mode 100644 index 000000000..548bab7ce --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5mdel.c @@ -0,0 +1,46 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4mdel.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM4v5mDelete(inModel,modname,kill) +GENmodel **inModel; +IFuid modname; +GENmodel *kill; +{ +BSIM4v5model **model = (BSIM4v5model**)inModel; +BSIM4v5model *modfast = (BSIM4v5model*)kill; +BSIM4v5instance *here; +BSIM4v5instance *prev = NULL; +BSIM4v5model **oldmod; + + oldmod = model; + for (; *model ; model = &((*model)->BSIM4v5nextModel)) + { if ((*model)->BSIM4v5modName == modname || + (modfast && *model == modfast)) + goto delgot; + oldmod = model; + } + return(E_NOMOD); + +delgot: + *oldmod = (*model)->BSIM4v5nextModel; /* cut deleted device out of list */ + for (here = (*model)->BSIM4v5instances; here; here = here->BSIM4v5nextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + FREE(*model); + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5mpar.c b/src/spicelib/devices/bsim4v5/b4v5mpar.c new file mode 100644 index 000000000..1c9ece777 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5mpar.c @@ -0,0 +1,3093 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4mpar.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 03/04/2004. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "bsim4v5def.h" +#include "ifsim.h" +#include "sperror.h" +#include "suffix.h" +#include "const.h" + +int +BSIM4v5mParam(param,value,inMod) +int param; +IFvalue *value; +GENmodel *inMod; +{ + BSIM4v5model *mod = (BSIM4v5model*)inMod; + switch(param) + { case BSIM4v5_MOD_MOBMOD : + mod->BSIM4v5mobMod = value->iValue; + mod->BSIM4v5mobModGiven = TRUE; + break; + case BSIM4v5_MOD_BINUNIT : + mod->BSIM4v5binUnit = value->iValue; + mod->BSIM4v5binUnitGiven = TRUE; + break; + case BSIM4v5_MOD_PARAMCHK : + mod->BSIM4v5paramChk = value->iValue; + mod->BSIM4v5paramChkGiven = TRUE; + break; + case BSIM4v5_MOD_CAPMOD : + mod->BSIM4v5capMod = value->iValue; + mod->BSIM4v5capModGiven = TRUE; + break; + case BSIM4v5_MOD_DIOMOD : + mod->BSIM4v5dioMod = value->iValue; + mod->BSIM4v5dioModGiven = TRUE; + break; + case BSIM4v5_MOD_RDSMOD : + mod->BSIM4v5rdsMod = value->iValue; + mod->BSIM4v5rdsModGiven = TRUE; + break; + case BSIM4v5_MOD_TRNQSMOD : + mod->BSIM4v5trnqsMod = value->iValue; + mod->BSIM4v5trnqsModGiven = TRUE; + break; + case BSIM4v5_MOD_ACNQSMOD : + mod->BSIM4v5acnqsMod = value->iValue; + mod->BSIM4v5acnqsModGiven = TRUE; + break; + case BSIM4v5_MOD_RBODYMOD : + mod->BSIM4v5rbodyMod = value->iValue; + mod->BSIM4v5rbodyModGiven = TRUE; + break; + case BSIM4v5_MOD_RGATEMOD : + mod->BSIM4v5rgateMod = value->iValue; + mod->BSIM4v5rgateModGiven = TRUE; + break; + case BSIM4v5_MOD_PERMOD : + mod->BSIM4v5perMod = value->iValue; + mod->BSIM4v5perModGiven = TRUE; + break; + case BSIM4v5_MOD_GEOMOD : + mod->BSIM4v5geoMod = value->iValue; + mod->BSIM4v5geoModGiven = TRUE; + break; + case BSIM4v5_MOD_FNOIMOD : + mod->BSIM4v5fnoiMod = value->iValue; + mod->BSIM4v5fnoiModGiven = TRUE; + break; + case BSIM4v5_MOD_TNOIMOD : + mod->BSIM4v5tnoiMod = value->iValue; + mod->BSIM4v5tnoiModGiven = TRUE; + break; + case BSIM4v5_MOD_IGCMOD : + mod->BSIM4v5igcMod = value->iValue; + mod->BSIM4v5igcModGiven = TRUE; + break; + case BSIM4v5_MOD_IGBMOD : + mod->BSIM4v5igbMod = value->iValue; + mod->BSIM4v5igbModGiven = TRUE; + break; + case BSIM4v5_MOD_TEMPMOD : + mod->BSIM4v5tempMod = value->iValue; + mod->BSIM4v5tempModGiven = TRUE; + break; + + case BSIM4v5_MOD_VERSION : + mod->BSIM4v5version = value->sValue; + mod->BSIM4v5versionGiven = TRUE; + break; + case BSIM4v5_MOD_TOXREF : + mod->BSIM4v5toxref = value->rValue; + mod->BSIM4v5toxrefGiven = TRUE; + break; + case BSIM4v5_MOD_TOXE : + mod->BSIM4v5toxe = value->rValue; + mod->BSIM4v5toxeGiven = TRUE; + break; + case BSIM4v5_MOD_TOXP : + mod->BSIM4v5toxp = value->rValue; + mod->BSIM4v5toxpGiven = TRUE; + break; + case BSIM4v5_MOD_TOXM : + mod->BSIM4v5toxm = value->rValue; + mod->BSIM4v5toxmGiven = TRUE; + break; + case BSIM4v5_MOD_DTOX : + mod->BSIM4v5dtox = value->rValue; + mod->BSIM4v5dtoxGiven = TRUE; + break; + case BSIM4v5_MOD_EPSROX : + mod->BSIM4v5epsrox = value->rValue; + mod->BSIM4v5epsroxGiven = TRUE; + break; + + case BSIM4v5_MOD_CDSC : + mod->BSIM4v5cdsc = value->rValue; + mod->BSIM4v5cdscGiven = TRUE; + break; + case BSIM4v5_MOD_CDSCB : + mod->BSIM4v5cdscb = value->rValue; + mod->BSIM4v5cdscbGiven = TRUE; + break; + + case BSIM4v5_MOD_CDSCD : + mod->BSIM4v5cdscd = value->rValue; + mod->BSIM4v5cdscdGiven = TRUE; + break; + + case BSIM4v5_MOD_CIT : + mod->BSIM4v5cit = value->rValue; + mod->BSIM4v5citGiven = TRUE; + break; + case BSIM4v5_MOD_NFACTOR : + mod->BSIM4v5nfactor = value->rValue; + mod->BSIM4v5nfactorGiven = TRUE; + break; + case BSIM4v5_MOD_XJ: + mod->BSIM4v5xj = value->rValue; + mod->BSIM4v5xjGiven = TRUE; + break; + case BSIM4v5_MOD_VSAT: + mod->BSIM4v5vsat = value->rValue; + mod->BSIM4v5vsatGiven = TRUE; + break; + case BSIM4v5_MOD_A0: + mod->BSIM4v5a0 = value->rValue; + mod->BSIM4v5a0Given = TRUE; + break; + + case BSIM4v5_MOD_AGS: + mod->BSIM4v5ags= value->rValue; + mod->BSIM4v5agsGiven = TRUE; + break; + + case BSIM4v5_MOD_A1: + mod->BSIM4v5a1 = value->rValue; + mod->BSIM4v5a1Given = TRUE; + break; + case BSIM4v5_MOD_A2: + mod->BSIM4v5a2 = value->rValue; + mod->BSIM4v5a2Given = TRUE; + break; + case BSIM4v5_MOD_AT: + mod->BSIM4v5at = value->rValue; + mod->BSIM4v5atGiven = TRUE; + break; + case BSIM4v5_MOD_KETA: + mod->BSIM4v5keta = value->rValue; + mod->BSIM4v5ketaGiven = TRUE; + break; + case BSIM4v5_MOD_NSUB: + mod->BSIM4v5nsub = value->rValue; + mod->BSIM4v5nsubGiven = TRUE; + break; + case BSIM4v5_MOD_NDEP: + mod->BSIM4v5ndep = value->rValue; + mod->BSIM4v5ndepGiven = TRUE; + if (mod->BSIM4v5ndep > 1.0e20) + mod->BSIM4v5ndep *= 1.0e-6; + break; + case BSIM4v5_MOD_NSD: + mod->BSIM4v5nsd = value->rValue; + mod->BSIM4v5nsdGiven = TRUE; + if (mod->BSIM4v5nsd > 1.0e23) + mod->BSIM4v5nsd *= 1.0e-6; + break; + case BSIM4v5_MOD_NGATE: + mod->BSIM4v5ngate = value->rValue; + mod->BSIM4v5ngateGiven = TRUE; + if (mod->BSIM4v5ngate > 1.0e23) + mod->BSIM4v5ngate *= 1.0e-6; + break; + case BSIM4v5_MOD_GAMMA1: + mod->BSIM4v5gamma1 = value->rValue; + mod->BSIM4v5gamma1Given = TRUE; + break; + case BSIM4v5_MOD_GAMMA2: + mod->BSIM4v5gamma2 = value->rValue; + mod->BSIM4v5gamma2Given = TRUE; + break; + case BSIM4v5_MOD_VBX: + mod->BSIM4v5vbx = value->rValue; + mod->BSIM4v5vbxGiven = TRUE; + break; + case BSIM4v5_MOD_VBM: + mod->BSIM4v5vbm = value->rValue; + mod->BSIM4v5vbmGiven = TRUE; + break; + case BSIM4v5_MOD_XT: + mod->BSIM4v5xt = value->rValue; + mod->BSIM4v5xtGiven = TRUE; + break; + case BSIM4v5_MOD_K1: + mod->BSIM4v5k1 = value->rValue; + mod->BSIM4v5k1Given = TRUE; + break; + case BSIM4v5_MOD_KT1: + mod->BSIM4v5kt1 = value->rValue; + mod->BSIM4v5kt1Given = TRUE; + break; + case BSIM4v5_MOD_KT1L: + mod->BSIM4v5kt1l = value->rValue; + mod->BSIM4v5kt1lGiven = TRUE; + break; + case BSIM4v5_MOD_KT2: + mod->BSIM4v5kt2 = value->rValue; + mod->BSIM4v5kt2Given = TRUE; + break; + case BSIM4v5_MOD_K2: + mod->BSIM4v5k2 = value->rValue; + mod->BSIM4v5k2Given = TRUE; + break; + case BSIM4v5_MOD_K3: + mod->BSIM4v5k3 = value->rValue; + mod->BSIM4v5k3Given = TRUE; + break; + case BSIM4v5_MOD_K3B: + mod->BSIM4v5k3b = value->rValue; + mod->BSIM4v5k3bGiven = TRUE; + break; + case BSIM4v5_MOD_LPE0: + mod->BSIM4v5lpe0 = value->rValue; + mod->BSIM4v5lpe0Given = TRUE; + break; + case BSIM4v5_MOD_LPEB: + mod->BSIM4v5lpeb = value->rValue; + mod->BSIM4v5lpebGiven = TRUE; + break; + case BSIM4v5_MOD_DVTP0: + mod->BSIM4v5dvtp0 = value->rValue; + mod->BSIM4v5dvtp0Given = TRUE; + break; + case BSIM4v5_MOD_DVTP1: + mod->BSIM4v5dvtp1 = value->rValue; + mod->BSIM4v5dvtp1Given = TRUE; + break; + case BSIM4v5_MOD_W0: + mod->BSIM4v5w0 = value->rValue; + mod->BSIM4v5w0Given = TRUE; + break; + case BSIM4v5_MOD_DVT0: + mod->BSIM4v5dvt0 = value->rValue; + mod->BSIM4v5dvt0Given = TRUE; + break; + case BSIM4v5_MOD_DVT1: + mod->BSIM4v5dvt1 = value->rValue; + mod->BSIM4v5dvt1Given = TRUE; + break; + case BSIM4v5_MOD_DVT2: + mod->BSIM4v5dvt2 = value->rValue; + mod->BSIM4v5dvt2Given = TRUE; + break; + case BSIM4v5_MOD_DVT0W: + mod->BSIM4v5dvt0w = value->rValue; + mod->BSIM4v5dvt0wGiven = TRUE; + break; + case BSIM4v5_MOD_DVT1W: + mod->BSIM4v5dvt1w = value->rValue; + mod->BSIM4v5dvt1wGiven = TRUE; + break; + case BSIM4v5_MOD_DVT2W: + mod->BSIM4v5dvt2w = value->rValue; + mod->BSIM4v5dvt2wGiven = TRUE; + break; + case BSIM4v5_MOD_DROUT: + mod->BSIM4v5drout = value->rValue; + mod->BSIM4v5droutGiven = TRUE; + break; + case BSIM4v5_MOD_DSUB: + mod->BSIM4v5dsub = value->rValue; + mod->BSIM4v5dsubGiven = TRUE; + break; + case BSIM4v5_MOD_VTH0: + mod->BSIM4v5vth0 = value->rValue; + mod->BSIM4v5vth0Given = TRUE; + break; + case BSIM4v5_MOD_EU: + mod->BSIM4v5eu = value->rValue; + mod->BSIM4v5euGiven = TRUE; + break; + case BSIM4v5_MOD_UA: + mod->BSIM4v5ua = value->rValue; + mod->BSIM4v5uaGiven = TRUE; + break; + case BSIM4v5_MOD_UA1: + mod->BSIM4v5ua1 = value->rValue; + mod->BSIM4v5ua1Given = TRUE; + break; + case BSIM4v5_MOD_UB: + mod->BSIM4v5ub = value->rValue; + mod->BSIM4v5ubGiven = TRUE; + break; + case BSIM4v5_MOD_UB1: + mod->BSIM4v5ub1 = value->rValue; + mod->BSIM4v5ub1Given = TRUE; + break; + case BSIM4v5_MOD_UC: + mod->BSIM4v5uc = value->rValue; + mod->BSIM4v5ucGiven = TRUE; + break; + case BSIM4v5_MOD_UC1: + mod->BSIM4v5uc1 = value->rValue; + mod->BSIM4v5uc1Given = TRUE; + break; + case BSIM4v5_MOD_U0 : + mod->BSIM4v5u0 = value->rValue; + mod->BSIM4v5u0Given = TRUE; + break; + case BSIM4v5_MOD_UTE : + mod->BSIM4v5ute = value->rValue; + mod->BSIM4v5uteGiven = TRUE; + break; + + case BSIM4v5_MOD_UD: + mod->BSIM4v5ud = value->rValue; + mod->BSIM4v5udGiven = TRUE; + break; + case BSIM4v5_MOD_UD1: + mod->BSIM4v5ud1 = value->rValue; + mod->BSIM4v5ud1Given = TRUE; + break; + case BSIM4v5_MOD_UP: + mod->BSIM4v5up = value->rValue; + mod->BSIM4v5upGiven = TRUE; + break; + case BSIM4v5_MOD_LP: + mod->BSIM4v5lp = value->rValue; + mod->BSIM4v5lpGiven = TRUE; + break; + case BSIM4v5_MOD_LUD: + mod->BSIM4v5lud = value->rValue; + mod->BSIM4v5ludGiven = TRUE; + break; + case BSIM4v5_MOD_LUD1: + mod->BSIM4v5lud1 = value->rValue; + mod->BSIM4v5lud1Given = TRUE; + break; + case BSIM4v5_MOD_LUP: + mod->BSIM4v5lup = value->rValue; + mod->BSIM4v5lupGiven = TRUE; + break; + case BSIM4v5_MOD_LLP: + mod->BSIM4v5llp = value->rValue; + mod->BSIM4v5llpGiven = TRUE; + break; + case BSIM4v5_MOD_WUD: + mod->BSIM4v5wud = value->rValue; + mod->BSIM4v5wudGiven = TRUE; + break; + case BSIM4v5_MOD_WUD1: + mod->BSIM4v5wud1 = value->rValue; + mod->BSIM4v5wud1Given = TRUE; + break; + case BSIM4v5_MOD_WUP: + mod->BSIM4v5wup = value->rValue; + mod->BSIM4v5wupGiven = TRUE; + break; + case BSIM4v5_MOD_WLP: + mod->BSIM4v5wlp = value->rValue; + mod->BSIM4v5wlpGiven = TRUE; + break; + case BSIM4v5_MOD_PUD: + mod->BSIM4v5pud = value->rValue; + mod->BSIM4v5pudGiven = TRUE; + break; + case BSIM4v5_MOD_PUD1: + mod->BSIM4v5pud1 = value->rValue; + mod->BSIM4v5pud1Given = TRUE; + break; + case BSIM4v5_MOD_PUP: + mod->BSIM4v5pup = value->rValue; + mod->BSIM4v5pupGiven = TRUE; + break; + case BSIM4v5_MOD_PLP: + mod->BSIM4v5plp = value->rValue; + mod->BSIM4v5plpGiven = TRUE; + break; + + + case BSIM4v5_MOD_VOFF: + mod->BSIM4v5voff = value->rValue; + mod->BSIM4v5voffGiven = TRUE; + break; + case BSIM4v5_MOD_TVOFF: + mod->BSIM4v5tvoff = value->rValue; + mod->BSIM4v5tvoffGiven = TRUE; + break; + case BSIM4v5_MOD_VOFFL: + mod->BSIM4v5voffl = value->rValue; + mod->BSIM4v5vofflGiven = TRUE; + break; + case BSIM4v5_MOD_MINV: + mod->BSIM4v5minv = value->rValue; + mod->BSIM4v5minvGiven = TRUE; + break; + case BSIM4v5_MOD_FPROUT: + mod->BSIM4v5fprout = value->rValue; + mod->BSIM4v5fproutGiven = TRUE; + break; + case BSIM4v5_MOD_PDITS: + mod->BSIM4v5pdits = value->rValue; + mod->BSIM4v5pditsGiven = TRUE; + break; + case BSIM4v5_MOD_PDITSD: + mod->BSIM4v5pditsd = value->rValue; + mod->BSIM4v5pditsdGiven = TRUE; + break; + case BSIM4v5_MOD_PDITSL: + mod->BSIM4v5pditsl = value->rValue; + mod->BSIM4v5pditslGiven = TRUE; + break; + case BSIM4v5_MOD_DELTA : + mod->BSIM4v5delta = value->rValue; + mod->BSIM4v5deltaGiven = TRUE; + break; + case BSIM4v5_MOD_RDSW: + mod->BSIM4v5rdsw = value->rValue; + mod->BSIM4v5rdswGiven = TRUE; + break; + case BSIM4v5_MOD_RDSWMIN: + mod->BSIM4v5rdswmin = value->rValue; + mod->BSIM4v5rdswminGiven = TRUE; + break; + case BSIM4v5_MOD_RDWMIN: + mod->BSIM4v5rdwmin = value->rValue; + mod->BSIM4v5rdwminGiven = TRUE; + break; + case BSIM4v5_MOD_RSWMIN: + mod->BSIM4v5rswmin = value->rValue; + mod->BSIM4v5rswminGiven = TRUE; + break; + case BSIM4v5_MOD_RDW: + mod->BSIM4v5rdw = value->rValue; + mod->BSIM4v5rdwGiven = TRUE; + break; + case BSIM4v5_MOD_RSW: + mod->BSIM4v5rsw = value->rValue; + mod->BSIM4v5rswGiven = TRUE; + break; + case BSIM4v5_MOD_PRWG: + mod->BSIM4v5prwg = value->rValue; + mod->BSIM4v5prwgGiven = TRUE; + break; + case BSIM4v5_MOD_PRWB: + mod->BSIM4v5prwb = value->rValue; + mod->BSIM4v5prwbGiven = TRUE; + break; + case BSIM4v5_MOD_PRT: + mod->BSIM4v5prt = value->rValue; + mod->BSIM4v5prtGiven = TRUE; + break; + case BSIM4v5_MOD_ETA0: + mod->BSIM4v5eta0 = value->rValue; + mod->BSIM4v5eta0Given = TRUE; + break; + case BSIM4v5_MOD_ETAB: + mod->BSIM4v5etab = value->rValue; + mod->BSIM4v5etabGiven = TRUE; + break; + case BSIM4v5_MOD_PCLM: + mod->BSIM4v5pclm = value->rValue; + mod->BSIM4v5pclmGiven = TRUE; + break; + case BSIM4v5_MOD_PDIBL1: + mod->BSIM4v5pdibl1 = value->rValue; + mod->BSIM4v5pdibl1Given = TRUE; + break; + case BSIM4v5_MOD_PDIBL2: + mod->BSIM4v5pdibl2 = value->rValue; + mod->BSIM4v5pdibl2Given = TRUE; + break; + case BSIM4v5_MOD_PDIBLB: + mod->BSIM4v5pdiblb = value->rValue; + mod->BSIM4v5pdiblbGiven = TRUE; + break; + case BSIM4v5_MOD_PSCBE1: + mod->BSIM4v5pscbe1 = value->rValue; + mod->BSIM4v5pscbe1Given = TRUE; + break; + case BSIM4v5_MOD_PSCBE2: + mod->BSIM4v5pscbe2 = value->rValue; + mod->BSIM4v5pscbe2Given = TRUE; + break; + case BSIM4v5_MOD_PVAG: + mod->BSIM4v5pvag = value->rValue; + mod->BSIM4v5pvagGiven = TRUE; + break; + case BSIM4v5_MOD_WR : + mod->BSIM4v5wr = value->rValue; + mod->BSIM4v5wrGiven = TRUE; + break; + case BSIM4v5_MOD_DWG : + mod->BSIM4v5dwg = value->rValue; + mod->BSIM4v5dwgGiven = TRUE; + break; + case BSIM4v5_MOD_DWB : + mod->BSIM4v5dwb = value->rValue; + mod->BSIM4v5dwbGiven = TRUE; + break; + case BSIM4v5_MOD_B0 : + mod->BSIM4v5b0 = value->rValue; + mod->BSIM4v5b0Given = TRUE; + break; + case BSIM4v5_MOD_B1 : + mod->BSIM4v5b1 = value->rValue; + mod->BSIM4v5b1Given = TRUE; + break; + case BSIM4v5_MOD_ALPHA0 : + mod->BSIM4v5alpha0 = value->rValue; + mod->BSIM4v5alpha0Given = TRUE; + break; + case BSIM4v5_MOD_ALPHA1 : + mod->BSIM4v5alpha1 = value->rValue; + mod->BSIM4v5alpha1Given = TRUE; + break; + case BSIM4v5_MOD_AGIDL : + mod->BSIM4v5agidl = value->rValue; + mod->BSIM4v5agidlGiven = TRUE; + break; + case BSIM4v5_MOD_BGIDL : + mod->BSIM4v5bgidl = value->rValue; + mod->BSIM4v5bgidlGiven = TRUE; + break; + case BSIM4v5_MOD_CGIDL : + mod->BSIM4v5cgidl = value->rValue; + mod->BSIM4v5cgidlGiven = TRUE; + break; + case BSIM4v5_MOD_PHIN : + mod->BSIM4v5phin = value->rValue; + mod->BSIM4v5phinGiven = TRUE; + break; + case BSIM4v5_MOD_EGIDL : + mod->BSIM4v5egidl = value->rValue; + mod->BSIM4v5egidlGiven = TRUE; + break; + case BSIM4v5_MOD_AIGC : + mod->BSIM4v5aigc = value->rValue; + mod->BSIM4v5aigcGiven = TRUE; + break; + case BSIM4v5_MOD_BIGC : + mod->BSIM4v5bigc = value->rValue; + mod->BSIM4v5bigcGiven = TRUE; + break; + case BSIM4v5_MOD_CIGC : + mod->BSIM4v5cigc = value->rValue; + mod->BSIM4v5cigcGiven = TRUE; + break; + case BSIM4v5_MOD_AIGSD : + mod->BSIM4v5aigsd = value->rValue; + mod->BSIM4v5aigsdGiven = TRUE; + break; + case BSIM4v5_MOD_BIGSD : + mod->BSIM4v5bigsd = value->rValue; + mod->BSIM4v5bigsdGiven = TRUE; + break; + case BSIM4v5_MOD_CIGSD : + mod->BSIM4v5cigsd = value->rValue; + mod->BSIM4v5cigsdGiven = TRUE; + break; + case BSIM4v5_MOD_AIGBACC : + mod->BSIM4v5aigbacc = value->rValue; + mod->BSIM4v5aigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_BIGBACC : + mod->BSIM4v5bigbacc = value->rValue; + mod->BSIM4v5bigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_CIGBACC : + mod->BSIM4v5cigbacc = value->rValue; + mod->BSIM4v5cigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_AIGBINV : + mod->BSIM4v5aigbinv = value->rValue; + mod->BSIM4v5aigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_BIGBINV : + mod->BSIM4v5bigbinv = value->rValue; + mod->BSIM4v5bigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_CIGBINV : + mod->BSIM4v5cigbinv = value->rValue; + mod->BSIM4v5cigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_NIGC : + mod->BSIM4v5nigc = value->rValue; + mod->BSIM4v5nigcGiven = TRUE; + break; + case BSIM4v5_MOD_NIGBINV : + mod->BSIM4v5nigbinv = value->rValue; + mod->BSIM4v5nigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_NIGBACC : + mod->BSIM4v5nigbacc = value->rValue; + mod->BSIM4v5nigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_NTOX : + mod->BSIM4v5ntox = value->rValue; + mod->BSIM4v5ntoxGiven = TRUE; + break; + case BSIM4v5_MOD_EIGBINV : + mod->BSIM4v5eigbinv = value->rValue; + mod->BSIM4v5eigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_PIGCD : + mod->BSIM4v5pigcd = value->rValue; + mod->BSIM4v5pigcdGiven = TRUE; + break; + case BSIM4v5_MOD_POXEDGE : + mod->BSIM4v5poxedge = value->rValue; + mod->BSIM4v5poxedgeGiven = TRUE; + break; + case BSIM4v5_MOD_XRCRG1 : + mod->BSIM4v5xrcrg1 = value->rValue; + mod->BSIM4v5xrcrg1Given = TRUE; + break; + case BSIM4v5_MOD_XRCRG2 : + mod->BSIM4v5xrcrg2 = value->rValue; + mod->BSIM4v5xrcrg2Given = TRUE; + break; + case BSIM4v5_MOD_LAMBDA : + mod->BSIM4v5lambda = value->rValue; + mod->BSIM4v5lambdaGiven = TRUE; + break; + case BSIM4v5_MOD_VTL : + mod->BSIM4v5vtl = value->rValue; + mod->BSIM4v5vtlGiven = TRUE; + break; + case BSIM4v5_MOD_XN: + mod->BSIM4v5xn = value->rValue; + mod->BSIM4v5xnGiven = TRUE; + break; + case BSIM4v5_MOD_LC: + mod->BSIM4v5lc = value->rValue; + mod->BSIM4v5lcGiven = TRUE; + break; + case BSIM4v5_MOD_TNOIA : + mod->BSIM4v5tnoia = value->rValue; + mod->BSIM4v5tnoiaGiven = TRUE; + break; + case BSIM4v5_MOD_TNOIB : + mod->BSIM4v5tnoib = value->rValue; + mod->BSIM4v5tnoibGiven = TRUE; + break; + case BSIM4v5_MOD_RNOIA : + mod->BSIM4v5rnoia = value->rValue; + mod->BSIM4v5rnoiaGiven = TRUE; + break; + case BSIM4v5_MOD_RNOIB : + mod->BSIM4v5rnoib = value->rValue; + mod->BSIM4v5rnoibGiven = TRUE; + break; + case BSIM4v5_MOD_NTNOI : + mod->BSIM4v5ntnoi = value->rValue; + mod->BSIM4v5ntnoiGiven = TRUE; + break; + case BSIM4v5_MOD_VFBSDOFF: + mod->BSIM4v5vfbsdoff = value->rValue; + mod->BSIM4v5vfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_TVFBSDOFF: + mod->BSIM4v5tvfbsdoff = value->rValue; + mod->BSIM4v5tvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_LINTNOI: + mod->BSIM4v5lintnoi = value->rValue; + mod->BSIM4v5lintnoiGiven = TRUE; + break; + + /* stress effect */ + case BSIM4v5_MOD_SAREF : + mod->BSIM4v5saref = value->rValue; + mod->BSIM4v5sarefGiven = TRUE; + break; + case BSIM4v5_MOD_SBREF : + mod->BSIM4v5sbref = value->rValue; + mod->BSIM4v5sbrefGiven = TRUE; + break; + case BSIM4v5_MOD_WLOD : + mod->BSIM4v5wlod = value->rValue; + mod->BSIM4v5wlodGiven = TRUE; + break; + case BSIM4v5_MOD_KU0 : + mod->BSIM4v5ku0 = value->rValue; + mod->BSIM4v5ku0Given = TRUE; + break; + case BSIM4v5_MOD_KVSAT : + mod->BSIM4v5kvsat = value->rValue; + mod->BSIM4v5kvsatGiven = TRUE; + break; + case BSIM4v5_MOD_KVTH0 : + mod->BSIM4v5kvth0 = value->rValue; + mod->BSIM4v5kvth0Given = TRUE; + break; + case BSIM4v5_MOD_TKU0 : + mod->BSIM4v5tku0 = value->rValue; + mod->BSIM4v5tku0Given = TRUE; + break; + case BSIM4v5_MOD_LLODKU0 : + mod->BSIM4v5llodku0 = value->rValue; + mod->BSIM4v5llodku0Given = TRUE; + break; + case BSIM4v5_MOD_WLODKU0 : + mod->BSIM4v5wlodku0 = value->rValue; + mod->BSIM4v5wlodku0Given = TRUE; + break; + case BSIM4v5_MOD_LLODVTH : + mod->BSIM4v5llodvth = value->rValue; + mod->BSIM4v5llodvthGiven = TRUE; + break; + case BSIM4v5_MOD_WLODVTH : + mod->BSIM4v5wlodvth = value->rValue; + mod->BSIM4v5wlodvthGiven = TRUE; + break; + case BSIM4v5_MOD_LKU0 : + mod->BSIM4v5lku0 = value->rValue; + mod->BSIM4v5lku0Given = TRUE; + break; + case BSIM4v5_MOD_WKU0 : + mod->BSIM4v5wku0 = value->rValue; + mod->BSIM4v5wku0Given = TRUE; + break; + case BSIM4v5_MOD_PKU0 : + mod->BSIM4v5pku0 = value->rValue; + mod->BSIM4v5pku0Given = TRUE; + break; + case BSIM4v5_MOD_LKVTH0 : + mod->BSIM4v5lkvth0 = value->rValue; + mod->BSIM4v5lkvth0Given = TRUE; + break; + case BSIM4v5_MOD_WKVTH0 : + mod->BSIM4v5wkvth0 = value->rValue; + mod->BSIM4v5wkvth0Given = TRUE; + break; + case BSIM4v5_MOD_PKVTH0 : + mod->BSIM4v5pkvth0 = value->rValue; + mod->BSIM4v5pkvth0Given = TRUE; + break; + case BSIM4v5_MOD_STK2 : + mod->BSIM4v5stk2 = value->rValue; + mod->BSIM4v5stk2Given = TRUE; + break; + case BSIM4v5_MOD_LODK2 : + mod->BSIM4v5lodk2 = value->rValue; + mod->BSIM4v5lodk2Given = TRUE; + break; + case BSIM4v5_MOD_STETA0 : + mod->BSIM4v5steta0 = value->rValue; + mod->BSIM4v5steta0Given = TRUE; + break; + case BSIM4v5_MOD_LODETA0 : + mod->BSIM4v5lodeta0 = value->rValue; + mod->BSIM4v5lodeta0Given = TRUE; + break; + + case BSIM4v5_MOD_WEB : + mod->BSIM4v5web = value->rValue; + mod->BSIM4v5webGiven = TRUE; + break; + case BSIM4v5_MOD_WEC : + mod->BSIM4v5wec = value->rValue; + mod->BSIM4v5wecGiven = TRUE; + break; + case BSIM4v5_MOD_KVTH0WE : + mod->BSIM4v5kvth0we = value->rValue; + mod->BSIM4v5kvth0weGiven = TRUE; + break; + case BSIM4v5_MOD_K2WE : + mod->BSIM4v5k2we = value->rValue; + mod->BSIM4v5k2weGiven = TRUE; + break; + case BSIM4v5_MOD_KU0WE : + mod->BSIM4v5ku0we = value->rValue; + mod->BSIM4v5ku0weGiven = TRUE; + break; + case BSIM4v5_MOD_SCREF : + mod->BSIM4v5scref = value->rValue; + mod->BSIM4v5screfGiven = TRUE; + break; + case BSIM4v5_MOD_WPEMOD : + mod->BSIM4v5wpemod = value->rValue; + mod->BSIM4v5wpemodGiven = TRUE; + break; + case BSIM4v5_MOD_LKVTH0WE : + mod->BSIM4v5lkvth0we = value->rValue; + mod->BSIM4v5lkvth0weGiven = TRUE; + break; + case BSIM4v5_MOD_LK2WE : + mod->BSIM4v5lk2we = value->rValue; + mod->BSIM4v5lk2weGiven = TRUE; + break; + case BSIM4v5_MOD_LKU0WE : + mod->BSIM4v5lku0we = value->rValue; + mod->BSIM4v5lku0weGiven = TRUE; + break; + case BSIM4v5_MOD_WKVTH0WE : + mod->BSIM4v5wkvth0we = value->rValue; + mod->BSIM4v5wkvth0weGiven = TRUE; + break; + case BSIM4v5_MOD_WK2WE : + mod->BSIM4v5wk2we = value->rValue; + mod->BSIM4v5wk2weGiven = TRUE; + break; + case BSIM4v5_MOD_WKU0WE : + mod->BSIM4v5wku0we = value->rValue; + mod->BSIM4v5wku0weGiven = TRUE; + break; + case BSIM4v5_MOD_PKVTH0WE : + mod->BSIM4v5pkvth0we = value->rValue; + mod->BSIM4v5pkvth0weGiven = TRUE; + break; + case BSIM4v5_MOD_PK2WE : + mod->BSIM4v5pk2we = value->rValue; + mod->BSIM4v5pk2weGiven = TRUE; + break; + case BSIM4v5_MOD_PKU0WE : + mod->BSIM4v5pku0we = value->rValue; + mod->BSIM4v5pku0weGiven = TRUE; + break; + + case BSIM4v5_MOD_BETA0 : + mod->BSIM4v5beta0 = value->rValue; + mod->BSIM4v5beta0Given = TRUE; + break; + case BSIM4v5_MOD_IJTHDFWD : + mod->BSIM4v5ijthdfwd = value->rValue; + mod->BSIM4v5ijthdfwdGiven = TRUE; + break; + case BSIM4v5_MOD_IJTHSFWD : + mod->BSIM4v5ijthsfwd = value->rValue; + mod->BSIM4v5ijthsfwdGiven = TRUE; + break; + case BSIM4v5_MOD_IJTHDREV : + mod->BSIM4v5ijthdrev = value->rValue; + mod->BSIM4v5ijthdrevGiven = TRUE; + break; + case BSIM4v5_MOD_IJTHSREV : + mod->BSIM4v5ijthsrev = value->rValue; + mod->BSIM4v5ijthsrevGiven = TRUE; + break; + case BSIM4v5_MOD_XJBVD : + mod->BSIM4v5xjbvd = value->rValue; + mod->BSIM4v5xjbvdGiven = TRUE; + break; + case BSIM4v5_MOD_XJBVS : + mod->BSIM4v5xjbvs = value->rValue; + mod->BSIM4v5xjbvsGiven = TRUE; + break; + case BSIM4v5_MOD_BVD : + mod->BSIM4v5bvd = value->rValue; + mod->BSIM4v5bvdGiven = TRUE; + break; + case BSIM4v5_MOD_BVS : + mod->BSIM4v5bvs = value->rValue; + mod->BSIM4v5bvsGiven = TRUE; + break; + + /* reverse diode */ + case BSIM4v5_MOD_JTSS : + mod->BSIM4v5jtss = value->rValue; + mod->BSIM4v5jtssGiven = TRUE; + break; + case BSIM4v5_MOD_JTSD : + mod->BSIM4v5jtsd = value->rValue; + mod->BSIM4v5jtsdGiven = TRUE; + break; + case BSIM4v5_MOD_JTSSWS : + mod->BSIM4v5jtssws = value->rValue; + mod->BSIM4v5jtsswsGiven = TRUE; + break; + case BSIM4v5_MOD_JTSSWD : + mod->BSIM4v5jtsswd = value->rValue; + mod->BSIM4v5jtsswdGiven = TRUE; + break; + case BSIM4v5_MOD_JTSSWGS : + mod->BSIM4v5jtsswgs = value->rValue; + mod->BSIM4v5jtsswgsGiven = TRUE; + break; + case BSIM4v5_MOD_JTSSWGD : + mod->BSIM4v5jtsswgd = value->rValue; + mod->BSIM4v5jtsswgdGiven = TRUE; + break; + case BSIM4v5_MOD_NJTS : + mod->BSIM4v5njts = value->rValue; + mod->BSIM4v5njtsGiven = TRUE; + break; + case BSIM4v5_MOD_NJTSSW : + mod->BSIM4v5njtssw = value->rValue; + mod->BSIM4v5njtsswGiven = TRUE; + break; + case BSIM4v5_MOD_NJTSSWG : + mod->BSIM4v5njtsswg = value->rValue; + mod->BSIM4v5njtsswgGiven = TRUE; + break; + case BSIM4v5_MOD_XTSS : + mod->BSIM4v5xtss = value->rValue; + mod->BSIM4v5xtssGiven = TRUE; + break; + case BSIM4v5_MOD_XTSD : + mod->BSIM4v5xtsd = value->rValue; + mod->BSIM4v5xtsdGiven = TRUE; + break; + case BSIM4v5_MOD_XTSSWS : + mod->BSIM4v5xtssws = value->rValue; + mod->BSIM4v5xtsswsGiven = TRUE; + break; + case BSIM4v5_MOD_XTSSWD : + mod->BSIM4v5xtsswd = value->rValue; + mod->BSIM4v5xtsswdGiven = TRUE; + break; + case BSIM4v5_MOD_XTSSWGS : + mod->BSIM4v5xtsswgs = value->rValue; + mod->BSIM4v5xtsswgsGiven = TRUE; + break; + case BSIM4v5_MOD_XTSSWGD : + mod->BSIM4v5xtsswgd = value->rValue; + mod->BSIM4v5xtsswgdGiven = TRUE; + break; + case BSIM4v5_MOD_TNJTS : + mod->BSIM4v5tnjts = value->rValue; + mod->BSIM4v5tnjtsGiven = TRUE; + break; + case BSIM4v5_MOD_TNJTSSW : + mod->BSIM4v5tnjtssw = value->rValue; + mod->BSIM4v5tnjtsswGiven = TRUE; + break; + case BSIM4v5_MOD_TNJTSSWG : + mod->BSIM4v5tnjtsswg = value->rValue; + mod->BSIM4v5tnjtsswgGiven = TRUE; + break; + case BSIM4v5_MOD_VTSS : + mod->BSIM4v5vtss = value->rValue; + mod->BSIM4v5vtssGiven = TRUE; + break; + case BSIM4v5_MOD_VTSD : + mod->BSIM4v5vtsd = value->rValue; + mod->BSIM4v5vtsdGiven = TRUE; + break; + case BSIM4v5_MOD_VTSSWS : + mod->BSIM4v5vtssws = value->rValue; + mod->BSIM4v5vtsswsGiven = TRUE; + break; + case BSIM4v5_MOD_VTSSWD : + mod->BSIM4v5vtsswd = value->rValue; + mod->BSIM4v5vtsswdGiven = TRUE; + break; + case BSIM4v5_MOD_VTSSWGS : + mod->BSIM4v5vtsswgs = value->rValue; + mod->BSIM4v5vtsswgsGiven = TRUE; + break; + case BSIM4v5_MOD_VTSSWGD : + mod->BSIM4v5vtsswgd = value->rValue; + mod->BSIM4v5vtsswgdGiven = TRUE; + break; + + case BSIM4v5_MOD_VFB : + mod->BSIM4v5vfb = value->rValue; + mod->BSIM4v5vfbGiven = TRUE; + break; + + case BSIM4v5_MOD_GBMIN : + mod->BSIM4v5gbmin = value->rValue; + mod->BSIM4v5gbminGiven = TRUE; + break; + case BSIM4v5_MOD_RBDB : + mod->BSIM4v5rbdb = value->rValue; + mod->BSIM4v5rbdbGiven = TRUE; + break; + case BSIM4v5_MOD_RBPB : + mod->BSIM4v5rbpb = value->rValue; + mod->BSIM4v5rbpbGiven = TRUE; + break; + case BSIM4v5_MOD_RBSB : + mod->BSIM4v5rbsb = value->rValue; + mod->BSIM4v5rbsbGiven = TRUE; + break; + case BSIM4v5_MOD_RBPS : + mod->BSIM4v5rbps = value->rValue; + mod->BSIM4v5rbpsGiven = TRUE; + break; + case BSIM4v5_MOD_RBPD : + mod->BSIM4v5rbpd = value->rValue; + mod->BSIM4v5rbpdGiven = TRUE; + break; + + case BSIM4v5_MOD_RBPS0 : + mod->BSIM4v5rbps0 = value->rValue; + mod->BSIM4v5rbps0Given = TRUE; + break; + case BSIM4v5_MOD_RBPSL : + mod->BSIM4v5rbpsl = value->rValue; + mod->BSIM4v5rbpslGiven = TRUE; + break; + case BSIM4v5_MOD_RBPSW : + mod->BSIM4v5rbpsw = value->rValue; + mod->BSIM4v5rbpswGiven = TRUE; + break; + case BSIM4v5_MOD_RBPSNF : + mod->BSIM4v5rbpsnf = value->rValue; + mod->BSIM4v5rbpsnfGiven = TRUE; + break; + + case BSIM4v5_MOD_RBPD0 : + mod->BSIM4v5rbpd0 = value->rValue; + mod->BSIM4v5rbpd0Given = TRUE; + break; + case BSIM4v5_MOD_RBPDL : + mod->BSIM4v5rbpdl = value->rValue; + mod->BSIM4v5rbpdlGiven = TRUE; + break; + case BSIM4v5_MOD_RBPDW : + mod->BSIM4v5rbpdw = value->rValue; + mod->BSIM4v5rbpdwGiven = TRUE; + break; + case BSIM4v5_MOD_RBPDNF : + mod->BSIM4v5rbpdnf = value->rValue; + mod->BSIM4v5rbpdnfGiven = TRUE; + break; + + case BSIM4v5_MOD_RBPBX0 : + mod->BSIM4v5rbpbx0 = value->rValue; + mod->BSIM4v5rbpbx0Given = TRUE; + break; + case BSIM4v5_MOD_RBPBXL : + mod->BSIM4v5rbpbxl = value->rValue; + mod->BSIM4v5rbpbxlGiven = TRUE; + break; + case BSIM4v5_MOD_RBPBXW : + mod->BSIM4v5rbpbxw = value->rValue; + mod->BSIM4v5rbpbxwGiven = TRUE; + break; + case BSIM4v5_MOD_RBPBXNF : + mod->BSIM4v5rbpbxnf = value->rValue; + mod->BSIM4v5rbpbxnfGiven = TRUE; + break; + case BSIM4v5_MOD_RBPBY0 : + mod->BSIM4v5rbpby0 = value->rValue; + mod->BSIM4v5rbpby0Given = TRUE; + break; + case BSIM4v5_MOD_RBPBYL : + mod->BSIM4v5rbpbyl = value->rValue; + mod->BSIM4v5rbpbylGiven = TRUE; + break; + case BSIM4v5_MOD_RBPBYW : + mod->BSIM4v5rbpbyw = value->rValue; + mod->BSIM4v5rbpbywGiven = TRUE; + break; + case BSIM4v5_MOD_RBPBYNF : + mod->BSIM4v5rbpbynf = value->rValue; + mod->BSIM4v5rbpbynfGiven = TRUE; + break; + case BSIM4v5_MOD_RBSBX0 : + mod->BSIM4v5rbsbx0 = value->rValue; + mod->BSIM4v5rbsbx0Given = TRUE; + break; + case BSIM4v5_MOD_RBSBY0 : + mod->BSIM4v5rbsby0 = value->rValue; + mod->BSIM4v5rbsby0Given = TRUE; + break; + case BSIM4v5_MOD_RBDBX0 : + mod->BSIM4v5rbdbx0 = value->rValue; + mod->BSIM4v5rbdbx0Given = TRUE; + break; + case BSIM4v5_MOD_RBDBY0 : + mod->BSIM4v5rbdby0 = value->rValue; + mod->BSIM4v5rbdby0Given = TRUE; + break; + + + case BSIM4v5_MOD_RBSDBXL : + mod->BSIM4v5rbsdbxl = value->rValue; + mod->BSIM4v5rbsdbxlGiven = TRUE; + break; + case BSIM4v5_MOD_RBSDBXW : + mod->BSIM4v5rbsdbxw = value->rValue; + mod->BSIM4v5rbsdbxwGiven = TRUE; + break; + case BSIM4v5_MOD_RBSDBXNF : + mod->BSIM4v5rbsdbxnf = value->rValue; + mod->BSIM4v5rbsdbxnfGiven = TRUE; + break; + case BSIM4v5_MOD_RBSDBYL : + mod->BSIM4v5rbsdbyl = value->rValue; + mod->BSIM4v5rbsdbylGiven = TRUE; + break; + case BSIM4v5_MOD_RBSDBYW : + mod->BSIM4v5rbsdbyw = value->rValue; + mod->BSIM4v5rbsdbywGiven = TRUE; + break; + case BSIM4v5_MOD_RBSDBYNF : + mod->BSIM4v5rbsdbynf = value->rValue; + mod->BSIM4v5rbsdbynfGiven = TRUE; + break; + + case BSIM4v5_MOD_CGSL : + mod->BSIM4v5cgsl = value->rValue; + mod->BSIM4v5cgslGiven = TRUE; + break; + case BSIM4v5_MOD_CGDL : + mod->BSIM4v5cgdl = value->rValue; + mod->BSIM4v5cgdlGiven = TRUE; + break; + case BSIM4v5_MOD_CKAPPAS : + mod->BSIM4v5ckappas = value->rValue; + mod->BSIM4v5ckappasGiven = TRUE; + break; + case BSIM4v5_MOD_CKAPPAD : + mod->BSIM4v5ckappad = value->rValue; + mod->BSIM4v5ckappadGiven = TRUE; + break; + case BSIM4v5_MOD_CF : + mod->BSIM4v5cf = value->rValue; + mod->BSIM4v5cfGiven = TRUE; + break; + case BSIM4v5_MOD_CLC : + mod->BSIM4v5clc = value->rValue; + mod->BSIM4v5clcGiven = TRUE; + break; + case BSIM4v5_MOD_CLE : + mod->BSIM4v5cle = value->rValue; + mod->BSIM4v5cleGiven = TRUE; + break; + case BSIM4v5_MOD_DWC : + mod->BSIM4v5dwc = value->rValue; + mod->BSIM4v5dwcGiven = TRUE; + break; + case BSIM4v5_MOD_DLC : + mod->BSIM4v5dlc = value->rValue; + mod->BSIM4v5dlcGiven = TRUE; + break; + case BSIM4v5_MOD_XW : + mod->BSIM4v5xw = value->rValue; + mod->BSIM4v5xwGiven = TRUE; + break; + case BSIM4v5_MOD_XL : + mod->BSIM4v5xl = value->rValue; + mod->BSIM4v5xlGiven = TRUE; + break; + case BSIM4v5_MOD_DLCIG : + mod->BSIM4v5dlcig = value->rValue; + mod->BSIM4v5dlcigGiven = TRUE; + break; + case BSIM4v5_MOD_DWJ : + mod->BSIM4v5dwj = value->rValue; + mod->BSIM4v5dwjGiven = TRUE; + break; + case BSIM4v5_MOD_VFBCV : + mod->BSIM4v5vfbcv = value->rValue; + mod->BSIM4v5vfbcvGiven = TRUE; + break; + case BSIM4v5_MOD_ACDE : + mod->BSIM4v5acde = value->rValue; + mod->BSIM4v5acdeGiven = TRUE; + break; + case BSIM4v5_MOD_MOIN : + mod->BSIM4v5moin = value->rValue; + mod->BSIM4v5moinGiven = TRUE; + break; + case BSIM4v5_MOD_NOFF : + mod->BSIM4v5noff = value->rValue; + mod->BSIM4v5noffGiven = TRUE; + break; + case BSIM4v5_MOD_VOFFCV : + mod->BSIM4v5voffcv = value->rValue; + mod->BSIM4v5voffcvGiven = TRUE; + break; + case BSIM4v5_MOD_DMCG : + mod->BSIM4v5dmcg = value->rValue; + mod->BSIM4v5dmcgGiven = TRUE; + break; + case BSIM4v5_MOD_DMCI : + mod->BSIM4v5dmci = value->rValue; + mod->BSIM4v5dmciGiven = TRUE; + break; + case BSIM4v5_MOD_DMDG : + mod->BSIM4v5dmdg = value->rValue; + mod->BSIM4v5dmdgGiven = TRUE; + break; + case BSIM4v5_MOD_DMCGT : + mod->BSIM4v5dmcgt = value->rValue; + mod->BSIM4v5dmcgtGiven = TRUE; + break; + case BSIM4v5_MOD_XGW : + mod->BSIM4v5xgw = value->rValue; + mod->BSIM4v5xgwGiven = TRUE; + break; + case BSIM4v5_MOD_XGL : + mod->BSIM4v5xgl = value->rValue; + mod->BSIM4v5xglGiven = TRUE; + break; + case BSIM4v5_MOD_RSHG : + mod->BSIM4v5rshg = value->rValue; + mod->BSIM4v5rshgGiven = TRUE; + break; + case BSIM4v5_MOD_NGCON : + mod->BSIM4v5ngcon = value->rValue; + mod->BSIM4v5ngconGiven = TRUE; + break; + case BSIM4v5_MOD_TCJ : + mod->BSIM4v5tcj = value->rValue; + mod->BSIM4v5tcjGiven = TRUE; + break; + case BSIM4v5_MOD_TPB : + mod->BSIM4v5tpb = value->rValue; + mod->BSIM4v5tpbGiven = TRUE; + break; + case BSIM4v5_MOD_TCJSW : + mod->BSIM4v5tcjsw = value->rValue; + mod->BSIM4v5tcjswGiven = TRUE; + break; + case BSIM4v5_MOD_TPBSW : + mod->BSIM4v5tpbsw = value->rValue; + mod->BSIM4v5tpbswGiven = TRUE; + break; + case BSIM4v5_MOD_TCJSWG : + mod->BSIM4v5tcjswg = value->rValue; + mod->BSIM4v5tcjswgGiven = TRUE; + break; + case BSIM4v5_MOD_TPBSWG : + mod->BSIM4v5tpbswg = value->rValue; + mod->BSIM4v5tpbswgGiven = TRUE; + break; + + /* Length dependence */ + case BSIM4v5_MOD_LCDSC : + mod->BSIM4v5lcdsc = value->rValue; + mod->BSIM4v5lcdscGiven = TRUE; + break; + + + case BSIM4v5_MOD_LCDSCB : + mod->BSIM4v5lcdscb = value->rValue; + mod->BSIM4v5lcdscbGiven = TRUE; + break; + case BSIM4v5_MOD_LCDSCD : + mod->BSIM4v5lcdscd = value->rValue; + mod->BSIM4v5lcdscdGiven = TRUE; + break; + case BSIM4v5_MOD_LCIT : + mod->BSIM4v5lcit = value->rValue; + mod->BSIM4v5lcitGiven = TRUE; + break; + case BSIM4v5_MOD_LNFACTOR : + mod->BSIM4v5lnfactor = value->rValue; + mod->BSIM4v5lnfactorGiven = TRUE; + break; + case BSIM4v5_MOD_LXJ: + mod->BSIM4v5lxj = value->rValue; + mod->BSIM4v5lxjGiven = TRUE; + break; + case BSIM4v5_MOD_LVSAT: + mod->BSIM4v5lvsat = value->rValue; + mod->BSIM4v5lvsatGiven = TRUE; + break; + + + case BSIM4v5_MOD_LA0: + mod->BSIM4v5la0 = value->rValue; + mod->BSIM4v5la0Given = TRUE; + break; + case BSIM4v5_MOD_LAGS: + mod->BSIM4v5lags = value->rValue; + mod->BSIM4v5lagsGiven = TRUE; + break; + case BSIM4v5_MOD_LA1: + mod->BSIM4v5la1 = value->rValue; + mod->BSIM4v5la1Given = TRUE; + break; + case BSIM4v5_MOD_LA2: + mod->BSIM4v5la2 = value->rValue; + mod->BSIM4v5la2Given = TRUE; + break; + case BSIM4v5_MOD_LAT: + mod->BSIM4v5lat = value->rValue; + mod->BSIM4v5latGiven = TRUE; + break; + case BSIM4v5_MOD_LKETA: + mod->BSIM4v5lketa = value->rValue; + mod->BSIM4v5lketaGiven = TRUE; + break; + case BSIM4v5_MOD_LNSUB: + mod->BSIM4v5lnsub = value->rValue; + mod->BSIM4v5lnsubGiven = TRUE; + break; + case BSIM4v5_MOD_LNDEP: + mod->BSIM4v5lndep = value->rValue; + mod->BSIM4v5lndepGiven = TRUE; + if (mod->BSIM4v5lndep > 1.0e20) + mod->BSIM4v5lndep *= 1.0e-6; + break; + case BSIM4v5_MOD_LNSD: + mod->BSIM4v5lnsd = value->rValue; + mod->BSIM4v5lnsdGiven = TRUE; + if (mod->BSIM4v5lnsd > 1.0e23) + mod->BSIM4v5lnsd *= 1.0e-6; + break; + case BSIM4v5_MOD_LNGATE: + mod->BSIM4v5lngate = value->rValue; + mod->BSIM4v5lngateGiven = TRUE; + if (mod->BSIM4v5lngate > 1.0e23) + mod->BSIM4v5lngate *= 1.0e-6; + break; + case BSIM4v5_MOD_LGAMMA1: + mod->BSIM4v5lgamma1 = value->rValue; + mod->BSIM4v5lgamma1Given = TRUE; + break; + case BSIM4v5_MOD_LGAMMA2: + mod->BSIM4v5lgamma2 = value->rValue; + mod->BSIM4v5lgamma2Given = TRUE; + break; + case BSIM4v5_MOD_LVBX: + mod->BSIM4v5lvbx = value->rValue; + mod->BSIM4v5lvbxGiven = TRUE; + break; + case BSIM4v5_MOD_LVBM: + mod->BSIM4v5lvbm = value->rValue; + mod->BSIM4v5lvbmGiven = TRUE; + break; + case BSIM4v5_MOD_LXT: + mod->BSIM4v5lxt = value->rValue; + mod->BSIM4v5lxtGiven = TRUE; + break; + case BSIM4v5_MOD_LK1: + mod->BSIM4v5lk1 = value->rValue; + mod->BSIM4v5lk1Given = TRUE; + break; + case BSIM4v5_MOD_LKT1: + mod->BSIM4v5lkt1 = value->rValue; + mod->BSIM4v5lkt1Given = TRUE; + break; + case BSIM4v5_MOD_LKT1L: + mod->BSIM4v5lkt1l = value->rValue; + mod->BSIM4v5lkt1lGiven = TRUE; + break; + case BSIM4v5_MOD_LKT2: + mod->BSIM4v5lkt2 = value->rValue; + mod->BSIM4v5lkt2Given = TRUE; + break; + case BSIM4v5_MOD_LK2: + mod->BSIM4v5lk2 = value->rValue; + mod->BSIM4v5lk2Given = TRUE; + break; + case BSIM4v5_MOD_LK3: + mod->BSIM4v5lk3 = value->rValue; + mod->BSIM4v5lk3Given = TRUE; + break; + case BSIM4v5_MOD_LK3B: + mod->BSIM4v5lk3b = value->rValue; + mod->BSIM4v5lk3bGiven = TRUE; + break; + case BSIM4v5_MOD_LLPE0: + mod->BSIM4v5llpe0 = value->rValue; + mod->BSIM4v5llpe0Given = TRUE; + break; + case BSIM4v5_MOD_LLPEB: + mod->BSIM4v5llpeb = value->rValue; + mod->BSIM4v5llpebGiven = TRUE; + break; + case BSIM4v5_MOD_LDVTP0: + mod->BSIM4v5ldvtp0 = value->rValue; + mod->BSIM4v5ldvtp0Given = TRUE; + break; + case BSIM4v5_MOD_LDVTP1: + mod->BSIM4v5ldvtp1 = value->rValue; + mod->BSIM4v5ldvtp1Given = TRUE; + break; + case BSIM4v5_MOD_LW0: + mod->BSIM4v5lw0 = value->rValue; + mod->BSIM4v5lw0Given = TRUE; + break; + case BSIM4v5_MOD_LDVT0: + mod->BSIM4v5ldvt0 = value->rValue; + mod->BSIM4v5ldvt0Given = TRUE; + break; + case BSIM4v5_MOD_LDVT1: + mod->BSIM4v5ldvt1 = value->rValue; + mod->BSIM4v5ldvt1Given = TRUE; + break; + case BSIM4v5_MOD_LDVT2: + mod->BSIM4v5ldvt2 = value->rValue; + mod->BSIM4v5ldvt2Given = TRUE; + break; + case BSIM4v5_MOD_LDVT0W: + mod->BSIM4v5ldvt0w = value->rValue; + mod->BSIM4v5ldvt0wGiven = TRUE; + break; + case BSIM4v5_MOD_LDVT1W: + mod->BSIM4v5ldvt1w = value->rValue; + mod->BSIM4v5ldvt1wGiven = TRUE; + break; + case BSIM4v5_MOD_LDVT2W: + mod->BSIM4v5ldvt2w = value->rValue; + mod->BSIM4v5ldvt2wGiven = TRUE; + break; + case BSIM4v5_MOD_LDROUT: + mod->BSIM4v5ldrout = value->rValue; + mod->BSIM4v5ldroutGiven = TRUE; + break; + case BSIM4v5_MOD_LDSUB: + mod->BSIM4v5ldsub = value->rValue; + mod->BSIM4v5ldsubGiven = TRUE; + break; + case BSIM4v5_MOD_LVTH0: + mod->BSIM4v5lvth0 = value->rValue; + mod->BSIM4v5lvth0Given = TRUE; + break; + case BSIM4v5_MOD_LUA: + mod->BSIM4v5lua = value->rValue; + mod->BSIM4v5luaGiven = TRUE; + break; + case BSIM4v5_MOD_LUA1: + mod->BSIM4v5lua1 = value->rValue; + mod->BSIM4v5lua1Given = TRUE; + break; + case BSIM4v5_MOD_LUB: + mod->BSIM4v5lub = value->rValue; + mod->BSIM4v5lubGiven = TRUE; + break; + case BSIM4v5_MOD_LUB1: + mod->BSIM4v5lub1 = value->rValue; + mod->BSIM4v5lub1Given = TRUE; + break; + case BSIM4v5_MOD_LUC: + mod->BSIM4v5luc = value->rValue; + mod->BSIM4v5lucGiven = TRUE; + break; + case BSIM4v5_MOD_LUC1: + mod->BSIM4v5luc1 = value->rValue; + mod->BSIM4v5luc1Given = TRUE; + break; + case BSIM4v5_MOD_LU0 : + mod->BSIM4v5lu0 = value->rValue; + mod->BSIM4v5lu0Given = TRUE; + break; + case BSIM4v5_MOD_LUTE : + mod->BSIM4v5lute = value->rValue; + mod->BSIM4v5luteGiven = TRUE; + break; + case BSIM4v5_MOD_LVOFF: + mod->BSIM4v5lvoff = value->rValue; + mod->BSIM4v5lvoffGiven = TRUE; + break; + case BSIM4v5_MOD_LTVOFF: + mod->BSIM4v5ltvoff = value->rValue; + mod->BSIM4v5ltvoffGiven = TRUE; + break; + case BSIM4v5_MOD_LMINV: + mod->BSIM4v5lminv = value->rValue; + mod->BSIM4v5lminvGiven = TRUE; + break; + case BSIM4v5_MOD_LFPROUT: + mod->BSIM4v5lfprout = value->rValue; + mod->BSIM4v5lfproutGiven = TRUE; + break; + case BSIM4v5_MOD_LPDITS: + mod->BSIM4v5lpdits = value->rValue; + mod->BSIM4v5lpditsGiven = TRUE; + break; + case BSIM4v5_MOD_LPDITSD: + mod->BSIM4v5lpditsd = value->rValue; + mod->BSIM4v5lpditsdGiven = TRUE; + break; + case BSIM4v5_MOD_LDELTA : + mod->BSIM4v5ldelta = value->rValue; + mod->BSIM4v5ldeltaGiven = TRUE; + break; + case BSIM4v5_MOD_LRDSW: + mod->BSIM4v5lrdsw = value->rValue; + mod->BSIM4v5lrdswGiven = TRUE; + break; + case BSIM4v5_MOD_LRDW: + mod->BSIM4v5lrdw = value->rValue; + mod->BSIM4v5lrdwGiven = TRUE; + break; + case BSIM4v5_MOD_LRSW: + mod->BSIM4v5lrsw = value->rValue; + mod->BSIM4v5lrswGiven = TRUE; + break; + case BSIM4v5_MOD_LPRWB: + mod->BSIM4v5lprwb = value->rValue; + mod->BSIM4v5lprwbGiven = TRUE; + break; + case BSIM4v5_MOD_LPRWG: + mod->BSIM4v5lprwg = value->rValue; + mod->BSIM4v5lprwgGiven = TRUE; + break; + case BSIM4v5_MOD_LPRT: + mod->BSIM4v5lprt = value->rValue; + mod->BSIM4v5lprtGiven = TRUE; + break; + case BSIM4v5_MOD_LETA0: + mod->BSIM4v5leta0 = value->rValue; + mod->BSIM4v5leta0Given = TRUE; + break; + case BSIM4v5_MOD_LETAB: + mod->BSIM4v5letab = value->rValue; + mod->BSIM4v5letabGiven = TRUE; + break; + case BSIM4v5_MOD_LPCLM: + mod->BSIM4v5lpclm = value->rValue; + mod->BSIM4v5lpclmGiven = TRUE; + break; + case BSIM4v5_MOD_LPDIBL1: + mod->BSIM4v5lpdibl1 = value->rValue; + mod->BSIM4v5lpdibl1Given = TRUE; + break; + case BSIM4v5_MOD_LPDIBL2: + mod->BSIM4v5lpdibl2 = value->rValue; + mod->BSIM4v5lpdibl2Given = TRUE; + break; + case BSIM4v5_MOD_LPDIBLB: + mod->BSIM4v5lpdiblb = value->rValue; + mod->BSIM4v5lpdiblbGiven = TRUE; + break; + case BSIM4v5_MOD_LPSCBE1: + mod->BSIM4v5lpscbe1 = value->rValue; + mod->BSIM4v5lpscbe1Given = TRUE; + break; + case BSIM4v5_MOD_LPSCBE2: + mod->BSIM4v5lpscbe2 = value->rValue; + mod->BSIM4v5lpscbe2Given = TRUE; + break; + case BSIM4v5_MOD_LPVAG: + mod->BSIM4v5lpvag = value->rValue; + mod->BSIM4v5lpvagGiven = TRUE; + break; + case BSIM4v5_MOD_LWR : + mod->BSIM4v5lwr = value->rValue; + mod->BSIM4v5lwrGiven = TRUE; + break; + case BSIM4v5_MOD_LDWG : + mod->BSIM4v5ldwg = value->rValue; + mod->BSIM4v5ldwgGiven = TRUE; + break; + case BSIM4v5_MOD_LDWB : + mod->BSIM4v5ldwb = value->rValue; + mod->BSIM4v5ldwbGiven = TRUE; + break; + case BSIM4v5_MOD_LB0 : + mod->BSIM4v5lb0 = value->rValue; + mod->BSIM4v5lb0Given = TRUE; + break; + case BSIM4v5_MOD_LB1 : + mod->BSIM4v5lb1 = value->rValue; + mod->BSIM4v5lb1Given = TRUE; + break; + case BSIM4v5_MOD_LALPHA0 : + mod->BSIM4v5lalpha0 = value->rValue; + mod->BSIM4v5lalpha0Given = TRUE; + break; + case BSIM4v5_MOD_LALPHA1 : + mod->BSIM4v5lalpha1 = value->rValue; + mod->BSIM4v5lalpha1Given = TRUE; + break; + case BSIM4v5_MOD_LBETA0 : + mod->BSIM4v5lbeta0 = value->rValue; + mod->BSIM4v5lbeta0Given = TRUE; + break; + case BSIM4v5_MOD_LAGIDL : + mod->BSIM4v5lagidl = value->rValue; + mod->BSIM4v5lagidlGiven = TRUE; + break; + case BSIM4v5_MOD_LBGIDL : + mod->BSIM4v5lbgidl = value->rValue; + mod->BSIM4v5lbgidlGiven = TRUE; + break; + case BSIM4v5_MOD_LCGIDL : + mod->BSIM4v5lcgidl = value->rValue; + mod->BSIM4v5lcgidlGiven = TRUE; + break; + case BSIM4v5_MOD_LPHIN : + mod->BSIM4v5lphin = value->rValue; + mod->BSIM4v5lphinGiven = TRUE; + break; + case BSIM4v5_MOD_LEGIDL : + mod->BSIM4v5legidl = value->rValue; + mod->BSIM4v5legidlGiven = TRUE; + break; + case BSIM4v5_MOD_LAIGC : + mod->BSIM4v5laigc = value->rValue; + mod->BSIM4v5laigcGiven = TRUE; + break; + case BSIM4v5_MOD_LBIGC : + mod->BSIM4v5lbigc = value->rValue; + mod->BSIM4v5lbigcGiven = TRUE; + break; + case BSIM4v5_MOD_LCIGC : + mod->BSIM4v5lcigc = value->rValue; + mod->BSIM4v5lcigcGiven = TRUE; + break; + case BSIM4v5_MOD_LAIGSD : + mod->BSIM4v5laigsd = value->rValue; + mod->BSIM4v5laigsdGiven = TRUE; + break; + case BSIM4v5_MOD_LBIGSD : + mod->BSIM4v5lbigsd = value->rValue; + mod->BSIM4v5lbigsdGiven = TRUE; + break; + case BSIM4v5_MOD_LCIGSD : + mod->BSIM4v5lcigsd = value->rValue; + mod->BSIM4v5lcigsdGiven = TRUE; + break; + case BSIM4v5_MOD_LAIGBACC : + mod->BSIM4v5laigbacc = value->rValue; + mod->BSIM4v5laigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_LBIGBACC : + mod->BSIM4v5lbigbacc = value->rValue; + mod->BSIM4v5lbigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_LCIGBACC : + mod->BSIM4v5lcigbacc = value->rValue; + mod->BSIM4v5lcigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_LAIGBINV : + mod->BSIM4v5laigbinv = value->rValue; + mod->BSIM4v5laigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_LBIGBINV : + mod->BSIM4v5lbigbinv = value->rValue; + mod->BSIM4v5lbigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_LCIGBINV : + mod->BSIM4v5lcigbinv = value->rValue; + mod->BSIM4v5lcigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_LNIGC : + mod->BSIM4v5lnigc = value->rValue; + mod->BSIM4v5lnigcGiven = TRUE; + break; + case BSIM4v5_MOD_LNIGBINV : + mod->BSIM4v5lnigbinv = value->rValue; + mod->BSIM4v5lnigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_LNIGBACC : + mod->BSIM4v5lnigbacc = value->rValue; + mod->BSIM4v5lnigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_LNTOX : + mod->BSIM4v5lntox = value->rValue; + mod->BSIM4v5lntoxGiven = TRUE; + break; + case BSIM4v5_MOD_LEIGBINV : + mod->BSIM4v5leigbinv = value->rValue; + mod->BSIM4v5leigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_LPIGCD : + mod->BSIM4v5lpigcd = value->rValue; + mod->BSIM4v5lpigcdGiven = TRUE; + break; + case BSIM4v5_MOD_LPOXEDGE : + mod->BSIM4v5lpoxedge = value->rValue; + mod->BSIM4v5lpoxedgeGiven = TRUE; + break; + case BSIM4v5_MOD_LXRCRG1 : + mod->BSIM4v5lxrcrg1 = value->rValue; + mod->BSIM4v5lxrcrg1Given = TRUE; + break; + case BSIM4v5_MOD_LXRCRG2 : + mod->BSIM4v5lxrcrg2 = value->rValue; + mod->BSIM4v5lxrcrg2Given = TRUE; + break; + case BSIM4v5_MOD_LLAMBDA : + mod->BSIM4v5llambda = value->rValue; + mod->BSIM4v5llambdaGiven = TRUE; + break; + case BSIM4v5_MOD_LVTL : + mod->BSIM4v5lvtl = value->rValue; + mod->BSIM4v5lvtlGiven = TRUE; + break; + case BSIM4v5_MOD_LXN: + mod->BSIM4v5lxn = value->rValue; + mod->BSIM4v5lxnGiven = TRUE; + break; + case BSIM4v5_MOD_LVFBSDOFF: + mod->BSIM4v5lvfbsdoff = value->rValue; + mod->BSIM4v5lvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_LTVFBSDOFF: + mod->BSIM4v5ltvfbsdoff = value->rValue; + mod->BSIM4v5ltvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_LEU : + mod->BSIM4v5leu = value->rValue; + mod->BSIM4v5leuGiven = TRUE; + break; + case BSIM4v5_MOD_LVFB : + mod->BSIM4v5lvfb = value->rValue; + mod->BSIM4v5lvfbGiven = TRUE; + break; + case BSIM4v5_MOD_LCGSL : + mod->BSIM4v5lcgsl = value->rValue; + mod->BSIM4v5lcgslGiven = TRUE; + break; + case BSIM4v5_MOD_LCGDL : + mod->BSIM4v5lcgdl = value->rValue; + mod->BSIM4v5lcgdlGiven = TRUE; + break; + case BSIM4v5_MOD_LCKAPPAS : + mod->BSIM4v5lckappas = value->rValue; + mod->BSIM4v5lckappasGiven = TRUE; + break; + case BSIM4v5_MOD_LCKAPPAD : + mod->BSIM4v5lckappad = value->rValue; + mod->BSIM4v5lckappadGiven = TRUE; + break; + case BSIM4v5_MOD_LCF : + mod->BSIM4v5lcf = value->rValue; + mod->BSIM4v5lcfGiven = TRUE; + break; + case BSIM4v5_MOD_LCLC : + mod->BSIM4v5lclc = value->rValue; + mod->BSIM4v5lclcGiven = TRUE; + break; + case BSIM4v5_MOD_LCLE : + mod->BSIM4v5lcle = value->rValue; + mod->BSIM4v5lcleGiven = TRUE; + break; + case BSIM4v5_MOD_LVFBCV : + mod->BSIM4v5lvfbcv = value->rValue; + mod->BSIM4v5lvfbcvGiven = TRUE; + break; + case BSIM4v5_MOD_LACDE : + mod->BSIM4v5lacde = value->rValue; + mod->BSIM4v5lacdeGiven = TRUE; + break; + case BSIM4v5_MOD_LMOIN : + mod->BSIM4v5lmoin = value->rValue; + mod->BSIM4v5lmoinGiven = TRUE; + break; + case BSIM4v5_MOD_LNOFF : + mod->BSIM4v5lnoff = value->rValue; + mod->BSIM4v5lnoffGiven = TRUE; + break; + case BSIM4v5_MOD_LVOFFCV : + mod->BSIM4v5lvoffcv = value->rValue; + mod->BSIM4v5lvoffcvGiven = TRUE; + break; + + /* Width dependence */ + case BSIM4v5_MOD_WCDSC : + mod->BSIM4v5wcdsc = value->rValue; + mod->BSIM4v5wcdscGiven = TRUE; + break; + + + case BSIM4v5_MOD_WCDSCB : + mod->BSIM4v5wcdscb = value->rValue; + mod->BSIM4v5wcdscbGiven = TRUE; + break; + case BSIM4v5_MOD_WCDSCD : + mod->BSIM4v5wcdscd = value->rValue; + mod->BSIM4v5wcdscdGiven = TRUE; + break; + case BSIM4v5_MOD_WCIT : + mod->BSIM4v5wcit = value->rValue; + mod->BSIM4v5wcitGiven = TRUE; + break; + case BSIM4v5_MOD_WNFACTOR : + mod->BSIM4v5wnfactor = value->rValue; + mod->BSIM4v5wnfactorGiven = TRUE; + break; + case BSIM4v5_MOD_WXJ: + mod->BSIM4v5wxj = value->rValue; + mod->BSIM4v5wxjGiven = TRUE; + break; + case BSIM4v5_MOD_WVSAT: + mod->BSIM4v5wvsat = value->rValue; + mod->BSIM4v5wvsatGiven = TRUE; + break; + + + case BSIM4v5_MOD_WA0: + mod->BSIM4v5wa0 = value->rValue; + mod->BSIM4v5wa0Given = TRUE; + break; + case BSIM4v5_MOD_WAGS: + mod->BSIM4v5wags = value->rValue; + mod->BSIM4v5wagsGiven = TRUE; + break; + case BSIM4v5_MOD_WA1: + mod->BSIM4v5wa1 = value->rValue; + mod->BSIM4v5wa1Given = TRUE; + break; + case BSIM4v5_MOD_WA2: + mod->BSIM4v5wa2 = value->rValue; + mod->BSIM4v5wa2Given = TRUE; + break; + case BSIM4v5_MOD_WAT: + mod->BSIM4v5wat = value->rValue; + mod->BSIM4v5watGiven = TRUE; + break; + case BSIM4v5_MOD_WKETA: + mod->BSIM4v5wketa = value->rValue; + mod->BSIM4v5wketaGiven = TRUE; + break; + case BSIM4v5_MOD_WNSUB: + mod->BSIM4v5wnsub = value->rValue; + mod->BSIM4v5wnsubGiven = TRUE; + break; + case BSIM4v5_MOD_WNDEP: + mod->BSIM4v5wndep = value->rValue; + mod->BSIM4v5wndepGiven = TRUE; + if (mod->BSIM4v5wndep > 1.0e20) + mod->BSIM4v5wndep *= 1.0e-6; + break; + case BSIM4v5_MOD_WNSD: + mod->BSIM4v5wnsd = value->rValue; + mod->BSIM4v5wnsdGiven = TRUE; + if (mod->BSIM4v5wnsd > 1.0e23) + mod->BSIM4v5wnsd *= 1.0e-6; + break; + case BSIM4v5_MOD_WNGATE: + mod->BSIM4v5wngate = value->rValue; + mod->BSIM4v5wngateGiven = TRUE; + if (mod->BSIM4v5wngate > 1.0e23) + mod->BSIM4v5wngate *= 1.0e-6; + break; + case BSIM4v5_MOD_WGAMMA1: + mod->BSIM4v5wgamma1 = value->rValue; + mod->BSIM4v5wgamma1Given = TRUE; + break; + case BSIM4v5_MOD_WGAMMA2: + mod->BSIM4v5wgamma2 = value->rValue; + mod->BSIM4v5wgamma2Given = TRUE; + break; + case BSIM4v5_MOD_WVBX: + mod->BSIM4v5wvbx = value->rValue; + mod->BSIM4v5wvbxGiven = TRUE; + break; + case BSIM4v5_MOD_WVBM: + mod->BSIM4v5wvbm = value->rValue; + mod->BSIM4v5wvbmGiven = TRUE; + break; + case BSIM4v5_MOD_WXT: + mod->BSIM4v5wxt = value->rValue; + mod->BSIM4v5wxtGiven = TRUE; + break; + case BSIM4v5_MOD_WK1: + mod->BSIM4v5wk1 = value->rValue; + mod->BSIM4v5wk1Given = TRUE; + break; + case BSIM4v5_MOD_WKT1: + mod->BSIM4v5wkt1 = value->rValue; + mod->BSIM4v5wkt1Given = TRUE; + break; + case BSIM4v5_MOD_WKT1L: + mod->BSIM4v5wkt1l = value->rValue; + mod->BSIM4v5wkt1lGiven = TRUE; + break; + case BSIM4v5_MOD_WKT2: + mod->BSIM4v5wkt2 = value->rValue; + mod->BSIM4v5wkt2Given = TRUE; + break; + case BSIM4v5_MOD_WK2: + mod->BSIM4v5wk2 = value->rValue; + mod->BSIM4v5wk2Given = TRUE; + break; + case BSIM4v5_MOD_WK3: + mod->BSIM4v5wk3 = value->rValue; + mod->BSIM4v5wk3Given = TRUE; + break; + case BSIM4v5_MOD_WK3B: + mod->BSIM4v5wk3b = value->rValue; + mod->BSIM4v5wk3bGiven = TRUE; + break; + case BSIM4v5_MOD_WLPE0: + mod->BSIM4v5wlpe0 = value->rValue; + mod->BSIM4v5wlpe0Given = TRUE; + break; + case BSIM4v5_MOD_WLPEB: + mod->BSIM4v5wlpeb = value->rValue; + mod->BSIM4v5wlpebGiven = TRUE; + break; + case BSIM4v5_MOD_WDVTP0: + mod->BSIM4v5wdvtp0 = value->rValue; + mod->BSIM4v5wdvtp0Given = TRUE; + break; + case BSIM4v5_MOD_WDVTP1: + mod->BSIM4v5wdvtp1 = value->rValue; + mod->BSIM4v5wdvtp1Given = TRUE; + break; + case BSIM4v5_MOD_WW0: + mod->BSIM4v5ww0 = value->rValue; + mod->BSIM4v5ww0Given = TRUE; + break; + case BSIM4v5_MOD_WDVT0: + mod->BSIM4v5wdvt0 = value->rValue; + mod->BSIM4v5wdvt0Given = TRUE; + break; + case BSIM4v5_MOD_WDVT1: + mod->BSIM4v5wdvt1 = value->rValue; + mod->BSIM4v5wdvt1Given = TRUE; + break; + case BSIM4v5_MOD_WDVT2: + mod->BSIM4v5wdvt2 = value->rValue; + mod->BSIM4v5wdvt2Given = TRUE; + break; + case BSIM4v5_MOD_WDVT0W: + mod->BSIM4v5wdvt0w = value->rValue; + mod->BSIM4v5wdvt0wGiven = TRUE; + break; + case BSIM4v5_MOD_WDVT1W: + mod->BSIM4v5wdvt1w = value->rValue; + mod->BSIM4v5wdvt1wGiven = TRUE; + break; + case BSIM4v5_MOD_WDVT2W: + mod->BSIM4v5wdvt2w = value->rValue; + mod->BSIM4v5wdvt2wGiven = TRUE; + break; + case BSIM4v5_MOD_WDROUT: + mod->BSIM4v5wdrout = value->rValue; + mod->BSIM4v5wdroutGiven = TRUE; + break; + case BSIM4v5_MOD_WDSUB: + mod->BSIM4v5wdsub = value->rValue; + mod->BSIM4v5wdsubGiven = TRUE; + break; + case BSIM4v5_MOD_WVTH0: + mod->BSIM4v5wvth0 = value->rValue; + mod->BSIM4v5wvth0Given = TRUE; + break; + case BSIM4v5_MOD_WUA: + mod->BSIM4v5wua = value->rValue; + mod->BSIM4v5wuaGiven = TRUE; + break; + case BSIM4v5_MOD_WUA1: + mod->BSIM4v5wua1 = value->rValue; + mod->BSIM4v5wua1Given = TRUE; + break; + case BSIM4v5_MOD_WUB: + mod->BSIM4v5wub = value->rValue; + mod->BSIM4v5wubGiven = TRUE; + break; + case BSIM4v5_MOD_WUB1: + mod->BSIM4v5wub1 = value->rValue; + mod->BSIM4v5wub1Given = TRUE; + break; + case BSIM4v5_MOD_WUC: + mod->BSIM4v5wuc = value->rValue; + mod->BSIM4v5wucGiven = TRUE; + break; + case BSIM4v5_MOD_WUC1: + mod->BSIM4v5wuc1 = value->rValue; + mod->BSIM4v5wuc1Given = TRUE; + break; + case BSIM4v5_MOD_WU0 : + mod->BSIM4v5wu0 = value->rValue; + mod->BSIM4v5wu0Given = TRUE; + break; + case BSIM4v5_MOD_WUTE : + mod->BSIM4v5wute = value->rValue; + mod->BSIM4v5wuteGiven = TRUE; + break; + case BSIM4v5_MOD_WVOFF: + mod->BSIM4v5wvoff = value->rValue; + mod->BSIM4v5wvoffGiven = TRUE; + break; + case BSIM4v5_MOD_WTVOFF: + mod->BSIM4v5wtvoff = value->rValue; + mod->BSIM4v5wtvoffGiven = TRUE; + break; + case BSIM4v5_MOD_WMINV: + mod->BSIM4v5wminv = value->rValue; + mod->BSIM4v5wminvGiven = TRUE; + break; + case BSIM4v5_MOD_WFPROUT: + mod->BSIM4v5wfprout = value->rValue; + mod->BSIM4v5wfproutGiven = TRUE; + break; + case BSIM4v5_MOD_WPDITS: + mod->BSIM4v5wpdits = value->rValue; + mod->BSIM4v5wpditsGiven = TRUE; + break; + case BSIM4v5_MOD_WPDITSD: + mod->BSIM4v5wpditsd = value->rValue; + mod->BSIM4v5wpditsdGiven = TRUE; + break; + case BSIM4v5_MOD_WDELTA : + mod->BSIM4v5wdelta = value->rValue; + mod->BSIM4v5wdeltaGiven = TRUE; + break; + case BSIM4v5_MOD_WRDSW: + mod->BSIM4v5wrdsw = value->rValue; + mod->BSIM4v5wrdswGiven = TRUE; + break; + case BSIM4v5_MOD_WRDW: + mod->BSIM4v5wrdw = value->rValue; + mod->BSIM4v5wrdwGiven = TRUE; + break; + case BSIM4v5_MOD_WRSW: + mod->BSIM4v5wrsw = value->rValue; + mod->BSIM4v5wrswGiven = TRUE; + break; + case BSIM4v5_MOD_WPRWB: + mod->BSIM4v5wprwb = value->rValue; + mod->BSIM4v5wprwbGiven = TRUE; + break; + case BSIM4v5_MOD_WPRWG: + mod->BSIM4v5wprwg = value->rValue; + mod->BSIM4v5wprwgGiven = TRUE; + break; + case BSIM4v5_MOD_WPRT: + mod->BSIM4v5wprt = value->rValue; + mod->BSIM4v5wprtGiven = TRUE; + break; + case BSIM4v5_MOD_WETA0: + mod->BSIM4v5weta0 = value->rValue; + mod->BSIM4v5weta0Given = TRUE; + break; + case BSIM4v5_MOD_WETAB: + mod->BSIM4v5wetab = value->rValue; + mod->BSIM4v5wetabGiven = TRUE; + break; + case BSIM4v5_MOD_WPCLM: + mod->BSIM4v5wpclm = value->rValue; + mod->BSIM4v5wpclmGiven = TRUE; + break; + case BSIM4v5_MOD_WPDIBL1: + mod->BSIM4v5wpdibl1 = value->rValue; + mod->BSIM4v5wpdibl1Given = TRUE; + break; + case BSIM4v5_MOD_WPDIBL2: + mod->BSIM4v5wpdibl2 = value->rValue; + mod->BSIM4v5wpdibl2Given = TRUE; + break; + case BSIM4v5_MOD_WPDIBLB: + mod->BSIM4v5wpdiblb = value->rValue; + mod->BSIM4v5wpdiblbGiven = TRUE; + break; + case BSIM4v5_MOD_WPSCBE1: + mod->BSIM4v5wpscbe1 = value->rValue; + mod->BSIM4v5wpscbe1Given = TRUE; + break; + case BSIM4v5_MOD_WPSCBE2: + mod->BSIM4v5wpscbe2 = value->rValue; + mod->BSIM4v5wpscbe2Given = TRUE; + break; + case BSIM4v5_MOD_WPVAG: + mod->BSIM4v5wpvag = value->rValue; + mod->BSIM4v5wpvagGiven = TRUE; + break; + case BSIM4v5_MOD_WWR : + mod->BSIM4v5wwr = value->rValue; + mod->BSIM4v5wwrGiven = TRUE; + break; + case BSIM4v5_MOD_WDWG : + mod->BSIM4v5wdwg = value->rValue; + mod->BSIM4v5wdwgGiven = TRUE; + break; + case BSIM4v5_MOD_WDWB : + mod->BSIM4v5wdwb = value->rValue; + mod->BSIM4v5wdwbGiven = TRUE; + break; + case BSIM4v5_MOD_WB0 : + mod->BSIM4v5wb0 = value->rValue; + mod->BSIM4v5wb0Given = TRUE; + break; + case BSIM4v5_MOD_WB1 : + mod->BSIM4v5wb1 = value->rValue; + mod->BSIM4v5wb1Given = TRUE; + break; + case BSIM4v5_MOD_WALPHA0 : + mod->BSIM4v5walpha0 = value->rValue; + mod->BSIM4v5walpha0Given = TRUE; + break; + case BSIM4v5_MOD_WALPHA1 : + mod->BSIM4v5walpha1 = value->rValue; + mod->BSIM4v5walpha1Given = TRUE; + break; + case BSIM4v5_MOD_WBETA0 : + mod->BSIM4v5wbeta0 = value->rValue; + mod->BSIM4v5wbeta0Given = TRUE; + break; + case BSIM4v5_MOD_WAGIDL : + mod->BSIM4v5wagidl = value->rValue; + mod->BSIM4v5wagidlGiven = TRUE; + break; + case BSIM4v5_MOD_WBGIDL : + mod->BSIM4v5wbgidl = value->rValue; + mod->BSIM4v5wbgidlGiven = TRUE; + break; + case BSIM4v5_MOD_WCGIDL : + mod->BSIM4v5wcgidl = value->rValue; + mod->BSIM4v5wcgidlGiven = TRUE; + break; + case BSIM4v5_MOD_WPHIN : + mod->BSIM4v5wphin = value->rValue; + mod->BSIM4v5wphinGiven = TRUE; + break; + case BSIM4v5_MOD_WEGIDL : + mod->BSIM4v5wegidl = value->rValue; + mod->BSIM4v5wegidlGiven = TRUE; + break; + case BSIM4v5_MOD_WAIGC : + mod->BSIM4v5waigc = value->rValue; + mod->BSIM4v5waigcGiven = TRUE; + break; + case BSIM4v5_MOD_WBIGC : + mod->BSIM4v5wbigc = value->rValue; + mod->BSIM4v5wbigcGiven = TRUE; + break; + case BSIM4v5_MOD_WCIGC : + mod->BSIM4v5wcigc = value->rValue; + mod->BSIM4v5wcigcGiven = TRUE; + break; + case BSIM4v5_MOD_WAIGSD : + mod->BSIM4v5waigsd = value->rValue; + mod->BSIM4v5waigsdGiven = TRUE; + break; + case BSIM4v5_MOD_WBIGSD : + mod->BSIM4v5wbigsd = value->rValue; + mod->BSIM4v5wbigsdGiven = TRUE; + break; + case BSIM4v5_MOD_WCIGSD : + mod->BSIM4v5wcigsd = value->rValue; + mod->BSIM4v5wcigsdGiven = TRUE; + break; + case BSIM4v5_MOD_WAIGBACC : + mod->BSIM4v5waigbacc = value->rValue; + mod->BSIM4v5waigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_WBIGBACC : + mod->BSIM4v5wbigbacc = value->rValue; + mod->BSIM4v5wbigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_WCIGBACC : + mod->BSIM4v5wcigbacc = value->rValue; + mod->BSIM4v5wcigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_WAIGBINV : + mod->BSIM4v5waigbinv = value->rValue; + mod->BSIM4v5waigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_WBIGBINV : + mod->BSIM4v5wbigbinv = value->rValue; + mod->BSIM4v5wbigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_WCIGBINV : + mod->BSIM4v5wcigbinv = value->rValue; + mod->BSIM4v5wcigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_WNIGC : + mod->BSIM4v5wnigc = value->rValue; + mod->BSIM4v5wnigcGiven = TRUE; + break; + case BSIM4v5_MOD_WNIGBINV : + mod->BSIM4v5wnigbinv = value->rValue; + mod->BSIM4v5wnigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_WNIGBACC : + mod->BSIM4v5wnigbacc = value->rValue; + mod->BSIM4v5wnigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_WNTOX : + mod->BSIM4v5wntox = value->rValue; + mod->BSIM4v5wntoxGiven = TRUE; + break; + case BSIM4v5_MOD_WEIGBINV : + mod->BSIM4v5weigbinv = value->rValue; + mod->BSIM4v5weigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_WPIGCD : + mod->BSIM4v5wpigcd = value->rValue; + mod->BSIM4v5wpigcdGiven = TRUE; + break; + case BSIM4v5_MOD_WPOXEDGE : + mod->BSIM4v5wpoxedge = value->rValue; + mod->BSIM4v5wpoxedgeGiven = TRUE; + break; + case BSIM4v5_MOD_WXRCRG1 : + mod->BSIM4v5wxrcrg1 = value->rValue; + mod->BSIM4v5wxrcrg1Given = TRUE; + break; + case BSIM4v5_MOD_WXRCRG2 : + mod->BSIM4v5wxrcrg2 = value->rValue; + mod->BSIM4v5wxrcrg2Given = TRUE; + break; + case BSIM4v5_MOD_WLAMBDA : + mod->BSIM4v5wlambda = value->rValue; + mod->BSIM4v5wlambdaGiven = TRUE; + break; + case BSIM4v5_MOD_WVTL : + mod->BSIM4v5wvtl = value->rValue; + mod->BSIM4v5wvtlGiven = TRUE; + break; + case BSIM4v5_MOD_WXN: + mod->BSIM4v5wxn = value->rValue; + mod->BSIM4v5wxnGiven = TRUE; + break; + case BSIM4v5_MOD_WVFBSDOFF: + mod->BSIM4v5wvfbsdoff = value->rValue; + mod->BSIM4v5wvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_WTVFBSDOFF: + mod->BSIM4v5wtvfbsdoff = value->rValue; + mod->BSIM4v5wtvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_WEU : + mod->BSIM4v5weu = value->rValue; + mod->BSIM4v5weuGiven = TRUE; + break; + case BSIM4v5_MOD_WVFB : + mod->BSIM4v5wvfb = value->rValue; + mod->BSIM4v5wvfbGiven = TRUE; + break; + case BSIM4v5_MOD_WCGSL : + mod->BSIM4v5wcgsl = value->rValue; + mod->BSIM4v5wcgslGiven = TRUE; + break; + case BSIM4v5_MOD_WCGDL : + mod->BSIM4v5wcgdl = value->rValue; + mod->BSIM4v5wcgdlGiven = TRUE; + break; + case BSIM4v5_MOD_WCKAPPAS : + mod->BSIM4v5wckappas = value->rValue; + mod->BSIM4v5wckappasGiven = TRUE; + break; + case BSIM4v5_MOD_WCKAPPAD : + mod->BSIM4v5wckappad = value->rValue; + mod->BSIM4v5wckappadGiven = TRUE; + break; + case BSIM4v5_MOD_WCF : + mod->BSIM4v5wcf = value->rValue; + mod->BSIM4v5wcfGiven = TRUE; + break; + case BSIM4v5_MOD_WCLC : + mod->BSIM4v5wclc = value->rValue; + mod->BSIM4v5wclcGiven = TRUE; + break; + case BSIM4v5_MOD_WCLE : + mod->BSIM4v5wcle = value->rValue; + mod->BSIM4v5wcleGiven = TRUE; + break; + case BSIM4v5_MOD_WVFBCV : + mod->BSIM4v5wvfbcv = value->rValue; + mod->BSIM4v5wvfbcvGiven = TRUE; + break; + case BSIM4v5_MOD_WACDE : + mod->BSIM4v5wacde = value->rValue; + mod->BSIM4v5wacdeGiven = TRUE; + break; + case BSIM4v5_MOD_WMOIN : + mod->BSIM4v5wmoin = value->rValue; + mod->BSIM4v5wmoinGiven = TRUE; + break; + case BSIM4v5_MOD_WNOFF : + mod->BSIM4v5wnoff = value->rValue; + mod->BSIM4v5wnoffGiven = TRUE; + break; + case BSIM4v5_MOD_WVOFFCV : + mod->BSIM4v5wvoffcv = value->rValue; + mod->BSIM4v5wvoffcvGiven = TRUE; + break; + + /* Cross-term dependence */ + case BSIM4v5_MOD_PCDSC : + mod->BSIM4v5pcdsc = value->rValue; + mod->BSIM4v5pcdscGiven = TRUE; + break; + + + case BSIM4v5_MOD_PCDSCB : + mod->BSIM4v5pcdscb = value->rValue; + mod->BSIM4v5pcdscbGiven = TRUE; + break; + case BSIM4v5_MOD_PCDSCD : + mod->BSIM4v5pcdscd = value->rValue; + mod->BSIM4v5pcdscdGiven = TRUE; + break; + case BSIM4v5_MOD_PCIT : + mod->BSIM4v5pcit = value->rValue; + mod->BSIM4v5pcitGiven = TRUE; + break; + case BSIM4v5_MOD_PNFACTOR : + mod->BSIM4v5pnfactor = value->rValue; + mod->BSIM4v5pnfactorGiven = TRUE; + break; + case BSIM4v5_MOD_PXJ: + mod->BSIM4v5pxj = value->rValue; + mod->BSIM4v5pxjGiven = TRUE; + break; + case BSIM4v5_MOD_PVSAT: + mod->BSIM4v5pvsat = value->rValue; + mod->BSIM4v5pvsatGiven = TRUE; + break; + + + case BSIM4v5_MOD_PA0: + mod->BSIM4v5pa0 = value->rValue; + mod->BSIM4v5pa0Given = TRUE; + break; + case BSIM4v5_MOD_PAGS: + mod->BSIM4v5pags = value->rValue; + mod->BSIM4v5pagsGiven = TRUE; + break; + case BSIM4v5_MOD_PA1: + mod->BSIM4v5pa1 = value->rValue; + mod->BSIM4v5pa1Given = TRUE; + break; + case BSIM4v5_MOD_PA2: + mod->BSIM4v5pa2 = value->rValue; + mod->BSIM4v5pa2Given = TRUE; + break; + case BSIM4v5_MOD_PAT: + mod->BSIM4v5pat = value->rValue; + mod->BSIM4v5patGiven = TRUE; + break; + case BSIM4v5_MOD_PKETA: + mod->BSIM4v5pketa = value->rValue; + mod->BSIM4v5pketaGiven = TRUE; + break; + case BSIM4v5_MOD_PNSUB: + mod->BSIM4v5pnsub = value->rValue; + mod->BSIM4v5pnsubGiven = TRUE; + break; + case BSIM4v5_MOD_PNDEP: + mod->BSIM4v5pndep = value->rValue; + mod->BSIM4v5pndepGiven = TRUE; + if (mod->BSIM4v5pndep > 1.0e20) + mod->BSIM4v5pndep *= 1.0e-6; + break; + case BSIM4v5_MOD_PNSD: + mod->BSIM4v5pnsd = value->rValue; + mod->BSIM4v5pnsdGiven = TRUE; + if (mod->BSIM4v5pnsd > 1.0e23) + mod->BSIM4v5pnsd *= 1.0e-6; + break; + case BSIM4v5_MOD_PNGATE: + mod->BSIM4v5pngate = value->rValue; + mod->BSIM4v5pngateGiven = TRUE; + if (mod->BSIM4v5pngate > 1.0e23) + mod->BSIM4v5pngate *= 1.0e-6; + break; + case BSIM4v5_MOD_PGAMMA1: + mod->BSIM4v5pgamma1 = value->rValue; + mod->BSIM4v5pgamma1Given = TRUE; + break; + case BSIM4v5_MOD_PGAMMA2: + mod->BSIM4v5pgamma2 = value->rValue; + mod->BSIM4v5pgamma2Given = TRUE; + break; + case BSIM4v5_MOD_PVBX: + mod->BSIM4v5pvbx = value->rValue; + mod->BSIM4v5pvbxGiven = TRUE; + break; + case BSIM4v5_MOD_PVBM: + mod->BSIM4v5pvbm = value->rValue; + mod->BSIM4v5pvbmGiven = TRUE; + break; + case BSIM4v5_MOD_PXT: + mod->BSIM4v5pxt = value->rValue; + mod->BSIM4v5pxtGiven = TRUE; + break; + case BSIM4v5_MOD_PK1: + mod->BSIM4v5pk1 = value->rValue; + mod->BSIM4v5pk1Given = TRUE; + break; + case BSIM4v5_MOD_PKT1: + mod->BSIM4v5pkt1 = value->rValue; + mod->BSIM4v5pkt1Given = TRUE; + break; + case BSIM4v5_MOD_PKT1L: + mod->BSIM4v5pkt1l = value->rValue; + mod->BSIM4v5pkt1lGiven = TRUE; + break; + case BSIM4v5_MOD_PKT2: + mod->BSIM4v5pkt2 = value->rValue; + mod->BSIM4v5pkt2Given = TRUE; + break; + case BSIM4v5_MOD_PK2: + mod->BSIM4v5pk2 = value->rValue; + mod->BSIM4v5pk2Given = TRUE; + break; + case BSIM4v5_MOD_PK3: + mod->BSIM4v5pk3 = value->rValue; + mod->BSIM4v5pk3Given = TRUE; + break; + case BSIM4v5_MOD_PK3B: + mod->BSIM4v5pk3b = value->rValue; + mod->BSIM4v5pk3bGiven = TRUE; + break; + case BSIM4v5_MOD_PLPE0: + mod->BSIM4v5plpe0 = value->rValue; + mod->BSIM4v5plpe0Given = TRUE; + break; + case BSIM4v5_MOD_PLPEB: + mod->BSIM4v5plpeb = value->rValue; + mod->BSIM4v5plpebGiven = TRUE; + break; + case BSIM4v5_MOD_PDVTP0: + mod->BSIM4v5pdvtp0 = value->rValue; + mod->BSIM4v5pdvtp0Given = TRUE; + break; + case BSIM4v5_MOD_PDVTP1: + mod->BSIM4v5pdvtp1 = value->rValue; + mod->BSIM4v5pdvtp1Given = TRUE; + break; + case BSIM4v5_MOD_PW0: + mod->BSIM4v5pw0 = value->rValue; + mod->BSIM4v5pw0Given = TRUE; + break; + case BSIM4v5_MOD_PDVT0: + mod->BSIM4v5pdvt0 = value->rValue; + mod->BSIM4v5pdvt0Given = TRUE; + break; + case BSIM4v5_MOD_PDVT1: + mod->BSIM4v5pdvt1 = value->rValue; + mod->BSIM4v5pdvt1Given = TRUE; + break; + case BSIM4v5_MOD_PDVT2: + mod->BSIM4v5pdvt2 = value->rValue; + mod->BSIM4v5pdvt2Given = TRUE; + break; + case BSIM4v5_MOD_PDVT0W: + mod->BSIM4v5pdvt0w = value->rValue; + mod->BSIM4v5pdvt0wGiven = TRUE; + break; + case BSIM4v5_MOD_PDVT1W: + mod->BSIM4v5pdvt1w = value->rValue; + mod->BSIM4v5pdvt1wGiven = TRUE; + break; + case BSIM4v5_MOD_PDVT2W: + mod->BSIM4v5pdvt2w = value->rValue; + mod->BSIM4v5pdvt2wGiven = TRUE; + break; + case BSIM4v5_MOD_PDROUT: + mod->BSIM4v5pdrout = value->rValue; + mod->BSIM4v5pdroutGiven = TRUE; + break; + case BSIM4v5_MOD_PDSUB: + mod->BSIM4v5pdsub = value->rValue; + mod->BSIM4v5pdsubGiven = TRUE; + break; + case BSIM4v5_MOD_PVTH0: + mod->BSIM4v5pvth0 = value->rValue; + mod->BSIM4v5pvth0Given = TRUE; + break; + case BSIM4v5_MOD_PUA: + mod->BSIM4v5pua = value->rValue; + mod->BSIM4v5puaGiven = TRUE; + break; + case BSIM4v5_MOD_PUA1: + mod->BSIM4v5pua1 = value->rValue; + mod->BSIM4v5pua1Given = TRUE; + break; + case BSIM4v5_MOD_PUB: + mod->BSIM4v5pub = value->rValue; + mod->BSIM4v5pubGiven = TRUE; + break; + case BSIM4v5_MOD_PUB1: + mod->BSIM4v5pub1 = value->rValue; + mod->BSIM4v5pub1Given = TRUE; + break; + case BSIM4v5_MOD_PUC: + mod->BSIM4v5puc = value->rValue; + mod->BSIM4v5pucGiven = TRUE; + break; + case BSIM4v5_MOD_PUC1: + mod->BSIM4v5puc1 = value->rValue; + mod->BSIM4v5puc1Given = TRUE; + break; + case BSIM4v5_MOD_PU0 : + mod->BSIM4v5pu0 = value->rValue; + mod->BSIM4v5pu0Given = TRUE; + break; + case BSIM4v5_MOD_PUTE : + mod->BSIM4v5pute = value->rValue; + mod->BSIM4v5puteGiven = TRUE; + break; + case BSIM4v5_MOD_PVOFF: + mod->BSIM4v5pvoff = value->rValue; + mod->BSIM4v5pvoffGiven = TRUE; + break; + case BSIM4v5_MOD_PTVOFF: + mod->BSIM4v5ptvoff = value->rValue; + mod->BSIM4v5ptvoffGiven = TRUE; + break; + case BSIM4v5_MOD_PMINV: + mod->BSIM4v5pminv = value->rValue; + mod->BSIM4v5pminvGiven = TRUE; + break; + case BSIM4v5_MOD_PFPROUT: + mod->BSIM4v5pfprout = value->rValue; + mod->BSIM4v5pfproutGiven = TRUE; + break; + case BSIM4v5_MOD_PPDITS: + mod->BSIM4v5ppdits = value->rValue; + mod->BSIM4v5ppditsGiven = TRUE; + break; + case BSIM4v5_MOD_PPDITSD: + mod->BSIM4v5ppditsd = value->rValue; + mod->BSIM4v5ppditsdGiven = TRUE; + break; + case BSIM4v5_MOD_PDELTA : + mod->BSIM4v5pdelta = value->rValue; + mod->BSIM4v5pdeltaGiven = TRUE; + break; + case BSIM4v5_MOD_PRDSW: + mod->BSIM4v5prdsw = value->rValue; + mod->BSIM4v5prdswGiven = TRUE; + break; + case BSIM4v5_MOD_PRDW: + mod->BSIM4v5prdw = value->rValue; + mod->BSIM4v5prdwGiven = TRUE; + break; + case BSIM4v5_MOD_PRSW: + mod->BSIM4v5prsw = value->rValue; + mod->BSIM4v5prswGiven = TRUE; + break; + case BSIM4v5_MOD_PPRWB: + mod->BSIM4v5pprwb = value->rValue; + mod->BSIM4v5pprwbGiven = TRUE; + break; + case BSIM4v5_MOD_PPRWG: + mod->BSIM4v5pprwg = value->rValue; + mod->BSIM4v5pprwgGiven = TRUE; + break; + case BSIM4v5_MOD_PPRT: + mod->BSIM4v5pprt = value->rValue; + mod->BSIM4v5pprtGiven = TRUE; + break; + case BSIM4v5_MOD_PETA0: + mod->BSIM4v5peta0 = value->rValue; + mod->BSIM4v5peta0Given = TRUE; + break; + case BSIM4v5_MOD_PETAB: + mod->BSIM4v5petab = value->rValue; + mod->BSIM4v5petabGiven = TRUE; + break; + case BSIM4v5_MOD_PPCLM: + mod->BSIM4v5ppclm = value->rValue; + mod->BSIM4v5ppclmGiven = TRUE; + break; + case BSIM4v5_MOD_PPDIBL1: + mod->BSIM4v5ppdibl1 = value->rValue; + mod->BSIM4v5ppdibl1Given = TRUE; + break; + case BSIM4v5_MOD_PPDIBL2: + mod->BSIM4v5ppdibl2 = value->rValue; + mod->BSIM4v5ppdibl2Given = TRUE; + break; + case BSIM4v5_MOD_PPDIBLB: + mod->BSIM4v5ppdiblb = value->rValue; + mod->BSIM4v5ppdiblbGiven = TRUE; + break; + case BSIM4v5_MOD_PPSCBE1: + mod->BSIM4v5ppscbe1 = value->rValue; + mod->BSIM4v5ppscbe1Given = TRUE; + break; + case BSIM4v5_MOD_PPSCBE2: + mod->BSIM4v5ppscbe2 = value->rValue; + mod->BSIM4v5ppscbe2Given = TRUE; + break; + case BSIM4v5_MOD_PPVAG: + mod->BSIM4v5ppvag = value->rValue; + mod->BSIM4v5ppvagGiven = TRUE; + break; + case BSIM4v5_MOD_PWR : + mod->BSIM4v5pwr = value->rValue; + mod->BSIM4v5pwrGiven = TRUE; + break; + case BSIM4v5_MOD_PDWG : + mod->BSIM4v5pdwg = value->rValue; + mod->BSIM4v5pdwgGiven = TRUE; + break; + case BSIM4v5_MOD_PDWB : + mod->BSIM4v5pdwb = value->rValue; + mod->BSIM4v5pdwbGiven = TRUE; + break; + case BSIM4v5_MOD_PB0 : + mod->BSIM4v5pb0 = value->rValue; + mod->BSIM4v5pb0Given = TRUE; + break; + case BSIM4v5_MOD_PB1 : + mod->BSIM4v5pb1 = value->rValue; + mod->BSIM4v5pb1Given = TRUE; + break; + case BSIM4v5_MOD_PALPHA0 : + mod->BSIM4v5palpha0 = value->rValue; + mod->BSIM4v5palpha0Given = TRUE; + break; + case BSIM4v5_MOD_PALPHA1 : + mod->BSIM4v5palpha1 = value->rValue; + mod->BSIM4v5palpha1Given = TRUE; + break; + case BSIM4v5_MOD_PBETA0 : + mod->BSIM4v5pbeta0 = value->rValue; + mod->BSIM4v5pbeta0Given = TRUE; + break; + case BSIM4v5_MOD_PAGIDL : + mod->BSIM4v5pagidl = value->rValue; + mod->BSIM4v5pagidlGiven = TRUE; + break; + case BSIM4v5_MOD_PBGIDL : + mod->BSIM4v5pbgidl = value->rValue; + mod->BSIM4v5pbgidlGiven = TRUE; + break; + case BSIM4v5_MOD_PCGIDL : + mod->BSIM4v5pcgidl = value->rValue; + mod->BSIM4v5pcgidlGiven = TRUE; + break; + case BSIM4v5_MOD_PPHIN : + mod->BSIM4v5pphin = value->rValue; + mod->BSIM4v5pphinGiven = TRUE; + break; + case BSIM4v5_MOD_PEGIDL : + mod->BSIM4v5pegidl = value->rValue; + mod->BSIM4v5pegidlGiven = TRUE; + break; + case BSIM4v5_MOD_PAIGC : + mod->BSIM4v5paigc = value->rValue; + mod->BSIM4v5paigcGiven = TRUE; + break; + case BSIM4v5_MOD_PBIGC : + mod->BSIM4v5pbigc = value->rValue; + mod->BSIM4v5pbigcGiven = TRUE; + break; + case BSIM4v5_MOD_PCIGC : + mod->BSIM4v5pcigc = value->rValue; + mod->BSIM4v5pcigcGiven = TRUE; + break; + case BSIM4v5_MOD_PAIGSD : + mod->BSIM4v5paigsd = value->rValue; + mod->BSIM4v5paigsdGiven = TRUE; + break; + case BSIM4v5_MOD_PBIGSD : + mod->BSIM4v5pbigsd = value->rValue; + mod->BSIM4v5pbigsdGiven = TRUE; + break; + case BSIM4v5_MOD_PCIGSD : + mod->BSIM4v5pcigsd = value->rValue; + mod->BSIM4v5pcigsdGiven = TRUE; + break; + case BSIM4v5_MOD_PAIGBACC : + mod->BSIM4v5paigbacc = value->rValue; + mod->BSIM4v5paigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_PBIGBACC : + mod->BSIM4v5pbigbacc = value->rValue; + mod->BSIM4v5pbigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_PCIGBACC : + mod->BSIM4v5pcigbacc = value->rValue; + mod->BSIM4v5pcigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_PAIGBINV : + mod->BSIM4v5paigbinv = value->rValue; + mod->BSIM4v5paigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_PBIGBINV : + mod->BSIM4v5pbigbinv = value->rValue; + mod->BSIM4v5pbigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_PCIGBINV : + mod->BSIM4v5pcigbinv = value->rValue; + mod->BSIM4v5pcigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_PNIGC : + mod->BSIM4v5pnigc = value->rValue; + mod->BSIM4v5pnigcGiven = TRUE; + break; + case BSIM4v5_MOD_PNIGBINV : + mod->BSIM4v5pnigbinv = value->rValue; + mod->BSIM4v5pnigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_PNIGBACC : + mod->BSIM4v5pnigbacc = value->rValue; + mod->BSIM4v5pnigbaccGiven = TRUE; + break; + case BSIM4v5_MOD_PNTOX : + mod->BSIM4v5pntox = value->rValue; + mod->BSIM4v5pntoxGiven = TRUE; + break; + case BSIM4v5_MOD_PEIGBINV : + mod->BSIM4v5peigbinv = value->rValue; + mod->BSIM4v5peigbinvGiven = TRUE; + break; + case BSIM4v5_MOD_PPIGCD : + mod->BSIM4v5ppigcd = value->rValue; + mod->BSIM4v5ppigcdGiven = TRUE; + break; + case BSIM4v5_MOD_PPOXEDGE : + mod->BSIM4v5ppoxedge = value->rValue; + mod->BSIM4v5ppoxedgeGiven = TRUE; + break; + case BSIM4v5_MOD_PXRCRG1 : + mod->BSIM4v5pxrcrg1 = value->rValue; + mod->BSIM4v5pxrcrg1Given = TRUE; + break; + case BSIM4v5_MOD_PXRCRG2 : + mod->BSIM4v5pxrcrg2 = value->rValue; + mod->BSIM4v5pxrcrg2Given = TRUE; + break; + case BSIM4v5_MOD_PLAMBDA : + mod->BSIM4v5plambda = value->rValue; + mod->BSIM4v5plambdaGiven = TRUE; + break; + case BSIM4v5_MOD_PVTL : + mod->BSIM4v5pvtl = value->rValue; + mod->BSIM4v5pvtlGiven = TRUE; + break; + case BSIM4v5_MOD_PXN: + mod->BSIM4v5pxn = value->rValue; + mod->BSIM4v5pxnGiven = TRUE; + break; + case BSIM4v5_MOD_PVFBSDOFF: + mod->BSIM4v5pvfbsdoff = value->rValue; + mod->BSIM4v5pvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_PTVFBSDOFF: + mod->BSIM4v5ptvfbsdoff = value->rValue; + mod->BSIM4v5ptvfbsdoffGiven = TRUE; + break; + case BSIM4v5_MOD_PEU : + mod->BSIM4v5peu = value->rValue; + mod->BSIM4v5peuGiven = TRUE; + break; + case BSIM4v5_MOD_PVFB : + mod->BSIM4v5pvfb = value->rValue; + mod->BSIM4v5pvfbGiven = TRUE; + break; + case BSIM4v5_MOD_PCGSL : + mod->BSIM4v5pcgsl = value->rValue; + mod->BSIM4v5pcgslGiven = TRUE; + break; + case BSIM4v5_MOD_PCGDL : + mod->BSIM4v5pcgdl = value->rValue; + mod->BSIM4v5pcgdlGiven = TRUE; + break; + case BSIM4v5_MOD_PCKAPPAS : + mod->BSIM4v5pckappas = value->rValue; + mod->BSIM4v5pckappasGiven = TRUE; + break; + case BSIM4v5_MOD_PCKAPPAD : + mod->BSIM4v5pckappad = value->rValue; + mod->BSIM4v5pckappadGiven = TRUE; + break; + case BSIM4v5_MOD_PCF : + mod->BSIM4v5pcf = value->rValue; + mod->BSIM4v5pcfGiven = TRUE; + break; + case BSIM4v5_MOD_PCLC : + mod->BSIM4v5pclc = value->rValue; + mod->BSIM4v5pclcGiven = TRUE; + break; + case BSIM4v5_MOD_PCLE : + mod->BSIM4v5pcle = value->rValue; + mod->BSIM4v5pcleGiven = TRUE; + break; + case BSIM4v5_MOD_PVFBCV : + mod->BSIM4v5pvfbcv = value->rValue; + mod->BSIM4v5pvfbcvGiven = TRUE; + break; + case BSIM4v5_MOD_PACDE : + mod->BSIM4v5pacde = value->rValue; + mod->BSIM4v5pacdeGiven = TRUE; + break; + case BSIM4v5_MOD_PMOIN : + mod->BSIM4v5pmoin = value->rValue; + mod->BSIM4v5pmoinGiven = TRUE; + break; + case BSIM4v5_MOD_PNOFF : + mod->BSIM4v5pnoff = value->rValue; + mod->BSIM4v5pnoffGiven = TRUE; + break; + case BSIM4v5_MOD_PVOFFCV : + mod->BSIM4v5pvoffcv = value->rValue; + mod->BSIM4v5pvoffcvGiven = TRUE; + break; + + case BSIM4v5_MOD_TNOM : + mod->BSIM4v5tnom = value->rValue + CONSTCtoK; + mod->BSIM4v5tnomGiven = TRUE; + break; + case BSIM4v5_MOD_CGSO : + mod->BSIM4v5cgso = value->rValue; + mod->BSIM4v5cgsoGiven = TRUE; + break; + case BSIM4v5_MOD_CGDO : + mod->BSIM4v5cgdo = value->rValue; + mod->BSIM4v5cgdoGiven = TRUE; + break; + case BSIM4v5_MOD_CGBO : + mod->BSIM4v5cgbo = value->rValue; + mod->BSIM4v5cgboGiven = TRUE; + break; + case BSIM4v5_MOD_XPART : + mod->BSIM4v5xpart = value->rValue; + mod->BSIM4v5xpartGiven = TRUE; + break; + case BSIM4v5_MOD_RSH : + mod->BSIM4v5sheetResistance = value->rValue; + mod->BSIM4v5sheetResistanceGiven = TRUE; + break; + case BSIM4v5_MOD_JSS : + mod->BSIM4v5SjctSatCurDensity = value->rValue; + mod->BSIM4v5SjctSatCurDensityGiven = TRUE; + break; + case BSIM4v5_MOD_JSWS : + mod->BSIM4v5SjctSidewallSatCurDensity = value->rValue; + mod->BSIM4v5SjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v5_MOD_JSWGS : + mod->BSIM4v5SjctGateSidewallSatCurDensity = value->rValue; + mod->BSIM4v5SjctGateSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v5_MOD_PBS : + mod->BSIM4v5SbulkJctPotential = value->rValue; + mod->BSIM4v5SbulkJctPotentialGiven = TRUE; + break; + case BSIM4v5_MOD_MJS : + mod->BSIM4v5SbulkJctBotGradingCoeff = value->rValue; + mod->BSIM4v5SbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_PBSWS : + mod->BSIM4v5SsidewallJctPotential = value->rValue; + mod->BSIM4v5SsidewallJctPotentialGiven = TRUE; + break; + case BSIM4v5_MOD_MJSWS : + mod->BSIM4v5SbulkJctSideGradingCoeff = value->rValue; + mod->BSIM4v5SbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_CJS : + mod->BSIM4v5SunitAreaJctCap = value->rValue; + mod->BSIM4v5SunitAreaJctCapGiven = TRUE; + break; + case BSIM4v5_MOD_CJSWS : + mod->BSIM4v5SunitLengthSidewallJctCap = value->rValue; + mod->BSIM4v5SunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM4v5_MOD_NJS : + mod->BSIM4v5SjctEmissionCoeff = value->rValue; + mod->BSIM4v5SjctEmissionCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_PBSWGS : + mod->BSIM4v5SGatesidewallJctPotential = value->rValue; + mod->BSIM4v5SGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM4v5_MOD_MJSWGS : + mod->BSIM4v5SbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM4v5SbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_CJSWGS : + mod->BSIM4v5SunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM4v5SunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM4v5_MOD_XTIS : + mod->BSIM4v5SjctTempExponent = value->rValue; + mod->BSIM4v5SjctTempExponentGiven = TRUE; + break; + case BSIM4v5_MOD_JSD : + mod->BSIM4v5DjctSatCurDensity = value->rValue; + mod->BSIM4v5DjctSatCurDensityGiven = TRUE; + break; + case BSIM4v5_MOD_JSWD : + mod->BSIM4v5DjctSidewallSatCurDensity = value->rValue; + mod->BSIM4v5DjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v5_MOD_JSWGD : + mod->BSIM4v5DjctGateSidewallSatCurDensity = value->rValue; + mod->BSIM4v5DjctGateSidewallSatCurDensityGiven = TRUE; + break; + case BSIM4v5_MOD_PBD : + mod->BSIM4v5DbulkJctPotential = value->rValue; + mod->BSIM4v5DbulkJctPotentialGiven = TRUE; + break; + case BSIM4v5_MOD_MJD : + mod->BSIM4v5DbulkJctBotGradingCoeff = value->rValue; + mod->BSIM4v5DbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_PBSWD : + mod->BSIM4v5DsidewallJctPotential = value->rValue; + mod->BSIM4v5DsidewallJctPotentialGiven = TRUE; + break; + case BSIM4v5_MOD_MJSWD : + mod->BSIM4v5DbulkJctSideGradingCoeff = value->rValue; + mod->BSIM4v5DbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_CJD : + mod->BSIM4v5DunitAreaJctCap = value->rValue; + mod->BSIM4v5DunitAreaJctCapGiven = TRUE; + break; + case BSIM4v5_MOD_CJSWD : + mod->BSIM4v5DunitLengthSidewallJctCap = value->rValue; + mod->BSIM4v5DunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM4v5_MOD_NJD : + mod->BSIM4v5DjctEmissionCoeff = value->rValue; + mod->BSIM4v5DjctEmissionCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_PBSWGD : + mod->BSIM4v5DGatesidewallJctPotential = value->rValue; + mod->BSIM4v5DGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM4v5_MOD_MJSWGD : + mod->BSIM4v5DbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM4v5DbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM4v5_MOD_CJSWGD : + mod->BSIM4v5DunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM4v5DunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM4v5_MOD_XTID : + mod->BSIM4v5DjctTempExponent = value->rValue; + mod->BSIM4v5DjctTempExponentGiven = TRUE; + break; + case BSIM4v5_MOD_LINT : + mod->BSIM4v5Lint = value->rValue; + mod->BSIM4v5LintGiven = TRUE; + break; + case BSIM4v5_MOD_LL : + mod->BSIM4v5Ll = value->rValue; + mod->BSIM4v5LlGiven = TRUE; + break; + case BSIM4v5_MOD_LLC : + mod->BSIM4v5Llc = value->rValue; + mod->BSIM4v5LlcGiven = TRUE; + break; + case BSIM4v5_MOD_LLN : + mod->BSIM4v5Lln = value->rValue; + mod->BSIM4v5LlnGiven = TRUE; + break; + case BSIM4v5_MOD_LW : + mod->BSIM4v5Lw = value->rValue; + mod->BSIM4v5LwGiven = TRUE; + break; + case BSIM4v5_MOD_LWC : + mod->BSIM4v5Lwc = value->rValue; + mod->BSIM4v5LwcGiven = TRUE; + break; + case BSIM4v5_MOD_LWN : + mod->BSIM4v5Lwn = value->rValue; + mod->BSIM4v5LwnGiven = TRUE; + break; + case BSIM4v5_MOD_LWL : + mod->BSIM4v5Lwl = value->rValue; + mod->BSIM4v5LwlGiven = TRUE; + break; + case BSIM4v5_MOD_LWLC : + mod->BSIM4v5Lwlc = value->rValue; + mod->BSIM4v5LwlcGiven = TRUE; + break; + case BSIM4v5_MOD_LMIN : + mod->BSIM4v5Lmin = value->rValue; + mod->BSIM4v5LminGiven = TRUE; + break; + case BSIM4v5_MOD_LMAX : + mod->BSIM4v5Lmax = value->rValue; + mod->BSIM4v5LmaxGiven = TRUE; + break; + case BSIM4v5_MOD_WINT : + mod->BSIM4v5Wint = value->rValue; + mod->BSIM4v5WintGiven = TRUE; + break; + case BSIM4v5_MOD_WL : + mod->BSIM4v5Wl = value->rValue; + mod->BSIM4v5WlGiven = TRUE; + break; + case BSIM4v5_MOD_WLC : + mod->BSIM4v5Wlc = value->rValue; + mod->BSIM4v5WlcGiven = TRUE; + break; + case BSIM4v5_MOD_WLN : + mod->BSIM4v5Wln = value->rValue; + mod->BSIM4v5WlnGiven = TRUE; + break; + case BSIM4v5_MOD_WW : + mod->BSIM4v5Ww = value->rValue; + mod->BSIM4v5WwGiven = TRUE; + break; + case BSIM4v5_MOD_WWC : + mod->BSIM4v5Wwc = value->rValue; + mod->BSIM4v5WwcGiven = TRUE; + break; + case BSIM4v5_MOD_WWN : + mod->BSIM4v5Wwn = value->rValue; + mod->BSIM4v5WwnGiven = TRUE; + break; + case BSIM4v5_MOD_WWL : + mod->BSIM4v5Wwl = value->rValue; + mod->BSIM4v5WwlGiven = TRUE; + break; + case BSIM4v5_MOD_WWLC : + mod->BSIM4v5Wwlc = value->rValue; + mod->BSIM4v5WwlcGiven = TRUE; + break; + case BSIM4v5_MOD_WMIN : + mod->BSIM4v5Wmin = value->rValue; + mod->BSIM4v5WminGiven = TRUE; + break; + case BSIM4v5_MOD_WMAX : + mod->BSIM4v5Wmax = value->rValue; + mod->BSIM4v5WmaxGiven = TRUE; + break; + + case BSIM4v5_MOD_NOIA : + mod->BSIM4v5oxideTrapDensityA = value->rValue; + mod->BSIM4v5oxideTrapDensityAGiven = TRUE; + break; + case BSIM4v5_MOD_NOIB : + mod->BSIM4v5oxideTrapDensityB = value->rValue; + mod->BSIM4v5oxideTrapDensityBGiven = TRUE; + break; + case BSIM4v5_MOD_NOIC : + mod->BSIM4v5oxideTrapDensityC = value->rValue; + mod->BSIM4v5oxideTrapDensityCGiven = TRUE; + break; + case BSIM4v5_MOD_EM : + mod->BSIM4v5em = value->rValue; + mod->BSIM4v5emGiven = TRUE; + break; + case BSIM4v5_MOD_EF : + mod->BSIM4v5ef = value->rValue; + mod->BSIM4v5efGiven = TRUE; + break; + case BSIM4v5_MOD_AF : + mod->BSIM4v5af = value->rValue; + mod->BSIM4v5afGiven = TRUE; + break; + case BSIM4v5_MOD_KF : + mod->BSIM4v5kf = value->rValue; + mod->BSIM4v5kfGiven = TRUE; + break; + case BSIM4v5_MOD_STIMOD : + mod->BSIM4v5stimod = value->rValue; + mod->BSIM4v5stimodGiven = TRUE; + break; + case BSIM4v5_MOD_RGEOMOD : + mod->BSIM4v5rgeomod = value->rValue; + mod->BSIM4v5rgeomodGiven = TRUE; + break; + case BSIM4v5_MOD_SA0 : + mod->BSIM4v5sa0 = value->rValue; + mod->BSIM4v5sa0Given = TRUE; + break; + case BSIM4v5_MOD_SB0 : + mod->BSIM4v5sb0 = value->rValue; + mod->BSIM4v5sb0Given = TRUE; + break; + case BSIM4v5_MOD_NMOS : + if(value->iValue) { + mod->BSIM4v5type = 1; + mod->BSIM4v5typeGiven = TRUE; + } + break; + case BSIM4v5_MOD_PMOS : + if(value->iValue) { + mod->BSIM4v5type = - 1; + mod->BSIM4v5typeGiven = TRUE; + } + break; + default: + return(E_BADPARM); + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim4v5/b4v5noi.c b/src/spicelib/devices/bsim4v5/b4v5noi.c new file mode 100644 index 000000000..75ac16c85 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5noi.c @@ -0,0 +1,541 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4noi.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 03/04/2004. + * Modified by Xuemei Xi, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "bsim4v5def.h" +#include "cktdefs.h" +#include "iferrmsg.h" +#include "noisedef.h" +#include "suffix.h" +#include "const.h" + + +extern void NevalSrc(); +extern double Nintegrate(); + +/* + * WDL: 1/f noise model has been smoothed out and enhanced with + * bulk charge effect as well as physical N* equ. and necessary + * conversion into the SI unit system. + */ + +static double +BSIM4v5Eval1ovFNoise(Vds, model, here, freq, temp) +double Vds, freq, temp; +BSIM4v5model *model; +BSIM4v5instance *here; +{ +struct bsim4v5SizeDependParam *pParam; +double cd, esat, DelClm, EffFreq, N0, Nl, Leff, Leffsq; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi; + + pParam = here->pParam; + cd = fabs(here->BSIM4v5cd); + Leff = pParam->BSIM4v5leff - 2.0 * model->BSIM4v5lintnoi; + Leffsq = Leff * Leff; + esat = 2.0 * here->BSIM4v5vsattemp / here->BSIM4v5ueff; + if(model->BSIM4v5em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */ + else { + T0 = ((((Vds - here->BSIM4v5Vdseff) / pParam->BSIM4v5litl) + + model->BSIM4v5em) / esat); + DelClm = pParam->BSIM4v5litl * log (MAX(T0, N_MINLOG)); + if (DelClm < 0.0) DelClm = 0.0; /* bugfix */ + } + EffFreq = pow(freq, model->BSIM4v5ef); + T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4v5ueff; + T2 = 1.0e10 * EffFreq * here->BSIM4v5Abulk * model->BSIM4v5coxe * Leffsq; + N0 = model->BSIM4v5coxe * here->BSIM4v5Vgsteff / CHARGE; + Nl = model->BSIM4v5coxe * here->BSIM4v5Vgsteff + * (1.0 - here->BSIM4v5AbovVgst2Vtm * here->BSIM4v5Vdseff) / CHARGE; + + T3 = model->BSIM4v5oxideTrapDensityA + * log(MAX(((N0 + here->BSIM4v5nstar) / (Nl + here->BSIM4v5nstar)), N_MINLOG)); + T4 = model->BSIM4v5oxideTrapDensityB * (N0 - Nl); + T5 = model->BSIM4v5oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); + + T6 = CONSTboltz * temp * cd * cd; + T7 = 1.0e10 * EffFreq * Leffsq * pParam->BSIM4v5weff * here->BSIM4v5nf; + T8 = model->BSIM4v5oxideTrapDensityA + model->BSIM4v5oxideTrapDensityB * Nl + + model->BSIM4v5oxideTrapDensityC * Nl * Nl; + T9 = (Nl + here->BSIM4v5nstar) * (Nl + here->BSIM4v5nstar); + Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; + return Ssi; +} + + +int +BSIM4v5noise (mode, operation, inModel, ckt, data, OnDens) +int mode, operation; +GENmodel *inModel; +CKTcircuit *ckt; +Ndata *data; +double *OnDens; +{ +BSIM4v5model *model = (BSIM4v5model *)inModel; +BSIM4v5instance *here; +struct bsim4v5SizeDependParam *pParam; +char name[N_MXVLNTH]; +double tempOnoise; +double tempInoise; +double noizDens[BSIM4v5NSRCS]; +double lnNdens[BSIM4v5NSRCS]; + +double T0, T1, T2, T5, T10, T11; +double Vds, Ssi, Swi; +double tmp=0.0, gdpr, gspr, npart_theta=0.0, npart_beta=0.0, igsquare, bodymode; + +double m; + +int i; + + /* define the names of the noise sources */ + static char *BSIM4v5nNames[BSIM4v5NSRCS] = + { /* Note that we have to keep the order */ + ".rd", /* noise due to rd */ + ".rs", /* noise due to rs */ + ".rg", /* noise due to rgeltd */ + ".rbps", /* noise due to rbps */ + ".rbpd", /* noise due to rbpd */ + ".rbpb", /* noise due to rbpb */ + ".rbsb", /* noise due to rbsb */ + ".rbdb", /* noise due to rbdb */ + ".id", /* noise due to id */ + ".1overf", /* flicker (1/f) noise */ + ".igs", /* shot noise due to IGS */ + ".igd", /* shot noise due to IGD */ + ".igb", /* shot noise due to IGB */ + "" /* total transistor noise */ + }; + + for (; model != NULL; model = model->BSIM4v5nextModel) + { for (here = model->BSIM4v5instances; here != NULL; + here = here->BSIM4v5nextInstance) + { pParam = here->pParam; + switch (operation) + { case N_OPEN: + /* see if we have to to produce a summary report */ + /* if so, name all the noise generators */ + + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { switch (mode) + { case N_DENS: + for (i = 0; i < BSIM4v5NSRCS; i++) + { (void) sprintf(name, "onoise.%s%s", + here->BSIM4v5name, + BSIM4v5nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + } + break; + case INT_NOIZ: + for (i = 0; i < BSIM4v5NSRCS; i++) + { (void) sprintf(name, "onoise_total.%s%s", + here->BSIM4v5name, + BSIM4v5nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + + (void) sprintf(name, "inoise_total.%s%s", + here->BSIM4v5name, + BSIM4v5nNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **)NULL); + /* we've added one more plot */ + } + break; + } + } + break; + case N_CALC: + m = here->BSIM4v5m; + switch (mode) + { case N_DENS: + if (model->BSIM4v5tnoiMod == 0) + { if (model->BSIM4v5rdsMod == 0) + { gspr = here->BSIM4v5sourceConductance; + gdpr = here->BSIM4v5drainConductance; + if (here->BSIM4v5grdsw > 0.0) + tmp = 1.0 / here->BSIM4v5grdsw; /* tmp used below */ + else + tmp = 0.0; + } + else + { gspr = here->BSIM4v5gstot; + gdpr = here->BSIM4v5gdtot; + tmp = 0.0; + } + } + else + { T5 = here->BSIM4v5Vgsteff / here->BSIM4v5EsatL; + T5 *= T5; + npart_beta = model->BSIM4v5rnoia * (1.0 + T5 + * model->BSIM4v5tnoia * pParam->BSIM4v5leff); + npart_theta = model->BSIM4v5rnoib * (1.0 + T5 + * model->BSIM4v5tnoib * pParam->BSIM4v5leff); + + if (model->BSIM4v5rdsMod == 0) + { gspr = here->BSIM4v5sourceConductance; + gdpr = here->BSIM4v5drainConductance; + } + else + { gspr = here->BSIM4v5gstot; + gdpr = here->BSIM4v5gdtot; + } + + if ((*(ckt->CKTstates[0] + here->BSIM4v5vds)) >= 0.0) + gspr = gspr / (1.0 + npart_theta * npart_theta * gspr + / here->BSIM4v5IdovVds); /* bugfix */ + else + gdpr = gdpr / (1.0 + npart_theta * npart_theta * gdpr + / here->BSIM4v5IdovVds); + } + + NevalSrc(&noizDens[BSIM4v5RDNOIZ], + &lnNdens[BSIM4v5RDNOIZ], ckt, THERMNOISE, + here->BSIM4v5dNodePrime, here->BSIM4v5dNode, + gdpr * m); + + NevalSrc(&noizDens[BSIM4v5RSNOIZ], + &lnNdens[BSIM4v5RSNOIZ], ckt, THERMNOISE, + here->BSIM4v5sNodePrime, here->BSIM4v5sNode, + gspr * m); + + + if ((here->BSIM4v5rgateMod == 1) || (here->BSIM4v5rgateMod == 2)) + { NevalSrc(&noizDens[BSIM4v5RGNOIZ], + &lnNdens[BSIM4v5RGNOIZ], ckt, THERMNOISE, + here->BSIM4v5gNodePrime, here->BSIM4v5gNodeExt, + here->BSIM4v5grgeltd * m); + } + else if (here->BSIM4v5rgateMod == 3) + { NevalSrc(&noizDens[BSIM4v5RGNOIZ], + &lnNdens[BSIM4v5RGNOIZ], ckt, THERMNOISE, + here->BSIM4v5gNodeMid, here->BSIM4v5gNodeExt, + here->BSIM4v5grgeltd * m); + } + else + { noizDens[BSIM4v5RGNOIZ] = 0.0; + lnNdens[BSIM4v5RGNOIZ] = + log(MAX(noizDens[BSIM4v5RGNOIZ], N_MINLOG)); + } + + bodymode = 5; + if (here->BSIM4v5rbodyMod == 2) + { if( ( !model->BSIM4v5rbps0Given) || + ( !model->BSIM4v5rbpd0Given) ) + bodymode = 1; + else + if( (!model->BSIM4v5rbsbx0Given && !model->BSIM4v5rbsby0Given) || + (!model->BSIM4v5rbdbx0Given && !model->BSIM4v5rbdby0Given) ) + bodymode = 3; + } + + if (here->BSIM4v5rbodyMod) + { + if(bodymode == 5) + { + NevalSrc(&noizDens[BSIM4v5RBPSNOIZ], + &lnNdens[BSIM4v5RBPSNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5sbNode, + here->BSIM4v5grbps * m); + NevalSrc(&noizDens[BSIM4v5RBPDNOIZ], + &lnNdens[BSIM4v5RBPDNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5dbNode, + here->BSIM4v5grbpd * m); + NevalSrc(&noizDens[BSIM4v5RBPBNOIZ], + &lnNdens[BSIM4v5RBPBNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5bNode, + here->BSIM4v5grbpb * m); + NevalSrc(&noizDens[BSIM4v5RBSBNOIZ], + &lnNdens[BSIM4v5RBSBNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNode, here->BSIM4v5sbNode, + here->BSIM4v5grbsb * m); + NevalSrc(&noizDens[BSIM4v5RBDBNOIZ], + &lnNdens[BSIM4v5RBDBNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNode, here->BSIM4v5dbNode, + here->BSIM4v5grbdb * m); + } + if(bodymode == 3) + { + NevalSrc(&noizDens[BSIM4v5RBPSNOIZ], + &lnNdens[BSIM4v5RBPSNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5sbNode, + here->BSIM4v5grbps * m); + NevalSrc(&noizDens[BSIM4v5RBPDNOIZ], + &lnNdens[BSIM4v5RBPDNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5dbNode, + here->BSIM4v5grbpd * m); + NevalSrc(&noizDens[BSIM4v5RBPBNOIZ], + &lnNdens[BSIM4v5RBPBNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5bNode, + here->BSIM4v5grbpb * m); + noizDens[BSIM4v5RBSBNOIZ] = noizDens[BSIM4v5RBDBNOIZ] = 0.0; + lnNdens[BSIM4v5RBSBNOIZ] = + log(MAX(noizDens[BSIM4v5RBSBNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBDBNOIZ] = + log(MAX(noizDens[BSIM4v5RBDBNOIZ], N_MINLOG)); + } + if(bodymode == 1) + { + NevalSrc(&noizDens[BSIM4v5RBPBNOIZ], + &lnNdens[BSIM4v5RBPBNOIZ], ckt, THERMNOISE, + here->BSIM4v5bNodePrime, here->BSIM4v5bNode, + here->BSIM4v5grbpb * m); + noizDens[BSIM4v5RBPSNOIZ] = noizDens[BSIM4v5RBPDNOIZ] = 0.0; + noizDens[BSIM4v5RBSBNOIZ] = noizDens[BSIM4v5RBDBNOIZ] = 0.0; + lnNdens[BSIM4v5RBPSNOIZ] = + log(MAX(noizDens[BSIM4v5RBPSNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBPDNOIZ] = + log(MAX(noizDens[BSIM4v5RBPDNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBSBNOIZ] = + log(MAX(noizDens[BSIM4v5RBSBNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBDBNOIZ] = + log(MAX(noizDens[BSIM4v5RBDBNOIZ], N_MINLOG)); + } + } + else + { noizDens[BSIM4v5RBPSNOIZ] = noizDens[BSIM4v5RBPDNOIZ] = 0.0; + noizDens[BSIM4v5RBPBNOIZ] = 0.0; + noizDens[BSIM4v5RBSBNOIZ] = noizDens[BSIM4v5RBDBNOIZ] = 0.0; + lnNdens[BSIM4v5RBPSNOIZ] = + log(MAX(noizDens[BSIM4v5RBPSNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBPDNOIZ] = + log(MAX(noizDens[BSIM4v5RBPDNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBPBNOIZ] = + log(MAX(noizDens[BSIM4v5RBPBNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBSBNOIZ] = + log(MAX(noizDens[BSIM4v5RBSBNOIZ], N_MINLOG)); + lnNdens[BSIM4v5RBDBNOIZ] = + log(MAX(noizDens[BSIM4v5RBDBNOIZ], N_MINLOG)); + } + + + switch(model->BSIM4v5tnoiMod) + { case 0: + T0 = m * here->BSIM4v5ueff * fabs(here->BSIM4v5qinv); + T1 = T0 * tmp + pParam->BSIM4v5leff + * pParam->BSIM4v5leff; + NevalSrc(&noizDens[BSIM4v5IDNOIZ], + &lnNdens[BSIM4v5IDNOIZ], ckt, + THERMNOISE, here->BSIM4v5dNodePrime, + here->BSIM4v5sNodePrime, + (T0 / T1) * model->BSIM4v5ntnoi); + break; + case 1: + T0 = m * (here->BSIM4v5gm + here->BSIM4v5gmbs + here->BSIM4v5gds); + T0 *= T0; + igsquare = npart_theta * npart_theta * T0 / here->BSIM4v5IdovVds; + T1 = npart_beta * (here->BSIM4v5gm + + here->BSIM4v5gmbs) + here->BSIM4v5gds; + T2 = T1 * T1 / here->BSIM4v5IdovVds; + NevalSrc(&noizDens[BSIM4v5IDNOIZ], + &lnNdens[BSIM4v5IDNOIZ], ckt, + THERMNOISE, here->BSIM4v5dNodePrime, + here->BSIM4v5sNodePrime, (T2 - igsquare)); + break; + } + + NevalSrc(&noizDens[BSIM4v5FLNOIZ], (double*) NULL, + ckt, N_GAIN, here->BSIM4v5dNodePrime, + here->BSIM4v5sNodePrime, (double) 0.0); + + switch(model->BSIM4v5fnoiMod) + { case 0: + noizDens[BSIM4v5FLNOIZ] *= m * model->BSIM4v5kf + * exp(model->BSIM4v5af + * log(MAX(fabs(here->BSIM4v5cd), + N_MINLOG))) + / (pow(data->freq, model->BSIM4v5ef) + * pParam->BSIM4v5leff + * pParam->BSIM4v5leff + * model->BSIM4v5coxe); + break; + case 1: + Vds = *(ckt->CKTstates[0] + here->BSIM4v5vds); + if (Vds < 0.0) + Vds = -Vds; + + Ssi = BSIM4v5Eval1ovFNoise(Vds, model, here, + data->freq, ckt->CKTtemp); + T10 = model->BSIM4v5oxideTrapDensityA + * CONSTboltz * ckt->CKTtemp; + T11 = pParam->BSIM4v5weff * here->BSIM4v5nf * pParam->BSIM4v5leff + * pow(data->freq, model->BSIM4v5ef) * 1.0e10 + * here->BSIM4v5nstar * here->BSIM4v5nstar; + Swi = T10 / T11 * here->BSIM4v5cd + * here->BSIM4v5cd; + T1 = Swi + Ssi; + if (T1 > 0.0) + noizDens[BSIM4v5FLNOIZ] *= m * (Ssi * Swi) / T1; + else + noizDens[BSIM4v5FLNOIZ] *= 0.0; + break; + } + + lnNdens[BSIM4v5FLNOIZ] = + log(MAX(noizDens[BSIM4v5FLNOIZ], N_MINLOG)); + + + if(here->BSIM4v5mode >= 0) { /* bugfix */ + NevalSrc(&noizDens[BSIM4v5IGSNOIZ], + &lnNdens[BSIM4v5IGSNOIZ], ckt, SHOTNOISE, + here->BSIM4v5gNodePrime, here->BSIM4v5sNodePrime, + m * (here->BSIM4v5Igs + here->BSIM4v5Igcs)); + NevalSrc(&noizDens[BSIM4v5IGDNOIZ], + &lnNdens[BSIM4v5IGDNOIZ], ckt, SHOTNOISE, + here->BSIM4v5gNodePrime, here->BSIM4v5dNodePrime, + m * (here->BSIM4v5Igd + here->BSIM4v5Igcd)); + } else { + NevalSrc(&noizDens[BSIM4v5IGSNOIZ], + &lnNdens[BSIM4v5IGSNOIZ], ckt, SHOTNOISE, + here->BSIM4v5gNodePrime, here->BSIM4v5sNodePrime, + m * (here->BSIM4v5Igs + here->BSIM4v5Igcd)); + NevalSrc(&noizDens[BSIM4v5IGDNOIZ], + &lnNdens[BSIM4v5IGDNOIZ], ckt, SHOTNOISE, + here->BSIM4v5gNodePrime, here->BSIM4v5dNodePrime, + m * (here->BSIM4v5Igd + here->BSIM4v5Igcs)); + } + NevalSrc(&noizDens[BSIM4v5IGBNOIZ], + &lnNdens[BSIM4v5IGBNOIZ], ckt, SHOTNOISE, + here->BSIM4v5gNodePrime, here->BSIM4v5bNodePrime, + m * here->BSIM4v5Igb); + + + noizDens[BSIM4v5TOTNOIZ] = noizDens[BSIM4v5RDNOIZ] + + noizDens[BSIM4v5RSNOIZ] + noizDens[BSIM4v5RGNOIZ] + + noizDens[BSIM4v5RBPSNOIZ] + noizDens[BSIM4v5RBPDNOIZ] + + noizDens[BSIM4v5RBPBNOIZ] + + noizDens[BSIM4v5RBSBNOIZ] + noizDens[BSIM4v5RBDBNOIZ] + + noizDens[BSIM4v5IDNOIZ] + noizDens[BSIM4v5FLNOIZ] + + noizDens[BSIM4v5IGSNOIZ] + noizDens[BSIM4v5IGDNOIZ] + + noizDens[BSIM4v5IGBNOIZ]; + lnNdens[BSIM4v5TOTNOIZ] = + log(MAX(noizDens[BSIM4v5TOTNOIZ], N_MINLOG)); + + *OnDens += noizDens[BSIM4v5TOTNOIZ]; + + if (data->delFreq == 0.0) + { /* if we haven't done any previous + integration, we need to initialize our + "history" variables. + */ + + for (i = 0; i < BSIM4v5NSRCS; i++) + { here->BSIM4v5nVar[LNLSTDENS][i] = + lnNdens[i]; + } + + /* clear out our integration variables + if it's the first pass + */ + if (data->freq == + ((NOISEAN*) ckt->CKTcurJob)->NstartFreq) + { for (i = 0; i < BSIM4v5NSRCS; i++) + { here->BSIM4v5nVar[OUTNOIZ][i] = 0.0; + here->BSIM4v5nVar[INNOIZ][i] = 0.0; + } + } + } + else + { /* data->delFreq != 0.0, + we have to integrate. + */ + for (i = 0; i < BSIM4v5NSRCS; i++) + { if (i != BSIM4v5TOTNOIZ) + { tempOnoise = Nintegrate(noizDens[i], + lnNdens[i], + here->BSIM4v5nVar[LNLSTDENS][i], + data); + tempInoise = Nintegrate(noizDens[i] + * data->GainSqInv, lnNdens[i] + + data->lnGainInv, + here->BSIM4v5nVar[LNLSTDENS][i] + + data->lnGainInv, data); + here->BSIM4v5nVar[LNLSTDENS][i] = + lnNdens[i]; + data->outNoiz += tempOnoise; + data->inNoise += tempInoise; + if (((NOISEAN*) + ckt->CKTcurJob)->NStpsSm != 0) + { here->BSIM4v5nVar[OUTNOIZ][i] + += tempOnoise; + here->BSIM4v5nVar[OUTNOIZ][BSIM4v5TOTNOIZ] + += tempOnoise; + here->BSIM4v5nVar[INNOIZ][i] + += tempInoise; + here->BSIM4v5nVar[INNOIZ][BSIM4v5TOTNOIZ] + += tempInoise; + } + } + } + } + if (data->prtSummary) + { for (i = 0; i < BSIM4v5NSRCS; i++) + { /* print a summary report */ + data->outpVector[data->outNumber++] + = noizDens[i]; + } + } + break; + case INT_NOIZ: + /* already calculated, just output */ + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { for (i = 0; i < BSIM4v5NSRCS; i++) + { data->outpVector[data->outNumber++] + = here->BSIM4v5nVar[OUTNOIZ][i]; + data->outpVector[data->outNumber++] + = here->BSIM4v5nVar[INNOIZ][i]; + } + } + break; + } + break; + case N_CLOSE: + /* do nothing, the main calling routine will close */ + return (OK); + break; /* the plots */ + } /* switch (operation) */ + } /* for here */ + } /* for model */ + + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5par.c b/src/spicelib/devices/bsim4v5/b4v5par.c new file mode 100644 index 000000000..1e3989138 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5par.c @@ -0,0 +1,198 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2004 Regents of the University of California. All rights reserved. + * File: b4par.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. +**********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" +#include "fteext.h" + +int +BSIM4v5param(param,value,inst,select) +int param; +IFvalue *value; +GENinstance *inst; +IFvalue *select; +{ + double scale; + + if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1; + + BSIM4v5instance *here = (BSIM4v5instance*)inst; + switch(param) + { case BSIM4v5_W: + here->BSIM4v5w = value->rValue*scale; + here->BSIM4v5wGiven = TRUE; + break; + case BSIM4v5_L: + here->BSIM4v5l = value->rValue*scale; + here->BSIM4v5lGiven = TRUE; + break; + case BSIM4v5_M: + here->BSIM4v5m = value->rValue; + here->BSIM4v5mGiven = TRUE; + break; + case BSIM4v5_NF: + here->BSIM4v5nf = value->rValue; + here->BSIM4v5nfGiven = TRUE; + break; + case BSIM4v5_MIN: + here->BSIM4v5min = value->iValue; + here->BSIM4v5minGiven = TRUE; + break; + case BSIM4v5_AS: + here->BSIM4v5sourceArea = value->rValue*scale*scale; + here->BSIM4v5sourceAreaGiven = TRUE; + break; + case BSIM4v5_AD: + here->BSIM4v5drainArea = value->rValue*scale*scale; + here->BSIM4v5drainAreaGiven = TRUE; + break; + case BSIM4v5_PS: + here->BSIM4v5sourcePerimeter = value->rValue*scale; + here->BSIM4v5sourcePerimeterGiven = TRUE; + break; + case BSIM4v5_PD: + here->BSIM4v5drainPerimeter = value->rValue*scale; + here->BSIM4v5drainPerimeterGiven = TRUE; + break; + case BSIM4v5_NRS: + here->BSIM4v5sourceSquares = value->rValue; + here->BSIM4v5sourceSquaresGiven = TRUE; + break; + case BSIM4v5_NRD: + here->BSIM4v5drainSquares = value->rValue; + here->BSIM4v5drainSquaresGiven = TRUE; + break; + case BSIM4v5_OFF: + here->BSIM4v5off = value->iValue; + break; + case BSIM4v5_SA: + here->BSIM4v5sa = value->rValue*scale; + here->BSIM4v5saGiven = TRUE; + break; + case BSIM4v5_SB: + here->BSIM4v5sb = value->rValue*scale; + here->BSIM4v5sbGiven = TRUE; + break; + case BSIM4v5_SD: + here->BSIM4v5sd = value->rValue*scale; + here->BSIM4v5sdGiven = TRUE; + break; + case BSIM4v5_SCA: + here->BSIM4v5sca = value->rValue; + here->BSIM4v5scaGiven = TRUE; + break; + case BSIM4v5_SCB: + here->BSIM4v5scb = value->rValue; + here->BSIM4v5scbGiven = TRUE; + break; + case BSIM4v5_SCC: + here->BSIM4v5scc = value->rValue; + here->BSIM4v5sccGiven = TRUE; + break; + case BSIM4v5_SC: + here->BSIM4v5sc = value->rValue*scale; + here->BSIM4v5scGiven = TRUE; + break; + case BSIM4v5_RBSB: + here->BSIM4v5rbsb = value->rValue; + here->BSIM4v5rbsbGiven = TRUE; + break; + case BSIM4v5_RBDB: + here->BSIM4v5rbdb = value->rValue; + here->BSIM4v5rbdbGiven = TRUE; + break; + case BSIM4v5_RBPB: + here->BSIM4v5rbpb = value->rValue; + here->BSIM4v5rbpbGiven = TRUE; + break; + case BSIM4v5_RBPS: + here->BSIM4v5rbps = value->rValue; + here->BSIM4v5rbpsGiven = TRUE; + break; + case BSIM4v5_RBPD: + here->BSIM4v5rbpd = value->rValue; + here->BSIM4v5rbpdGiven = TRUE; + break; + case BSIM4v5_DELVTO: + here->BSIM4v5delvto = value->rValue; + here->BSIM4v5delvtoGiven = TRUE; + break; + case BSIM4v5_XGW: + here->BSIM4v5xgw = value->rValue; + here->BSIM4v5xgwGiven = TRUE; + break; + case BSIM4v5_NGCON: + here->BSIM4v5ngcon = value->rValue; + here->BSIM4v5ngconGiven = TRUE; + break; + case BSIM4v5_TRNQSMOD: + here->BSIM4v5trnqsMod = value->iValue; + here->BSIM4v5trnqsModGiven = TRUE; + break; + case BSIM4v5_ACNQSMOD: + here->BSIM4v5acnqsMod = value->iValue; + here->BSIM4v5acnqsModGiven = TRUE; + break; + case BSIM4v5_RBODYMOD: + here->BSIM4v5rbodyMod = value->iValue; + here->BSIM4v5rbodyModGiven = TRUE; + break; + case BSIM4v5_RGATEMOD: + here->BSIM4v5rgateMod = value->iValue; + here->BSIM4v5rgateModGiven = TRUE; + break; + case BSIM4v5_GEOMOD: + here->BSIM4v5geoMod = value->iValue; + here->BSIM4v5geoModGiven = TRUE; + break; + case BSIM4v5_RGEOMOD: + here->BSIM4v5rgeoMod = value->iValue; + here->BSIM4v5rgeoModGiven = TRUE; + break; + case BSIM4v5_IC_VDS: + here->BSIM4v5icVDS = value->rValue; + here->BSIM4v5icVDSGiven = TRUE; + break; + case BSIM4v5_IC_VGS: + here->BSIM4v5icVGS = value->rValue; + here->BSIM4v5icVGSGiven = TRUE; + break; + case BSIM4v5_IC_VBS: + here->BSIM4v5icVBS = value->rValue; + here->BSIM4v5icVBSGiven = TRUE; + break; + case BSIM4v5_IC: + switch(value->v.numValue) + { case 3: + here->BSIM4v5icVBS = *(value->v.vec.rVec+2); + here->BSIM4v5icVBSGiven = TRUE; + case 2: + here->BSIM4v5icVGS = *(value->v.vec.rVec+1); + here->BSIM4v5icVGSGiven = TRUE; + case 1: + here->BSIM4v5icVDS = *(value->v.vec.rVec); + here->BSIM4v5icVDSGiven = TRUE; + break; + default: + return(E_BADPARM); + } + break; + default: + return(E_BADPARM); + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5pzld.c b/src/spicelib/devices/bsim4v5/b4v5pzld.c new file mode 100644 index 000000000..4122337c9 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5pzld.c @@ -0,0 +1,758 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4pzld.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 10/05/2001. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "complex.h" +#include "sperror.h" +#include "bsim4v5def.h" +#include "suffix.h" + +int +BSIM4v5pzLoad(inModel,ckt,s) +GENmodel *inModel; +CKTcircuit *ckt; +SPcomplex *s; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; + +double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb; +double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb; +double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb; +double gds, capbd, capbs, FwdSum, RevSum, Gm, Gmbs; +double gstot, gstotd, gstotg, gstots, gstotb, gspr; +double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr; +double gIstotg, gIstotd, gIstots, gIstotb; +double gIdtotg, gIdtotd, gIdtots, gIdtotb; +double gIbtotg, gIbtotd, gIbtots, gIbtotb; +double gIgtotg, gIgtotd, gIgtots, gIgtotb; +double cgso, cgdo, cgbo; +double xcdbdb=0.0, xcsbsb=0.0, xcgmgmb=0.0, xcgmdb=0.0, xcgmsb=0.0, xcdgmb=0.0, xcsgmb=0.0; +double xcgmbb=0.0, xcbgmb=0.0; +double dxpart, sxpart, xgtg, xgtd, xgts, xgtb, xcqgb=0.0, xcqdb=0.0, xcqsb=0.0, xcqbb=0.0; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb; +double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp; +double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; +double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; +double T0=0.0, T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css; +double ScalingFactor = 1.0e-9; +struct bsim4v5SizeDependParam *pParam; +double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls; + +double m; + + for (; model != NULL; model = model->BSIM4v5nextModel) + { for (here = model->BSIM4v5instances; here!= NULL; + here = here->BSIM4v5nextInstance) + { if (here->BSIM4v5owner != ARCHme) continue; + pParam = here->pParam; + capbd = here->BSIM4v5capbd; + capbs = here->BSIM4v5capbs; + cgso = here->BSIM4v5cgso; + cgdo = here->BSIM4v5cgdo; + cgbo = pParam->BSIM4v5cgbo; + + if (here->BSIM4v5mode >= 0) + { Gm = here->BSIM4v5gm; + Gmbs = here->BSIM4v5gmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + + gbbdp = -(here->BSIM4v5gbds); + gbbsp = here->BSIM4v5gbds + here->BSIM4v5gbgs + here->BSIM4v5gbbs; + gbdpg = here->BSIM4v5gbgs; + gbdpdp = here->BSIM4v5gbds; + gbdpb = here->BSIM4v5gbbs; + gbdpsp = -(gbdpg + gbdpdp + gbdpb); + + gbspdp = 0.0; + gbspg = 0.0; + gbspb = 0.0; + gbspsp = 0.0; + + if (model->BSIM4v5igcMod) + { gIstotg = here->BSIM4v5gIgsg + here->BSIM4v5gIgcsg; + gIstotd = here->BSIM4v5gIgcsd; + gIstots = here->BSIM4v5gIgss + here->BSIM4v5gIgcss; + gIstotb = here->BSIM4v5gIgcsb; + + gIdtotg = here->BSIM4v5gIgdg + here->BSIM4v5gIgcdg; + gIdtotd = here->BSIM4v5gIgdd + here->BSIM4v5gIgcdd; + gIdtots = here->BSIM4v5gIgcds; + gIdtotb = here->BSIM4v5gIgcdb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v5igbMod) + { gIbtotg = here->BSIM4v5gIgbg; + gIbtotd = here->BSIM4v5gIgbd; + gIbtots = here->BSIM4v5gIgbs; + gIbtotb = here->BSIM4v5gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v5rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vges) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + else if (here->BSIM4v5rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vgms) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + if (here->BSIM4v5rgateMod > 1) + { gcrgd = here->BSIM4v5gcrgd * T0; + gcrgg = here->BSIM4v5gcrgg * T0; + gcrgs = here->BSIM4v5gcrgs * T0; + gcrgb = here->BSIM4v5gcrgb * T0; + gcrgg -= here->BSIM4v5gcrg; + gcrg = here->BSIM4v5gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v5acnqsMod == 0) + { if (here->BSIM4v5rgateMod == 3) + { xcgmgmb = cgdo + cgso + pParam->BSIM4v5cgbo; + xcgmdb = -cgdo; + xcgmsb = -cgso; + xcgmbb = -pParam->BSIM4v5cgbo; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggb = here->BSIM4v5cggb; + xcgdb = here->BSIM4v5cgdb; + xcgsb = here->BSIM4v5cgsb; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = here->BSIM4v5cdgb; + xcsgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb); + xcbgb = here->BSIM4v5cbgb; + } + else + { xcggb = here->BSIM4v5cggb + cgdo + cgso + + pParam->BSIM4v5cgbo; + xcgdb = here->BSIM4v5cgdb - cgdo; + xcgsb = here->BSIM4v5cgsb - cgso; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = here->BSIM4v5cdgb - cgdo; + xcsgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb + cgso); + xcbgb = here->BSIM4v5cbgb - pParam->BSIM4v5cgbo; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddb = here->BSIM4v5cddb + here->BSIM4v5capbd + cgdo; + xcdsb = here->BSIM4v5cdsb; + + xcsdb = -(here->BSIM4v5cgdb + here->BSIM4v5cbdb + + here->BSIM4v5cddb); + xcssb = here->BSIM4v5capbs + cgso - (here->BSIM4v5cgsb + + here->BSIM4v5cbsb + here->BSIM4v5cdsb); + + if (!here->BSIM4v5rbodyMod) + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb); + xcbdb = here->BSIM4v5cbdb - here->BSIM4v5capbd; + xcbsb = here->BSIM4v5cbsb - here->BSIM4v5capbs; + xcdbdb = 0.0; + } + else + { xcdbb = -(here->BSIM4v5cddb + here->BSIM4v5cdgb + + here->BSIM4v5cdsb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb) + + here->BSIM4v5capbs; + xcbdb = here->BSIM4v5cbdb; + xcbsb = here->BSIM4v5cbsb; + + xcdbdb = -here->BSIM4v5capbd; + xcsbsb = -here->BSIM4v5capbs; + } + xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.6; + dxpart = 0.4; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { xcggb = xcgdb = xcgsb = xcgbb = 0.0; + xcbgb = xcbdb = xcbsb = xcbbb = 0.0; + xcdgb = xcddb = xcdsb = xcdbb = 0.0; + xcsgb = xcsdb = xcssb = xcsbb = 0.0; + + xgtg = here->BSIM4v5gtg; + xgtd = here->BSIM4v5gtd; + xgts = here->BSIM4v5gts; + xgtb = here->BSIM4v5gtb; + + xcqgb = here->BSIM4v5cqgb; + xcqdb = here->BSIM4v5cqdb; + xcqsb = here->BSIM4v5cqsb; + xcqbb = here->BSIM4v5cqbb; + + CoxWL = model->BSIM4v5coxe * here->pParam->BSIM4v5weffCV + * here->BSIM4v5nf * here->pParam->BSIM4v5leffCV; + qcheq = -(here->BSIM4v5qgate + here->BSIM4v5qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v5xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM4v5xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM4v5qdrn / qcheq; + Cdd = here->BSIM4v5cddb; + Csd = -(here->BSIM4v5cgdb + here->BSIM4v5cddb + + here->BSIM4v5cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM4v5cdgb; + Csg = -(here->BSIM4v5cggb + here->BSIM4v5cdgb + + here->BSIM4v5cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + + Cds = here->BSIM4v5cdsb; + Css = -(here->BSIM4v5cgsb + here->BSIM4v5cdsb + + here->BSIM4v5cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + } + else + { Gm = -here->BSIM4v5gm; + Gmbs = -here->BSIM4v5gmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + + gbbsp = -(here->BSIM4v5gbds); + gbbdp = here->BSIM4v5gbds + here->BSIM4v5gbgs + here->BSIM4v5gbbs; + + gbdpg = 0.0; + gbdpsp = 0.0; + gbdpb = 0.0; + gbdpdp = 0.0; + + gbspg = here->BSIM4v5gbgs; + gbspsp = here->BSIM4v5gbds; + gbspb = here->BSIM4v5gbbs; + gbspdp = -(gbspg + gbspsp + gbspb); + + if (model->BSIM4v5igcMod) + { gIstotg = here->BSIM4v5gIgsg + here->BSIM4v5gIgcdg; + gIstotd = here->BSIM4v5gIgcds; + gIstots = here->BSIM4v5gIgss + here->BSIM4v5gIgcdd; + gIstotb = here->BSIM4v5gIgcdb; + + gIdtotg = here->BSIM4v5gIgdg + here->BSIM4v5gIgcsg; + gIdtotd = here->BSIM4v5gIgdd + here->BSIM4v5gIgcss; + gIdtots = here->BSIM4v5gIgcsd; + gIdtotb = here->BSIM4v5gIgcsb; + } + else + { gIstotg = gIstotd = gIstots = gIstotb = 0.0; + gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0; + } + + if (model->BSIM4v5igbMod) + { gIbtotg = here->BSIM4v5gIgbg; + gIbtotd = here->BSIM4v5gIgbs; + gIbtots = here->BSIM4v5gIgbd; + gIbtotb = here->BSIM4v5gIgbb; + } + else + gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0; + + if ((model->BSIM4v5igcMod != 0) || (model->BSIM4v5igbMod != 0)) + { gIgtotg = gIstotg + gIdtotg + gIbtotg; + gIgtotd = gIstotd + gIdtotd + gIbtotd ; + gIgtots = gIstots + gIdtots + gIbtots; + gIgtotb = gIstotb + gIdtotb + gIbtotb; + } + else + gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0; + + if (here->BSIM4v5rgateMod == 2) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vges) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + else if (here->BSIM4v5rgateMod == 3) + T0 = *(ckt->CKTstates[0] + here->BSIM4v5vgms) + - *(ckt->CKTstates[0] + here->BSIM4v5vgs); + if (here->BSIM4v5rgateMod > 1) + { gcrgd = here->BSIM4v5gcrgs * T0; + gcrgg = here->BSIM4v5gcrgg * T0; + gcrgs = here->BSIM4v5gcrgd * T0; + gcrgb = here->BSIM4v5gcrgb * T0; + gcrgg -= here->BSIM4v5gcrg; + gcrg = here->BSIM4v5gcrg; + } + else + gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0; + + if (here->BSIM4v5acnqsMod == 0) + { if (here->BSIM4v5rgateMod == 3) + { xcgmgmb = cgdo + cgso + pParam->BSIM4v5cgbo; + xcgmdb = -cgdo; + xcgmsb = -cgso; + xcgmbb = -pParam->BSIM4v5cgbo; + + xcdgmb = xcgmdb; + xcsgmb = xcgmsb; + xcbgmb = xcgmbb; + + xcggb = here->BSIM4v5cggb; + xcgdb = here->BSIM4v5cgsb; + xcgsb = here->BSIM4v5cgdb; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb); + xcsgb = here->BSIM4v5cdgb; + xcbgb = here->BSIM4v5cbgb; + } + else + { xcggb = here->BSIM4v5cggb + cgdo + cgso + + pParam->BSIM4v5cgbo; + xcgdb = here->BSIM4v5cgsb - cgdo; + xcgsb = here->BSIM4v5cgdb - cgso; + xcgbb = -(xcggb + xcgdb + xcgsb); + + xcdgb = -(here->BSIM4v5cggb + here->BSIM4v5cbgb + + here->BSIM4v5cdgb + cgdo); + xcsgb = here->BSIM4v5cdgb - cgso; + xcbgb = here->BSIM4v5cbgb - pParam->BSIM4v5cgbo; + + xcdgmb = xcsgmb = xcbgmb = 0.0; + } + xcddb = here->BSIM4v5capbd + cgdo - (here->BSIM4v5cgsb + + here->BSIM4v5cbsb + here->BSIM4v5cdsb); + xcdsb = -(here->BSIM4v5cgdb + here->BSIM4v5cbdb + + here->BSIM4v5cddb); + + xcsdb = here->BSIM4v5cdsb; + xcssb = here->BSIM4v5cddb + here->BSIM4v5capbs + cgso; + + if (!here->BSIM4v5rbodyMod) + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb); + xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb); + xcbdb = here->BSIM4v5cbsb - here->BSIM4v5capbd; + xcbsb = here->BSIM4v5cbdb - here->BSIM4v5capbs; + xcdbdb = 0.0; + } + else + { xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb) + + here->BSIM4v5capbd; + xcsbb = -(here->BSIM4v5cddb + here->BSIM4v5cdgb + + here->BSIM4v5cdsb); + xcbdb = here->BSIM4v5cbsb; + xcbsb = here->BSIM4v5cbdb; + xcdbdb = -here->BSIM4v5capbd; + xcsbsb = -here->BSIM4v5capbs; + } + xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb); + + xgtg = xgtd = xgts = xgtb = 0.0; + sxpart = 0.4; + dxpart = 0.6; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { xcggb = xcgdb = xcgsb = xcgbb = 0.0; + xcbgb = xcbdb = xcbsb = xcbbb = 0.0; + xcdgb = xcddb = xcdsb = xcdbb = 0.0; + xcsgb = xcsdb = xcssb = xcsbb = 0.0; + + xgtg = here->BSIM4v5gtg; + xgtd = here->BSIM4v5gts; + xgts = here->BSIM4v5gtd; + xgtb = here->BSIM4v5gtb; + + xcqgb = here->BSIM4v5cqgb; + xcqdb = here->BSIM4v5cqsb; + xcqsb = here->BSIM4v5cqdb; + xcqbb = here->BSIM4v5cqbb; + + CoxWL = model->BSIM4v5coxe * here->pParam->BSIM4v5weffCV + * here->BSIM4v5nf * here->pParam->BSIM4v5leffCV; + qcheq = -(here->BSIM4v5qgate + here->BSIM4v5qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM4v5xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM4v5xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM4v5qdrn / qcheq; + Css = here->BSIM4v5cddb; + Cds = -(here->BSIM4v5cgdb + here->BSIM4v5cddb + + here->BSIM4v5cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM4v5cdgb; + Cdg = -(here->BSIM4v5cggb + here->BSIM4v5cdgb + + here->BSIM4v5cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + + Csd = here->BSIM4v5cdsb; + Cdd = -(here->BSIM4v5cgsb + here->BSIM4v5cdsb + + here->BSIM4v5cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + } + + if (model->BSIM4v5rdsMod == 1) + { gstot = here->BSIM4v5gstot; + gstotd = here->BSIM4v5gstotd; + gstotg = here->BSIM4v5gstotg; + gstots = here->BSIM4v5gstots - gstot; + gstotb = here->BSIM4v5gstotb; + + gdtot = here->BSIM4v5gdtot; + gdtotd = here->BSIM4v5gdtotd - gdtot; + gdtotg = here->BSIM4v5gdtotg; + gdtots = here->BSIM4v5gdtots; + gdtotb = here->BSIM4v5gdtotb; + } + else + { gstot = gstotd = gstotg = gstots = gstotb = 0.0; + gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0; + } + + + T1 = *(ckt->CKTstate0 + here->BSIM4v5qdef) * here->BSIM4v5gtau; + gds = here->BSIM4v5gds; + + /* + * Loading PZ matrix + */ + + m = here->BSIM4v5m; + + if (!model->BSIM4v5rdsMod) + { gdpr = here->BSIM4v5drainConductance; + gspr = here->BSIM4v5sourceConductance; + } + else + gdpr = gspr = 0.0; + + if (!here->BSIM4v5rbodyMod) + { gjbd = here->BSIM4v5gbd; + gjbs = here->BSIM4v5gbs; + } + else + gjbd = gjbs = 0.0; + + geltd = here->BSIM4v5grgeltd; + + if (here->BSIM4v5rgateMod == 1) + { *(here->BSIM4v5GEgePtr) += m * geltd; + *(here->BSIM4v5GPgePtr) -= m * geltd; + *(here->BSIM4v5GEgpPtr) -= m * geltd; + + *(here->BSIM4v5GPgpPtr ) += m * xcggb * s->real; + *(here->BSIM4v5GPgpPtr +1) += m * xcggb * s->imag; + *(here->BSIM4v5GPgpPtr) += m * (geltd - xgtg + gIgtotg); + *(here->BSIM4v5GPdpPtr ) += m * xcgdb * s->real; + *(here->BSIM4v5GPdpPtr +1) += m * xcgdb * s->imag; + *(here->BSIM4v5GPdpPtr) -= m * (xgtd - gIgtotd); + *(here->BSIM4v5GPspPtr ) += m * xcgsb * s->real; + *(here->BSIM4v5GPspPtr +1) += m * xcgsb * s->imag; + *(here->BSIM4v5GPspPtr) -= m * (xgts - gIgtots); + *(here->BSIM4v5GPbpPtr ) += m * xcgbb * s->real; + *(here->BSIM4v5GPbpPtr +1) += m * xcgbb * s->imag; + *(here->BSIM4v5GPbpPtr) -= m * (xgtb - gIgtotb); + } + else if (here->BSIM4v5rgateMod == 2) + { *(here->BSIM4v5GEgePtr) += m * gcrg; + *(here->BSIM4v5GEgpPtr) += m * gcrgg; + *(here->BSIM4v5GEdpPtr) += m * gcrgd; + *(here->BSIM4v5GEspPtr) += m * gcrgs; + *(here->BSIM4v5GEbpPtr) += m * gcrgb; + + *(here->BSIM4v5GPgePtr) -= m * gcrg; + *(here->BSIM4v5GPgpPtr ) += m * xcggb * s->real; + *(here->BSIM4v5GPgpPtr +1) += m * xcggb * s->imag; + *(here->BSIM4v5GPgpPtr) -= m * (gcrgg + xgtg - gIgtotg); + *(here->BSIM4v5GPdpPtr ) += m * xcgdb * s->real; + *(here->BSIM4v5GPdpPtr +1) += m * xcgdb * s->imag; + *(here->BSIM4v5GPdpPtr) -= m * (gcrgd + xgtd - gIgtotd); + *(here->BSIM4v5GPspPtr ) += m * xcgsb * s->real; + *(here->BSIM4v5GPspPtr +1) += m * xcgsb * s->imag; + *(here->BSIM4v5GPspPtr) -= m * (gcrgs + xgts - gIgtots); + *(here->BSIM4v5GPbpPtr ) += m * xcgbb * s->real; + *(here->BSIM4v5GPbpPtr +1) += m * xcgbb * s->imag; + *(here->BSIM4v5GPbpPtr) -= m * (gcrgb + xgtb - gIgtotb); + } + else if (here->BSIM4v5rgateMod == 3) + { *(here->BSIM4v5GEgePtr) += m * geltd; + *(here->BSIM4v5GEgmPtr) -= m * geltd; + *(here->BSIM4v5GMgePtr) -= m * geltd; + *(here->BSIM4v5GMgmPtr) += m * (geltd + gcrg); + *(here->BSIM4v5GMgmPtr ) += m * xcgmgmb * s->real; + *(here->BSIM4v5GMgmPtr +1) += m * xcgmgmb * s->imag; + + *(here->BSIM4v5GMdpPtr) += m * gcrgd; + *(here->BSIM4v5GMdpPtr ) += m * xcgmdb * s->real; + *(here->BSIM4v5GMdpPtr +1) += m * xcgmdb * s->imag; + *(here->BSIM4v5GMgpPtr) += m * gcrgg; + *(here->BSIM4v5GMspPtr) += m * gcrgs; + *(here->BSIM4v5GMspPtr ) += m * xcgmsb * s->real; + *(here->BSIM4v5GMspPtr +1) += m * xcgmsb * s->imag; + *(here->BSIM4v5GMbpPtr) += m * gcrgb; + *(here->BSIM4v5GMbpPtr ) += m * xcgmbb * s->real; + *(here->BSIM4v5GMbpPtr +1) += m * xcgmbb * s->imag; + + *(here->BSIM4v5DPgmPtr ) += m * xcdgmb * s->real; + *(here->BSIM4v5DPgmPtr +1) += m * xcdgmb * s->imag; + *(here->BSIM4v5GPgmPtr) -= m * gcrg; + *(here->BSIM4v5SPgmPtr ) += m * xcsgmb * s->real; + *(here->BSIM4v5SPgmPtr +1) += m * xcsgmb * s->imag; + *(here->BSIM4v5BPgmPtr ) += m * xcbgmb * s->real; + *(here->BSIM4v5BPgmPtr +1) += m * xcbgmb * s->imag; + + *(here->BSIM4v5GPgpPtr) -= m * (gcrgg + xgtg - gIgtotg); + *(here->BSIM4v5GPgpPtr ) += m * xcggb * s->real; + *(here->BSIM4v5GPgpPtr +1) += m * xcggb * s->imag; + *(here->BSIM4v5GPdpPtr) -= m * (gcrgd + xgtd - gIgtotd); + *(here->BSIM4v5GPdpPtr ) += m * xcgdb * s->real; + *(here->BSIM4v5GPdpPtr +1) += m * xcgdb * s->imag; + *(here->BSIM4v5GPspPtr) -= m * (gcrgs + xgts - gIgtots); + *(here->BSIM4v5GPspPtr ) += m * xcgsb * s->real; + *(here->BSIM4v5GPspPtr +1) += m * xcgsb * s->imag; + *(here->BSIM4v5GPbpPtr) -= m * (gcrgb + xgtb - gIgtotb); + *(here->BSIM4v5GPbpPtr ) += m * xcgbb * s->real; + *(here->BSIM4v5GPbpPtr +1) += m * xcgbb * s->imag; + } + else + { *(here->BSIM4v5GPdpPtr ) += m * xcgdb * s->real; + *(here->BSIM4v5GPdpPtr +1) += m * xcgdb * s->imag; + *(here->BSIM4v5GPdpPtr) -= m * (xgtd - gIgtotd); + *(here->BSIM4v5GPgpPtr ) += m * xcggb * s->real; + *(here->BSIM4v5GPgpPtr +1) += m * xcggb * s->imag; + *(here->BSIM4v5GPgpPtr) -= m * (xgtg - gIgtotg); + *(here->BSIM4v5GPspPtr ) += m * xcgsb * s->real; + *(here->BSIM4v5GPspPtr +1) += m * xcgsb * s->imag; + *(here->BSIM4v5GPspPtr) -= m * (xgts - gIgtots); + *(here->BSIM4v5GPbpPtr ) += m * xcgbb * s->real; + *(here->BSIM4v5GPbpPtr +1) += m * xcgbb * s->imag; + *(here->BSIM4v5GPbpPtr) -= m * (xgtb - gIgtotb); + } + + if (model->BSIM4v5rdsMod) + { (*(here->BSIM4v5DgpPtr) += m * gdtotg); + (*(here->BSIM4v5DspPtr) += m * gdtots); + (*(here->BSIM4v5DbpPtr) += m * gdtotb); + (*(here->BSIM4v5SdpPtr) += m * gstotd); + (*(here->BSIM4v5SgpPtr) += m * gstotg); + (*(here->BSIM4v5SbpPtr) += m * gstotb); + } + + *(here->BSIM4v5DPdpPtr ) += m * xcddb * s->real; + *(here->BSIM4v5DPdpPtr +1) += m * xcddb * s->imag; + *(here->BSIM4v5DPdpPtr) += m * (gdpr + gds + here->BSIM4v5gbd + - gdtotd + RevSum + gbdpdp - gIdtotd + + dxpart * xgtd + T1 * ddxpart_dVd); + *(here->BSIM4v5DPdPtr) -= m * (gdpr + gdtot); + *(here->BSIM4v5DPgpPtr ) += m * xcdgb * s->real; + *(here->BSIM4v5DPgpPtr +1) += m * xcdgb * s->imag; + *(here->BSIM4v5DPgpPtr) += m * (Gm - gdtotg + gbdpg - gIdtotg + + T1 * ddxpart_dVg + dxpart * xgtg); + *(here->BSIM4v5DPspPtr ) += m * xcdsb * s->real; + *(here->BSIM4v5DPspPtr +1) += m * xcdsb * s->imag; + *(here->BSIM4v5DPspPtr) -= m * (gds + FwdSum + gdtots - gbdpsp + gIdtots + - T1 * ddxpart_dVs - dxpart * xgts); + *(here->BSIM4v5DPbpPtr ) += m * xcdbb * s->real; + *(here->BSIM4v5DPbpPtr +1) += m * xcdbb * s->imag; + *(here->BSIM4v5DPbpPtr) -= m * (gjbd + gdtotb - Gmbs - gbdpb + gIdtotb + - T1 * ddxpart_dVb - dxpart * xgtb); + + *(here->BSIM4v5DdpPtr) -= m * (gdpr - gdtotd); + *(here->BSIM4v5DdPtr) += m * (gdpr + gdtot); + + *(here->BSIM4v5SPdpPtr ) += m * xcsdb * s->real; + *(here->BSIM4v5SPdpPtr +1) += m * xcsdb * s->imag; + *(here->BSIM4v5SPdpPtr) -= m * (gds + gstotd + RevSum - gbspdp + gIstotd + - T1 * dsxpart_dVd - sxpart * xgtd); + *(here->BSIM4v5SPgpPtr ) += m * xcsgb * s->real; + *(here->BSIM4v5SPgpPtr +1) += m * xcsgb * s->imag; + *(here->BSIM4v5SPgpPtr) -= m * (Gm + gstotg - gbspg + gIstotg + - T1 * dsxpart_dVg - sxpart * xgtg); + *(here->BSIM4v5SPspPtr ) += m * xcssb * s->real; + *(here->BSIM4v5SPspPtr +1) += m * xcssb * s->imag; + *(here->BSIM4v5SPspPtr) += m * (gspr + gds + here->BSIM4v5gbs - gIstots + - gstots + FwdSum + gbspsp + + sxpart * xgts + T1 * dsxpart_dVs); + *(here->BSIM4v5SPsPtr) -= m * (gspr + gstot); + *(here->BSIM4v5SPbpPtr ) += m * xcsbb * s->real; + *(here->BSIM4v5SPbpPtr +1) += m * xcsbb * s->imag; + *(here->BSIM4v5SPbpPtr) -= m * (gjbs + gstotb + Gmbs - gbspb + gIstotb + - T1 * dsxpart_dVb - sxpart * xgtb); + + *(here->BSIM4v5SspPtr) -= m * (gspr - gstots); + *(here->BSIM4v5SsPtr) += m * (gspr + gstot); + + *(here->BSIM4v5BPdpPtr ) += m * xcbdb * s->real; + *(here->BSIM4v5BPdpPtr +1) += m * xcbdb * s->imag; + *(here->BSIM4v5BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd); + *(here->BSIM4v5BPgpPtr ) += m * xcbgb * s->real; + *(here->BSIM4v5BPgpPtr +1) += m * xcbgb * s->imag; + *(here->BSIM4v5BPgpPtr) -= m * (here->BSIM4v5gbgs + gIbtotg); + *(here->BSIM4v5BPspPtr ) += m * xcbsb * s->real; + *(here->BSIM4v5BPspPtr +1) += m * xcbsb * s->imag; + *(here->BSIM4v5BPspPtr) -= m * (gjbs - gbbsp + gIbtots); + *(here->BSIM4v5BPbpPtr ) += m * xcbbb * s->real; + *(here->BSIM4v5BPbpPtr +1) += m * xcbbb * s->imag; + *(here->BSIM4v5BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v5gbbs + - gIbtotb); + ggidld = here->BSIM4v5ggidld; + ggidlg = here->BSIM4v5ggidlg; + ggidlb = here->BSIM4v5ggidlb; + ggislg = here->BSIM4v5ggislg; + ggisls = here->BSIM4v5ggisls; + ggislb = here->BSIM4v5ggislb; + + /* stamp gidl */ + (*(here->BSIM4v5DPdpPtr) += m * ggidld); + (*(here->BSIM4v5DPgpPtr) += m * ggidlg); + (*(here->BSIM4v5DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb)); + (*(here->BSIM4v5DPbpPtr) += m * ggidlb); + (*(here->BSIM4v5BPdpPtr) -= m * ggidld); + (*(here->BSIM4v5BPgpPtr) -= m * ggidlg); + (*(here->BSIM4v5BPspPtr) += m * ((ggidlg + ggidld) + ggidlb)); + (*(here->BSIM4v5BPbpPtr) -= m * ggidlb); + /* stamp gisl */ + (*(here->BSIM4v5SPdpPtr) -= m * ((ggisls + ggislg) + ggislb)); + (*(here->BSIM4v5SPgpPtr) += m * ggislg); + (*(here->BSIM4v5SPspPtr) += m * ggisls); + (*(here->BSIM4v5SPbpPtr) += m * ggislb); + (*(here->BSIM4v5BPdpPtr) += m * ((ggislg + ggisls) + ggislb)); + (*(here->BSIM4v5BPgpPtr) -= m * ggislg); + (*(here->BSIM4v5BPspPtr) -= m * ggisls); + (*(here->BSIM4v5BPbpPtr) -= m * ggislb); + + if (here->BSIM4v5rbodyMod) + { (*(here->BSIM4v5DPdbPtr ) += m * xcdbdb * s->real); + (*(here->BSIM4v5DPdbPtr +1) += m * xcdbdb * s->imag); + (*(here->BSIM4v5DPdbPtr) -= m * here->BSIM4v5gbd); + (*(here->BSIM4v5SPsbPtr ) += m * xcsbsb * s->real); + (*(here->BSIM4v5SPsbPtr +1) += m * xcsbsb * s->imag); + (*(here->BSIM4v5SPsbPtr) -= m * here->BSIM4v5gbs); + + (*(here->BSIM4v5DBdpPtr ) += m * xcdbdb * s->real); + (*(here->BSIM4v5DBdpPtr +1) += m * xcdbdb * s->imag); + (*(here->BSIM4v5DBdpPtr) -= m * here->BSIM4v5gbd); + (*(here->BSIM4v5DBdbPtr ) -= m * xcdbdb * s->real); + (*(here->BSIM4v5DBdbPtr +1) -= m * xcdbdb * s->imag); + (*(here->BSIM4v5DBdbPtr) += m * (here->BSIM4v5gbd + here->BSIM4v5grbpd + + here->BSIM4v5grbdb)); + (*(here->BSIM4v5DBbpPtr) -= m * here->BSIM4v5grbpd); + (*(here->BSIM4v5DBbPtr) -= m * here->BSIM4v5grbdb); + + (*(here->BSIM4v5BPdbPtr) -= m * here->BSIM4v5grbpd); + (*(here->BSIM4v5BPbPtr) -= m * here->BSIM4v5grbpb); + (*(here->BSIM4v5BPsbPtr) -= m * here->BSIM4v5grbps); + (*(here->BSIM4v5BPbpPtr) += m * (here->BSIM4v5grbpd + here->BSIM4v5grbps + + here->BSIM4v5grbpb)); + /* WDL: (-here->BSIM4v5gbbs) already added to BPbpPtr */ + + (*(here->BSIM4v5SBspPtr ) += m * xcsbsb * s->real); + (*(here->BSIM4v5SBspPtr +1) += m * xcsbsb * s->imag); + (*(here->BSIM4v5SBspPtr) -= m * here->BSIM4v5gbs); + (*(here->BSIM4v5SBbpPtr) -= m * here->BSIM4v5grbps); + (*(here->BSIM4v5SBbPtr) -= m * here->BSIM4v5grbsb); + (*(here->BSIM4v5SBsbPtr ) -= m * xcsbsb * s->real); + (*(here->BSIM4v5SBsbPtr +1) -= m * xcsbsb * s->imag); + (*(here->BSIM4v5SBsbPtr) += m * (here->BSIM4v5gbs + + here->BSIM4v5grbps + here->BSIM4v5grbsb)); + + (*(here->BSIM4v5BdbPtr) -= m * here->BSIM4v5grbdb); + (*(here->BSIM4v5BbpPtr) -= m * here->BSIM4v5grbpb); + (*(here->BSIM4v5BsbPtr) -= m * here->BSIM4v5grbsb); + (*(here->BSIM4v5BbPtr) += m * (here->BSIM4v5grbsb + here->BSIM4v5grbdb + + here->BSIM4v5grbpb)); + } + + if (here->BSIM4v5acnqsMod) + { *(here->BSIM4v5QqPtr ) += m * s->real * ScalingFactor; + *(here->BSIM4v5QqPtr +1) += m * s->imag * ScalingFactor; + *(here->BSIM4v5QgpPtr ) -= m * xcqgb * s->real; + *(here->BSIM4v5QgpPtr +1) -= m * xcqgb * s->imag; + *(here->BSIM4v5QdpPtr ) -= m * xcqdb * s->real; + *(here->BSIM4v5QdpPtr +1) -= m * xcqdb * s->imag; + *(here->BSIM4v5QbpPtr ) -= m * xcqbb * s->real; + *(here->BSIM4v5QbpPtr +1) -= m * xcqbb * s->imag; + *(here->BSIM4v5QspPtr ) -= m * xcqsb * s->real; + *(here->BSIM4v5QspPtr +1) -= m * xcqsb * s->imag; + + *(here->BSIM4v5GPqPtr) -= m * here->BSIM4v5gtau; + *(here->BSIM4v5DPqPtr) += m * dxpart * here->BSIM4v5gtau; + *(here->BSIM4v5SPqPtr) += m * sxpart * here->BSIM4v5gtau; + + *(here->BSIM4v5QqPtr) += m * here->BSIM4v5gtau; + *(here->BSIM4v5QgpPtr) += m * xgtg; + *(here->BSIM4v5QdpPtr) += m * xgtd; + *(here->BSIM4v5QbpPtr) += m * xgtb; + *(here->BSIM4v5QspPtr) += m * xgts; + } + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5set.c b/src/spicelib/devices/bsim4v5/b4v5set.c new file mode 100644 index 000000000..41b48284f --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5set.c @@ -0,0 +1,2084 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4set.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 03/04/2004. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. +**********/ + +#include "ngspice.h" +#include "jobdefs.h" +#include "ftedefs.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "const.h" +#include "sperror.h" +#include "suffix.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPS0 8.85418e-12 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define Charge_q 1.60219e-19 + +int +BSIM4v5RdseffGeo(double, int, int, int, double, double, double, double, double, int, double *); + +int +BSIM4v5setup(matrix,inModel,ckt,states) +SMPmatrix *matrix; +GENmodel *inModel; +CKTcircuit *ckt; +int *states; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; +int error; +CKTnode *tmp; +int noiseAnalGiven = 0, createNode; /* Criteria for new node creation */ +double Rtot, DMCGeff, DMCIeff, DMDGeff; +JOB *job; + + /* Search for a noise analysis request */ + for (job = ((TSKtask *)ft_curckt->ci_curTask)->jobs;job;job = job->JOBnextJob) { + if(strcmp(job->JOBname,"Noise Analysis")==0) { + noiseAnalGiven = 1; + break; + } + } + + /* loop through all the BSIM4v5 device models */ + for( ; model != NULL; model = model->BSIM4v5nextModel ) + { /* process defaults of model parameters */ + if (!model->BSIM4v5typeGiven) + model->BSIM4v5type = NMOS; + + if (!model->BSIM4v5mobModGiven) + model->BSIM4v5mobMod = 0; + else if ((model->BSIM4v5mobMod != 0) && (model->BSIM4v5mobMod != 1) + && (model->BSIM4v5mobMod != 2)) + { model->BSIM4v5mobMod = 0; + printf("Warning: mobMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v5binUnitGiven) + model->BSIM4v5binUnit = 1; + if (!model->BSIM4v5paramChkGiven) + model->BSIM4v5paramChk = 1; + + if (!model->BSIM4v5dioModGiven) + model->BSIM4v5dioMod = 1; + else if ((model->BSIM4v5dioMod != 0) && (model->BSIM4v5dioMod != 1) + && (model->BSIM4v5dioMod != 2)) + { model->BSIM4v5dioMod = 1; + printf("Warning: dioMod has been set to its default value: 1.\n"); + } + + if (!model->BSIM4v5capModGiven) + model->BSIM4v5capMod = 2; + else if ((model->BSIM4v5capMod != 0) && (model->BSIM4v5capMod != 1) + && (model->BSIM4v5capMod != 2)) + { model->BSIM4v5capMod = 2; + printf("Warning: capMod has been set to its default value: 2.\n"); + } + + if (!model->BSIM4v5rdsModGiven) + model->BSIM4v5rdsMod = 0; + else if ((model->BSIM4v5rdsMod != 0) && (model->BSIM4v5rdsMod != 1)) + { model->BSIM4v5rdsMod = 0; + printf("Warning: rdsMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v5rbodyModGiven) + model->BSIM4v5rbodyMod = 0; + else if ((model->BSIM4v5rbodyMod != 0) && (model->BSIM4v5rbodyMod != 1) && (model->BSIM4v5rbodyMod != 2)) + { model->BSIM4v5rbodyMod = 0; + printf("Warning: rbodyMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v5rgateModGiven) + model->BSIM4v5rgateMod = 0; + else if ((model->BSIM4v5rgateMod != 0) && (model->BSIM4v5rgateMod != 1) + && (model->BSIM4v5rgateMod != 2) && (model->BSIM4v5rgateMod != 3)) + { model->BSIM4v5rgateMod = 0; + printf("Warning: rgateMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v5perModGiven) + model->BSIM4v5perMod = 1; + else if ((model->BSIM4v5perMod != 0) && (model->BSIM4v5perMod != 1)) + { model->BSIM4v5perMod = 1; + printf("Warning: perMod has been set to its default value: 1.\n"); + } + + if (!model->BSIM4v5geoModGiven) + model->BSIM4v5geoMod = 0; + + if (!model->BSIM4v5fnoiModGiven) + model->BSIM4v5fnoiMod = 1; + else if ((model->BSIM4v5fnoiMod != 0) && (model->BSIM4v5fnoiMod != 1)) + { model->BSIM4v5fnoiMod = 1; + printf("Warning: fnoiMod has been set to its default value: 1.\n"); + } + if (!model->BSIM4v5tnoiModGiven) + model->BSIM4v5tnoiMod = 0; /* WDLiu: tnoiMod=1 needs to set internal S/D nodes */ + else if ((model->BSIM4v5tnoiMod != 0) && (model->BSIM4v5tnoiMod != 1)) + { model->BSIM4v5tnoiMod = 0; + printf("Warning: tnoiMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v5trnqsModGiven) + model->BSIM4v5trnqsMod = 0; + else if ((model->BSIM4v5trnqsMod != 0) && (model->BSIM4v5trnqsMod != 1)) + { model->BSIM4v5trnqsMod = 0; + printf("Warning: trnqsMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v5acnqsModGiven) + model->BSIM4v5acnqsMod = 0; + else if ((model->BSIM4v5acnqsMod != 0) && (model->BSIM4v5acnqsMod != 1)) + { model->BSIM4v5acnqsMod = 0; + printf("Warning: acnqsMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v5igcModGiven) + model->BSIM4v5igcMod = 0; + else if ((model->BSIM4v5igcMod != 0) && (model->BSIM4v5igcMod != 1) + && (model->BSIM4v5igcMod != 2)) + { model->BSIM4v5igcMod = 0; + printf("Warning: igcMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v5igbModGiven) + model->BSIM4v5igbMod = 0; + else if ((model->BSIM4v5igbMod != 0) && (model->BSIM4v5igbMod != 1)) + { model->BSIM4v5igbMod = 0; + printf("Warning: igbMod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v5tempModGiven) + model->BSIM4v5tempMod = 0; + else if ((model->BSIM4v5tempMod != 0) && (model->BSIM4v5tempMod != 1) + && (model->BSIM4v5tempMod != 2)) + { model->BSIM4v5tempMod = 0; + printf("Warning: tempMod has been set to its default value: 0.\n"); + } + + if (!model->BSIM4v5versionGiven) + model->BSIM4v5version = "4.5.0"; + if (!model->BSIM4v5toxrefGiven) + model->BSIM4v5toxref = 30.0e-10; + if (!model->BSIM4v5toxeGiven) + model->BSIM4v5toxe = 30.0e-10; + if (!model->BSIM4v5toxpGiven) + model->BSIM4v5toxp = model->BSIM4v5toxe; + if (!model->BSIM4v5toxmGiven) + model->BSIM4v5toxm = model->BSIM4v5toxe; + if (!model->BSIM4v5dtoxGiven) + model->BSIM4v5dtox = 0.0; + if (!model->BSIM4v5epsroxGiven) + model->BSIM4v5epsrox = 3.9; + + if (!model->BSIM4v5cdscGiven) + model->BSIM4v5cdsc = 2.4e-4; /* unit Q/V/m^2 */ + if (!model->BSIM4v5cdscbGiven) + model->BSIM4v5cdscb = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v5cdscdGiven) + model->BSIM4v5cdscd = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v5citGiven) + model->BSIM4v5cit = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM4v5nfactorGiven) + model->BSIM4v5nfactor = 1.0; + if (!model->BSIM4v5xjGiven) + model->BSIM4v5xj = .15e-6; + if (!model->BSIM4v5vsatGiven) + model->BSIM4v5vsat = 8.0e4; /* unit m/s */ + if (!model->BSIM4v5atGiven) + model->BSIM4v5at = 3.3e4; /* unit m/s */ + if (!model->BSIM4v5a0Given) + model->BSIM4v5a0 = 1.0; + if (!model->BSIM4v5agsGiven) + model->BSIM4v5ags = 0.0; + if (!model->BSIM4v5a1Given) + model->BSIM4v5a1 = 0.0; + if (!model->BSIM4v5a2Given) + model->BSIM4v5a2 = 1.0; + if (!model->BSIM4v5ketaGiven) + model->BSIM4v5keta = -0.047; /* unit / V */ + if (!model->BSIM4v5nsubGiven) + model->BSIM4v5nsub = 6.0e16; /* unit 1/cm3 */ + if (!model->BSIM4v5ndepGiven) + model->BSIM4v5ndep = 1.7e17; /* unit 1/cm3 */ + if (!model->BSIM4v5nsdGiven) + model->BSIM4v5nsd = 1.0e20; /* unit 1/cm3 */ + if (!model->BSIM4v5phinGiven) + model->BSIM4v5phin = 0.0; /* unit V */ + if (!model->BSIM4v5ngateGiven) + model->BSIM4v5ngate = 0; /* unit 1/cm3 */ + if (!model->BSIM4v5vbmGiven) + model->BSIM4v5vbm = -3.0; + if (!model->BSIM4v5xtGiven) + model->BSIM4v5xt = 1.55e-7; + if (!model->BSIM4v5kt1Given) + model->BSIM4v5kt1 = -0.11; /* unit V */ + if (!model->BSIM4v5kt1lGiven) + model->BSIM4v5kt1l = 0.0; /* unit V*m */ + if (!model->BSIM4v5kt2Given) + model->BSIM4v5kt2 = 0.022; /* No unit */ + if (!model->BSIM4v5k3Given) + model->BSIM4v5k3 = 80.0; + if (!model->BSIM4v5k3bGiven) + model->BSIM4v5k3b = 0.0; + if (!model->BSIM4v5w0Given) + model->BSIM4v5w0 = 2.5e-6; + if (!model->BSIM4v5lpe0Given) + model->BSIM4v5lpe0 = 1.74e-7; + if (!model->BSIM4v5lpebGiven) + model->BSIM4v5lpeb = 0.0; + if (!model->BSIM4v5dvtp0Given) + model->BSIM4v5dvtp0 = 0.0; + if (!model->BSIM4v5dvtp1Given) + model->BSIM4v5dvtp1 = 0.0; + if (!model->BSIM4v5dvt0Given) + model->BSIM4v5dvt0 = 2.2; + if (!model->BSIM4v5dvt1Given) + model->BSIM4v5dvt1 = 0.53; + if (!model->BSIM4v5dvt2Given) + model->BSIM4v5dvt2 = -0.032; /* unit 1 / V */ + + if (!model->BSIM4v5dvt0wGiven) + model->BSIM4v5dvt0w = 0.0; + if (!model->BSIM4v5dvt1wGiven) + model->BSIM4v5dvt1w = 5.3e6; + if (!model->BSIM4v5dvt2wGiven) + model->BSIM4v5dvt2w = -0.032; + + if (!model->BSIM4v5droutGiven) + model->BSIM4v5drout = 0.56; + if (!model->BSIM4v5dsubGiven) + model->BSIM4v5dsub = model->BSIM4v5drout; + if (!model->BSIM4v5vth0Given) + model->BSIM4v5vth0 = (model->BSIM4v5type == NMOS) ? 0.7 : -0.7; + if (!model->BSIM4v5euGiven) + model->BSIM4v5eu = (model->BSIM4v5type == NMOS) ? 1.67 : 1.0;; + if (!model->BSIM4v5uaGiven) + model->BSIM4v5ua = (model->BSIM4v5mobMod == 2) ? 1.0e-15 : 1.0e-9; /* unit m/V */ + if (!model->BSIM4v5ua1Given) + model->BSIM4v5ua1 = 1.0e-9; /* unit m/V */ + if (!model->BSIM4v5ubGiven) + model->BSIM4v5ub = 1.0e-19; /* unit (m/V)**2 */ + if (!model->BSIM4v5ub1Given) + model->BSIM4v5ub1 = -1.0e-18; /* unit (m/V)**2 */ + if (!model->BSIM4v5ucGiven) + model->BSIM4v5uc = (model->BSIM4v5mobMod == 1) ? -0.0465 : -0.0465e-9; + if (!model->BSIM4v5uc1Given) + model->BSIM4v5uc1 = (model->BSIM4v5mobMod == 1) ? -0.056 : -0.056e-9; + if (!model->BSIM4v5udGiven) + model->BSIM4v5ud = 1.0e14; /* unit m**(-2) */ + if (!model->BSIM4v5ud1Given) + model->BSIM4v5ud1 = 0.0; + if (!model->BSIM4v5upGiven) + model->BSIM4v5up = 0.0; + if (!model->BSIM4v5lpGiven) + model->BSIM4v5lp = 1.0e-8; + if (!model->BSIM4v5u0Given) + model->BSIM4v5u0 = (model->BSIM4v5type == NMOS) ? 0.067 : 0.025; + if (!model->BSIM4v5uteGiven) + model->BSIM4v5ute = -1.5; + if (!model->BSIM4v5voffGiven) + model->BSIM4v5voff = -0.08; + if (!model->BSIM4v5vofflGiven) + model->BSIM4v5voffl = 0.0; + if (!model->BSIM4v5minvGiven) + model->BSIM4v5minv = 0.0; + if (!model->BSIM4v5fproutGiven) + model->BSIM4v5fprout = 0.0; + if (!model->BSIM4v5pditsGiven) + model->BSIM4v5pdits = 0.0; + if (!model->BSIM4v5pditsdGiven) + model->BSIM4v5pditsd = 0.0; + if (!model->BSIM4v5pditslGiven) + model->BSIM4v5pditsl = 0.0; + if (!model->BSIM4v5deltaGiven) + model->BSIM4v5delta = 0.01; + if (!model->BSIM4v5rdswminGiven) + model->BSIM4v5rdswmin = 0.0; + if (!model->BSIM4v5rdwminGiven) + model->BSIM4v5rdwmin = 0.0; + if (!model->BSIM4v5rswminGiven) + model->BSIM4v5rswmin = 0.0; + if (!model->BSIM4v5rdswGiven) + model->BSIM4v5rdsw = 200.0; /* in ohm*um */ + if (!model->BSIM4v5rdwGiven) + model->BSIM4v5rdw = 100.0; + if (!model->BSIM4v5rswGiven) + model->BSIM4v5rsw = 100.0; + if (!model->BSIM4v5prwgGiven) + model->BSIM4v5prwg = 1.0; /* in 1/V */ + if (!model->BSIM4v5prwbGiven) + model->BSIM4v5prwb = 0.0; + if (!model->BSIM4v5prtGiven) + if (!model->BSIM4v5prtGiven) + model->BSIM4v5prt = 0.0; + if (!model->BSIM4v5eta0Given) + model->BSIM4v5eta0 = 0.08; /* no unit */ + if (!model->BSIM4v5etabGiven) + model->BSIM4v5etab = -0.07; /* unit 1/V */ + if (!model->BSIM4v5pclmGiven) + model->BSIM4v5pclm = 1.3; /* no unit */ + if (!model->BSIM4v5pdibl1Given) + model->BSIM4v5pdibl1 = 0.39; /* no unit */ + if (!model->BSIM4v5pdibl2Given) + model->BSIM4v5pdibl2 = 0.0086; /* no unit */ + if (!model->BSIM4v5pdiblbGiven) + model->BSIM4v5pdiblb = 0.0; /* 1/V */ + if (!model->BSIM4v5pscbe1Given) + model->BSIM4v5pscbe1 = 4.24e8; + if (!model->BSIM4v5pscbe2Given) + model->BSIM4v5pscbe2 = 1.0e-5; + if (!model->BSIM4v5pvagGiven) + model->BSIM4v5pvag = 0.0; + if (!model->BSIM4v5wrGiven) + model->BSIM4v5wr = 1.0; + if (!model->BSIM4v5dwgGiven) + model->BSIM4v5dwg = 0.0; + if (!model->BSIM4v5dwbGiven) + model->BSIM4v5dwb = 0.0; + if (!model->BSIM4v5b0Given) + model->BSIM4v5b0 = 0.0; + if (!model->BSIM4v5b1Given) + model->BSIM4v5b1 = 0.0; + if (!model->BSIM4v5alpha0Given) + model->BSIM4v5alpha0 = 0.0; + if (!model->BSIM4v5alpha1Given) + model->BSIM4v5alpha1 = 0.0; + if (!model->BSIM4v5beta0Given) + model->BSIM4v5beta0 = 0.0; + if (!model->BSIM4v5agidlGiven) + model->BSIM4v5agidl = 0.0; + if (!model->BSIM4v5bgidlGiven) + model->BSIM4v5bgidl = 2.3e9; /* V/m */ + if (!model->BSIM4v5cgidlGiven) + model->BSIM4v5cgidl = 0.5; /* V^3 */ + if (!model->BSIM4v5egidlGiven) + model->BSIM4v5egidl = 0.8; /* V */ + if (!model->BSIM4v5aigcGiven) + model->BSIM4v5aigc = (model->BSIM4v5type == NMOS) ? 1.36e-2 : 9.80e-3; + if (!model->BSIM4v5bigcGiven) + model->BSIM4v5bigc = (model->BSIM4v5type == NMOS) ? 1.71e-3 : 7.59e-4; + if (!model->BSIM4v5cigcGiven) + model->BSIM4v5cigc = (model->BSIM4v5type == NMOS) ? 0.075 : 0.03; + if (!model->BSIM4v5aigsdGiven) + model->BSIM4v5aigsd = (model->BSIM4v5type == NMOS) ? 1.36e-2 : 9.80e-3; + if (!model->BSIM4v5bigsdGiven) + model->BSIM4v5bigsd = (model->BSIM4v5type == NMOS) ? 1.71e-3 : 7.59e-4; + if (!model->BSIM4v5cigsdGiven) + model->BSIM4v5cigsd = (model->BSIM4v5type == NMOS) ? 0.075 : 0.03; + if (!model->BSIM4v5aigbaccGiven) + model->BSIM4v5aigbacc = 1.36e-2; + if (!model->BSIM4v5bigbaccGiven) + model->BSIM4v5bigbacc = 1.71e-3; + if (!model->BSIM4v5cigbaccGiven) + model->BSIM4v5cigbacc = 0.075; + if (!model->BSIM4v5aigbinvGiven) + model->BSIM4v5aigbinv = 1.11e-2; + if (!model->BSIM4v5bigbinvGiven) + model->BSIM4v5bigbinv = 9.49e-4; + if (!model->BSIM4v5cigbinvGiven) + model->BSIM4v5cigbinv = 0.006; + if (!model->BSIM4v5nigcGiven) + model->BSIM4v5nigc = 1.0; + if (!model->BSIM4v5nigbinvGiven) + model->BSIM4v5nigbinv = 3.0; + if (!model->BSIM4v5nigbaccGiven) + model->BSIM4v5nigbacc = 1.0; + if (!model->BSIM4v5ntoxGiven) + model->BSIM4v5ntox = 1.0; + if (!model->BSIM4v5eigbinvGiven) + model->BSIM4v5eigbinv = 1.1; + if (!model->BSIM4v5pigcdGiven) + model->BSIM4v5pigcd = 1.0; + if (!model->BSIM4v5poxedgeGiven) + model->BSIM4v5poxedge = 1.0; + if (!model->BSIM4v5xrcrg1Given) + model->BSIM4v5xrcrg1 = 12.0; + if (!model->BSIM4v5xrcrg2Given) + model->BSIM4v5xrcrg2 = 1.0; + if (!model->BSIM4v5ijthsfwdGiven) + model->BSIM4v5ijthsfwd = 0.1; /* unit A */ + if (!model->BSIM4v5ijthdfwdGiven) + model->BSIM4v5ijthdfwd = model->BSIM4v5ijthsfwd; + if (!model->BSIM4v5ijthsrevGiven) + model->BSIM4v5ijthsrev = 0.1; /* unit A */ + if (!model->BSIM4v5ijthdrevGiven) + model->BSIM4v5ijthdrev = model->BSIM4v5ijthsrev; + if (!model->BSIM4v5tnoiaGiven) + model->BSIM4v5tnoia = 1.5; + if (!model->BSIM4v5tnoibGiven) + model->BSIM4v5tnoib = 3.5; + if (!model->BSIM4v5rnoiaGiven) + model->BSIM4v5rnoia = 0.577; + if (!model->BSIM4v5rnoibGiven) + model->BSIM4v5rnoib = 0.5164; + if (!model->BSIM4v5ntnoiGiven) + model->BSIM4v5ntnoi = 1.0; + if (!model->BSIM4v5lambdaGiven) + model->BSIM4v5lambda = 0.0; + if (!model->BSIM4v5vtlGiven) + model->BSIM4v5vtl = 2.0e5; /* unit m/s */ + if (!model->BSIM4v5xnGiven) + model->BSIM4v5xn = 3.0; + if (!model->BSIM4v5lcGiven) + model->BSIM4v5lc = 5.0e-9; + if (!model->BSIM4v5vfbsdoffGiven) + model->BSIM4v5vfbsdoff = 0.0; /* unit v */ + if (!model->BSIM4v5tvfbsdoffGiven) + model->BSIM4v5tvfbsdoff = 0.0; + if (!model->BSIM4v5tvoffGiven) + model->BSIM4v5tvoff = 0.0; + + if (!model->BSIM4v5lintnoiGiven) + model->BSIM4v5lintnoi = 0.0; /* unit m */ + + if (!model->BSIM4v5xjbvsGiven) + model->BSIM4v5xjbvs = 1.0; /* no unit */ + if (!model->BSIM4v5xjbvdGiven) + model->BSIM4v5xjbvd = model->BSIM4v5xjbvs; + if (!model->BSIM4v5bvsGiven) + model->BSIM4v5bvs = 10.0; /* V */ + if (!model->BSIM4v5bvdGiven) + model->BSIM4v5bvd = model->BSIM4v5bvs; + + if (!model->BSIM4v5gbminGiven) + model->BSIM4v5gbmin = 1.0e-12; /* in mho */ + if (!model->BSIM4v5rbdbGiven) + model->BSIM4v5rbdb = 50.0; /* in ohm */ + if (!model->BSIM4v5rbpbGiven) + model->BSIM4v5rbpb = 50.0; + if (!model->BSIM4v5rbsbGiven) + model->BSIM4v5rbsb = 50.0; + if (!model->BSIM4v5rbpsGiven) + model->BSIM4v5rbps = 50.0; + if (!model->BSIM4v5rbpdGiven) + model->BSIM4v5rbpd = 50.0; + + if (!model->BSIM4v5rbps0Given) + model->BSIM4v5rbps0 = 50.0; + if (!model->BSIM4v5rbpslGiven) + model->BSIM4v5rbpsl = 0.0; + if (!model->BSIM4v5rbpswGiven) + model->BSIM4v5rbpsw = 0.0; + if (!model->BSIM4v5rbpsnfGiven) + model->BSIM4v5rbpsnf = 0.0; + + if (!model->BSIM4v5rbpd0Given) + model->BSIM4v5rbpd0 = 50.0; + if (!model->BSIM4v5rbpdlGiven) + model->BSIM4v5rbpdl = 0.0; + if (!model->BSIM4v5rbpdwGiven) + model->BSIM4v5rbpdw = 0.0; + if (!model->BSIM4v5rbpdnfGiven) + model->BSIM4v5rbpdnf = 0.0; + + if (!model->BSIM4v5rbpbx0Given) + model->BSIM4v5rbpbx0 = 100.0; + if (!model->BSIM4v5rbpbxlGiven) + model->BSIM4v5rbpbxl = 0.0; + if (!model->BSIM4v5rbpbxwGiven) + model->BSIM4v5rbpbxw = 0.0; + if (!model->BSIM4v5rbpbxnfGiven) + model->BSIM4v5rbpbxnf = 0.0; + if (!model->BSIM4v5rbpby0Given) + model->BSIM4v5rbpby0 = 100.0; + if (!model->BSIM4v5rbpbylGiven) + model->BSIM4v5rbpbyl = 0.0; + if (!model->BSIM4v5rbpbywGiven) + model->BSIM4v5rbpbyw = 0.0; + if (!model->BSIM4v5rbpbynfGiven) + model->BSIM4v5rbpbynf = 0.0; + + + if (!model->BSIM4v5rbsbx0Given) + model->BSIM4v5rbsbx0 = 100.0; + if (!model->BSIM4v5rbsby0Given) + model->BSIM4v5rbsby0 = 100.0; + if (!model->BSIM4v5rbdbx0Given) + model->BSIM4v5rbdbx0 = 100.0; + if (!model->BSIM4v5rbdby0Given) + model->BSIM4v5rbdby0 = 100.0; + + + if (!model->BSIM4v5rbsdbxlGiven) + model->BSIM4v5rbsdbxl = 0.0; + if (!model->BSIM4v5rbsdbxwGiven) + model->BSIM4v5rbsdbxw = 0.0; + if (!model->BSIM4v5rbsdbxnfGiven) + model->BSIM4v5rbsdbxnf = 0.0; + if (!model->BSIM4v5rbsdbylGiven) + model->BSIM4v5rbsdbyl = 0.0; + if (!model->BSIM4v5rbsdbywGiven) + model->BSIM4v5rbsdbyw = 0.0; + if (!model->BSIM4v5rbsdbynfGiven) + model->BSIM4v5rbsdbynf = 0.0; + + if (!model->BSIM4v5cgslGiven) + model->BSIM4v5cgsl = 0.0; + if (!model->BSIM4v5cgdlGiven) + model->BSIM4v5cgdl = 0.0; + if (!model->BSIM4v5ckappasGiven) + model->BSIM4v5ckappas = 0.6; + if (!model->BSIM4v5ckappadGiven) + model->BSIM4v5ckappad = model->BSIM4v5ckappas; + if (!model->BSIM4v5clcGiven) + model->BSIM4v5clc = 0.1e-6; + if (!model->BSIM4v5cleGiven) + model->BSIM4v5cle = 0.6; + if (!model->BSIM4v5vfbcvGiven) + model->BSIM4v5vfbcv = -1.0; + if (!model->BSIM4v5acdeGiven) + model->BSIM4v5acde = 1.0; + if (!model->BSIM4v5moinGiven) + model->BSIM4v5moin = 15.0; + if (!model->BSIM4v5noffGiven) + model->BSIM4v5noff = 1.0; + if (!model->BSIM4v5voffcvGiven) + model->BSIM4v5voffcv = 0.0; + if (!model->BSIM4v5dmcgGiven) + model->BSIM4v5dmcg = 0.0; + if (!model->BSIM4v5dmciGiven) + model->BSIM4v5dmci = model->BSIM4v5dmcg; + if (!model->BSIM4v5dmdgGiven) + model->BSIM4v5dmdg = 0.0; + if (!model->BSIM4v5dmcgtGiven) + model->BSIM4v5dmcgt = 0.0; + if (!model->BSIM4v5xgwGiven) + model->BSIM4v5xgw = 0.0; + if (!model->BSIM4v5xglGiven) + model->BSIM4v5xgl = 0.0; + if (!model->BSIM4v5rshgGiven) + model->BSIM4v5rshg = 0.1; + if (!model->BSIM4v5ngconGiven) + model->BSIM4v5ngcon = 1.0; + if (!model->BSIM4v5tcjGiven) + model->BSIM4v5tcj = 0.0; + if (!model->BSIM4v5tpbGiven) + model->BSIM4v5tpb = 0.0; + if (!model->BSIM4v5tcjswGiven) + model->BSIM4v5tcjsw = 0.0; + if (!model->BSIM4v5tpbswGiven) + model->BSIM4v5tpbsw = 0.0; + if (!model->BSIM4v5tcjswgGiven) + model->BSIM4v5tcjswg = 0.0; + if (!model->BSIM4v5tpbswgGiven) + model->BSIM4v5tpbswg = 0.0; + + /* Length dependence */ + if (!model->BSIM4v5lcdscGiven) + model->BSIM4v5lcdsc = 0.0; + if (!model->BSIM4v5lcdscbGiven) + model->BSIM4v5lcdscb = 0.0; + if (!model->BSIM4v5lcdscdGiven) + model->BSIM4v5lcdscd = 0.0; + if (!model->BSIM4v5lcitGiven) + model->BSIM4v5lcit = 0.0; + if (!model->BSIM4v5lnfactorGiven) + model->BSIM4v5lnfactor = 0.0; + if (!model->BSIM4v5lxjGiven) + model->BSIM4v5lxj = 0.0; + if (!model->BSIM4v5lvsatGiven) + model->BSIM4v5lvsat = 0.0; + if (!model->BSIM4v5latGiven) + model->BSIM4v5lat = 0.0; + if (!model->BSIM4v5la0Given) + model->BSIM4v5la0 = 0.0; + if (!model->BSIM4v5lagsGiven) + model->BSIM4v5lags = 0.0; + if (!model->BSIM4v5la1Given) + model->BSIM4v5la1 = 0.0; + if (!model->BSIM4v5la2Given) + model->BSIM4v5la2 = 0.0; + if (!model->BSIM4v5lketaGiven) + model->BSIM4v5lketa = 0.0; + if (!model->BSIM4v5lnsubGiven) + model->BSIM4v5lnsub = 0.0; + if (!model->BSIM4v5lndepGiven) + model->BSIM4v5lndep = 0.0; + if (!model->BSIM4v5lnsdGiven) + model->BSIM4v5lnsd = 0.0; + if (!model->BSIM4v5lphinGiven) + model->BSIM4v5lphin = 0.0; + if (!model->BSIM4v5lngateGiven) + model->BSIM4v5lngate = 0.0; + if (!model->BSIM4v5lvbmGiven) + model->BSIM4v5lvbm = 0.0; + if (!model->BSIM4v5lxtGiven) + model->BSIM4v5lxt = 0.0; + if (!model->BSIM4v5lkt1Given) + model->BSIM4v5lkt1 = 0.0; + if (!model->BSIM4v5lkt1lGiven) + model->BSIM4v5lkt1l = 0.0; + if (!model->BSIM4v5lkt2Given) + model->BSIM4v5lkt2 = 0.0; + if (!model->BSIM4v5lk3Given) + model->BSIM4v5lk3 = 0.0; + if (!model->BSIM4v5lk3bGiven) + model->BSIM4v5lk3b = 0.0; + if (!model->BSIM4v5lw0Given) + model->BSIM4v5lw0 = 0.0; + if (!model->BSIM4v5llpe0Given) + model->BSIM4v5llpe0 = 0.0; + if (!model->BSIM4v5llpebGiven) + model->BSIM4v5llpeb = 0.0; + if (!model->BSIM4v5ldvtp0Given) + model->BSIM4v5ldvtp0 = 0.0; + if (!model->BSIM4v5ldvtp1Given) + model->BSIM4v5ldvtp1 = 0.0; + if (!model->BSIM4v5ldvt0Given) + model->BSIM4v5ldvt0 = 0.0; + if (!model->BSIM4v5ldvt1Given) + model->BSIM4v5ldvt1 = 0.0; + if (!model->BSIM4v5ldvt2Given) + model->BSIM4v5ldvt2 = 0.0; + if (!model->BSIM4v5ldvt0wGiven) + model->BSIM4v5ldvt0w = 0.0; + if (!model->BSIM4v5ldvt1wGiven) + model->BSIM4v5ldvt1w = 0.0; + if (!model->BSIM4v5ldvt2wGiven) + model->BSIM4v5ldvt2w = 0.0; + if (!model->BSIM4v5ldroutGiven) + model->BSIM4v5ldrout = 0.0; + if (!model->BSIM4v5ldsubGiven) + model->BSIM4v5ldsub = 0.0; + if (!model->BSIM4v5lvth0Given) + model->BSIM4v5lvth0 = 0.0; + if (!model->BSIM4v5luaGiven) + model->BSIM4v5lua = 0.0; + if (!model->BSIM4v5lua1Given) + model->BSIM4v5lua1 = 0.0; + if (!model->BSIM4v5lubGiven) + model->BSIM4v5lub = 0.0; + if (!model->BSIM4v5lub1Given) + model->BSIM4v5lub1 = 0.0; + if (!model->BSIM4v5lucGiven) + model->BSIM4v5luc = 0.0; + if (!model->BSIM4v5luc1Given) + model->BSIM4v5luc1 = 0.0; + if (!model->BSIM4v5ludGiven) + model->BSIM4v5lud = 0.0; + if (!model->BSIM4v5lud1Given) + model->BSIM4v5lud1 = 0.0; + if (!model->BSIM4v5lupGiven) + model->BSIM4v5lup = 0.0; + if (!model->BSIM4v5llpGiven) + model->BSIM4v5llp = 0.0; + if (!model->BSIM4v5lu0Given) + model->BSIM4v5lu0 = 0.0; + if (!model->BSIM4v5luteGiven) + model->BSIM4v5lute = 0.0; + if (!model->BSIM4v5lvoffGiven) + model->BSIM4v5lvoff = 0.0; + if (!model->BSIM4v5lminvGiven) + model->BSIM4v5lminv = 0.0; + if (!model->BSIM4v5lfproutGiven) + model->BSIM4v5lfprout = 0.0; + if (!model->BSIM4v5lpditsGiven) + model->BSIM4v5lpdits = 0.0; + if (!model->BSIM4v5lpditsdGiven) + model->BSIM4v5lpditsd = 0.0; + if (!model->BSIM4v5ldeltaGiven) + model->BSIM4v5ldelta = 0.0; + if (!model->BSIM4v5lrdswGiven) + model->BSIM4v5lrdsw = 0.0; + if (!model->BSIM4v5lrdwGiven) + model->BSIM4v5lrdw = 0.0; + if (!model->BSIM4v5lrswGiven) + model->BSIM4v5lrsw = 0.0; + if (!model->BSIM4v5lprwbGiven) + model->BSIM4v5lprwb = 0.0; + if (!model->BSIM4v5lprwgGiven) + model->BSIM4v5lprwg = 0.0; + if (!model->BSIM4v5lprtGiven) + model->BSIM4v5lprt = 0.0; + if (!model->BSIM4v5leta0Given) + model->BSIM4v5leta0 = 0.0; + if (!model->BSIM4v5letabGiven) + model->BSIM4v5letab = -0.0; + if (!model->BSIM4v5lpclmGiven) + model->BSIM4v5lpclm = 0.0; + if (!model->BSIM4v5lpdibl1Given) + model->BSIM4v5lpdibl1 = 0.0; + if (!model->BSIM4v5lpdibl2Given) + model->BSIM4v5lpdibl2 = 0.0; + if (!model->BSIM4v5lpdiblbGiven) + model->BSIM4v5lpdiblb = 0.0; + if (!model->BSIM4v5lpscbe1Given) + model->BSIM4v5lpscbe1 = 0.0; + if (!model->BSIM4v5lpscbe2Given) + model->BSIM4v5lpscbe2 = 0.0; + if (!model->BSIM4v5lpvagGiven) + model->BSIM4v5lpvag = 0.0; + if (!model->BSIM4v5lwrGiven) + model->BSIM4v5lwr = 0.0; + if (!model->BSIM4v5ldwgGiven) + model->BSIM4v5ldwg = 0.0; + if (!model->BSIM4v5ldwbGiven) + model->BSIM4v5ldwb = 0.0; + if (!model->BSIM4v5lb0Given) + model->BSIM4v5lb0 = 0.0; + if (!model->BSIM4v5lb1Given) + model->BSIM4v5lb1 = 0.0; + if (!model->BSIM4v5lalpha0Given) + model->BSIM4v5lalpha0 = 0.0; + if (!model->BSIM4v5lalpha1Given) + model->BSIM4v5lalpha1 = 0.0; + if (!model->BSIM4v5lbeta0Given) + model->BSIM4v5lbeta0 = 0.0; + if (!model->BSIM4v5lagidlGiven) + model->BSIM4v5lagidl = 0.0; + if (!model->BSIM4v5lbgidlGiven) + model->BSIM4v5lbgidl = 0.0; + if (!model->BSIM4v5lcgidlGiven) + model->BSIM4v5lcgidl = 0.0; + if (!model->BSIM4v5legidlGiven) + model->BSIM4v5legidl = 0.0; + if (!model->BSIM4v5laigcGiven) + model->BSIM4v5laigc = 0.0; + if (!model->BSIM4v5lbigcGiven) + model->BSIM4v5lbigc = 0.0; + if (!model->BSIM4v5lcigcGiven) + model->BSIM4v5lcigc = 0.0; + if (!model->BSIM4v5laigsdGiven) + model->BSIM4v5laigsd = 0.0; + if (!model->BSIM4v5lbigsdGiven) + model->BSIM4v5lbigsd = 0.0; + if (!model->BSIM4v5lcigsdGiven) + model->BSIM4v5lcigsd = 0.0; + if (!model->BSIM4v5laigbaccGiven) + model->BSIM4v5laigbacc = 0.0; + if (!model->BSIM4v5lbigbaccGiven) + model->BSIM4v5lbigbacc = 0.0; + if (!model->BSIM4v5lcigbaccGiven) + model->BSIM4v5lcigbacc = 0.0; + if (!model->BSIM4v5laigbinvGiven) + model->BSIM4v5laigbinv = 0.0; + if (!model->BSIM4v5lbigbinvGiven) + model->BSIM4v5lbigbinv = 0.0; + if (!model->BSIM4v5lcigbinvGiven) + model->BSIM4v5lcigbinv = 0.0; + if (!model->BSIM4v5lnigcGiven) + model->BSIM4v5lnigc = 0.0; + if (!model->BSIM4v5lnigbinvGiven) + model->BSIM4v5lnigbinv = 0.0; + if (!model->BSIM4v5lnigbaccGiven) + model->BSIM4v5lnigbacc = 0.0; + if (!model->BSIM4v5lntoxGiven) + model->BSIM4v5lntox = 0.0; + if (!model->BSIM4v5leigbinvGiven) + model->BSIM4v5leigbinv = 0.0; + if (!model->BSIM4v5lpigcdGiven) + model->BSIM4v5lpigcd = 0.0; + if (!model->BSIM4v5lpoxedgeGiven) + model->BSIM4v5lpoxedge = 0.0; + if (!model->BSIM4v5lxrcrg1Given) + model->BSIM4v5lxrcrg1 = 0.0; + if (!model->BSIM4v5lxrcrg2Given) + model->BSIM4v5lxrcrg2 = 0.0; + if (!model->BSIM4v5leuGiven) + model->BSIM4v5leu = 0.0; + if (!model->BSIM4v5lvfbGiven) + model->BSIM4v5lvfb = 0.0; + if (!model->BSIM4v5llambdaGiven) + model->BSIM4v5llambda = 0.0; + if (!model->BSIM4v5lvtlGiven) + model->BSIM4v5lvtl = 0.0; + if (!model->BSIM4v5lxnGiven) + model->BSIM4v5lxn = 0.0; + if (!model->BSIM4v5lvfbsdoffGiven) + model->BSIM4v5lvfbsdoff = 0.0; + if (!model->BSIM4v5ltvfbsdoffGiven) + model->BSIM4v5ltvfbsdoff = 0.0; + if (!model->BSIM4v5ltvoffGiven) + model->BSIM4v5ltvoff = 0.0; + + + if (!model->BSIM4v5lcgslGiven) + model->BSIM4v5lcgsl = 0.0; + if (!model->BSIM4v5lcgdlGiven) + model->BSIM4v5lcgdl = 0.0; + if (!model->BSIM4v5lckappasGiven) + model->BSIM4v5lckappas = 0.0; + if (!model->BSIM4v5lckappadGiven) + model->BSIM4v5lckappad = 0.0; + if (!model->BSIM4v5lclcGiven) + model->BSIM4v5lclc = 0.0; + if (!model->BSIM4v5lcleGiven) + model->BSIM4v5lcle = 0.0; + if (!model->BSIM4v5lcfGiven) + model->BSIM4v5lcf = 0.0; + if (!model->BSIM4v5lvfbcvGiven) + model->BSIM4v5lvfbcv = 0.0; + if (!model->BSIM4v5lacdeGiven) + model->BSIM4v5lacde = 0.0; + if (!model->BSIM4v5lmoinGiven) + model->BSIM4v5lmoin = 0.0; + if (!model->BSIM4v5lnoffGiven) + model->BSIM4v5lnoff = 0.0; + if (!model->BSIM4v5lvoffcvGiven) + model->BSIM4v5lvoffcv = 0.0; + + /* Width dependence */ + if (!model->BSIM4v5wcdscGiven) + model->BSIM4v5wcdsc = 0.0; + if (!model->BSIM4v5wcdscbGiven) + model->BSIM4v5wcdscb = 0.0; + if (!model->BSIM4v5wcdscdGiven) + model->BSIM4v5wcdscd = 0.0; + if (!model->BSIM4v5wcitGiven) + model->BSIM4v5wcit = 0.0; + if (!model->BSIM4v5wnfactorGiven) + model->BSIM4v5wnfactor = 0.0; + if (!model->BSIM4v5wxjGiven) + model->BSIM4v5wxj = 0.0; + if (!model->BSIM4v5wvsatGiven) + model->BSIM4v5wvsat = 0.0; + if (!model->BSIM4v5watGiven) + model->BSIM4v5wat = 0.0; + if (!model->BSIM4v5wa0Given) + model->BSIM4v5wa0 = 0.0; + if (!model->BSIM4v5wagsGiven) + model->BSIM4v5wags = 0.0; + if (!model->BSIM4v5wa1Given) + model->BSIM4v5wa1 = 0.0; + if (!model->BSIM4v5wa2Given) + model->BSIM4v5wa2 = 0.0; + if (!model->BSIM4v5wketaGiven) + model->BSIM4v5wketa = 0.0; + if (!model->BSIM4v5wnsubGiven) + model->BSIM4v5wnsub = 0.0; + if (!model->BSIM4v5wndepGiven) + model->BSIM4v5wndep = 0.0; + if (!model->BSIM4v5wnsdGiven) + model->BSIM4v5wnsd = 0.0; + if (!model->BSIM4v5wphinGiven) + model->BSIM4v5wphin = 0.0; + if (!model->BSIM4v5wngateGiven) + model->BSIM4v5wngate = 0.0; + if (!model->BSIM4v5wvbmGiven) + model->BSIM4v5wvbm = 0.0; + if (!model->BSIM4v5wxtGiven) + model->BSIM4v5wxt = 0.0; + if (!model->BSIM4v5wkt1Given) + model->BSIM4v5wkt1 = 0.0; + if (!model->BSIM4v5wkt1lGiven) + model->BSIM4v5wkt1l = 0.0; + if (!model->BSIM4v5wkt2Given) + model->BSIM4v5wkt2 = 0.0; + if (!model->BSIM4v5wk3Given) + model->BSIM4v5wk3 = 0.0; + if (!model->BSIM4v5wk3bGiven) + model->BSIM4v5wk3b = 0.0; + if (!model->BSIM4v5ww0Given) + model->BSIM4v5ww0 = 0.0; + if (!model->BSIM4v5wlpe0Given) + model->BSIM4v5wlpe0 = 0.0; + if (!model->BSIM4v5wlpebGiven) + model->BSIM4v5wlpeb = 0.0; + if (!model->BSIM4v5wdvtp0Given) + model->BSIM4v5wdvtp0 = 0.0; + if (!model->BSIM4v5wdvtp1Given) + model->BSIM4v5wdvtp1 = 0.0; + if (!model->BSIM4v5wdvt0Given) + model->BSIM4v5wdvt0 = 0.0; + if (!model->BSIM4v5wdvt1Given) + model->BSIM4v5wdvt1 = 0.0; + if (!model->BSIM4v5wdvt2Given) + model->BSIM4v5wdvt2 = 0.0; + if (!model->BSIM4v5wdvt0wGiven) + model->BSIM4v5wdvt0w = 0.0; + if (!model->BSIM4v5wdvt1wGiven) + model->BSIM4v5wdvt1w = 0.0; + if (!model->BSIM4v5wdvt2wGiven) + model->BSIM4v5wdvt2w = 0.0; + if (!model->BSIM4v5wdroutGiven) + model->BSIM4v5wdrout = 0.0; + if (!model->BSIM4v5wdsubGiven) + model->BSIM4v5wdsub = 0.0; + if (!model->BSIM4v5wvth0Given) + model->BSIM4v5wvth0 = 0.0; + if (!model->BSIM4v5wuaGiven) + model->BSIM4v5wua = 0.0; + if (!model->BSIM4v5wua1Given) + model->BSIM4v5wua1 = 0.0; + if (!model->BSIM4v5wubGiven) + model->BSIM4v5wub = 0.0; + if (!model->BSIM4v5wub1Given) + model->BSIM4v5wub1 = 0.0; + if (!model->BSIM4v5wucGiven) + model->BSIM4v5wuc = 0.0; + if (!model->BSIM4v5wuc1Given) + model->BSIM4v5wuc1 = 0.0; + if (!model->BSIM4v5wudGiven) + model->BSIM4v5wud = 0.0; + if (!model->BSIM4v5wud1Given) + model->BSIM4v5wud1 = 0.0; + if (!model->BSIM4v5wupGiven) + model->BSIM4v5wup = 0.0; + if (!model->BSIM4v5wlpGiven) + model->BSIM4v5wlp = 0.0; + if (!model->BSIM4v5wu0Given) + model->BSIM4v5wu0 = 0.0; + if (!model->BSIM4v5wuteGiven) + model->BSIM4v5wute = 0.0; + if (!model->BSIM4v5wvoffGiven) + model->BSIM4v5wvoff = 0.0; + if (!model->BSIM4v5wminvGiven) + model->BSIM4v5wminv = 0.0; + if (!model->BSIM4v5wfproutGiven) + model->BSIM4v5wfprout = 0.0; + if (!model->BSIM4v5wpditsGiven) + model->BSIM4v5wpdits = 0.0; + if (!model->BSIM4v5wpditsdGiven) + model->BSIM4v5wpditsd = 0.0; + if (!model->BSIM4v5wdeltaGiven) + model->BSIM4v5wdelta = 0.0; + if (!model->BSIM4v5wrdswGiven) + model->BSIM4v5wrdsw = 0.0; + if (!model->BSIM4v5wrdwGiven) + model->BSIM4v5wrdw = 0.0; + if (!model->BSIM4v5wrswGiven) + model->BSIM4v5wrsw = 0.0; + if (!model->BSIM4v5wprwbGiven) + model->BSIM4v5wprwb = 0.0; + if (!model->BSIM4v5wprwgGiven) + model->BSIM4v5wprwg = 0.0; + if (!model->BSIM4v5wprtGiven) + model->BSIM4v5wprt = 0.0; + if (!model->BSIM4v5weta0Given) + model->BSIM4v5weta0 = 0.0; + if (!model->BSIM4v5wetabGiven) + model->BSIM4v5wetab = 0.0; + if (!model->BSIM4v5wpclmGiven) + model->BSIM4v5wpclm = 0.0; + if (!model->BSIM4v5wpdibl1Given) + model->BSIM4v5wpdibl1 = 0.0; + if (!model->BSIM4v5wpdibl2Given) + model->BSIM4v5wpdibl2 = 0.0; + if (!model->BSIM4v5wpdiblbGiven) + model->BSIM4v5wpdiblb = 0.0; + if (!model->BSIM4v5wpscbe1Given) + model->BSIM4v5wpscbe1 = 0.0; + if (!model->BSIM4v5wpscbe2Given) + model->BSIM4v5wpscbe2 = 0.0; + if (!model->BSIM4v5wpvagGiven) + model->BSIM4v5wpvag = 0.0; + if (!model->BSIM4v5wwrGiven) + model->BSIM4v5wwr = 0.0; + if (!model->BSIM4v5wdwgGiven) + model->BSIM4v5wdwg = 0.0; + if (!model->BSIM4v5wdwbGiven) + model->BSIM4v5wdwb = 0.0; + if (!model->BSIM4v5wb0Given) + model->BSIM4v5wb0 = 0.0; + if (!model->BSIM4v5wb1Given) + model->BSIM4v5wb1 = 0.0; + if (!model->BSIM4v5walpha0Given) + model->BSIM4v5walpha0 = 0.0; + if (!model->BSIM4v5walpha1Given) + model->BSIM4v5walpha1 = 0.0; + if (!model->BSIM4v5wbeta0Given) + model->BSIM4v5wbeta0 = 0.0; + if (!model->BSIM4v5wagidlGiven) + model->BSIM4v5wagidl = 0.0; + if (!model->BSIM4v5wbgidlGiven) + model->BSIM4v5wbgidl = 0.0; + if (!model->BSIM4v5wcgidlGiven) + model->BSIM4v5wcgidl = 0.0; + if (!model->BSIM4v5wegidlGiven) + model->BSIM4v5wegidl = 0.0; + if (!model->BSIM4v5waigcGiven) + model->BSIM4v5waigc = 0.0; + if (!model->BSIM4v5wbigcGiven) + model->BSIM4v5wbigc = 0.0; + if (!model->BSIM4v5wcigcGiven) + model->BSIM4v5wcigc = 0.0; + if (!model->BSIM4v5waigsdGiven) + model->BSIM4v5waigsd = 0.0; + if (!model->BSIM4v5wbigsdGiven) + model->BSIM4v5wbigsd = 0.0; + if (!model->BSIM4v5wcigsdGiven) + model->BSIM4v5wcigsd = 0.0; + if (!model->BSIM4v5waigbaccGiven) + model->BSIM4v5waigbacc = 0.0; + if (!model->BSIM4v5wbigbaccGiven) + model->BSIM4v5wbigbacc = 0.0; + if (!model->BSIM4v5wcigbaccGiven) + model->BSIM4v5wcigbacc = 0.0; + if (!model->BSIM4v5waigbinvGiven) + model->BSIM4v5waigbinv = 0.0; + if (!model->BSIM4v5wbigbinvGiven) + model->BSIM4v5wbigbinv = 0.0; + if (!model->BSIM4v5wcigbinvGiven) + model->BSIM4v5wcigbinv = 0.0; + if (!model->BSIM4v5wnigcGiven) + model->BSIM4v5wnigc = 0.0; + if (!model->BSIM4v5wnigbinvGiven) + model->BSIM4v5wnigbinv = 0.0; + if (!model->BSIM4v5wnigbaccGiven) + model->BSIM4v5wnigbacc = 0.0; + if (!model->BSIM4v5wntoxGiven) + model->BSIM4v5wntox = 0.0; + if (!model->BSIM4v5weigbinvGiven) + model->BSIM4v5weigbinv = 0.0; + if (!model->BSIM4v5wpigcdGiven) + model->BSIM4v5wpigcd = 0.0; + if (!model->BSIM4v5wpoxedgeGiven) + model->BSIM4v5wpoxedge = 0.0; + if (!model->BSIM4v5wxrcrg1Given) + model->BSIM4v5wxrcrg1 = 0.0; + if (!model->BSIM4v5wxrcrg2Given) + model->BSIM4v5wxrcrg2 = 0.0; + if (!model->BSIM4v5weuGiven) + model->BSIM4v5weu = 0.0; + if (!model->BSIM4v5wvfbGiven) + model->BSIM4v5wvfb = 0.0; + if (!model->BSIM4v5wlambdaGiven) + model->BSIM4v5wlambda = 0.0; + if (!model->BSIM4v5wvtlGiven) + model->BSIM4v5wvtl = 0.0; + if (!model->BSIM4v5wxnGiven) + model->BSIM4v5wxn = 0.0; + if (!model->BSIM4v5wvfbsdoffGiven) + model->BSIM4v5wvfbsdoff = 0.0; + if (!model->BSIM4v5wtvfbsdoffGiven) + model->BSIM4v5wtvfbsdoff = 0.0; + if (!model->BSIM4v5wtvoffGiven) + model->BSIM4v5wtvoff = 0.0; + + if (!model->BSIM4v5wcgslGiven) + model->BSIM4v5wcgsl = 0.0; + if (!model->BSIM4v5wcgdlGiven) + model->BSIM4v5wcgdl = 0.0; + if (!model->BSIM4v5wckappasGiven) + model->BSIM4v5wckappas = 0.0; + if (!model->BSIM4v5wckappadGiven) + model->BSIM4v5wckappad = 0.0; + if (!model->BSIM4v5wcfGiven) + model->BSIM4v5wcf = 0.0; + if (!model->BSIM4v5wclcGiven) + model->BSIM4v5wclc = 0.0; + if (!model->BSIM4v5wcleGiven) + model->BSIM4v5wcle = 0.0; + if (!model->BSIM4v5wvfbcvGiven) + model->BSIM4v5wvfbcv = 0.0; + if (!model->BSIM4v5wacdeGiven) + model->BSIM4v5wacde = 0.0; + if (!model->BSIM4v5wmoinGiven) + model->BSIM4v5wmoin = 0.0; + if (!model->BSIM4v5wnoffGiven) + model->BSIM4v5wnoff = 0.0; + if (!model->BSIM4v5wvoffcvGiven) + model->BSIM4v5wvoffcv = 0.0; + + /* Cross-term dependence */ + if (!model->BSIM4v5pcdscGiven) + model->BSIM4v5pcdsc = 0.0; + if (!model->BSIM4v5pcdscbGiven) + model->BSIM4v5pcdscb = 0.0; + if (!model->BSIM4v5pcdscdGiven) + model->BSIM4v5pcdscd = 0.0; + if (!model->BSIM4v5pcitGiven) + model->BSIM4v5pcit = 0.0; + if (!model->BSIM4v5pnfactorGiven) + model->BSIM4v5pnfactor = 0.0; + if (!model->BSIM4v5pxjGiven) + model->BSIM4v5pxj = 0.0; + if (!model->BSIM4v5pvsatGiven) + model->BSIM4v5pvsat = 0.0; + if (!model->BSIM4v5patGiven) + model->BSIM4v5pat = 0.0; + if (!model->BSIM4v5pa0Given) + model->BSIM4v5pa0 = 0.0; + + if (!model->BSIM4v5pagsGiven) + model->BSIM4v5pags = 0.0; + if (!model->BSIM4v5pa1Given) + model->BSIM4v5pa1 = 0.0; + if (!model->BSIM4v5pa2Given) + model->BSIM4v5pa2 = 0.0; + if (!model->BSIM4v5pketaGiven) + model->BSIM4v5pketa = 0.0; + if (!model->BSIM4v5pnsubGiven) + model->BSIM4v5pnsub = 0.0; + if (!model->BSIM4v5pndepGiven) + model->BSIM4v5pndep = 0.0; + if (!model->BSIM4v5pnsdGiven) + model->BSIM4v5pnsd = 0.0; + if (!model->BSIM4v5pphinGiven) + model->BSIM4v5pphin = 0.0; + if (!model->BSIM4v5pngateGiven) + model->BSIM4v5pngate = 0.0; + if (!model->BSIM4v5pvbmGiven) + model->BSIM4v5pvbm = 0.0; + if (!model->BSIM4v5pxtGiven) + model->BSIM4v5pxt = 0.0; + if (!model->BSIM4v5pkt1Given) + model->BSIM4v5pkt1 = 0.0; + if (!model->BSIM4v5pkt1lGiven) + model->BSIM4v5pkt1l = 0.0; + if (!model->BSIM4v5pkt2Given) + model->BSIM4v5pkt2 = 0.0; + if (!model->BSIM4v5pk3Given) + model->BSIM4v5pk3 = 0.0; + if (!model->BSIM4v5pk3bGiven) + model->BSIM4v5pk3b = 0.0; + if (!model->BSIM4v5pw0Given) + model->BSIM4v5pw0 = 0.0; + if (!model->BSIM4v5plpe0Given) + model->BSIM4v5plpe0 = 0.0; + if (!model->BSIM4v5plpebGiven) + model->BSIM4v5plpeb = 0.0; + if (!model->BSIM4v5pdvtp0Given) + model->BSIM4v5pdvtp0 = 0.0; + if (!model->BSIM4v5pdvtp1Given) + model->BSIM4v5pdvtp1 = 0.0; + if (!model->BSIM4v5pdvt0Given) + model->BSIM4v5pdvt0 = 0.0; + if (!model->BSIM4v5pdvt1Given) + model->BSIM4v5pdvt1 = 0.0; + if (!model->BSIM4v5pdvt2Given) + model->BSIM4v5pdvt2 = 0.0; + if (!model->BSIM4v5pdvt0wGiven) + model->BSIM4v5pdvt0w = 0.0; + if (!model->BSIM4v5pdvt1wGiven) + model->BSIM4v5pdvt1w = 0.0; + if (!model->BSIM4v5pdvt2wGiven) + model->BSIM4v5pdvt2w = 0.0; + if (!model->BSIM4v5pdroutGiven) + model->BSIM4v5pdrout = 0.0; + if (!model->BSIM4v5pdsubGiven) + model->BSIM4v5pdsub = 0.0; + if (!model->BSIM4v5pvth0Given) + model->BSIM4v5pvth0 = 0.0; + if (!model->BSIM4v5puaGiven) + model->BSIM4v5pua = 0.0; + if (!model->BSIM4v5pua1Given) + model->BSIM4v5pua1 = 0.0; + if (!model->BSIM4v5pubGiven) + model->BSIM4v5pub = 0.0; + if (!model->BSIM4v5pub1Given) + model->BSIM4v5pub1 = 0.0; + if (!model->BSIM4v5pucGiven) + model->BSIM4v5puc = 0.0; + if (!model->BSIM4v5puc1Given) + model->BSIM4v5puc1 = 0.0; + if (!model->BSIM4v5pudGiven) + model->BSIM4v5pud = 0.0; + if (!model->BSIM4v5pud1Given) + model->BSIM4v5pud1 = 0.0; + if (!model->BSIM4v5pupGiven) + model->BSIM4v5pup = 0.0; + if (!model->BSIM4v5plpGiven) + model->BSIM4v5plp = 0.0; + if (!model->BSIM4v5pu0Given) + model->BSIM4v5pu0 = 0.0; + if (!model->BSIM4v5puteGiven) + model->BSIM4v5pute = 0.0; + if (!model->BSIM4v5pvoffGiven) + model->BSIM4v5pvoff = 0.0; + if (!model->BSIM4v5pminvGiven) + model->BSIM4v5pminv = 0.0; + if (!model->BSIM4v5pfproutGiven) + model->BSIM4v5pfprout = 0.0; + if (!model->BSIM4v5ppditsGiven) + model->BSIM4v5ppdits = 0.0; + if (!model->BSIM4v5ppditsdGiven) + model->BSIM4v5ppditsd = 0.0; + if (!model->BSIM4v5pdeltaGiven) + model->BSIM4v5pdelta = 0.0; + if (!model->BSIM4v5prdswGiven) + model->BSIM4v5prdsw = 0.0; + if (!model->BSIM4v5prdwGiven) + model->BSIM4v5prdw = 0.0; + if (!model->BSIM4v5prswGiven) + model->BSIM4v5prsw = 0.0; + if (!model->BSIM4v5pprwbGiven) + model->BSIM4v5pprwb = 0.0; + if (!model->BSIM4v5pprwgGiven) + model->BSIM4v5pprwg = 0.0; + if (!model->BSIM4v5pprtGiven) + model->BSIM4v5pprt = 0.0; + if (!model->BSIM4v5peta0Given) + model->BSIM4v5peta0 = 0.0; + if (!model->BSIM4v5petabGiven) + model->BSIM4v5petab = 0.0; + if (!model->BSIM4v5ppclmGiven) + model->BSIM4v5ppclm = 0.0; + if (!model->BSIM4v5ppdibl1Given) + model->BSIM4v5ppdibl1 = 0.0; + if (!model->BSIM4v5ppdibl2Given) + model->BSIM4v5ppdibl2 = 0.0; + if (!model->BSIM4v5ppdiblbGiven) + model->BSIM4v5ppdiblb = 0.0; + if (!model->BSIM4v5ppscbe1Given) + model->BSIM4v5ppscbe1 = 0.0; + if (!model->BSIM4v5ppscbe2Given) + model->BSIM4v5ppscbe2 = 0.0; + if (!model->BSIM4v5ppvagGiven) + model->BSIM4v5ppvag = 0.0; + if (!model->BSIM4v5pwrGiven) + model->BSIM4v5pwr = 0.0; + if (!model->BSIM4v5pdwgGiven) + model->BSIM4v5pdwg = 0.0; + if (!model->BSIM4v5pdwbGiven) + model->BSIM4v5pdwb = 0.0; + if (!model->BSIM4v5pb0Given) + model->BSIM4v5pb0 = 0.0; + if (!model->BSIM4v5pb1Given) + model->BSIM4v5pb1 = 0.0; + if (!model->BSIM4v5palpha0Given) + model->BSIM4v5palpha0 = 0.0; + if (!model->BSIM4v5palpha1Given) + model->BSIM4v5palpha1 = 0.0; + if (!model->BSIM4v5pbeta0Given) + model->BSIM4v5pbeta0 = 0.0; + if (!model->BSIM4v5pagidlGiven) + model->BSIM4v5pagidl = 0.0; + if (!model->BSIM4v5pbgidlGiven) + model->BSIM4v5pbgidl = 0.0; + if (!model->BSIM4v5pcgidlGiven) + model->BSIM4v5pcgidl = 0.0; + if (!model->BSIM4v5pegidlGiven) + model->BSIM4v5pegidl = 0.0; + if (!model->BSIM4v5paigcGiven) + model->BSIM4v5paigc = 0.0; + if (!model->BSIM4v5pbigcGiven) + model->BSIM4v5pbigc = 0.0; + if (!model->BSIM4v5pcigcGiven) + model->BSIM4v5pcigc = 0.0; + if (!model->BSIM4v5paigsdGiven) + model->BSIM4v5paigsd = 0.0; + if (!model->BSIM4v5pbigsdGiven) + model->BSIM4v5pbigsd = 0.0; + if (!model->BSIM4v5pcigsdGiven) + model->BSIM4v5pcigsd = 0.0; + if (!model->BSIM4v5paigbaccGiven) + model->BSIM4v5paigbacc = 0.0; + if (!model->BSIM4v5pbigbaccGiven) + model->BSIM4v5pbigbacc = 0.0; + if (!model->BSIM4v5pcigbaccGiven) + model->BSIM4v5pcigbacc = 0.0; + if (!model->BSIM4v5paigbinvGiven) + model->BSIM4v5paigbinv = 0.0; + if (!model->BSIM4v5pbigbinvGiven) + model->BSIM4v5pbigbinv = 0.0; + if (!model->BSIM4v5pcigbinvGiven) + model->BSIM4v5pcigbinv = 0.0; + if (!model->BSIM4v5pnigcGiven) + model->BSIM4v5pnigc = 0.0; + if (!model->BSIM4v5pnigbinvGiven) + model->BSIM4v5pnigbinv = 0.0; + if (!model->BSIM4v5pnigbaccGiven) + model->BSIM4v5pnigbacc = 0.0; + if (!model->BSIM4v5pntoxGiven) + model->BSIM4v5pntox = 0.0; + if (!model->BSIM4v5peigbinvGiven) + model->BSIM4v5peigbinv = 0.0; + if (!model->BSIM4v5ppigcdGiven) + model->BSIM4v5ppigcd = 0.0; + if (!model->BSIM4v5ppoxedgeGiven) + model->BSIM4v5ppoxedge = 0.0; + if (!model->BSIM4v5pxrcrg1Given) + model->BSIM4v5pxrcrg1 = 0.0; + if (!model->BSIM4v5pxrcrg2Given) + model->BSIM4v5pxrcrg2 = 0.0; + if (!model->BSIM4v5peuGiven) + model->BSIM4v5peu = 0.0; + if (!model->BSIM4v5pvfbGiven) + model->BSIM4v5pvfb = 0.0; + if (!model->BSIM4v5plambdaGiven) + model->BSIM4v5plambda = 0.0; + if (!model->BSIM4v5pvtlGiven) + model->BSIM4v5pvtl = 0.0; + if (!model->BSIM4v5pxnGiven) + model->BSIM4v5pxn = 0.0; + if (!model->BSIM4v5pvfbsdoffGiven) + model->BSIM4v5pvfbsdoff = 0.0; + if (!model->BSIM4v5ptvfbsdoffGiven) + model->BSIM4v5ptvfbsdoff = 0.0; + if (!model->BSIM4v5ptvoffGiven) + model->BSIM4v5ptvoff = 0.0; + + if (!model->BSIM4v5pcgslGiven) + model->BSIM4v5pcgsl = 0.0; + if (!model->BSIM4v5pcgdlGiven) + model->BSIM4v5pcgdl = 0.0; + if (!model->BSIM4v5pckappasGiven) + model->BSIM4v5pckappas = 0.0; + if (!model->BSIM4v5pckappadGiven) + model->BSIM4v5pckappad = 0.0; + if (!model->BSIM4v5pcfGiven) + model->BSIM4v5pcf = 0.0; + if (!model->BSIM4v5pclcGiven) + model->BSIM4v5pclc = 0.0; + if (!model->BSIM4v5pcleGiven) + model->BSIM4v5pcle = 0.0; + if (!model->BSIM4v5pvfbcvGiven) + model->BSIM4v5pvfbcv = 0.0; + if (!model->BSIM4v5pacdeGiven) + model->BSIM4v5pacde = 0.0; + if (!model->BSIM4v5pmoinGiven) + model->BSIM4v5pmoin = 0.0; + if (!model->BSIM4v5pnoffGiven) + model->BSIM4v5pnoff = 0.0; + if (!model->BSIM4v5pvoffcvGiven) + model->BSIM4v5pvoffcv = 0.0; + + if (!model->BSIM4v5gamma1Given) + model->BSIM4v5gamma1 = 0.0; + if (!model->BSIM4v5lgamma1Given) + model->BSIM4v5lgamma1 = 0.0; + if (!model->BSIM4v5wgamma1Given) + model->BSIM4v5wgamma1 = 0.0; + if (!model->BSIM4v5pgamma1Given) + model->BSIM4v5pgamma1 = 0.0; + if (!model->BSIM4v5gamma2Given) + model->BSIM4v5gamma2 = 0.0; + if (!model->BSIM4v5lgamma2Given) + model->BSIM4v5lgamma2 = 0.0; + if (!model->BSIM4v5wgamma2Given) + model->BSIM4v5wgamma2 = 0.0; + if (!model->BSIM4v5pgamma2Given) + model->BSIM4v5pgamma2 = 0.0; + if (!model->BSIM4v5vbxGiven) + model->BSIM4v5vbx = 0.0; + if (!model->BSIM4v5lvbxGiven) + model->BSIM4v5lvbx = 0.0; + if (!model->BSIM4v5wvbxGiven) + model->BSIM4v5wvbx = 0.0; + if (!model->BSIM4v5pvbxGiven) + model->BSIM4v5pvbx = 0.0; + + /* unit degree celcius */ + if (!model->BSIM4v5tnomGiven) + model->BSIM4v5tnom = ckt->CKTnomTemp; + if (!model->BSIM4v5LintGiven) + model->BSIM4v5Lint = 0.0; + if (!model->BSIM4v5LlGiven) + model->BSIM4v5Ll = 0.0; + if (!model->BSIM4v5LlcGiven) + model->BSIM4v5Llc = model->BSIM4v5Ll; + if (!model->BSIM4v5LlnGiven) + model->BSIM4v5Lln = 1.0; + if (!model->BSIM4v5LwGiven) + model->BSIM4v5Lw = 0.0; + if (!model->BSIM4v5LwcGiven) + model->BSIM4v5Lwc = model->BSIM4v5Lw; + if (!model->BSIM4v5LwnGiven) + model->BSIM4v5Lwn = 1.0; + if (!model->BSIM4v5LwlGiven) + model->BSIM4v5Lwl = 0.0; + if (!model->BSIM4v5LwlcGiven) + model->BSIM4v5Lwlc = model->BSIM4v5Lwl; + if (!model->BSIM4v5LminGiven) + model->BSIM4v5Lmin = 0.0; + if (!model->BSIM4v5LmaxGiven) + model->BSIM4v5Lmax = 1.0; + if (!model->BSIM4v5WintGiven) + model->BSIM4v5Wint = 0.0; + if (!model->BSIM4v5WlGiven) + model->BSIM4v5Wl = 0.0; + if (!model->BSIM4v5WlcGiven) + model->BSIM4v5Wlc = model->BSIM4v5Wl; + if (!model->BSIM4v5WlnGiven) + model->BSIM4v5Wln = 1.0; + if (!model->BSIM4v5WwGiven) + model->BSIM4v5Ww = 0.0; + if (!model->BSIM4v5WwcGiven) + model->BSIM4v5Wwc = model->BSIM4v5Ww; + if (!model->BSIM4v5WwnGiven) + model->BSIM4v5Wwn = 1.0; + if (!model->BSIM4v5WwlGiven) + model->BSIM4v5Wwl = 0.0; + if (!model->BSIM4v5WwlcGiven) + model->BSIM4v5Wwlc = model->BSIM4v5Wwl; + if (!model->BSIM4v5WminGiven) + model->BSIM4v5Wmin = 0.0; + if (!model->BSIM4v5WmaxGiven) + model->BSIM4v5Wmax = 1.0; + if (!model->BSIM4v5dwcGiven) + model->BSIM4v5dwc = model->BSIM4v5Wint; + if (!model->BSIM4v5dlcGiven) + model->BSIM4v5dlc = model->BSIM4v5Lint; + if (!model->BSIM4v5xlGiven) + model->BSIM4v5xl = 0.0; + if (!model->BSIM4v5xwGiven) + model->BSIM4v5xw = 0.0; + if (!model->BSIM4v5dlcigGiven) + model->BSIM4v5dlcig = model->BSIM4v5Lint; + if (!model->BSIM4v5dwjGiven) + model->BSIM4v5dwj = model->BSIM4v5dwc; + if (!model->BSIM4v5cfGiven) + model->BSIM4v5cf = 2.0 * model->BSIM4v5epsrox * EPS0 / PI + * log(1.0 + 0.4e-6 / model->BSIM4v5toxe); + + if (!model->BSIM4v5xpartGiven) + model->BSIM4v5xpart = 0.0; + if (!model->BSIM4v5sheetResistanceGiven) + model->BSIM4v5sheetResistance = 0.0; + + if (!model->BSIM4v5SunitAreaJctCapGiven) + model->BSIM4v5SunitAreaJctCap = 5.0E-4; + if (!model->BSIM4v5DunitAreaJctCapGiven) + model->BSIM4v5DunitAreaJctCap = model->BSIM4v5SunitAreaJctCap; + if (!model->BSIM4v5SunitLengthSidewallJctCapGiven) + model->BSIM4v5SunitLengthSidewallJctCap = 5.0E-10; + if (!model->BSIM4v5DunitLengthSidewallJctCapGiven) + model->BSIM4v5DunitLengthSidewallJctCap = model->BSIM4v5SunitLengthSidewallJctCap; + if (!model->BSIM4v5SunitLengthGateSidewallJctCapGiven) + model->BSIM4v5SunitLengthGateSidewallJctCap = model->BSIM4v5SunitLengthSidewallJctCap ; + if (!model->BSIM4v5DunitLengthGateSidewallJctCapGiven) + model->BSIM4v5DunitLengthGateSidewallJctCap = model->BSIM4v5SunitLengthGateSidewallJctCap; + if (!model->BSIM4v5SjctSatCurDensityGiven) + model->BSIM4v5SjctSatCurDensity = 1.0E-4; + if (!model->BSIM4v5DjctSatCurDensityGiven) + model->BSIM4v5DjctSatCurDensity = model->BSIM4v5SjctSatCurDensity; + if (!model->BSIM4v5SjctSidewallSatCurDensityGiven) + model->BSIM4v5SjctSidewallSatCurDensity = 0.0; + if (!model->BSIM4v5DjctSidewallSatCurDensityGiven) + model->BSIM4v5DjctSidewallSatCurDensity = model->BSIM4v5SjctSidewallSatCurDensity; + if (!model->BSIM4v5SjctGateSidewallSatCurDensityGiven) + model->BSIM4v5SjctGateSidewallSatCurDensity = 0.0; + if (!model->BSIM4v5DjctGateSidewallSatCurDensityGiven) + model->BSIM4v5DjctGateSidewallSatCurDensity = model->BSIM4v5SjctGateSidewallSatCurDensity; + if (!model->BSIM4v5SbulkJctPotentialGiven) + model->BSIM4v5SbulkJctPotential = 1.0; + if (!model->BSIM4v5DbulkJctPotentialGiven) + model->BSIM4v5DbulkJctPotential = model->BSIM4v5SbulkJctPotential; + if (!model->BSIM4v5SsidewallJctPotentialGiven) + model->BSIM4v5SsidewallJctPotential = 1.0; + if (!model->BSIM4v5DsidewallJctPotentialGiven) + model->BSIM4v5DsidewallJctPotential = model->BSIM4v5SsidewallJctPotential; + if (!model->BSIM4v5SGatesidewallJctPotentialGiven) + model->BSIM4v5SGatesidewallJctPotential = model->BSIM4v5SsidewallJctPotential; + if (!model->BSIM4v5DGatesidewallJctPotentialGiven) + model->BSIM4v5DGatesidewallJctPotential = model->BSIM4v5SGatesidewallJctPotential; + if (!model->BSIM4v5SbulkJctBotGradingCoeffGiven) + model->BSIM4v5SbulkJctBotGradingCoeff = 0.5; + if (!model->BSIM4v5DbulkJctBotGradingCoeffGiven) + model->BSIM4v5DbulkJctBotGradingCoeff = model->BSIM4v5SbulkJctBotGradingCoeff; + if (!model->BSIM4v5SbulkJctSideGradingCoeffGiven) + model->BSIM4v5SbulkJctSideGradingCoeff = 0.33; + if (!model->BSIM4v5DbulkJctSideGradingCoeffGiven) + model->BSIM4v5DbulkJctSideGradingCoeff = model->BSIM4v5SbulkJctSideGradingCoeff; + if (!model->BSIM4v5SbulkJctGateSideGradingCoeffGiven) + model->BSIM4v5SbulkJctGateSideGradingCoeff = model->BSIM4v5SbulkJctSideGradingCoeff; + if (!model->BSIM4v5DbulkJctGateSideGradingCoeffGiven) + model->BSIM4v5DbulkJctGateSideGradingCoeff = model->BSIM4v5SbulkJctGateSideGradingCoeff; + if (!model->BSIM4v5SjctEmissionCoeffGiven) + model->BSIM4v5SjctEmissionCoeff = 1.0; + if (!model->BSIM4v5DjctEmissionCoeffGiven) + model->BSIM4v5DjctEmissionCoeff = model->BSIM4v5SjctEmissionCoeff; + if (!model->BSIM4v5SjctTempExponentGiven) + model->BSIM4v5SjctTempExponent = 3.0; + if (!model->BSIM4v5DjctTempExponentGiven) + model->BSIM4v5DjctTempExponent = model->BSIM4v5SjctTempExponent; + + if (!model->BSIM4v5jtssGiven) + model->BSIM4v5jtss = 0.0; + if (!model->BSIM4v5jtsdGiven) + model->BSIM4v5jtsd = model->BSIM4v5jtss; + if (!model->BSIM4v5jtsswsGiven) + model->BSIM4v5jtssws = 0.0; + if (!model->BSIM4v5jtsswdGiven) + model->BSIM4v5jtsswd = model->BSIM4v5jtssws; + if (!model->BSIM4v5jtsswgsGiven) + model->BSIM4v5jtsswgs = 0.0; + if (!model->BSIM4v5jtsswgdGiven) + model->BSIM4v5jtsswgd = model->BSIM4v5jtsswgs; + if (!model->BSIM4v5njtsGiven) + model->BSIM4v5njts = 20.0; + if (!model->BSIM4v5njtsswGiven) + model->BSIM4v5njtssw = 20.0; + if (!model->BSIM4v5njtsswgGiven) + model->BSIM4v5njtsswg = 20.0; + if (!model->BSIM4v5xtssGiven) + model->BSIM4v5xtss = 0.02; + if (!model->BSIM4v5xtsdGiven) + model->BSIM4v5xtsd = model->BSIM4v5xtss; + if (!model->BSIM4v5xtsswsGiven) + model->BSIM4v5xtssws = 0.02; + if (!model->BSIM4v5xtsswdGiven) + model->BSIM4v5xtsswd = model->BSIM4v5xtssws; + if (!model->BSIM4v5xtsswgsGiven) + model->BSIM4v5xtsswgs = 0.02; + if (!model->BSIM4v5xtsswgdGiven) + model->BSIM4v5xtsswgd = model->BSIM4v5xtsswgs; + if (!model->BSIM4v5tnjtsGiven) + model->BSIM4v5tnjts = 0.0; + if (!model->BSIM4v5tnjtsswGiven) + model->BSIM4v5tnjtssw = 0.0; + if (!model->BSIM4v5tnjtsswgGiven) + model->BSIM4v5tnjtsswg = 0.0; + if (!model->BSIM4v5vtssGiven) + model->BSIM4v5vtss = 10.0; + if (!model->BSIM4v5vtsdGiven) + model->BSIM4v5vtsd = model->BSIM4v5vtss; + if (!model->BSIM4v5vtsswsGiven) + model->BSIM4v5vtssws = 10.0; + if (!model->BSIM4v5vtsswdGiven) + model->BSIM4v5vtsswd = model->BSIM4v5vtssws; + if (!model->BSIM4v5vtsswgsGiven) + model->BSIM4v5vtsswgs = 10.0; + if (!model->BSIM4v5vtsswgdGiven) + model->BSIM4v5vtsswgd = model->BSIM4v5vtsswgs; + + if (!model->BSIM4v5oxideTrapDensityAGiven) + { if (model->BSIM4v5type == NMOS) + model->BSIM4v5oxideTrapDensityA = 6.25e41; + else + model->BSIM4v5oxideTrapDensityA= 6.188e40; + } + if (!model->BSIM4v5oxideTrapDensityBGiven) + { if (model->BSIM4v5type == NMOS) + model->BSIM4v5oxideTrapDensityB = 3.125e26; + else + model->BSIM4v5oxideTrapDensityB = 1.5e25; + } + if (!model->BSIM4v5oxideTrapDensityCGiven) + model->BSIM4v5oxideTrapDensityC = 8.75e9; + if (!model->BSIM4v5emGiven) + model->BSIM4v5em = 4.1e7; /* V/m */ + if (!model->BSIM4v5efGiven) + model->BSIM4v5ef = 1.0; + if (!model->BSIM4v5afGiven) + model->BSIM4v5af = 1.0; + if (!model->BSIM4v5kfGiven) + model->BSIM4v5kf = 0.0; + if (!model->BSIM4v5stimodGiven) + model->BSIM4v5stimod = 0.0; + if (!model->BSIM4v5rgeomodGiven) + model->BSIM4v5rgeomod = 0; + if (!model->BSIM4v5sa0Given) + model->BSIM4v5sa0 = 0.0; + if (!model->BSIM4v5sb0Given) + model->BSIM4v5sb0 = 0.0; + + /* stress effect */ + if (!model->BSIM4v5sarefGiven) + model->BSIM4v5saref = 1e-6; /* m */ + if (!model->BSIM4v5sbrefGiven) + model->BSIM4v5sbref = 1e-6; /* m */ + if (!model->BSIM4v5wlodGiven) + model->BSIM4v5wlod = 0; /* m */ + if (!model->BSIM4v5ku0Given) + model->BSIM4v5ku0 = 0; /* 1/m */ + if (!model->BSIM4v5kvsatGiven) + model->BSIM4v5kvsat = 0; + if (!model->BSIM4v5kvth0Given) /* m */ + model->BSIM4v5kvth0 = 0; + if (!model->BSIM4v5tku0Given) + model->BSIM4v5tku0 = 0; + if (!model->BSIM4v5llodku0Given) + model->BSIM4v5llodku0 = 0; + if (!model->BSIM4v5wlodku0Given) + model->BSIM4v5wlodku0 = 0; + if (!model->BSIM4v5llodvthGiven) + model->BSIM4v5llodvth = 0; + if (!model->BSIM4v5wlodvthGiven) + model->BSIM4v5wlodvth = 0; + if (!model->BSIM4v5lku0Given) + model->BSIM4v5lku0 = 0; + if (!model->BSIM4v5wku0Given) + model->BSIM4v5wku0 = 0; + if (!model->BSIM4v5pku0Given) + model->BSIM4v5pku0 = 0; + if (!model->BSIM4v5lkvth0Given) + model->BSIM4v5lkvth0 = 0; + if (!model->BSIM4v5wkvth0Given) + model->BSIM4v5wkvth0 = 0; + if (!model->BSIM4v5pkvth0Given) + model->BSIM4v5pkvth0 = 0; + if (!model->BSIM4v5stk2Given) + model->BSIM4v5stk2 = 0; + if (!model->BSIM4v5lodk2Given) + model->BSIM4v5lodk2 = 1.0; + if (!model->BSIM4v5steta0Given) + model->BSIM4v5steta0 = 0; + if (!model->BSIM4v5lodeta0Given) + model->BSIM4v5lodeta0 = 1.0; + + /* Well Proximity Effect */ + if (!model->BSIM4v5webGiven) + model->BSIM4v5web = 0.0; + if (!model->BSIM4v5wecGiven) + model->BSIM4v5wec = 0.0; + if (!model->BSIM4v5kvth0weGiven) + model->BSIM4v5kvth0we = 0.0; + if (!model->BSIM4v5k2weGiven) + model->BSIM4v5k2we = 0.0; + if (!model->BSIM4v5ku0weGiven) + model->BSIM4v5ku0we = 0.0; + if (!model->BSIM4v5screfGiven) + model->BSIM4v5scref = 1.0E-6; /* m */ + if (!model->BSIM4v5wpemodGiven) + model->BSIM4v5wpemod = 0; + else if ((model->BSIM4v5wpemod != 0) && (model->BSIM4v5wpemod != 1)) + { model->BSIM4v5wpemod = 0; + printf("Warning: wpemod has been set to its default value: 0.\n"); + } + if (!model->BSIM4v5lkvth0weGiven) + model->BSIM4v5lkvth0we = 0; + if (!model->BSIM4v5lk2weGiven) + model->BSIM4v5lk2we = 0; + if (!model->BSIM4v5lku0weGiven) + model->BSIM4v5lku0we = 0; + if (!model->BSIM4v5wkvth0weGiven) + model->BSIM4v5wkvth0we = 0; + if (!model->BSIM4v5wk2weGiven) + model->BSIM4v5wk2we = 0; + if (!model->BSIM4v5wku0weGiven) + model->BSIM4v5wku0we = 0; + if (!model->BSIM4v5pkvth0weGiven) + model->BSIM4v5pkvth0we = 0; + if (!model->BSIM4v5pk2weGiven) + model->BSIM4v5pk2we = 0; + if (!model->BSIM4v5pku0weGiven) + model->BSIM4v5pku0we = 0; + + DMCGeff = model->BSIM4v5dmcg - model->BSIM4v5dmcgt; + DMCIeff = model->BSIM4v5dmci; + DMDGeff = model->BSIM4v5dmdg - model->BSIM4v5dmcgt; + + /* + * End processing models and begin to loop + * through all the instances of the model + */ + + for (here = model->BSIM4v5instances; here != NULL ; + here=here->BSIM4v5nextInstance) + { + if (here->BSIM4v5owner == ARCHme) { + /* allocate a chunk of the state vector */ + here->BSIM4v5states = *states; + *states += BSIM4v5numStates; + } + /* perform the parameter defaulting */ + if (!here->BSIM4v5lGiven) + here->BSIM4v5l = 5.0e-6; + if (!here->BSIM4v5wGiven) + here->BSIM4v5w = 5.0e-6; + if (!here->BSIM4v5mGiven) + here->BSIM4v5m = 1.0; + if (!here->BSIM4v5nfGiven) + here->BSIM4v5nf = 1.0; + if (!here->BSIM4v5minGiven) + here->BSIM4v5min = 0; /* integer */ + if (!here->BSIM4v5icVDSGiven) + here->BSIM4v5icVDS = 0.0; + if (!here->BSIM4v5icVGSGiven) + here->BSIM4v5icVGS = 0.0; + if (!here->BSIM4v5icVBSGiven) + here->BSIM4v5icVBS = 0.0; + if (!here->BSIM4v5drainAreaGiven) + here->BSIM4v5drainArea = 0.0; + if (!here->BSIM4v5drainPerimeterGiven) + here->BSIM4v5drainPerimeter = 0.0; + if (!here->BSIM4v5drainSquaresGiven) + here->BSIM4v5drainSquares = 1.0; + if (!here->BSIM4v5sourceAreaGiven) + here->BSIM4v5sourceArea = 0.0; + if (!here->BSIM4v5sourcePerimeterGiven) + here->BSIM4v5sourcePerimeter = 0.0; + if (!here->BSIM4v5sourceSquaresGiven) + here->BSIM4v5sourceSquares = 1.0; + + if (!here->BSIM4v5saGiven) + here->BSIM4v5sa = 0.0; + if (!here->BSIM4v5sbGiven) + here->BSIM4v5sb = 0.0; + if (!here->BSIM4v5sdGiven) + here->BSIM4v5sd = 0.0; + + if (!here->BSIM4v5rbdbGiven) + here->BSIM4v5rbdb = model->BSIM4v5rbdb; /* in ohm */ + if (!here->BSIM4v5rbsbGiven) + here->BSIM4v5rbsb = model->BSIM4v5rbsb; + if (!here->BSIM4v5rbpbGiven) + here->BSIM4v5rbpb = model->BSIM4v5rbpb; + if (!here->BSIM4v5rbpsGiven) + here->BSIM4v5rbps = model->BSIM4v5rbps; + if (!here->BSIM4v5rbpdGiven) + here->BSIM4v5rbpd = model->BSIM4v5rbpd; + if (!here->BSIM4v5delvtoGiven) + here->BSIM4v5delvto = 0.0; + if (!here->BSIM4v5xgwGiven) + here->BSIM4v5xgw = model->BSIM4v5xgw; + if (!here->BSIM4v5ngconGiven) + here->BSIM4v5ngcon = model->BSIM4v5ngcon; + + + /* Process instance model selectors, some + * may override their global counterparts + */ + if (!here->BSIM4v5rbodyModGiven) + here->BSIM4v5rbodyMod = model->BSIM4v5rbodyMod; + else if ((here->BSIM4v5rbodyMod != 0) && (here->BSIM4v5rbodyMod != 1) && (here->BSIM4v5rbodyMod != 2)) + { here->BSIM4v5rbodyMod = model->BSIM4v5rbodyMod; + printf("Warning: rbodyMod has been set to its global value %d.\n", + model->BSIM4v5rbodyMod); + } + + if (!here->BSIM4v5rgateModGiven) + here->BSIM4v5rgateMod = model->BSIM4v5rgateMod; + else if ((here->BSIM4v5rgateMod != 0) && (here->BSIM4v5rgateMod != 1) + && (here->BSIM4v5rgateMod != 2) && (here->BSIM4v5rgateMod != 3)) + { here->BSIM4v5rgateMod = model->BSIM4v5rgateMod; + printf("Warning: rgateMod has been set to its global value %d.\n", + model->BSIM4v5rgateMod); + } + + if (!here->BSIM4v5geoModGiven) + here->BSIM4v5geoMod = model->BSIM4v5geoMod; + if (!here->BSIM4v5rgeoModGiven) + here->BSIM4v5rgeoMod = 0.0; + if (!here->BSIM4v5trnqsModGiven) + here->BSIM4v5trnqsMod = model->BSIM4v5trnqsMod; + else if ((here->BSIM4v5trnqsMod != 0) && (here->BSIM4v5trnqsMod != 1)) + { here->BSIM4v5trnqsMod = model->BSIM4v5trnqsMod; + printf("Warning: trnqsMod has been set to its global value %d.\n", + model->BSIM4v5trnqsMod); + } + + if (!here->BSIM4v5acnqsModGiven) + here->BSIM4v5acnqsMod = model->BSIM4v5acnqsMod; + else if ((here->BSIM4v5acnqsMod != 0) && (here->BSIM4v5acnqsMod != 1)) + { here->BSIM4v5acnqsMod = model->BSIM4v5acnqsMod; + printf("Warning: acnqsMod has been set to its global value %d.\n", + model->BSIM4v5acnqsMod); + } + + /* stress effect */ + if (!here->BSIM4v5saGiven) + here->BSIM4v5sa = 0.0; + if (!here->BSIM4v5sbGiven) + here->BSIM4v5sb = 0.0; + if (!here->BSIM4v5sdGiven) + here->BSIM4v5sd = 2 * model->BSIM4v5dmcg; + /* Well Proximity Effect */ + if (!here->BSIM4v5scaGiven) + here->BSIM4v5sca = 0.0; + if (!here->BSIM4v5scbGiven) + here->BSIM4v5scb = 0.0; + if (!here->BSIM4v5sccGiven) + here->BSIM4v5scc = 0.0; + if (!here->BSIM4v5scGiven) + here->BSIM4v5sc = 0.0; /* m */ + + /* process drain series resistance */ + createNode = 0; + if ( (model->BSIM4v5rdsMod != 0) + || (model->BSIM4v5tnoiMod != 0 && noiseAnalGiven)) + { + createNode = 1; + } else if (model->BSIM4v5sheetResistance > 0) + { + if (here->BSIM4v5drainSquaresGiven + && here->BSIM4v5drainSquares > 0) + { + createNode = 1; + } else if (!here->BSIM4v5drainSquaresGiven + && (here->BSIM4v5rgeoMod != 0)) + { + BSIM4v5RdseffGeo(here->BSIM4v5nf*here->BSIM4v5m, here->BSIM4v5geoMod, + here->BSIM4v5rgeoMod, here->BSIM4v5min, + here->BSIM4v5w, model->BSIM4v5sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 0, &Rtot); + if(Rtot > 0) + createNode = 1; + } + } + if ( createNode != 0 && (here->BSIM4v5dNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"drain"); + if(error) return(error); + here->BSIM4v5dNodePrime = tmp->number; + + if (ckt->CKTcopyNodesets) { + CKTnode *tmpNode; + IFuid tmpName; + if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + +} + + } + else + { here->BSIM4v5dNodePrime = here->BSIM4v5dNode; + } + + /* process source series resistance */ + createNode = 0; + if ( (model->BSIM4v5rdsMod != 0) + || (model->BSIM4v5tnoiMod != 0 && noiseAnalGiven)) + { + createNode = 1; + } else if (model->BSIM4v5sheetResistance > 0) + { + if (here->BSIM4v5sourceSquaresGiven + && here->BSIM4v5sourceSquares > 0) + { + createNode = 1; + } else if (!here->BSIM4v5sourceSquaresGiven + && (here->BSIM4v5rgeoMod != 0)) + { + BSIM4v5RdseffGeo(here->BSIM4v5nf*here->BSIM4v5m, here->BSIM4v5geoMod, + here->BSIM4v5rgeoMod, here->BSIM4v5min, + here->BSIM4v5w, model->BSIM4v5sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 1, &Rtot); + if(Rtot > 0) + createNode = 1; + } + } + if ( createNode != 0 && here->BSIM4v5sNodePrime == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"source"); + if(error) return(error); + here->BSIM4v5sNodePrime = tmp->number; + + if (ckt->CKTcopyNodesets) { + CKTnode *tmpNode; + IFuid tmpName; + if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + + } + else + here->BSIM4v5sNodePrime = here->BSIM4v5sNode; + + if ((here->BSIM4v5rgateMod > 0) && (here->BSIM4v5gNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"gate"); + if(error) return(error); + here->BSIM4v5gNodePrime = tmp->number; + + if (ckt->CKTcopyNodesets) { + CKTnode *tmpNode; + IFuid tmpName; + if (CKTinst2Node(ckt,here,2,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + + } + else + here->BSIM4v5gNodePrime = here->BSIM4v5gNodeExt; + + if ((here->BSIM4v5rgateMod == 3) && (here->BSIM4v5gNodeMid == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"midgate"); + if(error) return(error); + here->BSIM4v5gNodeMid = tmp->number; + } + else + here->BSIM4v5gNodeMid = here->BSIM4v5gNodeExt; + + + /* internal body nodes for body resistance model */ + if ((here->BSIM4v5rbodyMod ==1) || (here->BSIM4v5rbodyMod ==2)) + { if (here->BSIM4v5dbNode == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"dbody"); + if(error) return(error); + here->BSIM4v5dbNode = tmp->number; + + if (ckt->CKTcopyNodesets) { + CKTnode *tmpNode; + IFuid tmpName; + if (CKTinst2Node(ckt,here,4,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + } + if (here->BSIM4v5bNodePrime == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"body"); + if(error) return(error); + here->BSIM4v5bNodePrime = tmp->number; + } + if (here->BSIM4v5sbNode == 0) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"sbody"); + if(error) return(error); + here->BSIM4v5sbNode = tmp->number; + } + } + else + here->BSIM4v5dbNode = here->BSIM4v5bNodePrime = here->BSIM4v5sbNode + = here->BSIM4v5bNode; + + /* NQS node */ + if ((here->BSIM4v5trnqsMod) && (here->BSIM4v5qNode == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"charge"); + if(error) return(error); + here->BSIM4v5qNode = tmp->number; + + if (ckt->CKTcopyNodesets) { + CKTnode *tmpNode; + IFuid tmpName; + if (CKTinst2Node(ckt,here,5,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + } + else + here->BSIM4v5qNode = 0; + +/* set Sparse Matrix Pointers + * macro to make elements with built-in out-of-memory test */ +#define TSTALLOC(ptr,first,second) \ +if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\ + return(E_NOMEM);\ +} + + TSTALLOC(BSIM4v5DPbpPtr, BSIM4v5dNodePrime, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5GPbpPtr, BSIM4v5gNodePrime, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5SPbpPtr, BSIM4v5sNodePrime, BSIM4v5bNodePrime) + + TSTALLOC(BSIM4v5BPdpPtr, BSIM4v5bNodePrime, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5BPgpPtr, BSIM4v5bNodePrime, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5BPspPtr, BSIM4v5bNodePrime, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5BPbpPtr, BSIM4v5bNodePrime, BSIM4v5bNodePrime) + + TSTALLOC(BSIM4v5DdPtr, BSIM4v5dNode, BSIM4v5dNode) + TSTALLOC(BSIM4v5GPgpPtr, BSIM4v5gNodePrime, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5SsPtr, BSIM4v5sNode, BSIM4v5sNode) + TSTALLOC(BSIM4v5DPdpPtr, BSIM4v5dNodePrime, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5SPspPtr, BSIM4v5sNodePrime, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5DdpPtr, BSIM4v5dNode, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5GPdpPtr, BSIM4v5gNodePrime, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5GPspPtr, BSIM4v5gNodePrime, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5SspPtr, BSIM4v5sNode, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5DPspPtr, BSIM4v5dNodePrime, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5DPdPtr, BSIM4v5dNodePrime, BSIM4v5dNode) + TSTALLOC(BSIM4v5DPgpPtr, BSIM4v5dNodePrime, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5SPgpPtr, BSIM4v5sNodePrime, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5SPsPtr, BSIM4v5sNodePrime, BSIM4v5sNode) + TSTALLOC(BSIM4v5SPdpPtr, BSIM4v5sNodePrime, BSIM4v5dNodePrime) + + TSTALLOC(BSIM4v5QqPtr, BSIM4v5qNode, BSIM4v5qNode) + TSTALLOC(BSIM4v5QbpPtr, BSIM4v5qNode, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5QdpPtr, BSIM4v5qNode, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5QspPtr, BSIM4v5qNode, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5QgpPtr, BSIM4v5qNode, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5DPqPtr, BSIM4v5dNodePrime, BSIM4v5qNode) + TSTALLOC(BSIM4v5SPqPtr, BSIM4v5sNodePrime, BSIM4v5qNode) + TSTALLOC(BSIM4v5GPqPtr, BSIM4v5gNodePrime, BSIM4v5qNode) + + if (here->BSIM4v5rgateMod != 0) + { TSTALLOC(BSIM4v5GEgePtr, BSIM4v5gNodeExt, BSIM4v5gNodeExt) + TSTALLOC(BSIM4v5GEgpPtr, BSIM4v5gNodeExt, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5GPgePtr, BSIM4v5gNodePrime, BSIM4v5gNodeExt) + TSTALLOC(BSIM4v5GEdpPtr, BSIM4v5gNodeExt, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5GEspPtr, BSIM4v5gNodeExt, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5GEbpPtr, BSIM4v5gNodeExt, BSIM4v5bNodePrime) + + TSTALLOC(BSIM4v5GMdpPtr, BSIM4v5gNodeMid, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5GMgpPtr, BSIM4v5gNodeMid, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5GMgmPtr, BSIM4v5gNodeMid, BSIM4v5gNodeMid) + TSTALLOC(BSIM4v5GMgePtr, BSIM4v5gNodeMid, BSIM4v5gNodeExt) + TSTALLOC(BSIM4v5GMspPtr, BSIM4v5gNodeMid, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5GMbpPtr, BSIM4v5gNodeMid, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5DPgmPtr, BSIM4v5dNodePrime, BSIM4v5gNodeMid) + TSTALLOC(BSIM4v5GPgmPtr, BSIM4v5gNodePrime, BSIM4v5gNodeMid) + TSTALLOC(BSIM4v5GEgmPtr, BSIM4v5gNodeExt, BSIM4v5gNodeMid) + TSTALLOC(BSIM4v5SPgmPtr, BSIM4v5sNodePrime, BSIM4v5gNodeMid) + TSTALLOC(BSIM4v5BPgmPtr, BSIM4v5bNodePrime, BSIM4v5gNodeMid) + } + + if ((here->BSIM4v5rbodyMod ==1) || (here->BSIM4v5rbodyMod ==2)) + { TSTALLOC(BSIM4v5DPdbPtr, BSIM4v5dNodePrime, BSIM4v5dbNode) + TSTALLOC(BSIM4v5SPsbPtr, BSIM4v5sNodePrime, BSIM4v5sbNode) + + TSTALLOC(BSIM4v5DBdpPtr, BSIM4v5dbNode, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5DBdbPtr, BSIM4v5dbNode, BSIM4v5dbNode) + TSTALLOC(BSIM4v5DBbpPtr, BSIM4v5dbNode, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5DBbPtr, BSIM4v5dbNode, BSIM4v5bNode) + + TSTALLOC(BSIM4v5BPdbPtr, BSIM4v5bNodePrime, BSIM4v5dbNode) + TSTALLOC(BSIM4v5BPbPtr, BSIM4v5bNodePrime, BSIM4v5bNode) + TSTALLOC(BSIM4v5BPsbPtr, BSIM4v5bNodePrime, BSIM4v5sbNode) + + TSTALLOC(BSIM4v5SBspPtr, BSIM4v5sbNode, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5SBbpPtr, BSIM4v5sbNode, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5SBbPtr, BSIM4v5sbNode, BSIM4v5bNode) + TSTALLOC(BSIM4v5SBsbPtr, BSIM4v5sbNode, BSIM4v5sbNode) + + TSTALLOC(BSIM4v5BdbPtr, BSIM4v5bNode, BSIM4v5dbNode) + TSTALLOC(BSIM4v5BbpPtr, BSIM4v5bNode, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5BsbPtr, BSIM4v5bNode, BSIM4v5sbNode) + TSTALLOC(BSIM4v5BbPtr, BSIM4v5bNode, BSIM4v5bNode) + } + + if (model->BSIM4v5rdsMod) + { TSTALLOC(BSIM4v5DgpPtr, BSIM4v5dNode, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5DspPtr, BSIM4v5dNode, BSIM4v5sNodePrime) + TSTALLOC(BSIM4v5DbpPtr, BSIM4v5dNode, BSIM4v5bNodePrime) + TSTALLOC(BSIM4v5SdpPtr, BSIM4v5sNode, BSIM4v5dNodePrime) + TSTALLOC(BSIM4v5SgpPtr, BSIM4v5sNode, BSIM4v5gNodePrime) + TSTALLOC(BSIM4v5SbpPtr, BSIM4v5sNode, BSIM4v5bNodePrime) + } + } + } + return(OK); +} + +int +BSIM4v5unsetup(inModel,ckt) + GENmodel *inModel; + CKTcircuit *ckt; +{ +#ifndef HAS_BATCHSIM + BSIM4v5model *model; + BSIM4v5instance *here; + + for (model = (BSIM4v5model *)inModel; model != NULL; + model = model->BSIM4v5nextModel) + { + for (here = model->BSIM4v5instances; here != NULL; + here=here->BSIM4v5nextInstance) + { + if (here->BSIM4v5dNodePrime + && here->BSIM4v5dNodePrime != here->BSIM4v5dNode) + { + CKTdltNNum(ckt, here->BSIM4v5dNodePrime); + here->BSIM4v5dNodePrime = 0; + } + if (here->BSIM4v5sNodePrime + && here->BSIM4v5sNodePrime != here->BSIM4v5sNode) + { + CKTdltNNum(ckt, here->BSIM4v5sNodePrime); + here->BSIM4v5sNodePrime = 0; + } + } + } +#endif + return OK; +} diff --git a/src/spicelib/devices/bsim4v5/b4v5temp.c b/src/spicelib/devices/bsim4v5/b4v5temp.c new file mode 100644 index 000000000..1e29ae4e5 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5temp.c @@ -0,0 +1,1834 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2005 Regents of the University of California. All rights reserved. + * File: b4temp.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + * Modified by Xuemei Xi, 04/06/2001. + * Modified by Xuemei Xi, 10/05/2001. + * Modified by Xuemei Xi, 11/15/2002. + * Modified by Xuemei Xi, 05/09/2003. + * Modified by Xuemei Xi, 03/04/2004. + * Modified by Xuemei Xi, Mohan Dunga, 07/29/2005. + **********/ + +#include "ngspice.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "const.h" +#include "sperror.h" +#include "suffix.h" + +#define Kb 1.3806226e-23 +#define KboQ 8.617087e-5 +#define EPS0 8.85418e-12 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define Charge_q 1.60219e-19 +#define DELTA 1.0E-9 +#define DEXP(A,B) { \ + if (A > EXP_THRESHOLD) { \ + B = MAX_EXP*(1.0+(A)-EXP_THRESHOLD); \ + } else if (A < -EXP_THRESHOLD) { \ + B = MIN_EXP; \ + } else { \ + B = exp(A); \ + } \ + } + + +int +BSIM4v5PAeffGeo(double, int, int, double, double, double, double, double *, double *, double *, double *); +int +BSIM4v5RdseffGeo(double, int, int, int, double, double, double, double, double, int, double *); + +int +BSIM4v5DioIjthVjmEval(Nvtm, Ijth, Isb, XExpBV, Vjm) +double Nvtm, Ijth, Isb, XExpBV; +double *Vjm; +{ +double Tb, Tc, EVjmovNv; + + Tc = XExpBV; + Tb = 1.0 + Ijth / Isb - Tc; + EVjmovNv = 0.5 * (Tb + sqrt(Tb * Tb + 4.0 * Tc)); + *Vjm = Nvtm * log(EVjmovNv); + +return 0; +} + + +int +BSIM4v5temp(inModel,ckt) +GENmodel *inModel; +CKTcircuit *ckt; +{ +BSIM4v5model *model = (BSIM4v5model*) inModel; +BSIM4v5instance *here; +struct bsim4v5SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam = NULL; +double tmp, tmp1, tmp2, Eg, Eg0, ni; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Lnew=0.0, Wnew; +double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom; +double dumPs, dumPd, dumAs, dumAd, PowWeffWr; +double DMCGeff, DMCIeff, DMDGeff; +double Nvtms, Nvtmd, SourceSatCurrent, DrainSatCurrent; +double T10; +double Inv_saref, Inv_sbref, Inv_sa, Inv_sb, rho, Ldrn, dvth0_lod; +double W_tmp, Inv_ODeff, OD_offset, dk2_lod, deta0_lod; +double lnl, lnw, lnnf, rbpbx, rbpby, rbsbx, rbsby, rbdbx, rbdby,bodymode; +double kvsat, wlod, sceff, Wdrn; + +int Size_Not_Found, i; + + /* loop through all the BSIM4v5 device models */ + for (; model != NULL; model = model->BSIM4v5nextModel) + { Temp = ckt->CKTtemp; + if (model->BSIM4v5SbulkJctPotential < 0.1) + { model->BSIM4v5SbulkJctPotential = 0.1; + fprintf(stderr, "Given pbs is less than 0.1. Pbs is set to 0.1.\n"); + } + if (model->BSIM4v5SsidewallJctPotential < 0.1) + { model->BSIM4v5SsidewallJctPotential = 0.1; + fprintf(stderr, "Given pbsws is less than 0.1. Pbsws is set to 0.1.\n"); + } + if (model->BSIM4v5SGatesidewallJctPotential < 0.1) + { model->BSIM4v5SGatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswgs is less than 0.1. Pbswgs is set to 0.1.\n"); + } + + if (model->BSIM4v5DbulkJctPotential < 0.1) + { model->BSIM4v5DbulkJctPotential = 0.1; + fprintf(stderr, "Given pbd is less than 0.1. Pbd is set to 0.1.\n"); + } + if (model->BSIM4v5DsidewallJctPotential < 0.1) + { model->BSIM4v5DsidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswd is less than 0.1. Pbswd is set to 0.1.\n"); + } + if (model->BSIM4v5DGatesidewallJctPotential < 0.1) + { model->BSIM4v5DGatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswgd is less than 0.1. Pbswgd is set to 0.1.\n"); + } + + if ((model->BSIM4v5toxeGiven) && (model->BSIM4v5toxpGiven) && (model->BSIM4v5dtoxGiven) + && (model->BSIM4v5toxe != (model->BSIM4v5toxp + model->BSIM4v5dtox))) + printf("Warning: toxe, toxp and dtox all given and toxe != toxp + dtox; dtox ignored.\n"); + else if ((model->BSIM4v5toxeGiven) && (!model->BSIM4v5toxpGiven)) + model->BSIM4v5toxp = model->BSIM4v5toxe - model->BSIM4v5dtox; + else if ((!model->BSIM4v5toxeGiven) && (model->BSIM4v5toxpGiven)) + model->BSIM4v5toxe = model->BSIM4v5toxp + model->BSIM4v5dtox; + + model->BSIM4v5coxe = model->BSIM4v5epsrox * EPS0 / model->BSIM4v5toxe; + model->BSIM4v5coxp = model->BSIM4v5epsrox * EPS0 / model->BSIM4v5toxp; + + if (!model->BSIM4v5cgdoGiven) + { if (model->BSIM4v5dlcGiven && (model->BSIM4v5dlc > 0.0)) + model->BSIM4v5cgdo = model->BSIM4v5dlc * model->BSIM4v5coxe + - model->BSIM4v5cgdl ; + else + model->BSIM4v5cgdo = 0.6 * model->BSIM4v5xj * model->BSIM4v5coxe; + } + if (!model->BSIM4v5cgsoGiven) + { if (model->BSIM4v5dlcGiven && (model->BSIM4v5dlc > 0.0)) + model->BSIM4v5cgso = model->BSIM4v5dlc * model->BSIM4v5coxe + - model->BSIM4v5cgsl ; + else + model->BSIM4v5cgso = 0.6 * model->BSIM4v5xj * model->BSIM4v5coxe; + } + if (!model->BSIM4v5cgboGiven) + model->BSIM4v5cgbo = 2.0 * model->BSIM4v5dwc * model->BSIM4v5coxe; + model->pSizeDependParamKnot = NULL; + pLastKnot = NULL; + + Tnom = model->BSIM4v5tnom; + TRatio = Temp / Tnom; + + model->BSIM4v5vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); + model->BSIM4v5factor1 = sqrt(EPSSI / (model->BSIM4v5epsrox * EPS0) + * model->BSIM4v5toxe); + + Vtm0 = model->BSIM4v5vtm0 = KboQ * Tnom; + Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0); + ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) + * exp(21.5565981 - Eg0 / (2.0 * Vtm0)); + + model->BSIM4v5vtm = KboQ * Temp; + Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); + if (Temp != Tnom) + { T0 = Eg0 / Vtm0 - Eg / model->BSIM4v5vtm; + T1 = log(Temp / Tnom); + T2 = T0 + model->BSIM4v5SjctTempExponent * T1; + T3 = exp(T2 / model->BSIM4v5SjctEmissionCoeff); + model->BSIM4v5SjctTempSatCurDensity = model->BSIM4v5SjctSatCurDensity + * T3; + model->BSIM4v5SjctSidewallTempSatCurDensity + = model->BSIM4v5SjctSidewallSatCurDensity * T3; + model->BSIM4v5SjctGateSidewallTempSatCurDensity + = model->BSIM4v5SjctGateSidewallSatCurDensity * T3; + + T2 = T0 + model->BSIM4v5DjctTempExponent * T1; + T3 = exp(T2 / model->BSIM4v5DjctEmissionCoeff); + model->BSIM4v5DjctTempSatCurDensity = model->BSIM4v5DjctSatCurDensity + * T3; + model->BSIM4v5DjctSidewallTempSatCurDensity + = model->BSIM4v5DjctSidewallSatCurDensity * T3; + model->BSIM4v5DjctGateSidewallTempSatCurDensity + = model->BSIM4v5DjctGateSidewallSatCurDensity * T3; + } + else + { model->BSIM4v5SjctTempSatCurDensity = model->BSIM4v5SjctSatCurDensity; + model->BSIM4v5SjctSidewallTempSatCurDensity + = model->BSIM4v5SjctSidewallSatCurDensity; + model->BSIM4v5SjctGateSidewallTempSatCurDensity + = model->BSIM4v5SjctGateSidewallSatCurDensity; + model->BSIM4v5DjctTempSatCurDensity = model->BSIM4v5DjctSatCurDensity; + model->BSIM4v5DjctSidewallTempSatCurDensity + = model->BSIM4v5DjctSidewallSatCurDensity; + model->BSIM4v5DjctGateSidewallTempSatCurDensity + = model->BSIM4v5DjctGateSidewallSatCurDensity; + } + + if (model->BSIM4v5SjctTempSatCurDensity < 0.0) + model->BSIM4v5SjctTempSatCurDensity = 0.0; + if (model->BSIM4v5SjctSidewallTempSatCurDensity < 0.0) + model->BSIM4v5SjctSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v5SjctGateSidewallTempSatCurDensity < 0.0) + model->BSIM4v5SjctGateSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v5DjctTempSatCurDensity < 0.0) + model->BSIM4v5DjctTempSatCurDensity = 0.0; + if (model->BSIM4v5DjctSidewallTempSatCurDensity < 0.0) + model->BSIM4v5DjctSidewallTempSatCurDensity = 0.0; + if (model->BSIM4v5DjctGateSidewallTempSatCurDensity < 0.0) + model->BSIM4v5DjctGateSidewallTempSatCurDensity = 0.0; + + /* Temperature dependence of D/B and S/B diode capacitance begins */ + delTemp = ckt->CKTtemp - model->BSIM4v5tnom; + T0 = model->BSIM4v5tcj * delTemp; + if (T0 >= -1.0) + { model->BSIM4v5SunitAreaTempJctCap = model->BSIM4v5SunitAreaJctCap *(1.0 + T0); /*bug_fix -JX */ + model->BSIM4v5DunitAreaTempJctCap = model->BSIM4v5DunitAreaJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v5SunitAreaJctCap > 0.0) + { model->BSIM4v5SunitAreaTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjs to be negative. Cjs is clamped to zero.\n"); + } + if (model->BSIM4v5DunitAreaJctCap > 0.0) + { model->BSIM4v5DunitAreaTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjd to be negative. Cjd is clamped to zero.\n"); + } + } + T0 = model->BSIM4v5tcjsw * delTemp; + if (T0 >= -1.0) + { model->BSIM4v5SunitLengthSidewallTempJctCap = model->BSIM4v5SunitLengthSidewallJctCap *(1.0 + T0); + model->BSIM4v5DunitLengthSidewallTempJctCap = model->BSIM4v5DunitLengthSidewallJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v5SunitLengthSidewallJctCap > 0.0) + { model->BSIM4v5SunitLengthSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjsws to be negative. Cjsws is clamped to zero.\n"); + } + if (model->BSIM4v5DunitLengthSidewallJctCap > 0.0) + { model->BSIM4v5DunitLengthSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswd to be negative. Cjswd is clamped to zero.\n"); + } + } + T0 = model->BSIM4v5tcjswg * delTemp; + if (T0 >= -1.0) + { model->BSIM4v5SunitLengthGateSidewallTempJctCap = model->BSIM4v5SunitLengthGateSidewallJctCap *(1.0 + T0); + model->BSIM4v5DunitLengthGateSidewallTempJctCap = model->BSIM4v5DunitLengthGateSidewallJctCap *(1.0 + T0); + } + else + { if (model->BSIM4v5SunitLengthGateSidewallJctCap > 0.0) + { model->BSIM4v5SunitLengthGateSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswgs to be negative. Cjswgs is clamped to zero.\n"); + } + if (model->BSIM4v5DunitLengthGateSidewallJctCap > 0.0) + { model->BSIM4v5DunitLengthGateSidewallTempJctCap = 0.0; + fprintf(stderr, "Temperature effect has caused cjswgd to be negative. Cjswgd is clamped to zero.\n"); + } + } + + model->BSIM4v5PhiBS = model->BSIM4v5SbulkJctPotential + - model->BSIM4v5tpb * delTemp; + if (model->BSIM4v5PhiBS < 0.01) + { model->BSIM4v5PhiBS = 0.01; + fprintf(stderr, "Temperature effect has caused pbs to be less than 0.01. Pbs is clamped to 0.01.\n"); + } + model->BSIM4v5PhiBD = model->BSIM4v5DbulkJctPotential + - model->BSIM4v5tpb * delTemp; + if (model->BSIM4v5PhiBD < 0.01) + { model->BSIM4v5PhiBD = 0.01; + fprintf(stderr, "Temperature effect has caused pbd to be less than 0.01. Pbd is clamped to 0.01.\n"); + } + + model->BSIM4v5PhiBSWS = model->BSIM4v5SsidewallJctPotential + - model->BSIM4v5tpbsw * delTemp; + if (model->BSIM4v5PhiBSWS <= 0.01) + { model->BSIM4v5PhiBSWS = 0.01; + fprintf(stderr, "Temperature effect has caused pbsws to be less than 0.01. Pbsws is clamped to 0.01.\n"); + } + model->BSIM4v5PhiBSWD = model->BSIM4v5DsidewallJctPotential + - model->BSIM4v5tpbsw * delTemp; + if (model->BSIM4v5PhiBSWD <= 0.01) + { model->BSIM4v5PhiBSWD = 0.01; + fprintf(stderr, "Temperature effect has caused pbswd to be less than 0.01. Pbswd is clamped to 0.01.\n"); + } + + model->BSIM4v5PhiBSWGS = model->BSIM4v5SGatesidewallJctPotential + - model->BSIM4v5tpbswg * delTemp; + if (model->BSIM4v5PhiBSWGS <= 0.01) + { model->BSIM4v5PhiBSWGS = 0.01; + fprintf(stderr, "Temperature effect has caused pbswgs to be less than 0.01. Pbswgs is clamped to 0.01.\n"); + } + model->BSIM4v5PhiBSWGD = model->BSIM4v5DGatesidewallJctPotential + - model->BSIM4v5tpbswg * delTemp; + if (model->BSIM4v5PhiBSWGD <= 0.01) + { model->BSIM4v5PhiBSWGD = 0.01; + fprintf(stderr, "Temperature effect has caused pbswgd to be less than 0.01. Pbswgd is clamped to 0.01.\n"); + } /* End of junction capacitance */ + + + if (model->BSIM4v5ijthdfwd <= 0.0) + { model->BSIM4v5ijthdfwd = 0.1; + fprintf(stderr, "Ijthdfwd reset to %g.\n", model->BSIM4v5ijthdfwd); + } + if (model->BSIM4v5ijthsfwd <= 0.0) + { model->BSIM4v5ijthsfwd = 0.1; + fprintf(stderr, "Ijthsfwd reset to %g.\n", model->BSIM4v5ijthsfwd); + } + if (model->BSIM4v5ijthdrev <= 0.0) + { model->BSIM4v5ijthdrev = 0.1; + fprintf(stderr, "Ijthdrev reset to %g.\n", model->BSIM4v5ijthdrev); + } + if (model->BSIM4v5ijthsrev <= 0.0) + { model->BSIM4v5ijthsrev = 0.1; + fprintf(stderr, "Ijthsrev reset to %g.\n", model->BSIM4v5ijthsrev); + } + + if ((model->BSIM4v5xjbvd <= 0.0) && (model->BSIM4v5dioMod == 2)) + { model->BSIM4v5xjbvd = 1.0; + fprintf(stderr, "Xjbvd reset to %g.\n", model->BSIM4v5xjbvd); + } + else if ((model->BSIM4v5xjbvd < 0.0) && (model->BSIM4v5dioMod == 0)) + { model->BSIM4v5xjbvd = 1.0; + fprintf(stderr, "Xjbvd reset to %g.\n", model->BSIM4v5xjbvd); + } + + if (model->BSIM4v5bvd <= 0.0) + { model->BSIM4v5bvd = 10.0; + fprintf(stderr, "BVD reset to %g.\n", model->BSIM4v5bvd); + } + + if ((model->BSIM4v5xjbvs <= 0.0) && (model->BSIM4v5dioMod == 2)) + { model->BSIM4v5xjbvs = 1.0; + fprintf(stderr, "Xjbvs reset to %g.\n", model->BSIM4v5xjbvs); + } + else if ((model->BSIM4v5xjbvs < 0.0) && (model->BSIM4v5dioMod == 0)) + { model->BSIM4v5xjbvs = 1.0; + fprintf(stderr, "Xjbvs reset to %g.\n", model->BSIM4v5xjbvs); + } + + if (model->BSIM4v5bvs <= 0.0) + { model->BSIM4v5bvs = 10.0; + fprintf(stderr, "BVS reset to %g.\n", model->BSIM4v5bvs); + } + + + /* loop through all the instances of the model */ + for (here = model->BSIM4v5instances; here != NULL; + here = here->BSIM4v5nextInstance) + { if (here->BSIM4v5owner != ARCHme) continue; + pSizeDependParamKnot = model->pSizeDependParamKnot; + Size_Not_Found = 1; + while ((pSizeDependParamKnot != NULL) && Size_Not_Found) + { if ((here->BSIM4v5l == pSizeDependParamKnot->Length) + && (here->BSIM4v5w == pSizeDependParamKnot->Width) + && (here->BSIM4v5nf == pSizeDependParamKnot->NFinger)) + { Size_Not_Found = 0; + here->pParam = pSizeDependParamKnot; + pParam = here->pParam; /*bug-fix */ + } + else + { pLastKnot = pSizeDependParamKnot; + pSizeDependParamKnot = pSizeDependParamKnot->pNext; + } + } + + /* stress effect */ + Ldrn = here->BSIM4v5l; + Wdrn = here->BSIM4v5w / here->BSIM4v5nf; + + if (Size_Not_Found) + { pParam = (struct bsim4v5SizeDependParam *)malloc( + sizeof(struct bsim4v5SizeDependParam)); + if (pLastKnot == NULL) + model->pSizeDependParamKnot = pParam; + else + pLastKnot->pNext = pParam; + pParam->pNext = NULL; + here->pParam = pParam; + + pParam->Length = here->BSIM4v5l; + pParam->Width = here->BSIM4v5w; + pParam->NFinger = here->BSIM4v5nf; + Lnew = here->BSIM4v5l + model->BSIM4v5xl ; + Wnew = here->BSIM4v5w / here->BSIM4v5nf + model->BSIM4v5xw; + + T0 = pow(Lnew, model->BSIM4v5Lln); + T1 = pow(Wnew, model->BSIM4v5Lwn); + tmp1 = model->BSIM4v5Ll / T0 + model->BSIM4v5Lw / T1 + + model->BSIM4v5Lwl / (T0 * T1); + pParam->BSIM4v5dl = model->BSIM4v5Lint + tmp1; + tmp2 = model->BSIM4v5Llc / T0 + model->BSIM4v5Lwc / T1 + + model->BSIM4v5Lwlc / (T0 * T1); + pParam->BSIM4v5dlc = model->BSIM4v5dlc + tmp2; + + T2 = pow(Lnew, model->BSIM4v5Wln); + T3 = pow(Wnew, model->BSIM4v5Wwn); + tmp1 = model->BSIM4v5Wl / T2 + model->BSIM4v5Ww / T3 + + model->BSIM4v5Wwl / (T2 * T3); + pParam->BSIM4v5dw = model->BSIM4v5Wint + tmp1; + tmp2 = model->BSIM4v5Wlc / T2 + model->BSIM4v5Wwc / T3 + + model->BSIM4v5Wwlc / (T2 * T3); + pParam->BSIM4v5dwc = model->BSIM4v5dwc + tmp2; + pParam->BSIM4v5dwj = model->BSIM4v5dwj + tmp2; + + pParam->BSIM4v5leff = Lnew - 2.0 * pParam->BSIM4v5dl; + if (pParam->BSIM4v5leff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v5modName; + namarray[1] = here->BSIM4v5name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v5: mosfet %s, model %s: Effective channel length <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v5weff = Wnew - 2.0 * pParam->BSIM4v5dw; + if (pParam->BSIM4v5weff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v5modName; + namarray[1] = here->BSIM4v5name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v5: mosfet %s, model %s: Effective channel width <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v5leffCV = Lnew - 2.0 * pParam->BSIM4v5dlc; + if (pParam->BSIM4v5leffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v5modName; + namarray[1] = here->BSIM4v5name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v5: mosfet %s, model %s: Effective channel length for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v5weffCV = Wnew - 2.0 * pParam->BSIM4v5dwc; + if (pParam->BSIM4v5weffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v5modName; + namarray[1] = here->BSIM4v5name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v5: mosfet %s, model %s: Effective channel width for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM4v5weffCJ = Wnew - 2.0 * pParam->BSIM4v5dwj; + if (pParam->BSIM4v5weffCJ <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v5modName; + namarray[1] = here->BSIM4v5name; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM4v5: mosfet %s, model %s: Effective channel width for S/D junctions <= 0", + namarray); + return(E_BADPARM); + } + + + if (model->BSIM4v5binUnit == 1) + { Inv_L = 1.0e-6 / pParam->BSIM4v5leff; + Inv_W = 1.0e-6 / pParam->BSIM4v5weff; + Inv_LW = 1.0e-12 / (pParam->BSIM4v5leff + * pParam->BSIM4v5weff); + } + else + { Inv_L = 1.0 / pParam->BSIM4v5leff; + Inv_W = 1.0 / pParam->BSIM4v5weff; + Inv_LW = 1.0 / (pParam->BSIM4v5leff + * pParam->BSIM4v5weff); + } + pParam->BSIM4v5cdsc = model->BSIM4v5cdsc + + model->BSIM4v5lcdsc * Inv_L + + model->BSIM4v5wcdsc * Inv_W + + model->BSIM4v5pcdsc * Inv_LW; + pParam->BSIM4v5cdscb = model->BSIM4v5cdscb + + model->BSIM4v5lcdscb * Inv_L + + model->BSIM4v5wcdscb * Inv_W + + model->BSIM4v5pcdscb * Inv_LW; + + pParam->BSIM4v5cdscd = model->BSIM4v5cdscd + + model->BSIM4v5lcdscd * Inv_L + + model->BSIM4v5wcdscd * Inv_W + + model->BSIM4v5pcdscd * Inv_LW; + + pParam->BSIM4v5cit = model->BSIM4v5cit + + model->BSIM4v5lcit * Inv_L + + model->BSIM4v5wcit * Inv_W + + model->BSIM4v5pcit * Inv_LW; + pParam->BSIM4v5nfactor = model->BSIM4v5nfactor + + model->BSIM4v5lnfactor * Inv_L + + model->BSIM4v5wnfactor * Inv_W + + model->BSIM4v5pnfactor * Inv_LW; + pParam->BSIM4v5xj = model->BSIM4v5xj + + model->BSIM4v5lxj * Inv_L + + model->BSIM4v5wxj * Inv_W + + model->BSIM4v5pxj * Inv_LW; + pParam->BSIM4v5vsat = model->BSIM4v5vsat + + model->BSIM4v5lvsat * Inv_L + + model->BSIM4v5wvsat * Inv_W + + model->BSIM4v5pvsat * Inv_LW; + pParam->BSIM4v5at = model->BSIM4v5at + + model->BSIM4v5lat * Inv_L + + model->BSIM4v5wat * Inv_W + + model->BSIM4v5pat * Inv_LW; + pParam->BSIM4v5a0 = model->BSIM4v5a0 + + model->BSIM4v5la0 * Inv_L + + model->BSIM4v5wa0 * Inv_W + + model->BSIM4v5pa0 * Inv_LW; + + pParam->BSIM4v5ags = model->BSIM4v5ags + + model->BSIM4v5lags * Inv_L + + model->BSIM4v5wags * Inv_W + + model->BSIM4v5pags * Inv_LW; + + pParam->BSIM4v5a1 = model->BSIM4v5a1 + + model->BSIM4v5la1 * Inv_L + + model->BSIM4v5wa1 * Inv_W + + model->BSIM4v5pa1 * Inv_LW; + pParam->BSIM4v5a2 = model->BSIM4v5a2 + + model->BSIM4v5la2 * Inv_L + + model->BSIM4v5wa2 * Inv_W + + model->BSIM4v5pa2 * Inv_LW; + pParam->BSIM4v5keta = model->BSIM4v5keta + + model->BSIM4v5lketa * Inv_L + + model->BSIM4v5wketa * Inv_W + + model->BSIM4v5pketa * Inv_LW; + pParam->BSIM4v5nsub = model->BSIM4v5nsub + + model->BSIM4v5lnsub * Inv_L + + model->BSIM4v5wnsub * Inv_W + + model->BSIM4v5pnsub * Inv_LW; + pParam->BSIM4v5ndep = model->BSIM4v5ndep + + model->BSIM4v5lndep * Inv_L + + model->BSIM4v5wndep * Inv_W + + model->BSIM4v5pndep * Inv_LW; + pParam->BSIM4v5nsd = model->BSIM4v5nsd + + model->BSIM4v5lnsd * Inv_L + + model->BSIM4v5wnsd * Inv_W + + model->BSIM4v5pnsd * Inv_LW; + pParam->BSIM4v5phin = model->BSIM4v5phin + + model->BSIM4v5lphin * Inv_L + + model->BSIM4v5wphin * Inv_W + + model->BSIM4v5pphin * Inv_LW; + pParam->BSIM4v5ngate = model->BSIM4v5ngate + + model->BSIM4v5lngate * Inv_L + + model->BSIM4v5wngate * Inv_W + + model->BSIM4v5pngate * Inv_LW; + pParam->BSIM4v5gamma1 = model->BSIM4v5gamma1 + + model->BSIM4v5lgamma1 * Inv_L + + model->BSIM4v5wgamma1 * Inv_W + + model->BSIM4v5pgamma1 * Inv_LW; + pParam->BSIM4v5gamma2 = model->BSIM4v5gamma2 + + model->BSIM4v5lgamma2 * Inv_L + + model->BSIM4v5wgamma2 * Inv_W + + model->BSIM4v5pgamma2 * Inv_LW; + pParam->BSIM4v5vbx = model->BSIM4v5vbx + + model->BSIM4v5lvbx * Inv_L + + model->BSIM4v5wvbx * Inv_W + + model->BSIM4v5pvbx * Inv_LW; + pParam->BSIM4v5vbm = model->BSIM4v5vbm + + model->BSIM4v5lvbm * Inv_L + + model->BSIM4v5wvbm * Inv_W + + model->BSIM4v5pvbm * Inv_LW; + pParam->BSIM4v5xt = model->BSIM4v5xt + + model->BSIM4v5lxt * Inv_L + + model->BSIM4v5wxt * Inv_W + + model->BSIM4v5pxt * Inv_LW; + pParam->BSIM4v5vfb = model->BSIM4v5vfb + + model->BSIM4v5lvfb * Inv_L + + model->BSIM4v5wvfb * Inv_W + + model->BSIM4v5pvfb * Inv_LW; + pParam->BSIM4v5k1 = model->BSIM4v5k1 + + model->BSIM4v5lk1 * Inv_L + + model->BSIM4v5wk1 * Inv_W + + model->BSIM4v5pk1 * Inv_LW; + pParam->BSIM4v5kt1 = model->BSIM4v5kt1 + + model->BSIM4v5lkt1 * Inv_L + + model->BSIM4v5wkt1 * Inv_W + + model->BSIM4v5pkt1 * Inv_LW; + pParam->BSIM4v5kt1l = model->BSIM4v5kt1l + + model->BSIM4v5lkt1l * Inv_L + + model->BSIM4v5wkt1l * Inv_W + + model->BSIM4v5pkt1l * Inv_LW; + pParam->BSIM4v5k2 = model->BSIM4v5k2 + + model->BSIM4v5lk2 * Inv_L + + model->BSIM4v5wk2 * Inv_W + + model->BSIM4v5pk2 * Inv_LW; + pParam->BSIM4v5kt2 = model->BSIM4v5kt2 + + model->BSIM4v5lkt2 * Inv_L + + model->BSIM4v5wkt2 * Inv_W + + model->BSIM4v5pkt2 * Inv_LW; + pParam->BSIM4v5k3 = model->BSIM4v5k3 + + model->BSIM4v5lk3 * Inv_L + + model->BSIM4v5wk3 * Inv_W + + model->BSIM4v5pk3 * Inv_LW; + pParam->BSIM4v5k3b = model->BSIM4v5k3b + + model->BSIM4v5lk3b * Inv_L + + model->BSIM4v5wk3b * Inv_W + + model->BSIM4v5pk3b * Inv_LW; + pParam->BSIM4v5w0 = model->BSIM4v5w0 + + model->BSIM4v5lw0 * Inv_L + + model->BSIM4v5ww0 * Inv_W + + model->BSIM4v5pw0 * Inv_LW; + pParam->BSIM4v5lpe0 = model->BSIM4v5lpe0 + + model->BSIM4v5llpe0 * Inv_L + + model->BSIM4v5wlpe0 * Inv_W + + model->BSIM4v5plpe0 * Inv_LW; + pParam->BSIM4v5lpeb = model->BSIM4v5lpeb + + model->BSIM4v5llpeb * Inv_L + + model->BSIM4v5wlpeb * Inv_W + + model->BSIM4v5plpeb * Inv_LW; + pParam->BSIM4v5dvtp0 = model->BSIM4v5dvtp0 + + model->BSIM4v5ldvtp0 * Inv_L + + model->BSIM4v5wdvtp0 * Inv_W + + model->BSIM4v5pdvtp0 * Inv_LW; + pParam->BSIM4v5dvtp1 = model->BSIM4v5dvtp1 + + model->BSIM4v5ldvtp1 * Inv_L + + model->BSIM4v5wdvtp1 * Inv_W + + model->BSIM4v5pdvtp1 * Inv_LW; + pParam->BSIM4v5dvt0 = model->BSIM4v5dvt0 + + model->BSIM4v5ldvt0 * Inv_L + + model->BSIM4v5wdvt0 * Inv_W + + model->BSIM4v5pdvt0 * Inv_LW; + pParam->BSIM4v5dvt1 = model->BSIM4v5dvt1 + + model->BSIM4v5ldvt1 * Inv_L + + model->BSIM4v5wdvt1 * Inv_W + + model->BSIM4v5pdvt1 * Inv_LW; + pParam->BSIM4v5dvt2 = model->BSIM4v5dvt2 + + model->BSIM4v5ldvt2 * Inv_L + + model->BSIM4v5wdvt2 * Inv_W + + model->BSIM4v5pdvt2 * Inv_LW; + pParam->BSIM4v5dvt0w = model->BSIM4v5dvt0w + + model->BSIM4v5ldvt0w * Inv_L + + model->BSIM4v5wdvt0w * Inv_W + + model->BSIM4v5pdvt0w * Inv_LW; + pParam->BSIM4v5dvt1w = model->BSIM4v5dvt1w + + model->BSIM4v5ldvt1w * Inv_L + + model->BSIM4v5wdvt1w * Inv_W + + model->BSIM4v5pdvt1w * Inv_LW; + pParam->BSIM4v5dvt2w = model->BSIM4v5dvt2w + + model->BSIM4v5ldvt2w * Inv_L + + model->BSIM4v5wdvt2w * Inv_W + + model->BSIM4v5pdvt2w * Inv_LW; + pParam->BSIM4v5drout = model->BSIM4v5drout + + model->BSIM4v5ldrout * Inv_L + + model->BSIM4v5wdrout * Inv_W + + model->BSIM4v5pdrout * Inv_LW; + pParam->BSIM4v5dsub = model->BSIM4v5dsub + + model->BSIM4v5ldsub * Inv_L + + model->BSIM4v5wdsub * Inv_W + + model->BSIM4v5pdsub * Inv_LW; + pParam->BSIM4v5vth0 = model->BSIM4v5vth0 + + model->BSIM4v5lvth0 * Inv_L + + model->BSIM4v5wvth0 * Inv_W + + model->BSIM4v5pvth0 * Inv_LW; + pParam->BSIM4v5ua = model->BSIM4v5ua + + model->BSIM4v5lua * Inv_L + + model->BSIM4v5wua * Inv_W + + model->BSIM4v5pua * Inv_LW; + pParam->BSIM4v5ua1 = model->BSIM4v5ua1 + + model->BSIM4v5lua1 * Inv_L + + model->BSIM4v5wua1 * Inv_W + + model->BSIM4v5pua1 * Inv_LW; + pParam->BSIM4v5ub = model->BSIM4v5ub + + model->BSIM4v5lub * Inv_L + + model->BSIM4v5wub * Inv_W + + model->BSIM4v5pub * Inv_LW; + pParam->BSIM4v5ub1 = model->BSIM4v5ub1 + + model->BSIM4v5lub1 * Inv_L + + model->BSIM4v5wub1 * Inv_W + + model->BSIM4v5pub1 * Inv_LW; + pParam->BSIM4v5uc = model->BSIM4v5uc + + model->BSIM4v5luc * Inv_L + + model->BSIM4v5wuc * Inv_W + + model->BSIM4v5puc * Inv_LW; + pParam->BSIM4v5uc1 = model->BSIM4v5uc1 + + model->BSIM4v5luc1 * Inv_L + + model->BSIM4v5wuc1 * Inv_W + + model->BSIM4v5puc1 * Inv_LW; + pParam->BSIM4v5ud = model->BSIM4v5ud + + model->BSIM4v5lud * Inv_L + + model->BSIM4v5wud * Inv_W + + model->BSIM4v5pud * Inv_LW; + pParam->BSIM4v5ud1 = model->BSIM4v5ud1 + + model->BSIM4v5lud1 * Inv_L + + model->BSIM4v5wud1 * Inv_W + + model->BSIM4v5pud1 * Inv_LW; + pParam->BSIM4v5up = model->BSIM4v5up + + model->BSIM4v5lup * Inv_L + + model->BSIM4v5wup * Inv_W + + model->BSIM4v5pup * Inv_LW; + pParam->BSIM4v5lp = model->BSIM4v5lp + + model->BSIM4v5llp * Inv_L + + model->BSIM4v5wlp * Inv_W + + model->BSIM4v5plp * Inv_LW; + pParam->BSIM4v5eu = model->BSIM4v5eu + + model->BSIM4v5leu * Inv_L + + model->BSIM4v5weu * Inv_W + + model->BSIM4v5peu * Inv_LW; + pParam->BSIM4v5u0 = model->BSIM4v5u0 + + model->BSIM4v5lu0 * Inv_L + + model->BSIM4v5wu0 * Inv_W + + model->BSIM4v5pu0 * Inv_LW; + pParam->BSIM4v5ute = model->BSIM4v5ute + + model->BSIM4v5lute * Inv_L + + model->BSIM4v5wute * Inv_W + + model->BSIM4v5pute * Inv_LW; + pParam->BSIM4v5voff = model->BSIM4v5voff + + model->BSIM4v5lvoff * Inv_L + + model->BSIM4v5wvoff * Inv_W + + model->BSIM4v5pvoff * Inv_LW; + pParam->BSIM4v5tvoff = model->BSIM4v5tvoff + + model->BSIM4v5ltvoff * Inv_L + + model->BSIM4v5wtvoff * Inv_W + + model->BSIM4v5ptvoff * Inv_LW; + pParam->BSIM4v5minv = model->BSIM4v5minv + + model->BSIM4v5lminv * Inv_L + + model->BSIM4v5wminv * Inv_W + + model->BSIM4v5pminv * Inv_LW; + pParam->BSIM4v5fprout = model->BSIM4v5fprout + + model->BSIM4v5lfprout * Inv_L + + model->BSIM4v5wfprout * Inv_W + + model->BSIM4v5pfprout * Inv_LW; + pParam->BSIM4v5pdits = model->BSIM4v5pdits + + model->BSIM4v5lpdits * Inv_L + + model->BSIM4v5wpdits * Inv_W + + model->BSIM4v5ppdits * Inv_LW; + pParam->BSIM4v5pditsd = model->BSIM4v5pditsd + + model->BSIM4v5lpditsd * Inv_L + + model->BSIM4v5wpditsd * Inv_W + + model->BSIM4v5ppditsd * Inv_LW; + pParam->BSIM4v5delta = model->BSIM4v5delta + + model->BSIM4v5ldelta * Inv_L + + model->BSIM4v5wdelta * Inv_W + + model->BSIM4v5pdelta * Inv_LW; + pParam->BSIM4v5rdsw = model->BSIM4v5rdsw + + model->BSIM4v5lrdsw * Inv_L + + model->BSIM4v5wrdsw * Inv_W + + model->BSIM4v5prdsw * Inv_LW; + pParam->BSIM4v5rdw = model->BSIM4v5rdw + + model->BSIM4v5lrdw * Inv_L + + model->BSIM4v5wrdw * Inv_W + + model->BSIM4v5prdw * Inv_LW; + pParam->BSIM4v5rsw = model->BSIM4v5rsw + + model->BSIM4v5lrsw * Inv_L + + model->BSIM4v5wrsw * Inv_W + + model->BSIM4v5prsw * Inv_LW; + pParam->BSIM4v5prwg = model->BSIM4v5prwg + + model->BSIM4v5lprwg * Inv_L + + model->BSIM4v5wprwg * Inv_W + + model->BSIM4v5pprwg * Inv_LW; + pParam->BSIM4v5prwb = model->BSIM4v5prwb + + model->BSIM4v5lprwb * Inv_L + + model->BSIM4v5wprwb * Inv_W + + model->BSIM4v5pprwb * Inv_LW; + pParam->BSIM4v5prt = model->BSIM4v5prt + + model->BSIM4v5lprt * Inv_L + + model->BSIM4v5wprt * Inv_W + + model->BSIM4v5pprt * Inv_LW; + pParam->BSIM4v5eta0 = model->BSIM4v5eta0 + + model->BSIM4v5leta0 * Inv_L + + model->BSIM4v5weta0 * Inv_W + + model->BSIM4v5peta0 * Inv_LW; + pParam->BSIM4v5etab = model->BSIM4v5etab + + model->BSIM4v5letab * Inv_L + + model->BSIM4v5wetab * Inv_W + + model->BSIM4v5petab * Inv_LW; + pParam->BSIM4v5pclm = model->BSIM4v5pclm + + model->BSIM4v5lpclm * Inv_L + + model->BSIM4v5wpclm * Inv_W + + model->BSIM4v5ppclm * Inv_LW; + pParam->BSIM4v5pdibl1 = model->BSIM4v5pdibl1 + + model->BSIM4v5lpdibl1 * Inv_L + + model->BSIM4v5wpdibl1 * Inv_W + + model->BSIM4v5ppdibl1 * Inv_LW; + pParam->BSIM4v5pdibl2 = model->BSIM4v5pdibl2 + + model->BSIM4v5lpdibl2 * Inv_L + + model->BSIM4v5wpdibl2 * Inv_W + + model->BSIM4v5ppdibl2 * Inv_LW; + pParam->BSIM4v5pdiblb = model->BSIM4v5pdiblb + + model->BSIM4v5lpdiblb * Inv_L + + model->BSIM4v5wpdiblb * Inv_W + + model->BSIM4v5ppdiblb * Inv_LW; + pParam->BSIM4v5pscbe1 = model->BSIM4v5pscbe1 + + model->BSIM4v5lpscbe1 * Inv_L + + model->BSIM4v5wpscbe1 * Inv_W + + model->BSIM4v5ppscbe1 * Inv_LW; + pParam->BSIM4v5pscbe2 = model->BSIM4v5pscbe2 + + model->BSIM4v5lpscbe2 * Inv_L + + model->BSIM4v5wpscbe2 * Inv_W + + model->BSIM4v5ppscbe2 * Inv_LW; + pParam->BSIM4v5pvag = model->BSIM4v5pvag + + model->BSIM4v5lpvag * Inv_L + + model->BSIM4v5wpvag * Inv_W + + model->BSIM4v5ppvag * Inv_LW; + pParam->BSIM4v5wr = model->BSIM4v5wr + + model->BSIM4v5lwr * Inv_L + + model->BSIM4v5wwr * Inv_W + + model->BSIM4v5pwr * Inv_LW; + pParam->BSIM4v5dwg = model->BSIM4v5dwg + + model->BSIM4v5ldwg * Inv_L + + model->BSIM4v5wdwg * Inv_W + + model->BSIM4v5pdwg * Inv_LW; + pParam->BSIM4v5dwb = model->BSIM4v5dwb + + model->BSIM4v5ldwb * Inv_L + + model->BSIM4v5wdwb * Inv_W + + model->BSIM4v5pdwb * Inv_LW; + pParam->BSIM4v5b0 = model->BSIM4v5b0 + + model->BSIM4v5lb0 * Inv_L + + model->BSIM4v5wb0 * Inv_W + + model->BSIM4v5pb0 * Inv_LW; + pParam->BSIM4v5b1 = model->BSIM4v5b1 + + model->BSIM4v5lb1 * Inv_L + + model->BSIM4v5wb1 * Inv_W + + model->BSIM4v5pb1 * Inv_LW; + pParam->BSIM4v5alpha0 = model->BSIM4v5alpha0 + + model->BSIM4v5lalpha0 * Inv_L + + model->BSIM4v5walpha0 * Inv_W + + model->BSIM4v5palpha0 * Inv_LW; + pParam->BSIM4v5alpha1 = model->BSIM4v5alpha1 + + model->BSIM4v5lalpha1 * Inv_L + + model->BSIM4v5walpha1 * Inv_W + + model->BSIM4v5palpha1 * Inv_LW; + pParam->BSIM4v5beta0 = model->BSIM4v5beta0 + + model->BSIM4v5lbeta0 * Inv_L + + model->BSIM4v5wbeta0 * Inv_W + + model->BSIM4v5pbeta0 * Inv_LW; + pParam->BSIM4v5agidl = model->BSIM4v5agidl + + model->BSIM4v5lagidl * Inv_L + + model->BSIM4v5wagidl * Inv_W + + model->BSIM4v5pagidl * Inv_LW; + pParam->BSIM4v5bgidl = model->BSIM4v5bgidl + + model->BSIM4v5lbgidl * Inv_L + + model->BSIM4v5wbgidl * Inv_W + + model->BSIM4v5pbgidl * Inv_LW; + pParam->BSIM4v5cgidl = model->BSIM4v5cgidl + + model->BSIM4v5lcgidl * Inv_L + + model->BSIM4v5wcgidl * Inv_W + + model->BSIM4v5pcgidl * Inv_LW; + pParam->BSIM4v5egidl = model->BSIM4v5egidl + + model->BSIM4v5legidl * Inv_L + + model->BSIM4v5wegidl * Inv_W + + model->BSIM4v5pegidl * Inv_LW; + pParam->BSIM4v5aigc = model->BSIM4v5aigc + + model->BSIM4v5laigc * Inv_L + + model->BSIM4v5waigc * Inv_W + + model->BSIM4v5paigc * Inv_LW; + pParam->BSIM4v5bigc = model->BSIM4v5bigc + + model->BSIM4v5lbigc * Inv_L + + model->BSIM4v5wbigc * Inv_W + + model->BSIM4v5pbigc * Inv_LW; + pParam->BSIM4v5cigc = model->BSIM4v5cigc + + model->BSIM4v5lcigc * Inv_L + + model->BSIM4v5wcigc * Inv_W + + model->BSIM4v5pcigc * Inv_LW; + pParam->BSIM4v5aigsd = model->BSIM4v5aigsd + + model->BSIM4v5laigsd * Inv_L + + model->BSIM4v5waigsd * Inv_W + + model->BSIM4v5paigsd * Inv_LW; + pParam->BSIM4v5bigsd = model->BSIM4v5bigsd + + model->BSIM4v5lbigsd * Inv_L + + model->BSIM4v5wbigsd * Inv_W + + model->BSIM4v5pbigsd * Inv_LW; + pParam->BSIM4v5cigsd = model->BSIM4v5cigsd + + model->BSIM4v5lcigsd * Inv_L + + model->BSIM4v5wcigsd * Inv_W + + model->BSIM4v5pcigsd * Inv_LW; + pParam->BSIM4v5aigbacc = model->BSIM4v5aigbacc + + model->BSIM4v5laigbacc * Inv_L + + model->BSIM4v5waigbacc * Inv_W + + model->BSIM4v5paigbacc * Inv_LW; + pParam->BSIM4v5bigbacc = model->BSIM4v5bigbacc + + model->BSIM4v5lbigbacc * Inv_L + + model->BSIM4v5wbigbacc * Inv_W + + model->BSIM4v5pbigbacc * Inv_LW; + pParam->BSIM4v5cigbacc = model->BSIM4v5cigbacc + + model->BSIM4v5lcigbacc * Inv_L + + model->BSIM4v5wcigbacc * Inv_W + + model->BSIM4v5pcigbacc * Inv_LW; + pParam->BSIM4v5aigbinv = model->BSIM4v5aigbinv + + model->BSIM4v5laigbinv * Inv_L + + model->BSIM4v5waigbinv * Inv_W + + model->BSIM4v5paigbinv * Inv_LW; + pParam->BSIM4v5bigbinv = model->BSIM4v5bigbinv + + model->BSIM4v5lbigbinv * Inv_L + + model->BSIM4v5wbigbinv * Inv_W + + model->BSIM4v5pbigbinv * Inv_LW; + pParam->BSIM4v5cigbinv = model->BSIM4v5cigbinv + + model->BSIM4v5lcigbinv * Inv_L + + model->BSIM4v5wcigbinv * Inv_W + + model->BSIM4v5pcigbinv * Inv_LW; + pParam->BSIM4v5nigc = model->BSIM4v5nigc + + model->BSIM4v5lnigc * Inv_L + + model->BSIM4v5wnigc * Inv_W + + model->BSIM4v5pnigc * Inv_LW; + pParam->BSIM4v5nigbacc = model->BSIM4v5nigbacc + + model->BSIM4v5lnigbacc * Inv_L + + model->BSIM4v5wnigbacc * Inv_W + + model->BSIM4v5pnigbacc * Inv_LW; + pParam->BSIM4v5nigbinv = model->BSIM4v5nigbinv + + model->BSIM4v5lnigbinv * Inv_L + + model->BSIM4v5wnigbinv * Inv_W + + model->BSIM4v5pnigbinv * Inv_LW; + pParam->BSIM4v5ntox = model->BSIM4v5ntox + + model->BSIM4v5lntox * Inv_L + + model->BSIM4v5wntox * Inv_W + + model->BSIM4v5pntox * Inv_LW; + pParam->BSIM4v5eigbinv = model->BSIM4v5eigbinv + + model->BSIM4v5leigbinv * Inv_L + + model->BSIM4v5weigbinv * Inv_W + + model->BSIM4v5peigbinv * Inv_LW; + pParam->BSIM4v5pigcd = model->BSIM4v5pigcd + + model->BSIM4v5lpigcd * Inv_L + + model->BSIM4v5wpigcd * Inv_W + + model->BSIM4v5ppigcd * Inv_LW; + pParam->BSIM4v5poxedge = model->BSIM4v5poxedge + + model->BSIM4v5lpoxedge * Inv_L + + model->BSIM4v5wpoxedge * Inv_W + + model->BSIM4v5ppoxedge * Inv_LW; + pParam->BSIM4v5xrcrg1 = model->BSIM4v5xrcrg1 + + model->BSIM4v5lxrcrg1 * Inv_L + + model->BSIM4v5wxrcrg1 * Inv_W + + model->BSIM4v5pxrcrg1 * Inv_LW; + pParam->BSIM4v5xrcrg2 = model->BSIM4v5xrcrg2 + + model->BSIM4v5lxrcrg2 * Inv_L + + model->BSIM4v5wxrcrg2 * Inv_W + + model->BSIM4v5pxrcrg2 * Inv_LW; + pParam->BSIM4v5lambda = model->BSIM4v5lambda + + model->BSIM4v5llambda * Inv_L + + model->BSIM4v5wlambda * Inv_W + + model->BSIM4v5plambda * Inv_LW; + pParam->BSIM4v5vtl = model->BSIM4v5vtl + + model->BSIM4v5lvtl * Inv_L + + model->BSIM4v5wvtl * Inv_W + + model->BSIM4v5pvtl * Inv_LW; + pParam->BSIM4v5xn = model->BSIM4v5xn + + model->BSIM4v5lxn * Inv_L + + model->BSIM4v5wxn * Inv_W + + model->BSIM4v5pxn * Inv_LW; + pParam->BSIM4v5vfbsdoff = model->BSIM4v5vfbsdoff + + model->BSIM4v5lvfbsdoff * Inv_L + + model->BSIM4v5wvfbsdoff * Inv_W + + model->BSIM4v5pvfbsdoff * Inv_LW; + pParam->BSIM4v5tvfbsdoff = model->BSIM4v5tvfbsdoff + + model->BSIM4v5ltvfbsdoff * Inv_L + + model->BSIM4v5wtvfbsdoff * Inv_W + + model->BSIM4v5ptvfbsdoff * Inv_LW; + + pParam->BSIM4v5cgsl = model->BSIM4v5cgsl + + model->BSIM4v5lcgsl * Inv_L + + model->BSIM4v5wcgsl * Inv_W + + model->BSIM4v5pcgsl * Inv_LW; + pParam->BSIM4v5cgdl = model->BSIM4v5cgdl + + model->BSIM4v5lcgdl * Inv_L + + model->BSIM4v5wcgdl * Inv_W + + model->BSIM4v5pcgdl * Inv_LW; + pParam->BSIM4v5ckappas = model->BSIM4v5ckappas + + model->BSIM4v5lckappas * Inv_L + + model->BSIM4v5wckappas * Inv_W + + model->BSIM4v5pckappas * Inv_LW; + pParam->BSIM4v5ckappad = model->BSIM4v5ckappad + + model->BSIM4v5lckappad * Inv_L + + model->BSIM4v5wckappad * Inv_W + + model->BSIM4v5pckappad * Inv_LW; + pParam->BSIM4v5cf = model->BSIM4v5cf + + model->BSIM4v5lcf * Inv_L + + model->BSIM4v5wcf * Inv_W + + model->BSIM4v5pcf * Inv_LW; + pParam->BSIM4v5clc = model->BSIM4v5clc + + model->BSIM4v5lclc * Inv_L + + model->BSIM4v5wclc * Inv_W + + model->BSIM4v5pclc * Inv_LW; + pParam->BSIM4v5cle = model->BSIM4v5cle + + model->BSIM4v5lcle * Inv_L + + model->BSIM4v5wcle * Inv_W + + model->BSIM4v5pcle * Inv_LW; + pParam->BSIM4v5vfbcv = model->BSIM4v5vfbcv + + model->BSIM4v5lvfbcv * Inv_L + + model->BSIM4v5wvfbcv * Inv_W + + model->BSIM4v5pvfbcv * Inv_LW; + pParam->BSIM4v5acde = model->BSIM4v5acde + + model->BSIM4v5lacde * Inv_L + + model->BSIM4v5wacde * Inv_W + + model->BSIM4v5pacde * Inv_LW; + pParam->BSIM4v5moin = model->BSIM4v5moin + + model->BSIM4v5lmoin * Inv_L + + model->BSIM4v5wmoin * Inv_W + + model->BSIM4v5pmoin * Inv_LW; + pParam->BSIM4v5noff = model->BSIM4v5noff + + model->BSIM4v5lnoff * Inv_L + + model->BSIM4v5wnoff * Inv_W + + model->BSIM4v5pnoff * Inv_LW; + pParam->BSIM4v5voffcv = model->BSIM4v5voffcv + + model->BSIM4v5lvoffcv * Inv_L + + model->BSIM4v5wvoffcv * Inv_W + + model->BSIM4v5pvoffcv * Inv_LW; + pParam->BSIM4v5kvth0we = model->BSIM4v5kvth0we + + model->BSIM4v5lkvth0we * Inv_L + + model->BSIM4v5wkvth0we * Inv_W + + model->BSIM4v5pkvth0we * Inv_LW; + pParam->BSIM4v5k2we = model->BSIM4v5k2we + + model->BSIM4v5lk2we * Inv_L + + model->BSIM4v5wk2we * Inv_W + + model->BSIM4v5pk2we * Inv_LW; + pParam->BSIM4v5ku0we = model->BSIM4v5ku0we + + model->BSIM4v5lku0we * Inv_L + + model->BSIM4v5wku0we * Inv_W + + model->BSIM4v5pku0we * Inv_LW; + + pParam->BSIM4v5abulkCVfactor = 1.0 + pow((pParam->BSIM4v5clc + / pParam->BSIM4v5leffCV), + pParam->BSIM4v5cle); + + T0 = (TRatio - 1.0); + + PowWeffWr = pow(pParam->BSIM4v5weffCJ * 1.0e6, pParam->BSIM4v5wr) * here->BSIM4v5nf; + + T1 = T2 = T3 = T4 = 0.0; + if(model->BSIM4v5tempMod == 0) { + pParam->BSIM4v5ua = pParam->BSIM4v5ua + pParam->BSIM4v5ua1 * T0; + pParam->BSIM4v5ub = pParam->BSIM4v5ub + pParam->BSIM4v5ub1 * T0; + pParam->BSIM4v5uc = pParam->BSIM4v5uc + pParam->BSIM4v5uc1 * T0; + pParam->BSIM4v5ud = pParam->BSIM4v5ud + pParam->BSIM4v5ud1 * T0; + pParam->BSIM4v5vsattemp = pParam->BSIM4v5vsat - pParam->BSIM4v5at * T0; + T10 = pParam->BSIM4v5prt * T0; + if(model->BSIM4v5rdsMod) { + /* External Rd(V) */ + T1 = pParam->BSIM4v5rdw + T10; + T2 = model->BSIM4v5rdwmin + T10; + /* External Rs(V) */ + T3 = pParam->BSIM4v5rsw + T10; + T4 = model->BSIM4v5rswmin + T10; + } + /* Internal Rds(V) in IV */ + pParam->BSIM4v5rds0 = (pParam->BSIM4v5rdsw + T10) + * here->BSIM4v5nf / PowWeffWr; + pParam->BSIM4v5rdswmin = (model->BSIM4v5rdswmin + T10) + * here->BSIM4v5nf / PowWeffWr; + } else { /* tempMod = 1, 2 */ + pParam->BSIM4v5ua = pParam->BSIM4v5ua * (1.0 + pParam->BSIM4v5ua1 * delTemp) ; + pParam->BSIM4v5ub = pParam->BSIM4v5ub * (1.0 + pParam->BSIM4v5ub1 * delTemp); + pParam->BSIM4v5uc = pParam->BSIM4v5uc * (1.0 + pParam->BSIM4v5uc1 * delTemp); + pParam->BSIM4v5ud = pParam->BSIM4v5ud * (1.0 + pParam->BSIM4v5ud1 * delTemp); + pParam->BSIM4v5vsattemp = pParam->BSIM4v5vsat * (1.0 - pParam->BSIM4v5at * delTemp); + T10 = 1.0 + pParam->BSIM4v5prt * delTemp; + if(model->BSIM4v5rdsMod) { + /* External Rd(V) */ + T1 = pParam->BSIM4v5rdw * T10; + T2 = model->BSIM4v5rdwmin * T10; + /* External Rs(V) */ + T3 = pParam->BSIM4v5rsw * T10; + T4 = model->BSIM4v5rswmin * T10; + } + /* Internal Rds(V) in IV */ + pParam->BSIM4v5rds0 = pParam->BSIM4v5rdsw * T10 * here->BSIM4v5nf / PowWeffWr; + pParam->BSIM4v5rdswmin = model->BSIM4v5rdswmin * T10 * here->BSIM4v5nf / PowWeffWr; + } + if (T1 < 0.0) + { T1 = 0.0; + printf("Warning: Rdw at current temperature is negative; set to 0.\n"); + } + if (T2 < 0.0) + { T2 = 0.0; + printf("Warning: Rdwmin at current temperature is negative; set to 0.\n"); + } + pParam->BSIM4v5rd0 = T1 / PowWeffWr; + pParam->BSIM4v5rdwmin = T2 / PowWeffWr; + if (T3 < 0.0) + { T3 = 0.0; + printf("Warning: Rsw at current temperature is negative; set to 0.\n"); + } + if (T4 < 0.0) + { T4 = 0.0; + printf("Warning: Rswmin at current temperature is negative; set to 0.\n"); + } + pParam->BSIM4v5rs0 = T3 / PowWeffWr; + pParam->BSIM4v5rswmin = T4 / PowWeffWr; + + if (pParam->BSIM4v5u0 > 1.0) + pParam->BSIM4v5u0 = pParam->BSIM4v5u0 / 1.0e4; + + /* mobility channel length dependence */ + T5 = 1.0 - pParam->BSIM4v5up * exp( - pParam->BSIM4v5leff / pParam->BSIM4v5lp); + pParam->BSIM4v5u0temp = pParam->BSIM4v5u0 * T5 + * pow(TRatio, pParam->BSIM4v5ute); + if (pParam->BSIM4v5eu < 0.0) + { pParam->BSIM4v5eu = 0.0; + printf("Warning: eu has been negative; reset to 0.0.\n"); + } + + pParam->BSIM4v5vfbsdoff = pParam->BSIM4v5vfbsdoff * (1.0 + pParam->BSIM4v5tvfbsdoff * delTemp); + pParam->BSIM4v5voff = pParam->BSIM4v5voff * (1.0 + pParam->BSIM4v5tvoff * delTemp); + + /* Source End Velocity Limit */ + if((model->BSIM4v5vtlGiven) && (model->BSIM4v5vtl > 0.0) ) + { + if(model->BSIM4v5lc < 0.0) pParam->BSIM4v5lc = 0.0; + else pParam->BSIM4v5lc = model->BSIM4v5lc ; + T0 = pParam->BSIM4v5leff / (pParam->BSIM4v5xn * pParam->BSIM4v5leff + pParam->BSIM4v5lc); + pParam->BSIM4v5tfactor = (1.0 - T0) / (1.0 + T0 ); + } + + pParam->BSIM4v5cgdo = (model->BSIM4v5cgdo + pParam->BSIM4v5cf) + * pParam->BSIM4v5weffCV; + pParam->BSIM4v5cgso = (model->BSIM4v5cgso + pParam->BSIM4v5cf) + * pParam->BSIM4v5weffCV; + pParam->BSIM4v5cgbo = model->BSIM4v5cgbo * pParam->BSIM4v5leffCV * here->BSIM4v5nf; + + if (!model->BSIM4v5ndepGiven && model->BSIM4v5gamma1Given) + { T0 = pParam->BSIM4v5gamma1 * model->BSIM4v5coxe; + pParam->BSIM4v5ndep = 3.01248e22 * T0 * T0; + } + + pParam->BSIM4v5phi = Vtm0 * log(pParam->BSIM4v5ndep / ni) + + pParam->BSIM4v5phin + 0.4; + + pParam->BSIM4v5sqrtPhi = sqrt(pParam->BSIM4v5phi); + pParam->BSIM4v5phis3 = pParam->BSIM4v5sqrtPhi * pParam->BSIM4v5phi; + + pParam->BSIM4v5Xdep0 = sqrt(2.0 * EPSSI / (Charge_q + * pParam->BSIM4v5ndep * 1.0e6)) + * pParam->BSIM4v5sqrtPhi; + pParam->BSIM4v5sqrtXdep0 = sqrt(pParam->BSIM4v5Xdep0); + pParam->BSIM4v5litl = sqrt(3.0 * pParam->BSIM4v5xj + * model->BSIM4v5toxe); + pParam->BSIM4v5vbi = Vtm0 * log(pParam->BSIM4v5nsd + * pParam->BSIM4v5ndep / (ni * ni)); + + if (pParam->BSIM4v5ngate > 0.0) + { pParam->BSIM4v5vfbsd = Vtm0 * log(pParam->BSIM4v5ngate + / pParam->BSIM4v5nsd); + } + else + pParam->BSIM4v5vfbsd = 0.0; + + pParam->BSIM4v5cdep0 = sqrt(Charge_q * EPSSI + * pParam->BSIM4v5ndep * 1.0e6 / 2.0 + / pParam->BSIM4v5phi); + + pParam->BSIM4v5ToxRatio = exp(pParam->BSIM4v5ntox + * log(model->BSIM4v5toxref / model->BSIM4v5toxe)) + / model->BSIM4v5toxe / model->BSIM4v5toxe; + pParam->BSIM4v5ToxRatioEdge = exp(pParam->BSIM4v5ntox + * log(model->BSIM4v5toxref + / (model->BSIM4v5toxe * pParam->BSIM4v5poxedge))) + / model->BSIM4v5toxe / model->BSIM4v5toxe + / pParam->BSIM4v5poxedge / pParam->BSIM4v5poxedge; + pParam->BSIM4v5Aechvb = (model->BSIM4v5type == NMOS) ? 4.97232e-7 : 3.42537e-7; + pParam->BSIM4v5Bechvb = (model->BSIM4v5type == NMOS) ? 7.45669e11 : 1.16645e12; + pParam->BSIM4v5AechvbEdge = pParam->BSIM4v5Aechvb * pParam->BSIM4v5weff + * model->BSIM4v5dlcig * pParam->BSIM4v5ToxRatioEdge; + pParam->BSIM4v5BechvbEdge = -pParam->BSIM4v5Bechvb + * model->BSIM4v5toxe * pParam->BSIM4v5poxedge; + pParam->BSIM4v5Aechvb *= pParam->BSIM4v5weff * pParam->BSIM4v5leff + * pParam->BSIM4v5ToxRatio; + pParam->BSIM4v5Bechvb *= -model->BSIM4v5toxe; + + + pParam->BSIM4v5mstar = 0.5 + atan(pParam->BSIM4v5minv) / PI; + pParam->BSIM4v5voffcbn = pParam->BSIM4v5voff + model->BSIM4v5voffl / pParam->BSIM4v5leff; + + pParam->BSIM4v5ldeb = sqrt(EPSSI * Vtm0 / (Charge_q + * pParam->BSIM4v5ndep * 1.0e6)) / 3.0; + pParam->BSIM4v5acde *= pow((pParam->BSIM4v5ndep / 2.0e16), -0.25); + + + if (model->BSIM4v5k1Given || model->BSIM4v5k2Given) + { if (!model->BSIM4v5k1Given) + { fprintf(stdout, "Warning: k1 should be specified with k2.\n"); + pParam->BSIM4v5k1 = 0.53; + } + if (!model->BSIM4v5k2Given) + { fprintf(stdout, "Warning: k2 should be specified with k1.\n"); + pParam->BSIM4v5k2 = -0.0186; + } + if (model->BSIM4v5nsubGiven) + fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v5xtGiven) + fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v5vbxGiven) + fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v5gamma1Given) + fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); + if (model->BSIM4v5gamma2Given) + fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); + } + else + { if (!model->BSIM4v5vbxGiven) + pParam->BSIM4v5vbx = pParam->BSIM4v5phi - 7.7348e-4 + * pParam->BSIM4v5ndep + * pParam->BSIM4v5xt * pParam->BSIM4v5xt; + if (pParam->BSIM4v5vbx > 0.0) + pParam->BSIM4v5vbx = -pParam->BSIM4v5vbx; + if (pParam->BSIM4v5vbm > 0.0) + pParam->BSIM4v5vbm = -pParam->BSIM4v5vbm; + + if (!model->BSIM4v5gamma1Given) + pParam->BSIM4v5gamma1 = 5.753e-12 + * sqrt(pParam->BSIM4v5ndep) + / model->BSIM4v5coxe; + if (!model->BSIM4v5gamma2Given) + pParam->BSIM4v5gamma2 = 5.753e-12 + * sqrt(pParam->BSIM4v5nsub) + / model->BSIM4v5coxe; + + T0 = pParam->BSIM4v5gamma1 - pParam->BSIM4v5gamma2; + T1 = sqrt(pParam->BSIM4v5phi - pParam->BSIM4v5vbx) + - pParam->BSIM4v5sqrtPhi; + T2 = sqrt(pParam->BSIM4v5phi * (pParam->BSIM4v5phi + - pParam->BSIM4v5vbm)) - pParam->BSIM4v5phi; + pParam->BSIM4v5k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM4v5vbm); + pParam->BSIM4v5k1 = pParam->BSIM4v5gamma2 - 2.0 + * pParam->BSIM4v5k2 * sqrt(pParam->BSIM4v5phi + - pParam->BSIM4v5vbm); + } + + if (!model->BSIM4v5vfbGiven) + { if (model->BSIM4v5vth0Given) + { pParam->BSIM4v5vfb = model->BSIM4v5type * pParam->BSIM4v5vth0 + - pParam->BSIM4v5phi - pParam->BSIM4v5k1 + * pParam->BSIM4v5sqrtPhi; + } + else + { pParam->BSIM4v5vfb = -1.0; + } + } + if (!model->BSIM4v5vth0Given) + { pParam->BSIM4v5vth0 = model->BSIM4v5type * (pParam->BSIM4v5vfb + + pParam->BSIM4v5phi + pParam->BSIM4v5k1 + * pParam->BSIM4v5sqrtPhi); + } + + pParam->BSIM4v5k1ox = pParam->BSIM4v5k1 * model->BSIM4v5toxe + / model->BSIM4v5toxm; + + tmp = sqrt(EPSSI / (model->BSIM4v5epsrox * EPS0) + * model->BSIM4v5toxe * pParam->BSIM4v5Xdep0); + T0 = pParam->BSIM4v5dsub * pParam->BSIM4v5leff / tmp; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + pParam->BSIM4v5theta0vb0 = T1 / T4; + } + else + pParam->BSIM4v5theta0vb0 = 1.0 / (MAX_EXP - 2.0); + + T0 = pParam->BSIM4v5drout * pParam->BSIM4v5leff / tmp; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T5 = T1 / T4; + } + else + T5 = 1.0 / (MAX_EXP - 2.0); /* 3.0 * MIN_EXP omitted */ + pParam->BSIM4v5thetaRout = pParam->BSIM4v5pdibl1 * T5 + + pParam->BSIM4v5pdibl2; + + tmp = sqrt(pParam->BSIM4v5Xdep0); + tmp1 = pParam->BSIM4v5vbi - pParam->BSIM4v5phi; + tmp2 = model->BSIM4v5factor1 * tmp; + + T0 = pParam->BSIM4v5dvt1w * pParam->BSIM4v5weff + * pParam->BSIM4v5leff / tmp2; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T8 = T1 / T4; + } + else + T8 = 1.0 / (MAX_EXP - 2.0); + T0 = pParam->BSIM4v5dvt0w * T8; + T8 = T0 * tmp1; + + T0 = pParam->BSIM4v5dvt1 * pParam->BSIM4v5leff / tmp2; + if (T0 < EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 - 1.0; + T3 = T2 * T2; + T4 = T3 + 2.0 * T1 * MIN_EXP; + T9 = T1 / T4; + } + else + T9 = 1.0 / (MAX_EXP - 2.0); + T9 = pParam->BSIM4v5dvt0 * T9 * tmp1; + + T4 = model->BSIM4v5toxe * pParam->BSIM4v5phi + / (pParam->BSIM4v5weff + pParam->BSIM4v5w0); + + T0 = sqrt(1.0 + pParam->BSIM4v5lpe0 / pParam->BSIM4v5leff); + if((model->BSIM4v5tempMod == 1) || (model->BSIM4v5tempMod == 0)) + T3 = (pParam->BSIM4v5kt1 + pParam->BSIM4v5kt1l / pParam->BSIM4v5leff) + * (TRatio - 1.0); + if(model->BSIM4v5tempMod == 2) + T3 = - pParam->BSIM4v5kt1 * (TRatio - 1.0); + + T5 = pParam->BSIM4v5k1ox * (T0 - 1.0) * pParam->BSIM4v5sqrtPhi + + T3; + pParam->BSIM4v5vfbzbfactor = - T8 - T9 + pParam->BSIM4v5k3 * T4 + T5 + - pParam->BSIM4v5phi - pParam->BSIM4v5k1 * pParam->BSIM4v5sqrtPhi; + + /* stress effect */ + + wlod = model->BSIM4v5wlod; + if (model->BSIM4v5wlod < 0.0) + { fprintf(stderr, "Warning: WLOD = %g is less than 0. 0.0 is used\n",model->BSIM4v5wlod); + wlod = 0.0; + } + T0 = pow(Lnew, model->BSIM4v5llodku0); + W_tmp = Wnew + wlod; + T1 = pow(W_tmp, model->BSIM4v5wlodku0); + tmp1 = model->BSIM4v5lku0 / T0 + model->BSIM4v5wku0 / T1 + + model->BSIM4v5pku0 / (T0 * T1); + pParam->BSIM4v5ku0 = 1.0 + tmp1; + + T0 = pow(Lnew, model->BSIM4v5llodvth); + T1 = pow(W_tmp, model->BSIM4v5wlodvth); + tmp1 = model->BSIM4v5lkvth0 / T0 + model->BSIM4v5wkvth0 / T1 + + model->BSIM4v5pkvth0 / (T0 * T1); + pParam->BSIM4v5kvth0 = 1.0 + tmp1; + pParam->BSIM4v5kvth0 = sqrt(pParam->BSIM4v5kvth0*pParam->BSIM4v5kvth0 + DELTA); + + T0 = (TRatio - 1.0); + pParam->BSIM4v5ku0temp = pParam->BSIM4v5ku0 * (1.0 + model->BSIM4v5tku0 *T0) + DELTA; + + Inv_saref = 1.0/(model->BSIM4v5saref + 0.5*Ldrn); + Inv_sbref = 1.0/(model->BSIM4v5sbref + 0.5*Ldrn); + pParam->BSIM4v5inv_od_ref = Inv_saref + Inv_sbref; + pParam->BSIM4v5rho_ref = model->BSIM4v5ku0 / pParam->BSIM4v5ku0temp * pParam->BSIM4v5inv_od_ref; + + } /* End of SizeNotFound */ + + /* stress effect */ + if( (here->BSIM4v5sa > 0.0) && (here->BSIM4v5sb > 0.0) && + ((here->BSIM4v5nf == 1.0) || ((here->BSIM4v5nf > 1.0) && (here->BSIM4v5sd > 0.0))) ) + { Inv_sa = 0; + Inv_sb = 0; + + kvsat = model->BSIM4v5kvsat; + if (model->BSIM4v5kvsat < -1.0 ) + { fprintf(stderr, "Warning: KVSAT = %g is too small; -1.0 is used.\n",model->BSIM4v5kvsat); + kvsat = -1.0; + } + if (model->BSIM4v5kvsat > 1.0) + { fprintf(stderr, "Warning: KVSAT = %g is too big; 1.0 is used.\n",model->BSIM4v5kvsat); + kvsat = 1.0; + } + + for(i = 0; i < here->BSIM4v5nf; i++){ + T0 = 1.0 / here->BSIM4v5nf / (here->BSIM4v5sa + 0.5*Ldrn + i * (here->BSIM4v5sd +Ldrn)); + T1 = 1.0 / here->BSIM4v5nf / (here->BSIM4v5sb + 0.5*Ldrn + i * (here->BSIM4v5sd +Ldrn)); + Inv_sa += T0; + Inv_sb += T1; + } + Inv_ODeff = Inv_sa + Inv_sb; + rho = model->BSIM4v5ku0 / pParam->BSIM4v5ku0temp * Inv_ODeff; + T0 = (1.0 + rho)/(1.0 + pParam->BSIM4v5rho_ref); + here->BSIM4v5u0temp = pParam->BSIM4v5u0temp * T0; + + T1 = (1.0 + kvsat * rho)/(1.0 + kvsat * pParam->BSIM4v5rho_ref); + here->BSIM4v5vsattemp = pParam->BSIM4v5vsattemp * T1; + + OD_offset = Inv_ODeff - pParam->BSIM4v5inv_od_ref; + dvth0_lod = model->BSIM4v5kvth0 / pParam->BSIM4v5kvth0 * OD_offset; + dk2_lod = model->BSIM4v5stk2 / pow(pParam->BSIM4v5kvth0, model->BSIM4v5lodk2) * + OD_offset; + deta0_lod = model->BSIM4v5steta0 / pow(pParam->BSIM4v5kvth0, model->BSIM4v5lodeta0) * + OD_offset; + here->BSIM4v5vth0 = pParam->BSIM4v5vth0 + dvth0_lod; + + here->BSIM4v5eta0 = pParam->BSIM4v5eta0 + deta0_lod; + here->BSIM4v5k2 = pParam->BSIM4v5k2 + dk2_lod; + } else { + here->BSIM4v5u0temp = pParam->BSIM4v5u0temp; + here->BSIM4v5vth0 = pParam->BSIM4v5vth0; + here->BSIM4v5vsattemp = pParam->BSIM4v5vsattemp; + here->BSIM4v5eta0 = pParam->BSIM4v5eta0; + here->BSIM4v5k2 = pParam->BSIM4v5k2; + } + + /* Well Proximity Effect */ + if (model->BSIM4v5wpemod) + { if( (!here->BSIM4v5scaGiven) && (!here->BSIM4v5scbGiven) && (!here->BSIM4v5sccGiven) ) + { if((here->BSIM4v5scGiven) && (here->BSIM4v5sc > 0.0) ) + { T1 = here->BSIM4v5sc + Wdrn; + T2 = 1.0 / model->BSIM4v5scref; + here->BSIM4v5sca = model->BSIM4v5scref * model->BSIM4v5scref + / (here->BSIM4v5sc * T1); + here->BSIM4v5scb = ( (0.1 * here->BSIM4v5sc + 0.01 * model->BSIM4v5scref) + * exp(-10.0 * here->BSIM4v5sc * T2) + - (0.1 * T1 + 0.01 * model->BSIM4v5scref) + * exp(-10.0 * T1 * T2) ) / Wdrn; + here->BSIM4v5scc = ( (0.05 * here->BSIM4v5sc + 0.0025 * model->BSIM4v5scref) + * exp(-20.0 * here->BSIM4v5sc * T2) + - (0.05 * T1 + 0.0025 * model->BSIM4v5scref) + * exp(-20.0 * T1 * T2) ) / Wdrn; + } else { + //fprintf(stderr, "Warning: No WPE as none of SCA, SCB, SCC, SC is given and/or SC not positive.\n"); + } + } + sceff = here->BSIM4v5sca + model->BSIM4v5web * here->BSIM4v5scb + + model->BSIM4v5wec * here->BSIM4v5scc; + here->BSIM4v5vth0 += pParam->BSIM4v5kvth0we * sceff; + here->BSIM4v5k2 += pParam->BSIM4v5k2we * sceff; + T3 = 1.0 + pParam->BSIM4v5ku0we * sceff; + if (T3 <= 0.0) + { + fprintf(stderr, "Warning: ku0we = %g is negatively too high. Negative mobility! \n", T3); + T3 = 0.0; + } + here->BSIM4v5u0temp *= T3; + } + + /* adding delvto */ + here->BSIM4v5vth0 += here->BSIM4v5delvto; + here->BSIM4v5vfb = pParam->BSIM4v5vfb + model->BSIM4v5type * here->BSIM4v5delvto; + + /* Instance variables calculation */ + T3 = model->BSIM4v5type * here->BSIM4v5vth0 + - here->BSIM4v5vfb - pParam->BSIM4v5phi; + T4 = T3 + T3; + T5 = 2.5 * T3; + here->BSIM4v5vtfbphi1 = (model->BSIM4v5type == NMOS) ? T4 : T5; + if (here->BSIM4v5vtfbphi1 < 0.0) + here->BSIM4v5vtfbphi1 = 0.0; + + here->BSIM4v5vtfbphi2 = 4.0 * T3; + if (here->BSIM4v5vtfbphi2 < 0.0) + here->BSIM4v5vtfbphi2 = 0.0; + + if (here->BSIM4v5k2 < 0.0) + { T0 = 0.5 * pParam->BSIM4v5k1 / here->BSIM4v5k2; + here->BSIM4v5vbsc = 0.9 * (pParam->BSIM4v5phi - T0 * T0); + if (here->BSIM4v5vbsc > -3.0) + here->BSIM4v5vbsc = -3.0; + else if (here->BSIM4v5vbsc < -30.0) + here->BSIM4v5vbsc = -30.0; + } + else + here->BSIM4v5vbsc = -30.0; + if (here->BSIM4v5vbsc > pParam->BSIM4v5vbm) + here->BSIM4v5vbsc = pParam->BSIM4v5vbm; + here->BSIM4v5k2ox = here->BSIM4v5k2 * model->BSIM4v5toxe + / model->BSIM4v5toxm; + + here->BSIM4v5vfbzb = pParam->BSIM4v5vfbzbfactor + + model->BSIM4v5type * here->BSIM4v5vth0 ; + + here->BSIM4v5cgso = pParam->BSIM4v5cgso; + here->BSIM4v5cgdo = pParam->BSIM4v5cgdo; + + lnl = log(pParam->BSIM4v5leff * 1.0e6); + lnw = log(pParam->BSIM4v5weff * 1.0e6); + lnnf = log(here->BSIM4v5nf); + + bodymode = 5; + if( ( !model->BSIM4v5rbps0Given) || + ( !model->BSIM4v5rbpd0Given) ) + bodymode = 1; + else + if( (!model->BSIM4v5rbsbx0Given && !model->BSIM4v5rbsby0Given) || + (!model->BSIM4v5rbdbx0Given && !model->BSIM4v5rbdby0Given) ) + bodymode = 3; + + if(here->BSIM4v5rbodyMod == 2) + { + if (bodymode == 5) + { + rbsbx = exp( log(model->BSIM4v5rbsbx0) + model->BSIM4v5rbsdbxl * lnl + + model->BSIM4v5rbsdbxw * lnw + model->BSIM4v5rbsdbxnf * lnnf ); + rbsby = exp( log(model->BSIM4v5rbsby0) + model->BSIM4v5rbsdbyl * lnl + + model->BSIM4v5rbsdbyw * lnw + model->BSIM4v5rbsdbynf * lnnf ); + here->BSIM4v5rbsb = rbsbx * rbsby / (rbsbx + rbsby); + + + rbdbx = exp( log(model->BSIM4v5rbdbx0) + model->BSIM4v5rbsdbxl * lnl + + model->BSIM4v5rbsdbxw * lnw + model->BSIM4v5rbsdbxnf * lnnf ); + rbdby = exp( log(model->BSIM4v5rbdby0) + model->BSIM4v5rbsdbyl * lnl + + model->BSIM4v5rbsdbyw * lnw + model->BSIM4v5rbsdbynf * lnnf ); + here->BSIM4v5rbdb = rbdbx * rbdby / (rbdbx + rbdby); + } + + if ((bodymode == 3)|| (bodymode == 5)) + { + here->BSIM4v5rbps = exp( log(model->BSIM4v5rbps0) + model->BSIM4v5rbpsl * lnl + + model->BSIM4v5rbpsw * lnw + model->BSIM4v5rbpsnf * lnnf ); + here->BSIM4v5rbpd = exp( log(model->BSIM4v5rbpd0) + model->BSIM4v5rbpdl * lnl + + model->BSIM4v5rbpdw * lnw + model->BSIM4v5rbpdnf * lnnf ); + } + + rbpbx = exp( log(model->BSIM4v5rbpbx0) + model->BSIM4v5rbpbxl * lnl + + model->BSIM4v5rbpbxw * lnw + model->BSIM4v5rbpbxnf * lnnf ); + rbpby = exp( log(model->BSIM4v5rbpby0) + model->BSIM4v5rbpbyl * lnl + + model->BSIM4v5rbpbyw * lnw + model->BSIM4v5rbpbynf * lnnf ); + here->BSIM4v5rbpb = rbpbx*rbpby/(rbpbx + rbpby); + } + + + if ((here->BSIM4v5rbodyMod == 1 ) || ((here->BSIM4v5rbodyMod == 2 ) && (bodymode == 5)) ) + { if (here->BSIM4v5rbdb < 1.0e-3) + here->BSIM4v5grbdb = 1.0e3; /* in mho */ + else + here->BSIM4v5grbdb = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbdb; + if (here->BSIM4v5rbpb < 1.0e-3) + here->BSIM4v5grbpb = 1.0e3; + else + here->BSIM4v5grbpb = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbpb; + if (here->BSIM4v5rbps < 1.0e-3) + here->BSIM4v5grbps = 1.0e3; + else + here->BSIM4v5grbps = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbps; + if (here->BSIM4v5rbsb < 1.0e-3) + here->BSIM4v5grbsb = 1.0e3; + else + here->BSIM4v5grbsb = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbsb; + if (here->BSIM4v5rbpd < 1.0e-3) + here->BSIM4v5grbpd = 1.0e3; + else + here->BSIM4v5grbpd = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbpd; + + } + + if((here->BSIM4v5rbodyMod == 2) && (bodymode == 3)) + { + here->BSIM4v5grbdb = here->BSIM4v5grbsb = model->BSIM4v5gbmin; + if (here->BSIM4v5rbpb < 1.0e-3) + here->BSIM4v5grbpb = 1.0e3; + else + here->BSIM4v5grbpb = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbpb; + if (here->BSIM4v5rbps < 1.0e-3) + here->BSIM4v5grbps = 1.0e3; + else + here->BSIM4v5grbps = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbps; + if (here->BSIM4v5rbpd < 1.0e-3) + here->BSIM4v5grbpd = 1.0e3; + else + here->BSIM4v5grbpd = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbpd; + } + + if((here->BSIM4v5rbodyMod == 2) && (bodymode == 1)) + { + here->BSIM4v5grbdb = here->BSIM4v5grbsb = model->BSIM4v5gbmin; + here->BSIM4v5grbps = here->BSIM4v5grbpd = 1.0e3; + if (here->BSIM4v5rbpb < 1.0e-3) + here->BSIM4v5grbpb = 1.0e3; + else + here->BSIM4v5grbpb = model->BSIM4v5gbmin + 1.0 / here->BSIM4v5rbpb; + } + + + /* + * Process geomertry dependent parasitics + */ + + here->BSIM4v5grgeltd = model->BSIM4v5rshg * (here->BSIM4v5xgw + + pParam->BSIM4v5weffCJ / 3.0 / here->BSIM4v5ngcon) / + (here->BSIM4v5ngcon * here->BSIM4v5nf * + (Lnew - model->BSIM4v5xgl)); + if (here->BSIM4v5grgeltd > 0.0) + here->BSIM4v5grgeltd = 1.0 / here->BSIM4v5grgeltd; + else + { here->BSIM4v5grgeltd = 1.0e3; /* mho */ + if (here->BSIM4v5rgateMod != 0) + printf("Warning: The gate conductance reset to 1.0e3 mho.\n"); + } + + DMCGeff = model->BSIM4v5dmcg - model->BSIM4v5dmcgt; + DMCIeff = model->BSIM4v5dmci; + DMDGeff = model->BSIM4v5dmdg - model->BSIM4v5dmcgt; + + if (here->BSIM4v5sourcePerimeterGiven) + { if (model->BSIM4v5perMod == 0) + here->BSIM4v5Pseff = here->BSIM4v5sourcePerimeter; + else + here->BSIM4v5Pseff = here->BSIM4v5sourcePerimeter + - pParam->BSIM4v5weffCJ * here->BSIM4v5nf; + } + else + BSIM4v5PAeffGeo(here->BSIM4v5nf, here->BSIM4v5geoMod, here->BSIM4v5min, + pParam->BSIM4v5weffCJ, DMCGeff, DMCIeff, DMDGeff, + &(here->BSIM4v5Pseff), &dumPd, &dumAs, &dumAd); + + if (here->BSIM4v5drainPerimeterGiven) + { if (model->BSIM4v5perMod == 0) + here->BSIM4v5Pdeff = here->BSIM4v5drainPerimeter; + else + here->BSIM4v5Pdeff = here->BSIM4v5drainPerimeter + - pParam->BSIM4v5weffCJ * here->BSIM4v5nf; + } + else + BSIM4v5PAeffGeo(here->BSIM4v5nf, here->BSIM4v5geoMod, here->BSIM4v5min, + pParam->BSIM4v5weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &(here->BSIM4v5Pdeff), &dumAs, &dumAd); + + if (here->BSIM4v5sourceAreaGiven) + here->BSIM4v5Aseff = here->BSIM4v5sourceArea; + else + BSIM4v5PAeffGeo(here->BSIM4v5nf, here->BSIM4v5geoMod, here->BSIM4v5min, + pParam->BSIM4v5weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &dumPd, &(here->BSIM4v5Aseff), &dumAd); + + if (here->BSIM4v5drainAreaGiven) + here->BSIM4v5Adeff = here->BSIM4v5drainArea; + else + BSIM4v5PAeffGeo(here->BSIM4v5nf, here->BSIM4v5geoMod, here->BSIM4v5min, + pParam->BSIM4v5weffCJ, DMCGeff, DMCIeff, DMDGeff, + &dumPs, &dumPd, &dumAs, &(here->BSIM4v5Adeff)); + + /* Processing S/D resistance and conductance below */ + if(here->BSIM4v5sNodePrime != here->BSIM4v5sNode) + { + here->BSIM4v5sourceConductance = 0.0; + if(here->BSIM4v5sourceSquaresGiven) + { + here->BSIM4v5sourceConductance = model->BSIM4v5sheetResistance + * here->BSIM4v5sourceSquares; + } else if (here->BSIM4v5rgeoMod > 0) + { + BSIM4v5RdseffGeo(here->BSIM4v5nf, here->BSIM4v5geoMod, + here->BSIM4v5rgeoMod, here->BSIM4v5min, + pParam->BSIM4v5weffCJ, model->BSIM4v5sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 1, &(here->BSIM4v5sourceConductance)); + } else + { + here->BSIM4v5sourceConductance = 0.0; + } + + if (here->BSIM4v5sourceConductance > 0.0) + here->BSIM4v5sourceConductance = 1.0 + / here->BSIM4v5sourceConductance; + else + { + here->BSIM4v5sourceConductance = 1.0e3; /* mho */ + printf ("Warning: Source conductance reset to 1.0e3 mho.\n"); + } + } else + { + here->BSIM4v5sourceConductance = 0.0; + } + + if(here->BSIM4v5dNodePrime != here->BSIM4v5dNode) + { + here->BSIM4v5drainConductance = 0.0; + if(here->BSIM4v5drainSquaresGiven) + { + here->BSIM4v5drainConductance = model->BSIM4v5sheetResistance + * here->BSIM4v5drainSquares; + } else if (here->BSIM4v5rgeoMod > 0) + { + BSIM4v5RdseffGeo(here->BSIM4v5nf, here->BSIM4v5geoMod, + here->BSIM4v5rgeoMod, here->BSIM4v5min, + pParam->BSIM4v5weffCJ, model->BSIM4v5sheetResistance, + DMCGeff, DMCIeff, DMDGeff, 0, &(here->BSIM4v5drainConductance)); + } else + { + here->BSIM4v5drainConductance = 0.0; + } + + if (here->BSIM4v5drainConductance > 0.0) + here->BSIM4v5drainConductance = 1.0 + / here->BSIM4v5drainConductance; + else + { + here->BSIM4v5drainConductance = 1.0e3; /* mho */ + printf ("Warning: Drain conductance reset to 1.0e3 mho.\n"); + } + } else + { + here->BSIM4v5drainConductance = 0.0; + } + + /* End of Rsd processing */ + + + Nvtms = model->BSIM4v5vtm * model->BSIM4v5SjctEmissionCoeff; + if ((here->BSIM4v5Aseff <= 0.0) && (here->BSIM4v5Pseff <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM4v5Aseff * model->BSIM4v5SjctTempSatCurDensity + + here->BSIM4v5Pseff * model->BSIM4v5SjctSidewallTempSatCurDensity + + pParam->BSIM4v5weffCJ * here->BSIM4v5nf + * model->BSIM4v5SjctGateSidewallTempSatCurDensity; + } + if (SourceSatCurrent > 0.0) + { switch(model->BSIM4v5dioMod) + { case 0: + if ((model->BSIM4v5bvs / Nvtms) > EXP_THRESHOLD) + here->BSIM4v5XExpBVS = model->BSIM4v5xjbvs * MIN_EXP; + else + here->BSIM4v5XExpBVS = model->BSIM4v5xjbvs * exp(-model->BSIM4v5bvs / Nvtms); + break; + case 1: + BSIM4v5DioIjthVjmEval(Nvtms, model->BSIM4v5ijthsfwd, SourceSatCurrent, + 0.0, &(here->BSIM4v5vjsmFwd)); + here->BSIM4v5IVjsmFwd = SourceSatCurrent * exp(here->BSIM4v5vjsmFwd / Nvtms); + break; + case 2: + if ((model->BSIM4v5bvs / Nvtms) > EXP_THRESHOLD) + { here->BSIM4v5XExpBVS = model->BSIM4v5xjbvs * MIN_EXP; + tmp = MIN_EXP; + } + else + { here->BSIM4v5XExpBVS = exp(-model->BSIM4v5bvs / Nvtms); + tmp = here->BSIM4v5XExpBVS; + here->BSIM4v5XExpBVS *= model->BSIM4v5xjbvs; + } + + BSIM4v5DioIjthVjmEval(Nvtms, model->BSIM4v5ijthsfwd, SourceSatCurrent, + here->BSIM4v5XExpBVS, &(here->BSIM4v5vjsmFwd)); + T0 = exp(here->BSIM4v5vjsmFwd / Nvtms); + here->BSIM4v5IVjsmFwd = SourceSatCurrent * (T0 - here->BSIM4v5XExpBVS / T0 + + here->BSIM4v5XExpBVS - 1.0); + here->BSIM4v5SslpFwd = SourceSatCurrent + * (T0 + here->BSIM4v5XExpBVS / T0) / Nvtms; + + T2 = model->BSIM4v5ijthsrev / SourceSatCurrent; + if (T2 < 1.0) + { T2 = 10.0; + fprintf(stderr, "Warning: ijthsrev too small and set to 10 times IsbSat.\n"); + } + here->BSIM4v5vjsmRev = -model->BSIM4v5bvs + - Nvtms * log((T2 - 1.0) / model->BSIM4v5xjbvs); + T1 = model->BSIM4v5xjbvs * exp(-(model->BSIM4v5bvs + + here->BSIM4v5vjsmRev) / Nvtms); + here->BSIM4v5IVjsmRev = SourceSatCurrent * (1.0 + T1); + here->BSIM4v5SslpRev = -SourceSatCurrent * T1 / Nvtms; + break; + default: + printf("Specified dioMod = %d not matched\n", model->BSIM4v5dioMod); + } + } + + Nvtmd = model->BSIM4v5vtm * model->BSIM4v5DjctEmissionCoeff; + if ((here->BSIM4v5Adeff <= 0.0) && (here->BSIM4v5Pdeff <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM4v5Adeff * model->BSIM4v5DjctTempSatCurDensity + + here->BSIM4v5Pdeff * model->BSIM4v5DjctSidewallTempSatCurDensity + + pParam->BSIM4v5weffCJ * here->BSIM4v5nf + * model->BSIM4v5DjctGateSidewallTempSatCurDensity; + } + if (DrainSatCurrent > 0.0) + { switch(model->BSIM4v5dioMod) + { case 0: + if ((model->BSIM4v5bvd / Nvtmd) > EXP_THRESHOLD) + here->BSIM4v5XExpBVD = model->BSIM4v5xjbvd * MIN_EXP; + else + here->BSIM4v5XExpBVD = model->BSIM4v5xjbvd * exp(-model->BSIM4v5bvd / Nvtmd); + break; + case 1: + BSIM4v5DioIjthVjmEval(Nvtmd, model->BSIM4v5ijthdfwd, DrainSatCurrent, + 0.0, &(here->BSIM4v5vjdmFwd)); + here->BSIM4v5IVjdmFwd = DrainSatCurrent * exp(here->BSIM4v5vjdmFwd / Nvtmd); + break; + case 2: + if ((model->BSIM4v5bvd / Nvtmd) > EXP_THRESHOLD) + { here->BSIM4v5XExpBVD = model->BSIM4v5xjbvd * MIN_EXP; + tmp = MIN_EXP; + } + else + { here->BSIM4v5XExpBVD = exp(-model->BSIM4v5bvd / Nvtmd); + tmp = here->BSIM4v5XExpBVD; + here->BSIM4v5XExpBVD *= model->BSIM4v5xjbvd; + } + + BSIM4v5DioIjthVjmEval(Nvtmd, model->BSIM4v5ijthdfwd, DrainSatCurrent, + here->BSIM4v5XExpBVD, &(here->BSIM4v5vjdmFwd)); + T0 = exp(here->BSIM4v5vjdmFwd / Nvtmd); + here->BSIM4v5IVjdmFwd = DrainSatCurrent * (T0 - here->BSIM4v5XExpBVD / T0 + + here->BSIM4v5XExpBVD - 1.0); + here->BSIM4v5DslpFwd = DrainSatCurrent + * (T0 + here->BSIM4v5XExpBVD / T0) / Nvtmd; + + T2 = model->BSIM4v5ijthdrev / DrainSatCurrent; + if (T2 < 1.0) + { T2 = 10.0; + fprintf(stderr, "Warning: ijthdrev too small and set to 10 times IdbSat.\n"); + } + here->BSIM4v5vjdmRev = -model->BSIM4v5bvd + - Nvtmd * log((T2 - 1.0) / model->BSIM4v5xjbvd); /* bugfix */ + T1 = model->BSIM4v5xjbvd * exp(-(model->BSIM4v5bvd + + here->BSIM4v5vjdmRev) / Nvtmd); + here->BSIM4v5IVjdmRev = DrainSatCurrent * (1.0 + T1); + here->BSIM4v5DslpRev = -DrainSatCurrent * T1 / Nvtmd; + break; + default: + printf("Specified dioMod = %d not matched\n", model->BSIM4v5dioMod); + } + } + + /* GEDL current reverse bias */ + T0 = (TRatio - 1.0); + model->BSIM4v5njtstemp = model->BSIM4v5njts * (1.0 + model->BSIM4v5tnjts * T0); + model->BSIM4v5njtsswtemp = model->BSIM4v5njtssw * (1.0 + model->BSIM4v5tnjtssw * T0); + model->BSIM4v5njtsswgtemp = model->BSIM4v5njtsswg * (1.0 + model->BSIM4v5tnjtsswg * T0); + T7 = Eg0 / model->BSIM4v5vtm * T0; + T9 = model->BSIM4v5xtss * T7; + DEXP(T9, T1); + T9 = model->BSIM4v5xtsd * T7; + DEXP(T9, T2); + T9 = model->BSIM4v5xtssws * T7; + DEXP(T9, T3); + T9 = model->BSIM4v5xtsswd * T7; + DEXP(T9, T4); + T9 = model->BSIM4v5xtsswgs * T7; + DEXP(T9, T5); + T9 = model->BSIM4v5xtsswgd * T7; + DEXP(T9, T6); + + T10 = pParam->BSIM4v5weffCJ * here->BSIM4v5nf; + here->BSIM4v5SjctTempRevSatCur = T1 * here->BSIM4v5Aseff * model->BSIM4v5jtss; + here->BSIM4v5DjctTempRevSatCur = T2 * here->BSIM4v5Adeff * model->BSIM4v5jtsd; + here->BSIM4v5SswTempRevSatCur = T3 * here->BSIM4v5Pseff * model->BSIM4v5jtssws; + here->BSIM4v5DswTempRevSatCur = T4 * here->BSIM4v5Pdeff * model->BSIM4v5jtsswd; + here->BSIM4v5SswgTempRevSatCur = T5 * T10 * model->BSIM4v5jtsswgs; + here->BSIM4v5DswgTempRevSatCur = T6 * T10 * model->BSIM4v5jtsswgd; + + + if (BSIM4v5checkModel(model, here, ckt)) + { IFuid namarray[2]; + namarray[0] = model->BSIM4v5modName; + namarray[1] = here->BSIM4v5name; + (*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM4v5.5.0 parameter checking for %s in model %s", namarray); + return(E_BADPARM); + } + } /* End instance */ + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/b4v5trunc.c b/src/spicelib/devices/bsim4v5/b4v5trunc.c new file mode 100644 index 000000000..0432987a2 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/b4v5trunc.c @@ -0,0 +1,59 @@ +/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/ + +/********** + * Copyright 2004 Regents of the University of California. All rights reserved. + * File: b4trunc.c of BSIM4.5.0. + * Author: 2000 Weidong Liu + * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu. + * Project Director: Prof. Chenming Hu. + **********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim4v5def.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM4v5trunc(inModel,ckt,timeStep) +GENmodel *inModel; +CKTcircuit *ckt; +double *timeStep; +{ +BSIM4v5model *model = (BSIM4v5model*)inModel; +BSIM4v5instance *here; + +#ifdef STEPDEBUG + double debugtemp; +#endif /* STEPDEBUG */ + + for (; model != NULL; model = model->BSIM4v5nextModel) + { for (here = model->BSIM4v5instances; here != NULL; + here = here->BSIM4v5nextInstance) + { + if (here->BSIM4v5owner != ARCHme) continue; +#ifdef STEPDEBUG + debugtemp = *timeStep; +#endif /* STEPDEBUG */ + CKTterr(here->BSIM4v5qb,ckt,timeStep); + CKTterr(here->BSIM4v5qg,ckt,timeStep); + CKTterr(here->BSIM4v5qd,ckt,timeStep); + if (here->BSIM4v5trnqsMod) + CKTterr(here->BSIM4v5qcdump,ckt,timeStep); + if (here->BSIM4v5rbodyMod) + { CKTterr(here->BSIM4v5qbs,ckt,timeStep); + CKTterr(here->BSIM4v5qbd,ckt,timeStep); + } + if (here->BSIM4v5rgateMod == 3) + CKTterr(here->BSIM4v5qgmid,ckt,timeStep); +#ifdef STEPDEBUG + if(debugtemp != *timeStep) + { printf("device %s reduces step from %g to %g\n", + here->BSIM4v5name,debugtemp,*timeStep); + } +#endif /* STEPDEBUG */ + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim4v5/bsim4v5def.h b/src/spicelib/devices/bsim4v5/bsim4v5def.h new file mode 100644 index 000000000..87705012f --- /dev/null +++ b/src/spicelib/devices/bsim4v5/bsim4v5def.h @@ -0,0 +1,3193 @@ +/********** +Copyright 2005 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu. +Modified by Xuemei Xi, 11/15/2002. +Modified by Xuemei Xi, 05/09/2003. +Modified by Xuemei Xi, 03/04/2004. +Modified by Xuemei Xi, Mohan Dunga, 09/24/2004. +Modified by Xuemei Xi, 07/29/2005. +File: bsim4v5def.h +**********/ + +#ifndef BSIM4V5 +#define BSIM4V5 + +#include "ifsim.h" +#include "gendefs.h" +#include "cktdefs.h" +#include "complex.h" +#include "noisedef.h" + +typedef struct sBSIM4v5instance +{ + struct sBSIM4v5model *BSIM4v5modPtr; + struct sBSIM4v5instance *BSIM4v5nextInstance; + IFuid BSIM4v5name; + int BSIM4v5owner; /* Number of owner process */ + int BSIM4v5states; /* index into state table for this device */ + int BSIM4v5dNode; + int BSIM4v5gNodeExt; + int BSIM4v5sNode; + int BSIM4v5bNode; + int BSIM4v5dNodePrime; + int BSIM4v5gNodePrime; + int BSIM4v5gNodeMid; + int BSIM4v5sNodePrime; + int BSIM4v5bNodePrime; + int BSIM4v5dbNode; + int BSIM4v5sbNode; + int BSIM4v5qNode; + + double BSIM4v5ueff; + double BSIM4v5thetavth; + double BSIM4v5von; + double BSIM4v5vdsat; + double BSIM4v5cgdo; + double BSIM4v5qgdo; + double BSIM4v5cgso; + double BSIM4v5qgso; + double BSIM4v5grbsb; + double BSIM4v5grbdb; + double BSIM4v5grbpb; + double BSIM4v5grbps; + double BSIM4v5grbpd; + + double BSIM4v5vjsmFwd; + double BSIM4v5vjsmRev; + double BSIM4v5vjdmFwd; + double BSIM4v5vjdmRev; + double BSIM4v5XExpBVS; + double BSIM4v5XExpBVD; + double BSIM4v5SslpFwd; + double BSIM4v5SslpRev; + double BSIM4v5DslpFwd; + double BSIM4v5DslpRev; + double BSIM4v5IVjsmFwd; + double BSIM4v5IVjsmRev; + double BSIM4v5IVjdmFwd; + double BSIM4v5IVjdmRev; + + double BSIM4v5grgeltd; + double BSIM4v5Pseff; + double BSIM4v5Pdeff; + double BSIM4v5Aseff; + double BSIM4v5Adeff; + + double BSIM4v5l; + double BSIM4v5w; + double BSIM4v5drainArea; + double BSIM4v5sourceArea; + double BSIM4v5drainSquares; + double BSIM4v5sourceSquares; + double BSIM4v5drainPerimeter; + double BSIM4v5sourcePerimeter; + double BSIM4v5sourceConductance; + double BSIM4v5drainConductance; + /* stress effect instance param */ + double BSIM4v5sa; + double BSIM4v5sb; + double BSIM4v5sd; + double BSIM4v5sca; + double BSIM4v5scb; + double BSIM4v5scc; + double BSIM4v5sc; + + double BSIM4v5rbdb; + double BSIM4v5rbsb; + double BSIM4v5rbpb; + double BSIM4v5rbps; + double BSIM4v5rbpd; + + double BSIM4v5delvto; + double BSIM4v5xgw; + double BSIM4v5ngcon; + + /* added here to account stress effect instance dependence */ + double BSIM4v5u0temp; + double BSIM4v5vsattemp; + double BSIM4v5vth0; + double BSIM4v5vfb; + double BSIM4v5vfbzb; + double BSIM4v5vtfbphi1; + double BSIM4v5vtfbphi2; + double BSIM4v5k2; + double BSIM4v5vbsc; + double BSIM4v5k2ox; + double BSIM4v5eta0; + + double BSIM4v5icVDS; + double BSIM4v5icVGS; + double BSIM4v5icVBS; + double BSIM4v5nf; + double BSIM4v5m; + int BSIM4v5off; + int BSIM4v5mode; + int BSIM4v5trnqsMod; + int BSIM4v5acnqsMod; + int BSIM4v5rbodyMod; + int BSIM4v5rgateMod; + int BSIM4v5geoMod; + int BSIM4v5rgeoMod; + int BSIM4v5min; + + + /* OP point */ + double BSIM4v5Vgsteff; + double BSIM4v5vgs_eff; + double BSIM4v5vgd_eff; + double BSIM4v5dvgs_eff_dvg; + double BSIM4v5dvgd_eff_dvg; + double BSIM4v5Vdseff; + double BSIM4v5nstar; + double BSIM4v5Abulk; + double BSIM4v5EsatL; + double BSIM4v5AbovVgst2Vtm; + double BSIM4v5qinv; + double BSIM4v5cd; + double BSIM4v5cbs; + double BSIM4v5cbd; + double BSIM4v5csub; + double BSIM4v5Igidl; + double BSIM4v5Igisl; + double BSIM4v5gm; + double BSIM4v5gds; + double BSIM4v5gmbs; + double BSIM4v5gbd; + double BSIM4v5gbs; + + double BSIM4v5gbbs; + double BSIM4v5gbgs; + double BSIM4v5gbds; + double BSIM4v5ggidld; + double BSIM4v5ggidlg; + double BSIM4v5ggidls; + double BSIM4v5ggidlb; + double BSIM4v5ggisld; + double BSIM4v5ggislg; + double BSIM4v5ggisls; + double BSIM4v5ggislb; + + double BSIM4v5Igcs; + double BSIM4v5gIgcsg; + double BSIM4v5gIgcsd; + double BSIM4v5gIgcss; + double BSIM4v5gIgcsb; + double BSIM4v5Igcd; + double BSIM4v5gIgcdg; + double BSIM4v5gIgcdd; + double BSIM4v5gIgcds; + double BSIM4v5gIgcdb; + + double BSIM4v5Igs; + double BSIM4v5gIgsg; + double BSIM4v5gIgss; + double BSIM4v5Igd; + double BSIM4v5gIgdg; + double BSIM4v5gIgdd; + + double BSIM4v5Igb; + double BSIM4v5gIgbg; + double BSIM4v5gIgbd; + double BSIM4v5gIgbs; + double BSIM4v5gIgbb; + + double BSIM4v5grdsw; + double BSIM4v5IdovVds; + double BSIM4v5gcrg; + double BSIM4v5gcrgd; + double BSIM4v5gcrgg; + double BSIM4v5gcrgs; + double BSIM4v5gcrgb; + + double BSIM4v5gstot; + double BSIM4v5gstotd; + double BSIM4v5gstotg; + double BSIM4v5gstots; + double BSIM4v5gstotb; + + double BSIM4v5gdtot; + double BSIM4v5gdtotd; + double BSIM4v5gdtotg; + double BSIM4v5gdtots; + double BSIM4v5gdtotb; + + double BSIM4v5cggb; + double BSIM4v5cgdb; + double BSIM4v5cgsb; + double BSIM4v5cbgb; + double BSIM4v5cbdb; + double BSIM4v5cbsb; + double BSIM4v5cdgb; + double BSIM4v5cddb; + double BSIM4v5cdsb; + double BSIM4v5csgb; + double BSIM4v5csdb; + double BSIM4v5cssb; + double BSIM4v5cgbb; + double BSIM4v5cdbb; + double BSIM4v5csbb; + double BSIM4v5cbbb; + double BSIM4v5capbd; + double BSIM4v5capbs; + + double BSIM4v5cqgb; + double BSIM4v5cqdb; + double BSIM4v5cqsb; + double BSIM4v5cqbb; + + double BSIM4v5qgate; + double BSIM4v5qbulk; + double BSIM4v5qdrn; + double BSIM4v5qsrc; + double BSIM4v5qdef; + + double BSIM4v5qchqs; + double BSIM4v5taunet; + double BSIM4v5gtau; + double BSIM4v5gtg; + double BSIM4v5gtd; + double BSIM4v5gts; + double BSIM4v5gtb; + double BSIM4v5SjctTempRevSatCur; + double BSIM4v5DjctTempRevSatCur; + double BSIM4v5SswTempRevSatCur; + double BSIM4v5DswTempRevSatCur; + double BSIM4v5SswgTempRevSatCur; + double BSIM4v5DswgTempRevSatCur; + + struct bsim4v5SizeDependParam *pParam; + + unsigned BSIM4v5lGiven :1; + unsigned BSIM4v5wGiven :1; + unsigned BSIM4v5mGiven :1; + unsigned BSIM4v5nfGiven :1; + unsigned BSIM4v5minGiven :1; + unsigned BSIM4v5drainAreaGiven :1; + unsigned BSIM4v5sourceAreaGiven :1; + unsigned BSIM4v5drainSquaresGiven :1; + unsigned BSIM4v5sourceSquaresGiven :1; + unsigned BSIM4v5drainPerimeterGiven :1; + unsigned BSIM4v5sourcePerimeterGiven :1; + unsigned BSIM4v5saGiven :1; + unsigned BSIM4v5sbGiven :1; + unsigned BSIM4v5sdGiven :1; + unsigned BSIM4v5scaGiven :1; + unsigned BSIM4v5scbGiven :1; + unsigned BSIM4v5sccGiven :1; + unsigned BSIM4v5scGiven :1; + unsigned BSIM4v5rbdbGiven :1; + unsigned BSIM4v5rbsbGiven :1; + unsigned BSIM4v5rbpbGiven :1; + unsigned BSIM4v5rbpdGiven :1; + unsigned BSIM4v5rbpsGiven :1; + unsigned BSIM4v5delvtoGiven :1; + unsigned BSIM4v5xgwGiven :1; + unsigned BSIM4v5ngconGiven :1; + unsigned BSIM4v5icVDSGiven :1; + unsigned BSIM4v5icVGSGiven :1; + unsigned BSIM4v5icVBSGiven :1; + unsigned BSIM4v5trnqsModGiven :1; + unsigned BSIM4v5acnqsModGiven :1; + unsigned BSIM4v5rbodyModGiven :1; + unsigned BSIM4v5rgateModGiven :1; + unsigned BSIM4v5geoModGiven :1; + unsigned BSIM4v5rgeoModGiven :1; + + + double *BSIM4v5DPdPtr; + double *BSIM4v5DPdpPtr; + double *BSIM4v5DPgpPtr; + double *BSIM4v5DPgmPtr; + double *BSIM4v5DPspPtr; + double *BSIM4v5DPbpPtr; + double *BSIM4v5DPdbPtr; + + double *BSIM4v5DdPtr; + double *BSIM4v5DdpPtr; + + double *BSIM4v5GPdpPtr; + double *BSIM4v5GPgpPtr; + double *BSIM4v5GPgmPtr; + double *BSIM4v5GPgePtr; + double *BSIM4v5GPspPtr; + double *BSIM4v5GPbpPtr; + + double *BSIM4v5GMdpPtr; + double *BSIM4v5GMgpPtr; + double *BSIM4v5GMgmPtr; + double *BSIM4v5GMgePtr; + double *BSIM4v5GMspPtr; + double *BSIM4v5GMbpPtr; + + double *BSIM4v5GEdpPtr; + double *BSIM4v5GEgpPtr; + double *BSIM4v5GEgmPtr; + double *BSIM4v5GEgePtr; + double *BSIM4v5GEspPtr; + double *BSIM4v5GEbpPtr; + + double *BSIM4v5SPdpPtr; + double *BSIM4v5SPgpPtr; + double *BSIM4v5SPgmPtr; + double *BSIM4v5SPsPtr; + double *BSIM4v5SPspPtr; + double *BSIM4v5SPbpPtr; + double *BSIM4v5SPsbPtr; + + double *BSIM4v5SspPtr; + double *BSIM4v5SsPtr; + + double *BSIM4v5BPdpPtr; + double *BSIM4v5BPgpPtr; + double *BSIM4v5BPgmPtr; + double *BSIM4v5BPspPtr; + double *BSIM4v5BPdbPtr; + double *BSIM4v5BPbPtr; + double *BSIM4v5BPsbPtr; + double *BSIM4v5BPbpPtr; + + double *BSIM4v5DBdpPtr; + double *BSIM4v5DBdbPtr; + double *BSIM4v5DBbpPtr; + double *BSIM4v5DBbPtr; + + double *BSIM4v5SBspPtr; + double *BSIM4v5SBbpPtr; + double *BSIM4v5SBbPtr; + double *BSIM4v5SBsbPtr; + + double *BSIM4v5BdbPtr; + double *BSIM4v5BbpPtr; + double *BSIM4v5BsbPtr; + double *BSIM4v5BbPtr; + + double *BSIM4v5DgpPtr; + double *BSIM4v5DspPtr; + double *BSIM4v5DbpPtr; + double *BSIM4v5SdpPtr; + double *BSIM4v5SgpPtr; + double *BSIM4v5SbpPtr; + + double *BSIM4v5QdpPtr; + double *BSIM4v5QgpPtr; + double *BSIM4v5QspPtr; + double *BSIM4v5QbpPtr; + double *BSIM4v5QqPtr; + double *BSIM4v5DPqPtr; + double *BSIM4v5GPqPtr; + double *BSIM4v5SPqPtr; + + +#define BSIM4v5vbd BSIM4v5states+ 0 +#define BSIM4v5vbs BSIM4v5states+ 1 +#define BSIM4v5vgs BSIM4v5states+ 2 +#define BSIM4v5vds BSIM4v5states+ 3 +#define BSIM4v5vdbs BSIM4v5states+ 4 +#define BSIM4v5vdbd BSIM4v5states+ 5 +#define BSIM4v5vsbs BSIM4v5states+ 6 +#define BSIM4v5vges BSIM4v5states+ 7 +#define BSIM4v5vgms BSIM4v5states+ 8 +#define BSIM4v5vses BSIM4v5states+ 9 +#define BSIM4v5vdes BSIM4v5states+ 10 + +#define BSIM4v5qb BSIM4v5states+ 11 +#define BSIM4v5cqb BSIM4v5states+ 12 +#define BSIM4v5qg BSIM4v5states+ 13 +#define BSIM4v5cqg BSIM4v5states+ 14 +#define BSIM4v5qd BSIM4v5states+ 15 +#define BSIM4v5cqd BSIM4v5states+ 16 +#define BSIM4v5qgmid BSIM4v5states+ 17 +#define BSIM4v5cqgmid BSIM4v5states+ 18 + +#define BSIM4v5qbs BSIM4v5states+ 19 +#define BSIM4v5cqbs BSIM4v5states+ 20 +#define BSIM4v5qbd BSIM4v5states+ 21 +#define BSIM4v5cqbd BSIM4v5states+ 22 + +#define BSIM4v5qcheq BSIM4v5states+ 23 +#define BSIM4v5cqcheq BSIM4v5states+ 24 +#define BSIM4v5qcdump BSIM4v5states+ 25 +#define BSIM4v5cqcdump BSIM4v5states+ 26 +#define BSIM4v5qdef BSIM4v5states+ 27 +#define BSIM4v5qs BSIM4v5states+ 28 + +#define BSIM4v5numStates 29 + + +/* indices to the array of BSIM4v5 NOISE SOURCES */ + +#define BSIM4v5RDNOIZ 0 +#define BSIM4v5RSNOIZ 1 +#define BSIM4v5RGNOIZ 2 +#define BSIM4v5RBPSNOIZ 3 +#define BSIM4v5RBPDNOIZ 4 +#define BSIM4v5RBPBNOIZ 5 +#define BSIM4v5RBSBNOIZ 6 +#define BSIM4v5RBDBNOIZ 7 +#define BSIM4v5IDNOIZ 8 +#define BSIM4v5FLNOIZ 9 +#define BSIM4v5IGSNOIZ 10 +#define BSIM4v5IGDNOIZ 11 +#define BSIM4v5IGBNOIZ 12 +#define BSIM4v5TOTNOIZ 13 + +#define BSIM4v5NSRCS 14 /* Number of BSIM4v5 noise sources */ + +#ifndef NONOISE + double BSIM4v5nVar[NSTATVARS][BSIM4v5NSRCS]; +#else /* NONOISE */ + double **BSIM4v5nVar; +#endif /* NONOISE */ + +} BSIM4v5instance ; + +struct bsim4v5SizeDependParam +{ + double Width; + double Length; + double NFinger; + + double BSIM4v5cdsc; + double BSIM4v5cdscb; + double BSIM4v5cdscd; + double BSIM4v5cit; + double BSIM4v5nfactor; + double BSIM4v5xj; + double BSIM4v5vsat; + double BSIM4v5at; + double BSIM4v5a0; + double BSIM4v5ags; + double BSIM4v5a1; + double BSIM4v5a2; + double BSIM4v5keta; + double BSIM4v5nsub; + double BSIM4v5ndep; + double BSIM4v5nsd; + double BSIM4v5phin; + double BSIM4v5ngate; + double BSIM4v5gamma1; + double BSIM4v5gamma2; + double BSIM4v5vbx; + double BSIM4v5vbi; + double BSIM4v5vbm; + double BSIM4v5xt; + double BSIM4v5phi; + double BSIM4v5litl; + double BSIM4v5k1; + double BSIM4v5kt1; + double BSIM4v5kt1l; + double BSIM4v5kt2; + double BSIM4v5k2; + double BSIM4v5k3; + double BSIM4v5k3b; + double BSIM4v5w0; + double BSIM4v5dvtp0; + double BSIM4v5dvtp1; + double BSIM4v5lpe0; + double BSIM4v5lpeb; + double BSIM4v5dvt0; + double BSIM4v5dvt1; + double BSIM4v5dvt2; + double BSIM4v5dvt0w; + double BSIM4v5dvt1w; + double BSIM4v5dvt2w; + double BSIM4v5drout; + double BSIM4v5dsub; + double BSIM4v5vth0; + double BSIM4v5ua; + double BSIM4v5ua1; + double BSIM4v5ub; + double BSIM4v5ub1; + double BSIM4v5uc; + double BSIM4v5uc1; + double BSIM4v5ud; + double BSIM4v5ud1; + double BSIM4v5up; + double BSIM4v5lp; + double BSIM4v5u0; + double BSIM4v5eu; + double BSIM4v5ute; + double BSIM4v5voff; + double BSIM4v5tvoff; + double BSIM4v5minv; + double BSIM4v5vfb; + double BSIM4v5delta; + double BSIM4v5rdsw; + double BSIM4v5rds0; + double BSIM4v5rs0; + double BSIM4v5rd0; + double BSIM4v5rsw; + double BSIM4v5rdw; + double BSIM4v5prwg; + double BSIM4v5prwb; + double BSIM4v5prt; + double BSIM4v5eta0; + double BSIM4v5etab; + double BSIM4v5pclm; + double BSIM4v5pdibl1; + double BSIM4v5pdibl2; + double BSIM4v5pdiblb; + double BSIM4v5fprout; + double BSIM4v5pdits; + double BSIM4v5pditsd; + double BSIM4v5pscbe1; + double BSIM4v5pscbe2; + double BSIM4v5pvag; + double BSIM4v5wr; + double BSIM4v5dwg; + double BSIM4v5dwb; + double BSIM4v5b0; + double BSIM4v5b1; + double BSIM4v5alpha0; + double BSIM4v5alpha1; + double BSIM4v5beta0; + double BSIM4v5agidl; + double BSIM4v5bgidl; + double BSIM4v5cgidl; + double BSIM4v5egidl; + double BSIM4v5aigc; + double BSIM4v5bigc; + double BSIM4v5cigc; + double BSIM4v5aigsd; + double BSIM4v5bigsd; + double BSIM4v5cigsd; + double BSIM4v5aigbacc; + double BSIM4v5bigbacc; + double BSIM4v5cigbacc; + double BSIM4v5aigbinv; + double BSIM4v5bigbinv; + double BSIM4v5cigbinv; + double BSIM4v5nigc; + double BSIM4v5nigbacc; + double BSIM4v5nigbinv; + double BSIM4v5ntox; + double BSIM4v5eigbinv; + double BSIM4v5pigcd; + double BSIM4v5poxedge; + double BSIM4v5xrcrg1; + double BSIM4v5xrcrg2; + double BSIM4v5lambda; /* overshoot */ + double BSIM4v5vtl; /* thermal velocity limit */ + double BSIM4v5xn; /* back scattering parameter */ + double BSIM4v5lc; /* back scattering parameter */ + double BSIM4v5tfactor; /* ballistic transportation factor */ + double BSIM4v5vfbsdoff; /* S/D flatband offset voltage */ + double BSIM4v5tvfbsdoff; + +/* added for stress effect */ + double BSIM4v5ku0; + double BSIM4v5kvth0; + double BSIM4v5ku0temp; + double BSIM4v5rho_ref; + double BSIM4v5inv_od_ref; +/* added for well proximity effect */ + double BSIM4v5kvth0we; + double BSIM4v5k2we; + double BSIM4v5ku0we; + + /* CV model */ + double BSIM4v5cgsl; + double BSIM4v5cgdl; + double BSIM4v5ckappas; + double BSIM4v5ckappad; + double BSIM4v5cf; + double BSIM4v5clc; + double BSIM4v5cle; + double BSIM4v5vfbcv; + double BSIM4v5noff; + double BSIM4v5voffcv; + double BSIM4v5acde; + double BSIM4v5moin; + +/* Pre-calculated constants */ + + double BSIM4v5dw; + double BSIM4v5dl; + double BSIM4v5leff; + double BSIM4v5weff; + + double BSIM4v5dwc; + double BSIM4v5dlc; + double BSIM4v5dlcig; + double BSIM4v5dwj; + double BSIM4v5leffCV; + double BSIM4v5weffCV; + double BSIM4v5weffCJ; + double BSIM4v5abulkCVfactor; + double BSIM4v5cgso; + double BSIM4v5cgdo; + double BSIM4v5cgbo; + + double BSIM4v5u0temp; + double BSIM4v5vsattemp; + double BSIM4v5sqrtPhi; + double BSIM4v5phis3; + double BSIM4v5Xdep0; + double BSIM4v5sqrtXdep0; + double BSIM4v5theta0vb0; + double BSIM4v5thetaRout; + double BSIM4v5mstar; + double BSIM4v5voffcbn; + double BSIM4v5rdswmin; + double BSIM4v5rdwmin; + double BSIM4v5rswmin; + double BSIM4v5vfbsd; + + double BSIM4v5cof1; + double BSIM4v5cof2; + double BSIM4v5cof3; + double BSIM4v5cof4; + double BSIM4v5cdep0; + double BSIM4v5ToxRatio; + double BSIM4v5Aechvb; + double BSIM4v5Bechvb; + double BSIM4v5ToxRatioEdge; + double BSIM4v5AechvbEdge; + double BSIM4v5BechvbEdge; + double BSIM4v5ldeb; + double BSIM4v5k1ox; + double BSIM4v5k2ox; + double BSIM4v5vfbzbfactor; + + + struct bsim4v5SizeDependParam *pNext; +}; + + +typedef struct sBSIM4v5model +{ + int BSIM4v5modType; + struct sBSIM4v5model *BSIM4v5nextModel; + BSIM4v5instance *BSIM4v5instances; + IFuid BSIM4v5modName; + int BSIM4v5type; + + int BSIM4v5mobMod; + int BSIM4v5capMod; + int BSIM4v5dioMod; + int BSIM4v5trnqsMod; + int BSIM4v5acnqsMod; + int BSIM4v5fnoiMod; + int BSIM4v5tnoiMod; + int BSIM4v5rdsMod; + int BSIM4v5rbodyMod; + int BSIM4v5rgateMod; + int BSIM4v5perMod; + int BSIM4v5geoMod; + int BSIM4v5igcMod; + int BSIM4v5igbMod; + int BSIM4v5tempMod; + int BSIM4v5binUnit; + int BSIM4v5paramChk; + char *BSIM4v5version; + double BSIM4v5toxe; + double BSIM4v5toxp; + double BSIM4v5toxm; + double BSIM4v5dtox; + double BSIM4v5epsrox; + double BSIM4v5cdsc; + double BSIM4v5cdscb; + double BSIM4v5cdscd; + double BSIM4v5cit; + double BSIM4v5nfactor; + double BSIM4v5xj; + double BSIM4v5vsat; + double BSIM4v5at; + double BSIM4v5a0; + double BSIM4v5ags; + double BSIM4v5a1; + double BSIM4v5a2; + double BSIM4v5keta; + double BSIM4v5nsub; + double BSIM4v5ndep; + double BSIM4v5nsd; + double BSIM4v5phin; + double BSIM4v5ngate; + double BSIM4v5gamma1; + double BSIM4v5gamma2; + double BSIM4v5vbx; + double BSIM4v5vbm; + double BSIM4v5xt; + double BSIM4v5k1; + double BSIM4v5kt1; + double BSIM4v5kt1l; + double BSIM4v5kt2; + double BSIM4v5k2; + double BSIM4v5k3; + double BSIM4v5k3b; + double BSIM4v5w0; + double BSIM4v5dvtp0; + double BSIM4v5dvtp1; + double BSIM4v5lpe0; + double BSIM4v5lpeb; + double BSIM4v5dvt0; + double BSIM4v5dvt1; + double BSIM4v5dvt2; + double BSIM4v5dvt0w; + double BSIM4v5dvt1w; + double BSIM4v5dvt2w; + double BSIM4v5drout; + double BSIM4v5dsub; + double BSIM4v5vth0; + double BSIM4v5eu; + double BSIM4v5ua; + double BSIM4v5ua1; + double BSIM4v5ub; + double BSIM4v5ub1; + double BSIM4v5uc; + double BSIM4v5uc1; + double BSIM4v5ud; + double BSIM4v5ud1; + double BSIM4v5up; + double BSIM4v5lp; + double BSIM4v5u0; + double BSIM4v5ute; + double BSIM4v5voff; + double BSIM4v5tvoff; + double BSIM4v5minv; + double BSIM4v5voffl; + double BSIM4v5delta; + double BSIM4v5rdsw; + double BSIM4v5rdswmin; + double BSIM4v5rdwmin; + double BSIM4v5rswmin; + double BSIM4v5rsw; + double BSIM4v5rdw; + double BSIM4v5prwg; + double BSIM4v5prwb; + double BSIM4v5prt; + double BSIM4v5eta0; + double BSIM4v5etab; + double BSIM4v5pclm; + double BSIM4v5pdibl1; + double BSIM4v5pdibl2; + double BSIM4v5pdiblb; + double BSIM4v5fprout; + double BSIM4v5pdits; + double BSIM4v5pditsd; + double BSIM4v5pditsl; + double BSIM4v5pscbe1; + double BSIM4v5pscbe2; + double BSIM4v5pvag; + double BSIM4v5wr; + double BSIM4v5dwg; + double BSIM4v5dwb; + double BSIM4v5b0; + double BSIM4v5b1; + double BSIM4v5alpha0; + double BSIM4v5alpha1; + double BSIM4v5beta0; + double BSIM4v5agidl; + double BSIM4v5bgidl; + double BSIM4v5cgidl; + double BSIM4v5egidl; + double BSIM4v5aigc; + double BSIM4v5bigc; + double BSIM4v5cigc; + double BSIM4v5aigsd; + double BSIM4v5bigsd; + double BSIM4v5cigsd; + double BSIM4v5aigbacc; + double BSIM4v5bigbacc; + double BSIM4v5cigbacc; + double BSIM4v5aigbinv; + double BSIM4v5bigbinv; + double BSIM4v5cigbinv; + double BSIM4v5nigc; + double BSIM4v5nigbacc; + double BSIM4v5nigbinv; + double BSIM4v5ntox; + double BSIM4v5eigbinv; + double BSIM4v5pigcd; + double BSIM4v5poxedge; + double BSIM4v5toxref; + double BSIM4v5ijthdfwd; + double BSIM4v5ijthsfwd; + double BSIM4v5ijthdrev; + double BSIM4v5ijthsrev; + double BSIM4v5xjbvd; + double BSIM4v5xjbvs; + double BSIM4v5bvd; + double BSIM4v5bvs; + + double BSIM4v5jtss; + double BSIM4v5jtsd; + double BSIM4v5jtssws; + double BSIM4v5jtsswd; + double BSIM4v5jtsswgs; + double BSIM4v5jtsswgd; + double BSIM4v5njts; + double BSIM4v5njtssw; + double BSIM4v5njtsswg; + double BSIM4v5xtss; + double BSIM4v5xtsd; + double BSIM4v5xtssws; + double BSIM4v5xtsswd; + double BSIM4v5xtsswgs; + double BSIM4v5xtsswgd; + double BSIM4v5tnjts; + double BSIM4v5tnjtssw; + double BSIM4v5tnjtsswg; + double BSIM4v5vtss; + double BSIM4v5vtsd; + double BSIM4v5vtssws; + double BSIM4v5vtsswd; + double BSIM4v5vtsswgs; + double BSIM4v5vtsswgd; + + double BSIM4v5xrcrg1; + double BSIM4v5xrcrg2; + double BSIM4v5lambda; + double BSIM4v5vtl; + double BSIM4v5lc; + double BSIM4v5xn; + double BSIM4v5vfbsdoff; /* S/D flatband offset voltage */ + double BSIM4v5lintnoi; /* lint offset for noise calculation */ + double BSIM4v5tvfbsdoff; + + double BSIM4v5vfb; + double BSIM4v5gbmin; + double BSIM4v5rbdb; + double BSIM4v5rbsb; + double BSIM4v5rbpb; + double BSIM4v5rbps; + double BSIM4v5rbpd; + + double BSIM4v5rbps0; + double BSIM4v5rbpsl; + double BSIM4v5rbpsw; + double BSIM4v5rbpsnf; + + double BSIM4v5rbpd0; + double BSIM4v5rbpdl; + double BSIM4v5rbpdw; + double BSIM4v5rbpdnf; + + double BSIM4v5rbpbx0; + double BSIM4v5rbpbxl; + double BSIM4v5rbpbxw; + double BSIM4v5rbpbxnf; + double BSIM4v5rbpby0; + double BSIM4v5rbpbyl; + double BSIM4v5rbpbyw; + double BSIM4v5rbpbynf; + + double BSIM4v5rbsbx0; + double BSIM4v5rbsby0; + double BSIM4v5rbdbx0; + double BSIM4v5rbdby0; + + double BSIM4v5rbsdbxl; + double BSIM4v5rbsdbxw; + double BSIM4v5rbsdbxnf; + double BSIM4v5rbsdbyl; + double BSIM4v5rbsdbyw; + double BSIM4v5rbsdbynf; + + double BSIM4v5tnoia; + double BSIM4v5tnoib; + double BSIM4v5rnoia; + double BSIM4v5rnoib; + double BSIM4v5ntnoi; + + /* CV model and Parasitics */ + double BSIM4v5cgsl; + double BSIM4v5cgdl; + double BSIM4v5ckappas; + double BSIM4v5ckappad; + double BSIM4v5cf; + double BSIM4v5vfbcv; + double BSIM4v5clc; + double BSIM4v5cle; + double BSIM4v5dwc; + double BSIM4v5dlc; + double BSIM4v5xw; + double BSIM4v5xl; + double BSIM4v5dlcig; + double BSIM4v5dwj; + double BSIM4v5noff; + double BSIM4v5voffcv; + double BSIM4v5acde; + double BSIM4v5moin; + double BSIM4v5tcj; + double BSIM4v5tcjsw; + double BSIM4v5tcjswg; + double BSIM4v5tpb; + double BSIM4v5tpbsw; + double BSIM4v5tpbswg; + double BSIM4v5dmcg; + double BSIM4v5dmci; + double BSIM4v5dmdg; + double BSIM4v5dmcgt; + double BSIM4v5xgw; + double BSIM4v5xgl; + double BSIM4v5rshg; + double BSIM4v5ngcon; + + /* Length Dependence */ + double BSIM4v5lcdsc; + double BSIM4v5lcdscb; + double BSIM4v5lcdscd; + double BSIM4v5lcit; + double BSIM4v5lnfactor; + double BSIM4v5lxj; + double BSIM4v5lvsat; + double BSIM4v5lat; + double BSIM4v5la0; + double BSIM4v5lags; + double BSIM4v5la1; + double BSIM4v5la2; + double BSIM4v5lketa; + double BSIM4v5lnsub; + double BSIM4v5lndep; + double BSIM4v5lnsd; + double BSIM4v5lphin; + double BSIM4v5lngate; + double BSIM4v5lgamma1; + double BSIM4v5lgamma2; + double BSIM4v5lvbx; + double BSIM4v5lvbm; + double BSIM4v5lxt; + double BSIM4v5lk1; + double BSIM4v5lkt1; + double BSIM4v5lkt1l; + double BSIM4v5lkt2; + double BSIM4v5lk2; + double BSIM4v5lk3; + double BSIM4v5lk3b; + double BSIM4v5lw0; + double BSIM4v5ldvtp0; + double BSIM4v5ldvtp1; + double BSIM4v5llpe0; + double BSIM4v5llpeb; + double BSIM4v5ldvt0; + double BSIM4v5ldvt1; + double BSIM4v5ldvt2; + double BSIM4v5ldvt0w; + double BSIM4v5ldvt1w; + double BSIM4v5ldvt2w; + double BSIM4v5ldrout; + double BSIM4v5ldsub; + double BSIM4v5lvth0; + double BSIM4v5lua; + double BSIM4v5lua1; + double BSIM4v5lub; + double BSIM4v5lub1; + double BSIM4v5luc; + double BSIM4v5luc1; + double BSIM4v5lud; + double BSIM4v5lud1; + double BSIM4v5lup; + double BSIM4v5llp; + double BSIM4v5lu0; + double BSIM4v5leu; + double BSIM4v5lute; + double BSIM4v5lvoff; + double BSIM4v5ltvoff; + double BSIM4v5lminv; + double BSIM4v5ldelta; + double BSIM4v5lrdsw; + double BSIM4v5lrsw; + double BSIM4v5lrdw; + double BSIM4v5lprwg; + double BSIM4v5lprwb; + double BSIM4v5lprt; + double BSIM4v5leta0; + double BSIM4v5letab; + double BSIM4v5lpclm; + double BSIM4v5lpdibl1; + double BSIM4v5lpdibl2; + double BSIM4v5lpdiblb; + double BSIM4v5lfprout; + double BSIM4v5lpdits; + double BSIM4v5lpditsd; + double BSIM4v5lpscbe1; + double BSIM4v5lpscbe2; + double BSIM4v5lpvag; + double BSIM4v5lwr; + double BSIM4v5ldwg; + double BSIM4v5ldwb; + double BSIM4v5lb0; + double BSIM4v5lb1; + double BSIM4v5lalpha0; + double BSIM4v5lalpha1; + double BSIM4v5lbeta0; + double BSIM4v5lvfb; + double BSIM4v5lagidl; + double BSIM4v5lbgidl; + double BSIM4v5lcgidl; + double BSIM4v5legidl; + double BSIM4v5laigc; + double BSIM4v5lbigc; + double BSIM4v5lcigc; + double BSIM4v5laigsd; + double BSIM4v5lbigsd; + double BSIM4v5lcigsd; + double BSIM4v5laigbacc; + double BSIM4v5lbigbacc; + double BSIM4v5lcigbacc; + double BSIM4v5laigbinv; + double BSIM4v5lbigbinv; + double BSIM4v5lcigbinv; + double BSIM4v5lnigc; + double BSIM4v5lnigbacc; + double BSIM4v5lnigbinv; + double BSIM4v5lntox; + double BSIM4v5leigbinv; + double BSIM4v5lpigcd; + double BSIM4v5lpoxedge; + double BSIM4v5lxrcrg1; + double BSIM4v5lxrcrg2; + double BSIM4v5llambda; + double BSIM4v5lvtl; + double BSIM4v5lxn; + double BSIM4v5lvfbsdoff; + double BSIM4v5ltvfbsdoff; + + /* CV model */ + double BSIM4v5lcgsl; + double BSIM4v5lcgdl; + double BSIM4v5lckappas; + double BSIM4v5lckappad; + double BSIM4v5lcf; + double BSIM4v5lclc; + double BSIM4v5lcle; + double BSIM4v5lvfbcv; + double BSIM4v5lnoff; + double BSIM4v5lvoffcv; + double BSIM4v5lacde; + double BSIM4v5lmoin; + + /* Width Dependence */ + double BSIM4v5wcdsc; + double BSIM4v5wcdscb; + double BSIM4v5wcdscd; + double BSIM4v5wcit; + double BSIM4v5wnfactor; + double BSIM4v5wxj; + double BSIM4v5wvsat; + double BSIM4v5wat; + double BSIM4v5wa0; + double BSIM4v5wags; + double BSIM4v5wa1; + double BSIM4v5wa2; + double BSIM4v5wketa; + double BSIM4v5wnsub; + double BSIM4v5wndep; + double BSIM4v5wnsd; + double BSIM4v5wphin; + double BSIM4v5wngate; + double BSIM4v5wgamma1; + double BSIM4v5wgamma2; + double BSIM4v5wvbx; + double BSIM4v5wvbm; + double BSIM4v5wxt; + double BSIM4v5wk1; + double BSIM4v5wkt1; + double BSIM4v5wkt1l; + double BSIM4v5wkt2; + double BSIM4v5wk2; + double BSIM4v5wk3; + double BSIM4v5wk3b; + double BSIM4v5ww0; + double BSIM4v5wdvtp0; + double BSIM4v5wdvtp1; + double BSIM4v5wlpe0; + double BSIM4v5wlpeb; + double BSIM4v5wdvt0; + double BSIM4v5wdvt1; + double BSIM4v5wdvt2; + double BSIM4v5wdvt0w; + double BSIM4v5wdvt1w; + double BSIM4v5wdvt2w; + double BSIM4v5wdrout; + double BSIM4v5wdsub; + double BSIM4v5wvth0; + double BSIM4v5wua; + double BSIM4v5wua1; + double BSIM4v5wub; + double BSIM4v5wub1; + double BSIM4v5wuc; + double BSIM4v5wuc1; + double BSIM4v5wud; + double BSIM4v5wud1; + double BSIM4v5wup; + double BSIM4v5wlp; + double BSIM4v5wu0; + double BSIM4v5weu; + double BSIM4v5wute; + double BSIM4v5wvoff; + double BSIM4v5wtvoff; + double BSIM4v5wminv; + double BSIM4v5wdelta; + double BSIM4v5wrdsw; + double BSIM4v5wrsw; + double BSIM4v5wrdw; + double BSIM4v5wprwg; + double BSIM4v5wprwb; + double BSIM4v5wprt; + double BSIM4v5weta0; + double BSIM4v5wetab; + double BSIM4v5wpclm; + double BSIM4v5wpdibl1; + double BSIM4v5wpdibl2; + double BSIM4v5wpdiblb; + double BSIM4v5wfprout; + double BSIM4v5wpdits; + double BSIM4v5wpditsd; + double BSIM4v5wpscbe1; + double BSIM4v5wpscbe2; + double BSIM4v5wpvag; + double BSIM4v5wwr; + double BSIM4v5wdwg; + double BSIM4v5wdwb; + double BSIM4v5wb0; + double BSIM4v5wb1; + double BSIM4v5walpha0; + double BSIM4v5walpha1; + double BSIM4v5wbeta0; + double BSIM4v5wvfb; + double BSIM4v5wagidl; + double BSIM4v5wbgidl; + double BSIM4v5wcgidl; + double BSIM4v5wegidl; + double BSIM4v5waigc; + double BSIM4v5wbigc; + double BSIM4v5wcigc; + double BSIM4v5waigsd; + double BSIM4v5wbigsd; + double BSIM4v5wcigsd; + double BSIM4v5waigbacc; + double BSIM4v5wbigbacc; + double BSIM4v5wcigbacc; + double BSIM4v5waigbinv; + double BSIM4v5wbigbinv; + double BSIM4v5wcigbinv; + double BSIM4v5wnigc; + double BSIM4v5wnigbacc; + double BSIM4v5wnigbinv; + double BSIM4v5wntox; + double BSIM4v5weigbinv; + double BSIM4v5wpigcd; + double BSIM4v5wpoxedge; + double BSIM4v5wxrcrg1; + double BSIM4v5wxrcrg2; + double BSIM4v5wlambda; + double BSIM4v5wvtl; + double BSIM4v5wxn; + double BSIM4v5wvfbsdoff; + double BSIM4v5wtvfbsdoff; + + /* CV model */ + double BSIM4v5wcgsl; + double BSIM4v5wcgdl; + double BSIM4v5wckappas; + double BSIM4v5wckappad; + double BSIM4v5wcf; + double BSIM4v5wclc; + double BSIM4v5wcle; + double BSIM4v5wvfbcv; + double BSIM4v5wnoff; + double BSIM4v5wvoffcv; + double BSIM4v5wacde; + double BSIM4v5wmoin; + + /* Cross-term Dependence */ + double BSIM4v5pcdsc; + double BSIM4v5pcdscb; + double BSIM4v5pcdscd; + double BSIM4v5pcit; + double BSIM4v5pnfactor; + double BSIM4v5pxj; + double BSIM4v5pvsat; + double BSIM4v5pat; + double BSIM4v5pa0; + double BSIM4v5pags; + double BSIM4v5pa1; + double BSIM4v5pa2; + double BSIM4v5pketa; + double BSIM4v5pnsub; + double BSIM4v5pndep; + double BSIM4v5pnsd; + double BSIM4v5pphin; + double BSIM4v5pngate; + double BSIM4v5pgamma1; + double BSIM4v5pgamma2; + double BSIM4v5pvbx; + double BSIM4v5pvbm; + double BSIM4v5pxt; + double BSIM4v5pk1; + double BSIM4v5pkt1; + double BSIM4v5pkt1l; + double BSIM4v5pkt2; + double BSIM4v5pk2; + double BSIM4v5pk3; + double BSIM4v5pk3b; + double BSIM4v5pw0; + double BSIM4v5pdvtp0; + double BSIM4v5pdvtp1; + double BSIM4v5plpe0; + double BSIM4v5plpeb; + double BSIM4v5pdvt0; + double BSIM4v5pdvt1; + double BSIM4v5pdvt2; + double BSIM4v5pdvt0w; + double BSIM4v5pdvt1w; + double BSIM4v5pdvt2w; + double BSIM4v5pdrout; + double BSIM4v5pdsub; + double BSIM4v5pvth0; + double BSIM4v5pua; + double BSIM4v5pua1; + double BSIM4v5pub; + double BSIM4v5pub1; + double BSIM4v5puc; + double BSIM4v5puc1; + double BSIM4v5pud; + double BSIM4v5pud1; + double BSIM4v5pup; + double BSIM4v5plp; + double BSIM4v5pu0; + double BSIM4v5peu; + double BSIM4v5pute; + double BSIM4v5pvoff; + double BSIM4v5ptvoff; + double BSIM4v5pminv; + double BSIM4v5pdelta; + double BSIM4v5prdsw; + double BSIM4v5prsw; + double BSIM4v5prdw; + double BSIM4v5pprwg; + double BSIM4v5pprwb; + double BSIM4v5pprt; + double BSIM4v5peta0; + double BSIM4v5petab; + double BSIM4v5ppclm; + double BSIM4v5ppdibl1; + double BSIM4v5ppdibl2; + double BSIM4v5ppdiblb; + double BSIM4v5pfprout; + double BSIM4v5ppdits; + double BSIM4v5ppditsd; + double BSIM4v5ppscbe1; + double BSIM4v5ppscbe2; + double BSIM4v5ppvag; + double BSIM4v5pwr; + double BSIM4v5pdwg; + double BSIM4v5pdwb; + double BSIM4v5pb0; + double BSIM4v5pb1; + double BSIM4v5palpha0; + double BSIM4v5palpha1; + double BSIM4v5pbeta0; + double BSIM4v5pvfb; + double BSIM4v5pagidl; + double BSIM4v5pbgidl; + double BSIM4v5pcgidl; + double BSIM4v5pegidl; + double BSIM4v5paigc; + double BSIM4v5pbigc; + double BSIM4v5pcigc; + double BSIM4v5paigsd; + double BSIM4v5pbigsd; + double BSIM4v5pcigsd; + double BSIM4v5paigbacc; + double BSIM4v5pbigbacc; + double BSIM4v5pcigbacc; + double BSIM4v5paigbinv; + double BSIM4v5pbigbinv; + double BSIM4v5pcigbinv; + double BSIM4v5pnigc; + double BSIM4v5pnigbacc; + double BSIM4v5pnigbinv; + double BSIM4v5pntox; + double BSIM4v5peigbinv; + double BSIM4v5ppigcd; + double BSIM4v5ppoxedge; + double BSIM4v5pxrcrg1; + double BSIM4v5pxrcrg2; + double BSIM4v5plambda; + double BSIM4v5pvtl; + double BSIM4v5pxn; + double BSIM4v5pvfbsdoff; + double BSIM4v5ptvfbsdoff; + + /* CV model */ + double BSIM4v5pcgsl; + double BSIM4v5pcgdl; + double BSIM4v5pckappas; + double BSIM4v5pckappad; + double BSIM4v5pcf; + double BSIM4v5pclc; + double BSIM4v5pcle; + double BSIM4v5pvfbcv; + double BSIM4v5pnoff; + double BSIM4v5pvoffcv; + double BSIM4v5pacde; + double BSIM4v5pmoin; + + double BSIM4v5tnom; + double BSIM4v5cgso; + double BSIM4v5cgdo; + double BSIM4v5cgbo; + double BSIM4v5xpart; + double BSIM4v5cFringOut; + double BSIM4v5cFringMax; + + double BSIM4v5sheetResistance; + double BSIM4v5SjctSatCurDensity; + double BSIM4v5DjctSatCurDensity; + double BSIM4v5SjctSidewallSatCurDensity; + double BSIM4v5DjctSidewallSatCurDensity; + double BSIM4v5SjctGateSidewallSatCurDensity; + double BSIM4v5DjctGateSidewallSatCurDensity; + double BSIM4v5SbulkJctPotential; + double BSIM4v5DbulkJctPotential; + double BSIM4v5SbulkJctBotGradingCoeff; + double BSIM4v5DbulkJctBotGradingCoeff; + double BSIM4v5SbulkJctSideGradingCoeff; + double BSIM4v5DbulkJctSideGradingCoeff; + double BSIM4v5SbulkJctGateSideGradingCoeff; + double BSIM4v5DbulkJctGateSideGradingCoeff; + double BSIM4v5SsidewallJctPotential; + double BSIM4v5DsidewallJctPotential; + double BSIM4v5SGatesidewallJctPotential; + double BSIM4v5DGatesidewallJctPotential; + double BSIM4v5SunitAreaJctCap; + double BSIM4v5DunitAreaJctCap; + double BSIM4v5SunitLengthSidewallJctCap; + double BSIM4v5DunitLengthSidewallJctCap; + double BSIM4v5SunitLengthGateSidewallJctCap; + double BSIM4v5DunitLengthGateSidewallJctCap; + double BSIM4v5SjctEmissionCoeff; + double BSIM4v5DjctEmissionCoeff; + double BSIM4v5SjctTempExponent; + double BSIM4v5DjctTempExponent; + double BSIM4v5njtstemp; + double BSIM4v5njtsswtemp; + double BSIM4v5njtsswgtemp; + + double BSIM4v5Lint; + double BSIM4v5Ll; + double BSIM4v5Llc; + double BSIM4v5Lln; + double BSIM4v5Lw; + double BSIM4v5Lwc; + double BSIM4v5Lwn; + double BSIM4v5Lwl; + double BSIM4v5Lwlc; + double BSIM4v5Lmin; + double BSIM4v5Lmax; + + double BSIM4v5Wint; + double BSIM4v5Wl; + double BSIM4v5Wlc; + double BSIM4v5Wln; + double BSIM4v5Ww; + double BSIM4v5Wwc; + double BSIM4v5Wwn; + double BSIM4v5Wwl; + double BSIM4v5Wwlc; + double BSIM4v5Wmin; + double BSIM4v5Wmax; + + /* added for stress effect */ + double BSIM4v5saref; + double BSIM4v5sbref; + double BSIM4v5wlod; + double BSIM4v5ku0; + double BSIM4v5kvsat; + double BSIM4v5kvth0; + double BSIM4v5tku0; + double BSIM4v5llodku0; + double BSIM4v5wlodku0; + double BSIM4v5llodvth; + double BSIM4v5wlodvth; + double BSIM4v5lku0; + double BSIM4v5wku0; + double BSIM4v5pku0; + double BSIM4v5lkvth0; + double BSIM4v5wkvth0; + double BSIM4v5pkvth0; + double BSIM4v5stk2; + double BSIM4v5lodk2; + double BSIM4v5steta0; + double BSIM4v5lodeta0; + + double BSIM4v5web; + double BSIM4v5wec; + double BSIM4v5kvth0we; + double BSIM4v5k2we; + double BSIM4v5ku0we; + double BSIM4v5scref; + double BSIM4v5wpemod; + double BSIM4v5lkvth0we; + double BSIM4v5lk2we; + double BSIM4v5lku0we; + double BSIM4v5wkvth0we; + double BSIM4v5wk2we; + double BSIM4v5wku0we; + double BSIM4v5pkvth0we; + double BSIM4v5pk2we; + double BSIM4v5pku0we; + +/* Pre-calculated constants + * move to size-dependent param */ + double BSIM4v5vtm; + double BSIM4v5vtm0; + double BSIM4v5coxe; + double BSIM4v5coxp; + double BSIM4v5cof1; + double BSIM4v5cof2; + double BSIM4v5cof3; + double BSIM4v5cof4; + double BSIM4v5vcrit; + double BSIM4v5factor1; + double BSIM4v5PhiBS; + double BSIM4v5PhiBSWS; + double BSIM4v5PhiBSWGS; + double BSIM4v5SjctTempSatCurDensity; + double BSIM4v5SjctSidewallTempSatCurDensity; + double BSIM4v5SjctGateSidewallTempSatCurDensity; + double BSIM4v5PhiBD; + double BSIM4v5PhiBSWD; + double BSIM4v5PhiBSWGD; + double BSIM4v5DjctTempSatCurDensity; + double BSIM4v5DjctSidewallTempSatCurDensity; + double BSIM4v5DjctGateSidewallTempSatCurDensity; + double BSIM4v5SunitAreaTempJctCap; + double BSIM4v5DunitAreaTempJctCap; + double BSIM4v5SunitLengthSidewallTempJctCap; + double BSIM4v5DunitLengthSidewallTempJctCap; + double BSIM4v5SunitLengthGateSidewallTempJctCap; + double BSIM4v5DunitLengthGateSidewallTempJctCap; + + double BSIM4v5oxideTrapDensityA; + double BSIM4v5oxideTrapDensityB; + double BSIM4v5oxideTrapDensityC; + double BSIM4v5em; + double BSIM4v5ef; + double BSIM4v5af; + double BSIM4v5kf; + + int BSIM4v5rgeomod; + + /* strain parameters */ + double BSIM4v5stimod; + double BSIM4v5sa0; + double BSIM4v5sb0; + + struct bsim4v5SizeDependParam *pSizeDependParamKnot; + + /* Flags */ + unsigned BSIM4v5rgeomodGiven :1; + unsigned BSIM4v5stimodGiven :1; + unsigned BSIM4v5sa0Given :1; + unsigned BSIM4v5sb0Given :1; + + unsigned BSIM4v5mobModGiven :1; + unsigned BSIM4v5binUnitGiven :1; + unsigned BSIM4v5capModGiven :1; + unsigned BSIM4v5dioModGiven :1; + unsigned BSIM4v5rdsModGiven :1; + unsigned BSIM4v5rbodyModGiven :1; + unsigned BSIM4v5rgateModGiven :1; + unsigned BSIM4v5perModGiven :1; + unsigned BSIM4v5geoModGiven :1; + unsigned BSIM4v5paramChkGiven :1; + unsigned BSIM4v5trnqsModGiven :1; + unsigned BSIM4v5acnqsModGiven :1; + unsigned BSIM4v5fnoiModGiven :1; + unsigned BSIM4v5tnoiModGiven :1; + unsigned BSIM4v5igcModGiven :1; + unsigned BSIM4v5igbModGiven :1; + unsigned BSIM4v5tempModGiven :1; + unsigned BSIM4v5typeGiven :1; + unsigned BSIM4v5toxrefGiven :1; + unsigned BSIM4v5toxeGiven :1; + unsigned BSIM4v5toxpGiven :1; + unsigned BSIM4v5toxmGiven :1; + unsigned BSIM4v5dtoxGiven :1; + unsigned BSIM4v5epsroxGiven :1; + unsigned BSIM4v5versionGiven :1; + unsigned BSIM4v5cdscGiven :1; + unsigned BSIM4v5cdscbGiven :1; + unsigned BSIM4v5cdscdGiven :1; + unsigned BSIM4v5citGiven :1; + unsigned BSIM4v5nfactorGiven :1; + unsigned BSIM4v5xjGiven :1; + unsigned BSIM4v5vsatGiven :1; + unsigned BSIM4v5atGiven :1; + unsigned BSIM4v5a0Given :1; + unsigned BSIM4v5agsGiven :1; + unsigned BSIM4v5a1Given :1; + unsigned BSIM4v5a2Given :1; + unsigned BSIM4v5ketaGiven :1; + unsigned BSIM4v5nsubGiven :1; + unsigned BSIM4v5ndepGiven :1; + unsigned BSIM4v5nsdGiven :1; + unsigned BSIM4v5phinGiven :1; + unsigned BSIM4v5ngateGiven :1; + unsigned BSIM4v5gamma1Given :1; + unsigned BSIM4v5gamma2Given :1; + unsigned BSIM4v5vbxGiven :1; + unsigned BSIM4v5vbmGiven :1; + unsigned BSIM4v5xtGiven :1; + unsigned BSIM4v5k1Given :1; + unsigned BSIM4v5kt1Given :1; + unsigned BSIM4v5kt1lGiven :1; + unsigned BSIM4v5kt2Given :1; + unsigned BSIM4v5k2Given :1; + unsigned BSIM4v5k3Given :1; + unsigned BSIM4v5k3bGiven :1; + unsigned BSIM4v5w0Given :1; + unsigned BSIM4v5dvtp0Given :1; + unsigned BSIM4v5dvtp1Given :1; + unsigned BSIM4v5lpe0Given :1; + unsigned BSIM4v5lpebGiven :1; + unsigned BSIM4v5dvt0Given :1; + unsigned BSIM4v5dvt1Given :1; + unsigned BSIM4v5dvt2Given :1; + unsigned BSIM4v5dvt0wGiven :1; + unsigned BSIM4v5dvt1wGiven :1; + unsigned BSIM4v5dvt2wGiven :1; + unsigned BSIM4v5droutGiven :1; + unsigned BSIM4v5dsubGiven :1; + unsigned BSIM4v5vth0Given :1; + unsigned BSIM4v5euGiven :1; + unsigned BSIM4v5uaGiven :1; + unsigned BSIM4v5ua1Given :1; + unsigned BSIM4v5ubGiven :1; + unsigned BSIM4v5ub1Given :1; + unsigned BSIM4v5ucGiven :1; + unsigned BSIM4v5uc1Given :1; + unsigned BSIM4v5udGiven :1; + unsigned BSIM4v5ud1Given :1; + unsigned BSIM4v5upGiven :1; + unsigned BSIM4v5lpGiven :1; + unsigned BSIM4v5u0Given :1; + unsigned BSIM4v5uteGiven :1; + unsigned BSIM4v5voffGiven :1; + unsigned BSIM4v5tvoffGiven :1; + unsigned BSIM4v5vofflGiven :1; + unsigned BSIM4v5minvGiven :1; + unsigned BSIM4v5rdswGiven :1; + unsigned BSIM4v5rdswminGiven :1; + unsigned BSIM4v5rdwminGiven :1; + unsigned BSIM4v5rswminGiven :1; + unsigned BSIM4v5rswGiven :1; + unsigned BSIM4v5rdwGiven :1; + unsigned BSIM4v5prwgGiven :1; + unsigned BSIM4v5prwbGiven :1; + unsigned BSIM4v5prtGiven :1; + unsigned BSIM4v5eta0Given :1; + unsigned BSIM4v5etabGiven :1; + unsigned BSIM4v5pclmGiven :1; + unsigned BSIM4v5pdibl1Given :1; + unsigned BSIM4v5pdibl2Given :1; + unsigned BSIM4v5pdiblbGiven :1; + unsigned BSIM4v5fproutGiven :1; + unsigned BSIM4v5pditsGiven :1; + unsigned BSIM4v5pditsdGiven :1; + unsigned BSIM4v5pditslGiven :1; + unsigned BSIM4v5pscbe1Given :1; + unsigned BSIM4v5pscbe2Given :1; + unsigned BSIM4v5pvagGiven :1; + unsigned BSIM4v5deltaGiven :1; + unsigned BSIM4v5wrGiven :1; + unsigned BSIM4v5dwgGiven :1; + unsigned BSIM4v5dwbGiven :1; + unsigned BSIM4v5b0Given :1; + unsigned BSIM4v5b1Given :1; + unsigned BSIM4v5alpha0Given :1; + unsigned BSIM4v5alpha1Given :1; + unsigned BSIM4v5beta0Given :1; + unsigned BSIM4v5agidlGiven :1; + unsigned BSIM4v5bgidlGiven :1; + unsigned BSIM4v5cgidlGiven :1; + unsigned BSIM4v5egidlGiven :1; + unsigned BSIM4v5aigcGiven :1; + unsigned BSIM4v5bigcGiven :1; + unsigned BSIM4v5cigcGiven :1; + unsigned BSIM4v5aigsdGiven :1; + unsigned BSIM4v5bigsdGiven :1; + unsigned BSIM4v5cigsdGiven :1; + unsigned BSIM4v5aigbaccGiven :1; + unsigned BSIM4v5bigbaccGiven :1; + unsigned BSIM4v5cigbaccGiven :1; + unsigned BSIM4v5aigbinvGiven :1; + unsigned BSIM4v5bigbinvGiven :1; + unsigned BSIM4v5cigbinvGiven :1; + unsigned BSIM4v5nigcGiven :1; + unsigned BSIM4v5nigbinvGiven :1; + unsigned BSIM4v5nigbaccGiven :1; + unsigned BSIM4v5ntoxGiven :1; + unsigned BSIM4v5eigbinvGiven :1; + unsigned BSIM4v5pigcdGiven :1; + unsigned BSIM4v5poxedgeGiven :1; + unsigned BSIM4v5ijthdfwdGiven :1; + unsigned BSIM4v5ijthsfwdGiven :1; + unsigned BSIM4v5ijthdrevGiven :1; + unsigned BSIM4v5ijthsrevGiven :1; + unsigned BSIM4v5xjbvdGiven :1; + unsigned BSIM4v5xjbvsGiven :1; + unsigned BSIM4v5bvdGiven :1; + unsigned BSIM4v5bvsGiven :1; + + unsigned BSIM4v5jtssGiven :1; + unsigned BSIM4v5jtsdGiven :1; + unsigned BSIM4v5jtsswsGiven :1; + unsigned BSIM4v5jtsswdGiven :1; + unsigned BSIM4v5jtsswgsGiven :1; + unsigned BSIM4v5jtsswgdGiven :1; + unsigned BSIM4v5njtsGiven :1; + unsigned BSIM4v5njtsswGiven :1; + unsigned BSIM4v5njtsswgGiven :1; + unsigned BSIM4v5xtssGiven :1; + unsigned BSIM4v5xtsdGiven :1; + unsigned BSIM4v5xtsswsGiven :1; + unsigned BSIM4v5xtsswdGiven :1; + unsigned BSIM4v5xtsswgsGiven :1; + unsigned BSIM4v5xtsswgdGiven :1; + unsigned BSIM4v5tnjtsGiven :1; + unsigned BSIM4v5tnjtsswGiven :1; + unsigned BSIM4v5tnjtsswgGiven :1; + unsigned BSIM4v5vtssGiven :1; + unsigned BSIM4v5vtsdGiven :1; + unsigned BSIM4v5vtsswsGiven :1; + unsigned BSIM4v5vtsswdGiven :1; + unsigned BSIM4v5vtsswgsGiven :1; + unsigned BSIM4v5vtsswgdGiven :1; + + unsigned BSIM4v5vfbGiven :1; + unsigned BSIM4v5gbminGiven :1; + unsigned BSIM4v5rbdbGiven :1; + unsigned BSIM4v5rbsbGiven :1; + unsigned BSIM4v5rbpsGiven :1; + unsigned BSIM4v5rbpdGiven :1; + unsigned BSIM4v5rbpbGiven :1; + + unsigned BSIM4v5rbps0Given :1; + unsigned BSIM4v5rbpslGiven :1; + unsigned BSIM4v5rbpswGiven :1; + unsigned BSIM4v5rbpsnfGiven :1; + + unsigned BSIM4v5rbpd0Given :1; + unsigned BSIM4v5rbpdlGiven :1; + unsigned BSIM4v5rbpdwGiven :1; + unsigned BSIM4v5rbpdnfGiven :1; + + unsigned BSIM4v5rbpbx0Given :1; + unsigned BSIM4v5rbpbxlGiven :1; + unsigned BSIM4v5rbpbxwGiven :1; + unsigned BSIM4v5rbpbxnfGiven :1; + unsigned BSIM4v5rbpby0Given :1; + unsigned BSIM4v5rbpbylGiven :1; + unsigned BSIM4v5rbpbywGiven :1; + unsigned BSIM4v5rbpbynfGiven :1; + + unsigned BSIM4v5rbsbx0Given :1; + unsigned BSIM4v5rbsby0Given :1; + unsigned BSIM4v5rbdbx0Given :1; + unsigned BSIM4v5rbdby0Given :1; + + unsigned BSIM4v5rbsdbxlGiven :1; + unsigned BSIM4v5rbsdbxwGiven :1; + unsigned BSIM4v5rbsdbxnfGiven :1; + unsigned BSIM4v5rbsdbylGiven :1; + unsigned BSIM4v5rbsdbywGiven :1; + unsigned BSIM4v5rbsdbynfGiven :1; + + unsigned BSIM4v5xrcrg1Given :1; + unsigned BSIM4v5xrcrg2Given :1; + unsigned BSIM4v5tnoiaGiven :1; + unsigned BSIM4v5tnoibGiven :1; + unsigned BSIM4v5rnoiaGiven :1; + unsigned BSIM4v5rnoibGiven :1; + unsigned BSIM4v5ntnoiGiven :1; + + unsigned BSIM4v5lambdaGiven :1; + unsigned BSIM4v5vtlGiven :1; + unsigned BSIM4v5lcGiven :1; + unsigned BSIM4v5xnGiven :1; + unsigned BSIM4v5vfbsdoffGiven :1; + unsigned BSIM4v5lintnoiGiven :1; + unsigned BSIM4v5tvfbsdoffGiven :1; + + /* CV model and parasitics */ + unsigned BSIM4v5cgslGiven :1; + unsigned BSIM4v5cgdlGiven :1; + unsigned BSIM4v5ckappasGiven :1; + unsigned BSIM4v5ckappadGiven :1; + unsigned BSIM4v5cfGiven :1; + unsigned BSIM4v5vfbcvGiven :1; + unsigned BSIM4v5clcGiven :1; + unsigned BSIM4v5cleGiven :1; + unsigned BSIM4v5dwcGiven :1; + unsigned BSIM4v5dlcGiven :1; + unsigned BSIM4v5xwGiven :1; + unsigned BSIM4v5xlGiven :1; + unsigned BSIM4v5dlcigGiven :1; + unsigned BSIM4v5dwjGiven :1; + unsigned BSIM4v5noffGiven :1; + unsigned BSIM4v5voffcvGiven :1; + unsigned BSIM4v5acdeGiven :1; + unsigned BSIM4v5moinGiven :1; + unsigned BSIM4v5tcjGiven :1; + unsigned BSIM4v5tcjswGiven :1; + unsigned BSIM4v5tcjswgGiven :1; + unsigned BSIM4v5tpbGiven :1; + unsigned BSIM4v5tpbswGiven :1; + unsigned BSIM4v5tpbswgGiven :1; + unsigned BSIM4v5dmcgGiven :1; + unsigned BSIM4v5dmciGiven :1; + unsigned BSIM4v5dmdgGiven :1; + unsigned BSIM4v5dmcgtGiven :1; + unsigned BSIM4v5xgwGiven :1; + unsigned BSIM4v5xglGiven :1; + unsigned BSIM4v5rshgGiven :1; + unsigned BSIM4v5ngconGiven :1; + + + /* Length dependence */ + unsigned BSIM4v5lcdscGiven :1; + unsigned BSIM4v5lcdscbGiven :1; + unsigned BSIM4v5lcdscdGiven :1; + unsigned BSIM4v5lcitGiven :1; + unsigned BSIM4v5lnfactorGiven :1; + unsigned BSIM4v5lxjGiven :1; + unsigned BSIM4v5lvsatGiven :1; + unsigned BSIM4v5latGiven :1; + unsigned BSIM4v5la0Given :1; + unsigned BSIM4v5lagsGiven :1; + unsigned BSIM4v5la1Given :1; + unsigned BSIM4v5la2Given :1; + unsigned BSIM4v5lketaGiven :1; + unsigned BSIM4v5lnsubGiven :1; + unsigned BSIM4v5lndepGiven :1; + unsigned BSIM4v5lnsdGiven :1; + unsigned BSIM4v5lphinGiven :1; + unsigned BSIM4v5lngateGiven :1; + unsigned BSIM4v5lgamma1Given :1; + unsigned BSIM4v5lgamma2Given :1; + unsigned BSIM4v5lvbxGiven :1; + unsigned BSIM4v5lvbmGiven :1; + unsigned BSIM4v5lxtGiven :1; + unsigned BSIM4v5lk1Given :1; + unsigned BSIM4v5lkt1Given :1; + unsigned BSIM4v5lkt1lGiven :1; + unsigned BSIM4v5lkt2Given :1; + unsigned BSIM4v5lk2Given :1; + unsigned BSIM4v5lk3Given :1; + unsigned BSIM4v5lk3bGiven :1; + unsigned BSIM4v5lw0Given :1; + unsigned BSIM4v5ldvtp0Given :1; + unsigned BSIM4v5ldvtp1Given :1; + unsigned BSIM4v5llpe0Given :1; + unsigned BSIM4v5llpebGiven :1; + unsigned BSIM4v5ldvt0Given :1; + unsigned BSIM4v5ldvt1Given :1; + unsigned BSIM4v5ldvt2Given :1; + unsigned BSIM4v5ldvt0wGiven :1; + unsigned BSIM4v5ldvt1wGiven :1; + unsigned BSIM4v5ldvt2wGiven :1; + unsigned BSIM4v5ldroutGiven :1; + unsigned BSIM4v5ldsubGiven :1; + unsigned BSIM4v5lvth0Given :1; + unsigned BSIM4v5luaGiven :1; + unsigned BSIM4v5lua1Given :1; + unsigned BSIM4v5lubGiven :1; + unsigned BSIM4v5lub1Given :1; + unsigned BSIM4v5lucGiven :1; + unsigned BSIM4v5luc1Given :1; + unsigned BSIM4v5ludGiven :1; + unsigned BSIM4v5lud1Given :1; + unsigned BSIM4v5lupGiven :1; + unsigned BSIM4v5llpGiven :1; + unsigned BSIM4v5lu0Given :1; + unsigned BSIM4v5leuGiven :1; + unsigned BSIM4v5luteGiven :1; + unsigned BSIM4v5lvoffGiven :1; + unsigned BSIM4v5ltvoffGiven :1; + unsigned BSIM4v5lminvGiven :1; + unsigned BSIM4v5lrdswGiven :1; + unsigned BSIM4v5lrswGiven :1; + unsigned BSIM4v5lrdwGiven :1; + unsigned BSIM4v5lprwgGiven :1; + unsigned BSIM4v5lprwbGiven :1; + unsigned BSIM4v5lprtGiven :1; + unsigned BSIM4v5leta0Given :1; + unsigned BSIM4v5letabGiven :1; + unsigned BSIM4v5lpclmGiven :1; + unsigned BSIM4v5lpdibl1Given :1; + unsigned BSIM4v5lpdibl2Given :1; + unsigned BSIM4v5lpdiblbGiven :1; + unsigned BSIM4v5lfproutGiven :1; + unsigned BSIM4v5lpditsGiven :1; + unsigned BSIM4v5lpditsdGiven :1; + unsigned BSIM4v5lpscbe1Given :1; + unsigned BSIM4v5lpscbe2Given :1; + unsigned BSIM4v5lpvagGiven :1; + unsigned BSIM4v5ldeltaGiven :1; + unsigned BSIM4v5lwrGiven :1; + unsigned BSIM4v5ldwgGiven :1; + unsigned BSIM4v5ldwbGiven :1; + unsigned BSIM4v5lb0Given :1; + unsigned BSIM4v5lb1Given :1; + unsigned BSIM4v5lalpha0Given :1; + unsigned BSIM4v5lalpha1Given :1; + unsigned BSIM4v5lbeta0Given :1; + unsigned BSIM4v5lvfbGiven :1; + unsigned BSIM4v5lagidlGiven :1; + unsigned BSIM4v5lbgidlGiven :1; + unsigned BSIM4v5lcgidlGiven :1; + unsigned BSIM4v5legidlGiven :1; + unsigned BSIM4v5laigcGiven :1; + unsigned BSIM4v5lbigcGiven :1; + unsigned BSIM4v5lcigcGiven :1; + unsigned BSIM4v5laigsdGiven :1; + unsigned BSIM4v5lbigsdGiven :1; + unsigned BSIM4v5lcigsdGiven :1; + unsigned BSIM4v5laigbaccGiven :1; + unsigned BSIM4v5lbigbaccGiven :1; + unsigned BSIM4v5lcigbaccGiven :1; + unsigned BSIM4v5laigbinvGiven :1; + unsigned BSIM4v5lbigbinvGiven :1; + unsigned BSIM4v5lcigbinvGiven :1; + unsigned BSIM4v5lnigcGiven :1; + unsigned BSIM4v5lnigbinvGiven :1; + unsigned BSIM4v5lnigbaccGiven :1; + unsigned BSIM4v5lntoxGiven :1; + unsigned BSIM4v5leigbinvGiven :1; + unsigned BSIM4v5lpigcdGiven :1; + unsigned BSIM4v5lpoxedgeGiven :1; + unsigned BSIM4v5lxrcrg1Given :1; + unsigned BSIM4v5lxrcrg2Given :1; + unsigned BSIM4v5llambdaGiven :1; + unsigned BSIM4v5lvtlGiven :1; + unsigned BSIM4v5lxnGiven :1; + unsigned BSIM4v5lvfbsdoffGiven :1; + unsigned BSIM4v5ltvfbsdoffGiven :1; + + /* CV model */ + unsigned BSIM4v5lcgslGiven :1; + unsigned BSIM4v5lcgdlGiven :1; + unsigned BSIM4v5lckappasGiven :1; + unsigned BSIM4v5lckappadGiven :1; + unsigned BSIM4v5lcfGiven :1; + unsigned BSIM4v5lclcGiven :1; + unsigned BSIM4v5lcleGiven :1; + unsigned BSIM4v5lvfbcvGiven :1; + unsigned BSIM4v5lnoffGiven :1; + unsigned BSIM4v5lvoffcvGiven :1; + unsigned BSIM4v5lacdeGiven :1; + unsigned BSIM4v5lmoinGiven :1; + + /* Width dependence */ + unsigned BSIM4v5wcdscGiven :1; + unsigned BSIM4v5wcdscbGiven :1; + unsigned BSIM4v5wcdscdGiven :1; + unsigned BSIM4v5wcitGiven :1; + unsigned BSIM4v5wnfactorGiven :1; + unsigned BSIM4v5wxjGiven :1; + unsigned BSIM4v5wvsatGiven :1; + unsigned BSIM4v5watGiven :1; + unsigned BSIM4v5wa0Given :1; + unsigned BSIM4v5wagsGiven :1; + unsigned BSIM4v5wa1Given :1; + unsigned BSIM4v5wa2Given :1; + unsigned BSIM4v5wketaGiven :1; + unsigned BSIM4v5wnsubGiven :1; + unsigned BSIM4v5wndepGiven :1; + unsigned BSIM4v5wnsdGiven :1; + unsigned BSIM4v5wphinGiven :1; + unsigned BSIM4v5wngateGiven :1; + unsigned BSIM4v5wgamma1Given :1; + unsigned BSIM4v5wgamma2Given :1; + unsigned BSIM4v5wvbxGiven :1; + unsigned BSIM4v5wvbmGiven :1; + unsigned BSIM4v5wxtGiven :1; + unsigned BSIM4v5wk1Given :1; + unsigned BSIM4v5wkt1Given :1; + unsigned BSIM4v5wkt1lGiven :1; + unsigned BSIM4v5wkt2Given :1; + unsigned BSIM4v5wk2Given :1; + unsigned BSIM4v5wk3Given :1; + unsigned BSIM4v5wk3bGiven :1; + unsigned BSIM4v5ww0Given :1; + unsigned BSIM4v5wdvtp0Given :1; + unsigned BSIM4v5wdvtp1Given :1; + unsigned BSIM4v5wlpe0Given :1; + unsigned BSIM4v5wlpebGiven :1; + unsigned BSIM4v5wdvt0Given :1; + unsigned BSIM4v5wdvt1Given :1; + unsigned BSIM4v5wdvt2Given :1; + unsigned BSIM4v5wdvt0wGiven :1; + unsigned BSIM4v5wdvt1wGiven :1; + unsigned BSIM4v5wdvt2wGiven :1; + unsigned BSIM4v5wdroutGiven :1; + unsigned BSIM4v5wdsubGiven :1; + unsigned BSIM4v5wvth0Given :1; + unsigned BSIM4v5wuaGiven :1; + unsigned BSIM4v5wua1Given :1; + unsigned BSIM4v5wubGiven :1; + unsigned BSIM4v5wub1Given :1; + unsigned BSIM4v5wucGiven :1; + unsigned BSIM4v5wuc1Given :1; + unsigned BSIM4v5wudGiven :1; + unsigned BSIM4v5wud1Given :1; + unsigned BSIM4v5wupGiven :1; + unsigned BSIM4v5wlpGiven :1; + unsigned BSIM4v5wu0Given :1; + unsigned BSIM4v5weuGiven :1; + unsigned BSIM4v5wuteGiven :1; + unsigned BSIM4v5wvoffGiven :1; + unsigned BSIM4v5wtvoffGiven :1; + unsigned BSIM4v5wminvGiven :1; + unsigned BSIM4v5wrdswGiven :1; + unsigned BSIM4v5wrswGiven :1; + unsigned BSIM4v5wrdwGiven :1; + unsigned BSIM4v5wprwgGiven :1; + unsigned BSIM4v5wprwbGiven :1; + unsigned BSIM4v5wprtGiven :1; + unsigned BSIM4v5weta0Given :1; + unsigned BSIM4v5wetabGiven :1; + unsigned BSIM4v5wpclmGiven :1; + unsigned BSIM4v5wpdibl1Given :1; + unsigned BSIM4v5wpdibl2Given :1; + unsigned BSIM4v5wpdiblbGiven :1; + unsigned BSIM4v5wfproutGiven :1; + unsigned BSIM4v5wpditsGiven :1; + unsigned BSIM4v5wpditsdGiven :1; + unsigned BSIM4v5wpscbe1Given :1; + unsigned BSIM4v5wpscbe2Given :1; + unsigned BSIM4v5wpvagGiven :1; + unsigned BSIM4v5wdeltaGiven :1; + unsigned BSIM4v5wwrGiven :1; + unsigned BSIM4v5wdwgGiven :1; + unsigned BSIM4v5wdwbGiven :1; + unsigned BSIM4v5wb0Given :1; + unsigned BSIM4v5wb1Given :1; + unsigned BSIM4v5walpha0Given :1; + unsigned BSIM4v5walpha1Given :1; + unsigned BSIM4v5wbeta0Given :1; + unsigned BSIM4v5wvfbGiven :1; + unsigned BSIM4v5wagidlGiven :1; + unsigned BSIM4v5wbgidlGiven :1; + unsigned BSIM4v5wcgidlGiven :1; + unsigned BSIM4v5wegidlGiven :1; + unsigned BSIM4v5waigcGiven :1; + unsigned BSIM4v5wbigcGiven :1; + unsigned BSIM4v5wcigcGiven :1; + unsigned BSIM4v5waigsdGiven :1; + unsigned BSIM4v5wbigsdGiven :1; + unsigned BSIM4v5wcigsdGiven :1; + unsigned BSIM4v5waigbaccGiven :1; + unsigned BSIM4v5wbigbaccGiven :1; + unsigned BSIM4v5wcigbaccGiven :1; + unsigned BSIM4v5waigbinvGiven :1; + unsigned BSIM4v5wbigbinvGiven :1; + unsigned BSIM4v5wcigbinvGiven :1; + unsigned BSIM4v5wnigcGiven :1; + unsigned BSIM4v5wnigbinvGiven :1; + unsigned BSIM4v5wnigbaccGiven :1; + unsigned BSIM4v5wntoxGiven :1; + unsigned BSIM4v5weigbinvGiven :1; + unsigned BSIM4v5wpigcdGiven :1; + unsigned BSIM4v5wpoxedgeGiven :1; + unsigned BSIM4v5wxrcrg1Given :1; + unsigned BSIM4v5wxrcrg2Given :1; + unsigned BSIM4v5wlambdaGiven :1; + unsigned BSIM4v5wvtlGiven :1; + unsigned BSIM4v5wxnGiven :1; + unsigned BSIM4v5wvfbsdoffGiven :1; + unsigned BSIM4v5wtvfbsdoffGiven :1; + + /* CV model */ + unsigned BSIM4v5wcgslGiven :1; + unsigned BSIM4v5wcgdlGiven :1; + unsigned BSIM4v5wckappasGiven :1; + unsigned BSIM4v5wckappadGiven :1; + unsigned BSIM4v5wcfGiven :1; + unsigned BSIM4v5wclcGiven :1; + unsigned BSIM4v5wcleGiven :1; + unsigned BSIM4v5wvfbcvGiven :1; + unsigned BSIM4v5wnoffGiven :1; + unsigned BSIM4v5wvoffcvGiven :1; + unsigned BSIM4v5wacdeGiven :1; + unsigned BSIM4v5wmoinGiven :1; + + /* Cross-term dependence */ + unsigned BSIM4v5pcdscGiven :1; + unsigned BSIM4v5pcdscbGiven :1; + unsigned BSIM4v5pcdscdGiven :1; + unsigned BSIM4v5pcitGiven :1; + unsigned BSIM4v5pnfactorGiven :1; + unsigned BSIM4v5pxjGiven :1; + unsigned BSIM4v5pvsatGiven :1; + unsigned BSIM4v5patGiven :1; + unsigned BSIM4v5pa0Given :1; + unsigned BSIM4v5pagsGiven :1; + unsigned BSIM4v5pa1Given :1; + unsigned BSIM4v5pa2Given :1; + unsigned BSIM4v5pketaGiven :1; + unsigned BSIM4v5pnsubGiven :1; + unsigned BSIM4v5pndepGiven :1; + unsigned BSIM4v5pnsdGiven :1; + unsigned BSIM4v5pphinGiven :1; + unsigned BSIM4v5pngateGiven :1; + unsigned BSIM4v5pgamma1Given :1; + unsigned BSIM4v5pgamma2Given :1; + unsigned BSIM4v5pvbxGiven :1; + unsigned BSIM4v5pvbmGiven :1; + unsigned BSIM4v5pxtGiven :1; + unsigned BSIM4v5pk1Given :1; + unsigned BSIM4v5pkt1Given :1; + unsigned BSIM4v5pkt1lGiven :1; + unsigned BSIM4v5pkt2Given :1; + unsigned BSIM4v5pk2Given :1; + unsigned BSIM4v5pk3Given :1; + unsigned BSIM4v5pk3bGiven :1; + unsigned BSIM4v5pw0Given :1; + unsigned BSIM4v5pdvtp0Given :1; + unsigned BSIM4v5pdvtp1Given :1; + unsigned BSIM4v5plpe0Given :1; + unsigned BSIM4v5plpebGiven :1; + unsigned BSIM4v5pdvt0Given :1; + unsigned BSIM4v5pdvt1Given :1; + unsigned BSIM4v5pdvt2Given :1; + unsigned BSIM4v5pdvt0wGiven :1; + unsigned BSIM4v5pdvt1wGiven :1; + unsigned BSIM4v5pdvt2wGiven :1; + unsigned BSIM4v5pdroutGiven :1; + unsigned BSIM4v5pdsubGiven :1; + unsigned BSIM4v5pvth0Given :1; + unsigned BSIM4v5puaGiven :1; + unsigned BSIM4v5pua1Given :1; + unsigned BSIM4v5pubGiven :1; + unsigned BSIM4v5pub1Given :1; + unsigned BSIM4v5pucGiven :1; + unsigned BSIM4v5puc1Given :1; + unsigned BSIM4v5pudGiven :1; + unsigned BSIM4v5pud1Given :1; + unsigned BSIM4v5pupGiven :1; + unsigned BSIM4v5plpGiven :1; + unsigned BSIM4v5pu0Given :1; + unsigned BSIM4v5peuGiven :1; + unsigned BSIM4v5puteGiven :1; + unsigned BSIM4v5pvoffGiven :1; + unsigned BSIM4v5ptvoffGiven :1; + unsigned BSIM4v5pminvGiven :1; + unsigned BSIM4v5prdswGiven :1; + unsigned BSIM4v5prswGiven :1; + unsigned BSIM4v5prdwGiven :1; + unsigned BSIM4v5pprwgGiven :1; + unsigned BSIM4v5pprwbGiven :1; + unsigned BSIM4v5pprtGiven :1; + unsigned BSIM4v5peta0Given :1; + unsigned BSIM4v5petabGiven :1; + unsigned BSIM4v5ppclmGiven :1; + unsigned BSIM4v5ppdibl1Given :1; + unsigned BSIM4v5ppdibl2Given :1; + unsigned BSIM4v5ppdiblbGiven :1; + unsigned BSIM4v5pfproutGiven :1; + unsigned BSIM4v5ppditsGiven :1; + unsigned BSIM4v5ppditsdGiven :1; + unsigned BSIM4v5ppscbe1Given :1; + unsigned BSIM4v5ppscbe2Given :1; + unsigned BSIM4v5ppvagGiven :1; + unsigned BSIM4v5pdeltaGiven :1; + unsigned BSIM4v5pwrGiven :1; + unsigned BSIM4v5pdwgGiven :1; + unsigned BSIM4v5pdwbGiven :1; + unsigned BSIM4v5pb0Given :1; + unsigned BSIM4v5pb1Given :1; + unsigned BSIM4v5palpha0Given :1; + unsigned BSIM4v5palpha1Given :1; + unsigned BSIM4v5pbeta0Given :1; + unsigned BSIM4v5pvfbGiven :1; + unsigned BSIM4v5pagidlGiven :1; + unsigned BSIM4v5pbgidlGiven :1; + unsigned BSIM4v5pcgidlGiven :1; + unsigned BSIM4v5pegidlGiven :1; + unsigned BSIM4v5paigcGiven :1; + unsigned BSIM4v5pbigcGiven :1; + unsigned BSIM4v5pcigcGiven :1; + unsigned BSIM4v5paigsdGiven :1; + unsigned BSIM4v5pbigsdGiven :1; + unsigned BSIM4v5pcigsdGiven :1; + unsigned BSIM4v5paigbaccGiven :1; + unsigned BSIM4v5pbigbaccGiven :1; + unsigned BSIM4v5pcigbaccGiven :1; + unsigned BSIM4v5paigbinvGiven :1; + unsigned BSIM4v5pbigbinvGiven :1; + unsigned BSIM4v5pcigbinvGiven :1; + unsigned BSIM4v5pnigcGiven :1; + unsigned BSIM4v5pnigbinvGiven :1; + unsigned BSIM4v5pnigbaccGiven :1; + unsigned BSIM4v5pntoxGiven :1; + unsigned BSIM4v5peigbinvGiven :1; + unsigned BSIM4v5ppigcdGiven :1; + unsigned BSIM4v5ppoxedgeGiven :1; + unsigned BSIM4v5pxrcrg1Given :1; + unsigned BSIM4v5pxrcrg2Given :1; + unsigned BSIM4v5plambdaGiven :1; + unsigned BSIM4v5pvtlGiven :1; + unsigned BSIM4v5pxnGiven :1; + unsigned BSIM4v5pvfbsdoffGiven :1; + unsigned BSIM4v5ptvfbsdoffGiven :1; + + /* CV model */ + unsigned BSIM4v5pcgslGiven :1; + unsigned BSIM4v5pcgdlGiven :1; + unsigned BSIM4v5pckappasGiven :1; + unsigned BSIM4v5pckappadGiven :1; + unsigned BSIM4v5pcfGiven :1; + unsigned BSIM4v5pclcGiven :1; + unsigned BSIM4v5pcleGiven :1; + unsigned BSIM4v5pvfbcvGiven :1; + unsigned BSIM4v5pnoffGiven :1; + unsigned BSIM4v5pvoffcvGiven :1; + unsigned BSIM4v5pacdeGiven :1; + unsigned BSIM4v5pmoinGiven :1; + + unsigned BSIM4v5useFringeGiven :1; + + unsigned BSIM4v5tnomGiven :1; + unsigned BSIM4v5cgsoGiven :1; + unsigned BSIM4v5cgdoGiven :1; + unsigned BSIM4v5cgboGiven :1; + unsigned BSIM4v5xpartGiven :1; + unsigned BSIM4v5sheetResistanceGiven :1; + + unsigned BSIM4v5SjctSatCurDensityGiven :1; + unsigned BSIM4v5SjctSidewallSatCurDensityGiven :1; + unsigned BSIM4v5SjctGateSidewallSatCurDensityGiven :1; + unsigned BSIM4v5SbulkJctPotentialGiven :1; + unsigned BSIM4v5SbulkJctBotGradingCoeffGiven :1; + unsigned BSIM4v5SsidewallJctPotentialGiven :1; + unsigned BSIM4v5SGatesidewallJctPotentialGiven :1; + unsigned BSIM4v5SbulkJctSideGradingCoeffGiven :1; + unsigned BSIM4v5SunitAreaJctCapGiven :1; + unsigned BSIM4v5SunitLengthSidewallJctCapGiven :1; + unsigned BSIM4v5SbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM4v5SunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM4v5SjctEmissionCoeffGiven :1; + unsigned BSIM4v5SjctTempExponentGiven :1; + + unsigned BSIM4v5DjctSatCurDensityGiven :1; + unsigned BSIM4v5DjctSidewallSatCurDensityGiven :1; + unsigned BSIM4v5DjctGateSidewallSatCurDensityGiven :1; + unsigned BSIM4v5DbulkJctPotentialGiven :1; + unsigned BSIM4v5DbulkJctBotGradingCoeffGiven :1; + unsigned BSIM4v5DsidewallJctPotentialGiven :1; + unsigned BSIM4v5DGatesidewallJctPotentialGiven :1; + unsigned BSIM4v5DbulkJctSideGradingCoeffGiven :1; + unsigned BSIM4v5DunitAreaJctCapGiven :1; + unsigned BSIM4v5DunitLengthSidewallJctCapGiven :1; + unsigned BSIM4v5DbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM4v5DunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM4v5DjctEmissionCoeffGiven :1; + unsigned BSIM4v5DjctTempExponentGiven :1; + + unsigned BSIM4v5oxideTrapDensityAGiven :1; + unsigned BSIM4v5oxideTrapDensityBGiven :1; + unsigned BSIM4v5oxideTrapDensityCGiven :1; + unsigned BSIM4v5emGiven :1; + unsigned BSIM4v5efGiven :1; + unsigned BSIM4v5afGiven :1; + unsigned BSIM4v5kfGiven :1; + + unsigned BSIM4v5LintGiven :1; + unsigned BSIM4v5LlGiven :1; + unsigned BSIM4v5LlcGiven :1; + unsigned BSIM4v5LlnGiven :1; + unsigned BSIM4v5LwGiven :1; + unsigned BSIM4v5LwcGiven :1; + unsigned BSIM4v5LwnGiven :1; + unsigned BSIM4v5LwlGiven :1; + unsigned BSIM4v5LwlcGiven :1; + unsigned BSIM4v5LminGiven :1; + unsigned BSIM4v5LmaxGiven :1; + + unsigned BSIM4v5WintGiven :1; + unsigned BSIM4v5WlGiven :1; + unsigned BSIM4v5WlcGiven :1; + unsigned BSIM4v5WlnGiven :1; + unsigned BSIM4v5WwGiven :1; + unsigned BSIM4v5WwcGiven :1; + unsigned BSIM4v5WwnGiven :1; + unsigned BSIM4v5WwlGiven :1; + unsigned BSIM4v5WwlcGiven :1; + unsigned BSIM4v5WminGiven :1; + unsigned BSIM4v5WmaxGiven :1; + + /* added for stress effect */ + unsigned BSIM4v5sarefGiven :1; + unsigned BSIM4v5sbrefGiven :1; + unsigned BSIM4v5wlodGiven :1; + unsigned BSIM4v5ku0Given :1; + unsigned BSIM4v5kvsatGiven :1; + unsigned BSIM4v5kvth0Given :1; + unsigned BSIM4v5tku0Given :1; + unsigned BSIM4v5llodku0Given :1; + unsigned BSIM4v5wlodku0Given :1; + unsigned BSIM4v5llodvthGiven :1; + unsigned BSIM4v5wlodvthGiven :1; + unsigned BSIM4v5lku0Given :1; + unsigned BSIM4v5wku0Given :1; + unsigned BSIM4v5pku0Given :1; + unsigned BSIM4v5lkvth0Given :1; + unsigned BSIM4v5wkvth0Given :1; + unsigned BSIM4v5pkvth0Given :1; + unsigned BSIM4v5stk2Given :1; + unsigned BSIM4v5lodk2Given :1; + unsigned BSIM4v5steta0Given :1; + unsigned BSIM4v5lodeta0Given :1; + + unsigned BSIM4v5webGiven :1; + unsigned BSIM4v5wecGiven :1; + unsigned BSIM4v5kvth0weGiven :1; + unsigned BSIM4v5k2weGiven :1; + unsigned BSIM4v5ku0weGiven :1; + unsigned BSIM4v5screfGiven :1; + unsigned BSIM4v5wpemodGiven :1; + unsigned BSIM4v5lkvth0weGiven :1; + unsigned BSIM4v5lk2weGiven :1; + unsigned BSIM4v5lku0weGiven :1; + unsigned BSIM4v5wkvth0weGiven :1; + unsigned BSIM4v5wk2weGiven :1; + unsigned BSIM4v5wku0weGiven :1; + unsigned BSIM4v5pkvth0weGiven :1; + unsigned BSIM4v5pk2weGiven :1; + unsigned BSIM4v5pku0weGiven :1; + + +} BSIM4v5model; + + +#ifndef NMOS +#define NMOS 1 +#define PMOS -1 +#endif /*NMOS*/ + + +/* Instance parameters */ +#define BSIM4v5_W 1 +#define BSIM4v5_L 2 +#define BSIM4v5_AS 3 +#define BSIM4v5_AD 4 +#define BSIM4v5_PS 5 +#define BSIM4v5_PD 6 +#define BSIM4v5_NRS 7 +#define BSIM4v5_NRD 8 +#define BSIM4v5_OFF 9 +#define BSIM4v5_IC 10 +#define BSIM4v5_IC_VDS 11 +#define BSIM4v5_IC_VGS 12 +#define BSIM4v5_IC_VBS 13 +#define BSIM4v5_TRNQSMOD 14 +#define BSIM4v5_RBODYMOD 15 +#define BSIM4v5_RGATEMOD 16 +#define BSIM4v5_GEOMOD 17 +#define BSIM4v5_RGEOMOD 18 +#define BSIM4v5_NF 19 +#define BSIM4v5_MIN 20 +#define BSIM4v5_ACNQSMOD 22 +#define BSIM4v5_RBDB 23 +#define BSIM4v5_RBSB 24 +#define BSIM4v5_RBPB 25 +#define BSIM4v5_RBPS 26 +#define BSIM4v5_RBPD 27 +#define BSIM4v5_SA 28 +#define BSIM4v5_SB 29 +#define BSIM4v5_SD 30 +#define BSIM4v5_DELVTO 31 +#define BSIM4v5_XGW 32 +#define BSIM4v5_NGCON 33 +#define BSIM4v5_SCA 34 +#define BSIM4v5_SCB 35 +#define BSIM4v5_SCC 36 +#define BSIM4v5_SC 37 +#define BSIM4v5_M 38 + +/* Global parameters */ +#define BSIM4v5_MOD_TEMPMOD 89 +#define BSIM4v5_MOD_IGCMOD 90 +#define BSIM4v5_MOD_IGBMOD 91 +#define BSIM4v5_MOD_ACNQSMOD 92 +#define BSIM4v5_MOD_FNOIMOD 93 +#define BSIM4v5_MOD_RDSMOD 94 +#define BSIM4v5_MOD_DIOMOD 96 +#define BSIM4v5_MOD_PERMOD 97 +#define BSIM4v5_MOD_GEOMOD 98 +#define BSIM4v5_MOD_RGATEMOD 99 +#define BSIM4v5_MOD_RBODYMOD 100 +#define BSIM4v5_MOD_CAPMOD 101 +#define BSIM4v5_MOD_TRNQSMOD 102 +#define BSIM4v5_MOD_MOBMOD 103 +#define BSIM4v5_MOD_TNOIMOD 104 +#define BSIM4v5_MOD_TOXE 105 +#define BSIM4v5_MOD_CDSC 106 +#define BSIM4v5_MOD_CDSCB 107 +#define BSIM4v5_MOD_CIT 108 +#define BSIM4v5_MOD_NFACTOR 109 +#define BSIM4v5_MOD_XJ 110 +#define BSIM4v5_MOD_VSAT 111 +#define BSIM4v5_MOD_AT 112 +#define BSIM4v5_MOD_A0 113 +#define BSIM4v5_MOD_A1 114 +#define BSIM4v5_MOD_A2 115 +#define BSIM4v5_MOD_KETA 116 +#define BSIM4v5_MOD_NSUB 117 +#define BSIM4v5_MOD_NDEP 118 +#define BSIM4v5_MOD_NGATE 120 +#define BSIM4v5_MOD_GAMMA1 121 +#define BSIM4v5_MOD_GAMMA2 122 +#define BSIM4v5_MOD_VBX 123 +#define BSIM4v5_MOD_BINUNIT 124 +#define BSIM4v5_MOD_VBM 125 +#define BSIM4v5_MOD_XT 126 +#define BSIM4v5_MOD_K1 129 +#define BSIM4v5_MOD_KT1 130 +#define BSIM4v5_MOD_KT1L 131 +#define BSIM4v5_MOD_K2 132 +#define BSIM4v5_MOD_KT2 133 +#define BSIM4v5_MOD_K3 134 +#define BSIM4v5_MOD_K3B 135 +#define BSIM4v5_MOD_W0 136 +#define BSIM4v5_MOD_LPE0 137 +#define BSIM4v5_MOD_DVT0 138 +#define BSIM4v5_MOD_DVT1 139 +#define BSIM4v5_MOD_DVT2 140 +#define BSIM4v5_MOD_DVT0W 141 +#define BSIM4v5_MOD_DVT1W 142 +#define BSIM4v5_MOD_DVT2W 143 +#define BSIM4v5_MOD_DROUT 144 +#define BSIM4v5_MOD_DSUB 145 +#define BSIM4v5_MOD_VTH0 146 +#define BSIM4v5_MOD_UA 147 +#define BSIM4v5_MOD_UA1 148 +#define BSIM4v5_MOD_UB 149 +#define BSIM4v5_MOD_UB1 150 +#define BSIM4v5_MOD_UC 151 +#define BSIM4v5_MOD_UC1 152 +#define BSIM4v5_MOD_U0 153 +#define BSIM4v5_MOD_UTE 154 +#define BSIM4v5_MOD_VOFF 155 +#define BSIM4v5_MOD_DELTA 156 +#define BSIM4v5_MOD_RDSW 157 +#define BSIM4v5_MOD_PRT 158 +#define BSIM4v5_MOD_LDD 159 +#define BSIM4v5_MOD_ETA 160 +#define BSIM4v5_MOD_ETA0 161 +#define BSIM4v5_MOD_ETAB 162 +#define BSIM4v5_MOD_PCLM 163 +#define BSIM4v5_MOD_PDIBL1 164 +#define BSIM4v5_MOD_PDIBL2 165 +#define BSIM4v5_MOD_PSCBE1 166 +#define BSIM4v5_MOD_PSCBE2 167 +#define BSIM4v5_MOD_PVAG 168 +#define BSIM4v5_MOD_WR 169 +#define BSIM4v5_MOD_DWG 170 +#define BSIM4v5_MOD_DWB 171 +#define BSIM4v5_MOD_B0 172 +#define BSIM4v5_MOD_B1 173 +#define BSIM4v5_MOD_ALPHA0 174 +#define BSIM4v5_MOD_BETA0 175 +#define BSIM4v5_MOD_PDIBLB 178 +#define BSIM4v5_MOD_PRWG 179 +#define BSIM4v5_MOD_PRWB 180 +#define BSIM4v5_MOD_CDSCD 181 +#define BSIM4v5_MOD_AGS 182 +#define BSIM4v5_MOD_FRINGE 184 +#define BSIM4v5_MOD_CGSL 186 +#define BSIM4v5_MOD_CGDL 187 +#define BSIM4v5_MOD_CKAPPAS 188 +#define BSIM4v5_MOD_CF 189 +#define BSIM4v5_MOD_CLC 190 +#define BSIM4v5_MOD_CLE 191 +#define BSIM4v5_MOD_PARAMCHK 192 +#define BSIM4v5_MOD_VERSION 193 +#define BSIM4v5_MOD_VFBCV 194 +#define BSIM4v5_MOD_ACDE 195 +#define BSIM4v5_MOD_MOIN 196 +#define BSIM4v5_MOD_NOFF 197 +#define BSIM4v5_MOD_IJTHDFWD 198 +#define BSIM4v5_MOD_ALPHA1 199 +#define BSIM4v5_MOD_VFB 200 +#define BSIM4v5_MOD_TOXM 201 +#define BSIM4v5_MOD_TCJ 202 +#define BSIM4v5_MOD_TCJSW 203 +#define BSIM4v5_MOD_TCJSWG 204 +#define BSIM4v5_MOD_TPB 205 +#define BSIM4v5_MOD_TPBSW 206 +#define BSIM4v5_MOD_TPBSWG 207 +#define BSIM4v5_MOD_VOFFCV 208 +#define BSIM4v5_MOD_GBMIN 209 +#define BSIM4v5_MOD_RBDB 210 +#define BSIM4v5_MOD_RBSB 211 +#define BSIM4v5_MOD_RBPB 212 +#define BSIM4v5_MOD_RBPS 213 +#define BSIM4v5_MOD_RBPD 214 +#define BSIM4v5_MOD_DMCG 215 +#define BSIM4v5_MOD_DMCI 216 +#define BSIM4v5_MOD_DMDG 217 +#define BSIM4v5_MOD_XGW 218 +#define BSIM4v5_MOD_XGL 219 +#define BSIM4v5_MOD_RSHG 220 +#define BSIM4v5_MOD_NGCON 221 +#define BSIM4v5_MOD_AGIDL 222 +#define BSIM4v5_MOD_BGIDL 223 +#define BSIM4v5_MOD_EGIDL 224 +#define BSIM4v5_MOD_IJTHSFWD 225 +#define BSIM4v5_MOD_XJBVD 226 +#define BSIM4v5_MOD_XJBVS 227 +#define BSIM4v5_MOD_BVD 228 +#define BSIM4v5_MOD_BVS 229 +#define BSIM4v5_MOD_TOXP 230 +#define BSIM4v5_MOD_DTOX 231 +#define BSIM4v5_MOD_XRCRG1 232 +#define BSIM4v5_MOD_XRCRG2 233 +#define BSIM4v5_MOD_EU 234 +#define BSIM4v5_MOD_IJTHSREV 235 +#define BSIM4v5_MOD_IJTHDREV 236 +#define BSIM4v5_MOD_MINV 237 +#define BSIM4v5_MOD_VOFFL 238 +#define BSIM4v5_MOD_PDITS 239 +#define BSIM4v5_MOD_PDITSD 240 +#define BSIM4v5_MOD_PDITSL 241 +#define BSIM4v5_MOD_TNOIA 242 +#define BSIM4v5_MOD_TNOIB 243 +#define BSIM4v5_MOD_NTNOI 244 +#define BSIM4v5_MOD_FPROUT 245 +#define BSIM4v5_MOD_LPEB 246 +#define BSIM4v5_MOD_DVTP0 247 +#define BSIM4v5_MOD_DVTP1 248 +#define BSIM4v5_MOD_CGIDL 249 +#define BSIM4v5_MOD_PHIN 250 +#define BSIM4v5_MOD_RDSWMIN 251 +#define BSIM4v5_MOD_RSW 252 +#define BSIM4v5_MOD_RDW 253 +#define BSIM4v5_MOD_RDWMIN 254 +#define BSIM4v5_MOD_RSWMIN 255 +#define BSIM4v5_MOD_NSD 256 +#define BSIM4v5_MOD_CKAPPAD 257 +#define BSIM4v5_MOD_DMCGT 258 +#define BSIM4v5_MOD_AIGC 259 +#define BSIM4v5_MOD_BIGC 260 +#define BSIM4v5_MOD_CIGC 261 +#define BSIM4v5_MOD_AIGBACC 262 +#define BSIM4v5_MOD_BIGBACC 263 +#define BSIM4v5_MOD_CIGBACC 264 +#define BSIM4v5_MOD_AIGBINV 265 +#define BSIM4v5_MOD_BIGBINV 266 +#define BSIM4v5_MOD_CIGBINV 267 +#define BSIM4v5_MOD_NIGC 268 +#define BSIM4v5_MOD_NIGBACC 269 +#define BSIM4v5_MOD_NIGBINV 270 +#define BSIM4v5_MOD_NTOX 271 +#define BSIM4v5_MOD_TOXREF 272 +#define BSIM4v5_MOD_EIGBINV 273 +#define BSIM4v5_MOD_PIGCD 274 +#define BSIM4v5_MOD_POXEDGE 275 +#define BSIM4v5_MOD_EPSROX 276 +#define BSIM4v5_MOD_AIGSD 277 +#define BSIM4v5_MOD_BIGSD 278 +#define BSIM4v5_MOD_CIGSD 279 +#define BSIM4v5_MOD_JSWGS 280 +#define BSIM4v5_MOD_JSWGD 281 +#define BSIM4v5_MOD_LAMBDA 282 +#define BSIM4v5_MOD_VTL 283 +#define BSIM4v5_MOD_LC 284 +#define BSIM4v5_MOD_XN 285 +#define BSIM4v5_MOD_RNOIA 286 +#define BSIM4v5_MOD_RNOIB 287 +#define BSIM4v5_MOD_VFBSDOFF 288 +#define BSIM4v5_MOD_LINTNOI 289 +#define BSIM4v5_MOD_UD 290 +#define BSIM4v5_MOD_UD1 291 +#define BSIM4v5_MOD_UP 292 +#define BSIM4v5_MOD_LP 293 +#define BSIM4v5_MOD_TVOFF 294 +#define BSIM4v5_MOD_TVFBSDOFF 295 + +/* Length dependence */ +#define BSIM4v5_MOD_LCDSC 301 +#define BSIM4v5_MOD_LCDSCB 302 +#define BSIM4v5_MOD_LCIT 303 +#define BSIM4v5_MOD_LNFACTOR 304 +#define BSIM4v5_MOD_LXJ 305 +#define BSIM4v5_MOD_LVSAT 306 +#define BSIM4v5_MOD_LAT 307 +#define BSIM4v5_MOD_LA0 308 +#define BSIM4v5_MOD_LA1 309 +#define BSIM4v5_MOD_LA2 310 +#define BSIM4v5_MOD_LKETA 311 +#define BSIM4v5_MOD_LNSUB 312 +#define BSIM4v5_MOD_LNDEP 313 +#define BSIM4v5_MOD_LNGATE 315 +#define BSIM4v5_MOD_LGAMMA1 316 +#define BSIM4v5_MOD_LGAMMA2 317 +#define BSIM4v5_MOD_LVBX 318 +#define BSIM4v5_MOD_LVBM 320 +#define BSIM4v5_MOD_LXT 322 +#define BSIM4v5_MOD_LK1 325 +#define BSIM4v5_MOD_LKT1 326 +#define BSIM4v5_MOD_LKT1L 327 +#define BSIM4v5_MOD_LK2 328 +#define BSIM4v5_MOD_LKT2 329 +#define BSIM4v5_MOD_LK3 330 +#define BSIM4v5_MOD_LK3B 331 +#define BSIM4v5_MOD_LW0 332 +#define BSIM4v5_MOD_LLPE0 333 +#define BSIM4v5_MOD_LDVT0 334 +#define BSIM4v5_MOD_LDVT1 335 +#define BSIM4v5_MOD_LDVT2 336 +#define BSIM4v5_MOD_LDVT0W 337 +#define BSIM4v5_MOD_LDVT1W 338 +#define BSIM4v5_MOD_LDVT2W 339 +#define BSIM4v5_MOD_LDROUT 340 +#define BSIM4v5_MOD_LDSUB 341 +#define BSIM4v5_MOD_LVTH0 342 +#define BSIM4v5_MOD_LUA 343 +#define BSIM4v5_MOD_LUA1 344 +#define BSIM4v5_MOD_LUB 345 +#define BSIM4v5_MOD_LUB1 346 +#define BSIM4v5_MOD_LUC 347 +#define BSIM4v5_MOD_LUC1 348 +#define BSIM4v5_MOD_LU0 349 +#define BSIM4v5_MOD_LUTE 350 +#define BSIM4v5_MOD_LVOFF 351 +#define BSIM4v5_MOD_LDELTA 352 +#define BSIM4v5_MOD_LRDSW 353 +#define BSIM4v5_MOD_LPRT 354 +#define BSIM4v5_MOD_LLDD 355 +#define BSIM4v5_MOD_LETA 356 +#define BSIM4v5_MOD_LETA0 357 +#define BSIM4v5_MOD_LETAB 358 +#define BSIM4v5_MOD_LPCLM 359 +#define BSIM4v5_MOD_LPDIBL1 360 +#define BSIM4v5_MOD_LPDIBL2 361 +#define BSIM4v5_MOD_LPSCBE1 362 +#define BSIM4v5_MOD_LPSCBE2 363 +#define BSIM4v5_MOD_LPVAG 364 +#define BSIM4v5_MOD_LWR 365 +#define BSIM4v5_MOD_LDWG 366 +#define BSIM4v5_MOD_LDWB 367 +#define BSIM4v5_MOD_LB0 368 +#define BSIM4v5_MOD_LB1 369 +#define BSIM4v5_MOD_LALPHA0 370 +#define BSIM4v5_MOD_LBETA0 371 +#define BSIM4v5_MOD_LPDIBLB 374 +#define BSIM4v5_MOD_LPRWG 375 +#define BSIM4v5_MOD_LPRWB 376 +#define BSIM4v5_MOD_LCDSCD 377 +#define BSIM4v5_MOD_LAGS 378 + +#define BSIM4v5_MOD_LFRINGE 381 +#define BSIM4v5_MOD_LCGSL 383 +#define BSIM4v5_MOD_LCGDL 384 +#define BSIM4v5_MOD_LCKAPPAS 385 +#define BSIM4v5_MOD_LCF 386 +#define BSIM4v5_MOD_LCLC 387 +#define BSIM4v5_MOD_LCLE 388 +#define BSIM4v5_MOD_LVFBCV 389 +#define BSIM4v5_MOD_LACDE 390 +#define BSIM4v5_MOD_LMOIN 391 +#define BSIM4v5_MOD_LNOFF 392 +#define BSIM4v5_MOD_LALPHA1 394 +#define BSIM4v5_MOD_LVFB 395 +#define BSIM4v5_MOD_LVOFFCV 396 +#define BSIM4v5_MOD_LAGIDL 397 +#define BSIM4v5_MOD_LBGIDL 398 +#define BSIM4v5_MOD_LEGIDL 399 +#define BSIM4v5_MOD_LXRCRG1 400 +#define BSIM4v5_MOD_LXRCRG2 401 +#define BSIM4v5_MOD_LEU 402 +#define BSIM4v5_MOD_LMINV 403 +#define BSIM4v5_MOD_LPDITS 404 +#define BSIM4v5_MOD_LPDITSD 405 +#define BSIM4v5_MOD_LFPROUT 406 +#define BSIM4v5_MOD_LLPEB 407 +#define BSIM4v5_MOD_LDVTP0 408 +#define BSIM4v5_MOD_LDVTP1 409 +#define BSIM4v5_MOD_LCGIDL 410 +#define BSIM4v5_MOD_LPHIN 411 +#define BSIM4v5_MOD_LRSW 412 +#define BSIM4v5_MOD_LRDW 413 +#define BSIM4v5_MOD_LNSD 414 +#define BSIM4v5_MOD_LCKAPPAD 415 +#define BSIM4v5_MOD_LAIGC 416 +#define BSIM4v5_MOD_LBIGC 417 +#define BSIM4v5_MOD_LCIGC 418 +#define BSIM4v5_MOD_LAIGBACC 419 +#define BSIM4v5_MOD_LBIGBACC 420 +#define BSIM4v5_MOD_LCIGBACC 421 +#define BSIM4v5_MOD_LAIGBINV 422 +#define BSIM4v5_MOD_LBIGBINV 423 +#define BSIM4v5_MOD_LCIGBINV 424 +#define BSIM4v5_MOD_LNIGC 425 +#define BSIM4v5_MOD_LNIGBACC 426 +#define BSIM4v5_MOD_LNIGBINV 427 +#define BSIM4v5_MOD_LNTOX 428 +#define BSIM4v5_MOD_LEIGBINV 429 +#define BSIM4v5_MOD_LPIGCD 430 +#define BSIM4v5_MOD_LPOXEDGE 431 +#define BSIM4v5_MOD_LAIGSD 432 +#define BSIM4v5_MOD_LBIGSD 433 +#define BSIM4v5_MOD_LCIGSD 434 + +#define BSIM4v5_MOD_LLAMBDA 435 +#define BSIM4v5_MOD_LVTL 436 +#define BSIM4v5_MOD_LXN 437 +#define BSIM4v5_MOD_LVFBSDOFF 438 +#define BSIM4v5_MOD_LUD 439 +#define BSIM4v5_MOD_LUD1 440 +#define BSIM4v5_MOD_LUP 441 +#define BSIM4v5_MOD_LLP 442 + +/* Width dependence */ +#define BSIM4v5_MOD_WCDSC 481 +#define BSIM4v5_MOD_WCDSCB 482 +#define BSIM4v5_MOD_WCIT 483 +#define BSIM4v5_MOD_WNFACTOR 484 +#define BSIM4v5_MOD_WXJ 485 +#define BSIM4v5_MOD_WVSAT 486 +#define BSIM4v5_MOD_WAT 487 +#define BSIM4v5_MOD_WA0 488 +#define BSIM4v5_MOD_WA1 489 +#define BSIM4v5_MOD_WA2 490 +#define BSIM4v5_MOD_WKETA 491 +#define BSIM4v5_MOD_WNSUB 492 +#define BSIM4v5_MOD_WNDEP 493 +#define BSIM4v5_MOD_WNGATE 495 +#define BSIM4v5_MOD_WGAMMA1 496 +#define BSIM4v5_MOD_WGAMMA2 497 +#define BSIM4v5_MOD_WVBX 498 +#define BSIM4v5_MOD_WVBM 500 +#define BSIM4v5_MOD_WXT 502 +#define BSIM4v5_MOD_WK1 505 +#define BSIM4v5_MOD_WKT1 506 +#define BSIM4v5_MOD_WKT1L 507 +#define BSIM4v5_MOD_WK2 508 +#define BSIM4v5_MOD_WKT2 509 +#define BSIM4v5_MOD_WK3 510 +#define BSIM4v5_MOD_WK3B 511 +#define BSIM4v5_MOD_WW0 512 +#define BSIM4v5_MOD_WLPE0 513 +#define BSIM4v5_MOD_WDVT0 514 +#define BSIM4v5_MOD_WDVT1 515 +#define BSIM4v5_MOD_WDVT2 516 +#define BSIM4v5_MOD_WDVT0W 517 +#define BSIM4v5_MOD_WDVT1W 518 +#define BSIM4v5_MOD_WDVT2W 519 +#define BSIM4v5_MOD_WDROUT 520 +#define BSIM4v5_MOD_WDSUB 521 +#define BSIM4v5_MOD_WVTH0 522 +#define BSIM4v5_MOD_WUA 523 +#define BSIM4v5_MOD_WUA1 524 +#define BSIM4v5_MOD_WUB 525 +#define BSIM4v5_MOD_WUB1 526 +#define BSIM4v5_MOD_WUC 527 +#define BSIM4v5_MOD_WUC1 528 +#define BSIM4v5_MOD_WU0 529 +#define BSIM4v5_MOD_WUTE 530 +#define BSIM4v5_MOD_WVOFF 531 +#define BSIM4v5_MOD_WDELTA 532 +#define BSIM4v5_MOD_WRDSW 533 +#define BSIM4v5_MOD_WPRT 534 +#define BSIM4v5_MOD_WLDD 535 +#define BSIM4v5_MOD_WETA 536 +#define BSIM4v5_MOD_WETA0 537 +#define BSIM4v5_MOD_WETAB 538 +#define BSIM4v5_MOD_WPCLM 539 +#define BSIM4v5_MOD_WPDIBL1 540 +#define BSIM4v5_MOD_WPDIBL2 541 +#define BSIM4v5_MOD_WPSCBE1 542 +#define BSIM4v5_MOD_WPSCBE2 543 +#define BSIM4v5_MOD_WPVAG 544 +#define BSIM4v5_MOD_WWR 545 +#define BSIM4v5_MOD_WDWG 546 +#define BSIM4v5_MOD_WDWB 547 +#define BSIM4v5_MOD_WB0 548 +#define BSIM4v5_MOD_WB1 549 +#define BSIM4v5_MOD_WALPHA0 550 +#define BSIM4v5_MOD_WBETA0 551 +#define BSIM4v5_MOD_WPDIBLB 554 +#define BSIM4v5_MOD_WPRWG 555 +#define BSIM4v5_MOD_WPRWB 556 +#define BSIM4v5_MOD_WCDSCD 557 +#define BSIM4v5_MOD_WAGS 558 + +#define BSIM4v5_MOD_WFRINGE 561 +#define BSIM4v5_MOD_WCGSL 563 +#define BSIM4v5_MOD_WCGDL 564 +#define BSIM4v5_MOD_WCKAPPAS 565 +#define BSIM4v5_MOD_WCF 566 +#define BSIM4v5_MOD_WCLC 567 +#define BSIM4v5_MOD_WCLE 568 +#define BSIM4v5_MOD_WVFBCV 569 +#define BSIM4v5_MOD_WACDE 570 +#define BSIM4v5_MOD_WMOIN 571 +#define BSIM4v5_MOD_WNOFF 572 +#define BSIM4v5_MOD_WALPHA1 574 +#define BSIM4v5_MOD_WVFB 575 +#define BSIM4v5_MOD_WVOFFCV 576 +#define BSIM4v5_MOD_WAGIDL 577 +#define BSIM4v5_MOD_WBGIDL 578 +#define BSIM4v5_MOD_WEGIDL 579 +#define BSIM4v5_MOD_WXRCRG1 580 +#define BSIM4v5_MOD_WXRCRG2 581 +#define BSIM4v5_MOD_WEU 582 +#define BSIM4v5_MOD_WMINV 583 +#define BSIM4v5_MOD_WPDITS 584 +#define BSIM4v5_MOD_WPDITSD 585 +#define BSIM4v5_MOD_WFPROUT 586 +#define BSIM4v5_MOD_WLPEB 587 +#define BSIM4v5_MOD_WDVTP0 588 +#define BSIM4v5_MOD_WDVTP1 589 +#define BSIM4v5_MOD_WCGIDL 590 +#define BSIM4v5_MOD_WPHIN 591 +#define BSIM4v5_MOD_WRSW 592 +#define BSIM4v5_MOD_WRDW 593 +#define BSIM4v5_MOD_WNSD 594 +#define BSIM4v5_MOD_WCKAPPAD 595 +#define BSIM4v5_MOD_WAIGC 596 +#define BSIM4v5_MOD_WBIGC 597 +#define BSIM4v5_MOD_WCIGC 598 +#define BSIM4v5_MOD_WAIGBACC 599 +#define BSIM4v5_MOD_WBIGBACC 600 +#define BSIM4v5_MOD_WCIGBACC 601 +#define BSIM4v5_MOD_WAIGBINV 602 +#define BSIM4v5_MOD_WBIGBINV 603 +#define BSIM4v5_MOD_WCIGBINV 604 +#define BSIM4v5_MOD_WNIGC 605 +#define BSIM4v5_MOD_WNIGBACC 606 +#define BSIM4v5_MOD_WNIGBINV 607 +#define BSIM4v5_MOD_WNTOX 608 +#define BSIM4v5_MOD_WEIGBINV 609 +#define BSIM4v5_MOD_WPIGCD 610 +#define BSIM4v5_MOD_WPOXEDGE 611 +#define BSIM4v5_MOD_WAIGSD 612 +#define BSIM4v5_MOD_WBIGSD 613 +#define BSIM4v5_MOD_WCIGSD 614 +#define BSIM4v5_MOD_WLAMBDA 615 +#define BSIM4v5_MOD_WVTL 616 +#define BSIM4v5_MOD_WXN 617 +#define BSIM4v5_MOD_WVFBSDOFF 618 +#define BSIM4v5_MOD_WUD 619 +#define BSIM4v5_MOD_WUD1 620 +#define BSIM4v5_MOD_WUP 621 +#define BSIM4v5_MOD_WLP 622 + +/* Cross-term dependence */ +#define BSIM4v5_MOD_PCDSC 661 +#define BSIM4v5_MOD_PCDSCB 662 +#define BSIM4v5_MOD_PCIT 663 +#define BSIM4v5_MOD_PNFACTOR 664 +#define BSIM4v5_MOD_PXJ 665 +#define BSIM4v5_MOD_PVSAT 666 +#define BSIM4v5_MOD_PAT 667 +#define BSIM4v5_MOD_PA0 668 +#define BSIM4v5_MOD_PA1 669 +#define BSIM4v5_MOD_PA2 670 +#define BSIM4v5_MOD_PKETA 671 +#define BSIM4v5_MOD_PNSUB 672 +#define BSIM4v5_MOD_PNDEP 673 +#define BSIM4v5_MOD_PNGATE 675 +#define BSIM4v5_MOD_PGAMMA1 676 +#define BSIM4v5_MOD_PGAMMA2 677 +#define BSIM4v5_MOD_PVBX 678 + +#define BSIM4v5_MOD_PVBM 680 + +#define BSIM4v5_MOD_PXT 682 +#define BSIM4v5_MOD_PK1 685 +#define BSIM4v5_MOD_PKT1 686 +#define BSIM4v5_MOD_PKT1L 687 +#define BSIM4v5_MOD_PK2 688 +#define BSIM4v5_MOD_PKT2 689 +#define BSIM4v5_MOD_PK3 690 +#define BSIM4v5_MOD_PK3B 691 +#define BSIM4v5_MOD_PW0 692 +#define BSIM4v5_MOD_PLPE0 693 + +#define BSIM4v5_MOD_PDVT0 694 +#define BSIM4v5_MOD_PDVT1 695 +#define BSIM4v5_MOD_PDVT2 696 + +#define BSIM4v5_MOD_PDVT0W 697 +#define BSIM4v5_MOD_PDVT1W 698 +#define BSIM4v5_MOD_PDVT2W 699 + +#define BSIM4v5_MOD_PDROUT 700 +#define BSIM4v5_MOD_PDSUB 701 +#define BSIM4v5_MOD_PVTH0 702 +#define BSIM4v5_MOD_PUA 703 +#define BSIM4v5_MOD_PUA1 704 +#define BSIM4v5_MOD_PUB 705 +#define BSIM4v5_MOD_PUB1 706 +#define BSIM4v5_MOD_PUC 707 +#define BSIM4v5_MOD_PUC1 708 +#define BSIM4v5_MOD_PU0 709 +#define BSIM4v5_MOD_PUTE 710 +#define BSIM4v5_MOD_PVOFF 711 +#define BSIM4v5_MOD_PDELTA 712 +#define BSIM4v5_MOD_PRDSW 713 +#define BSIM4v5_MOD_PPRT 714 +#define BSIM4v5_MOD_PLDD 715 +#define BSIM4v5_MOD_PETA 716 +#define BSIM4v5_MOD_PETA0 717 +#define BSIM4v5_MOD_PETAB 718 +#define BSIM4v5_MOD_PPCLM 719 +#define BSIM4v5_MOD_PPDIBL1 720 +#define BSIM4v5_MOD_PPDIBL2 721 +#define BSIM4v5_MOD_PPSCBE1 722 +#define BSIM4v5_MOD_PPSCBE2 723 +#define BSIM4v5_MOD_PPVAG 724 +#define BSIM4v5_MOD_PWR 725 +#define BSIM4v5_MOD_PDWG 726 +#define BSIM4v5_MOD_PDWB 727 +#define BSIM4v5_MOD_PB0 728 +#define BSIM4v5_MOD_PB1 729 +#define BSIM4v5_MOD_PALPHA0 730 +#define BSIM4v5_MOD_PBETA0 731 +#define BSIM4v5_MOD_PPDIBLB 734 + +#define BSIM4v5_MOD_PPRWG 735 +#define BSIM4v5_MOD_PPRWB 736 + +#define BSIM4v5_MOD_PCDSCD 737 +#define BSIM4v5_MOD_PAGS 738 + +#define BSIM4v5_MOD_PFRINGE 741 +#define BSIM4v5_MOD_PCGSL 743 +#define BSIM4v5_MOD_PCGDL 744 +#define BSIM4v5_MOD_PCKAPPAS 745 +#define BSIM4v5_MOD_PCF 746 +#define BSIM4v5_MOD_PCLC 747 +#define BSIM4v5_MOD_PCLE 748 +#define BSIM4v5_MOD_PVFBCV 749 +#define BSIM4v5_MOD_PACDE 750 +#define BSIM4v5_MOD_PMOIN 751 +#define BSIM4v5_MOD_PNOFF 752 +#define BSIM4v5_MOD_PALPHA1 754 +#define BSIM4v5_MOD_PVFB 755 +#define BSIM4v5_MOD_PVOFFCV 756 +#define BSIM4v5_MOD_PAGIDL 757 +#define BSIM4v5_MOD_PBGIDL 758 +#define BSIM4v5_MOD_PEGIDL 759 +#define BSIM4v5_MOD_PXRCRG1 760 +#define BSIM4v5_MOD_PXRCRG2 761 +#define BSIM4v5_MOD_PEU 762 +#define BSIM4v5_MOD_PMINV 763 +#define BSIM4v5_MOD_PPDITS 764 +#define BSIM4v5_MOD_PPDITSD 765 +#define BSIM4v5_MOD_PFPROUT 766 +#define BSIM4v5_MOD_PLPEB 767 +#define BSIM4v5_MOD_PDVTP0 768 +#define BSIM4v5_MOD_PDVTP1 769 +#define BSIM4v5_MOD_PCGIDL 770 +#define BSIM4v5_MOD_PPHIN 771 +#define BSIM4v5_MOD_PRSW 772 +#define BSIM4v5_MOD_PRDW 773 +#define BSIM4v5_MOD_PNSD 774 +#define BSIM4v5_MOD_PCKAPPAD 775 +#define BSIM4v5_MOD_PAIGC 776 +#define BSIM4v5_MOD_PBIGC 777 +#define BSIM4v5_MOD_PCIGC 778 +#define BSIM4v5_MOD_PAIGBACC 779 +#define BSIM4v5_MOD_PBIGBACC 780 +#define BSIM4v5_MOD_PCIGBACC 781 +#define BSIM4v5_MOD_PAIGBINV 782 +#define BSIM4v5_MOD_PBIGBINV 783 +#define BSIM4v5_MOD_PCIGBINV 784 +#define BSIM4v5_MOD_PNIGC 785 +#define BSIM4v5_MOD_PNIGBACC 786 +#define BSIM4v5_MOD_PNIGBINV 787 +#define BSIM4v5_MOD_PNTOX 788 +#define BSIM4v5_MOD_PEIGBINV 789 +#define BSIM4v5_MOD_PPIGCD 790 +#define BSIM4v5_MOD_PPOXEDGE 791 +#define BSIM4v5_MOD_PAIGSD 792 +#define BSIM4v5_MOD_PBIGSD 793 +#define BSIM4v5_MOD_PCIGSD 794 + +#define BSIM4v5_MOD_SAREF 795 +#define BSIM4v5_MOD_SBREF 796 +#define BSIM4v5_MOD_KU0 797 +#define BSIM4v5_MOD_KVSAT 798 +#define BSIM4v5_MOD_TKU0 799 +#define BSIM4v5_MOD_LLODKU0 800 +#define BSIM4v5_MOD_WLODKU0 801 +#define BSIM4v5_MOD_LLODVTH 802 +#define BSIM4v5_MOD_WLODVTH 803 +#define BSIM4v5_MOD_LKU0 804 +#define BSIM4v5_MOD_WKU0 805 +#define BSIM4v5_MOD_PKU0 806 +#define BSIM4v5_MOD_KVTH0 807 +#define BSIM4v5_MOD_LKVTH0 808 +#define BSIM4v5_MOD_WKVTH0 809 +#define BSIM4v5_MOD_PKVTH0 810 +#define BSIM4v5_MOD_WLOD 811 +#define BSIM4v5_MOD_STK2 812 +#define BSIM4v5_MOD_LODK2 813 +#define BSIM4v5_MOD_STETA0 814 +#define BSIM4v5_MOD_LODETA0 815 + +#define BSIM4v5_MOD_WEB 816 +#define BSIM4v5_MOD_WEC 817 +#define BSIM4v5_MOD_KVTH0WE 818 +#define BSIM4v5_MOD_K2WE 819 +#define BSIM4v5_MOD_KU0WE 820 +#define BSIM4v5_MOD_SCREF 821 +#define BSIM4v5_MOD_WPEMOD 822 + +#define BSIM4v5_MOD_PLAMBDA 825 +#define BSIM4v5_MOD_PVTL 826 +#define BSIM4v5_MOD_PXN 827 +#define BSIM4v5_MOD_PVFBSDOFF 828 + +#define BSIM4v5_MOD_TNOM 831 +#define BSIM4v5_MOD_CGSO 832 +#define BSIM4v5_MOD_CGDO 833 +#define BSIM4v5_MOD_CGBO 834 +#define BSIM4v5_MOD_XPART 835 +#define BSIM4v5_MOD_RSH 836 +#define BSIM4v5_MOD_JSS 837 +#define BSIM4v5_MOD_PBS 838 +#define BSIM4v5_MOD_MJS 839 +#define BSIM4v5_MOD_PBSWS 840 +#define BSIM4v5_MOD_MJSWS 841 +#define BSIM4v5_MOD_CJS 842 +#define BSIM4v5_MOD_CJSWS 843 +#define BSIM4v5_MOD_NMOS 844 +#define BSIM4v5_MOD_PMOS 845 +#define BSIM4v5_MOD_NOIA 846 +#define BSIM4v5_MOD_NOIB 847 +#define BSIM4v5_MOD_NOIC 848 +#define BSIM4v5_MOD_LINT 849 +#define BSIM4v5_MOD_LL 850 +#define BSIM4v5_MOD_LLN 851 +#define BSIM4v5_MOD_LW 852 +#define BSIM4v5_MOD_LWN 853 +#define BSIM4v5_MOD_LWL 854 +#define BSIM4v5_MOD_LMIN 855 +#define BSIM4v5_MOD_LMAX 856 +#define BSIM4v5_MOD_WINT 857 +#define BSIM4v5_MOD_WL 858 +#define BSIM4v5_MOD_WLN 859 +#define BSIM4v5_MOD_WW 860 +#define BSIM4v5_MOD_WWN 861 +#define BSIM4v5_MOD_WWL 862 +#define BSIM4v5_MOD_WMIN 863 +#define BSIM4v5_MOD_WMAX 864 +#define BSIM4v5_MOD_DWC 865 +#define BSIM4v5_MOD_DLC 866 +#define BSIM4v5_MOD_XL 867 +#define BSIM4v5_MOD_XW 868 +#define BSIM4v5_MOD_EM 869 +#define BSIM4v5_MOD_EF 870 +#define BSIM4v5_MOD_AF 871 +#define BSIM4v5_MOD_KF 872 +#define BSIM4v5_MOD_NJS 873 +#define BSIM4v5_MOD_XTIS 874 +#define BSIM4v5_MOD_PBSWGS 875 +#define BSIM4v5_MOD_MJSWGS 876 +#define BSIM4v5_MOD_CJSWGS 877 +#define BSIM4v5_MOD_JSWS 878 +#define BSIM4v5_MOD_LLC 879 +#define BSIM4v5_MOD_LWC 880 +#define BSIM4v5_MOD_LWLC 881 +#define BSIM4v5_MOD_WLC 882 +#define BSIM4v5_MOD_WWC 883 +#define BSIM4v5_MOD_WWLC 884 +#define BSIM4v5_MOD_DWJ 885 +#define BSIM4v5_MOD_JSD 886 +#define BSIM4v5_MOD_PBD 887 +#define BSIM4v5_MOD_MJD 888 +#define BSIM4v5_MOD_PBSWD 889 +#define BSIM4v5_MOD_MJSWD 890 +#define BSIM4v5_MOD_CJD 891 +#define BSIM4v5_MOD_CJSWD 892 +#define BSIM4v5_MOD_NJD 893 +#define BSIM4v5_MOD_XTID 894 +#define BSIM4v5_MOD_PBSWGD 895 +#define BSIM4v5_MOD_MJSWGD 896 +#define BSIM4v5_MOD_CJSWGD 897 +#define BSIM4v5_MOD_JSWD 898 +#define BSIM4v5_MOD_DLCIG 899 + +/* trap-assisted tunneling */ + +#define BSIM4v5_MOD_JTSS 900 +#define BSIM4v5_MOD_JTSD 901 +#define BSIM4v5_MOD_JTSSWS 902 +#define BSIM4v5_MOD_JTSSWD 903 +#define BSIM4v5_MOD_JTSSWGS 904 +#define BSIM4v5_MOD_JTSSWGD 905 +#define BSIM4v5_MOD_NJTS 906 +#define BSIM4v5_MOD_NJTSSW 907 +#define BSIM4v5_MOD_NJTSSWG 908 +#define BSIM4v5_MOD_XTSS 909 +#define BSIM4v5_MOD_XTSD 910 +#define BSIM4v5_MOD_XTSSWS 911 +#define BSIM4v5_MOD_XTSSWD 912 +#define BSIM4v5_MOD_XTSSWGS 913 +#define BSIM4v5_MOD_XTSSWGD 914 +#define BSIM4v5_MOD_TNJTS 915 +#define BSIM4v5_MOD_TNJTSSW 916 +#define BSIM4v5_MOD_TNJTSSWG 917 +#define BSIM4v5_MOD_VTSS 918 +#define BSIM4v5_MOD_VTSD 919 +#define BSIM4v5_MOD_VTSSWS 920 +#define BSIM4v5_MOD_VTSSWD 921 +#define BSIM4v5_MOD_VTSSWGS 922 +#define BSIM4v5_MOD_VTSSWGD 923 +#define BSIM4v5_MOD_PUD 924 +#define BSIM4v5_MOD_PUD1 925 +#define BSIM4v5_MOD_PUP 926 +#define BSIM4v5_MOD_PLP 927 + +#define BSIM4v5_MOD_STIMOD 930 +#define BSIM4v5_MOD_SA0 931 +#define BSIM4v5_MOD_SB0 932 + +#define BSIM4v5_MOD_RGEOMOD 933 + +/* device questions */ +#define BSIM4v5_DNODE 945 +#define BSIM4v5_GNODEEXT 946 +#define BSIM4v5_SNODE 947 +#define BSIM4v5_BNODE 948 +#define BSIM4v5_DNODEPRIME 949 +#define BSIM4v5_GNODEPRIME 950 +#define BSIM4v5_GNODEMIDE 951 +#define BSIM4v5_GNODEMID 952 +#define BSIM4v5_SNODEPRIME 953 +#define BSIM4v5_BNODEPRIME 954 +#define BSIM4v5_DBNODE 955 +#define BSIM4v5_SBNODE 956 +#define BSIM4v5_VBD 957 +#define BSIM4v5_VBS 958 +#define BSIM4v5_VGS 959 +#define BSIM4v5_VDS 960 +#define BSIM4v5_CD 961 +#define BSIM4v5_CBS 962 +#define BSIM4v5_CBD 963 +#define BSIM4v5_GM 964 +#define BSIM4v5_GDS 965 +#define BSIM4v5_GMBS 966 +#define BSIM4v5_GBD 967 +#define BSIM4v5_GBS 968 +#define BSIM4v5_QB 969 +#define BSIM4v5_CQB 970 +#define BSIM4v5_QG 971 +#define BSIM4v5_CQG 972 +#define BSIM4v5_QD 973 +#define BSIM4v5_CQD 974 +#define BSIM4v5_CGGB 975 +#define BSIM4v5_CGDB 976 +#define BSIM4v5_CGSB 977 +#define BSIM4v5_CBGB 978 +#define BSIM4v5_CAPBD 979 +#define BSIM4v5_CQBD 980 +#define BSIM4v5_CAPBS 981 +#define BSIM4v5_CQBS 982 +#define BSIM4v5_CDGB 983 +#define BSIM4v5_CDDB 984 +#define BSIM4v5_CDSB 985 +#define BSIM4v5_VON 986 +#define BSIM4v5_VDSAT 987 +#define BSIM4v5_QBS 988 +#define BSIM4v5_QBD 989 +#define BSIM4v5_SOURCECONDUCT 990 +#define BSIM4v5_DRAINCONDUCT 991 +#define BSIM4v5_CBDB 992 +#define BSIM4v5_CBSB 993 +#define BSIM4v5_CSUB 994 +#define BSIM4v5_QINV 995 +#define BSIM4v5_IGIDL 996 +#define BSIM4v5_CSGB 997 +#define BSIM4v5_CSDB 998 +#define BSIM4v5_CSSB 999 +#define BSIM4v5_CGBB 1000 +#define BSIM4v5_CDBB 1001 +#define BSIM4v5_CSBB 1002 +#define BSIM4v5_CBBB 1003 +#define BSIM4v5_QS 1004 +#define BSIM4v5_IGISL 1005 +#define BSIM4v5_IGS 1006 +#define BSIM4v5_IGD 1007 +#define BSIM4v5_IGB 1008 +#define BSIM4v5_IGCS 1009 +#define BSIM4v5_IGCD 1010 +#define BSIM4v5_QDEF 1011 +#define BSIM4v5_DELVT0 1012 +#define BSIM4v5_GCRG 1013 +#define BSIM4v5_GTAU 1014 + +#define BSIM4v5_MOD_LTVOFF 1051 +#define BSIM4v5_MOD_LTVFBSDOFF 1052 +#define BSIM4v5_MOD_WTVOFF 1053 +#define BSIM4v5_MOD_WTVFBSDOFF 1054 +#define BSIM4v5_MOD_PTVOFF 1055 +#define BSIM4v5_MOD_PTVFBSDOFF 1056 + +#define BSIM4v5_MOD_LKVTH0WE 1061 +#define BSIM4v5_MOD_LK2WE 1062 +#define BSIM4v5_MOD_LKU0WE 1063 +#define BSIM4v5_MOD_WKVTH0WE 1064 +#define BSIM4v5_MOD_WK2WE 1065 +#define BSIM4v5_MOD_WKU0WE 1066 +#define BSIM4v5_MOD_PKVTH0WE 1067 +#define BSIM4v5_MOD_PK2WE 1068 +#define BSIM4v5_MOD_PKU0WE 1069 + +#define BSIM4v5_MOD_RBPS0 1101 +#define BSIM4v5_MOD_RBPSL 1102 +#define BSIM4v5_MOD_RBPSW 1103 +#define BSIM4v5_MOD_RBPSNF 1104 +#define BSIM4v5_MOD_RBPD0 1105 +#define BSIM4v5_MOD_RBPDL 1106 +#define BSIM4v5_MOD_RBPDW 1107 +#define BSIM4v5_MOD_RBPDNF 1108 + +#define BSIM4v5_MOD_RBPBX0 1109 +#define BSIM4v5_MOD_RBPBXL 1110 +#define BSIM4v5_MOD_RBPBXW 1111 +#define BSIM4v5_MOD_RBPBXNF 1112 +#define BSIM4v5_MOD_RBPBY0 1113 +#define BSIM4v5_MOD_RBPBYL 1114 +#define BSIM4v5_MOD_RBPBYW 1115 +#define BSIM4v5_MOD_RBPBYNF 1116 + +#define BSIM4v5_MOD_RBSBX0 1117 +#define BSIM4v5_MOD_RBSBY0 1118 +#define BSIM4v5_MOD_RBDBX0 1119 +#define BSIM4v5_MOD_RBDBY0 1120 + +#define BSIM4v5_MOD_RBSDBXL 1121 +#define BSIM4v5_MOD_RBSDBXW 1122 +#define BSIM4v5_MOD_RBSDBXNF 1123 +#define BSIM4v5_MOD_RBSDBYL 1124 +#define BSIM4v5_MOD_RBSDBYW 1125 +#define BSIM4v5_MOD_RBSDBYNF 1126 + +#include "bsim4v5ext.h" + +#ifdef __STDC__ +extern void BSIM4v5evaluate(double,double,double,BSIM4v5instance*,BSIM4v5model*, + double*,double*,double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, CKTcircuit*); +extern int BSIM4v5debug(BSIM4v5model*, BSIM4v5instance*, CKTcircuit*, int); +extern int BSIM4v5checkModel(BSIM4v5model*, BSIM4v5instance*, CKTcircuit*); +#else /* stdc */ +extern void BSIM4v5evaluate(); +extern int BSIM4v5debug(); +extern int BSIM4v5checkModel(); +#endif /* stdc */ + +#endif /*BSIM4v5*/ diff --git a/src/spicelib/devices/bsim4v5/bsim4v5ext.h b/src/spicelib/devices/bsim4v5/bsim4v5ext.h new file mode 100644 index 000000000..e12795859 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/bsim4v5ext.h @@ -0,0 +1,54 @@ +/********** +Copyright 2004 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu +Author: 2001- Xuemei Xi +File: bsim4v5ext.h +**********/ + +#ifdef __STDC__ +extern int BSIM4v5acLoad(GENmodel *,CKTcircuit*); +extern int BSIM4v5ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); +extern int BSIM4v5convTest(GENmodel *,CKTcircuit*); +extern int BSIM4v5delete(GENmodel*,IFuid,GENinstance**); +extern void BSIM4v5destroy(GENmodel**); +extern int BSIM4v5getic(GENmodel*,CKTcircuit*); +extern int BSIM4v5load(GENmodel*,CKTcircuit*); +extern int BSIM4v5mAsk(CKTcircuit*,GENmodel *,int, IFvalue*); +extern int BSIM4v5mDelete(GENmodel**,IFuid,GENmodel*); +extern int BSIM4v5mParam(int,IFvalue*,GENmodel*); +extern void BSIM4v5mosCap(CKTcircuit*, double, double, double, double, + double, double, double, double, double, double, double, + double, double, double, double, double, double, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*); +extern int BSIM4v5param(int,IFvalue*,GENinstance*,IFvalue*); +extern int BSIM4v5pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); +extern int BSIM4v5setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); +extern int BSIM4v5temp(GENmodel*,CKTcircuit*); +extern int BSIM4v5trunc(GENmodel*,CKTcircuit*,double*); +extern int BSIM4v5noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*); +extern int BSIM4v5unsetup(GENmodel*,CKTcircuit*); + +#else /* stdc */ +extern int BSIM4v5acLoad(); +extern int BSIM4v5delete(); +extern void BSIM4v5destroy(); +extern int BSIM4v5getic(); +extern int BSIM4v5load(); +extern int BSIM4v5mDelete(); +extern int BSIM4v5ask(); +extern int BSIM4v5mAsk(); +extern int BSIM4v5convTest(); +extern int BSIM4v5temp(); +extern int BSIM4v5mParam(); +extern void BSIM4v5mosCap(); +extern int BSIM4v5param(); +extern int BSIM4v5pzLoad(); +extern int BSIM4v5setup(); +extern int BSIM4v5trunc(); +extern int BSIM4v5noise(); +extern int BSIM4v5unsetup(); + +#endif /* stdc */ + diff --git a/src/spicelib/devices/bsim4v5/bsim4v5init.c b/src/spicelib/devices/bsim4v5/bsim4v5init.c new file mode 100644 index 000000000..4b16e5303 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/bsim4v5init.c @@ -0,0 +1,83 @@ +#include "config.h" + +#include "devdefs.h" + +#include "bsim4v5itf.h" +#include "bsim4v5ext.h" +#include "bsim4v5init.h" + + +SPICEdev BSIM4v5info = { + { + "BSIM4v5", + "Berkeley Short Channel IGFET Model-4", + + &BSIM4v5nSize, + &BSIM4v5nSize, + BSIM4v5names, + + &BSIM4v5pTSize, + BSIM4v5pTable, + + &BSIM4v5mPTSize, + BSIM4v5mPTable, + +#ifdef XSPICE +/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ + + 0, /* This is a SPICE device, it has no MIF info data */ + NULL, /* This is a SPICE device, it has no MIF info data */ +/*--------------------------- End of SDB fix -------------------------*/ +#endif + + DEV_DEFAULT + }, + + BSIM4v5param, /* DEVparam */ + BSIM4v5mParam, /* DEVmodParam */ + BSIM4v5load, /* DEVload */ + BSIM4v5setup, /* DEVsetup */ + BSIM4v5unsetup, /* DEVunsetup */ + BSIM4v5setup, /* DEVpzSetup */ + BSIM4v5temp, /* DEVtemperature */ + BSIM4v5trunc, /* DEVtrunc */ + NULL, /* DEVfindBranch */ + BSIM4v5acLoad, /* DEVacLoad */ + NULL, /* DEVaccept */ + BSIM4v5destroy, /* DEVdestroy */ + BSIM4v5mDelete, /* DEVmodDelete */ + BSIM4v5delete, /* DEVdelete */ + BSIM4v5getic, /* DEVsetic */ + BSIM4v5ask, /* DEVask */ + BSIM4v5mAsk, /* DEVmodAsk */ + BSIM4v5pzLoad, /* DEVpzLoad */ + BSIM4v5convTest, /* DEVconvTest */ + NULL, /* DEVsenSetup */ + NULL, /* DEVsenLoad */ + NULL, /* DEVsenUpdate */ + NULL, /* DEVsenAcLoad */ + NULL, /* DEVsenPrint */ + NULL, /* DEVsenTrunc */ + NULL, /* DEVdisto */ + BSIM4v5noise, /* DEVnoise */ +#ifdef CIDER + NULL, /* DEVdump */ + NULL, /* DEVacct */ +#endif + &BSIM4v5iSize, /* DEVinstSize */ + &BSIM4v5mSize /* DEVmodSize */ +}; + + +SPICEdev * +get_bsim4v5_info(void) +{ + return &BSIM4v5info; +} diff --git a/src/spicelib/devices/bsim4v5/bsim4v5init.h b/src/spicelib/devices/bsim4v5/bsim4v5init.h new file mode 100644 index 000000000..e05d5e9be --- /dev/null +++ b/src/spicelib/devices/bsim4v5/bsim4v5init.h @@ -0,0 +1,13 @@ +#ifndef _BSIM4V5INIT_H +#define _BSIM4V5INIT_H + +extern IFparm BSIM4v5pTable[ ]; +extern IFparm BSIM4v5mPTable[ ]; +extern char *BSIM4v5names[ ]; +extern int BSIM4v5pTSize; +extern int BSIM4v5mPTSize; +extern int BSIM4v5nSize; +extern int BSIM4v5iSize; +extern int BSIM4v5mSize; + +#endif diff --git a/src/spicelib/devices/bsim4v5/bsim4v5itf.h b/src/spicelib/devices/bsim4v5/bsim4v5itf.h new file mode 100644 index 000000000..7bbd91304 --- /dev/null +++ b/src/spicelib/devices/bsim4v5/bsim4v5itf.h @@ -0,0 +1,13 @@ +/********** +Copyright 2004 Regents of the University of California. All rights reserved. +Author: 2000 Weidong Liu. +Author: 2001- Xuemei Xi +File: bsim4v5itf.h +**********/ + +#ifndef DEV_BSIM4V5 +#define DEV_BSIM4V5 + +SPICEdev *get_bsim4v5_info(void); + +#endif diff --git a/src/spicelib/devices/dev.c b/src/spicelib/devices/dev.c index f5be04c12..ca219d145 100644 --- a/src/spicelib/devices/dev.c +++ b/src/spicelib/devices/dev.c @@ -81,7 +81,10 @@ int add_udn(int,Evt_Udn_Info_t **); #include "bsim3v1a/bsim3v1aitf.h" #include "bsim3v1s/bsim3v1sitf.h" #include "bsim4/bsim4itf.h" +#include "bsim4v2/bsim4v2itf.h" +#include "bsim4v3/bsim4v3itf.h" #include "bsim4v4/bsim4v4itf.h" +#include "bsim4v5/bsim4v5itf.h" #include "bsim3soi/b3soiitf.h" #include "bsim3soi_pd/b3soipditf.h" #include "bsim3soi_fd/b3soifditf.h" @@ -138,9 +141,9 @@ int add_udn(int,Evt_Udn_Info_t **); /*saj in xspice the DEVices size can be varied so DEVNUM is an int*/ #ifdef XSPICE - static int DEVNUM = 61; + static int DEVNUM = 64; #else - #define DEVNUM 61 + #define DEVNUM 64 #endif /*Make this dynamic for later attempt to make all devices dynamic*/ @@ -189,76 +192,79 @@ spice_init_devices(void) DEVices[10] = get_bsim3v1s_info(); DEVices[11] = get_b3soi_info(); DEVices[12] = get_bsim4_info(); - DEVices[13] = get_bsim4v4_info(); - DEVices[14] = get_b3soipd_info(); - DEVices[15] = get_b3soifd_info(); - DEVices[16] = get_b3soidd_info(); - DEVices[17] = get_cap_info(); - DEVices[18] = get_cccs_info(); - DEVices[19] = get_ccvs_info(); - DEVices[20] = get_cpl_info(); - DEVices[21] = get_csw_info(); - DEVices[22] = get_dio_info(); - DEVices[23] = get_hfeta_info(); - DEVices[24] = get_hfet2_info(); - DEVices[25] = get_hsm1_info(); - DEVices[26] = get_ind_info(); - DEVices[27] = get_mut_info(); - DEVices[28] = get_isrc_info(); - DEVices[29] = get_jfet_info(); - DEVices[30] = get_jfet2_info(); - DEVices[31] = get_ltra_info(); - DEVices[32] = get_mes_info(); - DEVices[33] = get_mesa_info(); - DEVices[34] = get_mos1_info(); - DEVices[35] = get_mos2_info(); - DEVices[36] = get_mos3_info(); - DEVices[37] = get_mos6_info(); - DEVices[38] = get_mos9_info(); - DEVices[39] = get_res_info(); - DEVices[40] = get_soi3_info(); - DEVices[41] = get_sw_info(); - DEVices[42] = get_tra_info(); - DEVices[43] = get_txl_info(); - DEVices[44] = get_vbic_info(); - DEVices[45] = get_vccs_info(); - DEVices[46] = get_vcvs_info(); - DEVices[47] = get_vsrc_info(); + DEVices[13] = get_bsim4v2_info(); + DEVices[14] = get_bsim4v3_info(); + DEVices[15] = get_bsim4v4_info(); + DEVices[16] = get_bsim4v5_info(); + DEVices[17] = get_b3soipd_info(); + DEVices[18] = get_b3soifd_info(); + DEVices[19] = get_b3soidd_info(); + DEVices[20] = get_cap_info(); + DEVices[21] = get_cccs_info(); + DEVices[22] = get_ccvs_info(); + DEVices[23] = get_cpl_info(); + DEVices[24] = get_csw_info(); + DEVices[25] = get_dio_info(); + DEVices[26] = get_hfeta_info(); + DEVices[27] = get_hfet2_info(); + DEVices[28] = get_hsm1_info(); + DEVices[29] = get_ind_info(); + DEVices[30] = get_mut_info(); + DEVices[31] = get_isrc_info(); + DEVices[32] = get_jfet_info(); + DEVices[33] = get_jfet2_info(); + DEVices[34] = get_ltra_info(); + DEVices[35] = get_mes_info(); + DEVices[36] = get_mesa_info(); + DEVices[37] = get_mos1_info(); + DEVices[38] = get_mos2_info(); + DEVices[39] = get_mos3_info(); + DEVices[40] = get_mos6_info(); + DEVices[41] = get_mos9_info(); + DEVices[42] = get_res_info(); + DEVices[43] = get_soi3_info(); + DEVices[44] = get_sw_info(); + DEVices[45] = get_tra_info(); + DEVices[46] = get_txl_info(); + DEVices[47] = get_vbic_info(); + DEVices[48] = get_vccs_info(); + DEVices[49] = get_vcvs_info(); + DEVices[50] = get_vsrc_info(); #ifdef CIDER - DEVices[48] = get_nbjt_info(); - DEVices[49] = get_nbjt2_info(); - DEVices[50] = get_numd_info(); - DEVices[51] = get_numd2_info(); - DEVices[52] = get_numos_info(); + DEVices[51] = get_nbjt_info(); + DEVices[52] = get_nbjt2_info(); + DEVices[53] = get_numd_info(); + DEVices[54] = get_numd2_info(); + DEVices[55] = get_numos_info(); #else - DEVices[48] = NULL; - DEVices[49] = NULL; - DEVices[50] = NULL; DEVices[51] = NULL; - DEVices[52] = NULL; + DEVices[52] = NULL; + DEVices[53] = NULL; + DEVices[54] = NULL; + DEVices[55] = NULL; #endif #ifdef ADMS - DEVices[53] = get_hicum0_info(); - DEVices[54] = get_hicum2_info(); - DEVices[55] = get_mextram_info(); - DEVices[56] = get_ekv_info(); - DEVices[57] = get_psp102_info(); + DEVices[56] = get_hicum0_info(); + DEVices[57] = get_hicum2_info(); + DEVices[58] = get_mextram_info(); + DEVices[59] = get_ekv_info(); + DEVices[60] = get_psp102_info(); #else - DEVices[53] = NULL; - DEVices[54] = NULL; - DEVices[55] = NULL; DEVices[56] = NULL; DEVices[57] = NULL; + DEVices[58] = NULL; + DEVices[59] = NULL; + DEVices[60] = NULL; #endif #ifdef NDEV /* NDEV */ - DEVices[58] = get_ndev_info(); + DEVices[61] = get_ndev_info(); #else - DEVices[58] = NULL; + DEVices[61] = NULL; #endif - DEVices[59] = NULL; - DEVices[60] = NULL; + DEVices[62] = NULL; + DEVices[63] = NULL; return; } @@ -282,11 +288,13 @@ SPICEdev ** devices(void) /*not yet usable*/ #ifdef ADMS -#define DEVICES_USED {"asrc", "bjt", "bjt2", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v2", "bsim3v1", "bsim4", "bsim4v4", "bsim3soipd", "bsim3soifd", "bsim3soidd", \ +#define DEVICES_USED {"asrc", "bjt", "bjt2", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v2", "bsim3v1", "bsim4", "bsim4v2", "bsim4v3", "bsim4v4", "bsim4v5", \ + "bsim3soipd", "bsim3soifd", "bsim3soidd", \ "cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \ "mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc", "hicum0", "hicum2", "mextram", "ekv", "psp102"} #else -#define DEVICES_USED {"asrc", "bjt", "bjt2", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v2", "bsim3v1", "bsim4", "bsim4v4", "bsim3soipd", "bsim3soifd", "bsim3soidd", \ +#define DEVICES_USED {"asrc", "bjt", "bjt2", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v2", "bsim3v1", "bsim4", "bsim4v4", "bsim4v2", "bsim4v3", "bsim4v4", "bsim4v5", \ + "bsim3soipd", "bsim3soifd", "bsim3soidd", \ "cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \ "mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc"} #endif diff --git a/src/spicelib/parser/inp2m.c b/src/spicelib/parser/inp2m.c index 62bab078d..9bf8900b1 100644 --- a/src/spicelib/parser/inp2m.c +++ b/src/spicelib/parser/inp2m.c @@ -215,7 +215,10 @@ INP2M (void *ckt, INPtables * tab, card * current) && thismodel->INPmodType != INPtypelook ("B3SOIFD") && thismodel->INPmodType != INPtypelook ("B3SOIDD") && thismodel->INPmodType != INPtypelook ("BSIM4") + && thismodel->INPmodType != INPtypelook ("BSIM4v2") + && thismodel->INPmodType != INPtypelook ("BSIM4v3") && thismodel->INPmodType != INPtypelook ("BSIM4v4") + && thismodel->INPmodType != INPtypelook ("BSIM4v5") && thismodel->INPmodType != INPtypelook ("BSIM3v0") && thismodel->INPmodType != INPtypelook ("BSIM3v1") && thismodel->INPmodType != INPtypelook ("BSIM3v1S") diff --git a/src/spicelib/parser/inpdomod.c b/src/spicelib/parser/inpdomod.c index 863bf07e2..70a38b54a 100644 --- a/src/spicelib/parser/inpdomod.c +++ b/src/spicelib/parser/inpdomod.c @@ -290,9 +290,18 @@ char *INPdomodel(void *ckt, card * image, INPtables * tab) break; case 14: type = INPtypelook("BSIM4"); - if ( (strstr( ver, "4.4")) || (strstr( ver, "4.4.0")) ) { + if ( (strstr(ver, "4.2")) || (strstr(ver, "4.2.1")) || (strstr(ver, "4.21")) ) { + type = INPtypelook("BSIM4v2"); + } + if ( (strstr(ver, "4.3")) || (strstr(ver, "4.3.0")) || (strstr(ver, "4.30")) ) { + type = INPtypelook("BSIM4v3"); + } + if ( (strstr(ver, "4.4")) || (strstr(ver, "4.4.0")) || (strstr(ver, "4.40")) ) { type = INPtypelook("BSIM4v4"); } + if ( (strstr(ver, "4.5")) || (strstr(ver, "4.5.0")) || (strstr(ver, "4.50")) ) { + type = INPtypelook("BSIM4v5"); + } if (type < 0) { err = INPmkTemp diff --git a/src/spicelib/parser/inpgmod.c b/src/spicelib/parser/inpgmod.c index 3bc41d5a2..c78f21942 100644 --- a/src/spicelib/parser/inpgmod.c +++ b/src/spicelib/parser/inpgmod.c @@ -208,7 +208,8 @@ INPgetModBin( void* ckt, char* name, INPmodel** model, INPtables* tab, char* lin for ( modtmp = modtab; modtmp != (INPmodel*)NULL; modtmp = modtmp->INPnextModel ) { if ( modtmp->INPmodType != INPtypelook( "BSIM3" ) && modtmp->INPmodType != INPtypelook( "BSIM4" ) && - modtmp->INPmodType != INPtypelook( "BSIM4v4" ) && modtmp->INPmodType != INPtypelook( "BSIM4v6" ) ) + modtmp->INPmodType != INPtypelook( "BSIM4v2" ) && modtmp->INPmodType != INPtypelook( "BSIM4v3" ) && + modtmp->INPmodType != INPtypelook( "BSIM4v4" ) && modtmp->INPmodType != INPtypelook( "BSIM4v5" ) ) continue; if ( parse_line( modtmp->INPmodLine->line, model_tokens, 4, parse_values, parse_found ) != TRUE )