25 changed files with 0 additions and 10687 deletions
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6src/spicelib/devices/bsim3v1s/.cvsignore
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34src/spicelib/devices/bsim3v1s/Makefile.am
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444src/spicelib/devices/bsim3v1s/b3v1s.c
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181src/spicelib/devices/bsim3v1s/b3v1sacld.c
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195src/spicelib/devices/bsim3v1s/b3v1sask.c
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361src/spicelib/devices/bsim3v1s/b3v1scheck.c
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110src/spicelib/devices/bsim3v1s/b3v1scvtest.c
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39src/spicelib/devices/bsim3v1s/b3v1sdel.c
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37src/spicelib/devices/bsim3v1s/b3v1sdest.c
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45src/spicelib/devices/bsim3v1s/b3v1sgetic.c
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2447src/spicelib/devices/bsim3v1s/b3v1sld.c
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1126src/spicelib/devices/bsim3v1s/b3v1smask.c
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43src/spicelib/devices/bsim3v1s/b3v1smdel.c
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1528src/spicelib/devices/bsim3v1s/b3v1smpar.c
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366src/spicelib/devices/bsim3v1s/b3v1snoi.c
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104src/spicelib/devices/bsim3v1s/b3v1spar.c
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149src/spicelib/devices/bsim3v1s/b3v1spzld.c
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981src/spicelib/devices/bsim3v1s/b3v1sset.c
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669src/spicelib/devices/bsim3v1s/b3v1stemp.c
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49src/spicelib/devices/bsim3v1s/b3v1strunc.c
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1629src/spicelib/devices/bsim3v1s/bsim3v1sdef.h
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30src/spicelib/devices/bsim3v1s/bsim3v1sext.h
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89src/spicelib/devices/bsim3v1s/bsim3v1sinit.c
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13src/spicelib/devices/bsim3v1s/bsim3v1sinit.h
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12src/spicelib/devices/bsim3v1s/bsim3v1sitf.h
@ -1,6 +0,0 @@ |
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Makefile.in |
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Makefile |
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.deps |
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.libs |
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*.lo |
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*.la |
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@ -1,34 +0,0 @@ |
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## Process this file with automake to produce Makefile.in
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noinst_LTLIBRARIES = libbsim3v1s.la |
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libbsim3v1s_la_SOURCES = \
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b3v1s.c \
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b3v1sacld.c \
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b3v1sask.c \
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b3v1scheck.c \
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b3v1scvtest.c \
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b3v1sdel.c \
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b3v1sdest.c \
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b3v1sgetic.c \
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b3v1sld.c \
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b3v1smask.c \
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b3v1smdel.c \
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b3v1smpar.c \
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b3v1snoi.c \
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b3v1spar.c \
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b3v1spzld.c \
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b3v1sset.c \
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b3v1stemp.c \
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b3v1strunc.c \
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bsim3v1sdef.h \
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bsim3v1sext.h \
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bsim3v1sinit.c \
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bsim3v1sinit.h \
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bsim3v1sitf.h |
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AM_CPPFLAGS = -I$(top_srcdir)/src/include |
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MAINTAINERCLEANFILES = Makefile.in |
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@ -1,444 +0,0 @@ |
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/********** |
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Copyright 1990 Regents of the University of California. All rights reserved. |
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Author: 1995 Min-Chie Jeng and Mansun Chan. |
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Modified by Paolo Nenzi 2002 |
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File: b3v1s.c |
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**********/ |
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#include "ngspice.h" |
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#include "devdefs.h" |
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#include "bsim3v1sdef.h" |
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#include "suffix.h" |
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IFparm BSIM3v1SpTable[] = { /* parameters */ |
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IOP( "l", BSIM3v1S_L, IF_REAL , "Length"), |
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IOP( "w", BSIM3v1S_W, IF_REAL , "Width"), |
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IOP( "ad", BSIM3v1S_AD, IF_REAL , "Drain area"), |
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IOP( "as", BSIM3v1S_AS, IF_REAL , "Source area"), |
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IOP( "pd", BSIM3v1S_PD, IF_REAL , "Drain perimeter"), |
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IOP( "ps", BSIM3v1S_PS, IF_REAL , "Source perimeter"), |
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IOP( "nrd", BSIM3v1S_NRD, IF_REAL , "Number of squares in drain"), |
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IOP( "nrs", BSIM3v1S_NRS, IF_REAL , "Number of squares in source"), |
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IOP( "off", BSIM3v1S_OFF, IF_FLAG , "Device is initially off"), |
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IOP( "nqsmod", BSIM3v1S_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"), |
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IP( "ic", BSIM3v1S_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"), |
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OP( "gmbs", BSIM3v1S_GMBS, IF_REAL, "Gmb"), |
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OP( "gm", BSIM3v1S_GM, IF_REAL, "Gm"), |
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OP( "gds", BSIM3v1S_GDS, IF_REAL, "Gds"), |
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OP( "vdsat", BSIM3v1S_VDSAT, IF_REAL, "Vdsat"), |
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OP( "vth", BSIM3v1S_VON, IF_REAL, "Vth"), |
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OP( "id", BSIM3v1S_CD, IF_REAL, "Ids"), |
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OP( "vbs", BSIM3v1S_VBS, IF_REAL, "Vbs"), |
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OP( "vgs", BSIM3v1S_VGS, IF_REAL, "Vgs"), |
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OP( "vds", BSIM3v1S_VDS, IF_REAL, "Vds"), |
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/* serban */ |
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IOP( "m", BSIM3v1S_M, IF_REAL , "Multiplication factor"), |
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}; |
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IFparm BSIM3v1SmPTable[] = { /* model parameters */ |
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IOP( "capmod", BSIM3v1S_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"), |
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IOP( "nqsmod", BSIM3v1S_MOD_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"), |
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IOP( "mobmod", BSIM3v1S_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"), |
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IOP( "noimod", BSIM3v1S_MOD_NOIMOD, IF_INTEGER, "Noise model selector"), |
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IOP( "paramchk", BSIM3v1S_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"), |
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IOP( "binunit", BSIM3v1S_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"), |
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IOP( "version", BSIM3v1S_MOD_VERSION, IF_REAL, " parameter for model version"), |
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IOP( "tox", BSIM3v1S_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"), |
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IOP( "cdsc", BSIM3v1S_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), |
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IOP( "cdscb", BSIM3v1S_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), |
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IOP( "cdscd", BSIM3v1S_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), |
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IOP( "cit", BSIM3v1S_MOD_CIT, IF_REAL, "Interface state capacitance"), |
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IOP( "nfactor", BSIM3v1S_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), |
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IOP( "xj", BSIM3v1S_MOD_XJ, IF_REAL, "Junction depth in meters"), |
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IOP( "vsat", BSIM3v1S_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), |
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IOP( "at", BSIM3v1S_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), |
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IOP( "a0", BSIM3v1S_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), |
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IOP( "ags", BSIM3v1S_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), |
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IOP( "a1", BSIM3v1S_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), |
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IOP( "a2", BSIM3v1S_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), |
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IOP( "keta", BSIM3v1S_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), |
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IOP( "nsub", BSIM3v1S_MOD_NSUB, IF_REAL, "Substrate doping concentration"), |
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IOP( "nch", BSIM3v1S_MOD_NPEAK, IF_REAL, "Channel doping concentration"), |
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IOP( "ngate", BSIM3v1S_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"), |
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IOP( "gamma1", BSIM3v1S_MOD_GAMMA1, IF_REAL, "Vth body coefficient"), |
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IOP( "gamma2", BSIM3v1S_MOD_GAMMA2, IF_REAL, "Vth body coefficient"), |
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IOP( "vbx", BSIM3v1S_MOD_VBX, IF_REAL, "Vth transition body Voltage"), |
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IOP( "vbm", BSIM3v1S_MOD_VBM, IF_REAL, "Maximum body voltage"), |
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IOP( "xt", BSIM3v1S_MOD_XT, IF_REAL, "Doping depth"), |
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IOP( "k1", BSIM3v1S_MOD_K1, IF_REAL, "Bulk effect coefficient 1"), |
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IOP( "kt1", BSIM3v1S_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"), |
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IOP( "kt1l", BSIM3v1S_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"), |
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IOP( "kt2", BSIM3v1S_MOD_KT2, IF_REAL, "Body-coefficient of kt1"), |
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IOP( "k2", BSIM3v1S_MOD_K2, IF_REAL, "Bulk effect coefficient 2"), |
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IOP( "k3", BSIM3v1S_MOD_K3, IF_REAL, "Narrow width effect coefficient"), |
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IOP( "k3b", BSIM3v1S_MOD_K3B, IF_REAL, "Body effect coefficient of k3"), |
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IOP( "w0", BSIM3v1S_MOD_W0, IF_REAL, "Narrow width effect parameter"), |
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IOP( "nlx", BSIM3v1S_MOD_NLX, IF_REAL, "Lateral non-uniform doping effect"), |
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IOP( "dvt0", BSIM3v1S_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"), |
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IOP( "dvt1", BSIM3v1S_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"), |
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IOP( "dvt2", BSIM3v1S_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"), |
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IOP( "dvt0w", BSIM3v1S_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"), |
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IOP( "dvt1w", BSIM3v1S_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"), |
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IOP( "dvt2w", BSIM3v1S_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"), |
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IOP( "drout", BSIM3v1S_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"), |
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IOP( "dsub", BSIM3v1S_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"), |
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IOP( "vth0", BSIM3v1S_MOD_VTH0, IF_REAL,"Threshold voltage"), |
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IOP( "vtho", BSIM3v1S_MOD_VTH0, IF_REAL,"Threshold voltage"), |
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IOP( "ua", BSIM3v1S_MOD_UA, IF_REAL, "Linear gate dependence of mobility"), |
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IOP( "ua1", BSIM3v1S_MOD_UA1, IF_REAL, "Temperature coefficient of ua"), |
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IOP( "ub", BSIM3v1S_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"), |
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IOP( "ub1", BSIM3v1S_MOD_UB1, IF_REAL, "Temperature coefficient of ub"), |
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IOP( "uc", BSIM3v1S_MOD_UC, IF_REAL, "Body-bias dependence of mobility"), |
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IOP( "uc1", BSIM3v1S_MOD_UC1, IF_REAL, "Temperature coefficient of uc"), |
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IOP( "u0", BSIM3v1S_MOD_U0, IF_REAL, "Low-field mobility at Tnom"), |
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IOP( "ute", BSIM3v1S_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"), |
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IOP( "voff", BSIM3v1S_MOD_VOFF, IF_REAL, "Threshold voltage offset"), |
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IOP( "tnom", BSIM3v1S_MOD_TNOM, IF_REAL, "Parameter measurement temperature"), |
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IOP( "cgso", BSIM3v1S_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"), |
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IOP( "cgdo", BSIM3v1S_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"), |
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IOP( "cgbo", BSIM3v1S_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"), |
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IOP( "xpart", BSIM3v1S_MOD_XPART, IF_REAL, "Channel charge partitioning"), |
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IOP( "elm", BSIM3v1S_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"), |
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IOP( "delta", BSIM3v1S_MOD_DELTA, IF_REAL, "Effective Vds parameter"), |
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IOP( "rsh", BSIM3v1S_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), |
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IOP( "rdsw", BSIM3v1S_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), |
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IOP( "prwg", BSIM3v1S_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), |
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IOP( "prwb", BSIM3v1S_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), |
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IOP( "prt", BSIM3v1S_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), |
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IOP( "eta0", BSIM3v1S_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), |
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IOP( "etab", BSIM3v1S_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), |
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IOP( "pclm", BSIM3v1S_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), |
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IOP( "pdiblc1", BSIM3v1S_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), |
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IOP( "pdiblc2", BSIM3v1S_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), |
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IOP( "pdiblcb", BSIM3v1S_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), |
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IOP( "pscbe1", BSIM3v1S_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), |
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IOP( "pscbe2", BSIM3v1S_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), |
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IOP( "pvag", BSIM3v1S_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), |
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IOP( "js", BSIM3v1S_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"), |
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IOP( "jsw", BSIM3v1S_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"), |
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IOP( "pb", BSIM3v1S_MOD_PB, IF_REAL, "Source/drain junction built-in potential"), |
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IOP( "nj", BSIM3v1S_MOD_NJ, IF_REAL, "Source/drain junction emission coefficient"), |
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IOP( "xti", BSIM3v1S_MOD_XTI, IF_REAL, "Junction current temperature exponent"), |
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IOP( "mj", BSIM3v1S_MOD_MJ, IF_REAL, "Source/drain bottom junction capacitance grading coefficient"), |
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IOP( "pbsw", BSIM3v1S_MOD_PBSW, IF_REAL, "Source/drain sidewall junction capacitance built in potential"), |
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IOP( "mjsw", BSIM3v1S_MOD_MJSW, IF_REAL, "Source/drain sidewall junction capacitance grading coefficient"), |
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IOP( "pbswg", BSIM3v1S_MOD_PBSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance built in potential"), |
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IOP( "mjswg", BSIM3v1S_MOD_MJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance grading coefficient"), |
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IOP( "cj", BSIM3v1S_MOD_CJ, IF_REAL, "Source/drain bottom junction capacitance per unit area"), |
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IOP( "vfbcv", BSIM3v1S_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"), |
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IOP( "cjsw", BSIM3v1S_MOD_CJSW, IF_REAL, "Source/drain sidewall junction capacitance per unit periphery"), |
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IOP( "cjswg", BSIM3v1S_MOD_CJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance per unit width"), |
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IOP( "lint", BSIM3v1S_MOD_LINT, IF_REAL, "Length reduction parameter"), |
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IOP( "ll", BSIM3v1S_MOD_LL, IF_REAL, "Length reduction parameter"), |
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IOP( "lln", BSIM3v1S_MOD_LLN, IF_REAL, "Length reduction parameter"), |
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IOP( "lw", BSIM3v1S_MOD_LW, IF_REAL, "Length reduction parameter"), |
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IOP( "lwn", BSIM3v1S_MOD_LWN, IF_REAL, "Length reduction parameter"), |
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IOP( "lwl", BSIM3v1S_MOD_LWL, IF_REAL, "Length reduction parameter"), |
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IOP( "lmin", BSIM3v1S_MOD_LMIN, IF_REAL, "Minimum length for the model"), |
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IOP( "lmax", BSIM3v1S_MOD_LMAX, IF_REAL, "Maximum length for the model"), |
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IOP( "wr", BSIM3v1S_MOD_WR, IF_REAL, "Width dependence of rds"), |
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IOP( "wint", BSIM3v1S_MOD_WINT, IF_REAL, "Width reduction parameter"), |
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IOP( "dwg", BSIM3v1S_MOD_DWG, IF_REAL, "Width reduction parameter"), |
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IOP( "dwb", BSIM3v1S_MOD_DWB, IF_REAL, "Width reduction parameter"), |
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IOP( "wl", BSIM3v1S_MOD_WL, IF_REAL, "Width reduction parameter"), |
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IOP( "wln", BSIM3v1S_MOD_WLN, IF_REAL, "Width reduction parameter"), |
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IOP( "ww", BSIM3v1S_MOD_WW, IF_REAL, "Width reduction parameter"), |
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IOP( "wwn", BSIM3v1S_MOD_WWN, IF_REAL, "Width reduction parameter"), |
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IOP( "wwl", BSIM3v1S_MOD_WWL, IF_REAL, "Width reduction parameter"), |
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IOP( "wmin", BSIM3v1S_MOD_WMIN, IF_REAL, "Minimum width for the model"), |
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IOP( "wmax", BSIM3v1S_MOD_WMAX, IF_REAL, "Maximum width for the model"), |
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IOP( "b0", BSIM3v1S_MOD_B0, IF_REAL, "Abulk narrow width parameter"), |
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IOP( "b1", BSIM3v1S_MOD_B1, IF_REAL, "Abulk narrow width parameter"), |
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IOP( "cgsl", BSIM3v1S_MOD_CGSL, IF_REAL, "New C-V model parameter"), |
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IOP( "cgdl", BSIM3v1S_MOD_CGDL, IF_REAL, "New C-V model parameter"), |
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IOP( "ckappa", BSIM3v1S_MOD_CKAPPA, IF_REAL, "New C-V model parameter"), |
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IOP( "cf", BSIM3v1S_MOD_CF, IF_REAL, "Fringe capacitance parameter"), |
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IOP( "clc", BSIM3v1S_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"), |
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IOP( "cle", BSIM3v1S_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"), |
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IOP( "dwc", BSIM3v1S_MOD_DWC, IF_REAL, "Delta W for C-V model"), |
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IOP( "dlc", BSIM3v1S_MOD_DLC, IF_REAL, "Delta L for C-V model"), |
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IOP( "alpha0", BSIM3v1S_MOD_ALPHA0, IF_REAL, "substrate current model parameter"), |
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IOP( "beta0", BSIM3v1S_MOD_BETA0, IF_REAL, "substrate current model parameter"), |
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IOP( "lcdsc", BSIM3v1S_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"), |
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IOP( "lcdscb", BSIM3v1S_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"), |
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IOP( "lcdscd", BSIM3v1S_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"), |
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IOP( "lcit", BSIM3v1S_MOD_LCIT, IF_REAL, "Length dependence of cit"), |
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IOP( "lnfactor", BSIM3v1S_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"), |
|
||||
IOP( "lxj", BSIM3v1S_MOD_LXJ, IF_REAL, "Length dependence of xj"), |
|
||||
IOP( "lvsat", BSIM3v1S_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), |
|
||||
IOP( "lat", BSIM3v1S_MOD_LAT, IF_REAL, "Length dependence of at"), |
|
||||
IOP( "la0", BSIM3v1S_MOD_LA0, IF_REAL, "Length dependence of a0"), |
|
||||
IOP( "lags", BSIM3v1S_MOD_LAGS, IF_REAL, "Length dependence of ags"), |
|
||||
IOP( "la1", BSIM3v1S_MOD_LA1, IF_REAL, "Length dependence of a1"), |
|
||||
IOP( "la2", BSIM3v1S_MOD_LA2, IF_REAL, "Length dependence of a2"), |
|
||||
IOP( "lketa", BSIM3v1S_MOD_LKETA, IF_REAL, "Length dependence of keta"), |
|
||||
IOP( "lnsub", BSIM3v1S_MOD_LNSUB, IF_REAL, "Length dependence of nsub"), |
|
||||
IOP( "lnch", BSIM3v1S_MOD_LNPEAK, IF_REAL, "Length dependence of nch"), |
|
||||
IOP( "lngate", BSIM3v1S_MOD_LNGATE, IF_REAL, "Length dependence of ngate"), |
|
||||
IOP( "lgamma1", BSIM3v1S_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"), |
|
||||
IOP( "lgamma2", BSIM3v1S_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"), |
|
||||
IOP( "lvbx", BSIM3v1S_MOD_LVBX, IF_REAL, "Length dependence of vbx"), |
|
||||
IOP( "lvbm", BSIM3v1S_MOD_LVBM, IF_REAL, "Length dependence of vbm"), |
|
||||
IOP( "lxt", BSIM3v1S_MOD_LXT, IF_REAL, "Length dependence of xt"), |
|
||||
IOP( "lk1", BSIM3v1S_MOD_LK1, IF_REAL, "Length dependence of k1"), |
|
||||
IOP( "lkt1", BSIM3v1S_MOD_LKT1, IF_REAL, "Length dependence of kt1"), |
|
||||
IOP( "lkt1l", BSIM3v1S_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"), |
|
||||
IOP( "lkt2", BSIM3v1S_MOD_LKT2, IF_REAL, "Length dependence of kt2"), |
|
||||
IOP( "lk2", BSIM3v1S_MOD_LK2, IF_REAL, "Length dependence of k2"), |
|
||||
IOP( "lk3", BSIM3v1S_MOD_LK3, IF_REAL, "Length dependence of k3"), |
|
||||
IOP( "lk3b", BSIM3v1S_MOD_LK3B, IF_REAL, "Length dependence of k3b"), |
|
||||
IOP( "lw0", BSIM3v1S_MOD_LW0, IF_REAL, "Length dependence of w0"), |
|
||||
IOP( "lnlx", BSIM3v1S_MOD_LNLX, IF_REAL, "Length dependence of nlx"), |
|
||||
IOP( "ldvt0", BSIM3v1S_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"), |
|
||||
IOP( "ldvt1", BSIM3v1S_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"), |
|
||||
IOP( "ldvt2", BSIM3v1S_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"), |
|
||||
IOP( "ldvt0w", BSIM3v1S_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"), |
|
||||
IOP( "ldvt1w", BSIM3v1S_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"), |
|
||||
IOP( "ldvt2w", BSIM3v1S_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"), |
|
||||
IOP( "ldrout", BSIM3v1S_MOD_LDROUT, IF_REAL, "Length dependence of drout"), |
|
||||
IOP( "ldsub", BSIM3v1S_MOD_LDSUB, IF_REAL, "Length dependence of dsub"), |
|
||||
IOP( "lvth0", BSIM3v1S_MOD_LVTH0, IF_REAL,"Length dependence of vto"), |
|
||||
IOP( "lvtho", BSIM3v1S_MOD_LVTH0, IF_REAL,"Length dependence of vto"), |
|
||||
IOP( "lua", BSIM3v1S_MOD_LUA, IF_REAL, "Length dependence of ua"), |
|
||||
IOP( "lua1", BSIM3v1S_MOD_LUA1, IF_REAL, "Length dependence of ua1"), |
|
||||
IOP( "lub", BSIM3v1S_MOD_LUB, IF_REAL, "Length dependence of ub"), |
|
||||
IOP( "lub1", BSIM3v1S_MOD_LUB1, IF_REAL, "Length dependence of ub1"), |
|
||||
IOP( "luc", BSIM3v1S_MOD_LUC, IF_REAL, "Length dependence of uc"), |
|
||||
IOP( "luc1", BSIM3v1S_MOD_LUC1, IF_REAL, "Length dependence of uc1"), |
|
||||
IOP( "lu0", BSIM3v1S_MOD_LU0, IF_REAL, "Length dependence of u0"), |
|
||||
IOP( "lute", BSIM3v1S_MOD_LUTE, IF_REAL, "Length dependence of ute"), |
|
||||
IOP( "lvoff", BSIM3v1S_MOD_LVOFF, IF_REAL, "Length dependence of voff"), |
|
||||
IOP( "lelm", BSIM3v1S_MOD_LELM, IF_REAL, "Length dependence of elm"), |
|
||||
IOP( "ldelta", BSIM3v1S_MOD_LDELTA, IF_REAL, "Length dependence of delta"), |
|
||||
IOP( "lrdsw", BSIM3v1S_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), |
|
||||
|
|
||||
IOP( "lprwg", BSIM3v1S_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), |
|
||||
IOP( "lprwb", BSIM3v1S_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), |
|
||||
|
|
||||
IOP( "lprt", BSIM3v1S_MOD_LPRT, IF_REAL, "Length dependence of prt "), |
|
||||
IOP( "leta0", BSIM3v1S_MOD_LETA0, IF_REAL, "Length dependence of eta0"), |
|
||||
IOP( "letab", BSIM3v1S_MOD_LETAB, IF_REAL, "Length dependence of etab"), |
|
||||
IOP( "lpclm", BSIM3v1S_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), |
|
||||
IOP( "lpdiblc1", BSIM3v1S_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), |
|
||||
IOP( "lpdiblc2", BSIM3v1S_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), |
|
||||
IOP( "lpdiblcb", BSIM3v1S_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), |
|
||||
IOP( "lpscbe1", BSIM3v1S_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), |
|
||||
IOP( "lpscbe2", BSIM3v1S_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), |
|
||||
IOP( "lpvag", BSIM3v1S_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), |
|
||||
IOP( "lwr", BSIM3v1S_MOD_LWR, IF_REAL, "Length dependence of wr"), |
|
||||
IOP( "ldwg", BSIM3v1S_MOD_LDWG, IF_REAL, "Length dependence of dwg"), |
|
||||
IOP( "ldwb", BSIM3v1S_MOD_LDWB, IF_REAL, "Length dependence of dwb"), |
|
||||
IOP( "lb0", BSIM3v1S_MOD_LB0, IF_REAL, "Length dependence of b0"), |
|
||||
IOP( "lb1", BSIM3v1S_MOD_LB1, IF_REAL, "Length dependence of b1"), |
|
||||
IOP( "lcgsl", BSIM3v1S_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"), |
|
||||
IOP( "lcgdl", BSIM3v1S_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"), |
|
||||
IOP( "lckappa", BSIM3v1S_MOD_LCKAPPA, IF_REAL, "Length dependence of ckappa"), |
|
||||
IOP( "lcf", BSIM3v1S_MOD_LCF, IF_REAL, "Length dependence of cf"), |
|
||||
IOP( "lclc", BSIM3v1S_MOD_LCLC, IF_REAL, "Length dependence of clc"), |
|
||||
IOP( "lcle", BSIM3v1S_MOD_LCLE, IF_REAL, "Length dependence of cle"), |
|
||||
IOP( "lalpha0", BSIM3v1S_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"), |
|
||||
IOP( "lbeta0", BSIM3v1S_MOD_LBETA0, IF_REAL, "Length dependence of beta0"), |
|
||||
IOP( "lvfbcv", BSIM3v1S_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"), |
|
||||
IOP( "wcdsc", BSIM3v1S_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), |
|
||||
IOP( "wcdscb", BSIM3v1S_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), |
|
||||
IOP( "wcdscd", BSIM3v1S_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), |
|
||||
IOP( "wcit", BSIM3v1S_MOD_WCIT, IF_REAL, "Width dependence of cit"), |
|
||||
IOP( "wnfactor", BSIM3v1S_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), |
|
||||
IOP( "wxj", BSIM3v1S_MOD_WXJ, IF_REAL, "Width dependence of xj"), |
|
||||
IOP( "wvsat", BSIM3v1S_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), |
|
||||
IOP( "wat", BSIM3v1S_MOD_WAT, IF_REAL, "Width dependence of at"), |
|
||||
IOP( "wa0", BSIM3v1S_MOD_WA0, IF_REAL, "Width dependence of a0"), |
|
||||
IOP( "wags", BSIM3v1S_MOD_WAGS, IF_REAL, "Width dependence of ags"), |
|
||||
IOP( "wa1", BSIM3v1S_MOD_WA1, IF_REAL, "Width dependence of a1"), |
|
||||
IOP( "wa2", BSIM3v1S_MOD_WA2, IF_REAL, "Width dependence of a2"), |
|
||||
IOP( "wketa", BSIM3v1S_MOD_WKETA, IF_REAL, "Width dependence of keta"), |
|
||||
IOP( "wnsub", BSIM3v1S_MOD_WNSUB, IF_REAL, "Width dependence of nsub"), |
|
||||
IOP( "wnch", BSIM3v1S_MOD_WNPEAK, IF_REAL, "Width dependence of nch"), |
|
||||
IOP( "wngate", BSIM3v1S_MOD_WNGATE, IF_REAL, "Width dependence of ngate"), |
|
||||
IOP( "wgamma1", BSIM3v1S_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"), |
|
||||
IOP( "wgamma2", BSIM3v1S_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"), |
|
||||
IOP( "wvbx", BSIM3v1S_MOD_WVBX, IF_REAL, "Width dependence of vbx"), |
|
||||
IOP( "wvbm", BSIM3v1S_MOD_WVBM, IF_REAL, "Width dependence of vbm"), |
|
||||
IOP( "wxt", BSIM3v1S_MOD_WXT, IF_REAL, "Width dependence of xt"), |
|
||||
IOP( "wk1", BSIM3v1S_MOD_WK1, IF_REAL, "Width dependence of k1"), |
|
||||
IOP( "wkt1", BSIM3v1S_MOD_WKT1, IF_REAL, "Width dependence of kt1"), |
|
||||
IOP( "wkt1l", BSIM3v1S_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"), |
|
||||
IOP( "wkt2", BSIM3v1S_MOD_WKT2, IF_REAL, "Width dependence of kt2"), |
|
||||
IOP( "wk2", BSIM3v1S_MOD_WK2, IF_REAL, "Width dependence of k2"), |
|
||||
IOP( "wk3", BSIM3v1S_MOD_WK3, IF_REAL, "Width dependence of k3"), |
|
||||
IOP( "wk3b", BSIM3v1S_MOD_WK3B, IF_REAL, "Width dependence of k3b"), |
|
||||
IOP( "ww0", BSIM3v1S_MOD_WW0, IF_REAL, "Width dependence of w0"), |
|
||||
IOP( "wnlx", BSIM3v1S_MOD_WNLX, IF_REAL, "Width dependence of nlx"), |
|
||||
IOP( "wdvt0", BSIM3v1S_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"), |
|
||||
IOP( "wdvt1", BSIM3v1S_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"), |
|
||||
IOP( "wdvt2", BSIM3v1S_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"), |
|
||||
IOP( "wdvt0w", BSIM3v1S_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"), |
|
||||
IOP( "wdvt1w", BSIM3v1S_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"), |
|
||||
IOP( "wdvt2w", BSIM3v1S_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"), |
|
||||
IOP( "wdrout", BSIM3v1S_MOD_WDROUT, IF_REAL, "Width dependence of drout"), |
|
||||
IOP( "wdsub", BSIM3v1S_MOD_WDSUB, IF_REAL, "Width dependence of dsub"), |
|
||||
IOP( "wvth0", BSIM3v1S_MOD_WVTH0, IF_REAL,"Width dependence of vto"), |
|
||||
IOP( "wvtho", BSIM3v1S_MOD_WVTH0, IF_REAL,"Width dependence of vto"), |
|
||||
IOP( "wua", BSIM3v1S_MOD_WUA, IF_REAL, "Width dependence of ua"), |
|
||||
IOP( "wua1", BSIM3v1S_MOD_WUA1, IF_REAL, "Width dependence of ua1"), |
|
||||
IOP( "wub", BSIM3v1S_MOD_WUB, IF_REAL, "Width dependence of ub"), |
|
||||
IOP( "wub1", BSIM3v1S_MOD_WUB1, IF_REAL, "Width dependence of ub1"), |
|
||||
IOP( "wuc", BSIM3v1S_MOD_WUC, IF_REAL, "Width dependence of uc"), |
|
||||
IOP( "wuc1", BSIM3v1S_MOD_WUC1, IF_REAL, "Width dependence of uc1"), |
|
||||
IOP( "wu0", BSIM3v1S_MOD_WU0, IF_REAL, "Width dependence of u0"), |
|
||||
IOP( "wute", BSIM3v1S_MOD_WUTE, IF_REAL, "Width dependence of ute"), |
|
||||
IOP( "wvoff", BSIM3v1S_MOD_WVOFF, IF_REAL, "Width dependence of voff"), |
|
||||
IOP( "welm", BSIM3v1S_MOD_WELM, IF_REAL, "Width dependence of elm"), |
|
||||
IOP( "wdelta", BSIM3v1S_MOD_WDELTA, IF_REAL, "Width dependence of delta"), |
|
||||
IOP( "wrdsw", BSIM3v1S_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "), |
|
||||
|
|
||||
IOP( "wprwg", BSIM3v1S_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), |
|
||||
IOP( "wprwb", BSIM3v1S_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), |
|
||||
|
|
||||
IOP( "wprt", BSIM3v1S_MOD_WPRT, IF_REAL, "Width dependence of prt"), |
|
||||
IOP( "weta0", BSIM3v1S_MOD_WETA0, IF_REAL, "Width dependence of eta0"), |
|
||||
IOP( "wetab", BSIM3v1S_MOD_WETAB, IF_REAL, "Width dependence of etab"), |
|
||||
IOP( "wpclm", BSIM3v1S_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), |
|
||||
IOP( "wpdiblc1", BSIM3v1S_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), |
|
||||
IOP( "wpdiblc2", BSIM3v1S_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), |
|
||||
IOP( "wpdiblcb", BSIM3v1S_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), |
|
||||
IOP( "wpscbe1", BSIM3v1S_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), |
|
||||
IOP( "wpscbe2", BSIM3v1S_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), |
|
||||
IOP( "wpvag", BSIM3v1S_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), |
|
||||
IOP( "wwr", BSIM3v1S_MOD_WWR, IF_REAL, "Width dependence of wr"), |
|
||||
IOP( "wdwg", BSIM3v1S_MOD_WDWG, IF_REAL, "Width dependence of dwg"), |
|
||||
IOP( "wdwb", BSIM3v1S_MOD_WDWB, IF_REAL, "Width dependence of dwb"), |
|
||||
IOP( "wb0", BSIM3v1S_MOD_WB0, IF_REAL, "Width dependence of b0"), |
|
||||
IOP( "wb1", BSIM3v1S_MOD_WB1, IF_REAL, "Width dependence of b1"), |
|
||||
IOP( "wcgsl", BSIM3v1S_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"), |
|
||||
IOP( "wcgdl", BSIM3v1S_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"), |
|
||||
IOP( "wckappa", BSIM3v1S_MOD_WCKAPPA, IF_REAL, "Width dependence of ckappa"), |
|
||||
IOP( "wcf", BSIM3v1S_MOD_WCF, IF_REAL, "Width dependence of cf"), |
|
||||
IOP( "wclc", BSIM3v1S_MOD_WCLC, IF_REAL, "Width dependence of clc"), |
|
||||
IOP( "wcle", BSIM3v1S_MOD_WCLE, IF_REAL, "Width dependence of cle"), |
|
||||
IOP( "walpha0", BSIM3v1S_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"), |
|
||||
IOP( "wbeta0", BSIM3v1S_MOD_WBETA0, IF_REAL, "Width dependence of beta0"), |
|
||||
IOP( "wvfbcv", BSIM3v1S_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"), |
|
||||
|
|
||||
IOP( "pcdsc", BSIM3v1S_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), |
|
||||
IOP( "pcdscb", BSIM3v1S_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), |
|
||||
IOP( "pcdscd", BSIM3v1S_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), |
|
||||
IOP( "pcit", BSIM3v1S_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), |
|
||||
IOP( "pnfactor", BSIM3v1S_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), |
|
||||
IOP( "pxj", BSIM3v1S_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), |
|
||||
IOP( "pvsat", BSIM3v1S_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), |
|
||||
IOP( "pat", BSIM3v1S_MOD_PAT, IF_REAL, "Cross-term dependence of at"), |
|
||||
IOP( "pa0", BSIM3v1S_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), |
|
||||
IOP( "pags", BSIM3v1S_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), |
|
||||
IOP( "pa1", BSIM3v1S_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), |
|
||||
IOP( "pa2", BSIM3v1S_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), |
|
||||
IOP( "pketa", BSIM3v1S_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"), |
|
||||
IOP( "pnsub", BSIM3v1S_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"), |
|
||||
IOP( "pnch", BSIM3v1S_MOD_PNPEAK, IF_REAL, "Cross-term dependence of nch"), |
|
||||
IOP( "pngate", BSIM3v1S_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"), |
|
||||
IOP( "pgamma1", BSIM3v1S_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"), |
|
||||
IOP( "pgamma2", BSIM3v1S_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"), |
|
||||
IOP( "pvbx", BSIM3v1S_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"), |
|
||||
IOP( "pvbm", BSIM3v1S_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"), |
|
||||
IOP( "pxt", BSIM3v1S_MOD_PXT, IF_REAL, "Cross-term dependence of xt"), |
|
||||
IOP( "pk1", BSIM3v1S_MOD_PK1, IF_REAL, "Cross-term dependence of k1"), |
|
||||
IOP( "pkt1", BSIM3v1S_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"), |
|
||||
IOP( "pkt1l", BSIM3v1S_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"), |
|
||||
IOP( "pkt2", BSIM3v1S_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"), |
|
||||
IOP( "pk2", BSIM3v1S_MOD_PK2, IF_REAL, "Cross-term dependence of k2"), |
|
||||
IOP( "pk3", BSIM3v1S_MOD_PK3, IF_REAL, "Cross-term dependence of k3"), |
|
||||
IOP( "pk3b", BSIM3v1S_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"), |
|
||||
IOP( "pw0", BSIM3v1S_MOD_PW0, IF_REAL, "Cross-term dependence of w0"), |
|
||||
IOP( "pnlx", BSIM3v1S_MOD_PNLX, IF_REAL, "Cross-term dependence of nlx"), |
|
||||
IOP( "pdvt0", BSIM3v1S_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"), |
|
||||
IOP( "pdvt1", BSIM3v1S_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"), |
|
||||
IOP( "pdvt2", BSIM3v1S_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"), |
|
||||
IOP( "pdvt0w", BSIM3v1S_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"), |
|
||||
IOP( "pdvt1w", BSIM3v1S_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"), |
|
||||
IOP( "pdvt2w", BSIM3v1S_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"), |
|
||||
IOP( "pdrout", BSIM3v1S_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"), |
|
||||
IOP( "pdsub", BSIM3v1S_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"), |
|
||||
IOP( "pvth0", BSIM3v1S_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), |
|
||||
IOP( "pvtho", BSIM3v1S_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), |
|
||||
IOP( "pua", BSIM3v1S_MOD_PUA, IF_REAL, "Cross-term dependence of ua"), |
|
||||
IOP( "pua1", BSIM3v1S_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"), |
|
||||
IOP( "pub", BSIM3v1S_MOD_PUB, IF_REAL, "Cross-term dependence of ub"), |
|
||||
IOP( "pub1", BSIM3v1S_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"), |
|
||||
IOP( "puc", BSIM3v1S_MOD_PUC, IF_REAL, "Cross-term dependence of uc"), |
|
||||
IOP( "puc1", BSIM3v1S_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"), |
|
||||
IOP( "pu0", BSIM3v1S_MOD_PU0, IF_REAL, "Cross-term dependence of u0"), |
|
||||
IOP( "pute", BSIM3v1S_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), |
|
||||
IOP( "pvoff", BSIM3v1S_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), |
|
||||
IOP( "pelm", BSIM3v1S_MOD_PELM, IF_REAL, "Cross-term dependence of elm"), |
|
||||
IOP( "pdelta", BSIM3v1S_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), |
|
||||
IOP( "prdsw", BSIM3v1S_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), |
|
||||
|
|
||||
IOP( "pprwg", BSIM3v1S_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), |
|
||||
IOP( "pprwb", BSIM3v1S_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), |
|
||||
|
|
||||
IOP( "pprt", BSIM3v1S_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), |
|
||||
IOP( "peta0", BSIM3v1S_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), |
|
||||
IOP( "petab", BSIM3v1S_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"), |
|
||||
IOP( "ppclm", BSIM3v1S_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"), |
|
||||
IOP( "ppdiblc1", BSIM3v1S_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"), |
|
||||
IOP( "ppdiblc2", BSIM3v1S_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"), |
|
||||
IOP( "ppdiblcb", BSIM3v1S_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), |
|
||||
IOP( "ppscbe1", BSIM3v1S_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), |
|
||||
IOP( "ppscbe2", BSIM3v1S_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), |
|
||||
IOP( "ppvag", BSIM3v1S_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), |
|
||||
IOP( "pwr", BSIM3v1S_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), |
|
||||
IOP( "pdwg", BSIM3v1S_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), |
|
||||
IOP( "pdwb", BSIM3v1S_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), |
|
||||
IOP( "pb0", BSIM3v1S_MOD_PB0, IF_REAL, "Cross-term dependence of b0"), |
|
||||
IOP( "pb1", BSIM3v1S_MOD_PB1, IF_REAL, "Cross-term dependence of b1"), |
|
||||
IOP( "pcgsl", BSIM3v1S_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"), |
|
||||
IOP( "pcgdl", BSIM3v1S_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"), |
|
||||
IOP( "pckappa", BSIM3v1S_MOD_PCKAPPA, IF_REAL, "Cross-term dependence of ckappa"), |
|
||||
IOP( "pcf", BSIM3v1S_MOD_PCF, IF_REAL, "Cross-term dependence of cf"), |
|
||||
IOP( "pclc", BSIM3v1S_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"), |
|
||||
IOP( "pcle", BSIM3v1S_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"), |
|
||||
IOP( "palpha0", BSIM3v1S_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"), |
|
||||
IOP( "pbeta0", BSIM3v1S_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"), |
|
||||
IOP( "pvfbcv", BSIM3v1S_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"), |
|
||||
|
|
||||
IOP( "noia", BSIM3v1S_MOD_NOIA, IF_REAL, "Flicker noise parameter"), |
|
||||
IOP( "noib", BSIM3v1S_MOD_NOIB, IF_REAL, "Flicker noise parameter"), |
|
||||
IOP( "noic", BSIM3v1S_MOD_NOIC, IF_REAL, "Flicker noise parameter"), |
|
||||
IOP( "em", BSIM3v1S_MOD_EM, IF_REAL, "Flicker noise parameter"), |
|
||||
IOP( "ef", BSIM3v1S_MOD_EF, IF_REAL, "Flicker noise frequency exponent"), |
|
||||
IOP( "af", BSIM3v1S_MOD_AF, IF_REAL, "Flicker noise exponent"), |
|
||||
IOP( "kf", BSIM3v1S_MOD_KF, IF_REAL, "Flicker noise coefficient"), |
|
||||
|
|
||||
IP( "nmos", BSIM3v1S_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"), |
|
||||
IP( "pmos", BSIM3v1S_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"), |
|
||||
/* serban */ |
|
||||
IOP( "hdif", BSIM3v1S_MOD_HDIF, IF_REAL, "S/D junction extension (HSPICE style)"), |
|
||||
}; |
|
||||
|
|
||||
char *BSIM3v1Snames[] = { |
|
||||
"Drain", |
|
||||
"Gate", |
|
||||
"Source", |
|
||||
"Bulk", |
|
||||
"Charge" |
|
||||
}; |
|
||||
|
|
||||
int BSIM3v1SnSize = NUMELEMS(BSIM3v1Snames); |
|
||||
int BSIM3v1SpTSize = NUMELEMS(BSIM3v1SpTable); |
|
||||
int BSIM3v1SmPTSize = NUMELEMS(BSIM3v1SmPTable); |
|
||||
int BSIM3v1SiSize = sizeof(BSIM3v1Sinstance); |
|
||||
int BSIM3v1SmSize = sizeof(BSIM3v1Smodel); |
|
||||
|
|
||||
|
|
||||
|
|
||||
@ -1,181 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1sacld.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
|
|
||||
int |
|
||||
BSIM3v1SacLoad(GENmodel *inModel, CKTcircuit *ckt) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb; |
|
||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb; |
|
||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega; |
|
||||
double GSoverlapCap, GDoverlapCap, GBoverlapCap, FwdSum, RevSum, Gm, Gmbs; |
|
||||
|
|
||||
double dxpart, sxpart, cqgb, cqdb, cqsb, cqbb, xcqgb, xcqdb, xcqsb, xcqbb; |
|
||||
|
|
||||
omega = ckt->CKTomega; |
|
||||
for (; model != NULL; model = model->BSIM3v1SnextModel) |
|
||||
{ |
|
||||
|
|
||||
|
|
||||
for (here = model->BSIM3v1Sinstances; here!= NULL; |
|
||||
here = here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
|
|
||||
if (here->BSIM3v1Sowner != ARCHme) |
|
||||
continue; |
|
||||
|
|
||||
if (here->BSIM3v1Smode >= 0) |
|
||||
{ Gm = here->BSIM3v1Sgm; |
|
||||
Gmbs = here->BSIM3v1Sgmbs; |
|
||||
FwdSum = Gm + Gmbs; |
|
||||
RevSum = 0.0; |
|
||||
cggb = here->BSIM3v1Scggb; |
|
||||
cgsb = here->BSIM3v1Scgsb; |
|
||||
cgdb = here->BSIM3v1Scgdb; |
|
||||
|
|
||||
cbgb = here->BSIM3v1Scbgb; |
|
||||
cbsb = here->BSIM3v1Scbsb; |
|
||||
cbdb = here->BSIM3v1Scbdb; |
|
||||
|
|
||||
cdgb = here->BSIM3v1Scdgb; |
|
||||
cdsb = here->BSIM3v1Scdsb; |
|
||||
cddb = here->BSIM3v1Scddb; |
|
||||
|
|
||||
cqgb = here->BSIM3v1Scqgb; |
|
||||
cqdb = here->BSIM3v1Scqdb; |
|
||||
cqsb = here->BSIM3v1Scqsb; |
|
||||
cqbb = here->BSIM3v1Scqbb; |
|
||||
sxpart = 0.6; |
|
||||
dxpart = 0.4; |
|
||||
|
|
||||
} |
|
||||
else |
|
||||
{ Gm = -here->BSIM3v1Sgm; |
|
||||
Gmbs = -here->BSIM3v1Sgmbs; |
|
||||
FwdSum = 0.0; |
|
||||
RevSum = -Gm - Gmbs; |
|
||||
cggb = here->BSIM3v1Scggb; |
|
||||
cgsb = here->BSIM3v1Scgdb; |
|
||||
cgdb = here->BSIM3v1Scgsb; |
|
||||
|
|
||||
cbgb = here->BSIM3v1Scbgb; |
|
||||
cbsb = here->BSIM3v1Scbdb; |
|
||||
cbdb = here->BSIM3v1Scbsb; |
|
||||
|
|
||||
cdgb = -(here->BSIM3v1Scdgb + cggb + cbgb); |
|
||||
cdsb = -(here->BSIM3v1Scddb + cgsb + cbsb); |
|
||||
cddb = -(here->BSIM3v1Scdsb + cgdb + cbdb); |
|
||||
|
|
||||
cqgb = here->BSIM3v1Scqgb; |
|
||||
cqdb = here->BSIM3v1Scqsb; |
|
||||
cqsb = here->BSIM3v1Scqdb; |
|
||||
cqbb = here->BSIM3v1Scqbb; |
|
||||
sxpart = 0.4; |
|
||||
dxpart = 0.6; |
|
||||
} |
|
||||
|
|
||||
gdpr=here->BSIM3v1SdrainConductance; |
|
||||
gspr=here->BSIM3v1SsourceConductance; |
|
||||
gds= here->BSIM3v1Sgds; |
|
||||
gbd= here->BSIM3v1Sgbd; |
|
||||
gbs= here->BSIM3v1Sgbs; |
|
||||
capbd= here->BSIM3v1Scapbd; |
|
||||
capbs= here->BSIM3v1Scapbs; |
|
||||
|
|
||||
GSoverlapCap = here->BSIM3v1Scgso; |
|
||||
GDoverlapCap = here->BSIM3v1Scgdo; |
|
||||
GBoverlapCap = here->pParam->BSIM3v1Scgbo; |
|
||||
|
|
||||
xcdgb = (cdgb - GDoverlapCap) * omega; |
|
||||
xcddb = (cddb + capbd + GDoverlapCap) * omega; |
|
||||
xcdsb = cdsb * omega; |
|
||||
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap) * omega; |
|
||||
xcsdb = -(cgdb + cbdb + cddb) * omega; |
|
||||
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega; |
|
||||
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap) |
|
||||
* omega; |
|
||||
xcgdb = (cgdb - GDoverlapCap ) * omega; |
|
||||
xcgsb = (cgsb - GSoverlapCap) * omega; |
|
||||
xcbgb = (cbgb - GBoverlapCap) * omega; |
|
||||
xcbdb = (cbdb - capbd ) * omega; |
|
||||
xcbsb = (cbsb - capbs ) * omega; |
|
||||
xcqgb = cqgb * omega; |
|
||||
xcqdb = cqdb * omega; |
|
||||
xcqsb = cqsb * omega; |
|
||||
xcqbb = cqbb * omega; |
|
||||
|
|
||||
*(here->BSIM3v1SGgPtr +1) += xcggb; |
|
||||
*(here->BSIM3v1SBbPtr +1) -= xcbgb + xcbdb + xcbsb; |
|
||||
*(here->BSIM3v1SDPdpPtr +1) += xcddb; |
|
||||
*(here->BSIM3v1SSPspPtr +1) += xcssb; |
|
||||
*(here->BSIM3v1SGbPtr +1) -= xcggb + xcgdb + xcgsb; |
|
||||
*(here->BSIM3v1SGdpPtr +1) += xcgdb; |
|
||||
*(here->BSIM3v1SGspPtr +1) += xcgsb; |
|
||||
*(here->BSIM3v1SBgPtr +1) += xcbgb; |
|
||||
*(here->BSIM3v1SBdpPtr +1) += xcbdb; |
|
||||
*(here->BSIM3v1SBspPtr +1) += xcbsb; |
|
||||
*(here->BSIM3v1SDPgPtr +1) += xcdgb; |
|
||||
*(here->BSIM3v1SDPbPtr +1) -= xcdgb + xcddb + xcdsb; |
|
||||
*(here->BSIM3v1SDPspPtr +1) += xcdsb; |
|
||||
*(here->BSIM3v1SSPgPtr +1) += xcsgb; |
|
||||
*(here->BSIM3v1SSPbPtr +1) -= xcsgb + xcsdb + xcssb; |
|
||||
*(here->BSIM3v1SSPdpPtr +1) += xcsdb; |
|
||||
|
|
||||
*(here->BSIM3v1SQqPtr +1) += omega; |
|
||||
|
|
||||
*(here->BSIM3v1SQgPtr +1) -= xcqgb; |
|
||||
*(here->BSIM3v1SQdpPtr +1) -= xcqdb; |
|
||||
*(here->BSIM3v1SQspPtr +1) -= xcqsb; |
|
||||
*(here->BSIM3v1SQbPtr +1) -= xcqbb; |
|
||||
|
|
||||
|
|
||||
*(here->BSIM3v1SDdPtr) += gdpr; |
|
||||
*(here->BSIM3v1SSsPtr) += gspr; |
|
||||
*(here->BSIM3v1SBbPtr) += gbd + gbs; |
|
||||
*(here->BSIM3v1SDPdpPtr) += gdpr + gds + gbd + RevSum + dxpart*here->BSIM3v1Sgtd; |
|
||||
*(here->BSIM3v1SSPspPtr) += gspr + gds + gbs + FwdSum + sxpart*here->BSIM3v1Sgts; |
|
||||
*(here->BSIM3v1SDdpPtr) -= gdpr; |
|
||||
*(here->BSIM3v1SSspPtr) -= gspr; |
|
||||
*(here->BSIM3v1SBdpPtr) -= gbd; |
|
||||
*(here->BSIM3v1SBspPtr) -= gbs; |
|
||||
*(here->BSIM3v1SDPdPtr) -= gdpr; |
|
||||
*(here->BSIM3v1SDPgPtr) += Gm + dxpart * here->BSIM3v1Sgtg; |
|
||||
*(here->BSIM3v1SDPbPtr) -= gbd - Gmbs - dxpart * here->BSIM3v1Sgtb; |
|
||||
*(here->BSIM3v1SDPspPtr) -= gds + FwdSum - dxpart * here->BSIM3v1Sgts; |
|
||||
*(here->BSIM3v1SSPgPtr) -= Gm - sxpart * here->BSIM3v1Sgtg; |
|
||||
*(here->BSIM3v1SSPsPtr) -= gspr; |
|
||||
*(here->BSIM3v1SSPbPtr) -= gbs + Gmbs - sxpart * here->BSIM3v1Sgtg; |
|
||||
*(here->BSIM3v1SSPdpPtr) -= gds + RevSum - sxpart * here->BSIM3v1Sgtd; |
|
||||
*(here->BSIM3v1SGgPtr) -= here->BSIM3v1Sgtg; |
|
||||
*(here->BSIM3v1SGbPtr) -= here->BSIM3v1Sgtb; |
|
||||
*(here->BSIM3v1SGdpPtr) -= here->BSIM3v1Sgtd; |
|
||||
*(here->BSIM3v1SGspPtr) -= here->BSIM3v1Sgts; |
|
||||
|
|
||||
*(here->BSIM3v1SQqPtr) += here->BSIM3v1Sgtau; |
|
||||
|
|
||||
*(here->BSIM3v1SDPqPtr) += dxpart * here->BSIM3v1Sgtau; |
|
||||
*(here->BSIM3v1SSPqPtr) += sxpart * here->BSIM3v1Sgtau; |
|
||||
*(here->BSIM3v1SGqPtr) -= here->BSIM3v1Sgtau; |
|
||||
|
|
||||
*(here->BSIM3v1SQgPtr) += here->BSIM3v1Sgtg; |
|
||||
*(here->BSIM3v1SQdpPtr) += here->BSIM3v1Sgtd; |
|
||||
*(here->BSIM3v1SQspPtr) += here->BSIM3v1Sgts; |
|
||||
*(here->BSIM3v1SQbPtr) += here->BSIM3v1Sgtb; |
|
||||
|
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
@ -1,195 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1sask.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "ifsim.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "devdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
int |
|
||||
BSIM3v1Sask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value, |
|
||||
IFvalue *select) |
|
||||
{ |
|
||||
BSIM3v1Sinstance *here = (BSIM3v1Sinstance*)inst; |
|
||||
|
|
||||
NG_IGNORE(select); |
|
||||
|
|
||||
switch(which) |
|
||||
{ case BSIM3v1S_L: |
|
||||
value->rValue = here->BSIM3v1Sl; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_W: |
|
||||
value->rValue = here->BSIM3v1Sw; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_AS: |
|
||||
value->rValue = here->BSIM3v1SsourceArea; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_AD: |
|
||||
value->rValue = here->BSIM3v1SdrainArea; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_PS: |
|
||||
value->rValue = here->BSIM3v1SsourcePerimeter; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_PD: |
|
||||
value->rValue = here->BSIM3v1SdrainPerimeter; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_NRS: |
|
||||
value->rValue = here->BSIM3v1SsourceSquares; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_NRD: |
|
||||
value->rValue = here->BSIM3v1SdrainSquares; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_OFF: |
|
||||
value->rValue = here->BSIM3v1Soff; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_NQSMOD: |
|
||||
value->iValue = here->BSIM3v1SnqsMod; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_M: |
|
||||
value->rValue = here->BSIM3v1Sm; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_IC_VBS: |
|
||||
value->rValue = here->BSIM3v1SicVBS; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_IC_VDS: |
|
||||
value->rValue = here->BSIM3v1SicVDS; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_IC_VGS: |
|
||||
value->rValue = here->BSIM3v1SicVGS; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_DNODE: |
|
||||
value->iValue = here->BSIM3v1SdNode; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_GNODE: |
|
||||
value->iValue = here->BSIM3v1SgNode; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_SNODE: |
|
||||
value->iValue = here->BSIM3v1SsNode; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_BNODE: |
|
||||
value->iValue = here->BSIM3v1SbNode; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_DNODEPRIME: |
|
||||
value->iValue = here->BSIM3v1SdNodePrime; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_SNODEPRIME: |
|
||||
value->iValue = here->BSIM3v1SsNodePrime; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_SOURCECONDUCT: |
|
||||
value->rValue = here->BSIM3v1SsourceConductance; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_DRAINCONDUCT: |
|
||||
value->rValue = here->BSIM3v1SdrainConductance; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_VBD: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svbd); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_VBS: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svbs); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_VGS: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svgs); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_VDS: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svds); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CD: |
|
||||
value->rValue = here->BSIM3v1Scd; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CBS: |
|
||||
value->rValue = here->BSIM3v1Scbs; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CBD: |
|
||||
value->rValue = here->BSIM3v1Scbd; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_GM: |
|
||||
value->rValue = here->BSIM3v1Sgm; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_GDS: |
|
||||
value->rValue = here->BSIM3v1Sgds; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_GMBS: |
|
||||
value->rValue = here->BSIM3v1Sgmbs; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_GBD: |
|
||||
value->rValue = here->BSIM3v1Sgbd; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_GBS: |
|
||||
value->rValue = here->BSIM3v1Sgbs; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_QB: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqb); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CQB: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Scqb); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_QG: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqg); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CQG: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Scqg); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_QD: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqd); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CQD: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Scqd); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CGG: |
|
||||
value->rValue = here->BSIM3v1Scggb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CGD: |
|
||||
value->rValue = here->BSIM3v1Scgdb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CGS: |
|
||||
value->rValue = here->BSIM3v1Scgsb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CDG: |
|
||||
value->rValue = here->BSIM3v1Scdgb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CDD: |
|
||||
value->rValue = here->BSIM3v1Scddb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CDS: |
|
||||
value->rValue = here->BSIM3v1Scdsb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CBG: |
|
||||
value->rValue = here->BSIM3v1Scbgb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CBDB: |
|
||||
value->rValue = here->BSIM3v1Scbdb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CBSB: |
|
||||
value->rValue = here->BSIM3v1Scbsb; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CAPBD: |
|
||||
value->rValue = here->BSIM3v1Scapbd; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_CAPBS: |
|
||||
value->rValue = here->BSIM3v1Scapbs; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_VON: |
|
||||
value->rValue = here->BSIM3v1Svon; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_VDSAT: |
|
||||
value->rValue = here->BSIM3v1Svdsat; |
|
||||
return(OK); |
|
||||
case BSIM3v1S_QBS: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqbs); |
|
||||
return(OK); |
|
||||
case BSIM3v1S_QBD: |
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqbd); |
|
||||
return(OK); |
|
||||
default: |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
/* NOTREACHED */ |
|
||||
} |
|
||||
|
|
||||
@ -1,361 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: Min-Chie Jeng. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1scheck.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "trandefs.h" |
|
||||
#include "const.h" |
|
||||
#include "sperror.h" |
|
||||
#include "devdefs.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
int |
|
||||
BSIM3v1ScheckModel(BSIM3v1Smodel *model, BSIM3v1Sinstance *here, |
|
||||
CKTcircuit *ckt) |
|
||||
{ |
|
||||
struct bsim3v1sSizeDependParam *pParam; |
|
||||
int Fatal_Flag = 0; |
|
||||
FILE *fplog; |
|
||||
|
|
||||
NG_IGNORE(ckt); |
|
||||
|
|
||||
if ((fplog = fopen("BSIM3V3_1S_check.log", "w")) != NULL) |
|
||||
{ pParam = here->pParam; |
|
||||
fprintf(fplog, "BSIM3V3.1 (Serban) Parameter Check\n"); |
|
||||
fprintf(fplog, "Model = %s\n", model->BSIM3v1SmodName); |
|
||||
fprintf(fplog, "W = %g, L = %g\n", here->BSIM3v1Sw, here->BSIM3v1Sl); |
|
||||
|
|
||||
|
|
||||
if (pParam->BSIM3v1Snlx < -pParam->BSIM3v1Sleff) |
|
||||
{ fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n", |
|
||||
pParam->BSIM3v1Snlx); |
|
||||
printf("Fatal: Nlx = %g is less than -Leff.\n", |
|
||||
pParam->BSIM3v1Snlx); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (model->BSIM3v1Stox <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Tox = %g is not positive.\n", |
|
||||
model->BSIM3v1Stox); |
|
||||
printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v1Stox); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Snpeak <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Nch = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Snpeak); |
|
||||
printf("Fatal: Nch = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Snpeak); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Snsub <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Snsub); |
|
||||
printf("Fatal: Nsub = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Snsub); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Sngate < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Sngate); |
|
||||
printf("Fatal: Ngate = %g Ngate is not positive.\n", |
|
||||
pParam->BSIM3v1Sngate); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Sngate > 1.e25) |
|
||||
{ fprintf(fplog, "Fatal: Ngate = %g is too high.\n", |
|
||||
pParam->BSIM3v1Sngate); |
|
||||
printf("Fatal: Ngate = %g Ngate is too high\n", |
|
||||
pParam->BSIM3v1Sngate); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Sxj <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Xj = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Sxj); |
|
||||
printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v1Sxj); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sdvt1 < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", |
|
||||
pParam->BSIM3v1Sdvt1); |
|
||||
printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v1Sdvt1); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sdvt1w < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", |
|
||||
pParam->BSIM3v1Sdvt1w); |
|
||||
printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v1Sdvt1w); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sw0 == -pParam->BSIM3v1Sweff) |
|
||||
{ fprintf(fplog, "Fatal: (W0 + Weff) = 0 cauing divided-by-zero.\n"); |
|
||||
printf("Fatal: (W0 + Weff) = 0 cauing divided-by-zero.\n"); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sdsub < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v1Sdsub); |
|
||||
printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v1Sdsub); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Sb1 == -pParam->BSIM3v1Sweff) |
|
||||
{ fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); |
|
||||
printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Su0temp <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v1Su0temp); |
|
||||
printf("Fatal: u0 at current temperature = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Su0temp); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
/* Check delta parameter */ |
|
||||
if (pParam->BSIM3v1Sdelta < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", |
|
||||
pParam->BSIM3v1Sdelta); |
|
||||
printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v1Sdelta); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Svsattemp <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v1Svsattemp); |
|
||||
printf("Fatal: Vsat at current temperature = %g is not positive.\n", |
|
||||
pParam->BSIM3v1Svsattemp); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
/* Check Rout parameters */ |
|
||||
if (pParam->BSIM3v1Spclm <= 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v1Spclm); |
|
||||
printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v1Spclm); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sdrout < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v1Sdrout); |
|
||||
printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v1Sdrout); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (model->BSIM3v1SunitLengthSidewallJctCap > 0.0 || |
|
||||
model->BSIM3v1SunitLengthGateSidewallJctCap > 0.0) |
|
||||
{ |
|
||||
if (here->BSIM3v1SdrainPerimeter < pParam->BSIM3v1Sweff) |
|
||||
{ fprintf(fplog, "Warning: Pd = %g is less than W.\n", |
|
||||
here->BSIM3v1SdrainPerimeter); |
|
||||
printf("Warning: Pd = %g is less than W.\n", |
|
||||
here->BSIM3v1SdrainPerimeter); |
|
||||
here->BSIM3v1SdrainPerimeter =pParam->BSIM3v1Sweff; |
|
||||
} |
|
||||
if (here->BSIM3v1SsourcePerimeter < pParam->BSIM3v1Sweff) |
|
||||
{ fprintf(fplog, "Warning: Ps = %g is less than W.\n", |
|
||||
here->BSIM3v1SsourcePerimeter); |
|
||||
printf("Warning: Ps = %g is less than W.\n", |
|
||||
here->BSIM3v1SsourcePerimeter); |
|
||||
here->BSIM3v1SsourcePerimeter =pParam->BSIM3v1Sweff; |
|
||||
} |
|
||||
} |
|
||||
/* Check capacitance parameters */ |
|
||||
if (pParam->BSIM3v1Sclc < 0.0) |
|
||||
{ fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v1Sclc); |
|
||||
printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v1Sclc); |
|
||||
Fatal_Flag = 1; |
|
||||
} |
|
||||
if (model->BSIM3v1SparamChk ==1) |
|
||||
{ |
|
||||
/* Check L and W parameters */ |
|
||||
if (pParam->BSIM3v1Sleff <= 5.0e-8) |
|
||||
{ fprintf(fplog, "Warning: Leff = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Sleff); |
|
||||
printf("Warning: Leff = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Sleff); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1SleffCV <= 5.0e-8) |
|
||||
{ fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n", |
|
||||
pParam->BSIM3v1SleffCV); |
|
||||
printf("Warning: Leff for CV = %g may be too small.\n", |
|
||||
pParam->BSIM3v1SleffCV); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sweff <= 1.0e-7) |
|
||||
{ fprintf(fplog, "Warning: Weff = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Sweff); |
|
||||
printf("Warning: Weff = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Sweff); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1SweffCV <= 1.0e-7) |
|
||||
{ fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n", |
|
||||
pParam->BSIM3v1SweffCV); |
|
||||
printf("Warning: Weff for CV = %g may be too small.\n", |
|
||||
pParam->BSIM3v1SweffCV); |
|
||||
} |
|
||||
|
|
||||
/* Check threshold voltage parameters */ |
|
||||
if (pParam->BSIM3v1Snlx < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v1Snlx); |
|
||||
printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v1Snlx); |
|
||||
} |
|
||||
if (model->BSIM3v1Stox < 1.0e-9) |
|
||||
{ fprintf(fplog, "Warning: Tox = %g is less than 10A.\n", |
|
||||
model->BSIM3v1Stox); |
|
||||
printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v1Stox); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Snpeak <= 1.0e15) |
|
||||
{ fprintf(fplog, "Warning: Nch = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Snpeak); |
|
||||
printf("Warning: Nch = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Snpeak); |
|
||||
} |
|
||||
else if (pParam->BSIM3v1Snpeak >= 1.0e21) |
|
||||
{ fprintf(fplog, "Warning: Nch = %g may be too large.\n", |
|
||||
pParam->BSIM3v1Snpeak); |
|
||||
printf("Warning: Nch = %g may be too large.\n", |
|
||||
pParam->BSIM3v1Snpeak); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Snsub <= 1.0e14) |
|
||||
{ fprintf(fplog, "Warning: Nsub = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Snsub); |
|
||||
printf("Warning: Nsub = %g may be too small.\n", |
|
||||
pParam->BSIM3v1Snsub); |
|
||||
} |
|
||||
else if (pParam->BSIM3v1Snsub >= 1.0e21) |
|
||||
{ fprintf(fplog, "Warning: Nsub = %g may be too large.\n", |
|
||||
pParam->BSIM3v1Snsub); |
|
||||
printf("Warning: Nsub = %g may be too large.\n", |
|
||||
pParam->BSIM3v1Snsub); |
|
||||
} |
|
||||
|
|
||||
if ((pParam->BSIM3v1Sngate > 0.0) && |
|
||||
(pParam->BSIM3v1Sngate <= 1.e18)) |
|
||||
{ fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", |
|
||||
pParam->BSIM3v1Sngate); |
|
||||
printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", |
|
||||
pParam->BSIM3v1Sngate); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sdvt0 < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", |
|
||||
pParam->BSIM3v1Sdvt0); |
|
||||
printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v1Sdvt0); |
|
||||
} |
|
||||
|
|
||||
if (fabs(1.0e-6 / (pParam->BSIM3v1Sw0 + pParam->BSIM3v1Sweff)) > 10.0) |
|
||||
{ fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); |
|
||||
printf("Warning: (W0 + Weff) may be too small.\n"); |
|
||||
} |
|
||||
|
|
||||
/* Check subthreshold parameters */ |
|
||||
if (pParam->BSIM3v1Snfactor < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Nfactor = %g is negative.\n", |
|
||||
pParam->BSIM3v1Snfactor); |
|
||||
printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v1Snfactor); |
|
||||
} |
|
||||
if (pParam->BSIM3v1Scdsc < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Cdsc = %g is negative.\n", |
|
||||
pParam->BSIM3v1Scdsc); |
|
||||
printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v1Scdsc); |
|
||||
} |
|
||||
if (pParam->BSIM3v1Scdscd < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Cdscd = %g is negative.\n", |
|
||||
pParam->BSIM3v1Scdscd); |
|
||||
printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v1Scdscd); |
|
||||
} |
|
||||
/* Check DIBL parameters */ |
|
||||
if (pParam->BSIM3v1Seta0 < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Eta0 = %g is negative.\n", |
|
||||
pParam->BSIM3v1Seta0); |
|
||||
printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v1Seta0); |
|
||||
} |
|
||||
|
|
||||
/* Check Abulk parameters */ |
|
||||
if (fabs(1.0e-6 / (pParam->BSIM3v1Sb1 + pParam->BSIM3v1Sweff)) > 10.0) |
|
||||
{ fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); |
|
||||
printf("Warning: (B1 + Weff) may be too small.\n"); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
/* Check Saturation parameters */ |
|
||||
if (pParam->BSIM3v1Sa2 < 0.01) |
|
||||
{ fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v1Sa2); |
|
||||
printf("Warning: A2 = %g is too small. Set to 0.01.\n", |
|
||||
pParam->BSIM3v1Sa2); |
|
||||
pParam->BSIM3v1Sa2 = 0.01; |
|
||||
} |
|
||||
else if (pParam->BSIM3v1Sa2 > 1.0) |
|
||||
{ fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", |
|
||||
pParam->BSIM3v1Sa2); |
|
||||
printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", |
|
||||
pParam->BSIM3v1Sa2); |
|
||||
pParam->BSIM3v1Sa2 = 1.0; |
|
||||
pParam->BSIM3v1Sa1 = 0.0; |
|
||||
|
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Srdsw < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", |
|
||||
pParam->BSIM3v1Srdsw); |
|
||||
printf("Warning: Rdsw = %g is negative. Set to zero.\n", |
|
||||
pParam->BSIM3v1Srdsw); |
|
||||
pParam->BSIM3v1Srdsw = 0.0; |
|
||||
pParam->BSIM3v1Srds0 = 0.0; |
|
||||
} |
|
||||
else if ((pParam->BSIM3v1Srds0 > 0.0) && (pParam->BSIM3v1Srds0 < 0.001)) |
|
||||
{ fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", |
|
||||
pParam->BSIM3v1Srds0); |
|
||||
printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", |
|
||||
pParam->BSIM3v1Srds0); |
|
||||
pParam->BSIM3v1Srds0 = 0.0; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Svsattemp < 1.0e3) |
|
||||
{ fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v1Svsattemp); |
|
||||
printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v1Svsattemp); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Spdibl1 < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", |
|
||||
pParam->BSIM3v1Spdibl1); |
|
||||
printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v1Spdibl1); |
|
||||
} |
|
||||
if (pParam->BSIM3v1Spdibl2 < 0.0) |
|
||||
{ fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", |
|
||||
pParam->BSIM3v1Spdibl2); |
|
||||
printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v1Spdibl2); |
|
||||
} |
|
||||
/* Check overlap capacitance parameters */ |
|
||||
if (model->BSIM3v1Scgdo < 0.0) |
|
||||
{ fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v1Scgdo); |
|
||||
printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v1Scgdo); |
|
||||
model->BSIM3v1Scgdo = 0.0; |
|
||||
} |
|
||||
if (model->BSIM3v1Scgso < 0.0) |
|
||||
{ fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v1Scgso); |
|
||||
printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v1Scgso); |
|
||||
model->BSIM3v1Scgso = 0.0; |
|
||||
} |
|
||||
if (model->BSIM3v1Scgbo < 0.0) |
|
||||
{ fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v1Scgbo); |
|
||||
printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v1Scgbo); |
|
||||
model->BSIM3v1Scgbo = 0.0; |
|
||||
} |
|
||||
|
|
||||
}/* loop for the parameter check for warning messages */ |
|
||||
fclose(fplog); |
|
||||
} |
|
||||
else |
|
||||
{ fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); |
|
||||
} |
|
||||
|
|
||||
return(Fatal_Flag); |
|
||||
} |
|
||||
|
|
||||
@ -1,110 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1scvtest.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "trandefs.h" |
|
||||
#include "const.h" |
|
||||
#include "devdefs.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
|
|
||||
int |
|
||||
BSIM3v1SconvTest(GENmodel *inModel, CKTcircuit *ckt) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds; |
|
||||
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs; |
|
||||
|
|
||||
/* loop through all the BSIM3v1S device models */ |
|
||||
for (; model != NULL; model = model->BSIM3v1SnextModel) |
|
||||
{ /* loop through all the instances of the model */ |
|
||||
for (here = model->BSIM3v1Sinstances; here != NULL ; |
|
||||
here=here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
if (here->BSIM3v1Sowner != ARCHme) continue; |
|
||||
vbs = model->BSIM3v1Stype |
|
||||
* (*(ckt->CKTrhsOld+here->BSIM3v1SbNode) |
|
||||
- *(ckt->CKTrhsOld+here->BSIM3v1SsNodePrime)); |
|
||||
vgs = model->BSIM3v1Stype |
|
||||
* (*(ckt->CKTrhsOld+here->BSIM3v1SgNode) |
|
||||
- *(ckt->CKTrhsOld+here->BSIM3v1SsNodePrime)); |
|
||||
vds = model->BSIM3v1Stype |
|
||||
* (*(ckt->CKTrhsOld+here->BSIM3v1SdNodePrime) |
|
||||
- *(ckt->CKTrhsOld+here->BSIM3v1SsNodePrime)); |
|
||||
vbd = vbs - vds; |
|
||||
vgd = vgs - vds; |
|
||||
vgdo = *(ckt->CKTstate0 + here->BSIM3v1Svgs) |
|
||||
- *(ckt->CKTstate0 + here->BSIM3v1Svds); |
|
||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v1Svbs); |
|
||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v1Svbd); |
|
||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v1Svgs); |
|
||||
delvds = vds - *(ckt->CKTstate0 + here->BSIM3v1Svds); |
|
||||
delvgd = vgd-vgdo; |
|
||||
|
|
||||
cd = here->BSIM3v1Scd; |
|
||||
if (here->BSIM3v1Smode >= 0) |
|
||||
{ cdhat = cd - here->BSIM3v1Sgbd * delvbd |
|
||||
+ here->BSIM3v1Sgmbs * delvbs + here->BSIM3v1Sgm * delvgs |
|
||||
+ here->BSIM3v1Sgds * delvds; |
|
||||
} |
|
||||
else |
|
||||
{ cdhat = cd - (here->BSIM3v1Sgbd - here->BSIM3v1Sgmbs) * delvbd |
|
||||
- here->BSIM3v1Sgm * delvgd + here->BSIM3v1Sgds * delvds; |
|
||||
} |
|
||||
|
|
||||
/* |
|
||||
* check convergence |
|
||||
*/ |
|
||||
if ((here->BSIM3v1Soff == 0) || (!(ckt->CKTmode & MODEINITFIX))) |
|
||||
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd)) |
|
||||
+ ckt->CKTabstol; |
|
||||
if (fabs(cdhat - cd) >= tol) { |
|
||||
|
|
||||
#ifdef STRANGE_PATCH |
|
||||
/* gtri - begin - wbk - report conv prob */ |
|
||||
if(ckt->enh->conv_debug.report_conv_probs) { |
|
||||
ENHreport_conv_prob(ENH_ANALOG_INSTANCE, |
|
||||
(char *) here->BSIM3v1Sname, |
|
||||
""); |
|
||||
} |
|
||||
/* gtri - end - wbk - report conv prob */ |
|
||||
#endif /* STRANGE_PATCH */ |
|
||||
|
|
||||
|
|
||||
ckt->CKTnoncon++; |
|
||||
return(OK); |
|
||||
} |
|
||||
cbs = here->BSIM3v1Scbs; |
|
||||
cbd = here->BSIM3v1Scbd; |
|
||||
cbhat = cbs + cbd + here->BSIM3v1Sgbd * delvbd |
|
||||
+ here->BSIM3v1Sgbs * delvbs; |
|
||||
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(cbs + cbd)) |
|
||||
+ ckt->CKTabstol; |
|
||||
if (fabs(cbhat - (cbs + cbd)) > tol) { |
|
||||
#ifdef STRANGE_PATCH |
|
||||
/* gtri - begin - wbk - report conv prob */ |
|
||||
if(ckt->enh->conv_debug.report_conv_probs) { |
|
||||
ENHreport_conv_prob(ENH_ANALOG_INSTANCE, |
|
||||
(char *) here->BSIM3v1Sname, |
|
||||
""); |
|
||||
} |
|
||||
/* gtri - end - wbk - report conv prob */ |
|
||||
#endif /* STRANGE_PATCH */ |
|
||||
|
|
||||
ckt->CKTnoncon++; |
|
||||
return(OK); |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
@ -1,39 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1sdel.c |
|
||||
**********/ |
|
||||
/* |
|
||||
*/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "gendefs.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
|
|
||||
int |
|
||||
BSIM3v1Sdelete(GENmodel *inModel, IFuid name, GENinstance **inInst) |
|
||||
{ |
|
||||
BSIM3v1Sinstance **fast = (BSIM3v1Sinstance**)inInst; |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance **prev = NULL; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
|
|
||||
for (; model ; model = model->BSIM3v1SnextModel) |
|
||||
{ prev = &(model->BSIM3v1Sinstances); |
|
||||
for (here = *prev; here ; here = *prev) |
|
||||
{ if (here->BSIM3v1Sname == name || (fast && here==*fast)) |
|
||||
{ *prev= here->BSIM3v1SnextInstance; |
|
||||
FREE(here); |
|
||||
return(OK); |
|
||||
} |
|
||||
prev = &(here->BSIM3v1SnextInstance); |
|
||||
} |
|
||||
} |
|
||||
return(E_NODEV); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
@ -1,37 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1sdest.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
void |
|
||||
BSIM3v1Sdestroy(GENmodel **inModel) |
|
||||
{ |
|
||||
BSIM3v1Smodel **model = (BSIM3v1Smodel**)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
BSIM3v1Sinstance *prev = NULL; |
|
||||
BSIM3v1Smodel *mod = *model; |
|
||||
BSIM3v1Smodel *oldmod = NULL; |
|
||||
|
|
||||
for (; mod ; mod = mod->BSIM3v1SnextModel) |
|
||||
{ if(oldmod) FREE(oldmod); |
|
||||
oldmod = mod; |
|
||||
prev = (BSIM3v1Sinstance *)NULL; |
|
||||
for (here = mod->BSIM3v1Sinstances; here; here = here->BSIM3v1SnextInstance) |
|
||||
{ if(prev) FREE(prev); |
|
||||
prev = here; |
|
||||
} |
|
||||
if(prev) FREE(prev); |
|
||||
} |
|
||||
if(oldmod) FREE(oldmod); |
|
||||
*model = NULL; |
|
||||
return; |
|
||||
} |
|
||||
|
|
||||
|
|
||||
|
|
||||
@ -1,45 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1getic.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
|
|
||||
int |
|
||||
BSIM3v1Sgetic(GENmodel *inModel, CKTcircuit *ckt) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
|
|
||||
for (; model ; model = model->BSIM3v1SnextModel) |
|
||||
{ for (here = model->BSIM3v1Sinstances; here; here = here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
|
|
||||
if (here->BSIM3v1Sowner != ARCHme) |
|
||||
continue; |
|
||||
|
|
||||
if(!here->BSIM3v1SicVBSGiven) |
|
||||
{ here->BSIM3v1SicVBS = *(ckt->CKTrhs + here->BSIM3v1SbNode) |
|
||||
- *(ckt->CKTrhs + here->BSIM3v1SsNode); |
|
||||
} |
|
||||
if (!here->BSIM3v1SicVDSGiven) |
|
||||
{ here->BSIM3v1SicVDS = *(ckt->CKTrhs + here->BSIM3v1SdNode) |
|
||||
- *(ckt->CKTrhs + here->BSIM3v1SsNode); |
|
||||
} |
|
||||
if (!here->BSIM3v1SicVGSGiven) |
|
||||
{ here->BSIM3v1SicVGS = *(ckt->CKTrhs + here->BSIM3v1SgNode) |
|
||||
- *(ckt->CKTrhs + here->BSIM3v1SsNode); |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
2447
src/spicelib/devices/bsim3v1s/b3v1sld.c
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
1126
src/spicelib/devices/bsim3v1s/b3v1smask.c
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
@ -1,43 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1mdel.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
int |
|
||||
BSIM3v1SmDelete(GENmodel **inModel, IFuid modname, GENmodel *kill) |
|
||||
{ |
|
||||
BSIM3v1Smodel **model = (BSIM3v1Smodel**)inModel; |
|
||||
BSIM3v1Smodel *modfast = (BSIM3v1Smodel*)kill; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
BSIM3v1Sinstance *prev = NULL; |
|
||||
BSIM3v1Smodel **oldmod; |
|
||||
|
|
||||
oldmod = model; |
|
||||
for (; *model ; model = &((*model)->BSIM3v1SnextModel)) |
|
||||
{ if ((*model)->BSIM3v1SmodName == modname || |
|
||||
(modfast && *model == modfast)) |
|
||||
goto delgot; |
|
||||
oldmod = model; |
|
||||
} |
|
||||
return(E_NOMOD); |
|
||||
|
|
||||
delgot: |
|
||||
*oldmod = (*model)->BSIM3v1SnextModel; /* cut deleted device out of list */ |
|
||||
for (here = (*model)->BSIM3v1Sinstances; here; here = here->BSIM3v1SnextInstance) |
|
||||
{ if(prev) FREE(prev); |
|
||||
prev = here; |
|
||||
} |
|
||||
if(prev) FREE(prev); |
|
||||
FREE(*model); |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
|
|
||||
1528
src/spicelib/devices/bsim3v1s/b3v1smpar.c
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
@ -1,366 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Gary W. Ng and Min-Chie Jeng. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1snoi.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "iferrmsg.h" |
|
||||
#include "noisedef.h" |
|
||||
#include "suffix.h" |
|
||||
#include "const.h" /* jwan */ |
|
||||
|
|
||||
/* |
|
||||
* BSIM3v1Snoise (mode, operation, firstModel, ckt, data, OnDens) |
|
||||
* This routine names and evaluates all of the noise sources |
|
||||
* associated with MOSFET's. It starts with the model *firstModel and |
|
||||
* traverses all of its insts. It then proceeds to any other models |
|
||||
* on the linked list. The total output noise density generated by |
|
||||
* all of the MOSFET's is summed with the variable "OnDens". |
|
||||
*/ |
|
||||
|
|
||||
/* |
|
||||
Channel thermal and flicker noises are calculated based on the value |
|
||||
of model->BSIM3v1SnoiMod. |
|
||||
If model->BSIM3v1SnoiMod = 1, |
|
||||
Channel thermal noise = SPICE2 model |
|
||||
Flicker noise = SPICE2 model |
|
||||
If model->BSIM3v1SnoiMod = 2, |
|
||||
Channel thermal noise = BSIM3v1S model |
|
||||
Flicker noise = BSIM3v1S model |
|
||||
If model->BSIM3v1SnoiMod = 3, |
|
||||
Channel thermal noise = SPICE2 model |
|
||||
Flicker noise = BSIM3v1S model |
|
||||
If model->BSIM3v1SnoiMod = 4, |
|
||||
Channel thermal noise = BSIM3v1S model |
|
||||
Flicker noise = SPICE2 model |
|
||||
*/ |
|
||||
|
|
||||
|
|
||||
static double |
|
||||
StrongInversionNoiseEval_b3v1s(double vgs, double vds, BSIM3v1Smodel *model, |
|
||||
BSIM3v1Sinstance *here, double freq, double temp) |
|
||||
{ |
|
||||
struct bsim3v1sSizeDependParam *pParam; |
|
||||
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst; |
|
||||
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9; |
|
||||
double Ssi; |
|
||||
|
|
||||
pParam = here->pParam; |
|
||||
cd = fabs(here->BSIM3v1Scd); |
|
||||
if (vds > here->BSIM3v1Svdsat) |
|
||||
{ esat = 2.0 * pParam->BSIM3v1Svsattemp / here->BSIM3v1Sueff; |
|
||||
T0 = ((((vds - here->BSIM3v1Svdsat) / pParam->BSIM3v1Slitl) + model->BSIM3v1Sem) |
|
||||
/ esat); |
|
||||
DelClm = pParam->BSIM3v1Slitl * log (MAX(T0, N_MINLOG)); |
|
||||
} |
|
||||
else |
|
||||
DelClm = 0.0; |
|
||||
EffFreq = pow(freq, model->BSIM3v1Sef); |
|
||||
T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v1Sueff; |
|
||||
T2 = 1.0e8 * EffFreq * model->BSIM3v1Scox |
|
||||
* pParam->BSIM3v1Sleff * pParam->BSIM3v1Sleff; |
|
||||
Vgst = vgs - here->BSIM3v1Svon; |
|
||||
N0 = model->BSIM3v1Scox * Vgst / CHARGE; |
|
||||
if (N0 < 0.0) |
|
||||
N0 = 0.0; |
|
||||
Nl = model->BSIM3v1Scox * (Vgst - MIN(vds, here->BSIM3v1Svdsat)) / CHARGE; |
|
||||
if (Nl < 0.0) |
|
||||
Nl = 0.0; |
|
||||
|
|
||||
T3 = model->BSIM3v1SoxideTrapDensityA |
|
||||
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG)); |
|
||||
T4 = model->BSIM3v1SoxideTrapDensityB * (N0 - Nl); |
|
||||
T5 = model->BSIM3v1SoxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); |
|
||||
|
|
||||
T6 = 8.62e-5 * temp * cd * cd; |
|
||||
T7 = 1.0e8 * EffFreq * pParam->BSIM3v1Sleff |
|
||||
* pParam->BSIM3v1Sleff * pParam->BSIM3v1Sweff; |
|
||||
T8 = model->BSIM3v1SoxideTrapDensityA + model->BSIM3v1SoxideTrapDensityB * Nl |
|
||||
+ model->BSIM3v1SoxideTrapDensityC * Nl * Nl; |
|
||||
T9 = (Nl + 2.0e14) * (Nl + 2.0e14); |
|
||||
|
|
||||
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; |
|
||||
return Ssi; |
|
||||
} |
|
||||
|
|
||||
int |
|
||||
BSIM3v1Snoise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt, |
|
||||
Ndata *data, double *OnDens) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel *)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
struct bsim3v1sSizeDependParam *pParam; |
|
||||
char name[N_MXVLNTH]; |
|
||||
double tempOnoise; |
|
||||
double tempInoise; |
|
||||
double noizDens[BSIM3v1SNSRCS]; |
|
||||
double lnNdens[BSIM3v1SNSRCS]; |
|
||||
|
|
||||
double vgs, vds, Slimit; |
|
||||
double T1, T10, T11; |
|
||||
double Ssi, Swi; |
|
||||
|
|
||||
int i; |
|
||||
|
|
||||
/* define the names of the noise sources */ |
|
||||
static char *BSIM3v1SnNames[BSIM3v1SNSRCS] = |
|
||||
{ /* Note that we have to keep the order */ |
|
||||
".rd", /* noise due to rd */ |
|
||||
/* consistent with the index definitions */ |
|
||||
".rs", /* noise due to rs */ |
|
||||
/* in BSIM3v1Sdefs.h */ |
|
||||
".id", /* noise due to id */ |
|
||||
".1overf", /* flicker (1/f) noise */ |
|
||||
"" /* total transistor noise */ |
|
||||
}; |
|
||||
|
|
||||
for (; model != NULL; model = model->BSIM3v1SnextModel) |
|
||||
{ for (here = model->BSIM3v1Sinstances; here != NULL; |
|
||||
here = here->BSIM3v1SnextInstance) |
|
||||
{ pParam = here->pParam; |
|
||||
switch (operation) |
|
||||
{ case N_OPEN: |
|
||||
/* see if we have to to produce a summary report */ |
|
||||
/* if so, name all the noise generators */ |
|
||||
|
|
||||
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) |
|
||||
{ switch (mode) |
|
||||
{ case N_DENS: |
|
||||
for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ (void) sprintf(name, "onoise.%s%s", |
|
||||
here->BSIM3v1Sname, |
|
||||
BSIM3v1SnNames[i]); |
|
||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); |
|
||||
if (!data->namelist) |
|
||||
return(E_NOMEM); |
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt, |
|
||||
&(data->namelist[data->numPlots++]), |
|
||||
(IFuid) NULL, name, UID_OTHER, |
|
||||
NULL); |
|
||||
/* we've added one more plot */ |
|
||||
} |
|
||||
break; |
|
||||
case INT_NOIZ: |
|
||||
for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ (void) sprintf(name, "onoise_total.%s%s", |
|
||||
here->BSIM3v1Sname, |
|
||||
BSIM3v1SnNames[i]); |
|
||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); |
|
||||
if (!data->namelist) |
|
||||
return(E_NOMEM); |
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt, |
|
||||
&(data->namelist[data->numPlots++]), |
|
||||
(IFuid) NULL, name, UID_OTHER, |
|
||||
NULL); |
|
||||
/* we've added one more plot */ |
|
||||
|
|
||||
(void) sprintf(name, "inoise_total.%s%s", |
|
||||
here->BSIM3v1Sname, |
|
||||
BSIM3v1SnNames[i]); |
|
||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); |
|
||||
if (!data->namelist) |
|
||||
return(E_NOMEM); |
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt, |
|
||||
&(data->namelist[data->numPlots++]), |
|
||||
(IFuid) NULL, name, UID_OTHER, |
|
||||
NULL); |
|
||||
/* we've added one more plot */ |
|
||||
} |
|
||||
break; |
|
||||
} |
|
||||
} |
|
||||
break; |
|
||||
case N_CALC: |
|
||||
switch (mode) |
|
||||
{ case N_DENS: |
|
||||
NevalSrc(&noizDens[BSIM3v1SRDNOIZ], |
|
||||
&lnNdens[BSIM3v1SRDNOIZ], ckt, THERMNOISE, |
|
||||
here->BSIM3v1SdNodePrime, here->BSIM3v1SdNode, |
|
||||
here->BSIM3v1SdrainConductance); |
|
||||
|
|
||||
NevalSrc(&noizDens[BSIM3v1SRSNOIZ], |
|
||||
&lnNdens[BSIM3v1SRSNOIZ], ckt, THERMNOISE, |
|
||||
here->BSIM3v1SsNodePrime, here->BSIM3v1SsNode, |
|
||||
here->BSIM3v1SsourceConductance); |
|
||||
|
|
||||
switch( model->BSIM3v1SnoiMod ) |
|
||||
{ case 1: |
|
||||
case 3: |
|
||||
NevalSrc(&noizDens[BSIM3v1SIDNOIZ], |
|
||||
&lnNdens[BSIM3v1SIDNOIZ], ckt, |
|
||||
THERMNOISE, here->BSIM3v1SdNodePrime, |
|
||||
here->BSIM3v1SsNodePrime, |
|
||||
(2.0 / 3.0 * fabs(here->BSIM3v1Sgm |
|
||||
+ here->BSIM3v1Sgds |
|
||||
+ here->BSIM3v1Sgmbs))); |
|
||||
break; |
|
||||
case 2: |
|
||||
case 4: |
|
||||
NevalSrc(&noizDens[BSIM3v1SIDNOIZ], |
|
||||
&lnNdens[BSIM3v1SIDNOIZ], ckt, |
|
||||
THERMNOISE, here->BSIM3v1SdNodePrime, |
|
||||
here->BSIM3v1SsNodePrime, |
|
||||
(here->BSIM3v1Sueff |
|
||||
* fabs(here->BSIM3v1Sqinv |
|
||||
/ (pParam->BSIM3v1Sleff |
|
||||
* pParam->BSIM3v1Sleff)))); |
|
||||
break; |
|
||||
} |
|
||||
NevalSrc(&noizDens[BSIM3v1SFLNOIZ], (double*) NULL, |
|
||||
ckt, N_GAIN, here->BSIM3v1SdNodePrime, |
|
||||
here->BSIM3v1SsNodePrime, (double) 0.0); |
|
||||
|
|
||||
switch( model->BSIM3v1SnoiMod ) |
|
||||
{ case 1: |
|
||||
case 4: |
|
||||
noizDens[BSIM3v1SFLNOIZ] *= model->BSIM3v1Skf |
|
||||
* exp(model->BSIM3v1Saf |
|
||||
* log(MAX(fabs(here->BSIM3v1Scd), |
|
||||
N_MINLOG))) |
|
||||
/ (pow(data->freq, model->BSIM3v1Sef) |
|
||||
* pParam->BSIM3v1Sleff |
|
||||
* pParam->BSIM3v1Sleff |
|
||||
* model->BSIM3v1Scox); |
|
||||
break; |
|
||||
case 2: |
|
||||
case 3: |
|
||||
vgs = *(ckt->CKTstates[0] + here->BSIM3v1Svgs); |
|
||||
vds = *(ckt->CKTstates[0] + here->BSIM3v1Svds); |
|
||||
if (vds < 0.0) |
|
||||
{ vds = -vds; |
|
||||
vgs = vgs + vds; |
|
||||
} |
|
||||
if (vgs >= here->BSIM3v1Svon + 0.1) |
|
||||
{ Ssi = StrongInversionNoiseEval_b3v1s(vgs, |
|
||||
vds, model, here, data->freq, |
|
||||
ckt->CKTtemp); |
|
||||
noizDens[BSIM3v1SFLNOIZ] *= Ssi; |
|
||||
} |
|
||||
else |
|
||||
{ pParam = here->pParam; |
|
||||
T10 = model->BSIM3v1SoxideTrapDensityA |
|
||||
* 8.62e-5 * ckt->CKTtemp; |
|
||||
T11 = pParam->BSIM3v1Sweff |
|
||||
* pParam->BSIM3v1Sleff |
|
||||
* pow(data->freq, model->BSIM3v1Sef) |
|
||||
* 4.0e36; |
|
||||
Swi = T10 / T11 * here->BSIM3v1Scd |
|
||||
* here->BSIM3v1Scd; |
|
||||
Slimit = StrongInversionNoiseEval_b3v1s( |
|
||||
here->BSIM3v1Svon + 0.1, vds, model, |
|
||||
here, data->freq, ckt->CKTtemp); |
|
||||
T1 = Swi + Slimit; |
|
||||
if (T1 > 0.0) |
|
||||
noizDens[BSIM3v1SFLNOIZ] *= (Slimit |
|
||||
* Swi) / T1; |
|
||||
else |
|
||||
noizDens[BSIM3v1SFLNOIZ] *= 0.0; |
|
||||
} |
|
||||
break; |
|
||||
} |
|
||||
|
|
||||
lnNdens[BSIM3v1SFLNOIZ] = |
|
||||
log(MAX(noizDens[BSIM3v1SFLNOIZ], N_MINLOG)); |
|
||||
|
|
||||
noizDens[BSIM3v1STOTNOIZ] = noizDens[BSIM3v1SRDNOIZ] |
|
||||
+ noizDens[BSIM3v1SRSNOIZ] |
|
||||
+ noizDens[BSIM3v1SIDNOIZ] |
|
||||
+ noizDens[BSIM3v1SFLNOIZ]; |
|
||||
lnNdens[BSIM3v1STOTNOIZ] = |
|
||||
log(MAX(noizDens[BSIM3v1STOTNOIZ], N_MINLOG)); |
|
||||
|
|
||||
*OnDens += noizDens[BSIM3v1STOTNOIZ]; |
|
||||
|
|
||||
if (data->delFreq == 0.0) |
|
||||
{ /* if we haven't done any previous |
|
||||
integration, we need to initialize our |
|
||||
"history" variables. |
|
||||
*/ |
|
||||
|
|
||||
for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ here->BSIM3v1SnVar[LNLSTDENS][i] = |
|
||||
lnNdens[i]; |
|
||||
} |
|
||||
|
|
||||
/* clear out our integration variables |
|
||||
if it's the first pass |
|
||||
*/ |
|
||||
if (data->freq == |
|
||||
((NOISEAN*) ckt->CKTcurJob)->NstartFreq) |
|
||||
{ for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ here->BSIM3v1SnVar[OUTNOIZ][i] = 0.0; |
|
||||
here->BSIM3v1SnVar[INNOIZ][i] = 0.0; |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
else |
|
||||
{ /* data->delFreq != 0.0, |
|
||||
we have to integrate. |
|
||||
*/ |
|
||||
for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ if (i != BSIM3v1STOTNOIZ) |
|
||||
{ tempOnoise = Nintegrate(noizDens[i], |
|
||||
lnNdens[i], |
|
||||
here->BSIM3v1SnVar[LNLSTDENS][i], |
|
||||
data); |
|
||||
tempInoise = Nintegrate(noizDens[i] |
|
||||
* data->GainSqInv, lnNdens[i] |
|
||||
+ data->lnGainInv, |
|
||||
here->BSIM3v1SnVar[LNLSTDENS][i] |
|
||||
+ data->lnGainInv, data); |
|
||||
here->BSIM3v1SnVar[LNLSTDENS][i] = |
|
||||
lnNdens[i]; |
|
||||
data->outNoiz += tempOnoise; |
|
||||
data->inNoise += tempInoise; |
|
||||
if (((NOISEAN*) |
|
||||
ckt->CKTcurJob)->NStpsSm != 0) |
|
||||
{ here->BSIM3v1SnVar[OUTNOIZ][i] |
|
||||
+= tempOnoise; |
|
||||
here->BSIM3v1SnVar[OUTNOIZ][BSIM3v1STOTNOIZ] |
|
||||
+= tempOnoise; |
|
||||
here->BSIM3v1SnVar[INNOIZ][i] |
|
||||
+= tempInoise; |
|
||||
here->BSIM3v1SnVar[INNOIZ][BSIM3v1STOTNOIZ] |
|
||||
+= tempInoise; |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
if (data->prtSummary) |
|
||||
{ for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ /* print a summary report */ |
|
||||
data->outpVector[data->outNumber++] |
|
||||
= noizDens[i]; |
|
||||
} |
|
||||
} |
|
||||
break; |
|
||||
case INT_NOIZ: |
|
||||
/* already calculated, just output */ |
|
||||
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) |
|
||||
{ for (i = 0; i < BSIM3v1SNSRCS; i++) |
|
||||
{ data->outpVector[data->outNumber++] |
|
||||
= here->BSIM3v1SnVar[OUTNOIZ][i]; |
|
||||
data->outpVector[data->outNumber++] |
|
||||
= here->BSIM3v1SnVar[INNOIZ][i]; |
|
||||
} |
|
||||
} |
|
||||
break; |
|
||||
} |
|
||||
break; |
|
||||
case N_CLOSE: |
|
||||
/* do nothing, the main calling routine will close */ |
|
||||
return (OK); |
|
||||
break; /* the plots */ |
|
||||
} /* switch (operation) */ |
|
||||
} /* for here */ |
|
||||
} /* for model */ |
|
||||
|
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
|
|
||||
@ -1,104 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1spar.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "ifsim.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
#include "fteext.h" |
|
||||
|
|
||||
int |
|
||||
BSIM3v1Sparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select) |
|
||||
{ |
|
||||
double scale; |
|
||||
|
|
||||
BSIM3v1Sinstance *here = (BSIM3v1Sinstance*)inst; |
|
||||
|
|
||||
NG_IGNORE(select); |
|
||||
|
|
||||
if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1; |
|
||||
|
|
||||
switch(param) |
|
||||
{ case BSIM3v1S_W: |
|
||||
here->BSIM3v1Sw = value->rValue*scale; |
|
||||
here->BSIM3v1SwGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_L: |
|
||||
here->BSIM3v1Sl = value->rValue*scale; |
|
||||
here->BSIM3v1SlGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_AS: |
|
||||
here->BSIM3v1SsourceArea = value->rValue*scale*scale; |
|
||||
here->BSIM3v1SsourceAreaGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_AD: |
|
||||
here->BSIM3v1SdrainArea = value->rValue*scale*scale; |
|
||||
here->BSIM3v1SdrainAreaGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_PS: |
|
||||
here->BSIM3v1SsourcePerimeter = value->rValue*scale; |
|
||||
here->BSIM3v1SsourcePerimeterGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_PD: |
|
||||
here->BSIM3v1SdrainPerimeter = value->rValue*scale; |
|
||||
here->BSIM3v1SdrainPerimeterGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_NRS: |
|
||||
here->BSIM3v1SsourceSquares = value->rValue; |
|
||||
here->BSIM3v1SsourceSquaresGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_NRD: |
|
||||
here->BSIM3v1SdrainSquares = value->rValue; |
|
||||
here->BSIM3v1SdrainSquaresGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_OFF: |
|
||||
here->BSIM3v1Soff = value->iValue; |
|
||||
break; |
|
||||
case BSIM3v1S_M: |
|
||||
here->BSIM3v1Sm = value->rValue; |
|
||||
break; |
|
||||
case BSIM3v1S_IC_VBS: |
|
||||
here->BSIM3v1SicVBS = value->rValue; |
|
||||
here->BSIM3v1SicVBSGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_IC_VDS: |
|
||||
here->BSIM3v1SicVDS = value->rValue; |
|
||||
here->BSIM3v1SicVDSGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_IC_VGS: |
|
||||
here->BSIM3v1SicVGS = value->rValue; |
|
||||
here->BSIM3v1SicVGSGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_NQSMOD: |
|
||||
here->BSIM3v1SnqsMod = value->iValue; |
|
||||
here->BSIM3v1SnqsModGiven = TRUE; |
|
||||
break; |
|
||||
case BSIM3v1S_IC: |
|
||||
switch(value->v.numValue){ |
|
||||
case 3: |
|
||||
here->BSIM3v1SicVBS = *(value->v.vec.rVec+2); |
|
||||
here->BSIM3v1SicVBSGiven = TRUE; |
|
||||
case 2: |
|
||||
here->BSIM3v1SicVGS = *(value->v.vec.rVec+1); |
|
||||
here->BSIM3v1SicVGSGiven = TRUE; |
|
||||
case 1: |
|
||||
here->BSIM3v1SicVDS = *(value->v.vec.rVec); |
|
||||
here->BSIM3v1SicVDSGiven = TRUE; |
|
||||
break; |
|
||||
default: |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
break; |
|
||||
default: |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
|
|
||||
@ -1,149 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1pzld.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "complex.h" |
|
||||
#include "sperror.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
int |
|
||||
BSIM3v1SpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb; |
|
||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb; |
|
||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb; |
|
||||
double GSoverlapCap, GDoverlapCap, GBoverlapCap; |
|
||||
double FwdSum, RevSum, Gm, Gmbs; |
|
||||
|
|
||||
NG_IGNORE(ckt); |
|
||||
|
|
||||
for (; model != NULL; model = model->BSIM3v1SnextModel) |
|
||||
{ for (here = model->BSIM3v1Sinstances; here!= NULL; |
|
||||
here = here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
if (here->BSIM3v1Sowner != ARCHme) |
|
||||
continue; |
|
||||
|
|
||||
if (here->BSIM3v1Smode >= 0) |
|
||||
{ Gm = here->BSIM3v1Sgm; |
|
||||
Gmbs = here->BSIM3v1Sgmbs; |
|
||||
FwdSum = Gm + Gmbs; |
|
||||
RevSum = 0.0; |
|
||||
cggb = here->BSIM3v1Scggb; |
|
||||
cgsb = here->BSIM3v1Scgsb; |
|
||||
cgdb = here->BSIM3v1Scgdb; |
|
||||
|
|
||||
cbgb = here->BSIM3v1Scbgb; |
|
||||
cbsb = here->BSIM3v1Scbsb; |
|
||||
cbdb = here->BSIM3v1Scbdb; |
|
||||
|
|
||||
cdgb = here->BSIM3v1Scdgb; |
|
||||
cdsb = here->BSIM3v1Scdsb; |
|
||||
cddb = here->BSIM3v1Scddb; |
|
||||
} |
|
||||
else |
|
||||
{ Gm = -here->BSIM3v1Sgm; |
|
||||
Gmbs = -here->BSIM3v1Sgmbs; |
|
||||
FwdSum = 0.0; |
|
||||
RevSum = -Gm - Gmbs; |
|
||||
cggb = here->BSIM3v1Scggb; |
|
||||
cgsb = here->BSIM3v1Scgdb; |
|
||||
cgdb = here->BSIM3v1Scgsb; |
|
||||
|
|
||||
cbgb = here->BSIM3v1Scbgb; |
|
||||
cbsb = here->BSIM3v1Scbdb; |
|
||||
cbdb = here->BSIM3v1Scbsb; |
|
||||
|
|
||||
cdgb = -(here->BSIM3v1Scdgb + cggb + cbgb); |
|
||||
cdsb = -(here->BSIM3v1Scddb + cgsb + cbsb); |
|
||||
cddb = -(here->BSIM3v1Scdsb + cgdb + cbdb); |
|
||||
} |
|
||||
gdpr=here->BSIM3v1SdrainConductance; |
|
||||
gspr=here->BSIM3v1SsourceConductance; |
|
||||
gds= here->BSIM3v1Sgds; |
|
||||
gbd= here->BSIM3v1Sgbd; |
|
||||
gbs= here->BSIM3v1Sgbs; |
|
||||
capbd= here->BSIM3v1Scapbd; |
|
||||
capbs= here->BSIM3v1Scapbs; |
|
||||
GSoverlapCap = here->BSIM3v1Scgso; |
|
||||
GDoverlapCap = here->BSIM3v1Scgdo; |
|
||||
GBoverlapCap = here->pParam->BSIM3v1Scgbo; |
|
||||
|
|
||||
xcdgb = (cdgb - GDoverlapCap); |
|
||||
xcddb = (cddb + capbd + GDoverlapCap); |
|
||||
xcdsb = cdsb; |
|
||||
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap); |
|
||||
xcsdb = -(cgdb + cbdb + cddb); |
|
||||
xcssb = (capbs + GSoverlapCap - (cgsb+cbsb+cdsb)); |
|
||||
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap); |
|
||||
xcgdb = (cgdb - GDoverlapCap); |
|
||||
xcgsb = (cgsb - GSoverlapCap); |
|
||||
xcbgb = (cbgb - GBoverlapCap); |
|
||||
xcbdb = (cbdb - capbd); |
|
||||
xcbsb = (cbsb - capbs); |
|
||||
|
|
||||
|
|
||||
*(here->BSIM3v1SGgPtr ) += xcggb * s->real; |
|
||||
*(here->BSIM3v1SGgPtr +1) += xcggb * s->imag; |
|
||||
*(here->BSIM3v1SBbPtr ) += (-xcbgb-xcbdb-xcbsb) * s->real; |
|
||||
*(here->BSIM3v1SBbPtr +1) += (-xcbgb-xcbdb-xcbsb) * s->imag; |
|
||||
*(here->BSIM3v1SDPdpPtr ) += xcddb * s->real; |
|
||||
*(here->BSIM3v1SDPdpPtr +1) += xcddb * s->imag; |
|
||||
*(here->BSIM3v1SSPspPtr ) += xcssb * s->real; |
|
||||
*(here->BSIM3v1SSPspPtr +1) += xcssb * s->imag; |
|
||||
*(here->BSIM3v1SGbPtr ) += (-xcggb-xcgdb-xcgsb) * s->real; |
|
||||
*(here->BSIM3v1SGbPtr +1) += (-xcggb-xcgdb-xcgsb) * s->imag; |
|
||||
*(here->BSIM3v1SGdpPtr ) += xcgdb * s->real; |
|
||||
*(here->BSIM3v1SGdpPtr +1) += xcgdb * s->imag; |
|
||||
*(here->BSIM3v1SGspPtr ) += xcgsb * s->real; |
|
||||
*(here->BSIM3v1SGspPtr +1) += xcgsb * s->imag; |
|
||||
*(here->BSIM3v1SBgPtr ) += xcbgb * s->real; |
|
||||
*(here->BSIM3v1SBgPtr +1) += xcbgb * s->imag; |
|
||||
*(here->BSIM3v1SBdpPtr ) += xcbdb * s->real; |
|
||||
*(here->BSIM3v1SBdpPtr +1) += xcbdb * s->imag; |
|
||||
*(here->BSIM3v1SBspPtr ) += xcbsb * s->real; |
|
||||
*(here->BSIM3v1SBspPtr +1) += xcbsb * s->imag; |
|
||||
*(here->BSIM3v1SDPgPtr ) += xcdgb * s->real; |
|
||||
*(here->BSIM3v1SDPgPtr +1) += xcdgb * s->imag; |
|
||||
*(here->BSIM3v1SDPbPtr ) += (-xcdgb-xcddb-xcdsb) * s->real; |
|
||||
*(here->BSIM3v1SDPbPtr +1) += (-xcdgb-xcddb-xcdsb) * s->imag; |
|
||||
*(here->BSIM3v1SDPspPtr ) += xcdsb * s->real; |
|
||||
*(here->BSIM3v1SDPspPtr +1) += xcdsb * s->imag; |
|
||||
*(here->BSIM3v1SSPgPtr ) += xcsgb * s->real; |
|
||||
*(here->BSIM3v1SSPgPtr +1) += xcsgb * s->imag; |
|
||||
*(here->BSIM3v1SSPbPtr ) += (-xcsgb-xcsdb-xcssb) * s->real; |
|
||||
*(here->BSIM3v1SSPbPtr +1) += (-xcsgb-xcsdb-xcssb) * s->imag; |
|
||||
*(here->BSIM3v1SSPdpPtr ) += xcsdb * s->real; |
|
||||
*(here->BSIM3v1SSPdpPtr +1) += xcsdb * s->imag; |
|
||||
*(here->BSIM3v1SDdPtr) += gdpr; |
|
||||
*(here->BSIM3v1SSsPtr) += gspr; |
|
||||
*(here->BSIM3v1SBbPtr) += gbd+gbs; |
|
||||
*(here->BSIM3v1SDPdpPtr) += gdpr+gds+gbd+RevSum; |
|
||||
*(here->BSIM3v1SSPspPtr) += gspr+gds+gbs+FwdSum; |
|
||||
*(here->BSIM3v1SDdpPtr) -= gdpr; |
|
||||
*(here->BSIM3v1SSspPtr) -= gspr; |
|
||||
*(here->BSIM3v1SBdpPtr) -= gbd; |
|
||||
*(here->BSIM3v1SBspPtr) -= gbs; |
|
||||
*(here->BSIM3v1SDPdPtr) -= gdpr; |
|
||||
*(here->BSIM3v1SDPgPtr) += Gm; |
|
||||
*(here->BSIM3v1SDPbPtr) -= gbd - Gmbs; |
|
||||
*(here->BSIM3v1SDPspPtr) -= gds + FwdSum; |
|
||||
*(here->BSIM3v1SSPgPtr) -= Gm; |
|
||||
*(here->BSIM3v1SSPsPtr) -= gspr; |
|
||||
*(here->BSIM3v1SSPbPtr) -= gbs + Gmbs; |
|
||||
*(here->BSIM3v1SSPdpPtr) -= gds + RevSum; |
|
||||
|
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
@ -1,981 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1sset.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "smpdefs.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "const.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
#define MAX_EXP 5.834617425e14 |
|
||||
#define MIN_EXP 1.713908431e-15 |
|
||||
#define EXP_THRESHOLD 34.0 |
|
||||
#define SMOOTHFACTOR 0.1 |
|
||||
#define EPSOX 3.453133e-11 |
|
||||
#define EPSSI 1.03594e-10 |
|
||||
#define PI 3.141592654 |
|
||||
#define Charge_q 1.60219e-19 |
|
||||
#define Meter2Micron 1.0e6 |
|
||||
|
|
||||
int |
|
||||
BSIM3v1Ssetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, |
|
||||
int *states) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
int error; |
|
||||
CKTnode *tmp; |
|
||||
|
|
||||
CKTnode *tmpNode; |
|
||||
IFuid tmpName; |
|
||||
|
|
||||
|
|
||||
/* loop through all the BSIM3v1S device models */ |
|
||||
for( ; model != NULL; model = model->BSIM3v1SnextModel ) |
|
||||
{ |
|
||||
/* Default value Processing for BSIM3v1S MOSFET Models */ |
|
||||
if (!model->BSIM3v1StypeGiven) |
|
||||
model->BSIM3v1Stype = NMOS; |
|
||||
if (!model->BSIM3v1SmobModGiven) |
|
||||
model->BSIM3v1SmobMod = 1; |
|
||||
if (!model->BSIM3v1SbinUnitGiven) |
|
||||
model->BSIM3v1SbinUnit = 1; |
|
||||
if (!model->BSIM3v1SparamChkGiven) |
|
||||
model->BSIM3v1SparamChk = 0; |
|
||||
if (!model->BSIM3v1ScapModGiven) |
|
||||
model->BSIM3v1ScapMod = 2; |
|
||||
if (!model->BSIM3v1SnqsModGiven) |
|
||||
model->BSIM3v1SnqsMod = 0; |
|
||||
if (!model->BSIM3v1SnoiModGiven) |
|
||||
model->BSIM3v1SnoiMod = 1; |
|
||||
if (!model->BSIM3v1SversionGiven) |
|
||||
model->BSIM3v1Sversion = 3.1; |
|
||||
if (!model->BSIM3v1StoxGiven) |
|
||||
model->BSIM3v1Stox = 150.0e-10; |
|
||||
model->BSIM3v1Scox = 3.453133e-11 / model->BSIM3v1Stox; |
|
||||
|
|
||||
if (!model->BSIM3v1ScdscGiven) |
|
||||
model->BSIM3v1Scdsc = 2.4e-4; /* unit Q/V/m^2 */ |
|
||||
if (!model->BSIM3v1ScdscbGiven) |
|
||||
model->BSIM3v1Scdscb = 0.0; /* unit Q/V/m^2 */ |
|
||||
if (!model->BSIM3v1ScdscdGiven) |
|
||||
model->BSIM3v1Scdscd = 0.0; /* unit Q/V/m^2 */ |
|
||||
if (!model->BSIM3v1ScitGiven) |
|
||||
model->BSIM3v1Scit = 0.0; /* unit Q/V/m^2 */ |
|
||||
if (!model->BSIM3v1SnfactorGiven) |
|
||||
model->BSIM3v1Snfactor = 1; |
|
||||
if (!model->BSIM3v1SxjGiven) |
|
||||
model->BSIM3v1Sxj = .15e-6; |
|
||||
if (!model->BSIM3v1SvsatGiven) |
|
||||
model->BSIM3v1Svsat = 8.0e4; /* unit m/s */ |
|
||||
if (!model->BSIM3v1SatGiven) |
|
||||
model->BSIM3v1Sat = 3.3e4; /* unit m/s */ |
|
||||
if (!model->BSIM3v1Sa0Given) |
|
||||
model->BSIM3v1Sa0 = 1.0; |
|
||||
if (!model->BSIM3v1SagsGiven) |
|
||||
model->BSIM3v1Sags = 0.0; |
|
||||
if (!model->BSIM3v1Sa1Given) |
|
||||
model->BSIM3v1Sa1 = 0.0; |
|
||||
if (!model->BSIM3v1Sa2Given) |
|
||||
model->BSIM3v1Sa2 = 1.0; |
|
||||
if (!model->BSIM3v1SketaGiven) |
|
||||
model->BSIM3v1Sketa = -0.047; /* unit / V */ |
|
||||
if (!model->BSIM3v1SnsubGiven) |
|
||||
model->BSIM3v1Snsub = 6.0e16; /* unit 1/cm3 */ |
|
||||
if (!model->BSIM3v1SnpeakGiven) |
|
||||
model->BSIM3v1Snpeak = 1.7e17; /* unit 1/cm3 */ |
|
||||
if (!model->BSIM3v1SngateGiven) |
|
||||
model->BSIM3v1Sngate = 0; /* unit 1/cm3 */ |
|
||||
if (!model->BSIM3v1SvbmGiven) |
|
||||
model->BSIM3v1Svbm = -3.0; |
|
||||
if (!model->BSIM3v1SxtGiven) |
|
||||
model->BSIM3v1Sxt = 1.55e-7; |
|
||||
if (!model->BSIM3v1Skt1Given) |
|
||||
model->BSIM3v1Skt1 = -0.11; /* unit V */ |
|
||||
if (!model->BSIM3v1Skt1lGiven) |
|
||||
model->BSIM3v1Skt1l = 0.0; /* unit V*m */ |
|
||||
if (!model->BSIM3v1Skt2Given) |
|
||||
model->BSIM3v1Skt2 = 0.022; /* No unit */ |
|
||||
if (!model->BSIM3v1Sk3Given) |
|
||||
model->BSIM3v1Sk3 = 80.0; |
|
||||
if (!model->BSIM3v1Sk3bGiven) |
|
||||
model->BSIM3v1Sk3b = 0.0; |
|
||||
if (!model->BSIM3v1Sw0Given) |
|
||||
model->BSIM3v1Sw0 = 2.5e-6; |
|
||||
if (!model->BSIM3v1SnlxGiven) |
|
||||
model->BSIM3v1Snlx = 1.74e-7; |
|
||||
if (!model->BSIM3v1Sdvt0Given) |
|
||||
model->BSIM3v1Sdvt0 = 2.2; |
|
||||
if (!model->BSIM3v1Sdvt1Given) |
|
||||
model->BSIM3v1Sdvt1 = 0.53; |
|
||||
if (!model->BSIM3v1Sdvt2Given) |
|
||||
model->BSIM3v1Sdvt2 = -0.032; /* unit 1 / V */ |
|
||||
|
|
||||
if (!model->BSIM3v1Sdvt0wGiven) |
|
||||
model->BSIM3v1Sdvt0w = 0.0; |
|
||||
if (!model->BSIM3v1Sdvt1wGiven) |
|
||||
model->BSIM3v1Sdvt1w = 5.3e6; |
|
||||
if (!model->BSIM3v1Sdvt2wGiven) |
|
||||
model->BSIM3v1Sdvt2w = -0.032; |
|
||||
|
|
||||
if (!model->BSIM3v1SdroutGiven) |
|
||||
model->BSIM3v1Sdrout = 0.56; |
|
||||
if (!model->BSIM3v1SdsubGiven) |
|
||||
model->BSIM3v1Sdsub = model->BSIM3v1Sdrout; |
|
||||
if (!model->BSIM3v1Svth0Given) |
|
||||
model->BSIM3v1Svth0 = (model->BSIM3v1Stype == NMOS) ? 0.7 : -0.7; |
|
||||
if (!model->BSIM3v1SuaGiven) |
|
||||
model->BSIM3v1Sua = 2.25e-9; /* unit m/V */ |
|
||||
if (!model->BSIM3v1Sua1Given) |
|
||||
model->BSIM3v1Sua1 = 4.31e-9; /* unit m/V */ |
|
||||
if (!model->BSIM3v1SubGiven) |
|
||||
model->BSIM3v1Sub = 5.87e-19; /* unit (m/V)**2 */ |
|
||||
if (!model->BSIM3v1Sub1Given) |
|
||||
model->BSIM3v1Sub1 = -7.61e-18; /* unit (m/V)**2 */ |
|
||||
if (!model->BSIM3v1SucGiven) |
|
||||
model->BSIM3v1Suc = (model->BSIM3v1SmobMod == 3) ? -0.0465 : -0.0465e-9; |
|
||||
if (!model->BSIM3v1Suc1Given) |
|
||||
model->BSIM3v1Suc1 = (model->BSIM3v1SmobMod == 3) ? -0.056 : -0.056e-9; |
|
||||
if (!model->BSIM3v1Su0Given) |
|
||||
model->BSIM3v1Su0 = (model->BSIM3v1Stype == NMOS) ? 0.067 : 0.025; |
|
||||
if (!model->BSIM3v1SuteGiven) |
|
||||
model->BSIM3v1Sute = -1.5; |
|
||||
if (!model->BSIM3v1SvoffGiven) |
|
||||
model->BSIM3v1Svoff = -0.08; |
|
||||
if (!model->BSIM3v1SdeltaGiven) |
|
||||
model->BSIM3v1Sdelta = 0.01; |
|
||||
if (!model->BSIM3v1SrdswGiven) |
|
||||
model->BSIM3v1Srdsw = 0; |
|
||||
if (!model->BSIM3v1SprwgGiven) |
|
||||
model->BSIM3v1Sprwg = 0.0; /* unit 1/V */ |
|
||||
if (!model->BSIM3v1SprwbGiven) |
|
||||
model->BSIM3v1Sprwb = 0.0; |
|
||||
if (!model->BSIM3v1SprtGiven) |
|
||||
if (!model->BSIM3v1SprtGiven) |
|
||||
model->BSIM3v1Sprt = 0.0; |
|
||||
if (!model->BSIM3v1Seta0Given) |
|
||||
model->BSIM3v1Seta0 = 0.08; /* no unit */ |
|
||||
if (!model->BSIM3v1SetabGiven) |
|
||||
model->BSIM3v1Setab = -0.07; /* unit 1/V */ |
|
||||
if (!model->BSIM3v1SpclmGiven) |
|
||||
model->BSIM3v1Spclm = 1.3; /* no unit */ |
|
||||
if (!model->BSIM3v1Spdibl1Given) |
|
||||
model->BSIM3v1Spdibl1 = .39; /* no unit */ |
|
||||
if (!model->BSIM3v1Spdibl2Given) |
|
||||
model->BSIM3v1Spdibl2 = 0.0086; /* no unit */ |
|
||||
if (!model->BSIM3v1SpdiblbGiven) |
|
||||
model->BSIM3v1Spdiblb = 0.0; /* 1/V */ |
|
||||
if (!model->BSIM3v1Spscbe1Given) |
|
||||
model->BSIM3v1Spscbe1 = 4.24e8; |
|
||||
if (!model->BSIM3v1Spscbe2Given) |
|
||||
model->BSIM3v1Spscbe2 = 1.0e-5; |
|
||||
if (!model->BSIM3v1SpvagGiven) |
|
||||
model->BSIM3v1Spvag = 0.0; |
|
||||
if (!model->BSIM3v1SwrGiven) |
|
||||
model->BSIM3v1Swr = 1.0; |
|
||||
if (!model->BSIM3v1SdwgGiven) |
|
||||
model->BSIM3v1Sdwg = 0.0; |
|
||||
if (!model->BSIM3v1SdwbGiven) |
|
||||
model->BSIM3v1Sdwb = 0.0; |
|
||||
if (!model->BSIM3v1Sb0Given) |
|
||||
model->BSIM3v1Sb0 = 0.0; |
|
||||
if (!model->BSIM3v1Sb1Given) |
|
||||
model->BSIM3v1Sb1 = 0.0; |
|
||||
if (!model->BSIM3v1Salpha0Given) |
|
||||
model->BSIM3v1Salpha0 = 0.0; |
|
||||
if (!model->BSIM3v1Sbeta0Given) |
|
||||
model->BSIM3v1Sbeta0 = 30.0; |
|
||||
|
|
||||
if (!model->BSIM3v1SelmGiven) |
|
||||
model->BSIM3v1Selm = 5.0; |
|
||||
if (!model->BSIM3v1ScgslGiven) |
|
||||
model->BSIM3v1Scgsl = 0.0; |
|
||||
if (!model->BSIM3v1ScgdlGiven) |
|
||||
model->BSIM3v1Scgdl = 0.0; |
|
||||
if (!model->BSIM3v1SckappaGiven) |
|
||||
model->BSIM3v1Sckappa = 0.6; |
|
||||
if (!model->BSIM3v1SclcGiven) |
|
||||
model->BSIM3v1Sclc = 0.1e-6; |
|
||||
if (!model->BSIM3v1ScleGiven) |
|
||||
model->BSIM3v1Scle = 0.6; |
|
||||
if (!model->BSIM3v1SvfbcvGiven) |
|
||||
model->BSIM3v1Svfbcv = -1.0; |
|
||||
|
|
||||
/* Length dependence */ |
|
||||
if (!model->BSIM3v1SlcdscGiven) |
|
||||
model->BSIM3v1Slcdsc = 0.0; |
|
||||
if (!model->BSIM3v1SlcdscbGiven) |
|
||||
model->BSIM3v1Slcdscb = 0.0; |
|
||||
if (!model->BSIM3v1SlcdscdGiven) |
|
||||
model->BSIM3v1Slcdscd = 0.0; |
|
||||
if (!model->BSIM3v1SlcitGiven) |
|
||||
model->BSIM3v1Slcit = 0.0; |
|
||||
if (!model->BSIM3v1SlnfactorGiven) |
|
||||
model->BSIM3v1Slnfactor = 0.0; |
|
||||
if (!model->BSIM3v1SlxjGiven) |
|
||||
model->BSIM3v1Slxj = 0.0; |
|
||||
if (!model->BSIM3v1SlvsatGiven) |
|
||||
model->BSIM3v1Slvsat = 0.0; |
|
||||
if (!model->BSIM3v1SlatGiven) |
|
||||
model->BSIM3v1Slat = 0.0; |
|
||||
if (!model->BSIM3v1Sla0Given) |
|
||||
model->BSIM3v1Sla0 = 0.0; |
|
||||
if (!model->BSIM3v1SlagsGiven) |
|
||||
model->BSIM3v1Slags = 0.0; |
|
||||
if (!model->BSIM3v1Sla1Given) |
|
||||
model->BSIM3v1Sla1 = 0.0; |
|
||||
if (!model->BSIM3v1Sla2Given) |
|
||||
model->BSIM3v1Sla2 = 0.0; |
|
||||
if (!model->BSIM3v1SlketaGiven) |
|
||||
model->BSIM3v1Slketa = 0.0; |
|
||||
if (!model->BSIM3v1SlnsubGiven) |
|
||||
model->BSIM3v1Slnsub = 0.0; |
|
||||
if (!model->BSIM3v1SlnpeakGiven) |
|
||||
model->BSIM3v1Slnpeak = 0.0; |
|
||||
if (!model->BSIM3v1SlngateGiven) |
|
||||
model->BSIM3v1Slngate = 0.0; |
|
||||
if (!model->BSIM3v1SlvbmGiven) |
|
||||
model->BSIM3v1Slvbm = 0.0; |
|
||||
if (!model->BSIM3v1SlxtGiven) |
|
||||
model->BSIM3v1Slxt = 0.0; |
|
||||
if (!model->BSIM3v1Slkt1Given) |
|
||||
model->BSIM3v1Slkt1 = 0.0; |
|
||||
if (!model->BSIM3v1Slkt1lGiven) |
|
||||
model->BSIM3v1Slkt1l = 0.0; |
|
||||
if (!model->BSIM3v1Slkt2Given) |
|
||||
model->BSIM3v1Slkt2 = 0.0; |
|
||||
if (!model->BSIM3v1Slk3Given) |
|
||||
model->BSIM3v1Slk3 = 0.0; |
|
||||
if (!model->BSIM3v1Slk3bGiven) |
|
||||
model->BSIM3v1Slk3b = 0.0; |
|
||||
if (!model->BSIM3v1Slw0Given) |
|
||||
model->BSIM3v1Slw0 = 0.0; |
|
||||
if (!model->BSIM3v1SlnlxGiven) |
|
||||
model->BSIM3v1Slnlx = 0.0; |
|
||||
if (!model->BSIM3v1Sldvt0Given) |
|
||||
model->BSIM3v1Sldvt0 = 0.0; |
|
||||
if (!model->BSIM3v1Sldvt1Given) |
|
||||
model->BSIM3v1Sldvt1 = 0.0; |
|
||||
if (!model->BSIM3v1Sldvt2Given) |
|
||||
model->BSIM3v1Sldvt2 = 0.0; |
|
||||
if (!model->BSIM3v1Sldvt0wGiven) |
|
||||
model->BSIM3v1Sldvt0w = 0.0; |
|
||||
if (!model->BSIM3v1Sldvt1wGiven) |
|
||||
model->BSIM3v1Sldvt1w = 0.0; |
|
||||
if (!model->BSIM3v1Sldvt2wGiven) |
|
||||
model->BSIM3v1Sldvt2w = 0.0; |
|
||||
if (!model->BSIM3v1SldroutGiven) |
|
||||
model->BSIM3v1Sldrout = 0.0; |
|
||||
if (!model->BSIM3v1SldsubGiven) |
|
||||
model->BSIM3v1Sldsub = 0.0; |
|
||||
if (!model->BSIM3v1Slvth0Given) |
|
||||
model->BSIM3v1Slvth0 = 0.0; |
|
||||
if (!model->BSIM3v1SluaGiven) |
|
||||
model->BSIM3v1Slua = 0.0; |
|
||||
if (!model->BSIM3v1Slua1Given) |
|
||||
model->BSIM3v1Slua1 = 0.0; |
|
||||
if (!model->BSIM3v1SlubGiven) |
|
||||
model->BSIM3v1Slub = 0.0; |
|
||||
if (!model->BSIM3v1Slub1Given) |
|
||||
model->BSIM3v1Slub1 = 0.0; |
|
||||
if (!model->BSIM3v1SlucGiven) |
|
||||
model->BSIM3v1Sluc = 0.0; |
|
||||
if (!model->BSIM3v1Sluc1Given) |
|
||||
model->BSIM3v1Sluc1 = 0.0; |
|
||||
if (!model->BSIM3v1Slu0Given) |
|
||||
model->BSIM3v1Slu0 = 0.0; |
|
||||
if (!model->BSIM3v1SluteGiven) |
|
||||
model->BSIM3v1Slute = 0.0; |
|
||||
if (!model->BSIM3v1SlvoffGiven) |
|
||||
model->BSIM3v1Slvoff = 0.0; |
|
||||
if (!model->BSIM3v1SldeltaGiven) |
|
||||
model->BSIM3v1Sldelta = 0.0; |
|
||||
if (!model->BSIM3v1SlrdswGiven) |
|
||||
model->BSIM3v1Slrdsw = 0.0; |
|
||||
if (!model->BSIM3v1SlprwbGiven) |
|
||||
model->BSIM3v1Slprwb = 0.0; |
|
||||
if (!model->BSIM3v1SlprwgGiven) |
|
||||
model->BSIM3v1Slprwg = 0.0; |
|
||||
if (!model->BSIM3v1SlprtGiven) |
|
||||
if (!model->BSIM3v1SlprtGiven) |
|
||||
model->BSIM3v1Slprt = 0.0; |
|
||||
if (!model->BSIM3v1Sleta0Given) |
|
||||
model->BSIM3v1Sleta0 = 0.0; |
|
||||
if (!model->BSIM3v1SletabGiven) |
|
||||
model->BSIM3v1Sletab = -0.0; |
|
||||
if (!model->BSIM3v1SlpclmGiven) |
|
||||
model->BSIM3v1Slpclm = 0.0; |
|
||||
if (!model->BSIM3v1Slpdibl1Given) |
|
||||
model->BSIM3v1Slpdibl1 = 0.0; |
|
||||
if (!model->BSIM3v1Slpdibl2Given) |
|
||||
model->BSIM3v1Slpdibl2 = 0.0; |
|
||||
if (!model->BSIM3v1SlpdiblbGiven) |
|
||||
model->BSIM3v1Slpdiblb = 0.0; |
|
||||
if (!model->BSIM3v1Slpscbe1Given) |
|
||||
model->BSIM3v1Slpscbe1 = 0.0; |
|
||||
if (!model->BSIM3v1Slpscbe2Given) |
|
||||
model->BSIM3v1Slpscbe2 = 0.0; |
|
||||
if (!model->BSIM3v1SlpvagGiven) |
|
||||
model->BSIM3v1Slpvag = 0.0; |
|
||||
if (!model->BSIM3v1SlwrGiven) |
|
||||
model->BSIM3v1Slwr = 0.0; |
|
||||
if (!model->BSIM3v1SldwgGiven) |
|
||||
model->BSIM3v1Sldwg = 0.0; |
|
||||
if (!model->BSIM3v1SldwbGiven) |
|
||||
model->BSIM3v1Sldwb = 0.0; |
|
||||
if (!model->BSIM3v1Slb0Given) |
|
||||
model->BSIM3v1Slb0 = 0.0; |
|
||||
if (!model->BSIM3v1Slb1Given) |
|
||||
model->BSIM3v1Slb1 = 0.0; |
|
||||
if (!model->BSIM3v1Slalpha0Given) |
|
||||
model->BSIM3v1Slalpha0 = 0.0; |
|
||||
if (!model->BSIM3v1Slbeta0Given) |
|
||||
model->BSIM3v1Slbeta0 = 0.0; |
|
||||
|
|
||||
if (!model->BSIM3v1SlelmGiven) |
|
||||
model->BSIM3v1Slelm = 0.0; |
|
||||
if (!model->BSIM3v1SlcgslGiven) |
|
||||
model->BSIM3v1Slcgsl = 0.0; |
|
||||
if (!model->BSIM3v1SlcgdlGiven) |
|
||||
model->BSIM3v1Slcgdl = 0.0; |
|
||||
if (!model->BSIM3v1SlckappaGiven) |
|
||||
model->BSIM3v1Slckappa = 0.0; |
|
||||
if (!model->BSIM3v1SlclcGiven) |
|
||||
model->BSIM3v1Slclc = 0.0; |
|
||||
if (!model->BSIM3v1SlcleGiven) |
|
||||
model->BSIM3v1Slcle = 0.0; |
|
||||
if (!model->BSIM3v1SlcfGiven) |
|
||||
model->BSIM3v1Slcf = 0.0; |
|
||||
if (!model->BSIM3v1SlvfbcvGiven) |
|
||||
model->BSIM3v1Slvfbcv = 0.0; |
|
||||
|
|
||||
/* Width dependence */ |
|
||||
if (!model->BSIM3v1SwcdscGiven) |
|
||||
model->BSIM3v1Swcdsc = 0.0; |
|
||||
if (!model->BSIM3v1SwcdscbGiven) |
|
||||
model->BSIM3v1Swcdscb = 0.0; |
|
||||
if (!model->BSIM3v1SwcdscdGiven) |
|
||||
model->BSIM3v1Swcdscd = 0.0; |
|
||||
if (!model->BSIM3v1SwcitGiven) |
|
||||
model->BSIM3v1Swcit = 0.0; |
|
||||
if (!model->BSIM3v1SwnfactorGiven) |
|
||||
model->BSIM3v1Swnfactor = 0.0; |
|
||||
if (!model->BSIM3v1SwxjGiven) |
|
||||
model->BSIM3v1Swxj = 0.0; |
|
||||
if (!model->BSIM3v1SwvsatGiven) |
|
||||
model->BSIM3v1Swvsat = 0.0; |
|
||||
if (!model->BSIM3v1SwatGiven) |
|
||||
model->BSIM3v1Swat = 0.0; |
|
||||
if (!model->BSIM3v1Swa0Given) |
|
||||
model->BSIM3v1Swa0 = 0.0; |
|
||||
if (!model->BSIM3v1SwagsGiven) |
|
||||
model->BSIM3v1Swags = 0.0; |
|
||||
if (!model->BSIM3v1Swa1Given) |
|
||||
model->BSIM3v1Swa1 = 0.0; |
|
||||
if (!model->BSIM3v1Swa2Given) |
|
||||
model->BSIM3v1Swa2 = 0.0; |
|
||||
if (!model->BSIM3v1SwketaGiven) |
|
||||
model->BSIM3v1Swketa = 0.0; |
|
||||
if (!model->BSIM3v1SwnsubGiven) |
|
||||
model->BSIM3v1Swnsub = 0.0; |
|
||||
if (!model->BSIM3v1SwnpeakGiven) |
|
||||
model->BSIM3v1Swnpeak = 0.0; |
|
||||
if (!model->BSIM3v1SwngateGiven) |
|
||||
model->BSIM3v1Swngate = 0.0; |
|
||||
if (!model->BSIM3v1SwvbmGiven) |
|
||||
model->BSIM3v1Swvbm = 0.0; |
|
||||
if (!model->BSIM3v1SwxtGiven) |
|
||||
model->BSIM3v1Swxt = 0.0; |
|
||||
if (!model->BSIM3v1Swkt1Given) |
|
||||
model->BSIM3v1Swkt1 = 0.0; |
|
||||
if (!model->BSIM3v1Swkt1lGiven) |
|
||||
model->BSIM3v1Swkt1l = 0.0; |
|
||||
if (!model->BSIM3v1Swkt2Given) |
|
||||
model->BSIM3v1Swkt2 = 0.0; |
|
||||
if (!model->BSIM3v1Swk3Given) |
|
||||
model->BSIM3v1Swk3 = 0.0; |
|
||||
if (!model->BSIM3v1Swk3bGiven) |
|
||||
model->BSIM3v1Swk3b = 0.0; |
|
||||
if (!model->BSIM3v1Sww0Given) |
|
||||
model->BSIM3v1Sww0 = 0.0; |
|
||||
if (!model->BSIM3v1SwnlxGiven) |
|
||||
model->BSIM3v1Swnlx = 0.0; |
|
||||
if (!model->BSIM3v1Swdvt0Given) |
|
||||
model->BSIM3v1Swdvt0 = 0.0; |
|
||||
if (!model->BSIM3v1Swdvt1Given) |
|
||||
model->BSIM3v1Swdvt1 = 0.0; |
|
||||
if (!model->BSIM3v1Swdvt2Given) |
|
||||
model->BSIM3v1Swdvt2 = 0.0; |
|
||||
if (!model->BSIM3v1Swdvt0wGiven) |
|
||||
model->BSIM3v1Swdvt0w = 0.0; |
|
||||
if (!model->BSIM3v1Swdvt1wGiven) |
|
||||
model->BSIM3v1Swdvt1w = 0.0; |
|
||||
if (!model->BSIM3v1Swdvt2wGiven) |
|
||||
model->BSIM3v1Swdvt2w = 0.0; |
|
||||
if (!model->BSIM3v1SwdroutGiven) |
|
||||
model->BSIM3v1Swdrout = 0.0; |
|
||||
if (!model->BSIM3v1SwdsubGiven) |
|
||||
model->BSIM3v1Swdsub = 0.0; |
|
||||
if (!model->BSIM3v1Swvth0Given) |
|
||||
model->BSIM3v1Swvth0 = 0.0; |
|
||||
if (!model->BSIM3v1SwuaGiven) |
|
||||
model->BSIM3v1Swua = 0.0; |
|
||||
if (!model->BSIM3v1Swua1Given) |
|
||||
model->BSIM3v1Swua1 = 0.0; |
|
||||
if (!model->BSIM3v1SwubGiven) |
|
||||
model->BSIM3v1Swub = 0.0; |
|
||||
if (!model->BSIM3v1Swub1Given) |
|
||||
model->BSIM3v1Swub1 = 0.0; |
|
||||
if (!model->BSIM3v1SwucGiven) |
|
||||
model->BSIM3v1Swuc = 0.0; |
|
||||
if (!model->BSIM3v1Swuc1Given) |
|
||||
model->BSIM3v1Swuc1 = 0.0; |
|
||||
if (!model->BSIM3v1Swu0Given) |
|
||||
model->BSIM3v1Swu0 = 0.0; |
|
||||
if (!model->BSIM3v1SwuteGiven) |
|
||||
model->BSIM3v1Swute = 0.0; |
|
||||
if (!model->BSIM3v1SwvoffGiven) |
|
||||
model->BSIM3v1Swvoff = 0.0; |
|
||||
if (!model->BSIM3v1SwdeltaGiven) |
|
||||
model->BSIM3v1Swdelta = 0.0; |
|
||||
if (!model->BSIM3v1SwrdswGiven) |
|
||||
model->BSIM3v1Swrdsw = 0.0; |
|
||||
if (!model->BSIM3v1SwprwbGiven) |
|
||||
model->BSIM3v1Swprwb = 0.0; |
|
||||
if (!model->BSIM3v1SwprwgGiven) |
|
||||
model->BSIM3v1Swprwg = 0.0; |
|
||||
if (!model->BSIM3v1SwprtGiven) |
|
||||
model->BSIM3v1Swprt = 0.0; |
|
||||
if (!model->BSIM3v1Sweta0Given) |
|
||||
model->BSIM3v1Sweta0 = 0.0; |
|
||||
if (!model->BSIM3v1SwetabGiven) |
|
||||
model->BSIM3v1Swetab = 0.0; |
|
||||
if (!model->BSIM3v1SwpclmGiven) |
|
||||
model->BSIM3v1Swpclm = 0.0; |
|
||||
if (!model->BSIM3v1Swpdibl1Given) |
|
||||
model->BSIM3v1Swpdibl1 = 0.0; |
|
||||
if (!model->BSIM3v1Swpdibl2Given) |
|
||||
model->BSIM3v1Swpdibl2 = 0.0; |
|
||||
if (!model->BSIM3v1SwpdiblbGiven) |
|
||||
model->BSIM3v1Swpdiblb = 0.0; |
|
||||
if (!model->BSIM3v1Swpscbe1Given) |
|
||||
model->BSIM3v1Swpscbe1 = 0.0; |
|
||||
if (!model->BSIM3v1Swpscbe2Given) |
|
||||
model->BSIM3v1Swpscbe2 = 0.0; |
|
||||
if (!model->BSIM3v1SwpvagGiven) |
|
||||
model->BSIM3v1Swpvag = 0.0; |
|
||||
if (!model->BSIM3v1SwwrGiven) |
|
||||
model->BSIM3v1Swwr = 0.0; |
|
||||
if (!model->BSIM3v1SwdwgGiven) |
|
||||
model->BSIM3v1Swdwg = 0.0; |
|
||||
if (!model->BSIM3v1SwdwbGiven) |
|
||||
model->BSIM3v1Swdwb = 0.0; |
|
||||
if (!model->BSIM3v1Swb0Given) |
|
||||
model->BSIM3v1Swb0 = 0.0; |
|
||||
if (!model->BSIM3v1Swb1Given) |
|
||||
model->BSIM3v1Swb1 = 0.0; |
|
||||
if (!model->BSIM3v1Swalpha0Given) |
|
||||
model->BSIM3v1Swalpha0 = 0.0; |
|
||||
if (!model->BSIM3v1Swbeta0Given) |
|
||||
model->BSIM3v1Swbeta0 = 0.0; |
|
||||
|
|
||||
if (!model->BSIM3v1SwelmGiven) |
|
||||
model->BSIM3v1Swelm = 0.0; |
|
||||
if (!model->BSIM3v1SwcgslGiven) |
|
||||
model->BSIM3v1Swcgsl = 0.0; |
|
||||
if (!model->BSIM3v1SwcgdlGiven) |
|
||||
model->BSIM3v1Swcgdl = 0.0; |
|
||||
if (!model->BSIM3v1SwckappaGiven) |
|
||||
model->BSIM3v1Swckappa = 0.0; |
|
||||
if (!model->BSIM3v1SwcfGiven) |
|
||||
model->BSIM3v1Swcf = 0.0; |
|
||||
if (!model->BSIM3v1SwclcGiven) |
|
||||
model->BSIM3v1Swclc = 0.0; |
|
||||
if (!model->BSIM3v1SwcleGiven) |
|
||||
model->BSIM3v1Swcle = 0.0; |
|
||||
if (!model->BSIM3v1SwvfbcvGiven) |
|
||||
model->BSIM3v1Swvfbcv = 0.0; |
|
||||
|
|
||||
/* Cross-term dependence */ |
|
||||
if (!model->BSIM3v1SpcdscGiven) |
|
||||
model->BSIM3v1Spcdsc = 0.0; |
|
||||
if (!model->BSIM3v1SpcdscbGiven) |
|
||||
model->BSIM3v1Spcdscb = 0.0; |
|
||||
if (!model->BSIM3v1SpcdscdGiven) |
|
||||
model->BSIM3v1Spcdscd = 0.0; |
|
||||
if (!model->BSIM3v1SpcitGiven) |
|
||||
model->BSIM3v1Spcit = 0.0; |
|
||||
if (!model->BSIM3v1SpnfactorGiven) |
|
||||
model->BSIM3v1Spnfactor = 0.0; |
|
||||
if (!model->BSIM3v1SpxjGiven) |
|
||||
model->BSIM3v1Spxj = 0.0; |
|
||||
if (!model->BSIM3v1SpvsatGiven) |
|
||||
model->BSIM3v1Spvsat = 0.0; |
|
||||
if (!model->BSIM3v1SpatGiven) |
|
||||
model->BSIM3v1Spat = 0.0; |
|
||||
if (!model->BSIM3v1Spa0Given) |
|
||||
model->BSIM3v1Spa0 = 0.0; |
|
||||
|
|
||||
if (!model->BSIM3v1SpagsGiven) |
|
||||
model->BSIM3v1Spags = 0.0; |
|
||||
if (!model->BSIM3v1Spa1Given) |
|
||||
model->BSIM3v1Spa1 = 0.0; |
|
||||
if (!model->BSIM3v1Spa2Given) |
|
||||
model->BSIM3v1Spa2 = 0.0; |
|
||||
if (!model->BSIM3v1SpketaGiven) |
|
||||
model->BSIM3v1Spketa = 0.0; |
|
||||
if (!model->BSIM3v1SpnsubGiven) |
|
||||
model->BSIM3v1Spnsub = 0.0; |
|
||||
if (!model->BSIM3v1SpnpeakGiven) |
|
||||
model->BSIM3v1Spnpeak = 0.0; |
|
||||
if (!model->BSIM3v1SpngateGiven) |
|
||||
model->BSIM3v1Spngate = 0.0; |
|
||||
if (!model->BSIM3v1SpvbmGiven) |
|
||||
model->BSIM3v1Spvbm = 0.0; |
|
||||
if (!model->BSIM3v1SpxtGiven) |
|
||||
model->BSIM3v1Spxt = 0.0; |
|
||||
if (!model->BSIM3v1Spkt1Given) |
|
||||
model->BSIM3v1Spkt1 = 0.0; |
|
||||
if (!model->BSIM3v1Spkt1lGiven) |
|
||||
model->BSIM3v1Spkt1l = 0.0; |
|
||||
if (!model->BSIM3v1Spkt2Given) |
|
||||
model->BSIM3v1Spkt2 = 0.0; |
|
||||
if (!model->BSIM3v1Spk3Given) |
|
||||
model->BSIM3v1Spk3 = 0.0; |
|
||||
if (!model->BSIM3v1Spk3bGiven) |
|
||||
model->BSIM3v1Spk3b = 0.0; |
|
||||
if (!model->BSIM3v1Spw0Given) |
|
||||
model->BSIM3v1Spw0 = 0.0; |
|
||||
if (!model->BSIM3v1SpnlxGiven) |
|
||||
model->BSIM3v1Spnlx = 0.0; |
|
||||
if (!model->BSIM3v1Spdvt0Given) |
|
||||
model->BSIM3v1Spdvt0 = 0.0; |
|
||||
if (!model->BSIM3v1Spdvt1Given) |
|
||||
model->BSIM3v1Spdvt1 = 0.0; |
|
||||
if (!model->BSIM3v1Spdvt2Given) |
|
||||
model->BSIM3v1Spdvt2 = 0.0; |
|
||||
if (!model->BSIM3v1Spdvt0wGiven) |
|
||||
model->BSIM3v1Spdvt0w = 0.0; |
|
||||
if (!model->BSIM3v1Spdvt1wGiven) |
|
||||
model->BSIM3v1Spdvt1w = 0.0; |
|
||||
if (!model->BSIM3v1Spdvt2wGiven) |
|
||||
model->BSIM3v1Spdvt2w = 0.0; |
|
||||
if (!model->BSIM3v1SpdroutGiven) |
|
||||
model->BSIM3v1Spdrout = 0.0; |
|
||||
if (!model->BSIM3v1SpdsubGiven) |
|
||||
model->BSIM3v1Spdsub = 0.0; |
|
||||
if (!model->BSIM3v1Spvth0Given) |
|
||||
model->BSIM3v1Spvth0 = 0.0; |
|
||||
if (!model->BSIM3v1SpuaGiven) |
|
||||
model->BSIM3v1Spua = 0.0; |
|
||||
if (!model->BSIM3v1Spua1Given) |
|
||||
model->BSIM3v1Spua1 = 0.0; |
|
||||
if (!model->BSIM3v1SpubGiven) |
|
||||
model->BSIM3v1Spub = 0.0; |
|
||||
if (!model->BSIM3v1Spub1Given) |
|
||||
model->BSIM3v1Spub1 = 0.0; |
|
||||
if (!model->BSIM3v1SpucGiven) |
|
||||
model->BSIM3v1Spuc = 0.0; |
|
||||
if (!model->BSIM3v1Spuc1Given) |
|
||||
model->BSIM3v1Spuc1 = 0.0; |
|
||||
if (!model->BSIM3v1Spu0Given) |
|
||||
model->BSIM3v1Spu0 = 0.0; |
|
||||
if (!model->BSIM3v1SputeGiven) |
|
||||
model->BSIM3v1Spute = 0.0; |
|
||||
if (!model->BSIM3v1SpvoffGiven) |
|
||||
model->BSIM3v1Spvoff = 0.0; |
|
||||
if (!model->BSIM3v1SpdeltaGiven) |
|
||||
model->BSIM3v1Spdelta = 0.0; |
|
||||
if (!model->BSIM3v1SprdswGiven) |
|
||||
model->BSIM3v1Sprdsw = 0.0; |
|
||||
if (!model->BSIM3v1SpprwbGiven) |
|
||||
model->BSIM3v1Spprwb = 0.0; |
|
||||
if (!model->BSIM3v1SpprwgGiven) |
|
||||
model->BSIM3v1Spprwg = 0.0; |
|
||||
if (!model->BSIM3v1SpprtGiven) |
|
||||
model->BSIM3v1Spprt = 0.0; |
|
||||
if (!model->BSIM3v1Speta0Given) |
|
||||
model->BSIM3v1Speta0 = 0.0; |
|
||||
if (!model->BSIM3v1SpetabGiven) |
|
||||
model->BSIM3v1Spetab = 0.0; |
|
||||
if (!model->BSIM3v1SppclmGiven) |
|
||||
model->BSIM3v1Sppclm = 0.0; |
|
||||
if (!model->BSIM3v1Sppdibl1Given) |
|
||||
model->BSIM3v1Sppdibl1 = 0.0; |
|
||||
if (!model->BSIM3v1Sppdibl2Given) |
|
||||
model->BSIM3v1Sppdibl2 = 0.0; |
|
||||
if (!model->BSIM3v1SppdiblbGiven) |
|
||||
model->BSIM3v1Sppdiblb = 0.0; |
|
||||
if (!model->BSIM3v1Sppscbe1Given) |
|
||||
model->BSIM3v1Sppscbe1 = 0.0; |
|
||||
if (!model->BSIM3v1Sppscbe2Given) |
|
||||
model->BSIM3v1Sppscbe2 = 0.0; |
|
||||
if (!model->BSIM3v1SppvagGiven) |
|
||||
model->BSIM3v1Sppvag = 0.0; |
|
||||
if (!model->BSIM3v1SpwrGiven) |
|
||||
model->BSIM3v1Spwr = 0.0; |
|
||||
if (!model->BSIM3v1SpdwgGiven) |
|
||||
model->BSIM3v1Spdwg = 0.0; |
|
||||
if (!model->BSIM3v1SpdwbGiven) |
|
||||
model->BSIM3v1Spdwb = 0.0; |
|
||||
if (!model->BSIM3v1Spb0Given) |
|
||||
model->BSIM3v1Spb0 = 0.0; |
|
||||
if (!model->BSIM3v1Spb1Given) |
|
||||
model->BSIM3v1Spb1 = 0.0; |
|
||||
if (!model->BSIM3v1Spalpha0Given) |
|
||||
model->BSIM3v1Spalpha0 = 0.0; |
|
||||
if (!model->BSIM3v1Spbeta0Given) |
|
||||
model->BSIM3v1Spbeta0 = 0.0; |
|
||||
|
|
||||
if (!model->BSIM3v1SpelmGiven) |
|
||||
model->BSIM3v1Spelm = 0.0; |
|
||||
if (!model->BSIM3v1SpcgslGiven) |
|
||||
model->BSIM3v1Spcgsl = 0.0; |
|
||||
if (!model->BSIM3v1SpcgdlGiven) |
|
||||
model->BSIM3v1Spcgdl = 0.0; |
|
||||
if (!model->BSIM3v1SpckappaGiven) |
|
||||
model->BSIM3v1Spckappa = 0.0; |
|
||||
if (!model->BSIM3v1SpcfGiven) |
|
||||
model->BSIM3v1Spcf = 0.0; |
|
||||
if (!model->BSIM3v1SpclcGiven) |
|
||||
model->BSIM3v1Spclc = 0.0; |
|
||||
if (!model->BSIM3v1SpcleGiven) |
|
||||
model->BSIM3v1Spcle = 0.0; |
|
||||
if (!model->BSIM3v1SpvfbcvGiven) |
|
||||
model->BSIM3v1Spvfbcv = 0.0; |
|
||||
|
|
||||
/* unit degree celcius */ |
|
||||
if (!model->BSIM3v1StnomGiven) |
|
||||
model->BSIM3v1Stnom = ckt->CKTnomTemp; |
|
||||
if (!model->BSIM3v1SLintGiven) |
|
||||
model->BSIM3v1SLint = 0.0; |
|
||||
if (!model->BSIM3v1SLlGiven) |
|
||||
model->BSIM3v1SLl = 0.0; |
|
||||
if (!model->BSIM3v1SLlnGiven) |
|
||||
model->BSIM3v1SLln = 1.0; |
|
||||
if (!model->BSIM3v1SLwGiven) |
|
||||
model->BSIM3v1SLw = 0.0; |
|
||||
if (!model->BSIM3v1SLwnGiven) |
|
||||
model->BSIM3v1SLwn = 1.0; |
|
||||
if (!model->BSIM3v1SLwlGiven) |
|
||||
model->BSIM3v1SLwl = 0.0; |
|
||||
if (!model->BSIM3v1SLminGiven) |
|
||||
model->BSIM3v1SLmin = 0.0; |
|
||||
if (!model->BSIM3v1SLmaxGiven) |
|
||||
model->BSIM3v1SLmax = 1.0; |
|
||||
if (!model->BSIM3v1SWintGiven) |
|
||||
model->BSIM3v1SWint = 0.0; |
|
||||
if (!model->BSIM3v1SWlGiven) |
|
||||
model->BSIM3v1SWl = 0.0; |
|
||||
if (!model->BSIM3v1SWlnGiven) |
|
||||
model->BSIM3v1SWln = 1.0; |
|
||||
if (!model->BSIM3v1SWwGiven) |
|
||||
model->BSIM3v1SWw = 0.0; |
|
||||
if (!model->BSIM3v1SWwnGiven) |
|
||||
model->BSIM3v1SWwn = 1.0; |
|
||||
if (!model->BSIM3v1SWwlGiven) |
|
||||
model->BSIM3v1SWwl = 0.0; |
|
||||
if (!model->BSIM3v1SWminGiven) |
|
||||
model->BSIM3v1SWmin = 0.0; |
|
||||
if (!model->BSIM3v1SWmaxGiven) |
|
||||
model->BSIM3v1SWmax = 1.0; |
|
||||
if (!model->BSIM3v1SdwcGiven) |
|
||||
model->BSIM3v1Sdwc = model->BSIM3v1SWint; |
|
||||
if (!model->BSIM3v1SdlcGiven) |
|
||||
model->BSIM3v1Sdlc = model->BSIM3v1SLint; |
|
||||
if (!model->BSIM3v1ScfGiven) |
|
||||
model->BSIM3v1Scf = 2.0 * EPSOX / PI |
|
||||
* log(1.0 + 0.4e-6 / model->BSIM3v1Stox); |
|
||||
if (!model->BSIM3v1ScgdoGiven) |
|
||||
{ if (model->BSIM3v1SdlcGiven && (model->BSIM3v1Sdlc > 0.0)) |
|
||||
{ model->BSIM3v1Scgdo = model->BSIM3v1Sdlc * model->BSIM3v1Scox |
|
||||
- model->BSIM3v1Scgdl ; |
|
||||
} |
|
||||
else |
|
||||
model->BSIM3v1Scgdo = 0.6 * model->BSIM3v1Sxj * model->BSIM3v1Scox; |
|
||||
} |
|
||||
if (!model->BSIM3v1ScgsoGiven) |
|
||||
{ if (model->BSIM3v1SdlcGiven && (model->BSIM3v1Sdlc > 0.0)) |
|
||||
{ model->BSIM3v1Scgso = model->BSIM3v1Sdlc * model->BSIM3v1Scox |
|
||||
- model->BSIM3v1Scgsl ; |
|
||||
} |
|
||||
else |
|
||||
model->BSIM3v1Scgso = 0.6 * model->BSIM3v1Sxj * model->BSIM3v1Scox; |
|
||||
} |
|
||||
|
|
||||
if (!model->BSIM3v1ScgboGiven) |
|
||||
{ model->BSIM3v1Scgbo = 2.0 * model->BSIM3v1Sdwc * model->BSIM3v1Scox; |
|
||||
} |
|
||||
if (!model->BSIM3v1SxpartGiven) |
|
||||
model->BSIM3v1Sxpart = 0.0; |
|
||||
if (!model->BSIM3v1SsheetResistanceGiven) |
|
||||
model->BSIM3v1SsheetResistance = 0.0; |
|
||||
if (!model->BSIM3v1SunitAreaJctCapGiven) |
|
||||
model->BSIM3v1SunitAreaJctCap = 5.0E-4; |
|
||||
if (!model->BSIM3v1SunitLengthSidewallJctCapGiven) |
|
||||
model->BSIM3v1SunitLengthSidewallJctCap = 5.0E-10; |
|
||||
if (!model->BSIM3v1SunitLengthGateSidewallJctCapGiven) |
|
||||
model->BSIM3v1SunitLengthGateSidewallJctCap = model->BSIM3v1SunitLengthSidewallJctCap ; |
|
||||
if (!model->BSIM3v1SjctSatCurDensityGiven) |
|
||||
model->BSIM3v1SjctSatCurDensity = 1.0E-4; |
|
||||
if (!model->BSIM3v1SjctSidewallSatCurDensityGiven) |
|
||||
model->BSIM3v1SjctSidewallSatCurDensity = 0.0; |
|
||||
if (!model->BSIM3v1SbulkJctPotentialGiven) |
|
||||
model->BSIM3v1SbulkJctPotential = 1.0; |
|
||||
if (!model->BSIM3v1SsidewallJctPotentialGiven) |
|
||||
model->BSIM3v1SsidewallJctPotential = 1.0; |
|
||||
if (!model->BSIM3v1SGatesidewallJctPotentialGiven) |
|
||||
model->BSIM3v1SGatesidewallJctPotential = model->BSIM3v1SsidewallJctPotential; |
|
||||
if (!model->BSIM3v1SbulkJctBotGradingCoeffGiven) |
|
||||
model->BSIM3v1SbulkJctBotGradingCoeff = 0.5; |
|
||||
if (!model->BSIM3v1SbulkJctSideGradingCoeffGiven) |
|
||||
model->BSIM3v1SbulkJctSideGradingCoeff = 0.33; |
|
||||
if (!model->BSIM3v1SbulkJctGateSideGradingCoeffGiven) |
|
||||
model->BSIM3v1SbulkJctGateSideGradingCoeff = model->BSIM3v1SbulkJctSideGradingCoeff; |
|
||||
if (!model->BSIM3v1SjctEmissionCoeffGiven) |
|
||||
model->BSIM3v1SjctEmissionCoeff = 1.0; |
|
||||
if (!model->BSIM3v1SjctTempExponentGiven) |
|
||||
model->BSIM3v1SjctTempExponent = 3.0; |
|
||||
if (!model->BSIM3v1SoxideTrapDensityAGiven) |
|
||||
if (!model->BSIM3v1SoxideTrapDensityAGiven) |
|
||||
{ if (model->BSIM3v1Stype == NMOS) |
|
||||
model->BSIM3v1SoxideTrapDensityA = 1e20; |
|
||||
else |
|
||||
model->BSIM3v1SoxideTrapDensityA=9.9e18; |
|
||||
} |
|
||||
if (!model->BSIM3v1SoxideTrapDensityBGiven) |
|
||||
{ if (model->BSIM3v1Stype == NMOS) |
|
||||
model->BSIM3v1SoxideTrapDensityB = 5e4; |
|
||||
else |
|
||||
model->BSIM3v1SoxideTrapDensityB = 2.4e3; |
|
||||
} |
|
||||
if (!model->BSIM3v1SoxideTrapDensityCGiven) |
|
||||
{ if (model->BSIM3v1Stype == NMOS) |
|
||||
model->BSIM3v1SoxideTrapDensityC = -1.4e-12; |
|
||||
else |
|
||||
model->BSIM3v1SoxideTrapDensityC = 1.4e-12; |
|
||||
|
|
||||
} |
|
||||
if (!model->BSIM3v1SemGiven) |
|
||||
model->BSIM3v1Sem = 4.1e7; /* V/m */ |
|
||||
if (!model->BSIM3v1SefGiven) |
|
||||
model->BSIM3v1Sef = 1.0; |
|
||||
if (!model->BSIM3v1SafGiven) |
|
||||
model->BSIM3v1Saf = 1.0; |
|
||||
if (!model->BSIM3v1SkfGiven) |
|
||||
model->BSIM3v1Skf = 0.0; |
|
||||
/* loop through all the instances of the model */ |
|
||||
for (here = model->BSIM3v1Sinstances; here != NULL ; |
|
||||
here=here->BSIM3v1SnextInstance) |
|
||||
|
|
||||
{ |
|
||||
if (here->BSIM3v1Sowner == ARCHme) { |
|
||||
/* allocate a chunk of the state vector */ |
|
||||
here->BSIM3v1Sstates = *states; |
|
||||
*states += BSIM3v1SnumStates; |
|
||||
} |
|
||||
|
|
||||
/* perform the parameter defaulting */ |
|
||||
if(here->BSIM3v1Sm == 0.0) |
|
||||
here->BSIM3v1Sm = 1.0; |
|
||||
fprintf(stderr, "M = %.2f\n", here->BSIM3v1Sm); |
|
||||
if (!here->BSIM3v1SwGiven) |
|
||||
here->BSIM3v1Sw = 5e-6; |
|
||||
here->BSIM3v1Sw *= here->BSIM3v1Sm; |
|
||||
|
|
||||
if (!here->BSIM3v1SdrainAreaGiven) |
|
||||
{ |
|
||||
if(model->BSIM3v1ShdifGiven) |
|
||||
here->BSIM3v1SdrainArea = here->BSIM3v1Sw * 2 * model->BSIM3v1Shdif; |
|
||||
else |
|
||||
here->BSIM3v1SdrainArea = 0.0; |
|
||||
} |
|
||||
here->BSIM3v1SdrainArea *= here->BSIM3v1Sm; |
|
||||
if (!here->BSIM3v1SdrainPerimeterGiven) |
|
||||
{ |
|
||||
if(model->BSIM3v1ShdifGiven) |
|
||||
here->BSIM3v1SdrainPerimeter = |
|
||||
2 * here->BSIM3v1Sw + 4 * model->BSIM3v1Shdif; |
|
||||
else |
|
||||
here->BSIM3v1SdrainPerimeter = 0.0; |
|
||||
} |
|
||||
here->BSIM3v1SdrainPerimeter *= here->BSIM3v1Sm; |
|
||||
|
|
||||
if (!here->BSIM3v1SdrainSquaresGiven) |
|
||||
here->BSIM3v1SdrainSquares = 1.0; |
|
||||
here->BSIM3v1SdrainSquares /= here->BSIM3v1Sm; |
|
||||
|
|
||||
if (!here->BSIM3v1SicVBSGiven) |
|
||||
here->BSIM3v1SicVBS = 0; |
|
||||
if (!here->BSIM3v1SicVDSGiven) |
|
||||
here->BSIM3v1SicVDS = 0; |
|
||||
if (!here->BSIM3v1SicVGSGiven) |
|
||||
here->BSIM3v1SicVGS = 0; |
|
||||
if (!here->BSIM3v1SlGiven) |
|
||||
here->BSIM3v1Sl = 5e-6; |
|
||||
if (!here->BSIM3v1SsourceAreaGiven) |
|
||||
{ |
|
||||
if(model->BSIM3v1ShdifGiven) |
|
||||
here->BSIM3v1SsourceArea = here->BSIM3v1Sw * 2 * model->BSIM3v1Shdif; |
|
||||
else |
|
||||
here->BSIM3v1SsourceArea = 0.0; |
|
||||
} |
|
||||
here->BSIM3v1SsourceArea *= here->BSIM3v1Sm; |
|
||||
|
|
||||
if (!here->BSIM3v1SsourcePerimeterGiven) |
|
||||
{ |
|
||||
if(model->BSIM3v1ShdifGiven) |
|
||||
here->BSIM3v1SsourcePerimeter = |
|
||||
2 * here->BSIM3v1Sw + 4 * model->BSIM3v1Shdif; |
|
||||
else |
|
||||
here->BSIM3v1SsourcePerimeter = 0.0; |
|
||||
} |
|
||||
here->BSIM3v1SsourcePerimeter *= here->BSIM3v1Sm; |
|
||||
|
|
||||
if (!here->BSIM3v1SsourceSquaresGiven) |
|
||||
here->BSIM3v1SsourceSquares = 1.0; |
|
||||
here->BSIM3v1SsourceSquares /= here->BSIM3v1Sm; |
|
||||
|
|
||||
if (!here->BSIM3v1SnqsModGiven) |
|
||||
here->BSIM3v1SnqsMod = model->BSIM3v1SnqsMod; |
|
||||
|
|
||||
/* process drain series resistance */ |
|
||||
if ((model->BSIM3v1SsheetResistance > 0.0) && |
|
||||
(here->BSIM3v1SdrainSquares > 0.0 ) && |
|
||||
(here->BSIM3v1SdNodePrime == 0)) |
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Sname,"drain"); |
|
||||
if(error) return(error); |
|
||||
here->BSIM3v1SdNodePrime = tmp->number; |
|
||||
|
|
||||
if (ckt->CKTcopyNodesets) { |
|
||||
if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) { |
|
||||
if (tmpNode->nsGiven) { |
|
||||
tmp->nodeset=tmpNode->nodeset; |
|
||||
tmp->nsGiven=tmpNode->nsGiven; |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
|
|
||||
} |
|
||||
else |
|
||||
{ here->BSIM3v1SdNodePrime = here->BSIM3v1SdNode; |
|
||||
} |
|
||||
|
|
||||
/* process source series resistance */ |
|
||||
if ((model->BSIM3v1SsheetResistance > 0.0) && |
|
||||
(here->BSIM3v1SsourceSquares > 0.0 ) && |
|
||||
(here->BSIM3v1SsNodePrime == 0)) |
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Sname,"source"); |
|
||||
if(error) return(error); |
|
||||
here->BSIM3v1SsNodePrime = tmp->number; |
|
||||
|
|
||||
if (ckt->CKTcopyNodesets) { |
|
||||
if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) { |
|
||||
if (tmpNode->nsGiven) { |
|
||||
tmp->nodeset=tmpNode->nodeset; |
|
||||
tmp->nsGiven=tmpNode->nsGiven; |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
|
|
||||
} |
|
||||
else |
|
||||
{ here->BSIM3v1SsNodePrime = here->BSIM3v1SsNode; |
|
||||
} |
|
||||
|
|
||||
/* internal charge node */ |
|
||||
|
|
||||
if ((here->BSIM3v1SnqsMod) && (here->BSIM3v1SqNode == 0)) |
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Sname,"charge"); |
|
||||
if(error) return(error); |
|
||||
here->BSIM3v1SqNode = tmp->number; |
|
||||
} |
|
||||
else |
|
||||
{ here->BSIM3v1SqNode = 0; |
|
||||
} |
|
||||
|
|
||||
/* set Sparse Matrix Pointers */ |
|
||||
|
|
||||
/* macro to make elements with built in test for out of memory */ |
|
||||
#define TSTALLOC(ptr,first,second) \ |
|
||||
if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\ |
|
||||
return(E_NOMEM);\ |
|
||||
} |
|
||||
|
|
||||
TSTALLOC(BSIM3v1SDdPtr, BSIM3v1SdNode, BSIM3v1SdNode) |
|
||||
TSTALLOC(BSIM3v1SGgPtr, BSIM3v1SgNode, BSIM3v1SgNode) |
|
||||
TSTALLOC(BSIM3v1SSsPtr, BSIM3v1SsNode, BSIM3v1SsNode) |
|
||||
TSTALLOC(BSIM3v1SBbPtr, BSIM3v1SbNode, BSIM3v1SbNode) |
|
||||
TSTALLOC(BSIM3v1SDPdpPtr, BSIM3v1SdNodePrime, BSIM3v1SdNodePrime) |
|
||||
TSTALLOC(BSIM3v1SSPspPtr, BSIM3v1SsNodePrime, BSIM3v1SsNodePrime) |
|
||||
TSTALLOC(BSIM3v1SDdpPtr, BSIM3v1SdNode, BSIM3v1SdNodePrime) |
|
||||
TSTALLOC(BSIM3v1SGbPtr, BSIM3v1SgNode, BSIM3v1SbNode) |
|
||||
TSTALLOC(BSIM3v1SGdpPtr, BSIM3v1SgNode, BSIM3v1SdNodePrime) |
|
||||
TSTALLOC(BSIM3v1SGspPtr, BSIM3v1SgNode, BSIM3v1SsNodePrime) |
|
||||
TSTALLOC(BSIM3v1SSspPtr, BSIM3v1SsNode, BSIM3v1SsNodePrime) |
|
||||
TSTALLOC(BSIM3v1SBdpPtr, BSIM3v1SbNode, BSIM3v1SdNodePrime) |
|
||||
TSTALLOC(BSIM3v1SBspPtr, BSIM3v1SbNode, BSIM3v1SsNodePrime) |
|
||||
TSTALLOC(BSIM3v1SDPspPtr, BSIM3v1SdNodePrime, BSIM3v1SsNodePrime) |
|
||||
TSTALLOC(BSIM3v1SDPdPtr, BSIM3v1SdNodePrime, BSIM3v1SdNode) |
|
||||
TSTALLOC(BSIM3v1SBgPtr, BSIM3v1SbNode, BSIM3v1SgNode) |
|
||||
TSTALLOC(BSIM3v1SDPgPtr, BSIM3v1SdNodePrime, BSIM3v1SgNode) |
|
||||
TSTALLOC(BSIM3v1SSPgPtr, BSIM3v1SsNodePrime, BSIM3v1SgNode) |
|
||||
TSTALLOC(BSIM3v1SSPsPtr, BSIM3v1SsNodePrime, BSIM3v1SsNode) |
|
||||
TSTALLOC(BSIM3v1SDPbPtr, BSIM3v1SdNodePrime, BSIM3v1SbNode) |
|
||||
TSTALLOC(BSIM3v1SSPbPtr, BSIM3v1SsNodePrime, BSIM3v1SbNode) |
|
||||
TSTALLOC(BSIM3v1SSPdpPtr, BSIM3v1SsNodePrime, BSIM3v1SdNodePrime) |
|
||||
|
|
||||
TSTALLOC(BSIM3v1SQqPtr, BSIM3v1SqNode, BSIM3v1SqNode) |
|
||||
|
|
||||
TSTALLOC(BSIM3v1SQdpPtr, BSIM3v1SqNode, BSIM3v1SdNodePrime) |
|
||||
TSTALLOC(BSIM3v1SQspPtr, BSIM3v1SqNode, BSIM3v1SsNodePrime) |
|
||||
TSTALLOC(BSIM3v1SQgPtr, BSIM3v1SqNode, BSIM3v1SgNode) |
|
||||
TSTALLOC(BSIM3v1SQbPtr, BSIM3v1SqNode, BSIM3v1SbNode) |
|
||||
TSTALLOC(BSIM3v1SDPqPtr, BSIM3v1SdNodePrime, BSIM3v1SqNode) |
|
||||
TSTALLOC(BSIM3v1SSPqPtr, BSIM3v1SsNodePrime, BSIM3v1SqNode) |
|
||||
TSTALLOC(BSIM3v1SGqPtr, BSIM3v1SgNode, BSIM3v1SqNode) |
|
||||
TSTALLOC(BSIM3v1SBqPtr, BSIM3v1SbNode, BSIM3v1SqNode) |
|
||||
|
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
int |
|
||||
BSIM3v1Sunsetup(GENmodel *inModel, CKTcircuit *ckt) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
|
|
||||
for (model = (BSIM3v1Smodel *)inModel; model != NULL; |
|
||||
model = model->BSIM3v1SnextModel) |
|
||||
{ |
|
||||
for (here = model->BSIM3v1Sinstances; here != NULL; |
|
||||
here=here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
if (here->BSIM3v1SdNodePrime |
|
||||
&& here->BSIM3v1SdNodePrime != here->BSIM3v1SdNode) |
|
||||
{ |
|
||||
CKTdltNNum(ckt, here->BSIM3v1SdNodePrime); |
|
||||
here->BSIM3v1SdNodePrime = 0; |
|
||||
} |
|
||||
if (here->BSIM3v1SsNodePrime |
|
||||
&& here->BSIM3v1SsNodePrime != here->BSIM3v1SsNode) |
|
||||
{ |
|
||||
CKTdltNNum(ckt, here->BSIM3v1SsNodePrime); |
|
||||
here->BSIM3v1SsNodePrime = 0; |
|
||||
} |
|
||||
} |
|
||||
} |
|
||||
return OK; |
|
||||
} |
|
||||
|
|
||||
|
|
||||
|
|
||||
@ -1,669 +0,0 @@ |
|||||
/*********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1stemp.c |
|
||||
**********/ |
|
||||
/* Lmin, Lmax, Wmin, Wmax */ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "smpdefs.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "const.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
#define Kb 1.3806226e-23 |
|
||||
#define KboQ 8.617087e-5 /* Kb / q where q = 1.60219e-19 */ |
|
||||
#define EPSOX 3.453133e-11 |
|
||||
#define EPSSI 1.03594e-10 |
|
||||
#define PI 3.141592654 |
|
||||
#define MAX_EXP 5.834617425e14 |
|
||||
#define MIN_EXP 1.713908431e-15 |
|
||||
#define EXP_THRESHOLD 34.0 |
|
||||
#define Charge_q 1.60219e-19 |
|
||||
|
|
||||
|
|
||||
/* ARGSUSED */ |
|
||||
int |
|
||||
BSIM3v1Stemp(GENmodel *inModel, CKTcircuit *ckt) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*) inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
struct bsim3v1sSizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam = NULL; |
|
||||
double tmp1, tmp2, Eg, Eg0, ni, T0, T1, T2, T3, Ldrn, Wdrn; |
|
||||
double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom; |
|
||||
int Size_Not_Found; |
|
||||
|
|
||||
/* loop through all the BSIM3v1S device models */ |
|
||||
for (; model != NULL; model = model->BSIM3v1SnextModel) |
|
||||
{ Temp = ckt->CKTtemp; |
|
||||
if (model->BSIM3v1SbulkJctPotential < 0.1) |
|
||||
model->BSIM3v1SbulkJctPotential = 0.1; |
|
||||
if (model->BSIM3v1SsidewallJctPotential < 0.1) |
|
||||
model->BSIM3v1SsidewallJctPotential = 0.1; |
|
||||
if (model->BSIM3v1SGatesidewallJctPotential < 0.1) |
|
||||
model->BSIM3v1SGatesidewallJctPotential = 0.1; |
|
||||
model->pSizeDependParamKnot = NULL; |
|
||||
pLastKnot = NULL; |
|
||||
|
|
||||
Tnom = model->BSIM3v1Stnom; |
|
||||
TRatio = Temp / Tnom; |
|
||||
|
|
||||
model->BSIM3v1Svcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); |
|
||||
model->BSIM3v1Sfactor1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Stox); |
|
||||
|
|
||||
Vtm0 = KboQ * Tnom; |
|
||||
Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0); |
|
||||
ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) |
|
||||
* exp(21.5565981 - Eg0 / (2.0 * Vtm0)); |
|
||||
|
|
||||
model->BSIM3v1Svtm = KboQ * Temp; |
|
||||
Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); |
|
||||
if (Temp != Tnom) |
|
||||
{ T0 = Eg0 / Vtm0 - Eg / model->BSIM3v1Svtm + model->BSIM3v1SjctTempExponent |
|
||||
* log(Temp / Tnom); |
|
||||
T1 = exp(T0 / model->BSIM3v1SjctEmissionCoeff); |
|
||||
model->BSIM3v1SjctTempSatCurDensity = model->BSIM3v1SjctSatCurDensity |
|
||||
* T1; |
|
||||
model->BSIM3v1SjctSidewallTempSatCurDensity |
|
||||
= model->BSIM3v1SjctSidewallSatCurDensity * T1; |
|
||||
} |
|
||||
else |
|
||||
{ model->BSIM3v1SjctTempSatCurDensity = model->BSIM3v1SjctSatCurDensity; |
|
||||
model->BSIM3v1SjctSidewallTempSatCurDensity |
|
||||
= model->BSIM3v1SjctSidewallSatCurDensity; |
|
||||
} |
|
||||
|
|
||||
if (model->BSIM3v1SjctTempSatCurDensity < 0.0) |
|
||||
model->BSIM3v1SjctTempSatCurDensity = 0.0; |
|
||||
if (model->BSIM3v1SjctSidewallTempSatCurDensity < 0.0) |
|
||||
model->BSIM3v1SjctSidewallTempSatCurDensity = 0.0; |
|
||||
|
|
||||
/* loop through all the instances of the model */ |
|
||||
/* MCJ: Length and Width not initialized */ |
|
||||
for (here = model->BSIM3v1Sinstances; here != NULL; |
|
||||
here = here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
|
|
||||
if (here->BSIM3v1Sowner != ARCHme) |
|
||||
continue; |
|
||||
|
|
||||
pSizeDependParamKnot = model->pSizeDependParamKnot; |
|
||||
Size_Not_Found = 1; |
|
||||
while ((pSizeDependParamKnot != NULL) && Size_Not_Found) |
|
||||
{ if ((here->BSIM3v1Sl == pSizeDependParamKnot->Length) |
|
||||
&& (here->BSIM3v1Sw == pSizeDependParamKnot->Width)) |
|
||||
{ Size_Not_Found = 0; |
|
||||
here->pParam = pSizeDependParamKnot; |
|
||||
} |
|
||||
else |
|
||||
{ pLastKnot = pSizeDependParamKnot; |
|
||||
pSizeDependParamKnot = pSizeDependParamKnot->pNext; |
|
||||
} |
|
||||
} |
|
||||
|
|
||||
if (Size_Not_Found) |
|
||||
{ pParam = TMALLOC(struct bsim3v1sSizeDependParam, 1); |
|
||||
if (pLastKnot == NULL) |
|
||||
model->pSizeDependParamKnot = pParam; |
|
||||
else |
|
||||
pLastKnot->pNext = pParam; |
|
||||
pParam->pNext = NULL; |
|
||||
here->pParam = pParam; |
|
||||
|
|
||||
Ldrn = here->BSIM3v1Sl; |
|
||||
Wdrn = here->BSIM3v1Sw; |
|
||||
pParam->Length = Ldrn; |
|
||||
pParam->Width = Wdrn; |
|
||||
|
|
||||
T0 = pow(Ldrn, model->BSIM3v1SLln); |
|
||||
T1 = pow(Wdrn, model->BSIM3v1SLwn); |
|
||||
tmp1 = model->BSIM3v1SLl / T0 + model->BSIM3v1SLw / T1 |
|
||||
+ model->BSIM3v1SLwl / (T0 * T1); |
|
||||
pParam->BSIM3v1Sdl = model->BSIM3v1SLint + tmp1; |
|
||||
pParam->BSIM3v1Sdlc = model->BSIM3v1Sdlc + tmp1; |
|
||||
|
|
||||
T2 = pow(Ldrn, model->BSIM3v1SWln); |
|
||||
T3 = pow(Wdrn, model->BSIM3v1SWwn); |
|
||||
tmp2 = model->BSIM3v1SWl / T2 + model->BSIM3v1SWw / T3 |
|
||||
+ model->BSIM3v1SWwl / (T2 * T3); |
|
||||
pParam->BSIM3v1Sdw = model->BSIM3v1SWint + tmp2; |
|
||||
pParam->BSIM3v1Sdwc = model->BSIM3v1Sdwc + tmp2; |
|
||||
|
|
||||
pParam->BSIM3v1Sleff = here->BSIM3v1Sl - 2.0 * pParam->BSIM3v1Sdl; |
|
||||
if (pParam->BSIM3v1Sleff <= 0.0) |
|
||||
{ IFuid namarray[2]; |
|
||||
namarray[0] = model->BSIM3v1SmodName; |
|
||||
namarray[1] = here->BSIM3v1Sname; |
|
||||
(*(SPfrontEnd->IFerror))(ERR_FATAL, |
|
||||
"BSIM3v1S: mosfet %s, model %s: Effective channel length <= 0", |
|
||||
namarray); |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
|
|
||||
pParam->BSIM3v1Sweff = here->BSIM3v1Sw - 2.0 * pParam->BSIM3v1Sdw; |
|
||||
if (pParam->BSIM3v1Sweff <= 0.0) |
|
||||
{ IFuid namarray[2]; |
|
||||
namarray[0] = model->BSIM3v1SmodName; |
|
||||
namarray[1] = here->BSIM3v1Sname; |
|
||||
(*(SPfrontEnd->IFerror))(ERR_FATAL, |
|
||||
"BSIM3v1S: mosfet %s, model %s: Effective channel width <= 0", |
|
||||
namarray); |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
|
|
||||
pParam->BSIM3v1SleffCV = here->BSIM3v1Sl - 2.0 * pParam->BSIM3v1Sdlc; |
|
||||
if (pParam->BSIM3v1SleffCV <= 0.0) |
|
||||
{ IFuid namarray[2]; |
|
||||
namarray[0] = model->BSIM3v1SmodName; |
|
||||
namarray[1] = here->BSIM3v1Sname; |
|
||||
(*(SPfrontEnd->IFerror))(ERR_FATAL, |
|
||||
"BSIM3v1S: mosfet %s, model %s: Effective channel length for C-V <= 0", |
|
||||
namarray); |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
|
|
||||
pParam->BSIM3v1SweffCV = here->BSIM3v1Sw - 2.0 * pParam->BSIM3v1Sdwc; |
|
||||
if (pParam->BSIM3v1SweffCV <= 0.0) |
|
||||
{ IFuid namarray[2]; |
|
||||
namarray[0] = model->BSIM3v1SmodName; |
|
||||
namarray[1] = here->BSIM3v1Sname; |
|
||||
(*(SPfrontEnd->IFerror))(ERR_FATAL, |
|
||||
"BSIM3v1S: mosfet %s, model %s: Effective channel width for C-V <= 0", |
|
||||
namarray); |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
|
|
||||
|
|
||||
if (model->BSIM3v1SbinUnit == 1) |
|
||||
{ Inv_L = 1.0e-6 / pParam->BSIM3v1Sleff; |
|
||||
Inv_W = 1.0e-6 / pParam->BSIM3v1Sweff; |
|
||||
Inv_LW = 1.0e-12 / (pParam->BSIM3v1Sleff |
|
||||
* pParam->BSIM3v1Sweff); |
|
||||
} |
|
||||
else |
|
||||
{ Inv_L = 1.0 / pParam->BSIM3v1Sleff; |
|
||||
Inv_W = 1.0 / pParam->BSIM3v1Sweff; |
|
||||
Inv_LW = 1.0 / (pParam->BSIM3v1Sleff |
|
||||
* pParam->BSIM3v1Sweff); |
|
||||
} |
|
||||
pParam->BSIM3v1Scdsc = model->BSIM3v1Scdsc |
|
||||
+ model->BSIM3v1Slcdsc * Inv_L |
|
||||
+ model->BSIM3v1Swcdsc * Inv_W |
|
||||
+ model->BSIM3v1Spcdsc * Inv_LW; |
|
||||
pParam->BSIM3v1Scdscb = model->BSIM3v1Scdscb |
|
||||
+ model->BSIM3v1Slcdscb * Inv_L |
|
||||
+ model->BSIM3v1Swcdscb * Inv_W |
|
||||
+ model->BSIM3v1Spcdscb * Inv_LW; |
|
||||
|
|
||||
pParam->BSIM3v1Scdscd = model->BSIM3v1Scdscd |
|
||||
+ model->BSIM3v1Slcdscd * Inv_L |
|
||||
+ model->BSIM3v1Swcdscd * Inv_W |
|
||||
+ model->BSIM3v1Spcdscd * Inv_LW; |
|
||||
|
|
||||
pParam->BSIM3v1Scit = model->BSIM3v1Scit |
|
||||
+ model->BSIM3v1Slcit * Inv_L |
|
||||
+ model->BSIM3v1Swcit * Inv_W |
|
||||
+ model->BSIM3v1Spcit * Inv_LW; |
|
||||
pParam->BSIM3v1Snfactor = model->BSIM3v1Snfactor |
|
||||
+ model->BSIM3v1Slnfactor * Inv_L |
|
||||
+ model->BSIM3v1Swnfactor * Inv_W |
|
||||
+ model->BSIM3v1Spnfactor * Inv_LW; |
|
||||
pParam->BSIM3v1Sxj = model->BSIM3v1Sxj |
|
||||
+ model->BSIM3v1Slxj * Inv_L |
|
||||
+ model->BSIM3v1Swxj * Inv_W |
|
||||
+ model->BSIM3v1Spxj * Inv_LW; |
|
||||
pParam->BSIM3v1Svsat = model->BSIM3v1Svsat |
|
||||
+ model->BSIM3v1Slvsat * Inv_L |
|
||||
+ model->BSIM3v1Swvsat * Inv_W |
|
||||
+ model->BSIM3v1Spvsat * Inv_LW; |
|
||||
pParam->BSIM3v1Sat = model->BSIM3v1Sat |
|
||||
+ model->BSIM3v1Slat * Inv_L |
|
||||
+ model->BSIM3v1Swat * Inv_W |
|
||||
+ model->BSIM3v1Spat * Inv_LW; |
|
||||
pParam->BSIM3v1Sa0 = model->BSIM3v1Sa0 |
|
||||
+ model->BSIM3v1Sla0 * Inv_L |
|
||||
+ model->BSIM3v1Swa0 * Inv_W |
|
||||
+ model->BSIM3v1Spa0 * Inv_LW; |
|
||||
|
|
||||
pParam->BSIM3v1Sags = model->BSIM3v1Sags |
|
||||
+ model->BSIM3v1Slags * Inv_L |
|
||||
+ model->BSIM3v1Swags * Inv_W |
|
||||
+ model->BSIM3v1Spags * Inv_LW; |
|
||||
|
|
||||
pParam->BSIM3v1Sa1 = model->BSIM3v1Sa1 |
|
||||
+ model->BSIM3v1Sla1 * Inv_L |
|
||||
+ model->BSIM3v1Swa1 * Inv_W |
|
||||
+ model->BSIM3v1Spa1 * Inv_LW; |
|
||||
pParam->BSIM3v1Sa2 = model->BSIM3v1Sa2 |
|
||||
+ model->BSIM3v1Sla2 * Inv_L |
|
||||
+ model->BSIM3v1Swa2 * Inv_W |
|
||||
+ model->BSIM3v1Spa2 * Inv_LW; |
|
||||
pParam->BSIM3v1Sketa = model->BSIM3v1Sketa |
|
||||
+ model->BSIM3v1Slketa * Inv_L |
|
||||
+ model->BSIM3v1Swketa * Inv_W |
|
||||
+ model->BSIM3v1Spketa * Inv_LW; |
|
||||
pParam->BSIM3v1Snsub = model->BSIM3v1Snsub |
|
||||
+ model->BSIM3v1Slnsub * Inv_L |
|
||||
+ model->BSIM3v1Swnsub * Inv_W |
|
||||
+ model->BSIM3v1Spnsub * Inv_LW; |
|
||||
pParam->BSIM3v1Snpeak = model->BSIM3v1Snpeak |
|
||||
+ model->BSIM3v1Slnpeak * Inv_L |
|
||||
+ model->BSIM3v1Swnpeak * Inv_W |
|
||||
+ model->BSIM3v1Spnpeak * Inv_LW; |
|
||||
pParam->BSIM3v1Sngate = model->BSIM3v1Sngate |
|
||||
+ model->BSIM3v1Slngate * Inv_L |
|
||||
+ model->BSIM3v1Swngate * Inv_W |
|
||||
+ model->BSIM3v1Spngate * Inv_LW; |
|
||||
pParam->BSIM3v1Sgamma1 = model->BSIM3v1Sgamma1 |
|
||||
+ model->BSIM3v1Slgamma1 * Inv_L |
|
||||
+ model->BSIM3v1Swgamma1 * Inv_W |
|
||||
+ model->BSIM3v1Spgamma1 * Inv_LW; |
|
||||
pParam->BSIM3v1Sgamma2 = model->BSIM3v1Sgamma2 |
|
||||
+ model->BSIM3v1Slgamma2 * Inv_L |
|
||||
+ model->BSIM3v1Swgamma2 * Inv_W |
|
||||
+ model->BSIM3v1Spgamma2 * Inv_LW; |
|
||||
pParam->BSIM3v1Svbx = model->BSIM3v1Svbx |
|
||||
+ model->BSIM3v1Slvbx * Inv_L |
|
||||
+ model->BSIM3v1Swvbx * Inv_W |
|
||||
+ model->BSIM3v1Spvbx * Inv_LW; |
|
||||
pParam->BSIM3v1Svbm = model->BSIM3v1Svbm |
|
||||
+ model->BSIM3v1Slvbm * Inv_L |
|
||||
+ model->BSIM3v1Swvbm * Inv_W |
|
||||
+ model->BSIM3v1Spvbm * Inv_LW; |
|
||||
pParam->BSIM3v1Sxt = model->BSIM3v1Sxt |
|
||||
+ model->BSIM3v1Slxt * Inv_L |
|
||||
+ model->BSIM3v1Swxt * Inv_W |
|
||||
+ model->BSIM3v1Spxt * Inv_LW; |
|
||||
pParam->BSIM3v1Sk1 = model->BSIM3v1Sk1 |
|
||||
+ model->BSIM3v1Slk1 * Inv_L |
|
||||
+ model->BSIM3v1Swk1 * Inv_W |
|
||||
+ model->BSIM3v1Spk1 * Inv_LW; |
|
||||
pParam->BSIM3v1Skt1 = model->BSIM3v1Skt1 |
|
||||
+ model->BSIM3v1Slkt1 * Inv_L |
|
||||
+ model->BSIM3v1Swkt1 * Inv_W |
|
||||
+ model->BSIM3v1Spkt1 * Inv_LW; |
|
||||
pParam->BSIM3v1Skt1l = model->BSIM3v1Skt1l |
|
||||
+ model->BSIM3v1Slkt1l * Inv_L |
|
||||
+ model->BSIM3v1Swkt1l * Inv_W |
|
||||
+ model->BSIM3v1Spkt1l * Inv_LW; |
|
||||
pParam->BSIM3v1Sk2 = model->BSIM3v1Sk2 |
|
||||
+ model->BSIM3v1Slk2 * Inv_L |
|
||||
+ model->BSIM3v1Swk2 * Inv_W |
|
||||
+ model->BSIM3v1Spk2 * Inv_LW; |
|
||||
pParam->BSIM3v1Skt2 = model->BSIM3v1Skt2 |
|
||||
+ model->BSIM3v1Slkt2 * Inv_L |
|
||||
+ model->BSIM3v1Swkt2 * Inv_W |
|
||||
+ model->BSIM3v1Spkt2 * Inv_LW; |
|
||||
pParam->BSIM3v1Sk3 = model->BSIM3v1Sk3 |
|
||||
+ model->BSIM3v1Slk3 * Inv_L |
|
||||
+ model->BSIM3v1Swk3 * Inv_W |
|
||||
+ model->BSIM3v1Spk3 * Inv_LW; |
|
||||
pParam->BSIM3v1Sk3b = model->BSIM3v1Sk3b |
|
||||
+ model->BSIM3v1Slk3b * Inv_L |
|
||||
+ model->BSIM3v1Swk3b * Inv_W |
|
||||
+ model->BSIM3v1Spk3b * Inv_LW; |
|
||||
pParam->BSIM3v1Sw0 = model->BSIM3v1Sw0 |
|
||||
+ model->BSIM3v1Slw0 * Inv_L |
|
||||
+ model->BSIM3v1Sww0 * Inv_W |
|
||||
+ model->BSIM3v1Spw0 * Inv_LW; |
|
||||
pParam->BSIM3v1Snlx = model->BSIM3v1Snlx |
|
||||
+ model->BSIM3v1Slnlx * Inv_L |
|
||||
+ model->BSIM3v1Swnlx * Inv_W |
|
||||
+ model->BSIM3v1Spnlx * Inv_LW; |
|
||||
pParam->BSIM3v1Sdvt0 = model->BSIM3v1Sdvt0 |
|
||||
+ model->BSIM3v1Sldvt0 * Inv_L |
|
||||
+ model->BSIM3v1Swdvt0 * Inv_W |
|
||||
+ model->BSIM3v1Spdvt0 * Inv_LW; |
|
||||
pParam->BSIM3v1Sdvt1 = model->BSIM3v1Sdvt1 |
|
||||
+ model->BSIM3v1Sldvt1 * Inv_L |
|
||||
+ model->BSIM3v1Swdvt1 * Inv_W |
|
||||
+ model->BSIM3v1Spdvt1 * Inv_LW; |
|
||||
pParam->BSIM3v1Sdvt2 = model->BSIM3v1Sdvt2 |
|
||||
+ model->BSIM3v1Sldvt2 * Inv_L |
|
||||
+ model->BSIM3v1Swdvt2 * Inv_W |
|
||||
+ model->BSIM3v1Spdvt2 * Inv_LW; |
|
||||
pParam->BSIM3v1Sdvt0w = model->BSIM3v1Sdvt0w |
|
||||
+ model->BSIM3v1Sldvt0w * Inv_L |
|
||||
+ model->BSIM3v1Swdvt0w * Inv_W |
|
||||
+ model->BSIM3v1Spdvt0w * Inv_LW; |
|
||||
pParam->BSIM3v1Sdvt1w = model->BSIM3v1Sdvt1w |
|
||||
+ model->BSIM3v1Sldvt1w * Inv_L |
|
||||
+ model->BSIM3v1Swdvt1w * Inv_W |
|
||||
+ model->BSIM3v1Spdvt1w * Inv_LW; |
|
||||
pParam->BSIM3v1Sdvt2w = model->BSIM3v1Sdvt2w |
|
||||
+ model->BSIM3v1Sldvt2w * Inv_L |
|
||||
+ model->BSIM3v1Swdvt2w * Inv_W |
|
||||
+ model->BSIM3v1Spdvt2w * Inv_LW; |
|
||||
pParam->BSIM3v1Sdrout = model->BSIM3v1Sdrout |
|
||||
+ model->BSIM3v1Sldrout * Inv_L |
|
||||
+ model->BSIM3v1Swdrout * Inv_W |
|
||||
+ model->BSIM3v1Spdrout * Inv_LW; |
|
||||
pParam->BSIM3v1Sdsub = model->BSIM3v1Sdsub |
|
||||
+ model->BSIM3v1Sldsub * Inv_L |
|
||||
+ model->BSIM3v1Swdsub * Inv_W |
|
||||
+ model->BSIM3v1Spdsub * Inv_LW; |
|
||||
pParam->BSIM3v1Svth0 = model->BSIM3v1Svth0 |
|
||||
+ model->BSIM3v1Slvth0 * Inv_L |
|
||||
+ model->BSIM3v1Swvth0 * Inv_W |
|
||||
+ model->BSIM3v1Spvth0 * Inv_LW; |
|
||||
pParam->BSIM3v1Sua = model->BSIM3v1Sua |
|
||||
+ model->BSIM3v1Slua * Inv_L |
|
||||
+ model->BSIM3v1Swua * Inv_W |
|
||||
+ model->BSIM3v1Spua * Inv_LW; |
|
||||
pParam->BSIM3v1Sua1 = model->BSIM3v1Sua1 |
|
||||
+ model->BSIM3v1Slua1 * Inv_L |
|
||||
+ model->BSIM3v1Swua1 * Inv_W |
|
||||
+ model->BSIM3v1Spua1 * Inv_LW; |
|
||||
pParam->BSIM3v1Sub = model->BSIM3v1Sub |
|
||||
+ model->BSIM3v1Slub * Inv_L |
|
||||
+ model->BSIM3v1Swub * Inv_W |
|
||||
+ model->BSIM3v1Spub * Inv_LW; |
|
||||
pParam->BSIM3v1Sub1 = model->BSIM3v1Sub1 |
|
||||
+ model->BSIM3v1Slub1 * Inv_L |
|
||||
+ model->BSIM3v1Swub1 * Inv_W |
|
||||
+ model->BSIM3v1Spub1 * Inv_LW; |
|
||||
pParam->BSIM3v1Suc = model->BSIM3v1Suc |
|
||||
+ model->BSIM3v1Sluc * Inv_L |
|
||||
+ model->BSIM3v1Swuc * Inv_W |
|
||||
+ model->BSIM3v1Spuc * Inv_LW; |
|
||||
pParam->BSIM3v1Suc1 = model->BSIM3v1Suc1 |
|
||||
+ model->BSIM3v1Sluc1 * Inv_L |
|
||||
+ model->BSIM3v1Swuc1 * Inv_W |
|
||||
+ model->BSIM3v1Spuc1 * Inv_LW; |
|
||||
pParam->BSIM3v1Su0 = model->BSIM3v1Su0 |
|
||||
+ model->BSIM3v1Slu0 * Inv_L |
|
||||
+ model->BSIM3v1Swu0 * Inv_W |
|
||||
+ model->BSIM3v1Spu0 * Inv_LW; |
|
||||
pParam->BSIM3v1Sute = model->BSIM3v1Sute |
|
||||
+ model->BSIM3v1Slute * Inv_L |
|
||||
+ model->BSIM3v1Swute * Inv_W |
|
||||
+ model->BSIM3v1Spute * Inv_LW; |
|
||||
pParam->BSIM3v1Svoff = model->BSIM3v1Svoff |
|
||||
+ model->BSIM3v1Slvoff * Inv_L |
|
||||
+ model->BSIM3v1Swvoff * Inv_W |
|
||||
+ model->BSIM3v1Spvoff * Inv_LW; |
|
||||
pParam->BSIM3v1Sdelta = model->BSIM3v1Sdelta |
|
||||
+ model->BSIM3v1Sldelta * Inv_L |
|
||||
+ model->BSIM3v1Swdelta * Inv_W |
|
||||
+ model->BSIM3v1Spdelta * Inv_LW; |
|
||||
pParam->BSIM3v1Srdsw = model->BSIM3v1Srdsw |
|
||||
+ model->BSIM3v1Slrdsw * Inv_L |
|
||||
+ model->BSIM3v1Swrdsw * Inv_W |
|
||||
+ model->BSIM3v1Sprdsw * Inv_LW; |
|
||||
pParam->BSIM3v1Sprwg = model->BSIM3v1Sprwg |
|
||||
+ model->BSIM3v1Slprwg * Inv_L |
|
||||
+ model->BSIM3v1Swprwg * Inv_W |
|
||||
+ model->BSIM3v1Spprwg * Inv_LW; |
|
||||
pParam->BSIM3v1Sprwb = model->BSIM3v1Sprwb |
|
||||
+ model->BSIM3v1Slprwb * Inv_L |
|
||||
+ model->BSIM3v1Swprwb * Inv_W |
|
||||
+ model->BSIM3v1Spprwb * Inv_LW; |
|
||||
pParam->BSIM3v1Sprt = model->BSIM3v1Sprt |
|
||||
+ model->BSIM3v1Slprt * Inv_L |
|
||||
+ model->BSIM3v1Swprt * Inv_W |
|
||||
+ model->BSIM3v1Spprt * Inv_LW; |
|
||||
pParam->BSIM3v1Seta0 = model->BSIM3v1Seta0 |
|
||||
+ model->BSIM3v1Sleta0 * Inv_L |
|
||||
+ model->BSIM3v1Sweta0 * Inv_W |
|
||||
+ model->BSIM3v1Speta0 * Inv_LW; |
|
||||
pParam->BSIM3v1Setab = model->BSIM3v1Setab |
|
||||
+ model->BSIM3v1Sletab * Inv_L |
|
||||
+ model->BSIM3v1Swetab * Inv_W |
|
||||
+ model->BSIM3v1Spetab * Inv_LW; |
|
||||
pParam->BSIM3v1Spclm = model->BSIM3v1Spclm |
|
||||
+ model->BSIM3v1Slpclm * Inv_L |
|
||||
+ model->BSIM3v1Swpclm * Inv_W |
|
||||
+ model->BSIM3v1Sppclm * Inv_LW; |
|
||||
pParam->BSIM3v1Spdibl1 = model->BSIM3v1Spdibl1 |
|
||||
+ model->BSIM3v1Slpdibl1 * Inv_L |
|
||||
+ model->BSIM3v1Swpdibl1 * Inv_W |
|
||||
+ model->BSIM3v1Sppdibl1 * Inv_LW; |
|
||||
pParam->BSIM3v1Spdibl2 = model->BSIM3v1Spdibl2 |
|
||||
+ model->BSIM3v1Slpdibl2 * Inv_L |
|
||||
+ model->BSIM3v1Swpdibl2 * Inv_W |
|
||||
+ model->BSIM3v1Sppdibl2 * Inv_LW; |
|
||||
pParam->BSIM3v1Spdiblb = model->BSIM3v1Spdiblb |
|
||||
+ model->BSIM3v1Slpdiblb * Inv_L |
|
||||
+ model->BSIM3v1Swpdiblb * Inv_W |
|
||||
+ model->BSIM3v1Sppdiblb * Inv_LW; |
|
||||
pParam->BSIM3v1Spscbe1 = model->BSIM3v1Spscbe1 |
|
||||
+ model->BSIM3v1Slpscbe1 * Inv_L |
|
||||
+ model->BSIM3v1Swpscbe1 * Inv_W |
|
||||
+ model->BSIM3v1Sppscbe1 * Inv_LW; |
|
||||
pParam->BSIM3v1Spscbe2 = model->BSIM3v1Spscbe2 |
|
||||
+ model->BSIM3v1Slpscbe2 * Inv_L |
|
||||
+ model->BSIM3v1Swpscbe2 * Inv_W |
|
||||
+ model->BSIM3v1Sppscbe2 * Inv_LW; |
|
||||
pParam->BSIM3v1Spvag = model->BSIM3v1Spvag |
|
||||
+ model->BSIM3v1Slpvag * Inv_L |
|
||||
+ model->BSIM3v1Swpvag * Inv_W |
|
||||
+ model->BSIM3v1Sppvag * Inv_LW; |
|
||||
pParam->BSIM3v1Swr = model->BSIM3v1Swr |
|
||||
+ model->BSIM3v1Slwr * Inv_L |
|
||||
+ model->BSIM3v1Swwr * Inv_W |
|
||||
+ model->BSIM3v1Spwr * Inv_LW; |
|
||||
pParam->BSIM3v1Sdwg = model->BSIM3v1Sdwg |
|
||||
+ model->BSIM3v1Sldwg * Inv_L |
|
||||
+ model->BSIM3v1Swdwg * Inv_W |
|
||||
+ model->BSIM3v1Spdwg * Inv_LW; |
|
||||
pParam->BSIM3v1Sdwb = model->BSIM3v1Sdwb |
|
||||
+ model->BSIM3v1Sldwb * Inv_L |
|
||||
+ model->BSIM3v1Swdwb * Inv_W |
|
||||
+ model->BSIM3v1Spdwb * Inv_LW; |
|
||||
pParam->BSIM3v1Sb0 = model->BSIM3v1Sb0 |
|
||||
+ model->BSIM3v1Slb0 * Inv_L |
|
||||
+ model->BSIM3v1Swb0 * Inv_W |
|
||||
+ model->BSIM3v1Spb0 * Inv_LW; |
|
||||
pParam->BSIM3v1Sb1 = model->BSIM3v1Sb1 |
|
||||
+ model->BSIM3v1Slb1 * Inv_L |
|
||||
+ model->BSIM3v1Swb1 * Inv_W |
|
||||
+ model->BSIM3v1Spb1 * Inv_LW; |
|
||||
pParam->BSIM3v1Salpha0 = model->BSIM3v1Salpha0 |
|
||||
+ model->BSIM3v1Slalpha0 * Inv_L |
|
||||
+ model->BSIM3v1Swalpha0 * Inv_W |
|
||||
+ model->BSIM3v1Spalpha0 * Inv_LW; |
|
||||
pParam->BSIM3v1Sbeta0 = model->BSIM3v1Sbeta0 |
|
||||
+ model->BSIM3v1Slbeta0 * Inv_L |
|
||||
+ model->BSIM3v1Swbeta0 * Inv_W |
|
||||
+ model->BSIM3v1Spbeta0 * Inv_LW; |
|
||||
/* CV model */ |
|
||||
pParam->BSIM3v1Selm = model->BSIM3v1Selm |
|
||||
+ model->BSIM3v1Slelm * Inv_L |
|
||||
+ model->BSIM3v1Swelm * Inv_W |
|
||||
+ model->BSIM3v1Spelm * Inv_LW; |
|
||||
pParam->BSIM3v1Scgsl = model->BSIM3v1Scgsl |
|
||||
+ model->BSIM3v1Slcgsl * Inv_L |
|
||||
+ model->BSIM3v1Swcgsl * Inv_W |
|
||||
+ model->BSIM3v1Spcgsl * Inv_LW; |
|
||||
pParam->BSIM3v1Scgdl = model->BSIM3v1Scgdl |
|
||||
+ model->BSIM3v1Slcgdl * Inv_L |
|
||||
+ model->BSIM3v1Swcgdl * Inv_W |
|
||||
+ model->BSIM3v1Spcgdl * Inv_LW; |
|
||||
pParam->BSIM3v1Sckappa = model->BSIM3v1Sckappa |
|
||||
+ model->BSIM3v1Slckappa * Inv_L |
|
||||
+ model->BSIM3v1Swckappa * Inv_W |
|
||||
+ model->BSIM3v1Spckappa * Inv_LW; |
|
||||
pParam->BSIM3v1Scf = model->BSIM3v1Scf |
|
||||
+ model->BSIM3v1Slcf * Inv_L |
|
||||
+ model->BSIM3v1Swcf * Inv_W |
|
||||
+ model->BSIM3v1Spcf * Inv_LW; |
|
||||
pParam->BSIM3v1Sclc = model->BSIM3v1Sclc |
|
||||
+ model->BSIM3v1Slclc * Inv_L |
|
||||
+ model->BSIM3v1Swclc * Inv_W |
|
||||
+ model->BSIM3v1Spclc * Inv_LW; |
|
||||
pParam->BSIM3v1Scle = model->BSIM3v1Scle |
|
||||
+ model->BSIM3v1Slcle * Inv_L |
|
||||
+ model->BSIM3v1Swcle * Inv_W |
|
||||
+ model->BSIM3v1Spcle * Inv_LW; |
|
||||
pParam->BSIM3v1Svfbcv = model->BSIM3v1Svfbcv |
|
||||
+ model->BSIM3v1Slvfbcv * Inv_L |
|
||||
+ model->BSIM3v1Swvfbcv * Inv_W |
|
||||
+ model->BSIM3v1Spvfbcv * Inv_LW; |
|
||||
pParam->BSIM3v1SabulkCVfactor = 1.0 + pow((pParam->BSIM3v1Sclc |
|
||||
/ pParam->BSIM3v1Sleff), |
|
||||
pParam->BSIM3v1Scle); |
|
||||
|
|
||||
T0 = (TRatio - 1.0); |
|
||||
pParam->BSIM3v1Sua = pParam->BSIM3v1Sua + pParam->BSIM3v1Sua1 * T0; |
|
||||
pParam->BSIM3v1Sub = pParam->BSIM3v1Sub + pParam->BSIM3v1Sub1 * T0; |
|
||||
pParam->BSIM3v1Suc = pParam->BSIM3v1Suc + pParam->BSIM3v1Suc1 * T0; |
|
||||
if (pParam->BSIM3v1Su0 > 1.0) |
|
||||
pParam->BSIM3v1Su0 = pParam->BSIM3v1Su0 / 1.0e4; |
|
||||
|
|
||||
pParam->BSIM3v1Su0temp = pParam->BSIM3v1Su0 |
|
||||
* pow(TRatio, pParam->BSIM3v1Sute); |
|
||||
pParam->BSIM3v1Svsattemp = pParam->BSIM3v1Svsat - pParam->BSIM3v1Sat |
|
||||
* T0; |
|
||||
pParam->BSIM3v1Srds0 = (pParam->BSIM3v1Srdsw + pParam->BSIM3v1Sprt * T0) |
|
||||
/ pow(pParam->BSIM3v1Sweff * 1E6, pParam->BSIM3v1Swr); |
|
||||
|
|
||||
if (BSIM3v1ScheckModel(model, here, ckt)) |
|
||||
{ IFuid namarray[2]; |
|
||||
namarray[0] = model->BSIM3v1SmodName; |
|
||||
namarray[1] = here->BSIM3v1Sname; |
|
||||
(*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM3v1SV3 parameter checking for %s in model %s", namarray); |
|
||||
return(E_BADPARM); |
|
||||
} |
|
||||
|
|
||||
pParam->BSIM3v1Scgdo = (model->BSIM3v1Scgdo + pParam->BSIM3v1Scf) |
|
||||
* pParam->BSIM3v1SweffCV; |
|
||||
pParam->BSIM3v1Scgso = (model->BSIM3v1Scgso + pParam->BSIM3v1Scf) |
|
||||
* pParam->BSIM3v1SweffCV; |
|
||||
pParam->BSIM3v1Scgbo = model->BSIM3v1Scgbo * pParam->BSIM3v1SleffCV; |
|
||||
|
|
||||
if (!model->BSIM3v1SnpeakGiven && model->BSIM3v1Sgamma1Given) |
|
||||
{ T0 = pParam->BSIM3v1Sgamma1 * model->BSIM3v1Scox; |
|
||||
pParam->BSIM3v1Snpeak = 3.021E22 * T0 * T0; |
|
||||
} |
|
||||
|
|
||||
pParam->BSIM3v1Sphi = 2.0 * Vtm0 |
|
||||
* log(pParam->BSIM3v1Snpeak / ni); |
|
||||
|
|
||||
pParam->BSIM3v1SsqrtPhi = sqrt(pParam->BSIM3v1Sphi); |
|
||||
pParam->BSIM3v1Sphis3 = pParam->BSIM3v1SsqrtPhi * pParam->BSIM3v1Sphi; |
|
||||
|
|
||||
pParam->BSIM3v1SXdep0 = sqrt(2.0 * EPSSI / (Charge_q |
|
||||
* pParam->BSIM3v1Snpeak * 1.0e6)) |
|
||||
* pParam->BSIM3v1SsqrtPhi; |
|
||||
pParam->BSIM3v1SsqrtXdep0 = sqrt(pParam->BSIM3v1SXdep0); |
|
||||
pParam->BSIM3v1Slitl = sqrt(3.0 * pParam->BSIM3v1Sxj |
|
||||
* model->BSIM3v1Stox); |
|
||||
pParam->BSIM3v1Svbi = Vtm0 * log(1.0e20 |
|
||||
* pParam->BSIM3v1Snpeak / (ni * ni)); |
|
||||
pParam->BSIM3v1Scdep0 = sqrt(Charge_q * EPSSI |
|
||||
* pParam->BSIM3v1Snpeak * 1.0e6 / 2.0 |
|
||||
/ pParam->BSIM3v1Sphi); |
|
||||
|
|
||||
if (model->BSIM3v1Sk1Given || model->BSIM3v1Sk2Given) |
|
||||
{ if (!model->BSIM3v1Sk1Given) |
|
||||
{ fprintf(stdout, "Warning: k1 should be specified with k2.\n"); |
|
||||
pParam->BSIM3v1Sk1 = 0.53; |
|
||||
} |
|
||||
if (!model->BSIM3v1Sk2Given) |
|
||||
{ fprintf(stdout, "Warning: k2 should be specified with k1.\n"); |
|
||||
pParam->BSIM3v1Sk2 = -0.0186; |
|
||||
} |
|
||||
if (model->BSIM3v1SnsubGiven) |
|
||||
fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); |
|
||||
if (model->BSIM3v1SxtGiven) |
|
||||
fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); |
|
||||
if (model->BSIM3v1SvbxGiven) |
|
||||
fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); |
|
||||
if (model->BSIM3v1SvbmGiven) |
|
||||
fprintf(stdout, "Warning: vbm is ignored because k1 or k2 is given.\n"); |
|
||||
if (model->BSIM3v1Sgamma1Given) |
|
||||
fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); |
|
||||
if (model->BSIM3v1Sgamma2Given) |
|
||||
fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); |
|
||||
} |
|
||||
else |
|
||||
{ if (!model->BSIM3v1SvbxGiven) |
|
||||
pParam->BSIM3v1Svbx = pParam->BSIM3v1Sphi - 7.7348e-4 |
|
||||
* pParam->BSIM3v1Snpeak |
|
||||
* pParam->BSIM3v1Sxt * pParam->BSIM3v1Sxt; |
|
||||
if (pParam->BSIM3v1Svbx > 0.0) |
|
||||
pParam->BSIM3v1Svbx = -pParam->BSIM3v1Svbx; |
|
||||
if (pParam->BSIM3v1Svbm > 0.0) |
|
||||
pParam->BSIM3v1Svbm = -pParam->BSIM3v1Svbm; |
|
||||
|
|
||||
if (!model->BSIM3v1Sgamma1Given) |
|
||||
pParam->BSIM3v1Sgamma1 = 5.753e-12 |
|
||||
* sqrt(pParam->BSIM3v1Snpeak) |
|
||||
/ model->BSIM3v1Scox; |
|
||||
if (!model->BSIM3v1Sgamma2Given) |
|
||||
pParam->BSIM3v1Sgamma2 = 5.753e-12 |
|
||||
* sqrt(pParam->BSIM3v1Snsub) |
|
||||
/ model->BSIM3v1Scox; |
|
||||
|
|
||||
T0 = pParam->BSIM3v1Sgamma1 - pParam->BSIM3v1Sgamma2; |
|
||||
T1 = sqrt(pParam->BSIM3v1Sphi - pParam->BSIM3v1Svbx) |
|
||||
- pParam->BSIM3v1SsqrtPhi; |
|
||||
T2 = sqrt(pParam->BSIM3v1Sphi * (pParam->BSIM3v1Sphi |
|
||||
- pParam->BSIM3v1Svbm)) - pParam->BSIM3v1Sphi; |
|
||||
pParam->BSIM3v1Sk2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v1Svbm); |
|
||||
pParam->BSIM3v1Sk1 = pParam->BSIM3v1Sgamma2 - 2.0 |
|
||||
* pParam->BSIM3v1Sk2 * sqrt(pParam->BSIM3v1Sphi |
|
||||
- pParam->BSIM3v1Svbm); |
|
||||
} |
|
||||
|
|
||||
if (pParam->BSIM3v1Sk2 < 0.0) |
|
||||
{ T0 = 0.5 * pParam->BSIM3v1Sk1 / pParam->BSIM3v1Sk2; |
|
||||
pParam->BSIM3v1Svbsc = 0.9 * (pParam->BSIM3v1Sphi - T0 * T0); |
|
||||
if (pParam->BSIM3v1Svbsc > -3.0) |
|
||||
pParam->BSIM3v1Svbsc = -3.0; |
|
||||
else if (pParam->BSIM3v1Svbsc < -30.0) |
|
||||
pParam->BSIM3v1Svbsc = -30.0; |
|
||||
} |
|
||||
else |
|
||||
{ pParam->BSIM3v1Svbsc = -30.0; |
|
||||
} |
|
||||
if (pParam->BSIM3v1Svbsc > pParam->BSIM3v1Svbm) |
|
||||
pParam->BSIM3v1Svbsc = pParam->BSIM3v1Svbm; |
|
||||
|
|
||||
if (model->BSIM3v1Svth0Given) |
|
||||
{ pParam->BSIM3v1Svfb = model->BSIM3v1Stype * pParam->BSIM3v1Svth0 |
|
||||
- pParam->BSIM3v1Sphi - pParam->BSIM3v1Sk1 |
|
||||
* pParam->BSIM3v1SsqrtPhi; |
|
||||
} |
|
||||
else |
|
||||
{ pParam->BSIM3v1Svfb = -1.0; |
|
||||
pParam->BSIM3v1Svth0 = model->BSIM3v1Stype * (pParam->BSIM3v1Svfb |
|
||||
+ pParam->BSIM3v1Sphi + pParam->BSIM3v1Sk1 |
|
||||
* pParam->BSIM3v1SsqrtPhi); |
|
||||
} |
|
||||
T1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Stox |
|
||||
* pParam->BSIM3v1SXdep0); |
|
||||
T0 = exp(-0.5 * pParam->BSIM3v1Sdsub * pParam->BSIM3v1Sleff / T1); |
|
||||
pParam->BSIM3v1Stheta0vb0 = (T0 + 2.0 * T0 * T0); |
|
||||
|
|
||||
T0 = exp(-0.5 * pParam->BSIM3v1Sdrout * pParam->BSIM3v1Sleff / T1); |
|
||||
T2 = (T0 + 2.0 * T0 * T0); |
|
||||
pParam->BSIM3v1SthetaRout = pParam->BSIM3v1Spdibl1 * T2 |
|
||||
+ pParam->BSIM3v1Spdibl2; |
|
||||
} |
|
||||
|
|
||||
/* process source/drain series resistance */ |
|
||||
here->BSIM3v1SdrainConductance = model->BSIM3v1SsheetResistance |
|
||||
* here->BSIM3v1SdrainSquares; |
|
||||
if (here->BSIM3v1SdrainConductance > 0.0) |
|
||||
here->BSIM3v1SdrainConductance = 1.0 |
|
||||
/ here->BSIM3v1SdrainConductance; |
|
||||
else |
|
||||
here->BSIM3v1SdrainConductance = 0.0; |
|
||||
|
|
||||
here->BSIM3v1SsourceConductance = model->BSIM3v1SsheetResistance |
|
||||
* here->BSIM3v1SsourceSquares; |
|
||||
if (here->BSIM3v1SsourceConductance > 0.0) |
|
||||
here->BSIM3v1SsourceConductance = 1.0 |
|
||||
/ here->BSIM3v1SsourceConductance; |
|
||||
else |
|
||||
here->BSIM3v1SsourceConductance = 0.0; |
|
||||
here->BSIM3v1Scgso = pParam->BSIM3v1Scgso; |
|
||||
here->BSIM3v1Scgdo = pParam->BSIM3v1Scgdo; |
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
@ -1,49 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1995 Min-Chie Jeng and Mansun Chan. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: b3v1strunc.c |
|
||||
**********/ |
|
||||
|
|
||||
#include "ngspice.h" |
|
||||
#include "cktdefs.h" |
|
||||
#include "bsim3v1sdef.h" |
|
||||
#include "sperror.h" |
|
||||
#include "suffix.h" |
|
||||
|
|
||||
|
|
||||
int |
|
||||
BSIM3v1Strunc(GENmodel *inModel, CKTcircuit *ckt, double *timeStep) |
|
||||
{ |
|
||||
BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; |
|
||||
BSIM3v1Sinstance *here; |
|
||||
|
|
||||
#ifdef STEPDEBUG |
|
||||
double debugtemp; |
|
||||
#endif /* STEPDEBUG */ |
|
||||
|
|
||||
for (; model != NULL; model = model->BSIM3v1SnextModel) |
|
||||
{ for (here = model->BSIM3v1Sinstances; here != NULL; |
|
||||
here = here->BSIM3v1SnextInstance) |
|
||||
{ |
|
||||
|
|
||||
if (here->BSIM3v1Sowner != ARCHme) |
|
||||
continue; |
|
||||
|
|
||||
#ifdef STEPDEBUG |
|
||||
debugtemp = *timeStep; |
|
||||
#endif /* STEPDEBUG */ |
|
||||
CKTterr(here->BSIM3v1Sqb,ckt,timeStep); |
|
||||
CKTterr(here->BSIM3v1Sqg,ckt,timeStep); |
|
||||
CKTterr(here->BSIM3v1Sqd,ckt,timeStep); |
|
||||
#ifdef STEPDEBUG |
|
||||
if(debugtemp != *timeStep) |
|
||||
{ printf("device %s reduces step from %g to %g\n", |
|
||||
here->BSIM3v1Sname,debugtemp,*timeStep); |
|
||||
} |
|
||||
#endif /* STEPDEBUG */ |
|
||||
|
|
||||
} |
|
||||
} |
|
||||
return(OK); |
|
||||
} |
|
||||
1629
src/spicelib/devices/bsim3v1s/bsim3v1sdef.h
File diff suppressed because it is too large
View File
File diff suppressed because it is too large
View File
@ -1,30 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1991 JianHui Huang and Min-Chie Jeng. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: bsim3v1sext.h |
|
||||
**********/ |
|
||||
|
|
||||
extern int BSIM3v1SacLoad(GENmodel *,CKTcircuit*); |
|
||||
extern int BSIM3v1Sask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); |
|
||||
extern int BSIM3v1SconvTest(GENmodel *,CKTcircuit*); |
|
||||
extern int BSIM3v1Sdelete(GENmodel*,IFuid,GENinstance**); |
|
||||
extern void BSIM3v1Sdestroy(GENmodel**); |
|
||||
extern int BSIM3v1Sgetic(GENmodel*,CKTcircuit*); |
|
||||
extern int BSIM3v1Sload(GENmodel*,CKTcircuit*); |
|
||||
extern int BSIM3v1SmAsk(CKTcircuit*,GENmodel *,int, IFvalue*); |
|
||||
extern int BSIM3v1SmDelete(GENmodel**,IFuid,GENmodel*); |
|
||||
extern int BSIM3v1SmParam(int,IFvalue*,GENmodel*); |
|
||||
extern void BSIM3v1SmosCap(CKTcircuit*, double, double, double, double, |
|
||||
double, double, double, double, double, double, double, |
|
||||
double, double, double, double, double, double, double*, |
|
||||
double*, double*, double*, double*, double*, double*, double*, |
|
||||
double*, double*, double*, double*, double*, double*, double*, |
|
||||
double*); |
|
||||
extern int BSIM3v1Sparam(int,IFvalue*,GENinstance*,IFvalue*); |
|
||||
extern int BSIM3v1SpzLoad(GENmodel*,CKTcircuit*,SPcomplex*); |
|
||||
extern int BSIM3v1Ssetup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); |
|
||||
extern int BSIM3v1Stemp(GENmodel*,CKTcircuit*); |
|
||||
extern int BSIM3v1Strunc(GENmodel*,CKTcircuit*,double*); |
|
||||
extern int BSIM3v1Snoise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*); |
|
||||
extern int BSIM3v1Sunsetup(GENmodel *, CKTcircuit *); |
|
||||
@ -1,89 +0,0 @@ |
|||||
#include "config.h" |
|
||||
|
|
||||
#include "devdefs.h" |
|
||||
|
|
||||
#include "bsim3v1sitf.h" |
|
||||
#include "bsim3v1sext.h" |
|
||||
#include "bsim3v1sinit.h" |
|
||||
|
|
||||
|
|
||||
SPICEdev BSIM3v1Sinfo = { |
|
||||
{ |
|
||||
"BSIM3v1S", |
|
||||
"Berkeley Short Channel IGFET Model Version-3 (3.1 Serban)", |
|
||||
|
|
||||
&BSIM3v1SnSize, |
|
||||
&BSIM3v1SnSize, |
|
||||
BSIM3v1Snames, |
|
||||
|
|
||||
&BSIM3v1SpTSize, |
|
||||
BSIM3v1SpTable, |
|
||||
|
|
||||
&BSIM3v1SmPTSize, |
|
||||
BSIM3v1SmPTable, |
|
||||
|
|
||||
#ifdef XSPICE |
|
||||
/* |
|
||||
* OH what a hack this is!!! I have no idea what the proper values |
|
||||
* should be so I am just going to zero it out! This is a heck of a |
|
||||
* lot better than what existed perviously which was to convert |
|
||||
* DEV_DEFAULT to a function pointer. Would have started executing |
|
||||
* data at that point. Gotta love it!!! |
|
||||
*/ |
|
||||
NULL, |
|
||||
|
|
||||
0, |
|
||||
NULL, |
|
||||
|
|
||||
0, |
|
||||
NULL, |
|
||||
|
|
||||
0, |
|
||||
NULL, |
|
||||
#endif |
|
||||
|
|
||||
DEV_DEFAULT, |
|
||||
}, |
|
||||
|
|
||||
/* DEVparam */ BSIM3v1Sparam, |
|
||||
/* DEVmodParam */ BSIM3v1SmParam, |
|
||||
/* DEVload */ BSIM3v1Sload, |
|
||||
/* DEVsetup */ BSIM3v1Ssetup, |
|
||||
/* DEVunsetup */ BSIM3v1Sunsetup, |
|
||||
/* DEVpzSetup */ BSIM3v1Ssetup, |
|
||||
/* DEVtemperature*/ BSIM3v1Stemp, |
|
||||
/* DEVtrunc */ BSIM3v1Strunc, |
|
||||
/* DEVfindBranch */ NULL, |
|
||||
/* DEVacLoad */ BSIM3v1SacLoad, |
|
||||
/* DEVaccept */ NULL, |
|
||||
/* DEVdestroy */ BSIM3v1Sdestroy, |
|
||||
/* DEVmodDelete */ BSIM3v1SmDelete, |
|
||||
/* DEVdelete */ BSIM3v1Sdelete, |
|
||||
/* DEVsetic */ BSIM3v1Sgetic, |
|
||||
/* DEVask */ BSIM3v1Sask, |
|
||||
/* DEVmodAsk */ BSIM3v1SmAsk, |
|
||||
/* DEVpzLoad */ BSIM3v1SpzLoad, |
|
||||
/* DEVconvTest */ BSIM3v1SconvTest, |
|
||||
/* DEVsenSetup */ NULL, |
|
||||
/* DEVsenLoad */ NULL, |
|
||||
/* DEVsenUpdate */ NULL, |
|
||||
/* DEVsenAcLoad */ NULL, |
|
||||
/* DEVsenPrint */ NULL, |
|
||||
/* DEVsenTrunc */ NULL, |
|
||||
/* DEVdisto */ NULL, |
|
||||
/* DEVnoise */ BSIM3v1Snoise, |
|
||||
#ifdef CIDER |
|
||||
/* DEVdump */ NULL, |
|
||||
/* DEVacct */ NULL, |
|
||||
#endif |
|
||||
/* DEVinstSize */ &BSIM3v1SiSize, |
|
||||
/* DEVmodSize */ &BSIM3v1SmSize |
|
||||
|
|
||||
}; |
|
||||
|
|
||||
|
|
||||
SPICEdev * |
|
||||
get_bsim3v1s_info(void) |
|
||||
{ |
|
||||
return &BSIM3v1Sinfo; |
|
||||
} |
|
||||
@ -1,13 +0,0 @@ |
|||||
#ifndef _BSIM3v1SINIT_H |
|
||||
#define _BSIM3v1SINIT_H |
|
||||
|
|
||||
extern IFparm BSIM3v1SpTable[ ]; |
|
||||
extern IFparm BSIM3v1SmPTable[ ]; |
|
||||
extern char *BSIM3v1Snames[ ]; |
|
||||
extern int BSIM3v1SpTSize; |
|
||||
extern int BSIM3v1SmPTSize; |
|
||||
extern int BSIM3v1SnSize; |
|
||||
extern int BSIM3v1SiSize; |
|
||||
extern int BSIM3v1SmSize; |
|
||||
|
|
||||
#endif |
|
||||
@ -1,12 +0,0 @@ |
|||||
/********** |
|
||||
Copyright 1990 Regents of the University of California. All rights reserved. |
|
||||
Author: 1991 JianHui Huang and Min-Chie Jeng. |
|
||||
Modified by Paolo Nenzi 2002 |
|
||||
File: bsim3v1sitf.h |
|
||||
**********/ |
|
||||
#ifndef DEV_BSIM3v1S |
|
||||
#define DEV_BSIM3v1S |
|
||||
|
|
||||
SPICEdev *get_bsim3v1s_info(void); |
|
||||
|
|
||||
#endif |
|
||||
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