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devices/bsim4v4, remove ancient bsim4 model version 4.4

pre-master-46
dwarning 12 years ago
committed by rlar
parent
9736b0fe2b
commit
cba69c4850
38 changed files with 3 additions and 22482 deletions
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  1. 1
      configure.ac
  2. 1
      src/Makefile.am
  3. 2
      src/spicelib/devices/Makefile.am
  4. 33
      src/spicelib/devices/bsim4v4/B4TERMS_OF_USE
  5. 38
      src/spicelib/devices/bsim4v4/Makefile.am
  6. 819
      src/spicelib/devices/bsim4v4/b4v4.c
  7. 672
      src/spicelib/devices/bsim4v4/b4v4acld.c
  8. 369
      src/spicelib/devices/bsim4v4/b4v4ask.c
  9. 1037
      src/spicelib/devices/bsim4v4/b4v4check.c
  10. 198
      src/spicelib/devices/bsim4v4/b4v4cvtest.c
  11. 41
      src/spicelib/devices/bsim4v4/b4v4del.c
  12. 38
      src/spicelib/devices/bsim4v4/b4v4dest.c
  13. 397
      src/spicelib/devices/bsim4v4/b4v4geo.c
  14. 43
      src/spicelib/devices/bsim4v4/b4v4getic.c
  15. 5214
      src/spicelib/devices/bsim4v4/b4v4ld.c
  16. 1970
      src/spicelib/devices/bsim4v4/b4v4mask.c
  17. 46
      src/spicelib/devices/bsim4v4/b4v4mdel.c
  18. 2802
      src/spicelib/devices/bsim4v4/b4v4mpar.c
  19. 550
      src/spicelib/devices/bsim4v4/b4v4noi.c
  20. 173
      src/spicelib/devices/bsim4v4/b4v4par.c
  21. 758
      src/spicelib/devices/bsim4v4/b4v4pzld.c
  22. 1979
      src/spicelib/devices/bsim4v4/b4v4set.c
  23. 1826
      src/spicelib/devices/bsim4v4/b4v4temp.c
  24. 57
      src/spicelib/devices/bsim4v4/b4v4trunc.c
  25. 2929
      src/spicelib/devices/bsim4v4/bsim4v4def.h
  26. 33
      src/spicelib/devices/bsim4v4/bsim4v4ext.h
  27. 84
      src/spicelib/devices/bsim4v4/bsim4v4init.c
  28. 13
      src/spicelib/devices/bsim4v4/bsim4v4init.h
  29. 13
      src/spicelib/devices/bsim4v4/bsim4v4itf.h
  30. 6
      src/spicelib/devices/dev.c
  31. 1
      src/spicelib/parser/inp2m.c
  32. 5
      src/spicelib/parser/inpdomod.c
  33. 1
      src/spicelib/parser/inpgmod.c
  34. 96
      visualc-shared/sharedspice.vcproj
  35. 96
      visualc/vngspice.vcproj
  36. 24
      visualc/vngspice.vcxproj
  37. 96
      visualc/vngspice_fftw.vcproj
  38. 24
      visualc/vngspice_fftw_vc10.vcxproj

1
configure.ac
View File

@ -1078,7 +1078,6 @@ AC_CONFIG_FILES([Makefile
src/spicelib/devices/bsim3v1/Makefile src/spicelib/devices/bsim3v1/Makefile
src/spicelib/devices/bsim3v32/Makefile src/spicelib/devices/bsim3v32/Makefile
src/spicelib/devices/bsim4/Makefile src/spicelib/devices/bsim4/Makefile
src/spicelib/devices/bsim4v4/Makefile
src/spicelib/devices/bsim4v5/Makefile src/spicelib/devices/bsim4v5/Makefile
src/spicelib/devices/bsim4v6/Makefile src/spicelib/devices/bsim4v6/Makefile
src/spicelib/devices/bsim3soi_pd/Makefile src/spicelib/devices/bsim3soi_pd/Makefile

1
src/Makefile.am
View File

@ -53,7 +53,6 @@ DYNAMIC_DEVICELIBS = \
spicelib/devices/bsim3v1/libbsim3v1.la \ spicelib/devices/bsim3v1/libbsim3v1.la \
spicelib/devices/bsim3v32/libbsim3v32.la \ spicelib/devices/bsim3v32/libbsim3v32.la \
spicelib/devices/bsim4/libbsim4.la \ spicelib/devices/bsim4/libbsim4.la \
spicelib/devices/bsim4v4/libbsim4v4.la \
spicelib/devices/bsim4v5/libbsim4v5.la \ spicelib/devices/bsim4v5/libbsim4v5.la \
spicelib/devices/bsim4v6/libbsim4v6.la \ spicelib/devices/bsim4v6/libbsim4v6.la \
spicelib/devices/cap/libcap.la \ spicelib/devices/cap/libcap.la \

2
src/spicelib/devices/Makefile.am
View File

@ -8,7 +8,6 @@ SUBDIRS = \
bsim3 \ bsim3 \
bsimsoi \ bsimsoi \
bsim4 \ bsim4 \
bsim4v4 \
bsim4v5 \ bsim4v5 \
bsim4v6 \ bsim4v6 \
bsim3v0 \ bsim3v0 \
@ -68,7 +67,6 @@ DIST_SUBDIRS = \
bsim3 \ bsim3 \
bsimsoi \ bsimsoi \
bsim4 \ bsim4 \
bsim4v4 \
bsim4v5 \ bsim4v5 \
bsim4v6 \ bsim4v6 \
bsim3v0 \ bsim3v0 \

33
src/spicelib/devices/bsim4v4/B4TERMS_OF_USE
View File

@ -1,33 +0,0 @@
The terms under which the software is provided are as the following.
Software is distributed as is, completely without warranty or service
support. The University of California and its employees are not liable
for the condition or performance of the software.
The University owns the copyright but shall not be liable for any
infringement of copyright or other proprietary rights brought by third
parties against the users of the software.
The University of California hereby disclaims all implied warranties.
The University of California grants the users the right to modify, copy,
and redistribute the software and documentation, both within the user's
organization and externally, subject to the following restrictions:
1. The users agree not to charge for the University of California code
itself but may charge for additions, extensions, or support.
2. In any product based on the software, the users agree to acknowledge
the UC Berkeley BSIM Research Group that developed the software. This
acknowledgment shall appear in the product documentation.
3. The users agree to obey all U.S. Government restrictions governing
redistribution or export of the software.
4. The users agree to reproduce any copyright notice which appears on
the software on any copy or modification of such made available
to others.
Chenming Hu, and Jane Xuemei Xi
April. 2003

38
src/spicelib/devices/bsim4v4/Makefile.am
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@ -1,38 +0,0 @@
## Process this file with automake to produce Makefile.in
noinst_LTLIBRARIES = libbsim4v4.la
libbsim4v4_la_SOURCES = \
b4v4.c \
b4v4acld.c \
b4v4ask.c \
b4v4check.c \
b4v4cvtest.c \
b4v4del.c \
b4v4dest.c \
b4v4geo.c \
b4v4getic.c \
b4v4ld.c \
b4v4mask.c \
b4v4mdel.c \
b4v4mpar.c \
b4v4noi.c \
b4v4par.c \
b4v4pzld.c \
b4v4set.c \
b4v4temp.c \
b4v4trunc.c \
bsim4v4def.h \
bsim4v4ext.h \
bsim4v4init.c \
bsim4v4init.h \
bsim4v4itf.h
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
AM_CFLAGS = $(STATIC)
MAINTAINERCLEANFILES = Makefile.in
EXTRA_DIST = B4TERMS_OF_USE

819
src/spicelib/devices/bsim4v4/b4v4.c
View File

@ -1,819 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
* Modified by Xuemei Xi, 11/15/2002.
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/devdefs.h"
#include "bsim4v4def.h"
#include "ngspice/suffix.h"
IFparm BSIM4v4pTable[] = { /* parameters */
IOP( "l", BSIM4v4_L, IF_REAL , "Length"),
IOP( "w", BSIM4v4_W, IF_REAL , "Width"),
IOP( "m", BSIM4v4_M, IF_REAL , "Separate Parallel multiplier"),
IOP( "nf", BSIM4v4_NF, IF_REAL , "Number of fingers"),
IOP( "sa", BSIM4v4_SA, IF_REAL , "distance between OD edge to poly of one side "),
IOP( "sb", BSIM4v4_SB, IF_REAL , "distance between OD edge to poly of the other side"),
IOP( "sd", BSIM4v4_SD, IF_REAL , "distance between neighbour fingers"),
IOP( "min", BSIM4v4_MIN, IF_INTEGER , "Minimize either D or S"),
IOP( "ad", BSIM4v4_AD, IF_REAL , "Drain area"),
IOP( "as", BSIM4v4_AS, IF_REAL , "Source area"),
IOP( "pd", BSIM4v4_PD, IF_REAL , "Drain perimeter"),
IOP( "ps", BSIM4v4_PS, IF_REAL , "Source perimeter"),
IOP( "nrd", BSIM4v4_NRD, IF_REAL , "Number of squares in drain"),
IOP( "nrs", BSIM4v4_NRS, IF_REAL , "Number of squares in source"),
IOP( "off", BSIM4v4_OFF, IF_FLAG , "Device is initially off"),
IOP( "rbdb", BSIM4v4_RBDB, IF_REAL , "Body resistance"),
IOP( "rbsb", BSIM4v4_RBSB, IF_REAL , "Body resistance"),
IOP( "rbpb", BSIM4v4_RBPB, IF_REAL , "Body resistance"),
IOP( "rbps", BSIM4v4_RBPS, IF_REAL , "Body resistance"),
IOP( "rbpd", BSIM4v4_RBPD, IF_REAL , "Body resistance"),
IOP( "trnqsmod", BSIM4v4_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"),
IOP( "acnqsmod", BSIM4v4_ACNQSMOD, IF_INTEGER, "AC NQS model selector"),
IOP( "rbodymod", BSIM4v4_RBODYMOD, IF_INTEGER, "Distributed body R model selector"),
IOP( "rgatemod", BSIM4v4_RGATEMOD, IF_INTEGER, "Gate resistance model selector"),
IOP( "geomod", BSIM4v4_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"),
IOP( "rgeomod", BSIM4v4_RGEOMOD, IF_INTEGER, "S/D resistance and contact model selector"),
IP( "ic", BSIM4v4_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"),
OP( "gmbs", BSIM4v4_GMBS, IF_REAL, "Gmb"),
OP( "gm", BSIM4v4_GM, IF_REAL, "Gm"),
OP( "gds", BSIM4v4_GDS, IF_REAL, "Gds"),
OP( "vdsat", BSIM4v4_VDSAT, IF_REAL, "Vdsat"),
OP( "vth", BSIM4v4_VON, IF_REAL, "Vth"),
OP( "id", BSIM4v4_CD, IF_REAL, "Ids"),
OP( "ibd", BSIM4v4_CBD, IF_REAL, "Ibd"),
OP( "ibs", BSIM4v4_CBS, IF_REAL, "Ibs"),
OP( "gbd", BSIM4v4_GBD, IF_REAL, "gbd"),
OP( "gbs", BSIM4v4_GBS, IF_REAL, "gbs"),
OP( "isub", BSIM4v4_CSUB, IF_REAL, "Isub"),
OP( "igidl", BSIM4v4_IGIDL, IF_REAL, "Igidl"),
OP( "igisl", BSIM4v4_IGISL, IF_REAL, "Igisl"),
OP( "igs", BSIM4v4_IGS, IF_REAL, "Igs"),
OP( "igd", BSIM4v4_IGD, IF_REAL, "Igd"),
OP( "igb", BSIM4v4_IGB, IF_REAL, "Igb"),
OP( "igcs", BSIM4v4_IGCS, IF_REAL, "Igcs"),
OP( "igcd", BSIM4v4_IGCD, IF_REAL, "Igcd"),
OP( "vbs", BSIM4v4_VBS, IF_REAL, "Vbs"),
OP( "vgs", BSIM4v4_VGS, IF_REAL, "Vgs"),
OP( "vds", BSIM4v4_VDS, IF_REAL, "Vds"),
OP( "cgg", BSIM4v4_CGGB, IF_REAL, "Cggb"),
OP( "cgs", BSIM4v4_CGSB, IF_REAL, "Cgsb"),
OP( "cgd", BSIM4v4_CGDB, IF_REAL, "Cgdb"),
OP( "cbg", BSIM4v4_CBGB, IF_REAL, "Cbgb"),
OP( "cbd", BSIM4v4_CBDB, IF_REAL, "Cbdb"),
OP( "cbs", BSIM4v4_CBSB, IF_REAL, "Cbsb"),
OP( "cdg", BSIM4v4_CDGB, IF_REAL, "Cdgb"),
OP( "cdd", BSIM4v4_CDDB, IF_REAL, "Cddb"),
OP( "cds", BSIM4v4_CDSB, IF_REAL, "Cdsb"),
OP( "csg", BSIM4v4_CSGB, IF_REAL, "Csgb"),
OP( "csd", BSIM4v4_CSDB, IF_REAL, "Csdb"),
OP( "css", BSIM4v4_CSSB, IF_REAL, "Cssb"),
OP( "cgb", BSIM4v4_CGBB, IF_REAL, "Cgbb"),
OP( "cdb", BSIM4v4_CDBB, IF_REAL, "Cdbb"),
OP( "csb", BSIM4v4_CSBB, IF_REAL, "Csbb"),
OP( "cbb", BSIM4v4_CBBB, IF_REAL, "Cbbb"),
OP( "capbd", BSIM4v4_CAPBD, IF_REAL, "Capbd"),
OP( "capbs", BSIM4v4_CAPBS, IF_REAL, "Capbs"),
OP( "qg", BSIM4v4_QG, IF_REAL, "Qgate"),
OP( "qb", BSIM4v4_QB, IF_REAL, "Qbulk"),
OP( "qd", BSIM4v4_QD, IF_REAL, "Qdrain"),
OP( "qs", BSIM4v4_QS, IF_REAL, "Qsource"),
OP( "qinv", BSIM4v4_QINV, IF_REAL, "Qinversion"),
};
IFparm BSIM4v4mPTable[] = { /* model parameters */
IOP( "capmod", BSIM4v4_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"),
IOP( "diomod", BSIM4v4_MOD_DIOMOD, IF_INTEGER, "Diode IV model selector"),
IOP( "rdsmod", BSIM4v4_MOD_RDSMOD, IF_INTEGER, "Bias-dependent S/D resistance model selector"),
IOP( "trnqsmod", BSIM4v4_MOD_TRNQSMOD, IF_INTEGER, "Transient NQS model selector"),
IOP( "acnqsmod", BSIM4v4_MOD_ACNQSMOD, IF_INTEGER, "AC NQS model selector"),
IOP( "mobmod", BSIM4v4_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"),
IOP( "rbodymod", BSIM4v4_MOD_RBODYMOD, IF_INTEGER, "Distributed body R model selector"),
IOP( "rgatemod", BSIM4v4_MOD_RGATEMOD, IF_INTEGER, "Gate R model selector"),
IOP( "permod", BSIM4v4_MOD_PERMOD, IF_INTEGER, "Pd and Ps model selector"),
IOP( "geomod", BSIM4v4_MOD_GEOMOD, IF_INTEGER, "Geometry dependent parasitics model selector"),
IOP( "fnoimod", BSIM4v4_MOD_FNOIMOD, IF_INTEGER, "Flicker noise model selector"),
IOP( "tnoimod", BSIM4v4_MOD_TNOIMOD, IF_INTEGER, "Thermal noise model selector"),
IOP( "igcmod", BSIM4v4_MOD_IGCMOD, IF_INTEGER, "Gate-to-channel Ig model selector"),
IOP( "igbmod", BSIM4v4_MOD_IGBMOD, IF_INTEGER, "Gate-to-body Ig model selector"),
IOP( "tempmod", BSIM4v4_MOD_TEMPMOD, IF_INTEGER, "Temperature model selector"),
IOP( "paramchk", BSIM4v4_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"),
IOP( "binunit", BSIM4v4_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"),
IOP( "version", BSIM4v4_MOD_VERSION, IF_STRING, "parameter for model version"),
IOP( "toxe", BSIM4v4_MOD_TOXE, IF_REAL, "Electrical gate oxide thickness in meters"),
IOP( "toxp", BSIM4v4_MOD_TOXP, IF_REAL, "Physical gate oxide thickness in meters"),
IOP( "toxm", BSIM4v4_MOD_TOXM, IF_REAL, "Gate oxide thickness at which parameters are extracted"),
IOP( "toxref", BSIM4v4_MOD_TOXREF, IF_REAL, "Target tox value"),
IOP( "dtox", BSIM4v4_MOD_DTOX, IF_REAL, "Defined as (toxe - toxp) "),
IOP( "epsrox", BSIM4v4_MOD_EPSROX, IF_REAL, "Dielectric constant of the gate oxide relative to vacuum"),
IOP( "cdsc", BSIM4v4_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"),
IOP( "cdscb", BSIM4v4_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"),
IOP( "cdscd", BSIM4v4_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"),
IOP( "cit", BSIM4v4_MOD_CIT, IF_REAL, "Interface state capacitance"),
IOP( "nfactor", BSIM4v4_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"),
IOP( "xj", BSIM4v4_MOD_XJ, IF_REAL, "Junction depth in meters"),
IOP( "vsat", BSIM4v4_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"),
IOP( "at", BSIM4v4_MOD_AT, IF_REAL, "Temperature coefficient of vsat"),
IOP( "a0", BSIM4v4_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."),
IOP( "ags", BSIM4v4_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."),
IOP( "a1", BSIM4v4_MOD_A1, IF_REAL, "Non-saturation effect coefficient"),
IOP( "a2", BSIM4v4_MOD_A2, IF_REAL, "Non-saturation effect coefficient"),
IOP( "keta", BSIM4v4_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."),
IOP( "nsub", BSIM4v4_MOD_NSUB, IF_REAL, "Substrate doping concentration"),
IOP( "ndep", BSIM4v4_MOD_NDEP, IF_REAL, "Channel doping concentration at the depletion edge"),
IOP( "nsd", BSIM4v4_MOD_NSD, IF_REAL, "S/D doping concentration"),
IOP( "phin", BSIM4v4_MOD_PHIN, IF_REAL, "Adjusting parameter for surface potential due to non-uniform vertical doping"),
IOP( "ngate", BSIM4v4_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"),
IOP( "gamma1", BSIM4v4_MOD_GAMMA1, IF_REAL, "Vth body coefficient"),
IOP( "gamma2", BSIM4v4_MOD_GAMMA2, IF_REAL, "Vth body coefficient"),
IOP( "vbx", BSIM4v4_MOD_VBX, IF_REAL, "Vth transition body Voltage"),
IOP( "vbm", BSIM4v4_MOD_VBM, IF_REAL, "Maximum body voltage"),
IOP( "xt", BSIM4v4_MOD_XT, IF_REAL, "Doping depth"),
IOP( "k1", BSIM4v4_MOD_K1, IF_REAL, "Bulk effect coefficient 1"),
IOP( "kt1", BSIM4v4_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"),
IOP( "kt1l", BSIM4v4_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"),
IOP( "kt2", BSIM4v4_MOD_KT2, IF_REAL, "Body-coefficient of kt1"),
IOP( "k2", BSIM4v4_MOD_K2, IF_REAL, "Bulk effect coefficient 2"),
IOP( "k3", BSIM4v4_MOD_K3, IF_REAL, "Narrow width effect coefficient"),
IOP( "k3b", BSIM4v4_MOD_K3B, IF_REAL, "Body effect coefficient of k3"),
IOP( "w0", BSIM4v4_MOD_W0, IF_REAL, "Narrow width effect parameter"),
IOP( "dvtp0", BSIM4v4_MOD_DVTP0, IF_REAL, "First parameter for Vth shift due to pocket"),
IOP( "dvtp1", BSIM4v4_MOD_DVTP1, IF_REAL, "Second parameter for Vth shift due to pocket"),
IOP( "lpe0", BSIM4v4_MOD_LPE0, IF_REAL, "Equivalent length of pocket region at zero bias"),
IOP( "lpeb", BSIM4v4_MOD_LPEB, IF_REAL, "Equivalent length of pocket region accounting for body bias"),
IOP( "dvt0", BSIM4v4_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"),
IOP( "dvt1", BSIM4v4_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"),
IOP( "dvt2", BSIM4v4_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"),
IOP( "dvt0w", BSIM4v4_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"),
IOP( "dvt1w", BSIM4v4_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"),
IOP( "dvt2w", BSIM4v4_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"),
IOP( "drout", BSIM4v4_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"),
IOP( "dsub", BSIM4v4_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"),
IOP( "vth0", BSIM4v4_MOD_VTH0, IF_REAL,"Threshold voltage"),
IOP( "vtho", BSIM4v4_MOD_VTH0, IF_REAL,"Threshold voltage"),
IOP( "ua", BSIM4v4_MOD_UA, IF_REAL, "Linear gate dependence of mobility"),
IOP( "ua1", BSIM4v4_MOD_UA1, IF_REAL, "Temperature coefficient of ua"),
IOP( "ub", BSIM4v4_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"),
IOP( "ub1", BSIM4v4_MOD_UB1, IF_REAL, "Temperature coefficient of ub"),
IOP( "uc", BSIM4v4_MOD_UC, IF_REAL, "Body-bias dependence of mobility"),
IOP( "uc1", BSIM4v4_MOD_UC1, IF_REAL, "Temperature coefficient of uc"),
IOP( "u0", BSIM4v4_MOD_U0, IF_REAL, "Low-field mobility at Tnom"),
IOP( "eu", BSIM4v4_MOD_EU, IF_REAL, "Mobility exponent"),
IOP( "ute", BSIM4v4_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"),
IOP( "voff", BSIM4v4_MOD_VOFF, IF_REAL, "Threshold voltage offset"),
IOP( "minv", BSIM4v4_MOD_MINV, IF_REAL, "Fitting parameter for moderate invversion in Vgsteff"),
IOP( "voffl", BSIM4v4_MOD_VOFFL, IF_REAL, "Length dependence parameter for Vth offset"),
IOP( "tnom", BSIM4v4_MOD_TNOM, IF_REAL, "Parameter measurement temperature"),
IOP( "cgso", BSIM4v4_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"),
IOP( "cgdo", BSIM4v4_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"),
IOP( "cgbo", BSIM4v4_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"),
IOP( "xpart", BSIM4v4_MOD_XPART, IF_REAL, "Channel charge partitioning"),
IOP( "delta", BSIM4v4_MOD_DELTA, IF_REAL, "Effective Vds parameter"),
IOP( "rsh", BSIM4v4_MOD_RSH, IF_REAL, "Source-drain sheet resistance"),
IOP( "rdsw", BSIM4v4_MOD_RDSW, IF_REAL, "Source-drain resistance per width"),
IOP( "rdswmin", BSIM4v4_MOD_RDSWMIN, IF_REAL, "Source-drain resistance per width at high Vg"),
IOP( "rsw", BSIM4v4_MOD_RSW, IF_REAL, "Source resistance per width"),
IOP( "rdw", BSIM4v4_MOD_RDW, IF_REAL, "Drain resistance per width"),
IOP( "rdwmin", BSIM4v4_MOD_RDWMIN, IF_REAL, "Drain resistance per width at high Vg"),
IOP( "rswmin", BSIM4v4_MOD_RSWMIN, IF_REAL, "Source resistance per width at high Vg"),
IOP( "prwg", BSIM4v4_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "),
IOP( "prwb", BSIM4v4_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "),
IOP( "prt", BSIM4v4_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "),
IOP( "eta0", BSIM4v4_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "etab", BSIM4v4_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "pclm", BSIM4v4_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"),
IOP( "pdiblc1", BSIM4v4_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblc2", BSIM4v4_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblcb", BSIM4v4_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"),
IOP( "fprout", BSIM4v4_MOD_FPROUT, IF_REAL, "Rout degradation coefficient for pocket devices"),
IOP( "pdits", BSIM4v4_MOD_PDITS, IF_REAL, "Coefficient for drain-induced Vth shifts"),
IOP( "pditsl", BSIM4v4_MOD_PDITSL, IF_REAL, "Length dependence of drain-induced Vth shifts"),
IOP( "pditsd", BSIM4v4_MOD_PDITSD, IF_REAL, "Vds dependence of drain-induced Vth shifts"),
IOP( "pscbe1", BSIM4v4_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pscbe2", BSIM4v4_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pvag", BSIM4v4_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"),
IOP( "jss", BSIM4v4_MOD_JSS, IF_REAL, "Bottom source junction reverse saturation current density"),
IOP( "jsws", BSIM4v4_MOD_JSWS, IF_REAL, "Isolation edge sidewall source junction reverse saturation current density"),
IOP( "jswgs", BSIM4v4_MOD_JSWGS, IF_REAL, "Gate edge source junction reverse saturation current density"),
IOP( "pbs", BSIM4v4_MOD_PBS, IF_REAL, "Source junction built-in potential"),
IOP( "njs", BSIM4v4_MOD_NJS, IF_REAL, "Source junction emission coefficient"),
IOP( "xtis", BSIM4v4_MOD_XTIS, IF_REAL, "Source junction current temperature exponent"),
IOP( "mjs", BSIM4v4_MOD_MJS, IF_REAL, "Source bottom junction capacitance grading coefficient"),
IOP( "pbsws", BSIM4v4_MOD_PBSWS, IF_REAL, "Source sidewall junction capacitance built in potential"),
IOP( "mjsws", BSIM4v4_MOD_MJSWS, IF_REAL, "Source sidewall junction capacitance grading coefficient"),
IOP( "pbswgs", BSIM4v4_MOD_PBSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance built in potential"),
IOP( "mjswgs", BSIM4v4_MOD_MJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance grading coefficient"),
IOP( "cjs", BSIM4v4_MOD_CJS, IF_REAL, "Source bottom junction capacitance per unit area"),
IOP( "cjsws", BSIM4v4_MOD_CJSWS, IF_REAL, "Source sidewall junction capacitance per unit periphery"),
IOP( "cjswgs", BSIM4v4_MOD_CJSWGS, IF_REAL, "Source (gate side) sidewall junction capacitance per unit width"),
IOP( "jsd", BSIM4v4_MOD_JSD, IF_REAL, "Bottom drain junction reverse saturation current density"),
IOP( "jswd", BSIM4v4_MOD_JSWD, IF_REAL, "Isolation edge sidewall drain junction reverse saturation current density"),
IOP( "jswgd", BSIM4v4_MOD_JSWGD, IF_REAL, "Gate edge drain junction reverse saturation current density"),
IOP( "pbd", BSIM4v4_MOD_PBD, IF_REAL, "Drain junction built-in potential"),
IOP( "njd", BSIM4v4_MOD_NJD, IF_REAL, "Drain junction emission coefficient"),
IOP( "xtid", BSIM4v4_MOD_XTID, IF_REAL, "Drainjunction current temperature exponent"),
IOP( "mjd", BSIM4v4_MOD_MJD, IF_REAL, "Drain bottom junction capacitance grading coefficient"),
IOP( "pbswd", BSIM4v4_MOD_PBSWD, IF_REAL, "Drain sidewall junction capacitance built in potential"),
IOP( "mjswd", BSIM4v4_MOD_MJSWD, IF_REAL, "Drain sidewall junction capacitance grading coefficient"),
IOP( "pbswgd", BSIM4v4_MOD_PBSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance built in potential"),
IOP( "mjswgd", BSIM4v4_MOD_MJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance grading coefficient"),
IOP( "cjd", BSIM4v4_MOD_CJD, IF_REAL, "Drain bottom junction capacitance per unit area"),
IOP( "cjswd", BSIM4v4_MOD_CJSWD, IF_REAL, "Drain sidewall junction capacitance per unit periphery"),
IOP( "cjswgd", BSIM4v4_MOD_CJSWGD, IF_REAL, "Drain (gate side) sidewall junction capacitance per unit width"),
IOP( "vfbcv", BSIM4v4_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"),
IOP( "vfb", BSIM4v4_MOD_VFB, IF_REAL, "Flat Band Voltage"),
IOP( "tpb", BSIM4v4_MOD_TPB, IF_REAL, "Temperature coefficient of pb"),
IOP( "tcj", BSIM4v4_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"),
IOP( "tpbsw", BSIM4v4_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"),
IOP( "tcjsw", BSIM4v4_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"),
IOP( "tpbswg", BSIM4v4_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"),
IOP( "tcjswg", BSIM4v4_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"),
IOP( "acde", BSIM4v4_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"),
IOP( "moin", BSIM4v4_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"),
IOP( "noff", BSIM4v4_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"),
IOP( "voffcv", BSIM4v4_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"),
IOP( "dmcg", BSIM4v4_MOD_DMCG, IF_REAL, "Distance of Mid-Contact to Gate edge"),
IOP( "dmci", BSIM4v4_MOD_DMCI, IF_REAL, "Distance of Mid-Contact to Isolation"),
IOP( "dmdg", BSIM4v4_MOD_DMDG, IF_REAL, "Distance of Mid-Diffusion to Gate edge"),
IOP( "dmcgt", BSIM4v4_MOD_DMCGT, IF_REAL, "Distance of Mid-Contact to Gate edge in Test structures"),
IOP( "xgw", BSIM4v4_MOD_XGW, IF_REAL, "Distance from gate contact center to device edge"),
IOP( "xgl", BSIM4v4_MOD_XGL, IF_REAL, "Variation in Ldrawn"),
IOP( "rshg", BSIM4v4_MOD_RSHG, IF_REAL, "Gate sheet resistance"),
IOP( "ngcon", BSIM4v4_MOD_NGCON, IF_REAL, "Number of gate contacts"),
IOP( "xrcrg1", BSIM4v4_MOD_XRCRG1, IF_REAL, "First fitting parameter the bias-dependent Rg"),
IOP( "xrcrg2", BSIM4v4_MOD_XRCRG2, IF_REAL, "Second fitting parameter the bias-dependent Rg"),
IOP( "lambda", BSIM4v4_MOD_LAMBDA, IF_REAL, " Velocity overshoot parameter"),
IOP( "vtl", BSIM4v4_MOD_VTL, IF_REAL, " thermal velocity"),
IOP( "lc", BSIM4v4_MOD_LC, IF_REAL, " back scattering parameter"),
IOP( "xn", BSIM4v4_MOD_XN, IF_REAL, " back scattering parameter"),
IOP( "vfbsdoff", BSIM4v4_MOD_VFBSDOFF, IF_REAL, "S/D flatband voltage offset"),
IOP( "lintnoi", BSIM4v4_MOD_LINTNOI, IF_REAL, "lint offset for noise calculation"),
IOP( "lint", BSIM4v4_MOD_LINT, IF_REAL, "Length reduction parameter"),
IOP( "ll", BSIM4v4_MOD_LL, IF_REAL, "Length reduction parameter"),
IOP( "llc", BSIM4v4_MOD_LLC, IF_REAL, "Length reduction parameter for CV"),
IOP( "lln", BSIM4v4_MOD_LLN, IF_REAL, "Length reduction parameter"),
IOP( "lw", BSIM4v4_MOD_LW, IF_REAL, "Length reduction parameter"),
IOP( "lwc", BSIM4v4_MOD_LWC, IF_REAL, "Length reduction parameter for CV"),
IOP( "lwn", BSIM4v4_MOD_LWN, IF_REAL, "Length reduction parameter"),
IOP( "lwl", BSIM4v4_MOD_LWL, IF_REAL, "Length reduction parameter"),
IOP( "lwlc", BSIM4v4_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"),
IOP( "lmin", BSIM4v4_MOD_LMIN, IF_REAL, "Minimum length for the model"),
IOP( "lmax", BSIM4v4_MOD_LMAX, IF_REAL, "Maximum length for the model"),
IOP( "wr", BSIM4v4_MOD_WR, IF_REAL, "Width dependence of rds"),
IOP( "wint", BSIM4v4_MOD_WINT, IF_REAL, "Width reduction parameter"),
IOP( "dwg", BSIM4v4_MOD_DWG, IF_REAL, "Width reduction parameter"),
IOP( "dwb", BSIM4v4_MOD_DWB, IF_REAL, "Width reduction parameter"),
IOP( "wl", BSIM4v4_MOD_WL, IF_REAL, "Width reduction parameter"),
IOP( "wlc", BSIM4v4_MOD_WLC, IF_REAL, "Width reduction parameter for CV"),
IOP( "wln", BSIM4v4_MOD_WLN, IF_REAL, "Width reduction parameter"),
IOP( "ww", BSIM4v4_MOD_WW, IF_REAL, "Width reduction parameter"),
IOP( "wwc", BSIM4v4_MOD_WWC, IF_REAL, "Width reduction parameter for CV"),
IOP( "wwn", BSIM4v4_MOD_WWN, IF_REAL, "Width reduction parameter"),
IOP( "wwl", BSIM4v4_MOD_WWL, IF_REAL, "Width reduction parameter"),
IOP( "wwlc", BSIM4v4_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"),
IOP( "wmin", BSIM4v4_MOD_WMIN, IF_REAL, "Minimum width for the model"),
IOP( "wmax", BSIM4v4_MOD_WMAX, IF_REAL, "Maximum width for the model"),
IOP( "b0", BSIM4v4_MOD_B0, IF_REAL, "Abulk narrow width parameter"),
IOP( "b1", BSIM4v4_MOD_B1, IF_REAL, "Abulk narrow width parameter"),
IOP( "cgsl", BSIM4v4_MOD_CGSL, IF_REAL, "New C-V model parameter"),
IOP( "cgdl", BSIM4v4_MOD_CGDL, IF_REAL, "New C-V model parameter"),
IOP( "ckappas", BSIM4v4_MOD_CKAPPAS, IF_REAL, "S/G overlap C-V parameter "),
IOP( "ckappad", BSIM4v4_MOD_CKAPPAD, IF_REAL, "D/G overlap C-V parameter"),
IOP( "cf", BSIM4v4_MOD_CF, IF_REAL, "Fringe capacitance parameter"),
IOP( "clc", BSIM4v4_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"),
IOP( "cle", BSIM4v4_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"),
IOP( "dwc", BSIM4v4_MOD_DWC, IF_REAL, "Delta W for C-V model"),
IOP( "dlc", BSIM4v4_MOD_DLC, IF_REAL, "Delta L for C-V model"),
IOP( "xw", BSIM4v4_MOD_XW, IF_REAL, "W offset for channel width due to mask/etch effect"),
IOP( "xl", BSIM4v4_MOD_XL, IF_REAL, "L offset for channel length due to mask/etch effect"),
IOP( "dlcig", BSIM4v4_MOD_DLCIG, IF_REAL, "Delta L for Ig model"),
IOP( "dwj", BSIM4v4_MOD_DWJ, IF_REAL, "Delta W for S/D junctions"),
IOP( "alpha0", BSIM4v4_MOD_ALPHA0, IF_REAL, "substrate current model parameter"),
IOP( "alpha1", BSIM4v4_MOD_ALPHA1, IF_REAL, "substrate current model parameter"),
IOP( "beta0", BSIM4v4_MOD_BETA0, IF_REAL, "substrate current model parameter"),
IOP( "agidl", BSIM4v4_MOD_AGIDL, IF_REAL, "Pre-exponential constant for GIDL"),
IOP( "bgidl", BSIM4v4_MOD_BGIDL, IF_REAL, "Exponential constant for GIDL"),
IOP( "cgidl", BSIM4v4_MOD_CGIDL, IF_REAL, "Parameter for body-bias dependence of GIDL"),
IOP( "egidl", BSIM4v4_MOD_EGIDL, IF_REAL, "Fitting parameter for Bandbending"),
IOP( "aigc", BSIM4v4_MOD_AIGC, IF_REAL, "Parameter for Igc"),
IOP( "bigc", BSIM4v4_MOD_BIGC, IF_REAL, "Parameter for Igc"),
IOP( "cigc", BSIM4v4_MOD_CIGC, IF_REAL, "Parameter for Igc"),
IOP( "aigsd", BSIM4v4_MOD_AIGSD, IF_REAL, "Parameter for Igs,d"),
IOP( "bigsd", BSIM4v4_MOD_BIGSD, IF_REAL, "Parameter for Igs,d"),
IOP( "cigsd", BSIM4v4_MOD_CIGSD, IF_REAL, "Parameter for Igs,d"),
IOP( "aigbacc", BSIM4v4_MOD_AIGBACC, IF_REAL, "Parameter for Igb"),
IOP( "bigbacc", BSIM4v4_MOD_BIGBACC, IF_REAL, "Parameter for Igb"),
IOP( "cigbacc", BSIM4v4_MOD_CIGBACC, IF_REAL, "Parameter for Igb"),
IOP( "aigbinv", BSIM4v4_MOD_AIGBINV, IF_REAL, "Parameter for Igb"),
IOP( "bigbinv", BSIM4v4_MOD_BIGBINV, IF_REAL, "Parameter for Igb"),
IOP( "cigbinv", BSIM4v4_MOD_CIGBINV, IF_REAL, "Parameter for Igb"),
IOP( "nigc", BSIM4v4_MOD_NIGC, IF_REAL, "Parameter for Igc slope"),
IOP( "nigbinv", BSIM4v4_MOD_NIGBINV, IF_REAL, "Parameter for Igbinv slope"),
IOP( "nigbacc", BSIM4v4_MOD_NIGBACC, IF_REAL, "Parameter for Igbacc slope"),
IOP( "ntox", BSIM4v4_MOD_NTOX, IF_REAL, "Exponent for Tox ratio"),
IOP( "eigbinv", BSIM4v4_MOD_EIGBINV, IF_REAL, "Parameter for the Si bandgap for Igbinv"),
IOP( "pigcd", BSIM4v4_MOD_PIGCD, IF_REAL, "Parameter for Igc partition"),
IOP( "poxedge", BSIM4v4_MOD_POXEDGE, IF_REAL, "Factor for the gate edge Tox"),
IOP( "ijthdfwd", BSIM4v4_MOD_IJTHDFWD, IF_REAL, "Forward drain diode forward limiting current"),
IOP( "ijthsfwd", BSIM4v4_MOD_IJTHSFWD, IF_REAL, "Forward source diode forward limiting current"),
IOP( "ijthdrev", BSIM4v4_MOD_IJTHDREV, IF_REAL, "Reverse drain diode forward limiting current"),
IOP( "ijthsrev", BSIM4v4_MOD_IJTHSREV, IF_REAL, "Reverse source diode forward limiting current"),
IOP( "xjbvd", BSIM4v4_MOD_XJBVD, IF_REAL, "Fitting parameter for drain diode breakdown current"),
IOP( "xjbvs", BSIM4v4_MOD_XJBVS, IF_REAL, "Fitting parameter for source diode breakdown current"),
IOP( "bvd", BSIM4v4_MOD_BVD, IF_REAL, "Drain diode breakdown voltage"),
IOP( "bvs", BSIM4v4_MOD_BVS, IF_REAL, "Source diode breakdown voltage"),
IOP( "jtss", BSIM4v4_MOD_JTSS, IF_REAL, "Source bottom trap-assisted saturation current density"),
IOP( "jtsd", BSIM4v4_MOD_JTSD, IF_REAL, "Drain bottom trap-assisted saturation current density"),
IOP( "jtssws", BSIM4v4_MOD_JTSSWS, IF_REAL, "Source STI sidewall trap-assisted saturation current density"),
IOP( "jtsswd", BSIM4v4_MOD_JTSSWD, IF_REAL, "Drain STI sidewall trap-assisted saturation current density"),
IOP( "jtsswgs", BSIM4v4_MOD_JTSSWGS, IF_REAL, "Source gate-edge sidewall trap-assisted saturation current density"),
IOP( "jtsswgd", BSIM4v4_MOD_JTSSWGD, IF_REAL, "Drain gate-edge sidewall trap-assisted saturation current density"),
IOP( "njts", BSIM4v4_MOD_NJTS, IF_REAL, "Non-ideality factor for bottom junction"),
IOP( "njtssw", BSIM4v4_MOD_NJTSSW, IF_REAL, "Non-ideality factor for STI sidewall junction"),
IOP( "njtsswg", BSIM4v4_MOD_NJTSSWG, IF_REAL, "Non-ideality factor for gate-edge sidewall junction"),
IOP( "xtss", BSIM4v4_MOD_XTSS, IF_REAL, "Power dependence of JTSS on temperature"),
IOP( "xtsd", BSIM4v4_MOD_XTSD, IF_REAL, "Power dependence of JTSD on temperature"),
IOP( "xtssws", BSIM4v4_MOD_XTSSWS, IF_REAL, "Power dependence of JTSSWS on temperature"),
IOP( "xtsswd", BSIM4v4_MOD_XTSSWD, IF_REAL, "Power dependence of JTSSWD on temperature"),
IOP( "xtsswgs", BSIM4v4_MOD_XTSSWGS, IF_REAL, "Power dependence of JTSSWGS on temperature"),
IOP( "xtsswgd", BSIM4v4_MOD_XTSSWGD, IF_REAL, "Power dependence of JTSSWGD on temperature"),
IOP( "tnjts", BSIM4v4_MOD_TNJTS, IF_REAL, "Temperature coefficient for NJTS"),
IOP( "tnjtssw", BSIM4v4_MOD_TNJTSSW, IF_REAL, "Temperature coefficient for NJTSSW"),
IOP( "tnjtsswg", BSIM4v4_MOD_TNJTSSWG, IF_REAL, "Temperature coefficient for NJTSSWG"),
IOP( "vtss", BSIM4v4_MOD_VTSS, IF_REAL, "Source bottom trap-assisted voltage dependent parameter"),
IOP( "vtsd", BSIM4v4_MOD_VTSD, IF_REAL, "Drain bottom trap-assisted voltage dependent parameter"),
IOP( "vtssws", BSIM4v4_MOD_VTSSWS, IF_REAL, "Source STI sidewall trap-assisted voltage dependent parameter"),
IOP( "vtsswd", BSIM4v4_MOD_VTSSWD, IF_REAL, "Drain STI sidewall trap-assisted voltage dependent parameter"),
IOP( "vtsswgs", BSIM4v4_MOD_VTSSWGS, IF_REAL, "Source gate-edge sidewall trap-assisted voltage dependent parameter"),
IOP( "vtsswgd", BSIM4v4_MOD_VTSSWGD, IF_REAL, "Drain gate-edge sidewall trap-assisted voltage dependent parameter"),
IOP( "gbmin", BSIM4v4_MOD_GBMIN, IF_REAL, "Minimum body conductance"),
IOP( "rbdb", BSIM4v4_MOD_RBDB, IF_REAL, "Resistance between bNode and dbNode"),
IOP( "rbpb", BSIM4v4_MOD_RBPB, IF_REAL, "Resistance between bNodePrime and bNode"),
IOP( "rbsb", BSIM4v4_MOD_RBSB, IF_REAL, "Resistance between bNode and sbNode"),
IOP( "rbps", BSIM4v4_MOD_RBPS, IF_REAL, "Resistance between bNodePrime and sbNode"),
IOP( "rbpd", BSIM4v4_MOD_RBPD, IF_REAL, "Resistance between bNodePrime and bNode"),
IOP( "lcdsc", BSIM4v4_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"),
IOP( "lcdscb", BSIM4v4_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"),
IOP( "lcdscd", BSIM4v4_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"),
IOP( "lcit", BSIM4v4_MOD_LCIT, IF_REAL, "Length dependence of cit"),
IOP( "lnfactor", BSIM4v4_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"),
IOP( "lxj", BSIM4v4_MOD_LXJ, IF_REAL, "Length dependence of xj"),
IOP( "lvsat", BSIM4v4_MOD_LVSAT, IF_REAL, "Length dependence of vsat"),
IOP( "lat", BSIM4v4_MOD_LAT, IF_REAL, "Length dependence of at"),
IOP( "la0", BSIM4v4_MOD_LA0, IF_REAL, "Length dependence of a0"),
IOP( "lags", BSIM4v4_MOD_LAGS, IF_REAL, "Length dependence of ags"),
IOP( "la1", BSIM4v4_MOD_LA1, IF_REAL, "Length dependence of a1"),
IOP( "la2", BSIM4v4_MOD_LA2, IF_REAL, "Length dependence of a2"),
IOP( "lketa", BSIM4v4_MOD_LKETA, IF_REAL, "Length dependence of keta"),
IOP( "lnsub", BSIM4v4_MOD_LNSUB, IF_REAL, "Length dependence of nsub"),
IOP( "lndep", BSIM4v4_MOD_LNDEP, IF_REAL, "Length dependence of ndep"),
IOP( "lnsd", BSIM4v4_MOD_LNSD, IF_REAL, "Length dependence of nsd"),
IOP( "lphin", BSIM4v4_MOD_LPHIN, IF_REAL, "Length dependence of phin"),
IOP( "lngate", BSIM4v4_MOD_LNGATE, IF_REAL, "Length dependence of ngate"),
IOP( "lgamma1", BSIM4v4_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"),
IOP( "lgamma2", BSIM4v4_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"),
IOP( "lvbx", BSIM4v4_MOD_LVBX, IF_REAL, "Length dependence of vbx"),
IOP( "lvbm", BSIM4v4_MOD_LVBM, IF_REAL, "Length dependence of vbm"),
IOP( "lxt", BSIM4v4_MOD_LXT, IF_REAL, "Length dependence of xt"),
IOP( "lk1", BSIM4v4_MOD_LK1, IF_REAL, "Length dependence of k1"),
IOP( "lkt1", BSIM4v4_MOD_LKT1, IF_REAL, "Length dependence of kt1"),
IOP( "lkt1l", BSIM4v4_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"),
IOP( "lkt2", BSIM4v4_MOD_LKT2, IF_REAL, "Length dependence of kt2"),
IOP( "lk2", BSIM4v4_MOD_LK2, IF_REAL, "Length dependence of k2"),
IOP( "lk3", BSIM4v4_MOD_LK3, IF_REAL, "Length dependence of k3"),
IOP( "lk3b", BSIM4v4_MOD_LK3B, IF_REAL, "Length dependence of k3b"),
IOP( "lw0", BSIM4v4_MOD_LW0, IF_REAL, "Length dependence of w0"),
IOP( "ldvtp0", BSIM4v4_MOD_LDVTP0, IF_REAL, "Length dependence of dvtp0"),
IOP( "ldvtp1", BSIM4v4_MOD_LDVTP1, IF_REAL, "Length dependence of dvtp1"),
IOP( "llpe0", BSIM4v4_MOD_LLPE0, IF_REAL, "Length dependence of lpe0"),
IOP( "llpeb", BSIM4v4_MOD_LLPEB, IF_REAL, "Length dependence of lpeb"),
IOP( "ldvt0", BSIM4v4_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"),
IOP( "ldvt1", BSIM4v4_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"),
IOP( "ldvt2", BSIM4v4_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"),
IOP( "ldvt0w", BSIM4v4_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"),
IOP( "ldvt1w", BSIM4v4_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"),
IOP( "ldvt2w", BSIM4v4_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"),
IOP( "ldrout", BSIM4v4_MOD_LDROUT, IF_REAL, "Length dependence of drout"),
IOP( "ldsub", BSIM4v4_MOD_LDSUB, IF_REAL, "Length dependence of dsub"),
IOP( "lvth0", BSIM4v4_MOD_LVTH0, IF_REAL,"Length dependence of vto"),
IOP( "lvtho", BSIM4v4_MOD_LVTH0, IF_REAL,"Length dependence of vto"),
IOP( "lua", BSIM4v4_MOD_LUA, IF_REAL, "Length dependence of ua"),
IOP( "lua1", BSIM4v4_MOD_LUA1, IF_REAL, "Length dependence of ua1"),
IOP( "lub", BSIM4v4_MOD_LUB, IF_REAL, "Length dependence of ub"),
IOP( "lub1", BSIM4v4_MOD_LUB1, IF_REAL, "Length dependence of ub1"),
IOP( "luc", BSIM4v4_MOD_LUC, IF_REAL, "Length dependence of uc"),
IOP( "luc1", BSIM4v4_MOD_LUC1, IF_REAL, "Length dependence of uc1"),
IOP( "lu0", BSIM4v4_MOD_LU0, IF_REAL, "Length dependence of u0"),
IOP( "lute", BSIM4v4_MOD_LUTE, IF_REAL, "Length dependence of ute"),
IOP( "lvoff", BSIM4v4_MOD_LVOFF, IF_REAL, "Length dependence of voff"),
IOP( "lminv", BSIM4v4_MOD_LMINV, IF_REAL, "Length dependence of minv"),
IOP( "ldelta", BSIM4v4_MOD_LDELTA, IF_REAL, "Length dependence of delta"),
IOP( "lrdsw", BSIM4v4_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "),
IOP( "lrsw", BSIM4v4_MOD_LRSW, IF_REAL, "Length dependence of rsw"),
IOP( "lrdw", BSIM4v4_MOD_LRDW, IF_REAL, "Length dependence of rdw"),
IOP( "lprwg", BSIM4v4_MOD_LPRWG, IF_REAL, "Length dependence of prwg "),
IOP( "lprwb", BSIM4v4_MOD_LPRWB, IF_REAL, "Length dependence of prwb "),
IOP( "lprt", BSIM4v4_MOD_LPRT, IF_REAL, "Length dependence of prt "),
IOP( "leta0", BSIM4v4_MOD_LETA0, IF_REAL, "Length dependence of eta0"),
IOP( "letab", BSIM4v4_MOD_LETAB, IF_REAL, "Length dependence of etab"),
IOP( "lpclm", BSIM4v4_MOD_LPCLM, IF_REAL, "Length dependence of pclm"),
IOP( "lpdiblc1", BSIM4v4_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"),
IOP( "lpdiblc2", BSIM4v4_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"),
IOP( "lpdiblcb", BSIM4v4_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"),
IOP( "lfprout", BSIM4v4_MOD_LFPROUT, IF_REAL, "Length dependence of pdiblcb"),
IOP( "lpdits", BSIM4v4_MOD_LPDITS, IF_REAL, "Length dependence of pdits"),
IOP( "lpditsd", BSIM4v4_MOD_LPDITSD, IF_REAL, "Length dependence of pditsd"),
IOP( "lpscbe1", BSIM4v4_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"),
IOP( "lpscbe2", BSIM4v4_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"),
IOP( "lpvag", BSIM4v4_MOD_LPVAG, IF_REAL, "Length dependence of pvag"),
IOP( "lwr", BSIM4v4_MOD_LWR, IF_REAL, "Length dependence of wr"),
IOP( "ldwg", BSIM4v4_MOD_LDWG, IF_REAL, "Length dependence of dwg"),
IOP( "ldwb", BSIM4v4_MOD_LDWB, IF_REAL, "Length dependence of dwb"),
IOP( "lb0", BSIM4v4_MOD_LB0, IF_REAL, "Length dependence of b0"),
IOP( "lb1", BSIM4v4_MOD_LB1, IF_REAL, "Length dependence of b1"),
IOP( "lcgsl", BSIM4v4_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"),
IOP( "lcgdl", BSIM4v4_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"),
IOP( "lckappas", BSIM4v4_MOD_LCKAPPAS, IF_REAL, "Length dependence of ckappas"),
IOP( "lckappad", BSIM4v4_MOD_LCKAPPAD, IF_REAL, "Length dependence of ckappad"),
IOP( "lcf", BSIM4v4_MOD_LCF, IF_REAL, "Length dependence of cf"),
IOP( "lclc", BSIM4v4_MOD_LCLC, IF_REAL, "Length dependence of clc"),
IOP( "lcle", BSIM4v4_MOD_LCLE, IF_REAL, "Length dependence of cle"),
IOP( "lalpha0", BSIM4v4_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"),
IOP( "lalpha1", BSIM4v4_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"),
IOP( "lbeta0", BSIM4v4_MOD_LBETA0, IF_REAL, "Length dependence of beta0"),
IOP( "lagidl", BSIM4v4_MOD_LAGIDL, IF_REAL, "Length dependence of agidl"),
IOP( "lbgidl", BSIM4v4_MOD_LBGIDL, IF_REAL, "Length dependence of bgidl"),
IOP( "lcgidl", BSIM4v4_MOD_LCGIDL, IF_REAL, "Length dependence of cgidl"),
IOP( "legidl", BSIM4v4_MOD_LEGIDL, IF_REAL, "Length dependence of egidl"),
IOP( "laigc", BSIM4v4_MOD_LAIGC, IF_REAL, "Length dependence of aigc"),
IOP( "lbigc", BSIM4v4_MOD_LBIGC, IF_REAL, "Length dependence of bigc"),
IOP( "lcigc", BSIM4v4_MOD_LCIGC, IF_REAL, "Length dependence of cigc"),
IOP( "laigsd", BSIM4v4_MOD_LAIGSD, IF_REAL, "Length dependence of aigsd"),
IOP( "lbigsd", BSIM4v4_MOD_LBIGSD, IF_REAL, "Length dependence of bigsd"),
IOP( "lcigsd", BSIM4v4_MOD_LCIGSD, IF_REAL, "Length dependence of cigsd"),
IOP( "laigbacc", BSIM4v4_MOD_LAIGBACC, IF_REAL, "Length dependence of aigbacc"),
IOP( "lbigbacc", BSIM4v4_MOD_LBIGBACC, IF_REAL, "Length dependence of bigbacc"),
IOP( "lcigbacc", BSIM4v4_MOD_LCIGBACC, IF_REAL, "Length dependence of cigbacc"),
IOP( "laigbinv", BSIM4v4_MOD_LAIGBINV, IF_REAL, "Length dependence of aigbinv"),
IOP( "lbigbinv", BSIM4v4_MOD_LBIGBINV, IF_REAL, "Length dependence of bigbinv"),
IOP( "lcigbinv", BSIM4v4_MOD_LCIGBINV, IF_REAL, "Length dependence of cigbinv"),
IOP( "lnigc", BSIM4v4_MOD_LNIGC, IF_REAL, "Length dependence of nigc"),
IOP( "lnigbinv", BSIM4v4_MOD_LNIGBINV, IF_REAL, "Length dependence of nigbinv"),
IOP( "lnigbacc", BSIM4v4_MOD_LNIGBACC, IF_REAL, "Length dependence of nigbacc"),
IOP( "lntox", BSIM4v4_MOD_LNTOX, IF_REAL, "Length dependence of ntox"),
IOP( "leigbinv", BSIM4v4_MOD_LEIGBINV, IF_REAL, "Length dependence for eigbinv"),
IOP( "lpigcd", BSIM4v4_MOD_LPIGCD, IF_REAL, "Length dependence for pigcd"),
IOP( "lpoxedge", BSIM4v4_MOD_LPOXEDGE, IF_REAL, "Length dependence for poxedge"),
IOP( "lvfbcv", BSIM4v4_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"),
IOP( "lvfb", BSIM4v4_MOD_LVFB, IF_REAL, "Length dependence of vfb"),
IOP( "lacde", BSIM4v4_MOD_LACDE, IF_REAL, "Length dependence of acde"),
IOP( "lmoin", BSIM4v4_MOD_LMOIN, IF_REAL, "Length dependence of moin"),
IOP( "lnoff", BSIM4v4_MOD_LNOFF, IF_REAL, "Length dependence of noff"),
IOP( "lvoffcv", BSIM4v4_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"),
IOP( "lxrcrg1", BSIM4v4_MOD_LXRCRG1, IF_REAL, "Length dependence of xrcrg1"),
IOP( "lxrcrg2", BSIM4v4_MOD_LXRCRG2, IF_REAL, "Length dependence of xrcrg2"),
IOP( "llambda", BSIM4v4_MOD_LLAMBDA, IF_REAL, "Length dependence of lambda"),
IOP( "lvtl", BSIM4v4_MOD_LVTL, IF_REAL, " Length dependence of vtl"),
IOP( "lxn", BSIM4v4_MOD_LXN, IF_REAL, " Length dependence of xn"),
IOP( "leu", BSIM4v4_MOD_LEU, IF_REAL, " Length dependence of eu"),
IOP( "lvfbsdoff", BSIM4v4_MOD_LVFBSDOFF, IF_REAL, "Length dependence of vfbsdoff"),
IOP( "wcdsc", BSIM4v4_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"),
IOP( "wcdscb", BSIM4v4_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"),
IOP( "wcdscd", BSIM4v4_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"),
IOP( "wcit", BSIM4v4_MOD_WCIT, IF_REAL, "Width dependence of cit"),
IOP( "wnfactor", BSIM4v4_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"),
IOP( "wxj", BSIM4v4_MOD_WXJ, IF_REAL, "Width dependence of xj"),
IOP( "wvsat", BSIM4v4_MOD_WVSAT, IF_REAL, "Width dependence of vsat"),
IOP( "wat", BSIM4v4_MOD_WAT, IF_REAL, "Width dependence of at"),
IOP( "wa0", BSIM4v4_MOD_WA0, IF_REAL, "Width dependence of a0"),
IOP( "wags", BSIM4v4_MOD_WAGS, IF_REAL, "Width dependence of ags"),
IOP( "wa1", BSIM4v4_MOD_WA1, IF_REAL, "Width dependence of a1"),
IOP( "wa2", BSIM4v4_MOD_WA2, IF_REAL, "Width dependence of a2"),
IOP( "wketa", BSIM4v4_MOD_WKETA, IF_REAL, "Width dependence of keta"),
IOP( "wnsub", BSIM4v4_MOD_WNSUB, IF_REAL, "Width dependence of nsub"),
IOP( "wndep", BSIM4v4_MOD_WNDEP, IF_REAL, "Width dependence of ndep"),
IOP( "wnsd", BSIM4v4_MOD_WNSD, IF_REAL, "Width dependence of nsd"),
IOP( "wphin", BSIM4v4_MOD_WPHIN, IF_REAL, "Width dependence of phin"),
IOP( "wngate", BSIM4v4_MOD_WNGATE, IF_REAL, "Width dependence of ngate"),
IOP( "wgamma1", BSIM4v4_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"),
IOP( "wgamma2", BSIM4v4_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"),
IOP( "wvbx", BSIM4v4_MOD_WVBX, IF_REAL, "Width dependence of vbx"),
IOP( "wvbm", BSIM4v4_MOD_WVBM, IF_REAL, "Width dependence of vbm"),
IOP( "wxt", BSIM4v4_MOD_WXT, IF_REAL, "Width dependence of xt"),
IOP( "wk1", BSIM4v4_MOD_WK1, IF_REAL, "Width dependence of k1"),
IOP( "wkt1", BSIM4v4_MOD_WKT1, IF_REAL, "Width dependence of kt1"),
IOP( "wkt1l", BSIM4v4_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"),
IOP( "wkt2", BSIM4v4_MOD_WKT2, IF_REAL, "Width dependence of kt2"),
IOP( "wk2", BSIM4v4_MOD_WK2, IF_REAL, "Width dependence of k2"),
IOP( "wk3", BSIM4v4_MOD_WK3, IF_REAL, "Width dependence of k3"),
IOP( "wk3b", BSIM4v4_MOD_WK3B, IF_REAL, "Width dependence of k3b"),
IOP( "ww0", BSIM4v4_MOD_WW0, IF_REAL, "Width dependence of w0"),
IOP( "wdvtp0", BSIM4v4_MOD_WDVTP0, IF_REAL, "Width dependence of dvtp0"),
IOP( "wdvtp1", BSIM4v4_MOD_WDVTP1, IF_REAL, "Width dependence of dvtp1"),
IOP( "wlpe0", BSIM4v4_MOD_WLPE0, IF_REAL, "Width dependence of lpe0"),
IOP( "wlpeb", BSIM4v4_MOD_WLPEB, IF_REAL, "Width dependence of lpeb"),
IOP( "wdvt0", BSIM4v4_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"),
IOP( "wdvt1", BSIM4v4_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"),
IOP( "wdvt2", BSIM4v4_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"),
IOP( "wdvt0w", BSIM4v4_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"),
IOP( "wdvt1w", BSIM4v4_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"),
IOP( "wdvt2w", BSIM4v4_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"),
IOP( "wdrout", BSIM4v4_MOD_WDROUT, IF_REAL, "Width dependence of drout"),
IOP( "wdsub", BSIM4v4_MOD_WDSUB, IF_REAL, "Width dependence of dsub"),
IOP( "wvth0", BSIM4v4_MOD_WVTH0, IF_REAL,"Width dependence of vto"),
IOP( "wvtho", BSIM4v4_MOD_WVTH0, IF_REAL,"Width dependence of vto"),
IOP( "wua", BSIM4v4_MOD_WUA, IF_REAL, "Width dependence of ua"),
IOP( "wua1", BSIM4v4_MOD_WUA1, IF_REAL, "Width dependence of ua1"),
IOP( "wub", BSIM4v4_MOD_WUB, IF_REAL, "Width dependence of ub"),
IOP( "wub1", BSIM4v4_MOD_WUB1, IF_REAL, "Width dependence of ub1"),
IOP( "wuc", BSIM4v4_MOD_WUC, IF_REAL, "Width dependence of uc"),
IOP( "wuc1", BSIM4v4_MOD_WUC1, IF_REAL, "Width dependence of uc1"),
IOP( "wu0", BSIM4v4_MOD_WU0, IF_REAL, "Width dependence of u0"),
IOP( "wute", BSIM4v4_MOD_WUTE, IF_REAL, "Width dependence of ute"),
IOP( "wvoff", BSIM4v4_MOD_WVOFF, IF_REAL, "Width dependence of voff"),
IOP( "wminv", BSIM4v4_MOD_WMINV, IF_REAL, "Width dependence of minv"),
IOP( "wdelta", BSIM4v4_MOD_WDELTA, IF_REAL, "Width dependence of delta"),
IOP( "wrdsw", BSIM4v4_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "),
IOP( "wrsw", BSIM4v4_MOD_WRSW, IF_REAL, "Width dependence of rsw"),
IOP( "wrdw", BSIM4v4_MOD_WRDW, IF_REAL, "Width dependence of rdw"),
IOP( "wprwg", BSIM4v4_MOD_WPRWG, IF_REAL, "Width dependence of prwg "),
IOP( "wprwb", BSIM4v4_MOD_WPRWB, IF_REAL, "Width dependence of prwb "),
IOP( "wprt", BSIM4v4_MOD_WPRT, IF_REAL, "Width dependence of prt"),
IOP( "weta0", BSIM4v4_MOD_WETA0, IF_REAL, "Width dependence of eta0"),
IOP( "wetab", BSIM4v4_MOD_WETAB, IF_REAL, "Width dependence of etab"),
IOP( "wpclm", BSIM4v4_MOD_WPCLM, IF_REAL, "Width dependence of pclm"),
IOP( "wpdiblc1", BSIM4v4_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"),
IOP( "wpdiblc2", BSIM4v4_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"),
IOP( "wpdiblcb", BSIM4v4_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"),
IOP( "wfprout", BSIM4v4_MOD_WFPROUT, IF_REAL, "Width dependence of pdiblcb"),
IOP( "wpdits", BSIM4v4_MOD_WPDITS, IF_REAL, "Width dependence of pdits"),
IOP( "wpditsd", BSIM4v4_MOD_WPDITSD, IF_REAL, "Width dependence of pditsd"),
IOP( "wpscbe1", BSIM4v4_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"),
IOP( "wpscbe2", BSIM4v4_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"),
IOP( "wpvag", BSIM4v4_MOD_WPVAG, IF_REAL, "Width dependence of pvag"),
IOP( "wwr", BSIM4v4_MOD_WWR, IF_REAL, "Width dependence of wr"),
IOP( "wdwg", BSIM4v4_MOD_WDWG, IF_REAL, "Width dependence of dwg"),
IOP( "wdwb", BSIM4v4_MOD_WDWB, IF_REAL, "Width dependence of dwb"),
IOP( "wb0", BSIM4v4_MOD_WB0, IF_REAL, "Width dependence of b0"),
IOP( "wb1", BSIM4v4_MOD_WB1, IF_REAL, "Width dependence of b1"),
IOP( "wcgsl", BSIM4v4_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"),
IOP( "wcgdl", BSIM4v4_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"),
IOP( "wckappas", BSIM4v4_MOD_WCKAPPAS, IF_REAL, "Width dependence of ckappas"),
IOP( "wckappad", BSIM4v4_MOD_WCKAPPAD, IF_REAL, "Width dependence of ckappad"),
IOP( "wcf", BSIM4v4_MOD_WCF, IF_REAL, "Width dependence of cf"),
IOP( "wclc", BSIM4v4_MOD_WCLC, IF_REAL, "Width dependence of clc"),
IOP( "wcle", BSIM4v4_MOD_WCLE, IF_REAL, "Width dependence of cle"),
IOP( "walpha0", BSIM4v4_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"),
IOP( "walpha1", BSIM4v4_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"),
IOP( "wbeta0", BSIM4v4_MOD_WBETA0, IF_REAL, "Width dependence of beta0"),
IOP( "wagidl", BSIM4v4_MOD_WAGIDL, IF_REAL, "Width dependence of agidl"),
IOP( "wbgidl", BSIM4v4_MOD_WBGIDL, IF_REAL, "Width dependence of bgidl"),
IOP( "wcgidl", BSIM4v4_MOD_WCGIDL, IF_REAL, "Width dependence of cgidl"),
IOP( "wegidl", BSIM4v4_MOD_WEGIDL, IF_REAL, "Width dependence of egidl"),
IOP( "waigc", BSIM4v4_MOD_WAIGC, IF_REAL, "Width dependence of aigc"),
IOP( "wbigc", BSIM4v4_MOD_WBIGC, IF_REAL, "Width dependence of bigc"),
IOP( "wcigc", BSIM4v4_MOD_WCIGC, IF_REAL, "Width dependence of cigc"),
IOP( "waigsd", BSIM4v4_MOD_WAIGSD, IF_REAL, "Width dependence of aigsd"),
IOP( "wbigsd", BSIM4v4_MOD_WBIGSD, IF_REAL, "Width dependence of bigsd"),
IOP( "wcigsd", BSIM4v4_MOD_WCIGSD, IF_REAL, "Width dependence of cigsd"),
IOP( "waigbacc", BSIM4v4_MOD_WAIGBACC, IF_REAL, "Width dependence of aigbacc"),
IOP( "wbigbacc", BSIM4v4_MOD_WBIGBACC, IF_REAL, "Width dependence of bigbacc"),
IOP( "wcigbacc", BSIM4v4_MOD_WCIGBACC, IF_REAL, "Width dependence of cigbacc"),
IOP( "waigbinv", BSIM4v4_MOD_WAIGBINV, IF_REAL, "Width dependence of aigbinv"),
IOP( "wbigbinv", BSIM4v4_MOD_WBIGBINV, IF_REAL, "Width dependence of bigbinv"),
IOP( "wcigbinv", BSIM4v4_MOD_WCIGBINV, IF_REAL, "Width dependence of cigbinv"),
IOP( "wnigc", BSIM4v4_MOD_WNIGC, IF_REAL, "Width dependence of nigc"),
IOP( "wnigbinv", BSIM4v4_MOD_WNIGBINV, IF_REAL, "Width dependence of nigbinv"),
IOP( "wnigbacc", BSIM4v4_MOD_WNIGBACC, IF_REAL, "Width dependence of nigbacc"),
IOP( "wntox", BSIM4v4_MOD_WNTOX, IF_REAL, "Width dependence of ntox"),
IOP( "weigbinv", BSIM4v4_MOD_WEIGBINV, IF_REAL, "Width dependence for eigbinv"),
IOP( "wpigcd", BSIM4v4_MOD_WPIGCD, IF_REAL, "Width dependence for pigcd"),
IOP( "wpoxedge", BSIM4v4_MOD_WPOXEDGE, IF_REAL, "Width dependence for poxedge"),
IOP( "wvfbcv", BSIM4v4_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"),
IOP( "wvfb", BSIM4v4_MOD_WVFB, IF_REAL, "Width dependence of vfb"),
IOP( "wacde", BSIM4v4_MOD_WACDE, IF_REAL, "Width dependence of acde"),
IOP( "wmoin", BSIM4v4_MOD_WMOIN, IF_REAL, "Width dependence of moin"),
IOP( "wnoff", BSIM4v4_MOD_WNOFF, IF_REAL, "Width dependence of noff"),
IOP( "wvoffcv", BSIM4v4_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"),
IOP( "wxrcrg1", BSIM4v4_MOD_WXRCRG1, IF_REAL, "Width dependence of xrcrg1"),
IOP( "wxrcrg2", BSIM4v4_MOD_WXRCRG2, IF_REAL, "Width dependence of xrcrg2"),
IOP( "wlambda", BSIM4v4_MOD_WLAMBDA, IF_REAL, "Width dependence of lambda"),
IOP( "wvtl", BSIM4v4_MOD_WVTL, IF_REAL, "Width dependence of vtl"),
IOP( "wxn", BSIM4v4_MOD_WXN, IF_REAL, "Width dependence of xn"),
IOP( "weu", BSIM4v4_MOD_WEU, IF_REAL, "Width dependence of eu"),
IOP( "wvfbsdoff", BSIM4v4_MOD_WVFBSDOFF, IF_REAL, "Width dependence of vfbsdoff"),
IOP( "pcdsc", BSIM4v4_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"),
IOP( "pcdscb", BSIM4v4_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"),
IOP( "pcdscd", BSIM4v4_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"),
IOP( "pcit", BSIM4v4_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"),
IOP( "pnfactor", BSIM4v4_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"),
IOP( "pxj", BSIM4v4_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"),
IOP( "pvsat", BSIM4v4_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"),
IOP( "pat", BSIM4v4_MOD_PAT, IF_REAL, "Cross-term dependence of at"),
IOP( "pa0", BSIM4v4_MOD_PA0, IF_REAL, "Cross-term dependence of a0"),
IOP( "pags", BSIM4v4_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"),
IOP( "pa1", BSIM4v4_MOD_PA1, IF_REAL, "Cross-term dependence of a1"),
IOP( "pa2", BSIM4v4_MOD_PA2, IF_REAL, "Cross-term dependence of a2"),
IOP( "pketa", BSIM4v4_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"),
IOP( "pnsub", BSIM4v4_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"),
IOP( "pndep", BSIM4v4_MOD_PNDEP, IF_REAL, "Cross-term dependence of ndep"),
IOP( "pnsd", BSIM4v4_MOD_PNSD, IF_REAL, "Cross-term dependence of nsd"),
IOP( "pphin", BSIM4v4_MOD_PPHIN, IF_REAL, "Cross-term dependence of phin"),
IOP( "pngate", BSIM4v4_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"),
IOP( "pgamma1", BSIM4v4_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"),
IOP( "pgamma2", BSIM4v4_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"),
IOP( "pvbx", BSIM4v4_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"),
IOP( "pvbm", BSIM4v4_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"),
IOP( "pxt", BSIM4v4_MOD_PXT, IF_REAL, "Cross-term dependence of xt"),
IOP( "pk1", BSIM4v4_MOD_PK1, IF_REAL, "Cross-term dependence of k1"),
IOP( "pkt1", BSIM4v4_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"),
IOP( "pkt1l", BSIM4v4_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"),
IOP( "pkt2", BSIM4v4_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"),
IOP( "pk2", BSIM4v4_MOD_PK2, IF_REAL, "Cross-term dependence of k2"),
IOP( "pk3", BSIM4v4_MOD_PK3, IF_REAL, "Cross-term dependence of k3"),
IOP( "pk3b", BSIM4v4_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"),
IOP( "pw0", BSIM4v4_MOD_PW0, IF_REAL, "Cross-term dependence of w0"),
IOP( "pdvtp0", BSIM4v4_MOD_PDVTP0, IF_REAL, "Cross-term dependence of dvtp0"),
IOP( "pdvtp1", BSIM4v4_MOD_PDVTP1, IF_REAL, "Cross-term dependence of dvtp1"),
IOP( "plpe0", BSIM4v4_MOD_PLPE0, IF_REAL, "Cross-term dependence of lpe0"),
IOP( "plpeb", BSIM4v4_MOD_PLPEB, IF_REAL, "Cross-term dependence of lpeb"),
IOP( "pdvt0", BSIM4v4_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"),
IOP( "pdvt1", BSIM4v4_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"),
IOP( "pdvt2", BSIM4v4_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"),
IOP( "pdvt0w", BSIM4v4_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"),
IOP( "pdvt1w", BSIM4v4_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"),
IOP( "pdvt2w", BSIM4v4_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"),
IOP( "pdrout", BSIM4v4_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"),
IOP( "pdsub", BSIM4v4_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"),
IOP( "pvth0", BSIM4v4_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"),
IOP( "pvtho", BSIM4v4_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"),
IOP( "pua", BSIM4v4_MOD_PUA, IF_REAL, "Cross-term dependence of ua"),
IOP( "pua1", BSIM4v4_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"),
IOP( "pub", BSIM4v4_MOD_PUB, IF_REAL, "Cross-term dependence of ub"),
IOP( "pub1", BSIM4v4_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"),
IOP( "puc", BSIM4v4_MOD_PUC, IF_REAL, "Cross-term dependence of uc"),
IOP( "puc1", BSIM4v4_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"),
IOP( "pu0", BSIM4v4_MOD_PU0, IF_REAL, "Cross-term dependence of u0"),
IOP( "pute", BSIM4v4_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"),
IOP( "pvoff", BSIM4v4_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"),
IOP( "pminv", BSIM4v4_MOD_PMINV, IF_REAL, "Cross-term dependence of minv"),
IOP( "pdelta", BSIM4v4_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"),
IOP( "prdsw", BSIM4v4_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "),
IOP( "prsw", BSIM4v4_MOD_PRSW, IF_REAL, "Cross-term dependence of rsw"),
IOP( "prdw", BSIM4v4_MOD_PRDW, IF_REAL, "Cross-term dependence of rdw"),
IOP( "pprwg", BSIM4v4_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "),
IOP( "pprwb", BSIM4v4_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "),
IOP( "pprt", BSIM4v4_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "),
IOP( "peta0", BSIM4v4_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"),
IOP( "petab", BSIM4v4_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"),
IOP( "ppclm", BSIM4v4_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"),
IOP( "ppdiblc1", BSIM4v4_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"),
IOP( "ppdiblc2", BSIM4v4_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"),
IOP( "ppdiblcb", BSIM4v4_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"),
IOP( "pfprout", BSIM4v4_MOD_PFPROUT, IF_REAL, "Cross-term dependence of pdiblcb"),
IOP( "ppdits", BSIM4v4_MOD_PPDITS, IF_REAL, "Cross-term dependence of pdits"),
IOP( "ppditsd", BSIM4v4_MOD_PPDITSD, IF_REAL, "Cross-term dependence of pditsd"),
IOP( "ppscbe1", BSIM4v4_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"),
IOP( "ppscbe2", BSIM4v4_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"),
IOP( "ppvag", BSIM4v4_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"),
IOP( "pwr", BSIM4v4_MOD_PWR, IF_REAL, "Cross-term dependence of wr"),
IOP( "pdwg", BSIM4v4_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"),
IOP( "pdwb", BSIM4v4_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"),
IOP( "pb0", BSIM4v4_MOD_PB0, IF_REAL, "Cross-term dependence of b0"),
IOP( "pb1", BSIM4v4_MOD_PB1, IF_REAL, "Cross-term dependence of b1"),
IOP( "pcgsl", BSIM4v4_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"),
IOP( "pcgdl", BSIM4v4_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"),
IOP( "pckappas", BSIM4v4_MOD_PCKAPPAS, IF_REAL, "Cross-term dependence of ckappas"),
IOP( "pckappad", BSIM4v4_MOD_PCKAPPAD, IF_REAL, "Cross-term dependence of ckappad"),
IOP( "pcf", BSIM4v4_MOD_PCF, IF_REAL, "Cross-term dependence of cf"),
IOP( "pclc", BSIM4v4_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"),
IOP( "pcle", BSIM4v4_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"),
IOP( "palpha0", BSIM4v4_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"),
IOP( "palpha1", BSIM4v4_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"),
IOP( "pbeta0", BSIM4v4_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"),
IOP( "pagidl", BSIM4v4_MOD_PAGIDL, IF_REAL, "Cross-term dependence of agidl"),
IOP( "pbgidl", BSIM4v4_MOD_PBGIDL, IF_REAL, "Cross-term dependence of bgidl"),
IOP( "pcgidl", BSIM4v4_MOD_PCGIDL, IF_REAL, "Cross-term dependence of cgidl"),
IOP( "pegidl", BSIM4v4_MOD_PEGIDL, IF_REAL, "Cross-term dependence of egidl"),
IOP( "paigc", BSIM4v4_MOD_PAIGC, IF_REAL, "Cross-term dependence of aigc"),
IOP( "pbigc", BSIM4v4_MOD_PBIGC, IF_REAL, "Cross-term dependence of bigc"),
IOP( "pcigc", BSIM4v4_MOD_PCIGC, IF_REAL, "Cross-term dependence of cigc"),
IOP( "paigsd", BSIM4v4_MOD_PAIGSD, IF_REAL, "Cross-term dependence of aigsd"),
IOP( "pbigsd", BSIM4v4_MOD_PBIGSD, IF_REAL, "Cross-term dependence of bigsd"),
IOP( "pcigsd", BSIM4v4_MOD_PCIGSD, IF_REAL, "Cross-term dependence of cigsd"),
IOP( "paigbacc", BSIM4v4_MOD_PAIGBACC, IF_REAL, "Cross-term dependence of aigbacc"),
IOP( "pbigbacc", BSIM4v4_MOD_PBIGBACC, IF_REAL, "Cross-term dependence of bigbacc"),
IOP( "pcigbacc", BSIM4v4_MOD_PCIGBACC, IF_REAL, "Cross-term dependence of cigbacc"),
IOP( "paigbinv", BSIM4v4_MOD_PAIGBINV, IF_REAL, "Cross-term dependence of aigbinv"),
IOP( "pbigbinv", BSIM4v4_MOD_PBIGBINV, IF_REAL, "Cross-term dependence of bigbinv"),
IOP( "pcigbinv", BSIM4v4_MOD_PCIGBINV, IF_REAL, "Cross-term dependence of cigbinv"),
IOP( "pnigc", BSIM4v4_MOD_PNIGC, IF_REAL, "Cross-term dependence of nigc"),
IOP( "pnigbinv", BSIM4v4_MOD_PNIGBINV, IF_REAL, "Cross-term dependence of nigbinv"),
IOP( "pnigbacc", BSIM4v4_MOD_PNIGBACC, IF_REAL, "Cross-term dependence of nigbacc"),
IOP( "pntox", BSIM4v4_MOD_PNTOX, IF_REAL, "Cross-term dependence of ntox"),
IOP( "peigbinv", BSIM4v4_MOD_PEIGBINV, IF_REAL, "Cross-term dependence for eigbinv"),
IOP( "ppigcd", BSIM4v4_MOD_PPIGCD, IF_REAL, "Cross-term dependence for pigcd"),
IOP( "ppoxedge", BSIM4v4_MOD_PPOXEDGE, IF_REAL, "Cross-term dependence for poxedge"),
IOP( "pvfbcv", BSIM4v4_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"),
IOP( "pvfb", BSIM4v4_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"),
IOP( "pacde", BSIM4v4_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"),
IOP( "pmoin", BSIM4v4_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"),
IOP( "pnoff", BSIM4v4_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"),
IOP( "pvoffcv", BSIM4v4_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"),
IOP( "pxrcrg1", BSIM4v4_MOD_PXRCRG1, IF_REAL, "Cross-term dependence of xrcrg1"),
IOP( "pxrcrg2", BSIM4v4_MOD_PXRCRG2, IF_REAL, "Cross-term dependence of xrcrg2"),
IOP( "plambda", BSIM4v4_MOD_PLAMBDA, IF_REAL, "Cross-term dependence of lambda"),
IOP( "pvtl", BSIM4v4_MOD_PVTL, IF_REAL, "Cross-term dependence of vtl"),
IOP( "pxn", BSIM4v4_MOD_PXN, IF_REAL, "Cross-term dependence of xn"),
IOP( "peu", BSIM4v4_MOD_PEU, IF_REAL, "Cross-term dependence of eu"),
IOP( "pvfbsdoff", BSIM4v4_MOD_PVFBSDOFF, IF_REAL, "Cross-term dependence of vfbsdoff"),
/* stress effect*/
IOP( "saref", BSIM4v4_MOD_SAREF, IF_REAL, "Reference distance between OD edge to poly of one side"),
IOP( "sbref", BSIM4v4_MOD_SBREF, IF_REAL, "Reference distance between OD edge to poly of the other side"),
IOP( "wlod", BSIM4v4_MOD_WLOD, IF_REAL, "Width parameter for stress effect"),
IOP( "ku0", BSIM4v4_MOD_KU0, IF_REAL, "Mobility degradation/enhancement coefficient for LOD"),
IOP( "kvsat", BSIM4v4_MOD_KVSAT, IF_REAL, "Saturation velocity degradation/enhancement parameter for LOD"),
IOP( "kvth0", BSIM4v4_MOD_KVTH0, IF_REAL, "Threshold degradation/enhancement parameter for LOD"),
IOP( "tku0", BSIM4v4_MOD_TKU0, IF_REAL, "Temperature coefficient of KU0"),
IOP( "llodku0", BSIM4v4_MOD_LLODKU0, IF_REAL, "Length parameter for u0 LOD effect"),
IOP( "wlodku0", BSIM4v4_MOD_WLODKU0, IF_REAL, "Width parameter for u0 LOD effect"),
IOP( "llodvth", BSIM4v4_MOD_LLODVTH, IF_REAL, "Length parameter for vth LOD effect"),
IOP( "wlodvth", BSIM4v4_MOD_WLODVTH, IF_REAL, "Width parameter for vth LOD effect"),
IOP( "lku0", BSIM4v4_MOD_LKU0, IF_REAL, "Length dependence of ku0"),
IOP( "wku0", BSIM4v4_MOD_WKU0, IF_REAL, "Width dependence of ku0"),
IOP( "pku0", BSIM4v4_MOD_PKU0, IF_REAL, "Cross-term dependence of ku0"),
IOP( "lkvth0", BSIM4v4_MOD_LKVTH0, IF_REAL, "Length dependence of kvth0"),
IOP( "wkvth0", BSIM4v4_MOD_WKVTH0, IF_REAL, "Width dependence of kvth0"),
IOP( "pkvth0", BSIM4v4_MOD_PKVTH0, IF_REAL, "Cross-term dependence of kvth0"),
IOP( "stk2", BSIM4v4_MOD_STK2, IF_REAL, "K2 shift factor related to stress effect on vth"),
IOP( "lodk2", BSIM4v4_MOD_LODK2, IF_REAL, "K2 shift modification factor for stress effect"),
IOP( "steta0", BSIM4v4_MOD_STETA0, IF_REAL, "eta0 shift factor related to stress effect on vth"),
IOP( "lodeta0", BSIM4v4_MOD_LODETA0, IF_REAL, "eta0 shift modification factor for stress effect"),
IOP( "noia", BSIM4v4_MOD_NOIA, IF_REAL, "Flicker noise parameter"),
IOP( "noib", BSIM4v4_MOD_NOIB, IF_REAL, "Flicker noise parameter"),
IOP( "noic", BSIM4v4_MOD_NOIC, IF_REAL, "Flicker noise parameter"),
IOP( "tnoia", BSIM4v4_MOD_TNOIA, IF_REAL, "Thermal noise parameter"),
IOP( "tnoib", BSIM4v4_MOD_TNOIB, IF_REAL, "Thermal noise parameter"),
IOP( "rnoia", BSIM4v4_MOD_RNOIA, IF_REAL, "Thermal noise coefficient"),
IOP( "rnoib", BSIM4v4_MOD_RNOIB, IF_REAL, "Thermal noise coefficient"),
IOP( "ntnoi", BSIM4v4_MOD_NTNOI, IF_REAL, "Thermal noise parameter"),
IOP( "em", BSIM4v4_MOD_EM, IF_REAL, "Flicker noise parameter"),
IOP( "ef", BSIM4v4_MOD_EF, IF_REAL, "Flicker noise frequency exponent"),
IOP( "af", BSIM4v4_MOD_AF, IF_REAL, "Flicker noise exponent"),
IOP( "kf", BSIM4v4_MOD_KF, IF_REAL, "Flicker noise coefficient"),
IP( "nmos", BSIM4v4_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"),
IP( "pmos", BSIM4v4_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"),
};
char *BSIM4v4names[] = {
"Drain",
"Gate",
"Source",
"Bulk",
"Charge"
};
int BSIM4v4nSize = NUMELEMS(BSIM4v4names);
int BSIM4v4pTSize = NUMELEMS(BSIM4v4pTable);
int BSIM4v4mPTSize = NUMELEMS(BSIM4v4mPTable);
int BSIM4v4iSize = sizeof(BSIM4v4instance);
int BSIM4v4mSize = sizeof(BSIM4v4model);

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src/spicelib/devices/bsim4v4/b4v4acld.c
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@ -1,672 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4acld.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 10/05/2001.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM4v4acLoad(
GENmodel *inModel,
CKTcircuit *ckt)
{
BSIM4v4model *model = (BSIM4v4model*)inModel;
BSIM4v4instance *here;
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
double xcbgb, xcbdb, xcbsb, xcbbb;
double xcggbr, xcgdbr, xcgsbr, xcgbbr, xcggbi, xcgdbi, xcgsbi, xcgbbi;
double Cggr, Cgdr, Cgsr, Cgbr, Cggi, Cgdi, Cgsi, Cgbi;
double xcddbr, xcdgbr, xcdsbr, xcdbbr, xcsdbr, xcsgbr, xcssbr, xcsbbr;
double xcddbi, xcdgbi, xcdsbi, xcdbbi, xcsdbi, xcsgbi, xcssbi, xcsbbi;
double xcdbdb, xcsbsb=0.0, xcgmgmb=0.0, xcgmdb=0.0, xcgmsb=0.0, xcdgmb, xcsgmb;
double xcgmbb=0.0, xcbgmb;
double capbd, capbs, omega;
double gstot, gstotd, gstotg, gstots, gstotb, gspr;
double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr;
double gIstotg, gIstotd, gIstots, gIstotb;
double gIdtotg, gIdtotd, gIdtots, gIdtotb;
double gIbtotg, gIbtotd, gIbtots, gIbtotb;
double gIgtotg, gIgtotd, gIgtots, gIgtotb;
double cgso, cgdo, cgbo;
double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
double T0=0.0, T1, T2, T3;
double Csg, Csd, Css;
double Cdgr, Cddr, Cdsr, Cdbr, Csgr, Csdr, Cssr, Csbr;
double Cdgi, Cddi, Cdsi, Cdbi, Csgi, Csdi, Cssi, Csbi;
double gmr, gmi, gmbsr, gmbsi, gdsr, gdsi;
double FwdSumr, RevSumr, Gmr, Gmbsr;
double FwdSumi, RevSumi, Gmi, Gmbsi;
struct bsim4SizeDependParam *pParam;
double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls;
double m;
omega = ckt->CKTomega;
for (; model != NULL; model = model->BSIM4v4nextModel)
{ for (here = model->BSIM4v4instances; here!= NULL;
here = here->BSIM4v4nextInstance)
{
pParam = here->pParam;
capbd = here->BSIM4v4capbd;
capbs = here->BSIM4v4capbs;
cgso = here->BSIM4v4cgso;
cgdo = here->BSIM4v4cgdo;
cgbo = pParam->BSIM4v4cgbo;
Csd = -(here->BSIM4v4cddb + here->BSIM4v4cgdb + here->BSIM4v4cbdb);
Csg = -(here->BSIM4v4cdgb + here->BSIM4v4cggb + here->BSIM4v4cbgb);
Css = -(here->BSIM4v4cdsb + here->BSIM4v4cgsb + here->BSIM4v4cbsb);
if (here->BSIM4v4acnqsMod)
{ T0 = omega * here->BSIM4v4taunet;
T1 = T0 * T0;
T2 = 1.0 / (1.0 + T1);
T3 = T0 * T2;
gmr = here->BSIM4v4gm * T2;
gmbsr = here->BSIM4v4gmbs * T2;
gdsr = here->BSIM4v4gds * T2;
gmi = -here->BSIM4v4gm * T3;
gmbsi = -here->BSIM4v4gmbs * T3;
gdsi = -here->BSIM4v4gds * T3;
Cddr = here->BSIM4v4cddb * T2;
Cdgr = here->BSIM4v4cdgb * T2;
Cdsr = here->BSIM4v4cdsb * T2;
Cdbr = -(Cddr + Cdgr + Cdsr);
/* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */
Cddi = here->BSIM4v4cddb * T3 * omega;
Cdgi = here->BSIM4v4cdgb * T3 * omega;
Cdsi = here->BSIM4v4cdsb * T3 * omega;
Cdbi = -(Cddi + Cdgi + Cdsi);
Csdr = Csd * T2;
Csgr = Csg * T2;
Cssr = Css * T2;
Csbr = -(Csdr + Csgr + Cssr);
Csdi = Csd * T3 * omega;
Csgi = Csg * T3 * omega;
Cssi = Css * T3 * omega;
Csbi = -(Csdi + Csgi + Cssi);
Cgdr = -(Cddr + Csdr + here->BSIM4v4cbdb);
Cggr = -(Cdgr + Csgr + here->BSIM4v4cbgb);
Cgsr = -(Cdsr + Cssr + here->BSIM4v4cbsb);
Cgbr = -(Cgdr + Cggr + Cgsr);
Cgdi = -(Cddi + Csdi);
Cggi = -(Cdgi + Csgi);
Cgsi = -(Cdsi + Cssi);
Cgbi = -(Cgdi + Cggi + Cgsi);
}
else /* QS */
{ gmr = here->BSIM4v4gm;
gmbsr = here->BSIM4v4gmbs;
gdsr = here->BSIM4v4gds;
gmi = gmbsi = gdsi = 0.0;
Cddr = here->BSIM4v4cddb;
Cdgr = here->BSIM4v4cdgb;
Cdsr = here->BSIM4v4cdsb;
Cdbr = -(Cddr + Cdgr + Cdsr);
Cddi = Cdgi = Cdsi = Cdbi = 0.0;
Csdr = Csd;
Csgr = Csg;
Cssr = Css;
Csbr = -(Csdr + Csgr + Cssr);
Csdi = Csgi = Cssi = Csbi = 0.0;
Cgdr = here->BSIM4v4cgdb;
Cggr = here->BSIM4v4cggb;
Cgsr = here->BSIM4v4cgsb;
Cgbr = -(Cgdr + Cggr + Cgsr);
Cgdi = Cggi = Cgsi = Cgbi = 0.0;
}
if (here->BSIM4v4mode >= 0)
{ Gmr = gmr;
Gmbsr = gmbsr;
FwdSumr = Gmr + Gmbsr;
RevSumr = 0.0;
Gmi = gmi;
Gmbsi = gmbsi;
FwdSumi = Gmi + Gmbsi;
RevSumi = 0.0;
gbbdp = -(here->BSIM4v4gbds);
gbbsp = here->BSIM4v4gbds + here->BSIM4v4gbgs + here->BSIM4v4gbbs;
gbdpg = here->BSIM4v4gbgs;
gbdpdp = here->BSIM4v4gbds;
gbdpb = here->BSIM4v4gbbs;
gbdpsp = -(gbdpg + gbdpdp + gbdpb);
gbspdp = 0.0;
gbspg = 0.0;
gbspb = 0.0;
gbspsp = 0.0;
if (model->BSIM4v4igcMod)
{ gIstotg = here->BSIM4v4gIgsg + here->BSIM4v4gIgcsg;
gIstotd = here->BSIM4v4gIgcsd;
gIstots = here->BSIM4v4gIgss + here->BSIM4v4gIgcss;
gIstotb = here->BSIM4v4gIgcsb;
gIdtotg = here->BSIM4v4gIgdg + here->BSIM4v4gIgcdg;
gIdtotd = here->BSIM4v4gIgdd + here->BSIM4v4gIgcdd;
gIdtots = here->BSIM4v4gIgcds;
gIdtotb = here->BSIM4v4gIgcdb;
}
else
{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
}
if (model->BSIM4v4igbMod)
{ gIbtotg = here->BSIM4v4gIgbg;
gIbtotd = here->BSIM4v4gIgbd;
gIbtots = here->BSIM4v4gIgbs;
gIbtotb = here->BSIM4v4gIgbb;
}
else
gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
if ((model->BSIM4v4igcMod != 0) || (model->BSIM4v4igbMod != 0))
{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
gIgtotd = gIstotd + gIdtotd + gIbtotd ;
gIgtots = gIstots + gIdtots + gIbtots;
gIgtotb = gIstotb + gIdtotb + gIbtotb;
}
else
gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
if (here->BSIM4v4rgateMod == 2)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vges)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
else if (here->BSIM4v4rgateMod == 3)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vgms)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
if (here->BSIM4v4rgateMod > 1)
{ gcrgd = here->BSIM4v4gcrgd * T0;
gcrgg = here->BSIM4v4gcrgg * T0;
gcrgs = here->BSIM4v4gcrgs * T0;
gcrgb = here->BSIM4v4gcrgb * T0;
gcrgg -= here->BSIM4v4gcrg;
gcrg = here->BSIM4v4gcrg;
}
else
gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
if (here->BSIM4v4rgateMod == 3)
{ xcgmgmb = (cgdo + cgso + pParam->BSIM4v4cgbo) * omega;
xcgmdb = -cgdo * omega;
xcgmsb = -cgso * omega;
xcgmbb = -pParam->BSIM4v4cgbo * omega;
xcdgmb = xcgmdb;
xcsgmb = xcgmsb;
xcbgmb = xcgmbb;
xcggbr = Cggr * omega;
xcgdbr = Cgdr * omega;
xcgsbr = Cgsr * omega;
xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
xcdgbr = Cdgr * omega;
xcsgbr = Csgr * omega;
xcbgb = here->BSIM4v4cbgb * omega;
}
else
{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v4cgbo ) * omega;
xcgdbr = (Cgdr - cgdo) * omega;
xcgsbr = (Cgsr - cgso) * omega;
xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
xcdgbr = (Cdgr - cgdo) * omega;
xcsgbr = (Csgr - cgso) * omega;
xcbgb = (here->BSIM4v4cbgb - pParam->BSIM4v4cgbo) * omega;
xcdgmb = xcsgmb = xcbgmb = 0.0;
}
xcddbr = (Cddr + here->BSIM4v4capbd + cgdo) * omega;
xcdsbr = Cdsr * omega;
xcsdbr = Csdr * omega;
xcssbr = (here->BSIM4v4capbs + cgso + Cssr) * omega;
if (!here->BSIM4v4rbodyMod)
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
xcbdb = (here->BSIM4v4cbdb - here->BSIM4v4capbd) * omega;
xcbsb = (here->BSIM4v4cbsb - here->BSIM4v4capbs) * omega;
xcdbdb = 0.0;
}
else
{ xcdbbr = Cdbr * omega;
xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb)
+ here->BSIM4v4capbs * omega;
xcbdb = here->BSIM4v4cbdb * omega;
xcbsb = here->BSIM4v4cbsb * omega;
xcdbdb = -here->BSIM4v4capbd * omega;
xcsbsb = -here->BSIM4v4capbs * omega;
}
xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb);
xcdgbi = Cdgi;
xcsgbi = Csgi;
xcddbi = Cddi;
xcdsbi = Cdsi;
xcsdbi = Csdi;
xcssbi = Cssi;
xcdbbi = Cdbi;
xcsbbi = Csbi;
xcggbi = Cggi;
xcgdbi = Cgdi;
xcgsbi = Cgsi;
xcgbbi = Cgbi;
}
else /* Reverse mode */
{ Gmr = -gmr;
Gmbsr = -gmbsr;
FwdSumr = 0.0;
RevSumr = -(Gmr + Gmbsr);
Gmi = -gmi;
Gmbsi = -gmbsi;
FwdSumi = 0.0;
RevSumi = -(Gmi + Gmbsi);
gbbsp = -(here->BSIM4v4gbds);
gbbdp = here->BSIM4v4gbds + here->BSIM4v4gbgs + here->BSIM4v4gbbs;
gbdpg = 0.0;
gbdpsp = 0.0;
gbdpb = 0.0;
gbdpdp = 0.0;
gbspg = here->BSIM4v4gbgs;
gbspsp = here->BSIM4v4gbds;
gbspb = here->BSIM4v4gbbs;
gbspdp = -(gbspg + gbspsp + gbspb);
if (model->BSIM4v4igcMod)
{ gIstotg = here->BSIM4v4gIgsg + here->BSIM4v4gIgcdg;
gIstotd = here->BSIM4v4gIgcds;
gIstots = here->BSIM4v4gIgss + here->BSIM4v4gIgcdd;
gIstotb = here->BSIM4v4gIgcdb;
gIdtotg = here->BSIM4v4gIgdg + here->BSIM4v4gIgcsg;
gIdtotd = here->BSIM4v4gIgdd + here->BSIM4v4gIgcss;
gIdtots = here->BSIM4v4gIgcsd;
gIdtotb = here->BSIM4v4gIgcsb;
}
else
{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
}
if (model->BSIM4v4igbMod)
{ gIbtotg = here->BSIM4v4gIgbg;
gIbtotd = here->BSIM4v4gIgbs;
gIbtots = here->BSIM4v4gIgbd;
gIbtotb = here->BSIM4v4gIgbb;
}
else
gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
if ((model->BSIM4v4igcMod != 0) || (model->BSIM4v4igbMod != 0))
{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
gIgtotd = gIstotd + gIdtotd + gIbtotd ;
gIgtots = gIstots + gIdtots + gIbtots;
gIgtotb = gIstotb + gIdtotb + gIbtotb;
}
else
gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
if (here->BSIM4v4rgateMod == 2)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vges)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
else if (here->BSIM4v4rgateMod == 3)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vgms)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
if (here->BSIM4v4rgateMod > 1)
{ gcrgd = here->BSIM4v4gcrgs * T0;
gcrgg = here->BSIM4v4gcrgg * T0;
gcrgs = here->BSIM4v4gcrgd * T0;
gcrgb = here->BSIM4v4gcrgb * T0;
gcrgg -= here->BSIM4v4gcrg;
gcrg = here->BSIM4v4gcrg;
}
else
gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
if (here->BSIM4v4rgateMod == 3)
{ xcgmgmb = (cgdo + cgso + pParam->BSIM4v4cgbo) * omega;
xcgmdb = -cgdo * omega;
xcgmsb = -cgso * omega;
xcgmbb = -pParam->BSIM4v4cgbo * omega;
xcdgmb = xcgmdb;
xcsgmb = xcgmsb;
xcbgmb = xcgmbb;
xcggbr = Cggr * omega;
xcgdbr = Cgsr * omega;
xcgsbr = Cgdr * omega;
xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
xcdgbr = Csgr * omega;
xcsgbr = Cdgr * omega;
xcbgb = here->BSIM4v4cbgb * omega;
}
else
{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v4cgbo ) * omega;
xcgdbr = (Cgsr - cgdo) * omega;
xcgsbr = (Cgdr - cgso) * omega;
xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
xcdgbr = (Csgr - cgdo) * omega;
xcsgbr = (Cdgr - cgso) * omega;
xcbgb = (here->BSIM4v4cbgb - pParam->BSIM4v4cgbo) * omega;
xcdgmb = xcsgmb = xcbgmb = 0.0;
}
xcddbr = (here->BSIM4v4capbd + cgdo + Cssr) * omega;
xcdsbr = Csdr * omega;
xcsdbr = Cdsr * omega;
xcssbr = (Cddr + here->BSIM4v4capbs + cgso) * omega;
if (!here->BSIM4v4rbodyMod)
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
xcbdb = (here->BSIM4v4cbsb - here->BSIM4v4capbd) * omega;
xcbsb = (here->BSIM4v4cbdb - here->BSIM4v4capbs) * omega;
xcdbdb = 0.0;
}
else
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb)
+ here->BSIM4v4capbd * omega;
xcsbbr = Cdbr * omega;
xcbdb = here->BSIM4v4cbsb * omega;
xcbsb = here->BSIM4v4cbdb * omega;
xcdbdb = -here->BSIM4v4capbd * omega;
xcsbsb = -here->BSIM4v4capbs * omega;
}
xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb);
xcdgbi = Csgi;
xcsgbi = Cdgi;
xcddbi = Cssi;
xcdsbi = Csdi;
xcsdbi = Cdsi;
xcssbi = Cddi;
xcdbbi = Csbi;
xcsbbi = Cdbi;
xcggbi = Cggi;
xcgdbi = Cgsi;
xcgsbi = Cgdi;
xcgbbi = Cgbi;
}
if (model->BSIM4v4rdsMod == 1)
{ gstot = here->BSIM4v4gstot;
gstotd = here->BSIM4v4gstotd;
gstotg = here->BSIM4v4gstotg;
gstots = here->BSIM4v4gstots - gstot;
gstotb = here->BSIM4v4gstotb;
gdtot = here->BSIM4v4gdtot;
gdtotd = here->BSIM4v4gdtotd - gdtot;
gdtotg = here->BSIM4v4gdtotg;
gdtots = here->BSIM4v4gdtots;
gdtotb = here->BSIM4v4gdtotb;
}
else
{ gstot = gstotd = gstotg = gstots = gstotb = 0.0;
gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0;
}
/*
* Loading AC matrix
*/
m = here->BSIM4v4m;
if (!model->BSIM4v4rdsMod)
{ gdpr = here->BSIM4v4drainConductance;
gspr = here->BSIM4v4sourceConductance;
}
else
gdpr = gspr = 0.0;
if (!here->BSIM4v4rbodyMod)
{ gjbd = here->BSIM4v4gbd;
gjbs = here->BSIM4v4gbs;
}
else
gjbd = gjbs = 0.0;
geltd = here->BSIM4v4grgeltd;
if (here->BSIM4v4rgateMod == 1)
{ *(here->BSIM4v4GEgePtr) += m * geltd;
*(here->BSIM4v4GPgePtr) -= m * geltd;
*(here->BSIM4v4GEgpPtr) -= m * geltd;
*(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
*(here->BSIM4v4GPgpPtr) += m * (geltd + xcggbi + gIgtotg);
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
*(here->BSIM4v4GPdpPtr) += m * (xcgdbi + gIgtotd);
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
*(here->BSIM4v4GPspPtr) += m * (xcgsbi + gIgtots);
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
*(here->BSIM4v4GPbpPtr) += m * (xcgbbi + gIgtotb);
} /* WDLiu: gcrg already subtracted from all gcrgg below */
else if (here->BSIM4v4rgateMod == 2)
{ *(here->BSIM4v4GEgePtr) += m * gcrg;
*(here->BSIM4v4GEgpPtr) += m * gcrgg;
*(here->BSIM4v4GEdpPtr) += m * gcrgd;
*(here->BSIM4v4GEspPtr) += m * gcrgs;
*(here->BSIM4v4GEbpPtr) += m * gcrgb;
*(here->BSIM4v4GPgePtr) -= m * gcrg;
*(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
*(here->BSIM4v4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
*(here->BSIM4v4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
*(here->BSIM4v4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
*(here->BSIM4v4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
}
else if (here->BSIM4v4rgateMod == 3)
{ *(here->BSIM4v4GEgePtr) += m * geltd;
*(here->BSIM4v4GEgmPtr) -= m * geltd;
*(here->BSIM4v4GMgePtr) -= m * geltd;
*(here->BSIM4v4GMgmPtr) += m * (geltd + gcrg);
*(here->BSIM4v4GMgmPtr +1) += m * xcgmgmb;
*(here->BSIM4v4GMdpPtr) += m * gcrgd;
*(here->BSIM4v4GMdpPtr +1) += m * xcgmdb;
*(here->BSIM4v4GMgpPtr) += m * gcrgg;
*(here->BSIM4v4GMspPtr) += m * gcrgs;
*(here->BSIM4v4GMspPtr +1) += m * xcgmsb;
*(here->BSIM4v4GMbpPtr) += m * gcrgb;
*(here->BSIM4v4GMbpPtr +1) += m * xcgmbb;
*(here->BSIM4v4DPgmPtr +1) += m * xcdgmb;
*(here->BSIM4v4GPgmPtr) -= m * gcrg;
*(here->BSIM4v4SPgmPtr +1) += m * xcsgmb;
*(here->BSIM4v4BPgmPtr +1) += m * xcbgmb;
*(here->BSIM4v4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
*(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
*(here->BSIM4v4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
*(here->BSIM4v4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
*(here->BSIM4v4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
}
else
{ *(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
*(here->BSIM4v4GPgpPtr) += m * (xcggbi + gIgtotg);
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
*(here->BSIM4v4GPdpPtr) += m * (xcgdbi + gIgtotd);
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
*(here->BSIM4v4GPspPtr) += m * (xcgsbi + gIgtots);
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
*(here->BSIM4v4GPbpPtr) += m * (xcgbbi + gIgtotb);
}
if (model->BSIM4v4rdsMod)
{ (*(here->BSIM4v4DgpPtr) += m * gdtotg);
(*(here->BSIM4v4DspPtr) += m * gdtots);
(*(here->BSIM4v4DbpPtr) += m * gdtotb);
(*(here->BSIM4v4SdpPtr) += m * gstotd);
(*(here->BSIM4v4SgpPtr) += m * gstotg);
(*(here->BSIM4v4SbpPtr) += m * gstotb);
}
*(here->BSIM4v4DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi);
*(here->BSIM4v4DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4v4gbd
- gdtotd + RevSumr + gbdpdp - gIdtotd);
*(here->BSIM4v4DPdPtr) -= m * (gdpr + gdtot);
*(here->BSIM4v4DPgpPtr +1) += m * (xcdgbr + Gmi);
*(here->BSIM4v4DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg);
*(here->BSIM4v4DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi);
*(here->BSIM4v4DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots);
*(here->BSIM4v4DPbpPtr +1) += m * (xcdbbr + Gmbsi);
*(here->BSIM4v4DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb);
*(here->BSIM4v4DdpPtr) -= m * (gdpr - gdtotd);
*(here->BSIM4v4DdPtr) += m * (gdpr + gdtot);
*(here->BSIM4v4SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi);
*(here->BSIM4v4SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd);
*(here->BSIM4v4SPgpPtr +1) += m * (xcsgbr - Gmi);
*(here->BSIM4v4SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg);
*(here->BSIM4v4SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi);
*(here->BSIM4v4SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4v4gbs
- gstots + FwdSumr + gbspsp - gIstots);
*(here->BSIM4v4SPsPtr) -= m * (gspr + gstot);
*(here->BSIM4v4SPbpPtr +1) += m * (xcsbbr - Gmbsi);
*(here->BSIM4v4SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb);
*(here->BSIM4v4SspPtr) -= m * (gspr - gstots);
*(here->BSIM4v4SsPtr) += m * (gspr + gstot);
*(here->BSIM4v4BPdpPtr +1) += m * xcbdb;
*(here->BSIM4v4BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
*(here->BSIM4v4BPgpPtr +1) += m * xcbgb;
*(here->BSIM4v4BPgpPtr) -= m * (here->BSIM4v4gbgs + gIbtotg);
*(here->BSIM4v4BPspPtr +1) += m * xcbsb;
*(here->BSIM4v4BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
*(here->BSIM4v4BPbpPtr +1) += m * xcbbb;
*(here->BSIM4v4BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v4gbbs
- gIbtotb);
ggidld = here->BSIM4v4ggidld;
ggidlg = here->BSIM4v4ggidlg;
ggidlb = here->BSIM4v4ggidlb;
ggislg = here->BSIM4v4ggislg;
ggisls = here->BSIM4v4ggisls;
ggislb = here->BSIM4v4ggislb;
/* stamp gidl */
(*(here->BSIM4v4DPdpPtr) += m * ggidld);
(*(here->BSIM4v4DPgpPtr) += m * ggidlg);
(*(here->BSIM4v4DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
(*(here->BSIM4v4DPbpPtr) += m * ggidlb);
(*(here->BSIM4v4BPdpPtr) -= m * ggidld);
(*(here->BSIM4v4BPgpPtr) -= m * ggidlg);
(*(here->BSIM4v4BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
(*(here->BSIM4v4BPbpPtr) -= m * ggidlb);
/* stamp gisl */
(*(here->BSIM4v4SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
(*(here->BSIM4v4SPgpPtr) += m * ggislg);
(*(here->BSIM4v4SPspPtr) += m * ggisls);
(*(here->BSIM4v4SPbpPtr) += m * ggislb);
(*(here->BSIM4v4BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
(*(here->BSIM4v4BPgpPtr) -= m * ggislg);
(*(here->BSIM4v4BPspPtr) -= m * ggisls);
(*(here->BSIM4v4BPbpPtr) -= m * ggislb);
if (here->BSIM4v4rbodyMod)
{ (*(here->BSIM4v4DPdbPtr +1) += m * xcdbdb);
(*(here->BSIM4v4DPdbPtr) -= m * here->BSIM4v4gbd);
(*(here->BSIM4v4SPsbPtr +1) += m * xcsbsb);
(*(here->BSIM4v4SPsbPtr) -= m * here->BSIM4v4gbs);
(*(here->BSIM4v4DBdpPtr +1) += m * xcdbdb);
(*(here->BSIM4v4DBdpPtr) -= m * here->BSIM4v4gbd);
(*(here->BSIM4v4DBdbPtr +1) -= m * xcdbdb);
(*(here->BSIM4v4DBdbPtr) += m * (here->BSIM4v4gbd + here->BSIM4v4grbpd
+ here->BSIM4v4grbdb));
(*(here->BSIM4v4DBbpPtr) -= m * here->BSIM4v4grbpd);
(*(here->BSIM4v4DBbPtr) -= m * here->BSIM4v4grbdb);
(*(here->BSIM4v4BPdbPtr) -= m * here->BSIM4v4grbpd);
(*(here->BSIM4v4BPbPtr) -= m * here->BSIM4v4grbpb);
(*(here->BSIM4v4BPsbPtr) -= m * here->BSIM4v4grbps);
(*(here->BSIM4v4BPbpPtr) += m * (here->BSIM4v4grbpd + here->BSIM4v4grbps
+ here->BSIM4v4grbpb));
/* WDLiu: (-here->BSIM4v4gbbs) already added to BPbpPtr */
(*(here->BSIM4v4SBspPtr +1) += m * xcsbsb);
(*(here->BSIM4v4SBspPtr) -= m * here->BSIM4v4gbs);
(*(here->BSIM4v4SBbpPtr) -= m * here->BSIM4v4grbps);
(*(here->BSIM4v4SBbPtr) -= m * here->BSIM4v4grbsb);
(*(here->BSIM4v4SBsbPtr +1) -= m * xcsbsb);
(*(here->BSIM4v4SBsbPtr) += m * (here->BSIM4v4gbs
+ here->BSIM4v4grbps + here->BSIM4v4grbsb));
(*(here->BSIM4v4BdbPtr) -= m * here->BSIM4v4grbdb);
(*(here->BSIM4v4BbpPtr) -= m * here->BSIM4v4grbpb);
(*(here->BSIM4v4BsbPtr) -= m * here->BSIM4v4grbsb);
(*(here->BSIM4v4BbPtr) += m * (here->BSIM4v4grbsb + here->BSIM4v4grbdb
+ here->BSIM4v4grbpb));
}
/*
* WDLiu: The internal charge node generated for transient NQS is not needed for
* AC NQS. The following is not doing a real job, but we have to keep it;
* otherwise a singular AC NQS matrix may occur if the transient NQS is on.
* The charge node is isolated from the instance.
*/
if (here->BSIM4v4trnqsMod)
{ (*(here->BSIM4v4QqPtr) += m * 1.0);
(*(here->BSIM4v4QgpPtr) += 0.0);
(*(here->BSIM4v4QdpPtr) += 0.0);
(*(here->BSIM4v4QspPtr) += 0.0);
(*(here->BSIM4v4QbpPtr) += 0.0);
(*(here->BSIM4v4DPqPtr) += 0.0);
(*(here->BSIM4v4SPqPtr) += 0.0);
(*(here->BSIM4v4GPqPtr) += 0.0);
}
}
}
return(OK);
}

369
src/spicelib/devices/bsim4v4/b4v4ask.c
View File

@ -1,369 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4ask.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
* Modified by Xuemei Xi, 05/09/2003.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"
#include "ngspice/cktdefs.h"
#include "ngspice/devdefs.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM4v4ask(
CKTcircuit *ckt,
GENinstance *inst,
int which,
IFvalue *value,
IFvalue *select)
{
BSIM4v4instance *here = (BSIM4v4instance*)inst;
NG_IGNORE(select);
switch(which)
{ case BSIM4v4_L:
value->rValue = here->BSIM4v4l;
return(OK);
case BSIM4v4_W:
value->rValue = here->BSIM4v4w;
return(OK);
case BSIM4v4_M:
value->rValue = here->BSIM4v4m;
return(OK);
case BSIM4v4_NF:
value->rValue = here->BSIM4v4nf;
return(OK);
case BSIM4v4_MIN:
value->iValue = here->BSIM4v4min;
return(OK);
case BSIM4v4_AS:
value->rValue = here->BSIM4v4sourceArea;
return(OK);
case BSIM4v4_AD:
value->rValue = here->BSIM4v4drainArea;
return(OK);
case BSIM4v4_PS:
value->rValue = here->BSIM4v4sourcePerimeter;
return(OK);
case BSIM4v4_PD:
value->rValue = here->BSIM4v4drainPerimeter;
return(OK);
case BSIM4v4_NRS:
value->rValue = here->BSIM4v4sourceSquares;
return(OK);
case BSIM4v4_NRD:
value->rValue = here->BSIM4v4drainSquares;
return(OK);
case BSIM4v4_OFF:
value->rValue = here->BSIM4v4off;
return(OK);
case BSIM4v4_SA:
value->rValue = here->BSIM4v4sa ;
return(OK);
case BSIM4v4_SB:
value->rValue = here->BSIM4v4sb ;
return(OK);
case BSIM4v4_SD:
value->rValue = here->BSIM4v4sd ;
return(OK);
case BSIM4v4_RBSB:
value->rValue = here->BSIM4v4rbsb;
return(OK);
case BSIM4v4_RBDB:
value->rValue = here->BSIM4v4rbdb;
return(OK);
case BSIM4v4_RBPB:
value->rValue = here->BSIM4v4rbpb;
return(OK);
case BSIM4v4_RBPS:
value->rValue = here->BSIM4v4rbps;
return(OK);
case BSIM4v4_RBPD:
value->rValue = here->BSIM4v4rbpd;
return(OK);
case BSIM4v4_TRNQSMOD:
value->iValue = here->BSIM4v4trnqsMod;
return(OK);
case BSIM4v4_ACNQSMOD:
value->iValue = here->BSIM4v4acnqsMod;
return(OK);
case BSIM4v4_RBODYMOD:
value->iValue = here->BSIM4v4rbodyMod;
return(OK);
case BSIM4v4_RGATEMOD:
value->iValue = here->BSIM4v4rgateMod;
return(OK);
case BSIM4v4_GEOMOD:
value->iValue = here->BSIM4v4geoMod;
return(OK);
case BSIM4v4_RGEOMOD:
value->iValue = here->BSIM4v4rgeoMod;
return(OK);
case BSIM4v4_IC_VDS:
value->rValue = here->BSIM4v4icVDS;
return(OK);
case BSIM4v4_IC_VGS:
value->rValue = here->BSIM4v4icVGS;
return(OK);
case BSIM4v4_IC_VBS:
value->rValue = here->BSIM4v4icVBS;
return(OK);
case BSIM4v4_DNODE:
value->iValue = here->BSIM4v4dNode;
return(OK);
case BSIM4v4_GNODEEXT:
value->iValue = here->BSIM4v4gNodeExt;
return(OK);
case BSIM4v4_SNODE:
value->iValue = here->BSIM4v4sNode;
return(OK);
case BSIM4v4_BNODE:
value->iValue = here->BSIM4v4bNode;
return(OK);
case BSIM4v4_DNODEPRIME:
value->iValue = here->BSIM4v4dNodePrime;
return(OK);
case BSIM4v4_GNODEPRIME:
value->iValue = here->BSIM4v4gNodePrime;
return(OK);
case BSIM4v4_GNODEMID:
value->iValue = here->BSIM4v4gNodeMid;
return(OK);
case BSIM4v4_SNODEPRIME:
value->iValue = here->BSIM4v4sNodePrime;
return(OK);
case BSIM4v4_DBNODE:
value->iValue = here->BSIM4v4dbNode;
return(OK);
case BSIM4v4_BNODEPRIME:
value->iValue = here->BSIM4v4bNodePrime;
return(OK);
case BSIM4v4_SBNODE:
value->iValue = here->BSIM4v4sbNode;
return(OK);
case BSIM4v4_SOURCECONDUCT:
value->rValue = here->BSIM4v4sourceConductance;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_DRAINCONDUCT:
value->rValue = here->BSIM4v4drainConductance;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_VBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vbd);
return(OK);
case BSIM4v4_VBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vbs);
return(OK);
case BSIM4v4_VGS:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vgs);
return(OK);
case BSIM4v4_VDS:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vds);
return(OK);
case BSIM4v4_CD:
value->rValue = here->BSIM4v4cd;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CBS:
value->rValue = here->BSIM4v4cbs;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CBD:
value->rValue = here->BSIM4v4cbd;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CSUB:
value->rValue = here->BSIM4v4csub;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_QINV:
value->rValue = here-> BSIM4v4qinv;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGIDL:
value->rValue = here->BSIM4v4Igidl;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGISL:
value->rValue = here->BSIM4v4Igisl;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGS:
value->rValue = here->BSIM4v4Igs;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGD:
value->rValue = here->BSIM4v4Igd;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGB:
value->rValue = here->BSIM4v4Igb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGCS:
value->rValue = here->BSIM4v4Igcs;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_IGCD:
value->rValue = here->BSIM4v4Igcd;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_GM:
value->rValue = here->BSIM4v4gm;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_GDS:
value->rValue = here->BSIM4v4gds;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_GMBS:
value->rValue = here->BSIM4v4gmbs;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_GBD:
value->rValue = here->BSIM4v4gbd;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_GBS:
value->rValue = here->BSIM4v4gbs;
value->rValue *= here->BSIM4v4m;
return(OK);
/* case BSIM4v4_QB:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qb);
return(OK); */
case BSIM4v4_CQB:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4cqb);
return(OK);
/* case BSIM4v4_QG:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qg);
return(OK); */
case BSIM4v4_CQG:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4cqg);
return(OK);
/* case BSIM4v4_QD:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qd);
return(OK); */
case BSIM4v4_CQD:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4cqd);
return(OK);
/* case BSIM4v4_QS:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qs);
return(OK); */
case BSIM4v4_QB:
value->rValue = here->BSIM4v4qbulk;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_QG:
value->rValue = here->BSIM4v4qgate;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_QS:
value->rValue = here->BSIM4v4qsrc;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_QD:
value->rValue = here->BSIM4v4qdrn;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CGGB:
value->rValue = here->BSIM4v4cggb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CGDB:
value->rValue = here->BSIM4v4cgdb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CGSB:
value->rValue = here->BSIM4v4cgsb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CDGB:
value->rValue = here->BSIM4v4cdgb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CDDB:
value->rValue = here->BSIM4v4cddb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CDSB:
value->rValue = here->BSIM4v4cdsb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CBGB:
value->rValue = here->BSIM4v4cbgb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CBDB:
value->rValue = here->BSIM4v4cbdb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CBSB:
value->rValue = here->BSIM4v4cbsb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CSGB:
value->rValue = here->BSIM4v4csgb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CSDB:
value->rValue = here->BSIM4v4csdb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CSSB:
value->rValue = here->BSIM4v4cssb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CGBB:
value->rValue = here->BSIM4v4cgbb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CDBB:
value->rValue = here->BSIM4v4cdbb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CSBB:
value->rValue = here->BSIM4v4csbb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CBBB:
value->rValue = here->BSIM4v4cbbb;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CAPBD:
value->rValue = here->BSIM4v4capbd;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_CAPBS:
value->rValue = here->BSIM4v4capbs;
value->rValue *= here->BSIM4v4m;
return(OK);
case BSIM4v4_VON:
value->rValue = here->BSIM4v4von;
return(OK);
case BSIM4v4_VDSAT:
value->rValue = here->BSIM4v4vdsat;
return(OK);
case BSIM4v4_QBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qbs);
return(OK);
case BSIM4v4_QBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qbd);
return(OK);
default:
return(E_BADPARM);
}
/* NOTREACHED */
}

1037
src/spicelib/devices/bsim4v4/b4v4check.c
File diff suppressed because it is too large
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198
src/spicelib/devices/bsim4v4/b4v4cvtest.c
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@ -1,198 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4cvtest.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
* Modified by Xuemei Xi, 05/09/2003.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim4v4def.h"
#include "ngspice/trandefs.h"
#include "ngspice/const.h"
#include "ngspice/devdefs.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM4v4convTest(
GENmodel *inModel,
CKTcircuit *ckt)
{
BSIM4v4model *model = (BSIM4v4model*)inModel;
BSIM4v4instance *here;
double delvbd, delvbs, delvds, delvgd, delvgs;
double delvdbd, delvsbs;
double delvbd_jct, delvbs_jct;
double vds, vgs, vgd, vgdo, vbs, vbd;
double vdbd, vdbs, vsbs;
double cbhat, cdhat, Idtot, Ibtot;
double vses, vdes, vdedo, delvses, delvded, delvdes;
double Isestot, cseshat, Idedtot, cdedhat;
double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat;
double tol0, tol1, tol2, tol3, tol4, tol5, tol6;
for (; model != NULL; model = model->BSIM4v4nextModel)
{ for (here = model->BSIM4v4instances; here != NULL ;
here=here->BSIM4v4nextInstance)
{
vds = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4dNodePrime)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vgs = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4gNodePrime)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vbs = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4bNodePrime)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vdbs = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4dbNode)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vsbs = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4sbNode)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vses = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4sNode)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vdes = model->BSIM4v4type
* (*(ckt->CKTrhsOld + here->BSIM4v4dNode)
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
vgdo = *(ckt->CKTstate0 + here->BSIM4v4vgs)
- *(ckt->CKTstate0 + here->BSIM4v4vds);
vbd = vbs - vds;
vdbd = vdbs - vds;
vgd = vgs - vds;
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v4vbd);
delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v4vdbd);
delvgd = vgd - vgdo;
delvds = vds - *(ckt->CKTstate0 + here->BSIM4v4vds);
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v4vgs);
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v4vbs);
delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v4vsbs);
delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v4vses));
vdedo = *(ckt->CKTstate0 + here->BSIM4v4vdes)
- *(ckt->CKTstate0 + here->BSIM4v4vds);
delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v4vdes);
delvded = vdes - vds - vdedo;
delvbd_jct = (!here->BSIM4v4rbodyMod) ? delvbd : delvdbd;
delvbs_jct = (!here->BSIM4v4rbodyMod) ? delvbs : delvsbs;
if (here->BSIM4v4mode >= 0)
{ Idtot = here->BSIM4v4cd + here->BSIM4v4csub - here->BSIM4v4cbd
+ here->BSIM4v4Igidl;
cdhat = Idtot - here->BSIM4v4gbd * delvbd_jct
+ (here->BSIM4v4gmbs + here->BSIM4v4gbbs + here->BSIM4v4ggidlb) * delvbs
+ (here->BSIM4v4gm + here->BSIM4v4gbgs + here->BSIM4v4ggidlg) * delvgs
+ (here->BSIM4v4gds + here->BSIM4v4gbds + here->BSIM4v4ggidld) * delvds;
Igstot = here->BSIM4v4Igs + here->BSIM4v4Igcs;
cgshat = Igstot + (here->BSIM4v4gIgsg + here->BSIM4v4gIgcsg) * delvgs
+ here->BSIM4v4gIgcsd * delvds + here->BSIM4v4gIgcsb * delvbs;
Igdtot = here->BSIM4v4Igd + here->BSIM4v4Igcd;
cgdhat = Igdtot + here->BSIM4v4gIgdg * delvgd + here->BSIM4v4gIgcdg * delvgs
+ here->BSIM4v4gIgcdd * delvds + here->BSIM4v4gIgcdb * delvbs;
Igbtot = here->BSIM4v4Igb;
cgbhat = here->BSIM4v4Igb + here->BSIM4v4gIgbg * delvgs + here->BSIM4v4gIgbd
* delvds + here->BSIM4v4gIgbb * delvbs;
}
else
{ Idtot = here->BSIM4v4cd + here->BSIM4v4cbd - here->BSIM4v4Igidl; /* bugfix */
cdhat = Idtot + here->BSIM4v4gbd * delvbd_jct + here->BSIM4v4gmbs
* delvbd + here->BSIM4v4gm * delvgd
- (here->BSIM4v4gds + here->BSIM4v4ggidls) * delvds
- here->BSIM4v4ggidlg * delvgs - here->BSIM4v4ggidlb * delvbs;
Igstot = here->BSIM4v4Igs + here->BSIM4v4Igcd;
cgshat = Igstot + here->BSIM4v4gIgsg * delvgs + here->BSIM4v4gIgcdg * delvgd
- here->BSIM4v4gIgcdd * delvds + here->BSIM4v4gIgcdb * delvbd;
Igdtot = here->BSIM4v4Igd + here->BSIM4v4Igcs;
cgdhat = Igdtot + (here->BSIM4v4gIgdg + here->BSIM4v4gIgcsg) * delvgd
- here->BSIM4v4gIgcsd * delvds + here->BSIM4v4gIgcsb * delvbd;
Igbtot = here->BSIM4v4Igb;
cgbhat = here->BSIM4v4Igb + here->BSIM4v4gIgbg * delvgd - here->BSIM4v4gIgbd
* delvds + here->BSIM4v4gIgbb * delvbd;
}
Isestot = here->BSIM4v4gstot * (*(ckt->CKTstate0 + here->BSIM4v4vses));
cseshat = Isestot + here->BSIM4v4gstot * delvses
+ here->BSIM4v4gstotd * delvds + here->BSIM4v4gstotg * delvgs
+ here->BSIM4v4gstotb * delvbs;
Idedtot = here->BSIM4v4gdtot * vdedo;
cdedhat = Idedtot + here->BSIM4v4gdtot * delvded
+ here->BSIM4v4gdtotd * delvds + here->BSIM4v4gdtotg * delvgs
+ here->BSIM4v4gdtotb * delvbs;
/*
* Check convergence
*/
if ((here->BSIM4v4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
+ ckt->CKTabstol;
tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot))
+ ckt->CKTabstol;
tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot))
+ ckt->CKTabstol;
tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot))
+ ckt->CKTabstol;
tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot))
+ ckt->CKTabstol;
tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot))
+ ckt->CKTabstol;
if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1)
|| (fabs(cdedhat - Idedtot) >= tol2))
{ ckt->CKTnoncon++;
return(OK);
}
if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4)
|| (fabs(cgbhat - Igbtot) >= tol5))
{ ckt->CKTnoncon++;
return(OK);
}
Ibtot = here->BSIM4v4cbs + here->BSIM4v4cbd
- here->BSIM4v4Igidl - here->BSIM4v4Igisl - here->BSIM4v4csub;
if (here->BSIM4v4mode >= 0)
{ cbhat = Ibtot + here->BSIM4v4gbd * delvbd_jct
+ here->BSIM4v4gbs * delvbs_jct - (here->BSIM4v4gbbs + here->BSIM4v4ggidlb)
* delvbs - (here->BSIM4v4gbgs + here->BSIM4v4ggidlg) * delvgs
- (here->BSIM4v4gbds + here->BSIM4v4ggidld) * delvds
- here->BSIM4v4ggislg * delvgd - here->BSIM4v4ggislb* delvbd + here->BSIM4v4ggisls * delvds ;
}
else
{ cbhat = Ibtot + here->BSIM4v4gbs * delvbs_jct + here->BSIM4v4gbd
* delvbd_jct - (here->BSIM4v4gbbs + here->BSIM4v4ggislb) * delvbd
- (here->BSIM4v4gbgs + here->BSIM4v4ggislg) * delvgd
+ (here->BSIM4v4gbds + here->BSIM4v4ggisld - here->BSIM4v4ggidls) * delvds
- here->BSIM4v4ggidlg * delvgs - here->BSIM4v4ggidlb * delvbs;
}
tol6 = ckt->CKTreltol * MAX(fabs(cbhat),
fabs(Ibtot)) + ckt->CKTabstol;
if (fabs(cbhat - Ibtot) > tol6)
{ ckt->CKTnoncon++;
return(OK);
}
}
}
}
return(OK);
}

41
src/spicelib/devices/bsim4v4/b4v4del.c
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@ -1,41 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4del.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
**********/
#include "ngspice/ngspice.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/gendefs.h"
#include "ngspice/suffix.h"
int
BSIM4v4delete(
GENmodel *inModel,
IFuid name,
GENinstance **inInst)
{
BSIM4v4instance **fast = (BSIM4v4instance**)inInst;
BSIM4v4model *model = (BSIM4v4model*)inModel;
BSIM4v4instance **prev = NULL;
BSIM4v4instance *here;
for (; model ; model = model->BSIM4v4nextModel)
{ prev = &(model->BSIM4v4instances);
for (here = *prev; here ; here = *prev)
{ if (here->BSIM4v4name == name || (fast && here==*fast))
{ *prev= here->BSIM4v4nextInstance;
FREE(here);
return(OK);
}
prev = &(here->BSIM4v4nextInstance);
}
}
return(E_NODEV);
}

38
src/spicelib/devices/bsim4v4/b4v4dest.c
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@ -1,38 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4dest.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
**********/
#include "ngspice/ngspice.h"
#include "bsim4v4def.h"
#include "ngspice/suffix.h"
void
BSIM4v4destroy(
GENmodel **inModel)
{
BSIM4v4model **model = (BSIM4v4model**)inModel;
BSIM4v4instance *here;
BSIM4v4instance *prev = NULL;
BSIM4v4model *mod = *model;
BSIM4v4model *oldmod = NULL;
for (; mod ; mod = mod->BSIM4v4nextModel)
{ if(oldmod) FREE(oldmod);
oldmod = mod;
prev = NULL;
for (here = mod->BSIM4v4instances; here; here = here->BSIM4v4nextInstance)
{ if(prev) FREE(prev);
prev = here;
}
if(prev) FREE(prev);
}
if(oldmod) FREE(oldmod);
*model = NULL;
return;
}

397
src/spicelib/devices/bsim4v4/b4v4geo.c
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@ -1,397 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei(Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2003 Regents of the University of California. All rights reserved.
* File: b4geo.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
**********/
#include "ngspice/ngspice.h"
#include "bsim4v4def.h"
/*
* WDLiu:
* This subrutine is a special module to process the geometry dependent
* parasitics for BSIM4v4, which calculates Ps, Pd, As, Ad, and Rs and Rd
* for multi-fingers and varous GEO and RGEO options.
*/
int
BSIM4v4RdsEndIso(double, double, double, double, double, double, int, int, double *);
int
BSIM4v4RdsEndSha(double, double, double, double, double, double, int, int, double *);
static int
BSIM4v4NumFingerDiff(
double nf,
int minSD,
double *nuIntD, double *nuEndD, double *nuIntS, double *nuEndS)
{
int NF;
NF = (int)nf;
if ((NF%2) != 0)
{ *nuEndD = *nuEndS = 1.0;
*nuIntD = *nuIntS = 2.0 * MAX((nf - 1.0) / 2.0, 0.0);
}
else
{ if (minSD == 1) /* minimize # of source */
{ *nuEndD = 2.0;
*nuIntD = 2.0 * MAX((nf / 2.0 - 1.0), 0.0);
*nuEndS = 0.0;
*nuIntS = nf;
}
else
{ *nuEndD = 0.0;
*nuIntD = nf;
*nuEndS = 2.0;
*nuIntS = 2.0 * MAX((nf / 2.0 - 1.0), 0.0);
}
}
return 0;
}
int
BSIM4v4PAeffGeo(
double nf,
int geo, int minSD,
double Weffcj, double DMCG, double DMCI, double DMDG,
double *Ps, double *Pd, double *As, double *Ad)
{
double T0, T1, T2;
double ADiso, ADsha, ADmer, ASiso, ASsha, ASmer;
double PDiso, PDsha, PDmer, PSiso, PSsha, PSmer;
double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
if (geo < 9) /* For geo = 9 and 10, the numbers of S/D diffusions already known */
BSIM4v4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
T0 = DMCG + DMCI;
T1 = DMCG + DMCG;
T2 = DMDG + DMDG;
PSiso = PDiso = T0 + T0 + Weffcj;
PSsha = PDsha = T1;
PSmer = PDmer = T2;
ASiso = ADiso = T0 * Weffcj;
ASsha = ADsha = DMCG * Weffcj;
ASmer = ADmer = DMDG * Weffcj;
switch(geo)
{ case 0:
*Ps = nuEndS * PSiso + nuIntS * PSsha;
*Pd = nuEndD * PDiso + nuIntD * PDsha;
*As = nuEndS * ASiso + nuIntS * ASsha;
*Ad = nuEndD * ADiso + nuIntD * ADsha;
break;
case 1:
*Ps = nuEndS * PSiso + nuIntS * PSsha;
*Pd = (nuEndD + nuIntD) * PDsha;
*As = nuEndS * ASiso + nuIntS * ASsha;
*Ad = (nuEndD + nuIntD) * ADsha;
break;
case 2:
*Ps = (nuEndS + nuIntS) * PSsha;
*Pd = nuEndD * PDiso + nuIntD * PDsha;
*As = (nuEndS + nuIntS) * ASsha;
*Ad = nuEndD * ADiso + nuIntD * ADsha;
break;
case 3:
*Ps = (nuEndS + nuIntS) * PSsha;
*Pd = (nuEndD + nuIntD) * PDsha;
*As = (nuEndS + nuIntS) * ASsha;
*Ad = (nuEndD + nuIntD) * ADsha;
break;
case 4:
*Ps = nuEndS * PSiso + nuIntS * PSsha;
*Pd = nuEndD * PDmer + nuIntD * PDsha;
*As = nuEndS * ASiso + nuIntS * ASsha;
*Ad = nuEndD * ADmer + nuIntD * ADsha;
break;
case 5:
*Ps = (nuEndS + nuIntS) * PSsha;
*Pd = nuEndD * PDmer + nuIntD * PDsha;
*As = (nuEndS + nuIntS) * ASsha;
*Ad = nuEndD * ADmer + nuIntD * ADsha;
break;
case 6:
*Ps = nuEndS * PSmer + nuIntS * PSsha;
*Pd = nuEndD * PDiso + nuIntD * PDsha;
*As = nuEndS * ASmer + nuIntS * ASsha;
*Ad = nuEndD * ADiso + nuIntD * ADsha;
break;
case 7:
*Ps = nuEndS * PSmer + nuIntS * PSsha;
*Pd = (nuEndD + nuIntD) * PDsha;
*As = nuEndS * ASmer + nuIntS * ASsha;
*Ad = (nuEndD + nuIntD) * ADsha;
break;
case 8:
*Ps = nuEndS * PSmer + nuIntS * PSsha;
*Pd = nuEndD * PDmer + nuIntD * PDsha;
*As = nuEndS * ASmer + nuIntS * ASsha;
*Ad = nuEndD * ADmer + nuIntD * ADsha;
break;
case 9: /* geo = 9 and 10 happen only when nf = even */
*Ps = PSiso + (nf - 1.0) * PSsha;
*Pd = nf * PDsha;
*As = ASiso + (nf - 1.0) * ASsha;
*Ad = nf * ADsha;
break;
case 10:
*Ps = nf * PSsha;
*Pd = PDiso + (nf - 1.0) * PDsha;
*As = nf * ASsha;
*Ad = ADiso + (nf - 1.0) * ADsha;
break;
default:
printf("Warning: Specified GEO = %d not matched\n", geo);
}
return 0;
}
int
BSIM4v4RdseffGeo(
double nf,
int geo, int rgeo, int minSD,
double Weffcj, double Rsh, double DMCG, double DMCI, double DMDG,
int Type,
double *Rtot)
{
double Rint=0.0, Rend = 0.0;
double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
if (geo < 9) /* since geo = 9 and 10 only happen when nf = even */
{ BSIM4v4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
/* Internal S/D resistance -- assume shared S or D and all wide contacts */
if (Type == 1)
{ if (nuIntS == 0.0)
Rint = 0.0;
else
Rint = Rsh * DMCG / ( Weffcj * nuIntS);
}
else
{ if (nuIntD == 0.0)
Rint = 0.0;
else
Rint = Rsh * DMCG / ( Weffcj * nuIntD);
}
}
/* End S/D resistance -- geo dependent */
switch(geo)
{ case 0:
if (Type == 1) BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndS, rgeo, 1, &Rend);
else BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndD, rgeo, 0, &Rend);
break;
case 1:
if (Type == 1) BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndS, rgeo, 1, &Rend);
else BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndD, rgeo, 0, &Rend);
break;
case 2:
if (Type == 1) BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndS, rgeo, 1, &Rend);
else BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndD, rgeo, 0, &Rend);
break;
case 3:
if (Type == 1) BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndS, rgeo, 1, &Rend);
else BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndD, rgeo, 0, &Rend);
break;
case 4:
if (Type == 1) BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndS, rgeo, 1, &Rend);
else Rend = Rsh * DMDG / Weffcj;
break;
case 5:
if (Type == 1) BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndS, rgeo, 1, &Rend);
else Rend = Rsh * DMDG / (Weffcj * nuEndD);
break;
case 6:
if (Type == 1) Rend = Rsh * DMDG / Weffcj;
else BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndD, rgeo, 0, &Rend);
break;
case 7:
if (Type == 1) Rend = Rsh * DMDG / (Weffcj * nuEndS);
else BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
nuEndD, rgeo, 0, &Rend);
break;
case 8:
Rend = Rsh * DMDG / Weffcj;
break;
case 9: /* all wide contacts assumed for geo = 9 and 10 */
if (Type == 1)
{ Rend = 0.5 * Rsh * DMCG / Weffcj;
if (nf == 2.0)
Rint = 0.0;
else
Rint = Rsh * DMCG / (Weffcj * (nf - 2.0));
}
else
{ Rend = 0.0;
Rint = Rsh * DMCG / (Weffcj * nf);
}
break;
case 10:
if (Type == 1)
{ Rend = 0.0;
Rint = Rsh * DMCG / (Weffcj * nf);
}
else
{ Rend = 0.5 * Rsh * DMCG / Weffcj;;
if (nf == 2.0)
Rint = 0.0;
else
Rint = Rsh * DMCG / (Weffcj * (nf - 2.0));
}
break;
default:
printf("Warning: Specified GEO = %d not matched\n", geo);
}
if (Rint <= 0.0)
*Rtot = Rend;
else if (Rend <= 0.0)
*Rtot = Rint;
else
*Rtot = Rint * Rend / (Rint + Rend);
if(*Rtot==0.0)
printf("Warning: Zero resistance returned from RdseffGeo\n");
return 0;
}
int
BSIM4v4RdsEndIso(
double Weffcj, double Rsh, double DMCG, double DMCI, double DMDG,
double nuEnd,
int rgeo, int Type,
double *Rend)
{
NG_IGNORE(DMDG);
if (Type == 1)
{ switch(rgeo)
{ case 1:
case 2:
case 5:
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * DMCG / (Weffcj * nuEnd);
break;
case 3:
case 4:
case 6:
if ((DMCG + DMCI) == 0.0)
printf("(DMCG + DMCI) can not be equal to zero\n");
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI));
break;
default:
printf("Warning: Specified RGEO = %d not matched\n", rgeo);
}
}
else
{ switch(rgeo)
{ case 1:
case 3:
case 7:
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * DMCG / (Weffcj * nuEnd);
break;
case 2:
case 4:
case 8:
if ((DMCG + DMCI) == 0.0)
printf("(DMCG + DMCI) can not be equal to zero\n");
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * Weffcj / (3.0 * nuEnd * (DMCG + DMCI));
break;
default:
printf("Warning: Specified RGEO = %d not matched\n", rgeo);
}
}
return 0;
}
int
BSIM4v4RdsEndSha(
double Weffcj, double Rsh, double DMCG, double DMCI, double DMDG,
double nuEnd,
int rgeo, int Type,
double *Rend)
{
NG_IGNORE(DMCI);
NG_IGNORE(DMDG);
if (Type == 1)
{ switch(rgeo)
{ case 1:
case 2:
case 5:
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * DMCG / (Weffcj * nuEnd);
break;
case 3:
case 4:
case 6:
if (DMCG == 0.0)
printf("DMCG can not be equal to zero\n");
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG);
break;
default:
printf("Warning: Specified RGEO = %d not matched\n", rgeo);
}
}
else
{ switch(rgeo)
{ case 1:
case 3:
case 7:
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * DMCG / (Weffcj * nuEnd);
break;
case 2:
case 4:
case 8:
if (DMCG == 0.0)
printf("DMCG can not be equal to zero\n");
if (nuEnd == 0.0)
*Rend = 0.0;
else
*Rend = Rsh * Weffcj / (6.0 * nuEnd * DMCG);
break;
default:
printf("Warning: Specified RGEO = %d not matched\n", rgeo);
}
}
return 0;
}

43
src/spicelib/devices/bsim4v4/b4v4getic.c
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@ -1,43 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4getic.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM4v4getic(
GENmodel *inModel,
CKTcircuit *ckt)
{
BSIM4v4model *model = (BSIM4v4model*)inModel;
BSIM4v4instance *here;
for (; model ; model = model->BSIM4v4nextModel) {
for (here = model->BSIM4v4instances; here; here = here->BSIM4v4nextInstance) {
if (!here->BSIM4v4icVDSGiven) {
here->BSIM4v4icVDS = *(ckt->CKTrhs + here->BSIM4v4dNode)
- *(ckt->CKTrhs + here->BSIM4v4sNode);
}
if (!here->BSIM4v4icVGSGiven) {
here->BSIM4v4icVGS = *(ckt->CKTrhs + here->BSIM4v4gNodeExt)
- *(ckt->CKTrhs + here->BSIM4v4sNode);
}
if(!here->BSIM4v4icVBSGiven) {
here->BSIM4v4icVBS = *(ckt->CKTrhs + here->BSIM4v4bNode)
- *(ckt->CKTrhs + here->BSIM4v4sNode);
}
}
}
return(OK);
}

5214
src/spicelib/devices/bsim4v4/b4v4ld.c
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1970
src/spicelib/devices/bsim4v4/b4v4mask.c
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46
src/spicelib/devices/bsim4v4/b4v4mdel.c
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@ -1,46 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4mdel.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
**********/
#include "ngspice/ngspice.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM4v4mDelete(
GENmodel **inModel,
IFuid modname,
GENmodel *kill)
{
BSIM4v4model **model = (BSIM4v4model**)inModel;
BSIM4v4model *modfast = (BSIM4v4model*)kill;
BSIM4v4instance *here;
BSIM4v4instance *prev = NULL;
BSIM4v4model **oldmod;
oldmod = model;
for (; *model ; model = &((*model)->BSIM4v4nextModel))
{ if ((*model)->BSIM4v4modName == modname ||
(modfast && *model == modfast))
goto delgot;
oldmod = model;
}
return(E_NOMOD);
delgot:
*oldmod = (*model)->BSIM4v4nextModel; /* cut deleted device out of list */
for (here = (*model)->BSIM4v4instances; here; here = here->BSIM4v4nextInstance)
{ if(prev) FREE(prev);
prev = here;
}
if(prev) FREE(prev);
FREE(*model);
return(OK);
}

2802
src/spicelib/devices/bsim4v4/b4v4mpar.c
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550
src/spicelib/devices/bsim4v4/b4v4noi.c
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@ -1,550 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/* ngspice multirevision code extension covering 4.2.1 & 4.3.0 & 4.4.0 */
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4noi.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
* Modified by Xuemei Xi, 11/15/2002.
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
**********/
#include "ngspice/ngspice.h"
#include "bsim4v4def.h"
#include "ngspice/cktdefs.h"
#include "ngspice/iferrmsg.h"
#include "ngspice/noisedef.h"
#include "ngspice/const.h"
/*
* WDL: 1/f noise model has been smoothed out and enhanced with
* bulk charge effect as well as physical N* equ. and necessary
* conversion into the SI unit system.
*/
static double
BSIM4v4Eval1ovFNoise(
double Vds,
BSIM4v4model *model,
BSIM4v4instance *here,
double freq, double temp)
{
struct bsim4SizeDependParam *pParam;
double cd, esat=0.0, DelClm, EffFreq, N0, Nl, Leff, Leffsq=0.0;
double T0, T1, T2=0.0, T3, T4, T5, T6, T7=0.0, T8, T9, Ssi;
pParam = here->pParam;
cd = fabs(here->BSIM4v4cd);
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21: case BSIM4v30:
break;
case BSIM4v40:
Leff = pParam->BSIM4v4leff - 2.0 * model->BSIM4v4lintnoi;
Leffsq = Leff * Leff;
break;
default: break;
}
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21:
esat = 2.0 * pParam->BSIM4v4vsattemp / here->BSIM4v4ueff;
break;
case BSIM4v30: case BSIM4v40:
esat = 2.0 * here->BSIM4v4vsattemp / here->BSIM4v4ueff;
break;
default: break;
}
if(model->BSIM4v4em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */
else {
T0 = ((((Vds - here->BSIM4v4Vdseff) / pParam->BSIM4v4litl)
+ model->BSIM4v4em) / esat);
DelClm = pParam->BSIM4v4litl * log (MAX(T0, N_MINLOG));
}
EffFreq = pow(freq, model->BSIM4v4ef);
T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4v4ueff;
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21: case BSIM4v30:
T2 = 1.0e10 * EffFreq * here->BSIM4v4Abulk * model->BSIM4v4coxe
* pParam->BSIM4v4leff * pParam->BSIM4v4leff;
break;
case BSIM4v40:
T2 = 1.0e10 * EffFreq * here->BSIM4v4Abulk * model->BSIM4v4coxe * Leffsq;
break;
default: break;
}
N0 = model->BSIM4v4coxe * here->BSIM4v4Vgsteff / CHARGE;
Nl = model->BSIM4v4coxe * here->BSIM4v4Vgsteff
* (1.0 - here->BSIM4v4AbovVgst2Vtm * here->BSIM4v4Vdseff) / CHARGE;
T3 = model->BSIM4v4oxideTrapDensityA
* log(MAX(((N0 + here->BSIM4v4nstar) / (Nl + here->BSIM4v4nstar)), N_MINLOG));
T4 = model->BSIM4v4oxideTrapDensityB * (N0 - Nl);
T5 = model->BSIM4v4oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
T6 = CONSTboltz * temp * cd * cd;
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21: case BSIM4v30:
T7 = 1.0e10 * EffFreq * pParam->BSIM4v4leff
* pParam->BSIM4v4leff * pParam->BSIM4v4weff;
break;
case BSIM4v40:
T7 = 1.0e10 * EffFreq * Leffsq * pParam->BSIM4v4weff;
break;
default: break;
}
T8 = model->BSIM4v4oxideTrapDensityA + model->BSIM4v4oxideTrapDensityB * Nl
+ model->BSIM4v4oxideTrapDensityC * Nl * Nl;
T9 = (Nl + here->BSIM4v4nstar) * (Nl + here->BSIM4v4nstar);
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
return Ssi;
}
int
BSIM4v4noise (
int mode, int operation,
GENmodel *inModel,
CKTcircuit *ckt,
Ndata *data,
double *OnDens)
{
NOISEAN *job = (NOISEAN *) ckt->CKTcurJob;
BSIM4v4model *model = (BSIM4v4model *)inModel;
BSIM4v4instance *here;
struct bsim4SizeDependParam *pParam;
char name[N_MXVLNTH];
double tempOnoise;
double tempInoise;
double noizDens[BSIM4v4NSRCS];
double lnNdens[BSIM4v4NSRCS];
double T0, T1, T2, T5, T10, T11;
double Vds, Ssi, Swi;
double tmp=0.0, gdpr, gspr, npart_theta=0.0, npart_beta=0.0, igsquare;
double m;
int i;
/* define the names of the noise sources */
static char *BSIM4v4nNames[BSIM4v4NSRCS] =
{ /* Note that we have to keep the order */
".rd", /* noise due to rd */
".rs", /* noise due to rs */
".rg", /* noise due to rgeltd */
".rbps", /* noise due to rbps */
".rbpd", /* noise due to rbpd */
".rbpb", /* noise due to rbpb */
".rbsb", /* noise due to rbsb */
".rbdb", /* noise due to rbdb */
".id", /* noise due to id */
".1overf", /* flicker (1/f) noise */
".igs", /* shot noise due to IGS */
".igd", /* shot noise due to IGD */
".igb", /* shot noise due to IGB */
"" /* total transistor noise */
};
for (; model != NULL; model = model->BSIM4v4nextModel)
{ for (here = model->BSIM4v4instances; here != NULL;
here = here->BSIM4v4nextInstance)
{ pParam = here->pParam;
switch (operation)
{ case N_OPEN:
/* see if we have to to produce a summary report */
/* if so, name all the noise generators */
if (job->NStpsSm != 0)
{ switch (mode)
{ case N_DENS:
for (i = 0; i < BSIM4v4NSRCS; i++)
{ (void) sprintf(name, "onoise.%s%s",
here->BSIM4v4name,
BSIM4v4nNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist)
return(E_NOMEM);
SPfrontEnd->IFnewUid (ckt,
&(data->namelist[data->numPlots++]),
NULL, name, UID_OTHER,
NULL);
/* we've added one more plot */
}
break;
case INT_NOIZ:
for (i = 0; i < BSIM4v4NSRCS; i++)
{ (void) sprintf(name, "onoise_total.%s%s",
here->BSIM4v4name,
BSIM4v4nNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist)
return(E_NOMEM);
SPfrontEnd->IFnewUid (ckt,
&(data->namelist[data->numPlots++]),
NULL, name, UID_OTHER,
NULL);
/* we've added one more plot */
(void) sprintf(name, "inoise_total.%s%s",
here->BSIM4v4name,
BSIM4v4nNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist)
return(E_NOMEM);
SPfrontEnd->IFnewUid (ckt,
&(data->namelist[data->numPlots++]),
NULL, name, UID_OTHER,
NULL);
/* we've added one more plot */
}
break;
}
}
break;
case N_CALC:
m = here->BSIM4v4m;
switch (mode)
{ case N_DENS:
if (model->BSIM4v4tnoiMod == 0)
{ if (model->BSIM4v4rdsMod == 0)
{ gspr = here->BSIM4v4sourceConductance;
gdpr = here->BSIM4v4drainConductance;
if (here->BSIM4v4grdsw > 0.0)
tmp = 1.0 / here->BSIM4v4grdsw; /* tmp used below */
else
tmp = 0.0;
}
else
{ gspr = here->BSIM4v4gstot;
gdpr = here->BSIM4v4gdtot;
tmp = 0.0;
}
}
else
{ T5 = here->BSIM4v4Vgsteff / here->BSIM4v4EsatL;
T5 *= T5;
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21:
npart_beta = 0.577 * (1.0 + T5
* model->BSIM4v4tnoia * pParam->BSIM4v4leff);
npart_theta = 0.37 * (1.0 + T5
* model->BSIM4v4tnoib * pParam->BSIM4v4leff);
break;
case BSIM4v30: case BSIM4v40:
npart_beta = model->BSIM4v4rnoia * (1.0 + T5
* model->BSIM4v4tnoia * pParam->BSIM4v4leff);
npart_theta = model->BSIM4v4rnoib * (1.0 + T5
* model->BSIM4v4tnoib * pParam->BSIM4v4leff);
break;
default: break;
}
if (model->BSIM4v4rdsMod == 0)
{ gspr = here->BSIM4v4sourceConductance;
gdpr = here->BSIM4v4drainConductance;
}
else
{ gspr = here->BSIM4v4gstot;
gdpr = here->BSIM4v4gdtot;
}
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21:
if ((*(ckt->CKTstates[0] + here->BSIM4v4vds)) >= 0.0)
gspr = gspr * (1.0 + npart_theta * npart_theta * gspr
/ here->BSIM4v4IdovVds);
else
gdpr = gdpr * (1.0 + npart_theta * npart_theta * gdpr
/ here->BSIM4v4IdovVds);
break;
case BSIM4v30: case BSIM4v40:
if ((*(ckt->CKTstates[0] + here->BSIM4v4vds)) >= 0.0)
gspr = gspr / (1.0 + npart_theta * npart_theta * gspr
/ here->BSIM4v4IdovVds); /* bugfix */
else
gdpr = gdpr / (1.0 + npart_theta * npart_theta * gdpr
/ here->BSIM4v4IdovVds);
break;
default: break;
}
}
NevalSrc(&noizDens[BSIM4v4RDNOIZ],
&lnNdens[BSIM4v4RDNOIZ], ckt, THERMNOISE,
here->BSIM4v4dNodePrime, here->BSIM4v4dNode,
gdpr * m);
NevalSrc(&noizDens[BSIM4v4RSNOIZ],
&lnNdens[BSIM4v4RSNOIZ], ckt, THERMNOISE,
here->BSIM4v4sNodePrime, here->BSIM4v4sNode,
gspr * m);
if ((here->BSIM4v4rgateMod == 1) || (here->BSIM4v4rgateMod == 2))
{ NevalSrc(&noizDens[BSIM4v4RGNOIZ],
&lnNdens[BSIM4v4RGNOIZ], ckt, THERMNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4gNodeExt,
here->BSIM4v4grgeltd * m);
}
else if (here->BSIM4v4rgateMod == 3)
{ NevalSrc(&noizDens[BSIM4v4RGNOIZ],
&lnNdens[BSIM4v4RGNOIZ], ckt, THERMNOISE,
here->BSIM4v4gNodeMid, here->BSIM4v4gNodeExt,
here->BSIM4v4grgeltd * m);
}
else
{ noizDens[BSIM4v4RGNOIZ] = 0.0;
lnNdens[BSIM4v4RGNOIZ] =
log(MAX(noizDens[BSIM4v4RGNOIZ], N_MINLOG));
}
if (here->BSIM4v4rbodyMod)
{ NevalSrc(&noizDens[BSIM4v4RBPSNOIZ],
&lnNdens[BSIM4v4RBPSNOIZ], ckt, THERMNOISE,
here->BSIM4v4bNodePrime, here->BSIM4v4sbNode,
here->BSIM4v4grbps * m);
NevalSrc(&noizDens[BSIM4v4RBPDNOIZ],
&lnNdens[BSIM4v4RBPDNOIZ], ckt, THERMNOISE,
here->BSIM4v4bNodePrime, here->BSIM4v4dbNode,
here->BSIM4v4grbpd * m);
NevalSrc(&noizDens[BSIM4v4RBPBNOIZ],
&lnNdens[BSIM4v4RBPBNOIZ], ckt, THERMNOISE,
here->BSIM4v4bNodePrime, here->BSIM4v4bNode,
here->BSIM4v4grbpb * m);
NevalSrc(&noizDens[BSIM4v4RBSBNOIZ],
&lnNdens[BSIM4v4RBSBNOIZ], ckt, THERMNOISE,
here->BSIM4v4bNode, here->BSIM4v4sbNode,
here->BSIM4v4grbsb * m);
NevalSrc(&noizDens[BSIM4v4RBDBNOIZ],
&lnNdens[BSIM4v4RBDBNOIZ], ckt, THERMNOISE,
here->BSIM4v4bNode, here->BSIM4v4dbNode,
here->BSIM4v4grbdb * m);
}
else
{ noizDens[BSIM4v4RBPSNOIZ] = noizDens[BSIM4v4RBPDNOIZ] = 0.0;
noizDens[BSIM4v4RBPBNOIZ] = 0.0;
noizDens[BSIM4v4RBSBNOIZ] = noizDens[BSIM4v4RBDBNOIZ] = 0.0;
lnNdens[BSIM4v4RBPSNOIZ] =
log(MAX(noizDens[BSIM4v4RBPSNOIZ], N_MINLOG));
lnNdens[BSIM4v4RBPDNOIZ] =
log(MAX(noizDens[BSIM4v4RBPDNOIZ], N_MINLOG));
lnNdens[BSIM4v4RBPBNOIZ] =
log(MAX(noizDens[BSIM4v4RBPBNOIZ], N_MINLOG));
lnNdens[BSIM4v4RBSBNOIZ] =
log(MAX(noizDens[BSIM4v4RBSBNOIZ], N_MINLOG));
lnNdens[BSIM4v4RBDBNOIZ] =
log(MAX(noizDens[BSIM4v4RBDBNOIZ], N_MINLOG));
}
switch(model->BSIM4v4tnoiMod)
{ case 0:
T0 = here->BSIM4v4ueff * fabs(here->BSIM4v4qinv);
T1 = T0 * tmp + pParam->BSIM4v4leff
* pParam->BSIM4v4leff;
NevalSrc(&noizDens[BSIM4v4IDNOIZ],
&lnNdens[BSIM4v4IDNOIZ], ckt,
THERMNOISE, here->BSIM4v4dNodePrime,
here->BSIM4v4sNodePrime,
m * (T0 / T1) * model->BSIM4v4ntnoi);
break;
case 1:
T0 = here->BSIM4v4gm + here->BSIM4v4gmbs + here->BSIM4v4gds;
T0 *= T0;
igsquare = npart_theta * npart_theta * T0 / here->BSIM4v4IdovVds;
T1 = npart_beta * (here->BSIM4v4gm
+ here->BSIM4v4gmbs) + here->BSIM4v4gds;
T2 = T1 * T1 / here->BSIM4v4IdovVds;
NevalSrc(&noizDens[BSIM4v4IDNOIZ],
&lnNdens[BSIM4v4IDNOIZ], ckt,
THERMNOISE, here->BSIM4v4dNodePrime,
here->BSIM4v4sNodePrime, m * (T2 - igsquare));
break;
}
NevalSrc(&noizDens[BSIM4v4FLNOIZ], NULL,
ckt, N_GAIN, here->BSIM4v4dNodePrime,
here->BSIM4v4sNodePrime, (double) 0.0);
switch(model->BSIM4v4fnoiMod)
{ case 0:
noizDens[BSIM4v4FLNOIZ] *= m * model->BSIM4v4kf
* exp(model->BSIM4v4af
* log(MAX(fabs(here->BSIM4v4cd),
N_MINLOG)))
/ (pow(data->freq, model->BSIM4v4ef)
* pParam->BSIM4v4leff
* pParam->BSIM4v4leff
* model->BSIM4v4coxe);
break;
case 1:
Vds = *(ckt->CKTstates[0] + here->BSIM4v4vds);
if (Vds < 0.0)
Vds = -Vds;
Ssi = BSIM4v4Eval1ovFNoise(Vds, model, here,
data->freq, ckt->CKTtemp);
T10 = model->BSIM4v4oxideTrapDensityA
* CONSTboltz * ckt->CKTtemp;
T11 = pParam->BSIM4v4weff * pParam->BSIM4v4leff
* pow(data->freq, model->BSIM4v4ef) * 1.0e10
* here->BSIM4v4nstar * here->BSIM4v4nstar;
Swi = T10 / T11 * here->BSIM4v4cd
* here->BSIM4v4cd;
T1 = Swi + Ssi;
if (T1 > 0.0)
noizDens[BSIM4v4FLNOIZ] *= m * (Ssi * Swi) / T1;
else
noizDens[BSIM4v4FLNOIZ] *= 0.0;
break;
}
lnNdens[BSIM4v4FLNOIZ] =
log(MAX(noizDens[BSIM4v4FLNOIZ], N_MINLOG));
switch (model->BSIM4v4intVersion) {
case BSIM4vOLD: case BSIM4v21:
NevalSrc(&noizDens[BSIM4v4IGSNOIZ],
&lnNdens[BSIM4v4IGSNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4sNodePrime,
m * (here->BSIM4v4Igs + here->BSIM4v4Igcs));
NevalSrc(&noizDens[BSIM4v4IGDNOIZ],
&lnNdens[BSIM4v4IGDNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4dNodePrime,
m * (here->BSIM4v4Igd + here->BSIM4v4Igcd));
break;
case BSIM4v30: case BSIM4v40:
if(here->BSIM4v4mode >= 0) { /* bugfix */
NevalSrc(&noizDens[BSIM4v4IGSNOIZ],
&lnNdens[BSIM4v4IGSNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4sNodePrime,
m * (here->BSIM4v4Igs + here->BSIM4v4Igcs));
NevalSrc(&noizDens[BSIM4v4IGDNOIZ],
&lnNdens[BSIM4v4IGDNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4dNodePrime,
m * (here->BSIM4v4Igd + here->BSIM4v4Igcd));
} else {
NevalSrc(&noizDens[BSIM4v4IGSNOIZ],
&lnNdens[BSIM4v4IGSNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4sNodePrime,
m * (here->BSIM4v4Igs + here->BSIM4v4Igcd));
NevalSrc(&noizDens[BSIM4v4IGDNOIZ],
&lnNdens[BSIM4v4IGDNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4dNodePrime,
m * (here->BSIM4v4Igd + here->BSIM4v4Igcs));
}
break;
default: break;
}
NevalSrc(&noizDens[BSIM4v4IGBNOIZ],
&lnNdens[BSIM4v4IGBNOIZ], ckt, SHOTNOISE,
here->BSIM4v4gNodePrime, here->BSIM4v4bNodePrime,
m * here->BSIM4v4Igb);
noizDens[BSIM4v4TOTNOIZ] = noizDens[BSIM4v4RDNOIZ]
+ noizDens[BSIM4v4RSNOIZ] + noizDens[BSIM4v4RGNOIZ]
+ noizDens[BSIM4v4RBPSNOIZ] + noizDens[BSIM4v4RBPDNOIZ]
+ noizDens[BSIM4v4RBPBNOIZ]
+ noizDens[BSIM4v4RBSBNOIZ] + noizDens[BSIM4v4RBDBNOIZ]
+ noizDens[BSIM4v4IDNOIZ] + noizDens[BSIM4v4FLNOIZ]
+ noizDens[BSIM4v4IGSNOIZ] + noizDens[BSIM4v4IGDNOIZ]
+ noizDens[BSIM4v4IGBNOIZ];
lnNdens[BSIM4v4TOTNOIZ] =
log(MAX(noizDens[BSIM4v4TOTNOIZ], N_MINLOG));
*OnDens += noizDens[BSIM4v4TOTNOIZ];
if (data->delFreq == 0.0)
{ /* if we haven't done any previous
integration, we need to initialize our
"history" variables.
*/
for (i = 0; i < BSIM4v4NSRCS; i++)
{ here->BSIM4v4nVar[LNLSTDENS][i] =
lnNdens[i];
}
/* clear out our integration variables
if it's the first pass
*/
if (data->freq ==
job->NstartFreq)
{ for (i = 0; i < BSIM4v4NSRCS; i++)
{ here->BSIM4v4nVar[OUTNOIZ][i] = 0.0;
here->BSIM4v4nVar[INNOIZ][i] = 0.0;
}
}
}
else
{ /* data->delFreq != 0.0,
we have to integrate.
*/
for (i = 0; i < BSIM4v4NSRCS; i++)
{ if (i != BSIM4v4TOTNOIZ)
{ tempOnoise = Nintegrate(noizDens[i],
lnNdens[i],
here->BSIM4v4nVar[LNLSTDENS][i],
data);
tempInoise = Nintegrate(noizDens[i]
* data->GainSqInv, lnNdens[i]
+ data->lnGainInv,
here->BSIM4v4nVar[LNLSTDENS][i]
+ data->lnGainInv, data);
here->BSIM4v4nVar[LNLSTDENS][i] =
lnNdens[i];
data->outNoiz += tempOnoise;
data->inNoise += tempInoise;
if (job->NStpsSm != 0)
{ here->BSIM4v4nVar[OUTNOIZ][i]
+= tempOnoise;
here->BSIM4v4nVar[OUTNOIZ][BSIM4v4TOTNOIZ]
+= tempOnoise;
here->BSIM4v4nVar[INNOIZ][i]
+= tempInoise;
here->BSIM4v4nVar[INNOIZ][BSIM4v4TOTNOIZ]
+= tempInoise;
}
}
}
}
if (data->prtSummary)
{ for (i = 0; i < BSIM4v4NSRCS; i++)
{ /* print a summary report */
data->outpVector[data->outNumber++]
= noizDens[i];
}
}
break;
case INT_NOIZ:
/* already calculated, just output */
if (job->NStpsSm != 0)
{ for (i = 0; i < BSIM4v4NSRCS; i++)
{ data->outpVector[data->outNumber++]
= here->BSIM4v4nVar[OUTNOIZ][i];
data->outpVector[data->outNumber++]
= here->BSIM4v4nVar[INNOIZ][i];
}
}
break;
}
break;
case N_CLOSE:
/* do nothing, the main calling routine will close */
return (OK);
break; /* the plots */
} /* switch (operation) */
} /* for here */
} /* for model */
return(OK);
}

173
src/spicelib/devices/bsim4v4/b4v4par.c
View File

@ -1,173 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4par.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 11/15/2002.
* Modified by Xuemei Xi, 05/09/2003.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
#include "ngspice/fteext.h"
int
BSIM4v4param(
int param,
IFvalue *value,
GENinstance *inst,
IFvalue *select)
{
double scale;
BSIM4v4instance *here = (BSIM4v4instance*)inst;
NG_IGNORE(select);
if (!cp_getvar("scale", CP_REAL, &scale))
scale = 1;
switch(param)
{ case BSIM4v4_W:
here->BSIM4v4w = value->rValue*scale;
here->BSIM4v4wGiven = TRUE;
break;
case BSIM4v4_L:
here->BSIM4v4l = value->rValue*scale;
here->BSIM4v4lGiven = TRUE;
break;
case BSIM4v4_M:
here->BSIM4v4m = value->rValue;
here->BSIM4v4mGiven = TRUE;
break;
case BSIM4v4_NF:
here->BSIM4v4nf = value->rValue;
here->BSIM4v4nfGiven = TRUE;
break;
case BSIM4v4_MIN:
here->BSIM4v4min = value->iValue;
here->BSIM4v4minGiven = TRUE;
break;
case BSIM4v4_AS:
here->BSIM4v4sourceArea = value->rValue*scale*scale;
here->BSIM4v4sourceAreaGiven = TRUE;
break;
case BSIM4v4_AD:
here->BSIM4v4drainArea = value->rValue*scale*scale;
here->BSIM4v4drainAreaGiven = TRUE;
break;
case BSIM4v4_PS:
here->BSIM4v4sourcePerimeter = value->rValue*scale;
here->BSIM4v4sourcePerimeterGiven = TRUE;
break;
case BSIM4v4_PD:
here->BSIM4v4drainPerimeter = value->rValue*scale;
here->BSIM4v4drainPerimeterGiven = TRUE;
break;
case BSIM4v4_NRS:
here->BSIM4v4sourceSquares = value->rValue;
here->BSIM4v4sourceSquaresGiven = TRUE;
break;
case BSIM4v4_NRD:
here->BSIM4v4drainSquares = value->rValue;
here->BSIM4v4drainSquaresGiven = TRUE;
break;
case BSIM4v4_OFF:
here->BSIM4v4off = value->iValue;
break;
case BSIM4v4_SA:
here->BSIM4v4sa = value->rValue*scale;
here->BSIM4v4saGiven = TRUE;
break;
case BSIM4v4_SB:
here->BSIM4v4sb = value->rValue*scale;
here->BSIM4v4sbGiven = TRUE;
break;
case BSIM4v4_SD:
here->BSIM4v4sd = value->rValue*scale;
here->BSIM4v4sdGiven = TRUE;
break;
case BSIM4v4_RBSB:
here->BSIM4v4rbsb = value->rValue;
here->BSIM4v4rbsbGiven = TRUE;
break;
case BSIM4v4_RBDB:
here->BSIM4v4rbdb = value->rValue;
here->BSIM4v4rbdbGiven = TRUE;
break;
case BSIM4v4_RBPB:
here->BSIM4v4rbpb = value->rValue;
here->BSIM4v4rbpbGiven = TRUE;
break;
case BSIM4v4_RBPS:
here->BSIM4v4rbps = value->rValue;
here->BSIM4v4rbpsGiven = TRUE;
break;
case BSIM4v4_RBPD:
here->BSIM4v4rbpd = value->rValue;
here->BSIM4v4rbpdGiven = TRUE;
break;
case BSIM4v4_TRNQSMOD:
here->BSIM4v4trnqsMod = value->iValue;
here->BSIM4v4trnqsModGiven = TRUE;
break;
case BSIM4v4_ACNQSMOD:
here->BSIM4v4acnqsMod = value->iValue;
here->BSIM4v4acnqsModGiven = TRUE;
break;
case BSIM4v4_RBODYMOD:
here->BSIM4v4rbodyMod = value->iValue;
here->BSIM4v4rbodyModGiven = TRUE;
break;
case BSIM4v4_RGATEMOD:
here->BSIM4v4rgateMod = value->iValue;
here->BSIM4v4rgateModGiven = TRUE;
break;
case BSIM4v4_GEOMOD:
here->BSIM4v4geoMod = value->iValue;
here->BSIM4v4geoModGiven = TRUE;
break;
case BSIM4v4_RGEOMOD:
here->BSIM4v4rgeoMod = value->iValue;
here->BSIM4v4rgeoModGiven = TRUE;
break;
case BSIM4v4_IC_VDS:
here->BSIM4v4icVDS = value->rValue;
here->BSIM4v4icVDSGiven = TRUE;
break;
case BSIM4v4_IC_VGS:
here->BSIM4v4icVGS = value->rValue;
here->BSIM4v4icVGSGiven = TRUE;
break;
case BSIM4v4_IC_VBS:
here->BSIM4v4icVBS = value->rValue;
here->BSIM4v4icVBSGiven = TRUE;
break;
case BSIM4v4_IC:
switch(value->v.numValue)
{ case 3:
here->BSIM4v4icVBS = *(value->v.vec.rVec+2);
here->BSIM4v4icVBSGiven = TRUE;
case 2:
here->BSIM4v4icVGS = *(value->v.vec.rVec+1);
here->BSIM4v4icVGSGiven = TRUE;
case 1:
here->BSIM4v4icVDS = *(value->v.vec.rVec);
here->BSIM4v4icVDSGiven = TRUE;
break;
default:
return(E_BADPARM);
}
break;
default:
return(E_BADPARM);
}
return(OK);
}

758
src/spicelib/devices/bsim4v4/b4v4pzld.c
View File

@ -1,758 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4pzld.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 10/05/2001.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "ngspice/complex.h"
#include "ngspice/sperror.h"
#include "bsim4v4def.h"
#include "ngspice/suffix.h"
int
BSIM4v4pzLoad(
GENmodel *inModel,
CKTcircuit *ckt,
SPcomplex *s)
{
BSIM4v4model *model = (BSIM4v4model*)inModel;
BSIM4v4instance *here;
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
double gds, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
double gstot, gstotd, gstotg, gstots, gstotb, gspr;
double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr;
double gIstotg, gIstotd, gIstots, gIstotb;
double gIdtotg, gIdtotd, gIdtots, gIdtotb;
double gIbtotg, gIbtotd, gIbtots, gIbtotb;
double gIgtotg, gIgtotd, gIgtots, gIgtotb;
double cgso, cgdo, cgbo;
double xcdbdb=0.0, xcsbsb=0.0, xcgmgmb=0.0, xcgmdb=0.0, xcgmsb=0.0, xcdgmb=0.0, xcsgmb=0.0;
double xcgmbb=0.0, xcbgmb=0.0;
double dxpart, sxpart, xgtg, xgtd, xgts, xgtb, xcqgb=0.0, xcqdb=0.0, xcqsb=0.0, xcqbb=0.0;
double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs;
double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs;
double T0=0.0, T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
double ScalingFactor = 1.0e-9;
struct bsim4SizeDependParam *pParam;
double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls;
double m;
for (; model != NULL; model = model->BSIM4v4nextModel)
{ for (here = model->BSIM4v4instances; here!= NULL;
here = here->BSIM4v4nextInstance)
{
pParam = here->pParam;
capbd = here->BSIM4v4capbd;
capbs = here->BSIM4v4capbs;
cgso = here->BSIM4v4cgso;
cgdo = here->BSIM4v4cgdo;
cgbo = pParam->BSIM4v4cgbo;
if (here->BSIM4v4mode >= 0)
{ Gm = here->BSIM4v4gm;
Gmbs = here->BSIM4v4gmbs;
FwdSum = Gm + Gmbs;
RevSum = 0.0;
gbbdp = -(here->BSIM4v4gbds);
gbbsp = here->BSIM4v4gbds + here->BSIM4v4gbgs + here->BSIM4v4gbbs;
gbdpg = here->BSIM4v4gbgs;
gbdpdp = here->BSIM4v4gbds;
gbdpb = here->BSIM4v4gbbs;
gbdpsp = -(gbdpg + gbdpdp + gbdpb);
gbspdp = 0.0;
gbspg = 0.0;
gbspb = 0.0;
gbspsp = 0.0;
if (model->BSIM4v4igcMod)
{ gIstotg = here->BSIM4v4gIgsg + here->BSIM4v4gIgcsg;
gIstotd = here->BSIM4v4gIgcsd;
gIstots = here->BSIM4v4gIgss + here->BSIM4v4gIgcss;
gIstotb = here->BSIM4v4gIgcsb;
gIdtotg = here->BSIM4v4gIgdg + here->BSIM4v4gIgcdg;
gIdtotd = here->BSIM4v4gIgdd + here->BSIM4v4gIgcdd;
gIdtots = here->BSIM4v4gIgcds;
gIdtotb = here->BSIM4v4gIgcdb;
}
else
{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
}
if (model->BSIM4v4igbMod)
{ gIbtotg = here->BSIM4v4gIgbg;
gIbtotd = here->BSIM4v4gIgbd;
gIbtots = here->BSIM4v4gIgbs;
gIbtotb = here->BSIM4v4gIgbb;
}
else
gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
if ((model->BSIM4v4igcMod != 0) || (model->BSIM4v4igbMod != 0))
{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
gIgtotd = gIstotd + gIdtotd + gIbtotd ;
gIgtots = gIstots + gIdtots + gIbtots;
gIgtotb = gIstotb + gIdtotb + gIbtotb;
}
else
gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
if (here->BSIM4v4rgateMod == 2)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vges)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
else if (here->BSIM4v4rgateMod == 3)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vgms)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
if (here->BSIM4v4rgateMod > 1)
{ gcrgd = here->BSIM4v4gcrgd * T0;
gcrgg = here->BSIM4v4gcrgg * T0;
gcrgs = here->BSIM4v4gcrgs * T0;
gcrgb = here->BSIM4v4gcrgb * T0;
gcrgg -= here->BSIM4v4gcrg;
gcrg = here->BSIM4v4gcrg;
}
else
gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
if (here->BSIM4v4acnqsMod == 0)
{ if (here->BSIM4v4rgateMod == 3)
{ xcgmgmb = cgdo + cgso + pParam->BSIM4v4cgbo;
xcgmdb = -cgdo;
xcgmsb = -cgso;
xcgmbb = -pParam->BSIM4v4cgbo;
xcdgmb = xcgmdb;
xcsgmb = xcgmsb;
xcbgmb = xcgmbb;
xcggb = here->BSIM4v4cggb;
xcgdb = here->BSIM4v4cgdb;
xcgsb = here->BSIM4v4cgsb;
xcgbb = -(xcggb + xcgdb + xcgsb);
xcdgb = here->BSIM4v4cdgb;
xcsgb = -(here->BSIM4v4cggb + here->BSIM4v4cbgb
+ here->BSIM4v4cdgb);
xcbgb = here->BSIM4v4cbgb;
}
else
{ xcggb = here->BSIM4v4cggb + cgdo + cgso
+ pParam->BSIM4v4cgbo;
xcgdb = here->BSIM4v4cgdb - cgdo;
xcgsb = here->BSIM4v4cgsb - cgso;
xcgbb = -(xcggb + xcgdb + xcgsb);
xcdgb = here->BSIM4v4cdgb - cgdo;
xcsgb = -(here->BSIM4v4cggb + here->BSIM4v4cbgb
+ here->BSIM4v4cdgb + cgso);
xcbgb = here->BSIM4v4cbgb - pParam->BSIM4v4cgbo;
xcdgmb = xcsgmb = xcbgmb = 0.0;
}
xcddb = here->BSIM4v4cddb + here->BSIM4v4capbd + cgdo;
xcdsb = here->BSIM4v4cdsb;
xcsdb = -(here->BSIM4v4cgdb + here->BSIM4v4cbdb
+ here->BSIM4v4cddb);
xcssb = here->BSIM4v4capbs + cgso - (here->BSIM4v4cgsb
+ here->BSIM4v4cbsb + here->BSIM4v4cdsb);
if (!here->BSIM4v4rbodyMod)
{ xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb);
xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb);
xcbdb = here->BSIM4v4cbdb - here->BSIM4v4capbd;
xcbsb = here->BSIM4v4cbsb - here->BSIM4v4capbs;
xcdbdb = 0.0;
}
else
{ xcdbb = -(here->BSIM4v4cddb + here->BSIM4v4cdgb
+ here->BSIM4v4cdsb);
xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb)
+ here->BSIM4v4capbs;
xcbdb = here->BSIM4v4cbdb;
xcbsb = here->BSIM4v4cbsb;
xcdbdb = -here->BSIM4v4capbd;
xcsbsb = -here->BSIM4v4capbs;
}
xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb);
xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.6;
dxpart = 0.4;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ xcggb = xcgdb = xcgsb = xcgbb = 0.0;
xcbgb = xcbdb = xcbsb = xcbbb = 0.0;
xcdgb = xcddb = xcdsb = xcdbb = 0.0;
xcsgb = xcsdb = xcssb = xcsbb = 0.0;
xgtg = here->BSIM4v4gtg;
xgtd = here->BSIM4v4gtd;
xgts = here->BSIM4v4gts;
xgtb = here->BSIM4v4gtb;
xcqgb = here->BSIM4v4cqgb;
xcqdb = here->BSIM4v4cqdb;
xcqsb = here->BSIM4v4cqsb;
xcqbb = here->BSIM4v4cqbb;
CoxWL = model->BSIM4v4coxe * here->pParam->BSIM4v4weffCV
* here->BSIM4v4nf * here->pParam->BSIM4v4leffCV;
qcheq = -(here->BSIM4v4qgate + here->BSIM4v4qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM4v4xpart < 0.5)
{ dxpart = 0.4;
}
else if (model->BSIM4v4xpart > 0.5)
{ dxpart = 0.0;
}
else
{ dxpart = 0.5;
}
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
}
else
{ dxpart = here->BSIM4v4qdrn / qcheq;
Cdd = here->BSIM4v4cddb;
Csd = -(here->BSIM4v4cgdb + here->BSIM4v4cddb
+ here->BSIM4v4cbdb);
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
Cdg = here->BSIM4v4cdgb;
Csg = -(here->BSIM4v4cggb + here->BSIM4v4cdgb
+ here->BSIM4v4cbgb);
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
Cds = here->BSIM4v4cdsb;
Css = -(here->BSIM4v4cgsb + here->BSIM4v4cdsb
+ here->BSIM4v4cbsb);
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
+ ddxpart_dVs);
}
sxpart = 1.0 - dxpart;
dsxpart_dVd = -ddxpart_dVd;
dsxpart_dVg = -ddxpart_dVg;
dsxpart_dVs = -ddxpart_dVs;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
}
}
else
{ Gm = -here->BSIM4v4gm;
Gmbs = -here->BSIM4v4gmbs;
FwdSum = 0.0;
RevSum = -(Gm + Gmbs);
gbbsp = -(here->BSIM4v4gbds);
gbbdp = here->BSIM4v4gbds + here->BSIM4v4gbgs + here->BSIM4v4gbbs;
gbdpg = 0.0;
gbdpsp = 0.0;
gbdpb = 0.0;
gbdpdp = 0.0;
gbspg = here->BSIM4v4gbgs;
gbspsp = here->BSIM4v4gbds;
gbspb = here->BSIM4v4gbbs;
gbspdp = -(gbspg + gbspsp + gbspb);
if (model->BSIM4v4igcMod)
{ gIstotg = here->BSIM4v4gIgsg + here->BSIM4v4gIgcdg;
gIstotd = here->BSIM4v4gIgcds;
gIstots = here->BSIM4v4gIgss + here->BSIM4v4gIgcdd;
gIstotb = here->BSIM4v4gIgcdb;
gIdtotg = here->BSIM4v4gIgdg + here->BSIM4v4gIgcsg;
gIdtotd = here->BSIM4v4gIgdd + here->BSIM4v4gIgcss;
gIdtots = here->BSIM4v4gIgcsd;
gIdtotb = here->BSIM4v4gIgcsb;
}
else
{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
}
if (model->BSIM4v4igbMod)
{ gIbtotg = here->BSIM4v4gIgbg;
gIbtotd = here->BSIM4v4gIgbs;
gIbtots = here->BSIM4v4gIgbd;
gIbtotb = here->BSIM4v4gIgbb;
}
else
gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
if ((model->BSIM4v4igcMod != 0) || (model->BSIM4v4igbMod != 0))
{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
gIgtotd = gIstotd + gIdtotd + gIbtotd ;
gIgtots = gIstots + gIdtots + gIbtots;
gIgtotb = gIstotb + gIdtotb + gIbtotb;
}
else
gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
if (here->BSIM4v4rgateMod == 2)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vges)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
else if (here->BSIM4v4rgateMod == 3)
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vgms)
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
if (here->BSIM4v4rgateMod > 1)
{ gcrgd = here->BSIM4v4gcrgs * T0;
gcrgg = here->BSIM4v4gcrgg * T0;
gcrgs = here->BSIM4v4gcrgd * T0;
gcrgb = here->BSIM4v4gcrgb * T0;
gcrgg -= here->BSIM4v4gcrg;
gcrg = here->BSIM4v4gcrg;
}
else
gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
if (here->BSIM4v4acnqsMod == 0)
{ if (here->BSIM4v4rgateMod == 3)
{ xcgmgmb = cgdo + cgso + pParam->BSIM4v4cgbo;
xcgmdb = -cgdo;
xcgmsb = -cgso;
xcgmbb = -pParam->BSIM4v4cgbo;
xcdgmb = xcgmdb;
xcsgmb = xcgmsb;
xcbgmb = xcgmbb;
xcggb = here->BSIM4v4cggb;
xcgdb = here->BSIM4v4cgsb;
xcgsb = here->BSIM4v4cgdb;
xcgbb = -(xcggb + xcgdb + xcgsb);
xcdgb = -(here->BSIM4v4cggb + here->BSIM4v4cbgb
+ here->BSIM4v4cdgb);
xcsgb = here->BSIM4v4cdgb;
xcbgb = here->BSIM4v4cbgb;
}
else
{ xcggb = here->BSIM4v4cggb + cgdo + cgso
+ pParam->BSIM4v4cgbo;
xcgdb = here->BSIM4v4cgsb - cgdo;
xcgsb = here->BSIM4v4cgdb - cgso;
xcgbb = -(xcggb + xcgdb + xcgsb);
xcdgb = -(here->BSIM4v4cggb + here->BSIM4v4cbgb
+ here->BSIM4v4cdgb + cgdo);
xcsgb = here->BSIM4v4cdgb - cgso;
xcbgb = here->BSIM4v4cbgb - pParam->BSIM4v4cgbo;
xcdgmb = xcsgmb = xcbgmb = 0.0;
}
xcddb = here->BSIM4v4capbd + cgdo - (here->BSIM4v4cgsb
+ here->BSIM4v4cbsb + here->BSIM4v4cdsb);
xcdsb = -(here->BSIM4v4cgdb + here->BSIM4v4cbdb
+ here->BSIM4v4cddb);
xcsdb = here->BSIM4v4cdsb;
xcssb = here->BSIM4v4cddb + here->BSIM4v4capbs + cgso;
if (!here->BSIM4v4rbodyMod)
{ xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb);
xcsbb = -(xcsgb + xcsdb + xcssb + xcsgmb);
xcbdb = here->BSIM4v4cbsb - here->BSIM4v4capbd;
xcbsb = here->BSIM4v4cbdb - here->BSIM4v4capbs;
xcdbdb = 0.0;
}
else
{ xcdbb = -(xcdgb + xcddb + xcdsb + xcdgmb)
+ here->BSIM4v4capbd;
xcsbb = -(here->BSIM4v4cddb + here->BSIM4v4cdgb
+ here->BSIM4v4cdsb);
xcbdb = here->BSIM4v4cbsb;
xcbsb = here->BSIM4v4cbdb;
xcdbdb = -here->BSIM4v4capbd;
xcsbsb = -here->BSIM4v4capbs;
}
xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb);
xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.4;
dxpart = 0.6;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ xcggb = xcgdb = xcgsb = xcgbb = 0.0;
xcbgb = xcbdb = xcbsb = xcbbb = 0.0;
xcdgb = xcddb = xcdsb = xcdbb = 0.0;
xcsgb = xcsdb = xcssb = xcsbb = 0.0;
xgtg = here->BSIM4v4gtg;
xgtd = here->BSIM4v4gts;
xgts = here->BSIM4v4gtd;
xgtb = here->BSIM4v4gtb;
xcqgb = here->BSIM4v4cqgb;
xcqdb = here->BSIM4v4cqsb;
xcqsb = here->BSIM4v4cqdb;
xcqbb = here->BSIM4v4cqbb;
CoxWL = model->BSIM4v4coxe * here->pParam->BSIM4v4weffCV
* here->BSIM4v4nf * here->pParam->BSIM4v4leffCV;
qcheq = -(here->BSIM4v4qgate + here->BSIM4v4qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM4v4xpart < 0.5)
{ sxpart = 0.4;
}
else if (model->BSIM4v4xpart > 0.5)
{ sxpart = 0.0;
}
else
{ sxpart = 0.5;
}
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ sxpart = here->BSIM4v4qdrn / qcheq;
Css = here->BSIM4v4cddb;
Cds = -(here->BSIM4v4cgdb + here->BSIM4v4cddb
+ here->BSIM4v4cbdb);
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
Csg = here->BSIM4v4cdgb;
Cdg = -(here->BSIM4v4cggb + here->BSIM4v4cdgb
+ here->BSIM4v4cbgb);
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
Csd = here->BSIM4v4cdsb;
Cdd = -(here->BSIM4v4cgsb + here->BSIM4v4cdsb
+ here->BSIM4v4cbsb);
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
+ dsxpart_dVs);
}
dxpart = 1.0 - sxpart;
ddxpart_dVd = -dsxpart_dVd;
ddxpart_dVg = -dsxpart_dVg;
ddxpart_dVs = -dsxpart_dVs;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
}
}
if (model->BSIM4v4rdsMod == 1)
{ gstot = here->BSIM4v4gstot;
gstotd = here->BSIM4v4gstotd;
gstotg = here->BSIM4v4gstotg;
gstots = here->BSIM4v4gstots - gstot;
gstotb = here->BSIM4v4gstotb;
gdtot = here->BSIM4v4gdtot;
gdtotd = here->BSIM4v4gdtotd - gdtot;
gdtotg = here->BSIM4v4gdtotg;
gdtots = here->BSIM4v4gdtots;
gdtotb = here->BSIM4v4gdtotb;
}
else
{ gstot = gstotd = gstotg = gstots = gstotb = 0.0;
gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0;
}
T1 = *(ckt->CKTstate0 + here->BSIM4v4qdef) * here->BSIM4v4gtau;
gds = here->BSIM4v4gds;
/*
* Loading PZ matrix
*/
m = here->BSIM4v4m;
if (!model->BSIM4v4rdsMod)
{ gdpr = here->BSIM4v4drainConductance;
gspr = here->BSIM4v4sourceConductance;
}
else
gdpr = gspr = 0.0;
if (!here->BSIM4v4rbodyMod)
{ gjbd = here->BSIM4v4gbd;
gjbs = here->BSIM4v4gbs;
}
else
gjbd = gjbs = 0.0;
geltd = here->BSIM4v4grgeltd;
if (here->BSIM4v4rgateMod == 1)
{ *(here->BSIM4v4GEgePtr) += m * geltd;
*(here->BSIM4v4GPgePtr) -= m * geltd;
*(here->BSIM4v4GEgpPtr) -= m * geltd;
*(here->BSIM4v4GPgpPtr ) += m * xcggb * s->real;
*(here->BSIM4v4GPgpPtr +1) += m * xcggb * s->imag;
*(here->BSIM4v4GPgpPtr) += m * (geltd - xgtg + gIgtotg);
*(here->BSIM4v4GPdpPtr ) += m * xcgdb * s->real;
*(here->BSIM4v4GPdpPtr +1) += m * xcgdb * s->imag;
*(here->BSIM4v4GPdpPtr) -= m * (xgtd - gIgtotd);
*(here->BSIM4v4GPspPtr ) += m * xcgsb * s->real;
*(here->BSIM4v4GPspPtr +1) += m * xcgsb * s->imag;
*(here->BSIM4v4GPspPtr) -= m * (xgts - gIgtots);
*(here->BSIM4v4GPbpPtr ) += m * xcgbb * s->real;
*(here->BSIM4v4GPbpPtr +1) += m * xcgbb * s->imag;
*(here->BSIM4v4GPbpPtr) -= m * (xgtb - gIgtotb);
}
else if (here->BSIM4v4rgateMod == 2)
{ *(here->BSIM4v4GEgePtr) += m * gcrg;
*(here->BSIM4v4GEgpPtr) += m * gcrgg;
*(here->BSIM4v4GEdpPtr) += m * gcrgd;
*(here->BSIM4v4GEspPtr) += m * gcrgs;
*(here->BSIM4v4GEbpPtr) += m * gcrgb;
*(here->BSIM4v4GPgePtr) -= m * gcrg;
*(here->BSIM4v4GPgpPtr ) += m * xcggb * s->real;
*(here->BSIM4v4GPgpPtr +1) += m * xcggb * s->imag;
*(here->BSIM4v4GPgpPtr) -= m * (gcrgg + xgtg - gIgtotg);
*(here->BSIM4v4GPdpPtr ) += m * xcgdb * s->real;
*(here->BSIM4v4GPdpPtr +1) += m * xcgdb * s->imag;
*(here->BSIM4v4GPdpPtr) -= m * (gcrgd + xgtd - gIgtotd);
*(here->BSIM4v4GPspPtr ) += m * xcgsb * s->real;
*(here->BSIM4v4GPspPtr +1) += m * xcgsb * s->imag;
*(here->BSIM4v4GPspPtr) -= m * (gcrgs + xgts - gIgtots);
*(here->BSIM4v4GPbpPtr ) += m * xcgbb * s->real;
*(here->BSIM4v4GPbpPtr +1) += m * xcgbb * s->imag;
*(here->BSIM4v4GPbpPtr) -= m * (gcrgb + xgtb - gIgtotb);
}
else if (here->BSIM4v4rgateMod == 3)
{ *(here->BSIM4v4GEgePtr) += m * geltd;
*(here->BSIM4v4GEgmPtr) -= m * geltd;
*(here->BSIM4v4GMgePtr) -= m * geltd;
*(here->BSIM4v4GMgmPtr) += m * (geltd + gcrg);
*(here->BSIM4v4GMgmPtr ) += m * xcgmgmb * s->real;
*(here->BSIM4v4GMgmPtr +1) += m * xcgmgmb * s->imag;
*(here->BSIM4v4GMdpPtr) += m * gcrgd;
*(here->BSIM4v4GMdpPtr ) += m * xcgmdb * s->real;
*(here->BSIM4v4GMdpPtr +1) += m * xcgmdb * s->imag;
*(here->BSIM4v4GMgpPtr) += m * gcrgg;
*(here->BSIM4v4GMspPtr) += m * gcrgs;
*(here->BSIM4v4GMspPtr ) += m * xcgmsb * s->real;
*(here->BSIM4v4GMspPtr +1) += m * xcgmsb * s->imag;
*(here->BSIM4v4GMbpPtr) += m * gcrgb;
*(here->BSIM4v4GMbpPtr ) += m * xcgmbb * s->real;
*(here->BSIM4v4GMbpPtr +1) += m * xcgmbb * s->imag;
*(here->BSIM4v4DPgmPtr ) += m * xcdgmb * s->real;
*(here->BSIM4v4DPgmPtr +1) += m * xcdgmb * s->imag;
*(here->BSIM4v4GPgmPtr) -= m * gcrg;
*(here->BSIM4v4SPgmPtr ) += m * xcsgmb * s->real;
*(here->BSIM4v4SPgmPtr +1) += m * xcsgmb * s->imag;
*(here->BSIM4v4BPgmPtr ) += m * xcbgmb * s->real;
*(here->BSIM4v4BPgmPtr +1) += m * xcbgmb * s->imag;
*(here->BSIM4v4GPgpPtr) -= m * (gcrgg + xgtg - gIgtotg);
*(here->BSIM4v4GPgpPtr ) += m * xcggb * s->real;
*(here->BSIM4v4GPgpPtr +1) += m * xcggb * s->imag;
*(here->BSIM4v4GPdpPtr) -= m * (gcrgd + xgtd - gIgtotd);
*(here->BSIM4v4GPdpPtr ) += m * xcgdb * s->real;
*(here->BSIM4v4GPdpPtr +1) += m * xcgdb * s->imag;
*(here->BSIM4v4GPspPtr) -= m * (gcrgs + xgts - gIgtots);
*(here->BSIM4v4GPspPtr ) += m * xcgsb * s->real;
*(here->BSIM4v4GPspPtr +1) += m * xcgsb * s->imag;
*(here->BSIM4v4GPbpPtr) -= m * (gcrgb + xgtb - gIgtotb);
*(here->BSIM4v4GPbpPtr ) += m * xcgbb * s->real;
*(here->BSIM4v4GPbpPtr +1) += m * xcgbb * s->imag;
}
else
{ *(here->BSIM4v4GPdpPtr ) += m * xcgdb * s->real;
*(here->BSIM4v4GPdpPtr +1) += m * xcgdb * s->imag;
*(here->BSIM4v4GPdpPtr) -= m * (xgtd - gIgtotd);
*(here->BSIM4v4GPgpPtr ) += m * xcggb * s->real;
*(here->BSIM4v4GPgpPtr +1) += m * xcggb * s->imag;
*(here->BSIM4v4GPgpPtr) -= m * (xgtg - gIgtotg);
*(here->BSIM4v4GPspPtr ) += m * xcgsb * s->real;
*(here->BSIM4v4GPspPtr +1) += m * xcgsb * s->imag;
*(here->BSIM4v4GPspPtr) -= m * (xgts - gIgtots);
*(here->BSIM4v4GPbpPtr ) += m * xcgbb * s->real;
*(here->BSIM4v4GPbpPtr +1) += m * xcgbb * s->imag;
*(here->BSIM4v4GPbpPtr) -= m * (xgtb - gIgtotb);
}
if (model->BSIM4v4rdsMod)
{ (*(here->BSIM4v4DgpPtr) += m * gdtotg);
(*(here->BSIM4v4DspPtr) += m * gdtots);
(*(here->BSIM4v4DbpPtr) += m * gdtotb);
(*(here->BSIM4v4SdpPtr) += m * gstotd);
(*(here->BSIM4v4SgpPtr) += m * gstotg);
(*(here->BSIM4v4SbpPtr) += m * gstotb);
}
*(here->BSIM4v4DPdpPtr ) += m * xcddb * s->real;
*(here->BSIM4v4DPdpPtr +1) += m * xcddb * s->imag;
*(here->BSIM4v4DPdpPtr) += m * (gdpr + gds + here->BSIM4v4gbd
- gdtotd + RevSum + gbdpdp - gIdtotd
+ dxpart * xgtd + T1 * ddxpart_dVd);
*(here->BSIM4v4DPdPtr) -= m * (gdpr + gdtot);
*(here->BSIM4v4DPgpPtr ) += m * xcdgb * s->real;
*(here->BSIM4v4DPgpPtr +1) += m * xcdgb * s->imag;
*(here->BSIM4v4DPgpPtr) += m * (Gm - gdtotg + gbdpg - gIdtotg
+ T1 * ddxpart_dVg + dxpart * xgtg);
*(here->BSIM4v4DPspPtr ) += m * xcdsb * s->real;
*(here->BSIM4v4DPspPtr +1) += m * xcdsb * s->imag;
*(here->BSIM4v4DPspPtr) -= m * (gds + FwdSum + gdtots - gbdpsp + gIdtots
- T1 * ddxpart_dVs - dxpart * xgts);
*(here->BSIM4v4DPbpPtr ) += m * xcdbb * s->real;
*(here->BSIM4v4DPbpPtr +1) += m * xcdbb * s->imag;
*(here->BSIM4v4DPbpPtr) -= m * (gjbd + gdtotb - Gmbs - gbdpb + gIdtotb
- T1 * ddxpart_dVb - dxpart * xgtb);
*(here->BSIM4v4DdpPtr) -= m * (gdpr - gdtotd);
*(here->BSIM4v4DdPtr) += m * (gdpr + gdtot);
*(here->BSIM4v4SPdpPtr ) += m * xcsdb * s->real;
*(here->BSIM4v4SPdpPtr +1) += m * xcsdb * s->imag;
*(here->BSIM4v4SPdpPtr) -= m * (gds + gstotd + RevSum - gbspdp + gIstotd
- T1 * dsxpart_dVd - sxpart * xgtd);
*(here->BSIM4v4SPgpPtr ) += m * xcsgb * s->real;
*(here->BSIM4v4SPgpPtr +1) += m * xcsgb * s->imag;
*(here->BSIM4v4SPgpPtr) -= m * (Gm + gstotg - gbspg + gIstotg
- T1 * dsxpart_dVg - sxpart * xgtg);
*(here->BSIM4v4SPspPtr ) += m * xcssb * s->real;
*(here->BSIM4v4SPspPtr +1) += m * xcssb * s->imag;
*(here->BSIM4v4SPspPtr) += m * (gspr + gds + here->BSIM4v4gbs - gIstots
- gstots + FwdSum + gbspsp
+ sxpart * xgts + T1 * dsxpart_dVs);
*(here->BSIM4v4SPsPtr) -= m * (gspr + gstot);
*(here->BSIM4v4SPbpPtr ) += m * xcsbb * s->real;
*(here->BSIM4v4SPbpPtr +1) += m * xcsbb * s->imag;
*(here->BSIM4v4SPbpPtr) -= m * (gjbs + gstotb + Gmbs - gbspb + gIstotb
- T1 * dsxpart_dVb - sxpart * xgtb);
*(here->BSIM4v4SspPtr) -= m * (gspr - gstots);
*(here->BSIM4v4SsPtr) += m * (gspr + gstot);
*(here->BSIM4v4BPdpPtr ) += m * xcbdb * s->real;
*(here->BSIM4v4BPdpPtr +1) += m * xcbdb * s->imag;
*(here->BSIM4v4BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
*(here->BSIM4v4BPgpPtr ) += m * xcbgb * s->real;
*(here->BSIM4v4BPgpPtr +1) += m * xcbgb * s->imag;
*(here->BSIM4v4BPgpPtr) -= m * (here->BSIM4v4gbgs + gIbtotg);
*(here->BSIM4v4BPspPtr ) += m * xcbsb * s->real;
*(here->BSIM4v4BPspPtr +1) += m * xcbsb * s->imag;
*(here->BSIM4v4BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
*(here->BSIM4v4BPbpPtr ) += m * xcbbb * s->real;
*(here->BSIM4v4BPbpPtr +1) += m * xcbbb * s->imag;
*(here->BSIM4v4BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v4gbbs
- gIbtotb);
ggidld = here->BSIM4v4ggidld;
ggidlg = here->BSIM4v4ggidlg;
ggidlb = here->BSIM4v4ggidlb;
ggislg = here->BSIM4v4ggislg;
ggisls = here->BSIM4v4ggisls;
ggislb = here->BSIM4v4ggislb;
/* stamp gidl */
(*(here->BSIM4v4DPdpPtr) += m * ggidld);
(*(here->BSIM4v4DPgpPtr) += m * ggidlg);
(*(here->BSIM4v4DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
(*(here->BSIM4v4DPbpPtr) += m * ggidlb);
(*(here->BSIM4v4BPdpPtr) -= m * ggidld);
(*(here->BSIM4v4BPgpPtr) -= m * ggidlg);
(*(here->BSIM4v4BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
(*(here->BSIM4v4BPbpPtr) -= m * ggidlb);
/* stamp gisl */
(*(here->BSIM4v4SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
(*(here->BSIM4v4SPgpPtr) += m * ggislg);
(*(here->BSIM4v4SPspPtr) += m * ggisls);
(*(here->BSIM4v4SPbpPtr) += m * ggislb);
(*(here->BSIM4v4BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
(*(here->BSIM4v4BPgpPtr) -= m * ggislg);
(*(here->BSIM4v4BPspPtr) -= m * ggisls);
(*(here->BSIM4v4BPbpPtr) -= m * ggislb);
if (here->BSIM4v4rbodyMod)
{ (*(here->BSIM4v4DPdbPtr ) += m * xcdbdb * s->real);
(*(here->BSIM4v4DPdbPtr +1) += m * xcdbdb * s->imag);
(*(here->BSIM4v4DPdbPtr) -= m * here->BSIM4v4gbd);
(*(here->BSIM4v4SPsbPtr ) += m * xcsbsb * s->real);
(*(here->BSIM4v4SPsbPtr +1) += m * xcsbsb * s->imag);
(*(here->BSIM4v4SPsbPtr) -= m * here->BSIM4v4gbs);
(*(here->BSIM4v4DBdpPtr ) += m * xcdbdb * s->real);
(*(here->BSIM4v4DBdpPtr +1) += m * xcdbdb * s->imag);
(*(here->BSIM4v4DBdpPtr) -= m * here->BSIM4v4gbd);
(*(here->BSIM4v4DBdbPtr ) -= m * xcdbdb * s->real);
(*(here->BSIM4v4DBdbPtr +1) -= m * xcdbdb * s->imag);
(*(here->BSIM4v4DBdbPtr) += m * (here->BSIM4v4gbd + here->BSIM4v4grbpd
+ here->BSIM4v4grbdb));
(*(here->BSIM4v4DBbpPtr) -= m * here->BSIM4v4grbpd);
(*(here->BSIM4v4DBbPtr) -= m * here->BSIM4v4grbdb);
(*(here->BSIM4v4BPdbPtr) -= m * here->BSIM4v4grbpd);
(*(here->BSIM4v4BPbPtr) -= m * here->BSIM4v4grbpb);
(*(here->BSIM4v4BPsbPtr) -= m * here->BSIM4v4grbps);
(*(here->BSIM4v4BPbpPtr) += m * (here->BSIM4v4grbpd + here->BSIM4v4grbps
+ here->BSIM4v4grbpb));
/* WDL: (-here->BSIM4v4gbbs) already added to BPbpPtr */
(*(here->BSIM4v4SBspPtr ) += m * xcsbsb * s->real);
(*(here->BSIM4v4SBspPtr +1) += m * xcsbsb * s->imag);
(*(here->BSIM4v4SBspPtr) -= m * here->BSIM4v4gbs);
(*(here->BSIM4v4SBbpPtr) -= m * here->BSIM4v4grbps);
(*(here->BSIM4v4SBbPtr) -= m * here->BSIM4v4grbsb);
(*(here->BSIM4v4SBsbPtr ) -= m * xcsbsb * s->real);
(*(here->BSIM4v4SBsbPtr +1) -= m * xcsbsb * s->imag);
(*(here->BSIM4v4SBsbPtr) += m * (here->BSIM4v4gbs
+ here->BSIM4v4grbps + here->BSIM4v4grbsb));
(*(here->BSIM4v4BdbPtr) -= m * here->BSIM4v4grbdb);
(*(here->BSIM4v4BbpPtr) -= m * here->BSIM4v4grbpb);
(*(here->BSIM4v4BsbPtr) -= m * here->BSIM4v4grbsb);
(*(here->BSIM4v4BbPtr) += m * (here->BSIM4v4grbsb + here->BSIM4v4grbdb
+ here->BSIM4v4grbpb));
}
if (here->BSIM4v4acnqsMod)
{ *(here->BSIM4v4QqPtr ) += m * s->real * ScalingFactor;
*(here->BSIM4v4QqPtr +1) += m * s->imag * ScalingFactor;
*(here->BSIM4v4QgpPtr ) -= m * xcqgb * s->real;
*(here->BSIM4v4QgpPtr +1) -= m * xcqgb * s->imag;
*(here->BSIM4v4QdpPtr ) -= m * xcqdb * s->real;
*(here->BSIM4v4QdpPtr +1) -= m * xcqdb * s->imag;
*(here->BSIM4v4QbpPtr ) -= m * xcqbb * s->real;
*(here->BSIM4v4QbpPtr +1) -= m * xcqbb * s->imag;
*(here->BSIM4v4QspPtr ) -= m * xcqsb * s->real;
*(here->BSIM4v4QspPtr +1) -= m * xcqsb * s->imag;
*(here->BSIM4v4GPqPtr) -= m * here->BSIM4v4gtau;
*(here->BSIM4v4DPqPtr) += m * dxpart * here->BSIM4v4gtau;
*(here->BSIM4v4SPqPtr) += m * sxpart * here->BSIM4v4gtau;
*(here->BSIM4v4QqPtr) += m * here->BSIM4v4gtau;
*(here->BSIM4v4QgpPtr) += m * xgtg;
*(here->BSIM4v4QdpPtr) += m * xgtd;
*(here->BSIM4v4QbpPtr) += m * xgtb;
*(here->BSIM4v4QspPtr) += m * xgts;
}
}
}
return(OK);
}

1979
src/spicelib/devices/bsim4v4/b4v4set.c
File diff suppressed because it is too large
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1826
src/spicelib/devices/bsim4v4/b4v4temp.c
File diff suppressed because it is too large
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57
src/spicelib/devices/bsim4v4/b4v4trunc.c
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@ -1,57 +0,0 @@
/**** BSIM4.4.0 Released by Xuemei (Jane) Xi 03/04/2004 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4trunc.c of BSIM4.4.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Jin He, Kanyu Cao, Mohan Dunga, Mansun Chan, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim4v4def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM4v4trunc(
GENmodel *inModel,
CKTcircuit *ckt,
double *timeStep)
{
BSIM4v4model *model = (BSIM4v4model*)inModel;
BSIM4v4instance *here;
#ifdef STEPDEBUG
double debugtemp;
#endif /* STEPDEBUG */
for (; model != NULL; model = model->BSIM4v4nextModel)
{ for (here = model->BSIM4v4instances; here != NULL;
here = here->BSIM4v4nextInstance)
{
#ifdef STEPDEBUG
debugtemp = *timeStep;
#endif /* STEPDEBUG */
CKTterr(here->BSIM4v4qb,ckt,timeStep);
CKTterr(here->BSIM4v4qg,ckt,timeStep);
CKTterr(here->BSIM4v4qd,ckt,timeStep);
if (here->BSIM4v4trnqsMod)
CKTterr(here->BSIM4v4qcdump,ckt,timeStep);
if (here->BSIM4v4rbodyMod)
{ CKTterr(here->BSIM4v4qbs,ckt,timeStep);
CKTterr(here->BSIM4v4qbd,ckt,timeStep);
}
if (here->BSIM4v4rgateMod == 3)
CKTterr(here->BSIM4v4qgmid,ckt,timeStep);
#ifdef STEPDEBUG
if(debugtemp != *timeStep)
{ printf("device %s reduces step from %g to %g\n",
here->BSIM4v4name,debugtemp,*timeStep);
}
#endif /* STEPDEBUG */
}
}
return(OK);
}

2929
src/spicelib/devices/bsim4v4/bsim4v4def.h
File diff suppressed because it is too large
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33
src/spicelib/devices/bsim4v4/bsim4v4ext.h
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@ -1,33 +0,0 @@
/**********
Copyright 2004 Regents of the University of California. All rights reserved.
Author: 2000 Weidong Liu
Author: 2001- Xuemei Xi
File: bsim4ext.h
**********/
extern int BSIM4v4acLoad(GENmodel *,CKTcircuit*);
extern int BSIM4v4ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
extern int BSIM4v4convTest(GENmodel *,CKTcircuit*);
extern int BSIM4v4delete(GENmodel*,IFuid,GENinstance**);
extern void BSIM4v4destroy(GENmodel**);
extern int BSIM4v4getic(GENmodel*,CKTcircuit*);
extern int BSIM4v4load(GENmodel*,CKTcircuit*);
extern int BSIM4v4mAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
extern int BSIM4v4mDelete(GENmodel**,IFuid,GENmodel*);
extern int BSIM4v4mParam(int,IFvalue*,GENmodel*);
extern void BSIM4v4mosCap(CKTcircuit*, double, double, double, double,
double, double, double, double, double, double, double,
double, double, double, double, double, double, double*,
double*, double*, double*, double*, double*, double*, double*,
double*, double*, double*, double*, double*, double*, double*,
double*);
extern int BSIM4v4param(int,IFvalue*,GENinstance*,IFvalue*);
extern int BSIM4v4pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
extern int BSIM4v4setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
extern int BSIM4v4temp(GENmodel*,CKTcircuit*);
extern int BSIM4v4trunc(GENmodel*,CKTcircuit*,double*);
extern int BSIM4v4noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
extern int BSIM4v4unsetup(GENmodel*,CKTcircuit*);

84
src/spicelib/devices/bsim4v4/bsim4v4init.c
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@ -1,84 +0,0 @@
#include "ngspice/config.h"
#include "ngspice/devdefs.h"
#include "bsim4v4itf.h"
#include "bsim4v4ext.h"
#include "bsim4v4init.h"
SPICEdev BSIM4v4info = {
{
"BSIM4v4",
"Berkeley Short Channel IGFET Model-4",
&BSIM4v4nSize,
&BSIM4v4nSize,
BSIM4v4names,
&BSIM4v4pTSize,
BSIM4v4pTable,
&BSIM4v4mPTSize,
BSIM4v4mPTable,
#ifdef XSPICE
/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/
NULL, /* This is a SPICE device, it has no MIF info data */
0, /* This is a SPICE device, it has no MIF info data */
NULL, /* This is a SPICE device, it has no MIF info data */
0, /* This is a SPICE device, it has no MIF info data */
NULL, /* This is a SPICE device, it has no MIF info data */
0, /* This is a SPICE device, it has no MIF info data */
NULL, /* This is a SPICE device, it has no MIF info data */
/*--------------------------- End of SDB fix -------------------------*/
#endif
DEV_DEFAULT
},
BSIM4v4param, /* DEVparam */
BSIM4v4mParam, /* DEVmodParam */
BSIM4v4load, /* DEVload */
BSIM4v4setup, /* DEVsetup */
BSIM4v4unsetup, /* DEVunsetup */
BSIM4v4setup, /* DEVpzSetup */
BSIM4v4temp, /* DEVtemperature */
BSIM4v4trunc, /* DEVtrunc */
NULL, /* DEVfindBranch */
BSIM4v4acLoad, /* DEVacLoad */
NULL, /* DEVaccept */
BSIM4v4destroy, /* DEVdestroy */
BSIM4v4mDelete, /* DEVmodDelete */
BSIM4v4delete, /* DEVdelete */
BSIM4v4getic, /* DEVsetic */
BSIM4v4ask, /* DEVask */
BSIM4v4mAsk, /* DEVmodAsk */
BSIM4v4pzLoad, /* DEVpzLoad */
BSIM4v4convTest, /* DEVconvTest */
NULL, /* DEVsenSetup */
NULL, /* DEVsenLoad */
NULL, /* DEVsenUpdate */
NULL, /* DEVsenAcLoad */
NULL, /* DEVsenPrint */
NULL, /* DEVsenTrunc */
NULL, /* DEVdisto */
BSIM4v4noise, /* DEVnoise */
NULL, /* DEVsoaCheck */
#ifdef CIDER
NULL, /* DEVdump */
NULL, /* DEVacct */
#endif
&BSIM4v4iSize, /* DEVinstSize */
&BSIM4v4mSize /* DEVmodSize */
};
SPICEdev *
get_bsim4v4_info(void)
{
return &BSIM4v4info;
}

13
src/spicelib/devices/bsim4v4/bsim4v4init.h
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@ -1,13 +0,0 @@
#ifndef _BSIM4V4INIT_H
#define _BSIM4V4INIT_H
extern IFparm BSIM4v4pTable[ ];
extern IFparm BSIM4v4mPTable[ ];
extern char *BSIM4v4names[ ];
extern int BSIM4v4pTSize;
extern int BSIM4v4mPTSize;
extern int BSIM4v4nSize;
extern int BSIM4v4iSize;
extern int BSIM4v4mSize;
#endif

13
src/spicelib/devices/bsim4v4/bsim4v4itf.h
View File

@ -1,13 +0,0 @@
/**********
Copyright 2004 Regents of the University of California. All rights reserved.
Author: 2000 Weidong Liu.
Author: 2001- Xuemei Xi
File: bsim4itf.h
**********/
#ifndef DEV_BSIM4V4
#define DEV_BSIM4V4
SPICEdev *get_bsim4v4_info(void);
#endif

6
src/spicelib/devices/dev.c
View File

@ -79,7 +79,6 @@ int add_udn(int,Evt_Udn_Info_t **);
#include "bsim3v1/bsim3v1itf.h" #include "bsim3v1/bsim3v1itf.h"
#include "bsim3v32/bsim3v32itf.h" #include "bsim3v32/bsim3v32itf.h"
#include "bsim4/bsim4itf.h" #include "bsim4/bsim4itf.h"
#include "bsim4v4/bsim4v4itf.h"
#include "bsim4v5/bsim4v5itf.h" #include "bsim4v5/bsim4v5itf.h"
#include "bsim4v6/bsim4v6itf.h" #include "bsim4v6/bsim4v6itf.h"
#include "bsim3soi_pd/b3soipditf.h" #include "bsim3soi_pd/b3soipditf.h"
@ -150,7 +149,6 @@ static SPICEdev *(*static_devices[])(void) = {
get_bsim3v32_info, get_bsim3v32_info,
get_b4soi_info, get_b4soi_info,
get_bsim4_info, get_bsim4_info,
get_bsim4v4_info,
get_bsim4v5_info, get_bsim4v5_info,
get_bsim4v6_info, get_bsim4v6_info,
get_b3soipd_info, get_b3soipd_info,
@ -284,12 +282,12 @@ SPICEdev ** devices(void)
/*not yet usable*/ /*not yet usable*/
#ifdef ADMS #ifdef ADMS
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v2", "bsim3v1", "bsim4", "bsim4v4", "bsim4v5", "bsim4v6", \
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v2", "bsim3v1", "bsim4", "bsim4v5", "bsim4v6", \
"bsim4soi", "bsim3soipd", "bsim3soifd", "bsim3soidd", "hisim2", "hisimhv1", \ "bsim4soi", "bsim3soipd", "bsim3soifd", "bsim3soidd", "hisim2", "hisimhv1", \
"cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \ "cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \
"mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc", "hicum0", "hicum2", "bjt504t", "ekv", "psp102"} "mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc", "hicum0", "hicum2", "bjt504t", "ekv", "psp102"}
#else #else
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v2", "bsim3v1", "bsim4", "bsim4v4", "bsim4v5", "bsim4v6", \
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v2", "bsim3v1", "bsim4", "bsim4v5", "bsim4v6", \
"bsim4soi", "bsim3soipd", "bsim3soifd", "bsim3soidd", "hisim2", "hisimhv1", \ "bsim4soi", "bsim3soipd", "bsim3soifd", "bsim3soidd", "hisim2", "hisimhv1", \
"cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \ "cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \
"mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc"} "mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc"}

1
src/spicelib/parser/inp2m.c
View File

@ -223,7 +223,6 @@ INP2M (CKTcircuit *ckt, INPtables * tab, card * current)
&& thismodel->INPmodType != INPtypelook ("B3SOIFD") && thismodel->INPmodType != INPtypelook ("B3SOIFD")
&& thismodel->INPmodType != INPtypelook ("B3SOIDD") && thismodel->INPmodType != INPtypelook ("B3SOIDD")
&& thismodel->INPmodType != INPtypelook ("BSIM4") && thismodel->INPmodType != INPtypelook ("BSIM4")
&& thismodel->INPmodType != INPtypelook ("BSIM4v4")
&& thismodel->INPmodType != INPtypelook ("BSIM4v5") && thismodel->INPmodType != INPtypelook ("BSIM4v5")
&& thismodel->INPmodType != INPtypelook ("BSIM4v6") && thismodel->INPmodType != INPtypelook ("BSIM4v6")
&& thismodel->INPmodType != INPtypelook ("BSIM3v0") && thismodel->INPmodType != INPtypelook ("BSIM3v0")

5
src/spicelib/parser/inpdomod.c
View File

@ -304,10 +304,7 @@ char *INPdomodel(CKTcircuit *ckt, card * image, INPtables * tab)
break; break;
case 14: case 54: case 14: case 54:
err = INPfindVer(line, ver); /* mapping of minor versions >= 4.2.1 are included */ err = INPfindVer(line, ver); /* mapping of minor versions >= 4.2.1 are included */
if ((prefix("4.0", ver)) || (prefix("4.1", ver)) || (prefix("4.2", ver)) || (prefix("4.3", ver)) || (prefix("4.4", ver))) {
type = INPtypelook("BSIM4v4");
}
if (prefix("4.5", ver)) {
if ((prefix("4.0", ver)) || (prefix("4.1", ver)) || (prefix("4.2", ver)) || (prefix("4.3", ver)) || (prefix("4.4", ver)) || (prefix("4.5", ver))) {
type = INPtypelook("BSIM4v5"); type = INPtypelook("BSIM4v5");
} }
if (prefix("4.6", ver)) { if (prefix("4.6", ver)) {

1
src/spicelib/parser/inpgmod.c
View File

@ -218,7 +218,6 @@ INPgetModBin( CKTcircuit* ckt, char* name, INPmodel** model, INPtables* tab, cha
&& modtmp->INPmodType != INPtypelook ("BSIM3v0") && modtmp->INPmodType != INPtypelook ("BSIM3v0")
&& modtmp->INPmodType != INPtypelook ("BSIM3v1") && modtmp->INPmodType != INPtypelook ("BSIM3v1")
&& modtmp->INPmodType != INPtypelook ("BSIM4") && modtmp->INPmodType != INPtypelook ("BSIM4")
&& modtmp->INPmodType != INPtypelook ("BSIM4v4")
&& modtmp->INPmodType != INPtypelook ("BSIM4v5") && modtmp->INPmodType != INPtypelook ("BSIM4v5")
&& modtmp->INPmodType != INPtypelook ("BSIM4v6") && modtmp->INPmodType != INPtypelook ("BSIM4v6")
&& modtmp->INPmodType != INPtypelook ("HiSIM2") && modtmp->INPmodType != INPtypelook ("HiSIM2")

96
visualc-shared/sharedspice.vcproj
View File

@ -564,22 +564,6 @@
RelativePath="..\src\spicelib\devices\bsim4\bsim4itf.h" RelativePath="..\src\spicelib\devices\bsim4\bsim4itf.h"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4def.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4ext.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4init.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4itf.h"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5def.h"
> >
@ -3240,82 +3224,6 @@
RelativePath="..\src\spicelib\devices\bsim4\b4trunc.c" RelativePath="..\src\spicelib\devices\bsim4\b4trunc.c"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4acld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4ask.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4check.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4cvtest.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4del.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4dest.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4geo.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4getic.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4ld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mask.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mdel.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mpar.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4noi.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4par.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4pzld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4set.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4temp.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4trunc.c"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\b4v5.c" RelativePath="..\src\spicelib\devices\bsim4v5\b4v5.c"
> >
@ -3632,10 +3540,6 @@
RelativePath="..\src\spicelib\devices\bsim4\bsim4init.c" RelativePath="..\src\spicelib\devices\bsim4\bsim4init.c"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4init.c"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5init.c"
> >

96
visualc/vngspice.vcproj
View File

@ -1360,22 +1360,6 @@
RelativePath="..\src\spicelib\devices\bsim4\bsim4itf.h" RelativePath="..\src\spicelib\devices\bsim4\bsim4itf.h"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4def.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4ext.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4init.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4itf.h"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5def.h"
> >
@ -4020,82 +4004,6 @@
RelativePath="..\src\spicelib\devices\bsim4\b4trunc.c" RelativePath="..\src\spicelib\devices\bsim4\b4trunc.c"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4acld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4ask.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4check.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4cvtest.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4del.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4dest.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4geo.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4getic.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4ld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mask.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mdel.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mpar.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4noi.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4par.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4pzld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4set.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4temp.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4trunc.c"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\b4v5.c" RelativePath="..\src\spicelib\devices\bsim4v5\b4v5.c"
> >
@ -4412,10 +4320,6 @@
RelativePath="..\src\spicelib\devices\bsim4\bsim4init.c" RelativePath="..\src\spicelib\devices\bsim4\bsim4init.c"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4init.c"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5init.c"
> >

24
visualc/vngspice.vcxproj
View File

@ -884,10 +884,6 @@
<ClInclude Include="..\src\spicelib\devices\bsim4\bsim4ext.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4\bsim4ext.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4\bsim4init.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4\bsim4init.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4\bsim4itf.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4\bsim4itf.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4def.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4ext.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4init.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4itf.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5ext.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5ext.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.h" />
@ -1550,25 +1546,6 @@
<ClCompile Include="..\src\spicelib\devices\bsimsoi\b4soitrunc.c" /> <ClCompile Include="..\src\spicelib\devices\bsimsoi\b4soitrunc.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4\b4temp.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4\b4temp.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4\b4trunc.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4\b4trunc.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4acld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4ask.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4check.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4cvtest.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4del.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4dest.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4geo.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4getic.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4ld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4mask.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4mdel.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4mpar.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4noi.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4par.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4pzld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4set.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4temp.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4trunc.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5acld.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5acld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5ask.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5ask.c" />
@ -1648,7 +1625,6 @@
<ClCompile Include="..\src\spicelib\devices\bsim3v1\bsim3v1init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim3v1\bsim3v1init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim3v32\bsim3v32init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim3v32\bsim3v32init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4\bsim4init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4\bsim4init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\bsim4v4init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v6\bsim4v6init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v6\bsim4v6init.c" />
<ClCompile Include="..\src\spicelib\devices\cap\cap.c" /> <ClCompile Include="..\src\spicelib\devices\cap\cap.c" />

96
visualc/vngspice_fftw.vcproj
View File

@ -1391,22 +1391,6 @@
RelativePath="..\src\spicelib\devices\bsim4\bsim4itf.h" RelativePath="..\src\spicelib\devices\bsim4\bsim4itf.h"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4def.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4ext.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4init.h"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4itf.h"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5def.h"
> >
@ -4051,82 +4035,6 @@
RelativePath="..\src\spicelib\devices\bsim4\b4trunc.c" RelativePath="..\src\spicelib\devices\bsim4\b4trunc.c"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4acld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4ask.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4check.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4cvtest.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4del.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4dest.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4geo.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4getic.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4ld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mask.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mdel.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4mpar.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4noi.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4par.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4pzld.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4set.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4temp.c"
>
</File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\b4v4trunc.c"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\b4v5.c" RelativePath="..\src\spicelib\devices\bsim4v5\b4v5.c"
> >
@ -4443,10 +4351,6 @@
RelativePath="..\src\spicelib\devices\bsim4\bsim4init.c" RelativePath="..\src\spicelib\devices\bsim4\bsim4init.c"
> >
</File> </File>
<File
RelativePath="..\src\spicelib\devices\bsim4v4\bsim4v4init.c"
>
</File>
<File <File
RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" RelativePath="..\src\spicelib\devices\bsim4v5\bsim4v5init.c"
> >

24
visualc/vngspice_fftw_vc10.vcxproj
View File

@ -867,10 +867,6 @@
<ClInclude Include="..\src\spicelib\devices\bsim4\bsim4ext.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4\bsim4ext.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4\bsim4init.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4\bsim4init.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4\bsim4itf.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4\bsim4itf.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4def.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4ext.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4init.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v4\bsim4v4itf.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5def.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5ext.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5ext.h" />
<ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.h" /> <ClInclude Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.h" />
@ -1533,25 +1529,6 @@
<ClCompile Include="..\src\spicelib\devices\bsimsoi\b4soitrunc.c" /> <ClCompile Include="..\src\spicelib\devices\bsimsoi\b4soitrunc.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4\b4temp.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4\b4temp.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4\b4trunc.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4\b4trunc.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4acld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4ask.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4check.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4cvtest.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4del.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4dest.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4geo.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4getic.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4ld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4mask.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4mdel.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4mpar.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4noi.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4par.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4pzld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4set.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4temp.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\b4v4trunc.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5acld.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5acld.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5ask.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\b4v5ask.c" />
@ -1631,7 +1608,6 @@
<ClCompile Include="..\src\spicelib\devices\bsim3v1\bsim3v1init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim3v1\bsim3v1init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim3v32\bsim3v32init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim3v32\bsim3v32init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4\bsim4init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4\bsim4init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v4\bsim4v4init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v5\bsim4v5init.c" />
<ClCompile Include="..\src\spicelib\devices\bsim4v6\bsim4v6init.c" /> <ClCompile Include="..\src\spicelib\devices\bsim4v6\bsim4v6init.c" />
<ClCompile Include="..\src\spicelib\devices\cap\cap.c" /> <ClCompile Include="..\src\spicelib\devices\cap\cap.c" />

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