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bug fix, fix the guard for device generated internal nodes (via CKTmkVolt())

rlar 14 years ago
parent
33764b1f91
commit
f7f454c0a1
23 changed files with 227 additions and 78 deletions
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  1. 45
      ChangeLog
  2. 8
      src/spicelib/devices/bsim1/b1set.c
  3. 8
      src/spicelib/devices/bsim2/b2set.c
  4. 4
      src/spicelib/devices/bsim3/b3set.c
  5. 14
      src/spicelib/devices/bsim3v0/b3v0set.c
  6. 14
      src/spicelib/devices/bsim3v1/b3v1set.c
  7. 4
      src/spicelib/devices/bsim3v32/b3v32set.c
  8. 20
      src/spicelib/devices/bsim4/b4set.c
  9. 20
      src/spicelib/devices/bsim4v4/b4v4set.c
  10. 20
      src/spicelib/devices/bsim4v5/b4v5set.c
  11. 20
      src/spicelib/devices/bsim4v6/b4v6set.c
  12. 20
      src/spicelib/devices/hfet1/hfetsetup.c
  13. 8
      src/spicelib/devices/hfet2/hfet2setup.c
  14. 8
      src/spicelib/devices/jfet/jfetset.c
  15. 8
      src/spicelib/devices/jfet2/jfet2set.c
  16. 8
      src/spicelib/devices/mes/messetup.c
  17. 20
      src/spicelib/devices/mesa/mesasetup.c
  18. 10
      src/spicelib/devices/mos1/mos1set.c
  19. 10
      src/spicelib/devices/mos2/mos2set.c
  20. 10
      src/spicelib/devices/mos3/mos3set.c
  21. 10
      src/spicelib/devices/mos6/mos6set.c
  22. 10
      src/spicelib/devices/mos9/mos9set.c
  23. 6
      src/spicelib/devices/vbic/vbicsetup.c

45
ChangeLog
View File

@ -1,3 +1,48 @@
2012-01-07 Robert Larice
* src/spicelib/devices/bsim1/b1set.c ,
* src/spicelib/devices/bsim2/b2set.c ,
* src/spicelib/devices/bsim3/b3set.c ,
* src/spicelib/devices/bsim3v0/b3v0set.c ,
* src/spicelib/devices/bsim3v1/b3v1set.c ,
* src/spicelib/devices/bsim3v32/b3v32set.c ,
* src/spicelib/devices/bsim4/b4set.c ,
* src/spicelib/devices/bsim4v4/b4v4set.c ,
* src/spicelib/devices/bsim4v5/b4v5set.c ,
* src/spicelib/devices/bsim4v6/b4v6set.c ,
* src/spicelib/devices/hfet1/hfetsetup.c ,
* src/spicelib/devices/hfet2/hfet2setup.c ,
* src/spicelib/devices/jfet/jfetset.c ,
* src/spicelib/devices/jfet2/jfet2set.c ,
* src/spicelib/devices/mes/messetup.c ,
* src/spicelib/devices/mesa/mesasetup.c ,
* src/spicelib/devices/mos1/mos1set.c ,
* src/spicelib/devices/mos2/mos2set.c ,
* src/spicelib/devices/mos3/mos3set.c ,
* src/spicelib/devices/mos6/mos6set.c ,
* src/spicelib/devices/mos9/mos9set.c ,
* src/spicelib/devices/vbic/vbicsetup.c :
bug fix, fix the guard for device generated internal nodes (via CKTmkVolt())
There is a longstanding bug in spice,
responsible for wired behavior when two analyzes are not separated with
a `reset' command
The second invocation of CKTsetup() repeated the construction of
internal device nodes (CKTmkVolt and CKTmkCur)
yielding an incorrect device matrix with growing vector size.
Obviously the support for a second CKTsetup() invocation was
already included in spice, but not implemented correctly.
This patch fixes guards in many device models, which should have
prevented repeated invocation of CKTmkVolt() and CKTmkCur()
This patch fixes many but not all device models,
known exceptions are :
b4soiset b3soiddset soi3set
This fix is kept short, for better readability of the patch diff.
A large whitespace and indentation patch will follow.
2012-01-07 Robert Larice
* src/frontend/inpcom.c :
cleanup, muffle compiler warning

8
src/spicelib/devices/bsim1/b1set.c
View File

@ -328,8 +328,8 @@ B1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
/* process drain series resistance */
if( (model->B1sheetResistance != 0) &&
(here->B1drainSquares != 0.0 ) &&
(here->B1dNodePrime == 0) ) {
(here->B1drainSquares != 0.0 ))
{ if(here->B1dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->B1name,"drain");
if(error) return(error);
here->B1dNodePrime = tmp->number;
@ -341,14 +341,14 @@ B1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
}
}
}
}
} else {
here->B1dNodePrime = here->B1dNode;
}
/* process source series resistance */
if( (model->B1sheetResistance != 0) &&
(here->B1sourceSquares != 0.0 ) &&
(here->B1sNodePrime == 0) ) {
(here->B1sourceSquares != 0.0 )) {
if(here->B1sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->B1name,"source");
if(error) return(error);

8
src/spicelib/devices/bsim2/b2set.c
View File

@ -487,8 +487,8 @@ B2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
/* process drain series resistance */
if( (model->B2sheetResistance != 0) &&
(here->B2drainSquares != 0.0 ) &&
(here->B2dNodePrime == 0) ) {
(here->B2drainSquares != 0.0 ) ) {
if (here->B2dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->B2name,"drain");
if(error) return(error);
here->B2dNodePrime = tmp->number;
@ -503,14 +503,14 @@ B2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->B2dNodePrime = here->B2dNode;
}
/* process source series resistance */
if( (model->B2sheetResistance != 0) &&
(here->B2sourceSquares != 0.0 ) &&
(here->B2sNodePrime == 0) ) {
(here->B2sourceSquares != 0.0 ) ) {
if(here->B2sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->B2name,"source");
if(error)

4
src/spicelib/devices/bsim3/b3set.c
View File

@ -959,11 +959,13 @@ int nthreads;
/* internal charge node */
if ((here->BSIM3nqsMod) && (here->BSIM3qNode == 0))
if (here->BSIM3nqsMod)
{ if (here->BSIM3qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3name,"charge");
if(error) return(error);
here->BSIM3qNode = tmp->number;
}
}
else
{ here->BSIM3qNode = 0;
}

14
src/spicelib/devices/bsim3v0/b3v0set.c
View File

@ -792,8 +792,8 @@ IFuid tmpName;
/* process drain series resistance */
if ((model->BSIM3v0sheetResistance > 0.0) &&
(here->BSIM3v0drainSquares > 0.0 ) &&
(here->BSIM3v0dNodePrime == 0))
(here->BSIM3v0drainSquares > 0.0 ))
{ if(here->BSIM3v0dNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v0name,"drain");
if(error) return(error);
here->BSIM3v0dNodePrime = tmp->number;
@ -807,14 +807,15 @@ IFuid tmpName;
}
}
}
}
else
{ here->BSIM3v0dNodePrime = here->BSIM3v0dNode;
}
/* process source series resistance */
if ((model->BSIM3v0sheetResistance > 0.0) &&
(here->BSIM3v0sourceSquares > 0.0 ) &&
(here->BSIM3v0sNodePrime == 0))
(here->BSIM3v0sourceSquares > 0.0 ))
{ if(here->BSIM3v0sNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v0name,"source");
if(error) return(error);
here->BSIM3v0sNodePrime = tmp->number;
@ -828,6 +829,7 @@ IFuid tmpName;
}
}
}
}
else
{ here->BSIM3v0sNodePrime = here->BSIM3v0sNode;
@ -835,11 +837,13 @@ IFuid tmpName;
/* internal charge node */
if ((here->BSIM3v0nqsMod) && (here->BSIM3v0qNode == 0))
if ((here->BSIM3v0nqsMod))
{ if(here->BSIM3v0qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v0name,"charge");
if(error) return(error);
here->BSIM3v0qNode = tmp->number;
}
}
else
{ here->BSIM3v0qNode = 0;
}

14
src/spicelib/devices/bsim3v1/b3v1set.c
View File

@ -850,8 +850,8 @@ IFuid tmpName;
/* process drain series resistance */
if ((model->BSIM3v1sheetResistance > 0.0) &&
(here->BSIM3v1drainSquares > 0.0 ) &&
(here->BSIM3v1dNodePrime == 0))
(here->BSIM3v1drainSquares > 0.0 ))
{ if(here->BSIM3v1dNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"drain");
if(error) return(error);
here->BSIM3v1dNodePrime = tmp->number;
@ -865,6 +865,7 @@ IFuid tmpName;
}
}
}
}
else
{ here->BSIM3v1dNodePrime = here->BSIM3v1dNode;
@ -872,8 +873,8 @@ IFuid tmpName;
/* process source series resistance */
if ((model->BSIM3v1sheetResistance > 0.0) &&
(here->BSIM3v1sourceSquares > 0.0 ) &&
(here->BSIM3v1sNodePrime == 0))
(here->BSIM3v1sourceSquares > 0.0 ))
{ if(here->BSIM3v1sNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"source");
if(error) return(error);
here->BSIM3v1sNodePrime = tmp->number;
@ -886,6 +887,7 @@ IFuid tmpName;
}
}
}
}
}
else
@ -894,11 +896,13 @@ IFuid tmpName;
/* internal charge node */
if ((here->BSIM3v1nqsMod) && (here->BSIM3v1qNode == 0))
if ((here->BSIM3v1nqsMod))
{ if(here->BSIM3v1qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"charge");
if(error) return(error);
here->BSIM3v1qNode = tmp->number;
}
}
else
{ here->BSIM3v1qNode = 0;
}

4
src/spicelib/devices/bsim3v32/b3v32set.c
View File

@ -1000,11 +1000,13 @@ IFuid tmpName;
/* internal charge node */
if ((here->BSIM3v32nqsMod) && (here->BSIM3v32qNode == 0))
if (here->BSIM3v32nqsMod)
{ if(here->BSIM3v32qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"charge");
if(error) return(error);
here->BSIM3v32qNode = tmp->number;
}
}
else
{ here->BSIM3v32qNode = 0;
}

20
src/spicelib/devices/bsim4/b4set.c
View File

@ -2311,7 +2311,8 @@ int nthreads;
createNode = 1;
}
}
if ( createNode != 0 && (here->BSIM4dNodePrime == 0))
if ( createNode != 0 )
{ if ( here->BSIM4dNodePrime == 0 )
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4name,"drain");
if(error) return(error);
here->BSIM4dNodePrime = tmp->number;
@ -2326,6 +2327,7 @@ int nthreads;
}
}
}
}
else
{ here->BSIM4dNodePrime = here->BSIM4dNode;
}
@ -2353,7 +2355,8 @@ int nthreads;
createNode = 1;
}
}
if ( createNode != 0 && here->BSIM4sNodePrime == 0)
if ( createNode != 0 )
{ if ( here->BSIM4sNodePrime == 0 )
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4name,"source");
if(error) return(error);
here->BSIM4sNodePrime = tmp->number;
@ -2368,10 +2371,12 @@ int nthreads;
}
}
}
}
else
here->BSIM4sNodePrime = here->BSIM4sNode;
if ((here->BSIM4rgateMod > 0) && (here->BSIM4gNodePrime == 0))
if ( here->BSIM4rgateMod > 0 )
{ if ( here->BSIM4gNodePrime == 0 )
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4name,"gate");
if(error) return(error);
here->BSIM4gNodePrime = tmp->number;
@ -2386,14 +2391,17 @@ int nthreads;
}
}
}
}
else
here->BSIM4gNodePrime = here->BSIM4gNodeExt;
if ((here->BSIM4rgateMod == 3) && (here->BSIM4gNodeMid == 0))
if ( here->BSIM4rgateMod == 3 )
{ if ( here->BSIM4gNodeMid == 0 )
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4name,"midgate");
if(error) return(error);
here->BSIM4gNodeMid = tmp->number;
}
}
else
here->BSIM4gNodeMid = here->BSIM4gNodeExt;
@ -2431,11 +2439,13 @@ int nthreads;
= here->BSIM4bNode;
/* NQS node */
if ((here->BSIM4trnqsMod) && (here->BSIM4qNode == 0))
if ( here->BSIM4trnqsMod )
{ if ( here->BSIM4qNode == 0 )
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4name,"charge");
if(error) return(error);
here->BSIM4qNode = tmp->number;
}
}
else
here->BSIM4qNode = 0;

20
src/spicelib/devices/bsim4v4/b4v4set.c
View File

@ -1748,11 +1748,13 @@ JOB *job;
createNode = 1;
}
}
if ( createNode != 0 && (here->BSIM4v4dNodePrime == 0))
if ( createNode != 0 )
{ if (here->BSIM4v4dNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v4name,"drain");
if(error) return(error);
here->BSIM4v4dNodePrime = tmp->number;
}
}
else
{ here->BSIM4v4dNodePrime = here->BSIM4v4dNode;
}
@ -1780,27 +1782,33 @@ JOB *job;
createNode = 1;
}
}
if ( createNode != 0 && here->BSIM4v4sNodePrime == 0)
if ( createNode != 0 )
{ if (here->BSIM4v4sNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v4name,"source");
if(error) return(error);
here->BSIM4v4sNodePrime = tmp->number;
}
}
else
here->BSIM4v4sNodePrime = here->BSIM4v4sNode;
if ((here->BSIM4v4rgateMod > 0) && (here->BSIM4v4gNodePrime == 0))
if (here->BSIM4v4rgateMod > 0)
{ if (here->BSIM4v4gNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v4name,"gate");
if(error) return(error);
here->BSIM4v4gNodePrime = tmp->number;
}
}
else
here->BSIM4v4gNodePrime = here->BSIM4v4gNodeExt;
if ((here->BSIM4v4rgateMod == 3) && (here->BSIM4v4gNodeMid == 0))
if (here->BSIM4v4rgateMod == 3)
{ if (here->BSIM4v4gNodeMid == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v4name,"midgate");
if(error) return(error);
here->BSIM4v4gNodeMid = tmp->number;
}
}
else
here->BSIM4v4gNodeMid = here->BSIM4v4gNodeExt;
@ -1828,11 +1836,13 @@ JOB *job;
= here->BSIM4v4bNode;
/* NQS node */
if ((here->BSIM4v4trnqsMod) && (here->BSIM4v4qNode == 0))
if (here->BSIM4v4trnqsMod)
{ if (here->BSIM4v4qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v4name,"charge");
if(error) return(error);
here->BSIM4v4qNode = tmp->number;
}
}
else
here->BSIM4v4qNode = 0;

20
src/spicelib/devices/bsim4v5/b4v5set.c
View File

@ -1794,7 +1794,8 @@ JOB *job;
createNode = 1;
}
}
if ( createNode != 0 && (here->BSIM4v5dNodePrime == 0))
if ( createNode != 0 )
{ if (here->BSIM4v5dNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"drain");
if(error) return(error);
here->BSIM4v5dNodePrime = tmp->number;
@ -1811,6 +1812,7 @@ JOB *job;
}
}
}
else
{ here->BSIM4v5dNodePrime = here->BSIM4v5dNode;
@ -1839,7 +1841,8 @@ JOB *job;
createNode = 1;
}
}
if ( createNode != 0 && here->BSIM4v5sNodePrime == 0)
if ( createNode != 0 )
{ if (here->BSIM4v5sNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"source");
if(error) return(error);
here->BSIM4v5sNodePrime = tmp->number;
@ -1855,11 +1858,13 @@ JOB *job;
}
}
}
}
else
here->BSIM4v5sNodePrime = here->BSIM4v5sNode;
if ((here->BSIM4v5rgateMod > 0) && (here->BSIM4v5gNodePrime == 0))
if (here->BSIM4v5rgateMod > 0)
{ if (here->BSIM4v5gNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"gate");
if(error) return(error);
here->BSIM4v5gNodePrime = tmp->number;
@ -1875,15 +1880,18 @@ JOB *job;
}
}
}
}
else
here->BSIM4v5gNodePrime = here->BSIM4v5gNodeExt;
if ((here->BSIM4v5rgateMod == 3) && (here->BSIM4v5gNodeMid == 0))
if (here->BSIM4v5rgateMod == 3)
{ if (here->BSIM4v5gNodeMid == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"midgate");
if(error) return(error);
here->BSIM4v5gNodeMid = tmp->number;
}
}
else
here->BSIM4v5gNodeMid = here->BSIM4v5gNodeExt;
@ -1922,7 +1930,8 @@ JOB *job;
= here->BSIM4v5bNode;
/* NQS node */
if ((here->BSIM4v5trnqsMod) && (here->BSIM4v5qNode == 0))
if (here->BSIM4v5trnqsMod)
{ if (here->BSIM4v5qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v5name,"charge");
if(error) return(error);
here->BSIM4v5qNode = tmp->number;
@ -1938,6 +1947,7 @@ JOB *job;
}
}
}
}
else
here->BSIM4v5qNode = 0;

20
src/spicelib/devices/bsim4v6/b4v6set.c
View File

@ -2160,7 +2160,8 @@ int nthreads;
createNode = 1;
}
}
if ( createNode != 0 && (here->BSIM4v6dNodePrime == 0))
if ( createNode != 0 )
{ if (here->BSIM4v6dNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v6name,"drain");
if(error) return(error);
here->BSIM4v6dNodePrime = tmp->number;
@ -2175,6 +2176,7 @@ int nthreads;
}
}
}
}
else
{ here->BSIM4v6dNodePrime = here->BSIM4v6dNode;
}
@ -2202,7 +2204,8 @@ int nthreads;
createNode = 1;
}
}
if ( createNode != 0 && here->BSIM4v6sNodePrime == 0)
if ( createNode != 0 )
{ if (here->BSIM4v6sNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v6name,"source");
if(error) return(error);
here->BSIM4v6sNodePrime = tmp->number;
@ -2217,10 +2220,12 @@ int nthreads;
}
}
}
}
else
here->BSIM4v6sNodePrime = here->BSIM4v6sNode;
if ((here->BSIM4v6rgateMod > 0) && (here->BSIM4v6gNodePrime == 0))
if (here->BSIM4v6rgateMod > 0)
{ if (here->BSIM4v6gNodePrime == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v6name,"gate");
if(error) return(error);
here->BSIM4v6gNodePrime = tmp->number;
@ -2235,14 +2240,17 @@ int nthreads;
}
}
}
}
else
here->BSIM4v6gNodePrime = here->BSIM4v6gNodeExt;
if ((here->BSIM4v6rgateMod == 3) && (here->BSIM4v6gNodeMid == 0))
if (here->BSIM4v6rgateMod == 3)
{ if (here->BSIM4v6gNodeMid == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v6name,"midgate");
if(error) return(error);
here->BSIM4v6gNodeMid = tmp->number;
}
}
else
here->BSIM4v6gNodeMid = here->BSIM4v6gNodeExt;
@ -2280,11 +2288,13 @@ int nthreads;
= here->BSIM4v6bNode;
/* NQS node */
if ((here->BSIM4v6trnqsMod) && (here->BSIM4v6qNode == 0))
if (here->BSIM4v6trnqsMod)
{ if (here->BSIM4v6qNode == 0)
{ error = CKTmkVolt(ckt,&tmp,here->BSIM4v6name,"charge");
if(error) return(error);
here->BSIM4v6qNode = tmp->number;
}
}
else
here->BSIM4v6qNode = 0;

20
src/spicelib/devices/hfet1/hfetsetup.c
View File

@ -249,7 +249,8 @@ HFETAsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
*states += HFETAnumStates;
matrixpointers:
if(model->HFETArs != 0 && here->HFETAsourcePrimeNode==0) {
if(model->HFETArs != 0) {
if(here->HFETAsourcePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFETAname,"source");
if(error) return(error);
here->HFETAsourcePrimeNode = tmp->number;
@ -266,12 +267,14 @@ matrixpointers:
}
}
}
}
} else {
here->HFETAsourcePrimeNode = here->HFETAsourceNode;
}
if(model->HFETArd != 0 && here->HFETAdrainPrimeNode==0) {
if(model->HFETArd != 0) {
if(here->HFETAdrainPrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFETAname,"drain");
if(error) return(error);
here->HFETAdrainPrimeNode = tmp->number;
@ -287,12 +290,14 @@ matrixpointers:
}
}
}
}
} else {
here->HFETAdrainPrimeNode = here->HFETAdrainNode;
}
if(model->HFETArg != 0 && here->HFETAgatePrimeNode==0) {
if(model->HFETArg != 0) {
if(here->HFETAgatePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFETAname,"gate");
if(error) return(error);
here->HFETAgatePrimeNode = tmp->number;
@ -308,11 +313,13 @@ matrixpointers:
}
}
}
}
} else {
here->HFETAgatePrimeNode = here->HFETAgateNode;
}
if(model->HFETArf != 0 && here->HFETAdrainPrmPrmNode==0) {
if(model->HFETArf != 0) {
if(here->HFETAdrainPrmPrmNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFETAname,"gd");
if(error) return(error);
here->HFETAdrainPrmPrmNode = tmp->number;
@ -328,12 +335,14 @@ matrixpointers:
}
}
}
}
} else {
here->HFETAdrainPrmPrmNode = here->HFETAdrainPrimeNode;
}
if(model->HFETAri != 0 && here->HFETAsourcePrmPrmNode==0) {
if(model->HFETAri != 0) {
if(here->HFETAsourcePrmPrmNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFETAname,"gs");
if(error) return(error);
here->HFETAsourcePrmPrmNode = tmp->number;
@ -349,6 +358,7 @@ matrixpointers:
}
}
}
}
} else {
here->HFETAsourcePrmPrmNode = here->HFETAsourcePrimeNode;

8
src/spicelib/devices/hfet2/hfet2setup.c
View File

@ -139,7 +139,8 @@ int HFET2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *state
here->HFET2m = 1.0;
matrixpointers:
if(model->HFET2rs != 0 && here->HFET2sourcePrimeNode==0) {
if(model->HFET2rs != 0) {
if(here->HFET2sourcePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFET2name,"source");
if(error) return(error);
here->HFET2sourcePrimeNode = tmp->number;
@ -152,11 +153,13 @@ matrixpointers:
}
}
}
}
} else {
here->HFET2sourcePrimeNode = here->HFET2sourceNode;
}
if(model->HFET2rd != 0 && here->HFET2drainPrimeNode==0) {
if(model->HFET2rd != 0) {
if(here->HFET2drainPrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->HFET2name,"drain");
if(error) return(error);
here->HFET2drainPrimeNode = tmp->number;
@ -169,6 +172,7 @@ matrixpointers:
}
}
}
}
} else {
here->HFET2drainPrimeNode = here->HFET2drainNode;

8
src/spicelib/devices/jfet/jfetset.c
View File

@ -101,7 +101,8 @@ JFETsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
*states += 13;
matrixpointers:
if(model->JFETsourceResist != 0 && here->JFETsourcePrimeNode==0) {
if(model->JFETsourceResist != 0) {
if(here->JFETsourcePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->JFETname,"source");
if(error) return(error);
here->JFETsourcePrimeNode = tmp->number;
@ -117,11 +118,13 @@ matrixpointers:
}
}
}
}
} else {
here->JFETsourcePrimeNode = here->JFETsourceNode;
}
if(model->JFETdrainResist != 0 && here->JFETdrainPrimeNode==0) {
if(model->JFETdrainResist != 0) {
if(here->JFETdrainPrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->JFETname,"drain");
if(error) return(error);
here->JFETdrainPrimeNode = tmp->number;
@ -137,6 +140,7 @@ matrixpointers:
}
}
}
}
} else {
here->JFETdrainPrimeNode = here->JFETdrainNode;

8
src/spicelib/devices/jfet2/jfet2set.c
View File

@ -54,7 +54,8 @@ JFET2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
*states += JFET2_STATE_COUNT + 1;
matrixpointers2:
if(model->JFET2rs != 0 && here->JFET2sourcePrimeNode==0) {
if(model->JFET2rs != 0) {
if(here->JFET2sourcePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->JFET2name,"source");
if(error) return(error);
here->JFET2sourcePrimeNode = tmp->number;
@ -70,11 +71,13 @@ matrixpointers2:
}
}
}
}
} else {
here->JFET2sourcePrimeNode = here->JFET2sourceNode;
}
if(model->JFET2rd != 0 && here->JFET2drainPrimeNode==0) {
if(model->JFET2rd != 0) {
if(here->JFET2drainPrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->JFET2name,"drain");
if(error) return(error);
here->JFET2drainPrimeNode = tmp->number;
@ -90,6 +93,7 @@ matrixpointers2:
}
}
}
}
} else {
here->JFET2drainPrimeNode = here->JFET2drainNode;

8
src/spicelib/devices/mes/messetup.c
View File

@ -87,7 +87,8 @@ MESsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
*states += MESnumStates;
matrixpointers:
if(model->MESsourceResist != 0 && here->MESsourcePrimeNode==0) {
if(model->MESsourceResist != 0) {
if(here->MESsourcePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESname,"source");
if(error) return(error);
here->MESsourcePrimeNode = tmp->number;
@ -103,11 +104,13 @@ matrixpointers:
}
}
}
}
} else {
here->MESsourcePrimeNode = here->MESsourceNode;
}
if(model->MESdrainResist != 0 && here->MESdrainPrimeNode==0) {
if(model->MESdrainResist != 0) {
if(here->MESdrainPrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESname,"drain");
if(error) return(error);
here->MESdrainPrimeNode = tmp->number;
@ -123,6 +126,7 @@ matrixpointers:
}
}
}
}
} else {
here->MESdrainPrimeNode = here->MESdrainNode;

20
src/spicelib/devices/mesa/mesasetup.c
View File

@ -255,7 +255,8 @@ MESAsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
*states += 20;
matrixpointers:
if(model->MESAsourceResist != 0 && here->MESAsourcePrimeNode==0) {
if(model->MESAsourceResist != 0) {
if(here->MESAsourcePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESAname,"source");
if(error) return(error);
here->MESAsourcePrimeNode = tmp->number;
@ -271,12 +272,14 @@ matrixpointers:
}
}
}
}
} else {
here->MESAsourcePrimeNode = here->MESAsourceNode;
}
if(model->MESAdrainResist != 0 && here->MESAdrainPrimeNode==0) {
if(model->MESAdrainResist != 0) {
if(here->MESAdrainPrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESAname,"drain");
if(error) return(error);
here->MESAdrainPrimeNode = tmp->number;
@ -292,11 +295,13 @@ matrixpointers:
}
}
}
}
} else {
here->MESAdrainPrimeNode = here->MESAdrainNode;
}
if(model->MESAgateResist != 0 && here->MESAgatePrimeNode==0) {
if(model->MESAgateResist != 0) {
if(here->MESAgatePrimeNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESAname,"gate");
if(error) return(error);
here->MESAgatePrimeNode = tmp->number;
@ -312,6 +317,7 @@ matrixpointers:
}
}
}
}
} else {
@ -319,7 +325,8 @@ matrixpointers:
}
if(model->MESAri != 0 && here->MESAsourcePrmPrmNode==0) {
if(model->MESAri != 0) {
if(here->MESAsourcePrmPrmNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESAname,"gs");
if(error) return(error);
here->MESAsourcePrmPrmNode = tmp->number;
@ -335,11 +342,13 @@ matrixpointers:
}
}
}
}
} else {
here->MESAsourcePrmPrmNode = here->MESAsourcePrimeNode;
}
if(model->MESArf != 0 && here->MESAdrainPrmPrmNode==0) {
if(model->MESArf != 0) {
if(here->MESAdrainPrmPrmNode == 0) {
error = CKTmkVolt(ckt,&tmp,here->MESAname,"gd");
if(error) return(error);
here->MESAdrainPrmPrmNode = tmp->number;
@ -355,6 +364,7 @@ matrixpointers:
}
}
}
}
} else {
here->MESAdrainPrmPrmNode = here->MESAdrainPrimeNode;

10
src/spicelib/devices/mos1/mos1set.c
View File

@ -131,8 +131,8 @@ MOS1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
if ((model->MOS1drainResistance != 0
|| (model->MOS1sheetResistance != 0
&& here->MOS1drainSquares != 0) )
&& here->MOS1dNodePrime == 0) {
&& here->MOS1drainSquares != 0) )) {
if (here->MOS1dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS1name,"drain");
if(error) return(error);
here->MOS1dNodePrime = tmp->number;
@ -148,6 +148,7 @@ MOS1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
}
}
}
}
} else {
here->MOS1dNodePrime = here->MOS1dNode;
@ -155,8 +156,8 @@ MOS1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
if((model->MOS1sourceResistance != 0 ||
(model->MOS1sheetResistance != 0 &&
here->MOS1sourceSquares != 0) ) &&
here->MOS1sNodePrime==0) {
here->MOS1sourceSquares != 0) )) {
if (here->MOS1sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS1name,"source");
if(error) return(error);
here->MOS1sNodePrime = tmp->number;
@ -173,6 +174,7 @@ MOS1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
}
}
}
} else {
here->MOS1sNodePrime = here->MOS1sNode;
}

10
src/spicelib/devices/mos2/mos2set.c
View File

@ -159,8 +159,8 @@ MOS2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
if ((model->MOS2drainResistance != 0
|| (here->MOS2drainSquares != 0
&& model->MOS2sheetResistance != 0))
&& here->MOS2dNodePrime==0) {
&& model->MOS2sheetResistance != 0))) {
if (here->MOS2dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS2name,"internal#drain");
if(error) return(error);
here->MOS2dNodePrime = tmp->number;
@ -173,6 +173,7 @@ MOS2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->MOS2dNodePrime = here->MOS2dNode;
@ -180,8 +181,8 @@ MOS2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
if( ( (model->MOS2sourceResistance != 0) ||
((here->MOS2sourceSquares != 0) &&
(model->MOS2sheetResistance != 0)) ) &&
(here->MOS2sNodePrime==0) ) {
(model->MOS2sheetResistance != 0)) )) {
if (here->MOS2sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS2name,"internal#source");
if(error) return(error);
here->MOS2sNodePrime = tmp->number;
@ -194,6 +195,7 @@ MOS2setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->MOS2sNodePrime = here->MOS2sNode;

10
src/spicelib/devices/mos3/mos3set.c
View File

@ -189,8 +189,8 @@ MOS3setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
if((model->MOS3drainResistance != 0 ||
(model->MOS3sheetResistance != 0 &&
here->MOS3drainSquares != 0 ) ) &&
here->MOS3dNodePrime==0) {
here->MOS3drainSquares != 0 ) )) {
if (here->MOS3dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS3name,"internal#drain");
if(error) return(error);
here->MOS3dNodePrime = tmp->number;
@ -202,14 +202,15 @@ MOS3setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->MOS3dNodePrime = here->MOS3dNode;
}
if((model->MOS3sourceResistance != 0 ||
(model->MOS3sheetResistance != 0 &&
here->MOS3sourceSquares != 0 ) ) &&
here->MOS3sNodePrime==0) {
here->MOS3sourceSquares != 0 ) )) {
if (here->MOS3sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS3name,"internal#source");
if(error) return(error);
here->MOS3sNodePrime = tmp->number;
@ -221,6 +222,7 @@ MOS3setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->MOS3sNodePrime = here->MOS3sNode;
}

10
src/spicelib/devices/mos6/mos6set.c
View File

@ -153,8 +153,8 @@ MOS6setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
matrixpointers:
if((model->MOS6drainResistance != 0 ||
(model->MOS6sheetResistance != 0 &&
here->MOS6drainSquares != 0) ) &&
here->MOS6dNodePrime==0) {
here->MOS6drainSquares != 0) )) {
if (here->MOS6dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS6name,"drain");
if(error) return(error);
here->MOS6dNodePrime = tmp->number;
@ -166,14 +166,15 @@ matrixpointers:
}
}
}
}
} else {
here->MOS6dNodePrime = here->MOS6dNode;
}
if((model->MOS6sourceResistance != 0 ||
(model->MOS6sheetResistance != 0 &&
here->MOS6sourceSquares != 0) ) &&
here->MOS6sNodePrime==0) {
here->MOS6sourceSquares != 0) )) {
if (here->MOS6sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS6name,"source");
if(error) return(error);
here->MOS6sNodePrime = tmp->number;
@ -185,6 +186,7 @@ matrixpointers:
}
}
}
}
} else {
here->MOS6sNodePrime = here->MOS6sNode;
}

10
src/spicelib/devices/mos9/mos9set.c
View File

@ -188,8 +188,8 @@ MOS9setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
if((model->MOS9drainResistance != 0 ||
(model->MOS9sheetResistance != 0 &&
here->MOS9drainSquares != 0 ) ) &&
here->MOS9dNodePrime==0) {
here->MOS9drainSquares != 0 ) )) {
if (here->MOS9dNodePrime==0) {
error = CKTmkVolt(ckt,&tmp,here->MOS9name,"internal#drain");
if(error) return(error);
here->MOS9dNodePrime = tmp->number;
@ -201,14 +201,15 @@ MOS9setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->MOS9dNodePrime = here->MOS9dNode;
}
if((model->MOS9sourceResistance != 0 ||
(model->MOS9sheetResistance != 0 &&
here->MOS9sourceSquares != 0 ) ) &&
here->MOS9sNodePrime==0) {
here->MOS9sourceSquares != 0 ) )) {
if (here->MOS9sNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->MOS9name,"internal#source");
if(error) return(error);
here->MOS9sNodePrime = tmp->number;
@ -220,6 +221,7 @@ MOS9setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
}
}
}
} else {
here->MOS9sNodePrime = here->MOS9sNode;
}

6
src/spicelib/devices/vbic/vbicsetup.c
View File

@ -456,17 +456,23 @@ matrixpointers:
}
}
if(here->VBICcollCINode == 0) {
error = CKTmkVolt(ckt, &tmp, here->VBICname, "collCI");
if(error) return(error);
here->VBICcollCINode = tmp->number;
}
if(here->VBICbaseBPNode == 0) {
error = CKTmkVolt(ckt, &tmp, here->VBICname, "baseBP");
if(error) return(error);
here->VBICbaseBPNode = tmp->number;
}
if(here->VBICbaseBINode == 0) {
error = CKTmkVolt(ckt, &tmp, here->VBICname, "baseBI");
if(error) return(error);
here->VBICbaseBINode = tmp->number;
}
/* macro to make elements with built in test for out of memory */
#define TSTALLOC(ptr,first,second) \

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