7378 Commits (1087c6a0c2da01f5700bd3da6f863ca29c03c2bc)

Author SHA1 Message Date
Holger Vogt 1087c6a0c2 Add simulator version info to raw file in batch mode, 2 years ago
Giles Atkinson 14844af175 Fix #686: "XSpice Verilog Vector Input Bug". 2 years ago
Holger Vogt 5f059abdca Improve debugging using shared ngspice: 2 years ago
Holger Vogt f495431509 Add a comment 2 years ago
dwarning 4cffcd96ce add missing klu bindings 2 years ago
Vogt 606c6d0df7 Notes go to stdout. 2 years ago
Vogt 232101af10 Don't dereference a NULL pointer. 2 years ago
Vogt 501a64470f Error and warning messages to stderr 2 years ago
Vogt 34549c4524 Note directed to stdout 2 years ago
Holger Vogt 4a1698c22d enable compiling with CYGWIN 2 years ago
Giles Atkinson f4c7202130 Fix gcc warnings. 2 years ago
Giles Atkinson 64a9a0bfbc Add a utility function to the d_cosim code model to open dynamic 2 years ago
Giles Atkinson ce1ecca15e Add support for including Verilog simulation within an instance 2 years ago
Giles Atkinson 693a9df09f Add support for Verilator's --timing option, allowing use of delays 2 years ago
Giles Atkinson 4173d0e220 Allow trailing null connections to be omitted from XSPICE device 2 years ago
Giles Atkinson 98076281c6 Changes to d_cosim to work with initial support for Icarus Verilog. 2 years ago
dwarning 9c5507d1c8 vbic: have to load Vrxf/Itxf with value 2 years ago
dwarning 14402ea911 vbic: correct op reporting for excess phase model 2 years ago
dwarning 8c6fb7c5e0 format: rm misleading indentation 2 years ago
Holger Vogt 295be20859 Remove sourceinfo upon shared ngspice reset. 2 years ago
Holger Vogt a2ca4616b9 Memcpy only when p_word is not NULL 2 years ago
Holger Vogt 28c501bfef Add #define RESMIN 1e-6 as a minimum resistor value 2 years ago
Holger Vogt a6240eed87 Stop the worker thread when running 2 years ago
Holger Vogt 250e9afd92 Set pl_lookup_table to NULL after freeing: allow another initialization 2 years ago
Holger Vogt fd72c3ce3e Bail out when state file is not found. 2 years ago
Holger Vogt d0ae65accf Add function ngSpice_Reset(void) to completely reset shared ngspice, 2 years ago
Holger Vogt 4f8cfbf9f9 Update copyright 2 years ago
Mamoru TASAKA 099c0e65c2 misc/string.c: fix one byte ahead access in dup_string 2 years ago
Holger Vogt a8c1104cfb 43+ developing towards ngspice-44 2 years ago
Holger Vogt 2af390f0b1 Update copyright info 2 years ago
dwarning 08d834841f diode: init of potential uninitialized variable 2 years ago
dwarning 4ad7d10aef init of potential uninitialized variables 2 years ago
dwarning bbfb3953ed repair missing parenthesis 2 years ago
dwarning aae53f3641 complete vbic nqs effect implementation 2 years ago
dwarning 065b1c817c more complete vbic dc/tran nqs effect 2 years ago
dwarning 6e6e2fb203 first attempt to include NQS effect 2 years ago
Holger Vogt 1fef3835c9 Fix common typo: unkown -> unknown 2 years ago
Holger Vogt 3c7012a826 Repair the link to the xhtml manual 2 years ago
Holger Vogt 83e8cb3715 Remove VS compiler warning 2 years ago
dwarning 62677575fa vbic: init of thermal capacitances 2 years ago
dwarning 113275d3be vbic: save Vrth into state vector 2 years ago
dwarning 1b56bbe297 vbic: complete reactive part into acload 2 years ago
dwarning 8a88442004 vbic: more adding reactive part into acload 2 years ago
dwarning 32c4f24bfe vbic: first add reactive part into acload 2 years ago
dwarning c90da3ee38 vbic: add resistive part into acload 2 years ago
Holger Vogt acdd93f157 If compiling shared ngspice, don't set up a terminal. 2 years ago
Holger Vogt 28d8301b5f Prevent crash upon buggy user input 2 years ago
Holger Vogt 442d8554f0 Enable single terminal n devices (Verilog-A modules) 2 years ago
Holger Vogt 727a920032 Authorship for HICUM 2 years ago
Holger Vogt 33939d3f50 Prepare ngspice-43 2 years ago