Netlist is flat at this stage, all numbers expanded,
but not yet parsed into the circuit structure.
So again try to remove unused MOS models.
All binning models are still here when w or l have been
determined by an expression from within the PDK.
a lot of binning models.
This is a hack and needs testing!
inpcom.c: If an x line, add w and l to the netlist card,
if available.
subckt.c: select a suitable model bin, discard the rest
for each subcircuit, depending on w and l from above.
inpgmod.c: less restrictive equal for real numbers,
allow both min and max boundaries (problem of equating
real numbers), when the selected device has w or l on
the boundary between two model bins.
Allow such strange construct, where a single pair x,y will
simplay return a constant y (120 in the above example).
This is used in external devices models and aknowledged
by other simulators.
Error message when .end card is missing
Reset if .end card is missing, to allow loading
a netlist again.
NULL as last element is no longer required, but .end card
(this has been implicitedly assumed).
Remove a bug that skippoed the last line (the .end card).
R, L, C lines invoking the B source.
Enable parameterization of the TCs.
Create a tc string in an extra function, add this string
to the new R, L, C line.
The output will stay between the two limits given.
Tere is no prescription which of the two is upper
or lower.
This function will not solve all PS-Spice
compatible model convergence issues. We better look
for a built-in function with smooth, steadily
differentiable corners.
of vectors, even if the right hand side vector name
contain forbidden characters (like math characters).
set plainlet
let newvec = v(/out)
unset plainlet
containing characters like + - /. Function are the disabled.
This replaces the automatic selection of this mode by compat flags,
which is not transparent enough to the user.
function support, but with node names incl chatacters like + - /.
Flag to command 'plot' is renamed to plainplot.
Error message added if vector not found.
Example file added.
all expression handling is skipped, vectors are plotting as is.
This allows nodes names with vectors like v(+vs) or /out
to be plotted without need resorting to double quotes.
will not use function parsing and evaluation, but simply plot
the listed vectors. vec1 vs vec2 is also not supported.
This option is useful if node names vs+ or /mynode are used and
have to be written into a raw file, as may be used by KiCad or EAGLE.