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2 Commits (51d0e3d910d41ae4f75a7ca7700eee1c19ae1ac4)

Author	SHA1	Message	Date
Giles Atkinson	fd3827af40	Fix ordering of parameter definition and use. Icarus Verilog no longer accepts use-before-definition. Also slightly expand the README for Icarus Verilog examples.	1 year ago
Giles Atkinson	35968d1da6	Add additional examples of Verilog co-simulation and share the Verilog source and large parts of the example circuits between Verilator and Icarus Verilog. Verilog source file adc.v has improved style: all assignments in the always block are now non-blocking.	2 years ago