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7 Commits (74a2844c3fa7d0e886c1c6d3a3c0e3e41f7a2c02)

Author	SHA1	Message	Date
Holger Vogt	b639ebae44	Rename examples for ECL OR gate Simulate OR gate faster TSTEP 0.1n -> 0.3n	3 years ago
Holger Vogt	3e27e640b5	Missing renaming: osdi_win --> osdi_libs	3 years ago
Holger Vogt	bb9469a03a	Rename test_osdi_libs to osdi_libs	3 years ago
Holger Vogt	96608abbe2	Update with Semimod download page	3 years ago
Holger Vogt	157200aa86	Rename test_osdi_win to test_osdi_libs	3 years ago
Holger Vogt	a211a90e5a	Mextram models: plotting with thicker lines	3 years ago
Holger Vogt	ac73e6f7b7	Update to the examples for osdi	3 years ago