Home Explore Help
Register Sign In
epilectrik
/
pyNgSpice
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
7914 Commits
1 Branch
0 Tags
36 MiB
C 90.4%
C++ 3.2%
AMPL 2.4%
M4 1.4%
Perl 0.4%
Other 1.8%
 
 
 
 
 
 
Tree: 04445e42ea
pre-master-46
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from '04445e42ea'
${ noResults }
pyNgSpice/examples/probe
History
Holger Vogt 5b0b328186
If a node name to be plotted ends by ':power', its type is set to POWER.
Thus 'settype power nodename(s)' in the examples is no longer necessary.
4 years ago
..
555-timer-2.cir Update, link on device models (public domain or TI) 4 years ago
Dual-NMOS-amp.cir If a node name to be plotted ends by ':power', its type is set to POWER. 4 years ago
F5TurboV2-Probe.cir If a node name to be plotted ends by ':power', its type is set to POWER. 4 years ago
F5models.lib Update, link on device models (public domain or TI) 4 years ago
TL072-dual.lib .probe: various example netlists 4 years ago
TL072.301 .probe: various example netlists 4 years ago
TLC555.LIB .probe: various example netlists 4 years ago
VDMOS_models.lib .probe: various example netlists 4 years ago
ac-test.cir .probe: various example netlists 4 years ago
mos-test.cir If a node name to be plotted ends by ':power', its type is set to POWER. 4 years ago
probe-i-dev.cir If a node name to be plotted ends by ':power', its type is set to POWER. 4 years ago
Powered by Gitea Version: 1.14.2 Page: 5356ms Template: 5ms
English
English 简体中文 繁體中文(香港) 繁體中文(台灣) Deutsch français Nederlands latviešu русский Українська 日本語 español português do Brasil Português de Portugal polski български italiano suomi Türkçe čeština српски svenska 한국어
Licenses API Website Go1.16.4