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25 lines
423 B
25 lines
423 B
Mx Drain Gate Source Back-gate(substrate) Body Tx W L (body ommitted for FB)
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.include ./bsim4soi/nmos4p0.mod
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.include ./bsim4soi/pmos4p0.mod
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.option TEMP=27C
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Vpower VD 0 1.5
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Vgnd VS 0 0
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Vgate Gate 0 0.0
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MN0 Out Gate VS VS VS N1 W=10u L=0.18u
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MP0 Out Gate VD VS VD P1 W=20u L=0.18u
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.dc Vgate 0 1.5 0.05
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.print dc v(out)
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.control
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if $?batchmode
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* do nothing
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else
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run
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plot out
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plot Vgnd#branch
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endif
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.endc
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.END
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