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pyNgSpice/tests/transient

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dwarning 2afbcfd070 The HICUM Level0 Bipolar Model in Verilog-A (Original Version 1.1 - only VT0 changed to Vt0)		20 years ago
..
Makefile.am	Tests for transient (time marching) analysis.	22 years ago
fourbitadder.cir	Tests for transient (time marching) analysis.	22 years ago
fourbitadder.out	Tests for transient (time marching) analysis.	22 years ago