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Holger Vogt 6c3b14e396 make simulation faster, allow batch mode 6 years ago
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d_lut correct indentation 5 years ago
d_source correct indentation 5 years ago
delta-sigma correct indentation 5 years ago
filesource correct indentation 5 years ago
original-examples correct indentation 5 years ago
pll correct indentation 5 years ago
state correct indentation 5 years ago
table correct indentation 5 years ago
analog_models1_transient.sp xspice examples 16 years ago
fstest.sp 'filesource' test 15 years ago
sine.m 'filesource' test 15 years ago
xspice_c1.cir example input file as cited in manual 14 years ago
xspice_c2.cir whitespace cleanup, add missing trailing newlines 16 years ago
xspice_c3.cir whitespace cleanup, add missing trailing newlines 16 years ago