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10 lines
247 B
10 lines
247 B
Simulation of a switched-capacitor SAR ADC with Verilator and d_cosim
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* Model line for the digital control implemented by Verilator.
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.model dut d_cosim simulation="./adc"
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* The bulk of the circuit is in a shared file.
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.include adc.shared
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.end
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