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pyNgSpice/examples/cider

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Brian Taylor 57dd3342ef Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU.		7 months ago
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bicmos	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
bjt	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
cider-gnuplot	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
diode	When Cider models are present, a normal batch mode sp_shutdown (for example, ngspice -b cmosinv.cir) will call com_quit(NULL). This cleans up so that valgrind will find no leaks in Cider devices after sp_shutdown. To disable this feature, set the environment variable CIDER_COM_QUIT="OFF". Even though it really does not matter that Cider memory is cleared just before exit, it makes it cleaner for valgrind checks.	3 years ago
jfet	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
mos	No oscillation: Add a starting pulse	5 years ago
parallel	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
resistor	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
serial	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago
surfmob	Fixed a bug causing mult_* factors to get scaled at each setup().	6 months ago