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pyNgSpice/tests/bsim3soi

History

h_vogt 68c4de76b7 new option noopac, don't do op simulation before ac if circuit is linear May simplify ac simulation of passive RLC networks (No need to add series resistors in Ls, allows to C inseries)		14 years ago
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nmos	bsim3soi aka b4soi, ngspice makes correct dc loops - reference files now have 1.6V	14 years ago
pmos	bsim3soi aka b4soi, ngspice makes correct dc loops - reference files now have 1.6V	14 years ago
.cvsignore	new testcase for bsim3soi	18 years ago
Makefile.am	new QA test for `bsim3soi' aka `b4soi'	14 years ago