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pyNgSpice/examples/tclspice/tcl-testbench2

History

rlar b45c4ea78b ltraacct.c, shortcutting the bug fix use following fact at the artificial timestep time[-1] voltage[-1] === voltage[0] to shortcut the expressions		14 years ago
..
example.cir	whitespace cleanup, add missing trailing newlines	16 years ago
tcl-testbench2.tcl	to much puts	15 years ago