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pyNgSpice/examples/xspice

History

Giles Atkinson 35968d1da6 Add additional examples of Verilog co-simulation and share the Verilog source and large parts of the example circuits between Verilator and Icarus Verilog. Verilog source file adc.v has improved style: all assignments in the always block are now non-blocking.		2 years ago
..
d_lut	Improve the behaviour of ngspice when run in the background on a	1 year ago
d_process	Improve the behaviour of ngspice when run in the background on a	1 year ago
d_source	Improve the behaviour of ngspice when run in the background on a	1 year ago
delay	Improve the behaviour of ngspice when run in the background on a	1 year ago
delta-sigma	add y-axis label	4 years ago
filesource	Improve the behaviour of ngspice when run in the background on a	1 year ago
icarus_verilog	Add additional examples of Verilog co-simulation and share the Verilog	1 year ago
original-examples	Improve the behaviour of ngspice when run in the background on a	1 year ago
pll	Improve the behaviour of ngspice when run in the background on a	1 year ago
pwm-osc	Improve the behaviour of ngspice when run in the background on a	1 year ago
state	Obtain memory and simulation time	4 years ago
table	Improve the behaviour of ngspice when run in the background on a	1 year ago
various	Various filter examples using Laplace expression x_fer	3 years ago
verilator	Improve the behaviour of ngspice when run in the background on a	1 year ago