noisy ring-oszillator now using transistors with different W/L

(NMOS 2/2.5 and 5/0.25, PMOS 4/0.25 and 10/0.25)
for testing b3temp.c pParam generation, storage and removal

examples/transient-noise/noi-ring51-demo.cir

@@ -1,5 +1,6 @@
 * 51 stage Ring-Osc. BSIM3, transient noise
-* will need 45 min on a i7 860 with 4 threads
+* will need 90 sec on a i7 860 with 4 threads
+* for better noise analysis simulation time may be made larger than 200n
 
 * closes the loop between inverters xinv1 and xinv5
 vin in out dc 0.5 pulse 0.5 0 0.1n 5n 1 1 1
@@ -21,7 +22,7 @@ xiinv52 dd ss sub well out51 out52 inv1_2
 xiinv53 dd ss sub well out52 out inv1_2
 
 *output amplifier
-xiinv11 dd ss sub well out25 bufout inv1
+xiinv11 dd ss sub well out25 bufout inv2
 cout  bufout ss 0.2pF
 
 .option itl1=500 gmin=1e-15 itl4=10  noacct

examples/transient-noise/noilib-demo.h

@@ -6,12 +6,19 @@
 *mp1  outi in  dd  well  p1  w=4u l=0.25u  AS=7p AD=7p PS=6u PD=6u
 *.ends inv1
 
-* standard inverter
+* standard no noise inverter
 .subckt inv1 dd ss sub well in out
 mn1  out in  ss  sub  n1  w=2u  l=0.25u  AS=3p AD=3p PS=4u PD=4u
 mp1  out in  dd  well  p1  w=4u l=0.25u  AS=7p AD=7p PS=6u PD=6u
 .ends inv1
 
+* standard no noise inverter
+.subckt inv2 dd ss sub well in out
+mn1  out in  ss  sub  n1  w=5u  l=0.25u  AS=7p AD=7p PS=7u PD=7u
+mp1  out in  dd  well  p1  w=10u l=0.25u  AS=12p AD=12p PS=12u PD=12u
+.ends inv2
+
+
 * very noisy inverter (noise on vdd and well)
 .subckt inv1_1 dd ss sub well in out
 vn1 dd idd dc 0 trnoise 0.05 0.05n 1 0.05