Browse Source

.options noacct

pre-master-46
h_vogt 17 years ago
parent
commit
f727fd6c8e
  1. 1
      ChangeLog
  2. 2
      tests/TransImpedanceAmp/output.net
  3. 2
      tests/bsim3soi/inv_dc.cir
  4. 2
      tests/bsim3soi/inv_tr.cir
  5. 2
      tests/bsim3soi/ring51_40.cir
  6. 2
      tests/bsim3soi/test1.cir
  7. 2
      tests/bsim3soi/test2.cir
  8. 2
      tests/bsim3soi/test3.cir
  9. 2
      tests/bsim3soi/test4.cir
  10. 2
      tests/bsim3soi/test5.cir
  11. 2
      tests/bsim3soi/test6.cir
  12. 2
      tests/bsim3soi/test7.cir
  13. 2
      tests/bsim3soi/test8.cir
  14. 2
      tests/bsim3soidd/RampVg2.cir
  15. 2
      tests/bsim3soidd/inv2.cir
  16. 2
      tests/bsim3soidd/ring51.cir
  17. 2
      tests/bsim3soidd/t3.cir
  18. 2
      tests/bsim3soidd/t4.cir
  19. 2
      tests/bsim3soidd/t5.cir
  20. 2
      tests/bsim3soifd/RampVg2.cir
  21. 2
      tests/bsim3soifd/inv2.cir
  22. 2
      tests/bsim3soifd/ring51.cir
  23. 2
      tests/bsim3soifd/t3.cir
  24. 2
      tests/bsim3soifd/t4.cir
  25. 2
      tests/bsim3soifd/t5.cir
  26. 2
      tests/bsim3soipd/RampVg2.cir
  27. 2
      tests/bsim3soipd/inv2.cir
  28. 2
      tests/bsim3soipd/ring51.cir
  29. 2
      tests/bsim3soipd/t3.cir
  30. 2
      tests/bsim3soipd/t4.cir
  31. 2
      tests/bsim3soipd/t5.cir
  32. 2
      tests/bsim4/comprt.cir
  33. 1
      tests/bsim4/gstage.cir
  34. 2
      tests/bsim4/oneshot.cir
  35. 2
      tests/bsim4/opamp.cir
  36. 2
      tests/bsim4/ro_17.cir
  37. 2
      tests/bsim4/test1.cir
  38. 2
      tests/bsim4/test10.cir
  39. 2
      tests/bsim4/test11.cir
  40. 2
      tests/bsim4/test12.cir
  41. 2
      tests/bsim4/test13.cir
  42. 2
      tests/bsim4/test14.cir
  43. 2
      tests/bsim4/test1_gedl.cir
  44. 2
      tests/bsim4/test2.cir
  45. 1
      tests/bsim4/test2_gedl.cir
  46. 2
      tests/bsim4/test3.cir
  47. 2
      tests/bsim4/test3_gedl.cir
  48. 2
      tests/bsim4/test4.cir
  49. 1
      tests/bsim4/test4_gedl.cir
  50. 2
      tests/bsim4/test5.cir
  51. 2
      tests/bsim4/test6.cir
  52. 2
      tests/bsim4/test7.cir
  53. 2
      tests/bsim4/test8.cir
  54. 2
      tests/bsim4/test9.cir
  55. 2
      tests/filters/lowpass.cir
  56. 2
      tests/general/diffpair.cir
  57. 1
      tests/general/fourbitadder.cir
  58. 2
      tests/general/mosamp.cir
  59. 2
      tests/general/mosmem.cir
  60. 1
      tests/general/rc.cir
  61. 1
      tests/general/rca3040.cir
  62. 2
      tests/general/rtlinv.cir
  63. 2
      tests/general/schmitt.cir
  64. 2
      tests/hfet/id_vgs.cir
  65. 1
      tests/hfet/inverter.cir
  66. 2
      tests/hisim/test1.cir
  67. 1
      tests/jfet/jfet_vds-vgs.cir
  68. 1
      tests/mes/subth.cir
  69. 2
      tests/mesa/mesa-12.cir
  70. 2
      tests/mesa/mesa.cir
  71. 1
      tests/mesa/mesa11.cir
  72. 1
      tests/mesa/mesa12.cir
  73. 2
      tests/mesa/mesa13.cir
  74. 2
      tests/mesa/mesa14.cir
  75. 2
      tests/mesa/mesa15.cir
  76. 2
      tests/mesa/mesa21.cir
  77. 2
      tests/mesa/mesgout.cir
  78. 2
      tests/mesa/mesinv.cir
  79. 1
      tests/mesa/mesosc.cir
  80. 2
      tests/mos6/mos6inv.cir
  81. 2
      tests/mos6/simpleinv.cir
  82. 1
      tests/polezero/filt_bridge_t.cir
  83. 1
      tests/polezero/filt_multistage.cir
  84. 1
      tests/polezero/filt_rc.cir
  85. 1
      tests/polezero/pz2.cir
  86. 1
      tests/polezero/pzt.cir
  87. 1
      tests/polezero/simplepz.cir
  88. 1
      tests/resistance/res_array.cir
  89. 1
      tests/resistance/res_partition.cir
  90. 1
      tests/resistance/res_simple.cir
  91. 2
      tests/sensitivity/diffpair.cir
  92. 1
      tests/transient/fourbitadder.cir
  93. 1
      tests/transmission/cpl2_ksp.cir
  94. 1
      tests/transmission/cpl2_sp.cir
  95. 1
      tests/transmission/cpl_ksp.cir
  96. 1
      tests/transmission/cpl_sp.cir
  97. 1
      tests/transmission/ibm1.cir
  98. 1
      tests/transmission/ibm2.cir
  99. 1
      tests/transmission/txl2_ksp.cir
  100. 3
      tests/transmission/txl2_sp.cir

1
ChangeLog

@ -2,6 +2,7 @@
* xspice/icm/makefile: *.cm for CYGWIN need to be made executable * xspice/icm/makefile: *.cm for CYGWIN need to be made executable
(755 instead of 644) (755 instead of 644)
* fteext.h spiceif.c options.c dotcards.c: .options NOACCT added * fteext.h spiceif.c options.c dotcards.c: .options NOACCT added
* /tests/.../*.cir .options noacct added (except BSIM3 files)
2009-02-22 Dietmar Warning 2009-02-22 Dietmar Warning
* devices/adms/mextram: Update to release version 504.7 now with selfheating * devices/adms/mextram: Update to release version 504.7 now with selfheating

2
tests/TransImpedanceAmp/output.net

@ -5,7 +5,7 @@
* Documentation at http://www.brorson.com/gEDA/SPICE/ * * Documentation at http://www.brorson.com/gEDA/SPICE/ *
********************************************************* *********************************************************
* Command stuff * Command stuff
.options gmin=1e-9
.options gmin=1e-9 noacct
.options abstol=1e-11 .options abstol=1e-11
* .ac dec 10 10MegHz 10 Ghz * .ac dec 10 10MegHz 10 Ghz
* Remainder of file * Remainder of file

2
tests/bsim3soi/inv_dc.cir

@ -2,7 +2,7 @@
.include ./nmos4p0.mod .include ./nmos4p0.mod
.include ./pmos4p0.mod .include ./pmos4p0.mod
.option TEMP=27C
.option TEMP=27C noacct
Vpower VD 0 1.5 Vpower VD 0 1.5
Vgnd VS 0 0 Vgnd VS 0 0

2
tests/bsim3soi/inv_tr.cir

@ -2,7 +2,7 @@ Mx Drain Gate Source Back-gate(substrate) Body Tx W L (body ommitted for FB)
.include ./nmos4p0.mod .include ./nmos4p0.mod
.include ./pmos4p0.mod .include ./pmos4p0.mod
.option TEMP=27C
.option TEMP=27C noacct
Vpower VD 0 1.5 Vpower VD 0 1.5
Vgnd VS 0 0 Vgnd VS 0 0

2
tests/bsim3soi/ring51_40.cir

@ -11,7 +11,7 @@ xinv5 dd ss sub out50 out inv1
xinv11 dd ss sub out buf inv1 xinv11 dd ss sub out buf inv1
cout buf ss 1pF cout buf ss 1pF
.option itl1=500 gmin=1e-15 itl4=10
.option itl1=500 gmin=1e-15 itl4=10 noacct
*.option itl1=1000 itl4=20 temp=85 gmin=1e-15 abstol=1e-12 reltol=1e-4 *.option itl1=1000 itl4=20 temp=85 gmin=1e-15 abstol=1e-12 reltol=1e-4
.tran 0.2n 10n .tran 0.2n 10n
.print tran v(out25) v(out50) .print tran v(out25) v(out50)

2
tests/bsim3soi/test1.cir

@ -1,6 +1,6 @@
** NMOSFET: Benchmarking of B4SOI Id-Vd by Jane Xi 05/09/2003. ** NMOSFET: Benchmarking of B4SOI Id-Vd by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test2.cir

@ -1,6 +1,6 @@
** NMOSFET: Benchmarking of B4SOI Stress Effect by Jane Xi 05/09/2003. ** NMOSFET: Benchmarking of B4SOI Stress Effect by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test3.cir

@ -1,6 +1,6 @@
** NMOSFET: Benchmarking of B4SOI Id-Vg by Jane Xi 05/09/2003. ** NMOSFET: Benchmarking of B4SOI Id-Vg by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test4.cir

@ -1,6 +1,6 @@
** NMOSFET: Benchmarking of B4SOI Id-Vg stress effect by Jane Xi 05/09/2003. ** NMOSFET: Benchmarking of B4SOI Id-Vg stress effect by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test5.cir

@ -1,6 +1,6 @@
** PMOSFET: Benchmarking of B4SOI Id-Vd by Jane Xi 05/09/2003. ** PMOSFET: Benchmarking of B4SOI Id-Vd by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test6.cir

@ -1,6 +1,6 @@
** PMOSFET: Benchmarking of B4SOI Stress Effect by Jane Xi 05/09/2003. ** PMOSFET: Benchmarking of B4SOI Stress Effect by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test7.cir

@ -1,6 +1,6 @@
** PMOSFET: Benchmarking of B4SOI Id-Vg by Jane Xi 05/09/2003. ** PMOSFET: Benchmarking of B4SOI Id-Vg by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soi/test8.cir

@ -1,6 +1,6 @@
** PMOSFET: Benchmarking of B4SOI Id-Vg Stress effect by Jane Xi 05/09/2003. ** PMOSFET: Benchmarking of B4SOI Id-Vg Stress effect by Jane Xi 05/09/2003.
.option post nopage brief
.option post nopage brief noacct
.option ingold=1 .option ingold=1
.option gmin=0 .option gmin=0

2
tests/bsim3soidd/RampVg2.cir

@ -10,7 +10,7 @@ Vb b 0 0.0
m1 d g s e n1 w=10u l=0.25u debug=-1 m1 d g s e n1 w=10u l=0.25u debug=-1
.option gmin=1e-20 itl1=200 itl2=200 abstol=1e-9
.option gmin=1e-20 itl1=200 itl2=200 abstol=1e-9 noacct
.tran 1p 1.0ns .tran 1p 1.0ns
.print tran @m1[Vbs], V(g)/10 .print tran @m1[Vbs], V(g)/10
.include nmosdd.mod .include nmosdd.mod

2
tests/bsim3soidd/inv2.cir

@ -10,7 +10,7 @@ ve e 0 dc 1.25
m1 out in dd e p1 w=20u l=0.25u m1 out in dd e p1 w=20u l=0.25u
m2 out in ss e n1 w=10u l=0.25u m2 out in ss e n1 w=10u l=0.25u
.option itl1=500 gmin=1e-25
.option itl1=500 gmin=1e-25 noacct
.dc vin 0 2.5 0.01 .dc vin 0 2.5 0.01
.print dc v(in), v(out) .print dc v(in), v(out)
.include nmosdd.mod .include nmosdd.mod

2
tests/bsim3soidd/ring51.cir

@ -13,7 +13,7 @@ cout buf ss 1pF
xdum ss dum xdum ss dum
.option itl1=500 gmin=1e-15 itl4=10
.option itl1=500 gmin=1e-15 itl4=10 noacct
*.dc vdd 0 2 0.01 *.dc vdd 0 2 0.01
.tran 0.2n 50n .tran 0.2n 50n

2
tests/bsim3soidd/t3.cir

@ -11,7 +11,7 @@ vg g 0 dc 3
m1 d g s e n1 w=10u l=0.25u m1 d g s e n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vd 0 3 0.01 vg 0.5 3 0.5 .dc vd 0 3 0.01 vg 0.5 3 0.5
.print dc v(g), i(vs) .print dc v(g), i(vs)
.include nmosdd.mod .include nmosdd.mod

2
tests/bsim3soidd/t4.cir

@ -11,7 +11,7 @@ vb b 0 dc 0
m1 d g s e b n1 w=10u l=0.25u m1 d g s e b n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vg 0 1.5 0.01 vb -0.3 0.5 0.1 .dc vg 0 1.5 0.01 vb -0.3 0.5 0.1
.print dc i(vs) .print dc i(vs)
.include nmosdd.mod .include nmosdd.mod

2
tests/bsim3soidd/t5.cir

@ -10,7 +10,7 @@ vg g 0 dc 3
m1 d g s e n1 w=10u l=0.25u m1 d g s e n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vg 0 1.5 0.01 ve -4 4 1 .dc vg 0 1.5 0.01 ve -4 4 1
.print dc i(vs) .print dc i(vs)
.include nmosdd.mod .include nmosdd.mod

2
tests/bsim3soifd/RampVg2.cir

@ -10,7 +10,7 @@ Vb b 0 0.0
m1 d g s e n1 w=10u l=0.25u debug=-1 m1 d g s e n1 w=10u l=0.25u debug=-1
.option gmin=1e-20 itl1=200 itl2=200 abstol=1e-9
.option gmin=1e-20 itl1=200 itl2=200 abstol=1e-9 noacct
.tran 1p 1.0ns .tran 1p 1.0ns
.print tran @m1[Vbs], V(g)/10 .print tran @m1[Vbs], V(g)/10
.include nmosfd.mod .include nmosfd.mod

2
tests/bsim3soifd/inv2.cir

@ -10,7 +10,7 @@ ve e 0 dc 1.25
m1 out in dd e p1 w=20u l=0.25u m1 out in dd e p1 w=20u l=0.25u
m2 out in ss e n1 w=10u l=0.25u m2 out in ss e n1 w=10u l=0.25u
.option itl1=500 gmin=1e-25
.option itl1=500 gmin=1e-25 noacct
.dc vin 0 2.5 0.01 .dc vin 0 2.5 0.01
.print dc v(in), v(out) .print dc v(in), v(out)
.include nmosfd.mod .include nmosfd.mod

2
tests/bsim3soifd/ring51.cir

@ -13,7 +13,7 @@ cout buf ss 1pF
xdum ss dum xdum ss dum
.option itl1=500 gmin=1e-15 itl4=10
.option itl1=500 gmin=1e-15 itl4=10 noacct
*.dc vdd 0 2 0.01 *.dc vdd 0 2 0.01
.tran 0.2n 50n .tran 0.2n 50n

2
tests/bsim3soifd/t3.cir

@ -11,7 +11,7 @@ vg g 0 dc 3
m1 d g s e n1 w=10u l=0.25u m1 d g s e n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vd 0 3 0.01 vg 0.5 3 0.5 .dc vd 0 3 0.01 vg 0.5 3 0.5
.print dc v(g), i(vs) .print dc v(g), i(vs)
.include nmosfd.mod .include nmosfd.mod

2
tests/bsim3soifd/t4.cir

@ -11,7 +11,7 @@ vb b 0 dc 0
m1 d g s e b n1 w=10u l=0.25u m1 d g s e b n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vg 0 1.5 0.01 vb -0.3 0.5 0.1 .dc vg 0 1.5 0.01 vb -0.3 0.5 0.1
.print dc i(vs) .print dc i(vs)
.include nmosfd.mod .include nmosfd.mod

2
tests/bsim3soifd/t5.cir

@ -10,7 +10,7 @@ vg g 0 dc 3
m1 d g s e n1 w=10u l=0.25u m1 d g s e n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vg 0 1.5 0.01 ve -4 4 1 .dc vg 0 1.5 0.01 ve -4 4 1
.print dc i(vs) .print dc i(vs)
.include nmosfd.mod .include nmosfd.mod

2
tests/bsim3soipd/RampVg2.cir

@ -10,7 +10,7 @@ Vb b 0 0.0
m1 d g s e n1 w=10u l=0.25u debug=-1 m1 d g s e n1 w=10u l=0.25u debug=-1
.option gmin=1e-20 itl1=200 itl2=200 abstol=1e-9
.option gmin=1e-20 itl1=200 itl2=200 abstol=1e-9 noacct
.tran 1p 1.0ns .tran 1p 1.0ns
.save @m1[Vbs], V(g)/10 .save @m1[Vbs], V(g)/10
.print tran v(g)/10 .print tran v(g)/10

2
tests/bsim3soipd/inv2.cir

@ -10,7 +10,7 @@ ve e 0 dc 1.25
m1 out in dd e p1 w=20u l=0.25u m1 out in dd e p1 w=20u l=0.25u
m2 out in ss e n1 w=10u l=0.25u m2 out in ss e n1 w=10u l=0.25u
.option itl1=500 gmin=1e-25
.option itl1=500 gmin=1e-25 noacct
.dc vin 0 2.5 0.01 .dc vin 0 2.5 0.01
.print dc v(in), v(out) .print dc v(in), v(out)
.include nmospd.mod .include nmospd.mod

2
tests/bsim3soipd/ring51.cir

@ -13,7 +13,7 @@ cout buf ss 1pF
xdum ss dum xdum ss dum
.option itl1=500 gmin=1e-15 itl4=10
.option itl1=500 gmin=1e-15 itl4=10 noacct
.dc vdd 0 2 0.01 .dc vdd 0 2 0.01
.tran 0.2n 50n .tran 0.2n 50n

2
tests/bsim3soipd/t3.cir

@ -11,7 +11,7 @@ vg g 0 dc 3
m1 d g s e n1 w=10u l=0.25u m1 d g s e n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vd 0 3 0.01 vg 0.5 3 0.5 .dc vd 0 3 0.01 vg 0.5 3 0.5
.print dc v(g), i(vs) .print dc v(g), i(vs)
.include nmospd.mod .include nmospd.mod

2
tests/bsim3soipd/t4.cir

@ -11,7 +11,7 @@ vb b 0 dc 0
m1 d g s e b n1 w=10u l=0.25u m1 d g s e b n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vg 0 1.5 0.01 vb -0.3 0.5 0.1 .dc vg 0 1.5 0.01 vb -0.3 0.5 0.1
.print dc i(vs) .print dc i(vs)
.include nmospd.mod .include nmospd.mod

2
tests/bsim3soipd/t5.cir

@ -10,7 +10,7 @@ vg g 0 dc 3
m1 d g s e n1 w=10u l=0.25u m1 d g s e n1 w=10u l=0.25u
.option gmin=1e-25 itl1=500
.option gmin=1e-25 itl1=500 noacct
.dc vg 0 1.5 0.01 ve -4 4 1 .dc vg 0 1.5 0.01 ve -4 4 1
.print dc i(vs) .print dc i(vs)
.include nmospd.mod .include nmospd.mod

2
tests/bsim4/comprt.cir

@ -28,7 +28,7 @@ Vb B 0 0
.include modelcard.pmos .include modelcard.pmos
.tran 1ns 60ns .tran 1ns 60ns
.option reltol=1e-5 post
.option reltol=1e-5 post noacct
.print tran a b v(9) v(8) .print tran a b v(9) v(8)
.end .end

1
tests/bsim4/gstage.cir

@ -7,6 +7,7 @@ Rload 3 vdd 25k
Vdd vdd 0 1.8 Vdd vdd 0 1.8
Vin 1 0 1.2 ac 0.1 Vin 1 0 1.2 ac 0.1
.option noacct
.ac dec 10 100 1000Meg .ac dec 10 100 1000Meg
.print ac vdb(3) .print ac vdb(3)

2
tests/bsim4/oneshot.cir

@ -33,6 +33,6 @@ vin in 0 pulse 0 1.8 1ns .1ns .1ns .8ns 5ns
.tran 1ns 10ns .tran 1ns 10ns
.print tran in out .print tran in out
.option post reltol=1e-3
.option post reltol=1e-3 noacct
.end .end

2
tests/bsim4/opamp.cir

@ -23,6 +23,8 @@ Vdd vdd 0 1.8
.ac dec 10 100 100Meg .ac dec 10 100 100Meg
.print ac vdb(8) .print ac vdb(8)
.option noacct
.include modelcard.nmos .include modelcard.nmos
.include modelcard.pmos .include modelcard.pmos

2
tests/bsim4/ro_17.cir

@ -49,7 +49,7 @@ c1 18 0 .1p
.ic v(13)=0.0 v(14)=2.0 v(15)=0.0 v(16)=2.0 v(17)=0.0 v(18)=2.0 .ic v(13)=0.0 v(14)=2.0 v(15)=0.0 v(16)=2.0 v(17)=0.0 v(18)=2.0
*.ic V(10)=5 v(2)=5 v(3)=5 v(4)=5 v(5)=5 v(6)=5 *.ic V(10)=5 v(2)=5 v(3)=5 v(4)=5 v(5)=5 v(6)=5
.tran .1ns 10ns .tran .1ns 10ns
.options acct reltol=1e-3
.options reltol=1e-3 noacct
.print tran v(2) .print tran v(2)
.plot tran v(5) .plot tran v(5)
.end .end

2
tests/bsim4/test1.cir

@ -9,6 +9,8 @@ Vb b 0 0.0
.dc vds 0.0 1.2 0.02 vgs 0.2 1.2 0.2 .dc vds 0.0 1.2 0.02 vgs 0.2 1.2 0.2
.options noacct
.print dc i(vds) .print dc i(vds)
.include modelcard.nmos .include modelcard.nmos

2
tests/bsim4/test10.cir

@ -8,7 +8,7 @@ vds 2 0 -1.2
.dc vds 0 -1.2 -0.02 vgs -0.3 -1.2 -0.3 .dc vds 0 -1.2 -0.02 vgs -0.3 -1.2 -0.3
.options Temp=100.0
.options Temp=100.0 noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)
.include modelcard.pmos .include modelcard.pmos

2
tests/bsim4/test11.cir

@ -8,6 +8,8 @@ vbs 3 0 0.0
.dc vgs 0.6 -1.2 -0.02 vds -0.1 -1.2 -0.3 .dc vgs 0.6 -1.2 -0.02 vds -0.1 -1.2 -0.3
.options noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)
.include modelcard.pmos .include modelcard.pmos

2
tests/bsim4/test12.cir

@ -8,6 +8,8 @@ vbs 3 0 0.0
.dc vgs 0.6 -1.2 -0.02 vbs 0 1.2 0.3 .dc vgs 0.6 -1.2 -0.02 vbs 0 1.2 0.3
.options noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)
.include modelcard.pmos .include modelcard.pmos

2
tests/bsim4/test13.cir

@ -8,7 +8,7 @@ vbs 3 0 0.0
.dc vgs 0.6 -1.2 -0.02 vbs 0 1.2 0.3 .dc vgs 0.6 -1.2 -0.02 vbs 0 1.2 0.3
.options Temp=-55.0
.options Temp=-55.0 noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)

2
tests/bsim4/test14.cir

@ -8,7 +8,7 @@ vbs 3 0 0.0
.dc vgs 0.6 -1.2 -0.02 vbs 0 1.2 0.3 .dc vgs 0.6 -1.2 -0.02 vbs 0 1.2 0.3
.options Temp=100.0
.options Temp=100.0 noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)

2
tests/bsim4/test1_gedl.cir

@ -10,6 +10,8 @@ Vbs b 0 0.0
*.dc vds 0.0 1.2 0.02 vgs 0.2 1.2 0.2 *.dc vds 0.0 1.2 0.02 vgs 0.2 1.2 0.2
.dc vbs 0.5 -2 -0.02 .dc vbs 0.5 -2 -0.02
.options noacct
.print dc i(vds) .print dc i(vds)
.include modelcard.nmos .include modelcard.nmos

2
tests/bsim4/test2.cir

@ -7,7 +7,7 @@ vds 2 0 1.2
.dc vds 0 1.2 0.02 vgs 0 1.2 0.2 .dc vds 0 1.2 0.02 vgs 0 1.2 0.2
.options Temp=-55.0
.options Temp=-55.0 noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)

1
tests/bsim4/test2_gedl.cir

@ -10,6 +10,7 @@ vbs b 0 0.0
.dc vbs -0.5 2 0.02 .dc vbs -0.5 2 0.02
*.options Temp=300 *.options Temp=300
.options noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)
.include modelcard.pmos .include modelcard.pmos

2
tests/bsim4/test3.cir

@ -7,7 +7,7 @@ vds 2 0 1.2
.dc vds 0 1.2 0.02 vgs 0 1.2 0.2 .dc vds 0 1.2 0.02 vgs 0 1.2 0.2
.options Temp=100.0
.options Temp=100.0 noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)

2
tests/bsim4/test3_gedl.cir

@ -10,6 +10,8 @@ Vbs b 0 0.0
*.dc vds 0.0 1.2 0.02 vgs 0.2 1.2 0.2 *.dc vds 0.0 1.2 0.02 vgs 0.2 1.2 0.2
.dc vbs 0.5 -2 -0.02 .dc vbs 0.5 -2 -0.02
.options noacct
.print dc i(vds) .print dc i(vds)
.include modelcard.nmos .include modelcard.nmos

2
tests/bsim4/test4.cir

@ -7,6 +7,8 @@ vds 2 0 1.2
.dc vgs 0.0 1.2 0.02 vds 0.05 1.2 0.5 .dc vgs 0.0 1.2 0.02 vds 0.05 1.2 0.5
.options noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)
.include modelcard.nmos .include modelcard.nmos

1
tests/bsim4/test4_gedl.cir

@ -9,6 +9,7 @@ vbs b 0 0.0
*.dc vds 0 -1.2 -0.02 vgs 0 -1.2 -0.3 *.dc vds 0 -1.2 -0.02 vgs 0 -1.2 -0.3
.dc vbs -0.5 2 0.02 .dc vbs -0.5 2 0.02
*.options Temp=300 *.options Temp=300
.options noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)

2
tests/bsim4/test5.cir

@ -8,6 +8,8 @@ vds 2 0 0.1
.dc vgs -0.6 1.2 0.02 vbs 0.0 -1.2 -0.3 .dc vgs -0.6 1.2 0.02 vbs 0.0 -1.2 -0.3
.options noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)
.include modelcard.nmos .include modelcard.nmos

2
tests/bsim4/test6.cir

@ -8,7 +8,7 @@ vds 2 0 0.1
.dc vgs -0.6 1.2 0.02 vbs 0.0 -1.2 -0.3 .dc vgs -0.6 1.2 0.02 vbs 0.0 -1.2 -0.3
.options Temp=-55.0
.options Temp=-55.0 noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)

2
tests/bsim4/test7.cir

@ -8,7 +8,7 @@ vds 2 0 0.1
.dc vgs -0.6 1.2 0.02 vbs 0.0 -1.2 -0.3 .dc vgs -0.6 1.2 0.02 vbs 0.0 -1.2 -0.3
.options Temp=100.0
.options Temp=100.0 noacct
.print dc v(2) i(vds) .print dc v(2) i(vds)

2
tests/bsim4/test8.cir

@ -8,6 +8,8 @@ vds 2 0 -1.2
.dc vds 0 -1.2 -0.02 vgs 0 -1.2 -0.3 .dc vds 0 -1.2 -0.02 vgs 0 -1.2 -0.3
.options noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)
.include modelcard.pmos .include modelcard.pmos

2
tests/bsim4/test9.cir

@ -7,7 +7,7 @@ vds 2 0 -1.2
.dc vds 0 -1.2 -0.02 vgs 0 -1.2 -0.3 .dc vds 0 -1.2 -0.02 vgs 0 -1.2 -0.3
.options Temp=-55
.options Temp=-55 noacct
.print dc v(1) i(vds) .print dc v(1) i(vds)

2
tests/filters/lowpass.cir

@ -1,6 +1,6 @@
A Simple AC Run A Simple AC Run
.OPTIONS LIST NODE POST TRANS
.OPTIONS LIST NODE POST TRANS noacct
.OP .OP
.AC DEC 10 1k 1Meg .AC DEC 10 1k 1Meg
.PRINT AC V(2) .PRINT AC V(2)

2
tests/general/diffpair.cir

@ -4,6 +4,8 @@ simple differential pair - CM and DM dc sensitivity
.model qnl npn(bf=80 rb=100 ccs=2pf tf=0.3ns tr=6ns cje=3pf cjc=2pf va=50) .model qnl npn(bf=80 rb=100 ccs=2pf tf=0.3ns tr=6ns cje=3pf cjc=2pf va=50)
.model qnr npn(bf=80 rb=100 ccs=2pf tf=0.3ns tr=6ns cje=3pf cjc=2pf va=50) .model qnr npn(bf=80 rb=100 ccs=2pf tf=0.3ns tr=6ns cje=3pf cjc=2pf va=50)
.options noacct
* Circuit description: * Circuit description:
q1 4 2 6 qnr q1 4 2 6 qnr
q2 5 3 6 qnl q2 5 3 6 qnl

1
tests/general/fourbitadder.cir

@ -4,6 +4,7 @@
.MODEL dmod D .MODEL dmod D
.MODEL qmod NPN(BF=75 RB=100 CJE=1PF CJC=3PF) .MODEL qmod NPN(BF=75 RB=100 CJE=1PF CJC=3PF)
.options noacct
.SUBCKT NAND 1 2 3 4 .SUBCKT NAND 1 2 3 4
* noeuds: entrees(2) sortie vcc * noeuds: entrees(2) sortie vcc

2
tests/general/mosamp.cir

@ -3,7 +3,7 @@ mosamp - mos amplifier - transient
* The original options line (removed acct) * The original options line (removed acct)
* .options acct abstol=10n vntol=10n * .options acct abstol=10n vntol=10n
.options abstol=10n vntol=10n
.options abstol=10n vntol=10n noacct
.tran 0.1us 10us .tran 0.1us 10us
m1 15 15 1 32 m w=88.9u l=25.4u m1 15 15 1 32 m w=88.9u l=25.4u
m2 1 1 2 32 m w=12.7u l=266.7u m2 1 1 2 32 m w=12.7u l=266.7u

2
tests/general/mosmem.cir

@ -2,7 +2,7 @@ mosmem - mos memory cell
.width in=72 .width in=72
.opt abstol=1u .opt abstol=1u
.opt list node
.opt list node noacct
* The original line is below * The original line is below
*.opt acct list node *.opt acct list node

1
tests/general/rc.cir

@ -3,6 +3,7 @@ r 1 2 1.0
*l 1 2 1.0 *l 1 2 1.0
c 2 0 1.0 c 2 0 1.0
vin 1 0 pulse (0 1) ac 1 vin 1 0 pulse (0 1) ac 1
.options noacct
.tran 0.1 7.0 .tran 0.1 7.0
*.ac dec 10 .01 10 *.ac dec 10 .01 10
.plot tran v(2) i(vin) .plot tran v(2) i(vin)

1
tests/general/rca3040.cir

@ -1,4 +1,5 @@
rca3040 ckt - rca 3040 wideband amplifier rca3040 ckt - rca 3040 wideband amplifier
.options noacct
.ac dec 10 1 10ghz .ac dec 10 1 10ghz
.dc vin -0.25 0.25 0.005 .dc vin -0.25 0.25 0.005
.tran 2.0ns 200ns .tran 2.0ns 200ns

2
tests/general/rtlinv.cir

@ -1,7 +1,7 @@
rtlinv ckt - cascaded rtl inverters rtlinv ckt - cascaded rtl inverters
.width in=72 .width in=72
.opt list node lvlcod=2
.opt list node lvlcod=2 noacct
* The original line is below * The original line is below
*.opt acct list node lvlcod=2 *.opt acct list node lvlcod=2

2
tests/general/schmitt.cir

@ -1,7 +1,7 @@
schmitt ckt - ecl compatible schmitt trigger schmitt ckt - ecl compatible schmitt trigger
.width in=72 .width in=72
.opt list node lvlcod=2
.opt list node lvlcod=2 noacct
* The original line is below * The original line is below
*.opt acct list node lvlcod=2 *.opt acct list node lvlcod=2

2
tests/hfet/id_vgs.cir

@ -4,7 +4,7 @@ z1 1 2 0 hfet l=1u w=10u
vgs 2 0 dc 0.3 vgs 2 0 dc 0.3
vds 1 0 dc 1.0 vds 1 0 dc 1.0
.options noacct
.model hfet nhfet level=5 rdi=0 rsi=0 m=2.57 lambda=0.17 .model hfet nhfet level=5 rdi=0 rsi=0 m=2.57 lambda=0.17
+ vs=1.5e5 mu=0.385 vt0=0.13 eta=1.32 sigma0=0.04 + vs=1.5e5 mu=0.385 vt0=0.13 eta=1.32 sigma0=0.04
+ vsigma=0.1 Vsigmat=0.3 js1s=0 js1d=0 nmax=6e15 + vsigma=0.1 Vsigmat=0.3 js1s=0 js1d=0 nmax=6e15

1
tests/hfet/inverter.cir

@ -14,6 +14,7 @@ vin 2 0 dc 0 pwl(0,0V 1ns,0V 1.005ns,1V 2ns,1V)
x1 1 2 3 inv x1 1 2 3 inv
x2 1 3 4 inv x2 1 3 4 inv
.options noacct
.tran 0.01n 3n .tran 0.01n 3n
.print tran all .print tran all
.model adrv nhfet level=5 rd=60 rs=60 m=2.57 lambda=0.17 .model adrv nhfet level=5 rd=60 rs=60 m=2.57 lambda=0.17

2
tests/hisim/test1.cir

@ -1,5 +1,5 @@
HISIM1 Test nch W=10u L=1u HISIM1 Test nch W=10u L=1u
.options temp=25
.options temp=25 noacct
* *
vds 1 0 dc 0.05 vds 1 0 dc 0.05
vgs 2 0 dc 3 vgs 2 0 dc 3

1
tests/jfet/jfet_vds-vgs.cir

@ -7,6 +7,7 @@ VG 1 0 -2
* *
.model MODJ NJF LEVEL=1 VTO=-3.5 BETA=4.1E-4 LAMBDA=0.002 RD=200 .model MODJ NJF LEVEL=1 VTO=-3.5 BETA=4.1E-4 LAMBDA=0.002 RD=200
* *
.options noacct
.op .op
.dc VD 0 25 1 VG -3 0 1 .dc VD 0 25 1 VG -3 0 1
.print DC I(VD) .print DC I(VD)

1
tests/mes/subth.cir

@ -9,6 +9,7 @@ z1 2 3 0 mesmod area=1.4
.model mesmod nmf level=1 rd=46 rs=46 vt0=-1.3 .model mesmod nmf level=1 rd=46 rs=46 vt0=-1.3
+ lambda=0.03 alpha=3 beta=1.4e-3 + lambda=0.03 alpha=3 beta=1.4e-3
.options noacct
.dc vgs -3 0 0.05 .dc vgs -3 0 0.05
.print DC vids#branch .print DC vids#branch

2
tests/mesa/mesa-12.cir

@ -10,6 +10,8 @@ vgs 2 0 dc 0 pulse(-3 0 0 0.5n 0.5n 2n 4n)
vdd 1 0 5v vdd 1 0 5v
.model mesa1 nmf(level=2 rd=31 rs=31) .model mesa1 nmf(level=2 rd=31 rs=31)
.options noacct
.dc vgs -2 0 0.02 .dc vgs -2 0 0.02
.tran 0.1n 5n .tran 0.1n 5n
.print v(3) v(2) .print v(3) v(2)

2
tests/mesa/mesa.cir

@ -9,6 +9,8 @@ z2 1 2 2 depl l=1u w=10u
.model enha nmf level=2 rd=31 rs=31 vto=0.1 astar=0 .model enha nmf level=2 rd=31 rs=31 vto=0.1 astar=0
.model depl nmf level=2 rd=31 rs=31 vto=-1.0 astar=0 .model depl nmf level=2 rd=31 rs=31 vto=-1.0 astar=0
.options noacct
.dc vin 0 3.0 0.05 .dc vin 0 3.0 0.05
.print dc v(2) vin#branch .print dc v(2) vin#branch
.end .end

1
tests/mesa/mesa11.cir

@ -6,6 +6,7 @@ vids 1 2 dc 0
vgs 3 0 dc 0 vgs 3 0 dc 0
z1 2 3 0 mesmod l=1u w=20u z1 2 3 0 mesmod l=1u w=20u
.options noacct
.op .op
.dc vds 0 2 0.05 vgs -1.2 0 0.4 .dc vds 0 2 0.05 vgs -1.2 0 0.4
.print DC vids#branch .print DC vids#branch

1
tests/mesa/mesa12.cir

@ -9,6 +9,7 @@ vgs 2 0 dc 0 pulse(-3 0 0 0.5n 0.5n 2n 4n)
vdd 1 0 5v vdd 1 0 5v
.model mesa1 nmf(level=2 rd=31 rs=31) .model mesa1 nmf(level=2 rd=31 rs=31)
.options noacct
.dc vgs -2 0 0.02 .dc vgs -2 0 0.02
.tran 0.1n 5n .tran 0.1n 5n
.print tran v(2) v(3) .print tran v(2) v(3)

2
tests/mesa/mesa13.cir

@ -7,6 +7,8 @@ vgs 1 0 dc 0
vig 1 2 dc 0 vig 1 2 dc 0
.model mesmod nmf(level=2 rd=31 rs=31 rg=10) .model mesmod nmf(level=2 rd=31 rs=31 rg=10)
.options noacct
.dc vgs -3 0.4 0.05 .dc vgs -3 0.4 0.05
.print vig#branch .print vig#branch

2
tests/mesa/mesa14.cir

@ -11,6 +11,8 @@ z2 1 2 2 depl l=1u w=10u
.model enha nmf level=2 rd=31 rs=31 vto=0.1 .model enha nmf level=2 rd=31 rs=31 vto=0.1
.model depl nmf level=2 rd=31 rs=31 vto=-1.0 .model depl nmf level=2 rd=31 rs=31 vto=-1.0
.options noacct
.dc vin 0 3.0 0.05 .dc vin 0 3.0 0.05
.print DC V(2) .print DC V(2)

2
tests/mesa/mesa15.cir

@ -8,6 +8,8 @@ vgs 3 0 dc 0
z1 2 3 0 mesmod l=1u w=20u ts=400 td=400 z1 2 3 0 mesmod l=1u w=20u ts=400 td=400
.model mesmod nmf level=2 rd=31 rs=31 .model mesmod nmf level=2 rd=31 rs=31
.options noacct
.dc vgs -3 0 0.05 .dc vgs -3 0 0.05
.print DC vids#branch .print DC vids#branch

2
tests/mesa/mesa21.cir

@ -10,6 +10,8 @@ vids 1 3 dc 0
+ eta=1.5 lambda=0.04 tc=0.001 sigma0=0.02 vsigma=0.1 vsigmat=1.37 + eta=1.5 lambda=0.04 tc=0.001 sigma0=0.02 vsigma=0.1 vsigmat=1.37
+ delta=5 beta=0.0085 + delta=5 beta=0.0085
.options noacct
.dc vds 0 4 0.05 vgs -1.5 0.5 0.5 .dc vds 0 4 0.05 vgs -1.5 0.5 0.5
.print vids#branch .print vids#branch

2
tests/mesa/mesgout.cir

@ -27,6 +27,8 @@ vid 2 3 dc 0
+ tf=100000 + tf=100000
+ lambdahf=120 + lambdahf=120
.options noacct
.ac DEC 10 0.001 1e6 .ac DEC 10 0.001 1e6
.print ac V(3) .print ac V(3)

2
tests/mesa/mesinv.cir

@ -39,6 +39,8 @@ vig 1000 2 dc 0
*.nodeset v(10)=1.6 v(40)=1.6 v(70)=1.6 v(20)=0.2 v(50)=0.2 *.nodeset v(10)=1.6 v(40)=1.6 v(70)=1.6 v(20)=0.2 v(50)=0.2
*+ v(80)=0.2 *+ v(80)=0.2
.options noacct
.dc vin 0 1 0.01 .dc vin 0 1 0.01
.print dc v(70) .print dc v(70)

1
tests/mesa/mesosc.cir

@ -13,6 +13,7 @@ zd 3 20 0 driver l=0.7u w=20u
ci 3 0 20f ci 3 0 20f
.ends mesinv .ends mesinv
.options noacct
.model driver nmf level=2 n=1.44 rd=20 rs=20 vs=1.9e5 .model driver nmf level=2 n=1.44 rd=20 rs=20 vs=1.9e5
+ mu=0.25 d=1e-7 vto=0.15 m=2 lambda=0.15 sigma0=0.02 + mu=0.25 d=1e-7 vto=0.15 m=2 lambda=0.15 sigma0=0.02
+ vsigmat=0.5 + vsigmat=0.5

2
tests/mos6/mos6inv.cir

@ -42,7 +42,7 @@ VIN 1 0 DC 0 PWL(0 0 2N 5)
.PRINT TRAN V(1) V(2) V(3) V(4) V(5) .PRINT TRAN V(1) V(2) V(3) V(4) V(5)
.PRINT TRAN V(11) V(12) V(13) V(41) V(42) V(43) .PRINT TRAN V(11) V(12) V(13) V(41) V(42) V(43)
*.OPTIONS ACCT
.OPTIONS NOACCT
**** LEVEL 1 NMOS **** **** LEVEL 1 NMOS ****
.MODEL N10L1 NMOS .MODEL N10L1 NMOS

2
tests/mos6/simpleinv.cir

@ -11,7 +11,7 @@ MN12 11 100 12 0 N10L1 L=1.0U W=5U
.PRINT TRAN V(1) V(2) V(3) V(4) V(5) .PRINT TRAN V(1) V(2) V(3) V(4) V(5)
.PRINT TRAN V(11) V(12) V(13) V(41) V(42) V(43) .PRINT TRAN V(11) V(12) V(13) V(41) V(42) V(43)
*.OPTIONS ACCT
.OPTIONS NOACCT
**** LEVEL 1 NMOS **** **** LEVEL 1 NMOS ****
.MODEL N10L1 NMOS .MODEL N10L1 NMOS

1
tests/polezero/filt_bridge_t.cir

@ -5,6 +5,7 @@ C2 2 3 1U
R3 2 0 1K R3 2 0 1K
R4 1 3 1K R4 1 3 1K
* *
.options noacct
.OP .OP
.PZ 1 0 3 0 VOL PZ .PZ 1 0 3 0 VOL PZ
.PRINT PZ ALL .PRINT PZ ALL

1
tests/polezero/filt_multistage.cir

@ -8,6 +8,7 @@ c2 4 0 1.25p
e3 5 0 4 0 10 e3 5 0 4 0 10
r3 5 6 1k r3 5 6 1k
c3 6 0 .02p c3 6 0 .02p
.options noacct
.pz 1 0 6 0 vol pz .pz 1 0 6 0 vol pz
.print pz all .print pz all
.end .end

1
tests/polezero/filt_rc.cir

@ -2,6 +2,7 @@ RC filter
v1 1 0 0 ac 1.0 v1 1 0 0 ac 1.0
r1 1 2 1k r1 1 2 1k
c1 2 0 10p c1 2 0 10p
.options noacct
.pz 1 0 2 0 vol pz .pz 1 0 2 0 vol pz
.print pz all .print pz all
.end .end

1
tests/polezero/pz2.cir

@ -19,6 +19,7 @@ l4 4 0 1H
*r5 5 0 10Ohms *r5 5 0 10Ohms
*l5 5 0 0.66mH *l5 5 0 0.66mH
.options noacct
.pz 1 0 4 0 cur pol .pz 1 0 4 0 cur pol
.print pz all .print pz all
.end .end

1
tests/polezero/pzt.cir

@ -19,6 +19,7 @@ l3 3 0 0.05H
*r5 5 0 10Ohms *r5 5 0 10Ohms
*l5 5 0 0.66mH *l5 5 0 0.66mH
.options noacct
.pz 1 0 3 0 cur pol .pz 1 0 3 0 cur pol
.print pz all .print pz all
.end .end

1
tests/polezero/simplepz.cir

@ -2,6 +2,7 @@ test circuit #1 for pz analysis:high pass filter
r1 1 0 1k r1 1 0 1k
r2 2 0 1k r2 2 0 1k
c1 1 2 1.0e-12 c1 1 2 1.0e-12
.options noacct
.pz 1 0 2 0 cur pz .pz 1 0 2 0 cur pz
.print pz all .print pz all
.end .end

1
tests/resistance/res_array.cir

@ -18,6 +18,7 @@ R4 5 0 10K ac=5k m=2
VR5 1 6 DC 0 VR5 1 6 DC 0
R5 6 0 10 ac=5 scale=1K R5 6 0 10 ac=5 scale=1K
.options noacct
.OP .OP
.TRAN 1ns 10ns .TRAN 1ns 10ns
.AC DEC 100 1MEG 100MEG .AC DEC 100 1MEG 100MEG

1
tests/resistance/res_partition.cir

@ -4,6 +4,7 @@ vin 1 0 DC 1V AC 1V
r1 1 2 5K r1 1 2 5K
r2 2 0 5K ac=15k r2 2 0 5K ac=15k
.options noacct
.OP .OP
.AC DEC 10 1 10K .AC DEC 10 1 10K
.print ac v(2) .print ac v(2)

1
tests/resistance/res_simple.cir

@ -3,6 +3,7 @@ A simple resistor with a voltage source
R1 1 0 10k R1 1 0 10k
V1 1 0 DC 1 V1 1 0 DC 1
.options noacct
.TRAN 1ns 6ns .TRAN 1ns 6ns
.PRINT TRAN I(V1) .PRINT TRAN I(V1)

2
tests/sensitivity/diffpair.cir

@ -21,6 +21,8 @@ vdm 1 11 dc 0 sin(0 0.1 5meg) ac 1
vcc 8 0 12 vcc 8 0 12
vee 9 0 -12 vee 9 0 -12
.options noacct
* Analyses: * Analyses:
.tf v(5) vcm .tf v(5) vcm
.tf v(5) vdm .tf v(5) vdm

1
tests/transient/fourbitadder.cir

@ -4,6 +4,7 @@
.MODEL dmod D .MODEL dmod D
.MODEL qmod NPN(BF=75 RB=100 CJE=1PF CJC=3PF) .MODEL qmod NPN(BF=75 RB=100 CJE=1PF CJC=3PF)
.options noacct
.SUBCKT NAND 1 2 3 4 .SUBCKT NAND 1 2 3 4
* noeuds: entrees(2) sortie vcc * noeuds: entrees(2) sortie vcc

1
tests/transmission/cpl2_ksp.cir

@ -24,6 +24,7 @@ VK 267 0 DC 5.0
VS1 168 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N) VS1 168 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
VS2 268 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N) VS2 268 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
* *
.OPTIONS NOACCT
.PRINT TRAN v(648) v(651) v(751) .PRINT TRAN v(648) v(651) v(751)
* *
.TRAN 0.2N 47.9NS 0 1N .TRAN 0.2N 47.9NS 0 1N

1
tests/transmission/cpl2_sp.cir

@ -81,6 +81,7 @@ VK 267 0 DC 5.0
VS1 168 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N) VS1 168 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
VS2 268 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N) VS2 268 0 PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
* *
.OPTIONS NOACCT
.TRAN 0.2N 47.9NS .TRAN 0.2N 47.9NS
.PRINT TRAN v(648) v(651) v(751) .PRINT TRAN v(648) v(651) v(751)
* *

1
tests/transmission/cpl_ksp.cir

@ -38,6 +38,7 @@ v3 3 0 DC 5.0
VS1 2 0 PULSE ( 0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS) VS1 2 0 PULSE ( 0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS)
VS2 4 0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS ) VS2 4 0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
* *
.OPTIONS NOACCT
.TRAN 0.2N 47.9N 0 0.05N .TRAN 0.2N 47.9N 0 0.05N
.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55 LAMBDA=0.00 CGSO=0 CGDO=0 .MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55 LAMBDA=0.00 CGSO=0 CGDO=0
+CJ=0 CJSW=0 TOX=18000N LD=0.0U +CJ=0 CJSW=0 TOX=18000N LD=0.0U

1
tests/transmission/cpl_sp.cir

@ -137,6 +137,7 @@ v3 3 0 PULSE (0 5 0Ns 0.1Ns 0.1Ns 600Ns 800Ns)
VS1 2 0 PULSE (0 5 15.9Ns 0.2Ns 0.2Ns 15.8Ns 32Ns) VS1 2 0 PULSE (0 5 15.9Ns 0.2Ns 0.2Ns 15.8Ns 32Ns)
VS2 4 0 PULSE (0 5 15.9Ns 0.2Ns 0.2Ns 15.8Ns 32Ns) VS2 4 0 PULSE (0 5 15.9Ns 0.2Ns 0.2Ns 15.8Ns 32Ns)
.OPTIONS NOACCT
*.TRAN 0.1N 384.1N *.TRAN 0.1N 384.1N
.TRAN 0.1N 47.9N .TRAN 0.1N 47.9N
.PRINT TRAN V(5) V(11) V(13) .PRINT TRAN V(5) V(11) V(13)

1
tests/transmission/ibm1.cir

@ -69,6 +69,7 @@ VEN N GND DC -3
*.MODEL JCNTRAN (B-C-E) *.MODEL JCNTRAN (B-C-E)
*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX *XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
.OPTIONS NOACCT
.TRAN 0.1N 20N .TRAN 0.1N 20N
.PRINT TRAN V(3) V(5) V(8) V(11) V(12) .PRINT TRAN V(3) V(5) V(8) V(11) V(12)
.MODEL JCNTRAN NPN BF=150 VAF=20V IS=4E-17 RB=300 RC=100 CJE=30FF CJC=30FF .MODEL JCNTRAN NPN BF=150 VAF=20V IS=4E-17 RB=300 RC=100 CJE=30FF CJC=30FF

1
tests/transmission/ibm2.cir

@ -15,5 +15,6 @@ p1 2 V1 V2 V3 V4 cpl1
R3 V3 0 100 R3 V3 0 100
R4 V4 0 100 R4 V4 0 100
.OPTIONS NOACCT
.TRAN 0.1N 20N .TRAN 0.1N 20N
.END .END

1
tests/transmission/txl2_ksp.cir

@ -14,6 +14,7 @@ y2 4 0 5 0 ymod
y3 6 0 168 0 ymod y3 6 0 168 0 ymod
vdd 1 0 dc 5.0 vdd 1 0 dc 5.0
VS 168 0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS ) VS 168 0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
.OPTIONS NOACCT
.TRAN 0.2N 47N 0 0.1N .TRAN 0.2N 47N 0 0.1N
.print tran v(2) v(3) .print tran v(2) v(3)
.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55 .MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55

3
tests/transmission/txl2_sp.cir

@ -11,6 +11,9 @@ o1 2 0 3 0 lline
o2 4 0 5 0 lline o2 4 0 5 0 lline
vdd 1 0 dc 5.0 vdd 1 0 dc 5.0
VS 168 0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS ) VS 168 0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
.OPTIONS NOACCT
.TRAN 0.2N 47N 0 1N .TRAN 0.2N 47N 0 1N
.print tran v(2) v(3) .print tran v(2) v(3)
*.nodeset v(2)=5.0 v(3)=5.0 *.nodeset v(2)=5.0 v(3)=5.0

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